From 78e4067013adf54f66e696cc2a2f6301f7ee93d6 Mon Sep 17 00:00:00 2001 From: Shim Date: Thu, 17 Oct 2019 14:00:22 -0400 Subject: [PATCH 1/4] added log file --- syn/191017.log | 23400 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 23400 insertions(+) create mode 100644 syn/191017.log diff --git a/syn/191017.log b/syn/191017.log new file mode 100644 index 00000000..35fe380e --- /dev/null +++ b/syn/191017.log @@ -0,0 +1,23400 @@ + + Design Compiler Graphical + DC Ultra (TM) + DFTMAX (TM) + Power Compiler (TM) + DesignWare (R) + DC Expert (TM) + Design Vision (TM) + HDL Compiler (TM) + VHDL Compiler (TM) + DFT Compiler + Design Compiler(R) + + Version O-2018.06-SP4 for linux64 - Nov 27, 2018 + + Copyright (c) 1988 - 2018 Synopsys, Inc. + This software and the associated documentation are proprietary to Synopsys, + Inc. This software may only be used in accordance with the terms and conditions + of a written license agreement with Synopsys, Inc. All other use, reproduction, + or distribution of this software is strictly prohibited. +Initializing... +Initializing gui preferences from file /nethome/dshim8/.synopsys_dv_prefs.tcl +set search_path [concat /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/ /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/ ../rtl/ ../rtl/interfaces ../rtl/pipe_regs] +/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/ /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/ ../rtl/ ../rtl/interfaces ../rtl/pipe_regs +set link_library [concat * sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db rf2_32x128_wm1_ss_0p81v_0p81v_125c.db dw_foundation.sldb] +* sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db rf2_32x128_wm1_ss_0p81v_0p81v_125c.db dw_foundation.sldb +set symbol_library {} +set target_library [concat sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db] +sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db +set verilog_files [ list VX_alu.v VX_back_end.v VX_gpr_stage.v VX_gpr_data_inter.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_scheduler.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_memory.v VX_one_counter.v VX_priority_encoder.v VX_warp.v VX_warp_scheduler.v VX_writeback.v Vortex.v byte_enabled_simple_dual_port_ram.v VX_branch_response_inter.v VX_csr_write_request_inter.v VX_dcache_request_inter.v VX_dcache_response_inter.v VX_forward_csr_response_inter.v VX_forward_exe_inter.v VX_forward_mem_inter.v VX_forward_reqeust_inter.v VX_forward_response_inter.v VX_forward_wb_inter.v VX_frE_to_bckE_req_inter.v VX_gpr_clone_inter.v VX_gpr_jal_inter.v VX_gpr_read_inter.v VX_gpr_wspawn_inter.v VX_icache_request_inter.v VX_icache_response_inter.v VX_inst_mem_wb_inter.v VX_inst_meta_inter.v VX_jal_response_inter.v VX_mem_req_inter.v VX_mw_wb_inter.v VX_warp_ctl_inter.v VX_wb_inter.v VX_d_e_reg.v VX_e_m_reg.v VX_f_d_reg.v VX_m_w_reg.v ] +VX_alu.v VX_back_end.v VX_gpr_stage.v VX_gpr_data_inter.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_scheduler.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_memory.v VX_one_counter.v VX_priority_encoder.v VX_warp.v VX_warp_scheduler.v VX_writeback.v Vortex.v byte_enabled_simple_dual_port_ram.v VX_branch_response_inter.v VX_csr_write_request_inter.v VX_dcache_request_inter.v VX_dcache_response_inter.v VX_forward_csr_response_inter.v VX_forward_exe_inter.v VX_forward_mem_inter.v VX_forward_reqeust_inter.v VX_forward_response_inter.v VX_forward_wb_inter.v VX_frE_to_bckE_req_inter.v VX_gpr_clone_inter.v VX_gpr_jal_inter.v VX_gpr_read_inter.v VX_gpr_wspawn_inter.v VX_icache_request_inter.v VX_icache_response_inter.v VX_inst_mem_wb_inter.v VX_inst_meta_inter.v VX_jal_response_inter.v VX_mem_req_inter.v VX_mw_wb_inter.v VX_warp_ctl_inter.v VX_wb_inter.v VX_d_e_reg.v VX_e_m_reg.v VX_f_d_reg.v VX_m_w_reg.v +analyze -format sverilog $verilog_files +Running PRESTO HDLC +Compiling source file ../rtl/VX_alu.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_back_end.v +Compiling source file ../rtl/VX_gpr_stage.v +Compiling source file ../rtl/interfaces/VX_gpr_data_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_data_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/VX_csr_handler.v +Compiling source file ../rtl/VX_decode.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_csr_handler.v:34: The statements in initial blocks are ignored. (VER-281) +Compiling source file ../rtl/VX_define.v +Compiling source file ../rtl/VX_execute.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_scheduler.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_fetch.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_scheduler.v:18: The statements in initial blocks are ignored. (VER-281) +Compiling source file ../rtl/VX_forwarding.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_front_end.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_generic_register.v +Compiling source file ../rtl/VX_gpr.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_gpr.v:67: the undeclared symbol 'write_bit_mask' assumed to have the default net type, which is 'wire'. (VER-936) +Compiling source file ../rtl/VX_gpr_wrapper.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_memory.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_one_counter.v +Compiling source file ../rtl/VX_priority_encoder.v +Compiling source file ../rtl/VX_warp.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_warp.v:29: The construct 'declaration initial assignment' is not supported in synthesis; it is ignored. (VER-708) +Compiling source file ../rtl/VX_warp_scheduler.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_warp.v:30: The statements in initial blocks are ignored. (VER-281) +Compiling source file ../rtl/VX_writeback.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_warp_scheduler.v:73: The statements in initial blocks are ignored. (VER-281) +Compiling source file ../rtl/Vortex.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/byte_enabled_simple_dual_port_ram.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/interfaces/VX_branch_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Warning: ../rtl/byte_enabled_simple_dual_port_ram.v:21: The statements in initial blocks are ignored. (VER-281) +Information: ../rtl/interfaces/VX_branch_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_csr_write_request_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_csr_write_request_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_dcache_request_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_dcache_request_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_dcache_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_dcache_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_csr_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_csr_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_exe_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_exe_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_mem_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_mem_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_reqeust_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_reqeust_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_wb_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_wb_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_frE_to_bckE_req_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_frE_to_bckE_req_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_gpr_clone_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_clone_inter.v:9: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_gpr_jal_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_jal_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_gpr_read_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_read_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_gpr_wspawn_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_wspawn_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_icache_request_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_icache_request_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_icache_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_icache_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_inst_mem_wb_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_inst_mem_wb_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_inst_meta_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_inst_meta_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_jal_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_jal_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_mem_req_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_mem_req_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_mw_wb_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_mw_wb_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_warp_ctl_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_warp_ctl_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_wb_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_wb_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/pipe_regs/VX_d_e_reg.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/pipe_regs/VX_e_m_reg.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/pipe_regs/VX_f_d_reg.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/pipe_regs/VX_m_w_reg.v +Opening include file ../rtl//VX_define.v +Presto compilation completed successfully. +Loading db file '/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db' +Loading db file '/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/rf2_32x128_wm1_ss_0p81v_0p81v_125c.db' +Loading db file '/tools/synopsys/synthesis/syn/O-2018.06-SP4/libraries/syn/dw_foundation.sldb' +1 +elaborate Vortex +Loading db file '/tools/synopsys/synthesis/syn/O-2018.06-SP4/libraries/syn/gtech.db' +Loading db file '/tools/synopsys/synthesis/syn/O-2018.06-SP4/libraries/syn/standard.sldb' + Loading link library 'sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c' + Loading link library 'rf_2p_hce_ss_0p81v_0p81v_125c' + Loading link library 'gtech' +Running PRESTO HDLC +Presto compilation completed successfully. +Elaborated 1 design. +Current design is now 'Vortex'. +Information: Building the design 'VX_front_end' instantiated from design 'Vortex' with + the parameters "|((N%clk%)(N%reset%)(N%VX_warp_ctl%I%WORK/VX_warp_ctl_inter%%)(N%forwarding_fwd_stall%)(N%execute_branch_stall%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%decode_csr_address%)(N%memory_delay%)(N%fetch_delay%)(N%schedule_delay%)(N%icache_response_fe%I%WORK/VX_icache_response_inter%%)(N%icache_request_fe%I%WORK/VX_icache_request_inter%%)(N%VX_jal_rsp%I%WORK/VX_jal_response_inter%%)(N%VX_branch_rsp%I%WORK/VX_branch_response_inter%%)(N%fetch_ebreak%)(N%in_gpr_stall%))". (HDL-193) +Presto compilation completed successfully. +Warning: Filename too long >255 chars. Renaming file: +'/nethome/dshim8/Desktop/vortexGPU/191017_vortex/Vortex/syn/VX_FRONT_END_I_VX_WARP_CTL_VX_WARP_CTL_INTER__I_ICACHE_RESPONSE_FE_VX_ICACHE_RESPONSE_INTER__I_ICACHE_REQUEST_FE_VX_ICACHE_REQUEST_INTER__I_VX_JAL_RSP_VX_JAL_RESPONSE_INTER__I_VX_BRANCH_RSP_VX_BRANCH_RESPONSE_INTER__I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__.mr' +to +'/nethome/dshim8/Desktop/vortexGPU/191017_vortex/Vortex/syn/VX_FRONT_END_I_VX_WARP_CTL_VX_WARP_CTL_INTER__I_ICACHE_RESPONSE_FE_VX_ICACHE_RESPONSE_INTER__I_ICACHE_REQUEST_FE_VX_ICACHE_REQUEST_INTER__I_VX_JAL_RSP_VX_JAL_RESPONSE_INTER__I_VX_BRANCH_RSP_VX_BRANCH_35FE527370C98E3C09E2E6E2555D7EE6F02ECB4FA9775364_000.mr' +Information: Building the design 'VX_scheduler' instantiated from design 'Vortex' with + the parameters "|((N%clk%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%schedule_delay%))". (HDL-193) + +Inferred memory devices in process + in routine VX_scheduler_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__ line 44 in file + '../rtl/VX_scheduler.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| rename_table_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | +=============================================================================== +Statistics for MUX_OPs +================================================================================================================================ +| block name/line | Inputs | Outputs | # sel inputs | +================================================================================================================================ +| VX_scheduler_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__/30 | 32 | 1 | 5 | +| VX_scheduler_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__/31 | 32 | 1 | 5 | +================================================================================================================================ +Presto compilation completed successfully. +Information: Building the design 'VX_back_end' instantiated from design 'Vortex' with + the parameters "|((N%clk%)(N%reset%)(N%schedule_delay%)(N%fetch_delay%)(N%in_fwd_stall%)(N%VX_fwd_req_de%I%WORK/VX_forward_reqeust_inter%%)(N%VX_fwd_rsp%I%WORK/VX_forward_response_inter%%)(N%VX_warp_ctl%I%WORK/VX_warp_ctl_inter%%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_fwd_exe%I%WORK/VX_forward_exe_inter%%)(N%csr_decode_csr_data%)(N%execute_branch_stall%)(N%VX_jal_rsp%I%WORK/VX_jal_response_inter%%)(N%VX_branch_rsp%I%WORK/VX_branch_response_inter%%)(N%VX_dcache_rsp%I%WORK/VX_dcache_response_inter%%)(N%VX_dcache_req%I%WORK/VX_dcache_request_inter%%)(N%VX_fwd_mem%I%WORK/VX_forward_mem_inter%%)(N%VX_fwd_wb%I%WORK/VX_forward_wb_inter%%)(N%VX_csr_w_req%I%WORK/VX_csr_write_request_inter%%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%out_mem_delay%)(N%out_gpr_stall%))". (HDL-193) +Presto compilation completed successfully. +Warning: Filename too long >255 chars. Renaming file: +'/nethome/dshim8/Desktop/vortexGPU/191017_vortex/Vortex/syn/VX_BACK_END_I_VX_JAL_RSP_VX_JAL_RESPONSE_INTER__I_VX_BRANCH_RSP_VX_BRANCH_RESPONSE_INTER__I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__I_VX_WRITEBACK_INTER_VX_WB_INTER__I_VX_WARP_CTL_VX_WARP_CTL_INTER__I_VX_DCACHE_RSP_VX_DCACHE_RESPONSE_INTER__I_VX_DCACHE_REQ_VX_DCACHE_REQUEST_INTER__I_VX_FWD_REQ_DE_VX_FORWARD_REQEUST_INTER__I_VX_FWD_RSP_VX_FORWARD_RESPONSE_INTER__I_VX_FWD_EXE_VX_FORWARD_EXE_INTER__I_VX_FWD_MEM_VX_FORWARD_MEM_INTER__I_VX_FWD_WB_VX_FORWARD_WB_INTER__I_VX_CSR_W_REQ_VX_CSR_WRITE_REQUEST_INTER__.mr' +to +'/nethome/dshim8/Desktop/vortexGPU/191017_vortex/Vortex/syn/VX_BACK_END_I_VX_JAL_RSP_VX_JAL_RESPONSE_INTER__I_VX_BRANCH_RSP_VX_BRANCH_RESPONSE_INTER__I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__I_VX_WRITEBACK_INTER_VX_WB_INTER__I_VX_WARP_CTL_VX_WARP_CTL_INTER__I__7F07B1EEE994C915DA9D538D8C0E27221FA22D3A417A3ECA_000.mr' +Information: Building the design 'VX_forwarding' instantiated from design 'Vortex' with + the parameters "|((N%VX_fwd_req_de%I%WORK/VX_forward_reqeust_inter%%)(N%VX_fwd_exe%I%WORK/VX_forward_exe_inter%%)(N%VX_fwd_mem%I%WORK/VX_forward_mem_inter%%)(N%VX_fwd_wb%I%WORK/VX_forward_wb_inter%%)(N%VX_fwd_rsp%I%WORK/VX_forward_response_inter%%)(N%out_fwd_stall%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_csr_handler' instantiated from design 'Vortex' with + the parameters "|((N%clk%)(N%in_decode_csr_address%)(N%VX_csr_w_req%I%WORK/VX_csr_write_request_inter%%)(N%in_wb_valid%)(N%out_decode_csr_data%))". (HDL-193) + +Inferred memory devices in process + in routine VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__ line 41 in file + '../rtl/VX_csr_handler.v'. +================================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +================================================================================== +| cycle_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | +| decode_csr_address_reg | Flip-flop | 12 | Y | N | N | N | N | N | N | +| instret_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | +================================================================================== + +Inferred memory devices in process + in routine VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__ line 50 in file + '../rtl/VX_csr_handler.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| csr_reg | Flip-flop | 12300 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_fetch' instantiated from design 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "|((N%clk%)(N%in_memory_delay%)(N%in_branch_stall%)(N%in_fwd_stall%)(N%schedule_delay%)(N%in_branch_stall_exe%)(N%in_gpr_stall%)(N%VX_jal_rsp%I%WORK/VX_jal_response_inter%%)(N%icache_response%I%WORK/VX_icache_response_inter%%)(N%VX_warp_ctl%I%WORK/VX_warp_ctl_inter%%)(N%icache_request%I%WORK/VX_icache_request_inter%%)(N%VX_branch_rsp%I%WORK/VX_branch_response_inter%%)(N%out_delay%)(N%out_ebreak%)(N%fe_inst_meta_fd%I%WORK/VX_inst_meta_inter%%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_f_d_reg' instantiated from design 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "|((N%clk%)(N%reset%)(N%in_fwd_stall%)(N%in_freeze%)(N%in_gpr_stall%)(N%fe_inst_meta_fd%I%WORK/VX_inst_meta_inter%%)(N%fd_inst_meta_de%I%WORK/VX_inst_meta_inter%%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_decode' instantiated from design 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "|((N%fd_inst_meta_de%I%WORK/VX_inst_meta_inter%%)(N%VX_frE_to_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%out_gpr_stall%)(N%out_branch_stall%)(N%out_ebreak%))". (HDL-193) +Warning: ../rtl/VX_decode.v:209: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_decode.v:376: DEFAULT branch of CASE statement cannot be reached. (ELAB-311) +Warning: ../rtl/VX_decode.v:391: DEFAULT branch of CASE statement cannot be reached. (ELAB-311) + +Statistics for case statements in always block at line 217 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 218 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 250 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 251 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 313 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 314 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 328 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 329 | auto/auto | +| 334 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 374 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 376 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 389 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 391 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 406 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 407 | auto/auto | +=============================================== + +Inferred memory devices in process + in routine VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__ line 250 in file + '../rtl/VX_decode.v'. +=========================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=========================================================================== +| temp_jal_reg | Latch | 1 | N | N | N | N | - | - | - | +| temp_jal_offset_reg | Latch | 32 | Y | N | N | N | - | - | - | +=========================================================================== + +Inferred memory devices in process + in routine VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__ line 328 in file + '../rtl/VX_decode.v'. +============================================================================= +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +============================================================================= +| temp_branch_stall_reg | Latch | 1 | N | N | N | N | - | - | - | +| temp_branch_type_reg | Latch | 3 | Y | N | N | N | - | - | - | +============================================================================= +Presto compilation completed successfully. +Information: Building the design 'VX_d_e_reg' instantiated from design 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "|((N%clk%)(N%reset%)(N%in_fwd_stall%)(N%in_branch_stall%)(N%in_freeze%)(N%in_gpr_stall%)(N%VX_frE_to_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_gpr_stage' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%clk%)(N%schedule_delay%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%VX_fwd_rsp%I%WORK/VX_forward_response_inter%%)(N%in_fwd_stall%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_warp_ctl%I%WORK/VX_warp_ctl_inter%%)(N%VX_bckE_req_out%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_gpr_data%I%WORK/VX_gpr_data_inter%%)(N%VX_fwd_req_de%I%WORK/VX_forward_reqeust_inter%%)(N%out_gpr_stall%))". (HDL-193) +Presto compilation completed successfully. +Warning: Filename too long >255 chars. Renaming file: +'/nethome/dshim8/Desktop/vortexGPU/191017_vortex/Vortex/syn/VX_GPR_STAGE_I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__I_VX_WRITEBACK_INTER_VX_WB_INTER__I_VX_FWD_RSP_VX_FORWARD_RESPONSE_INTER__I_VX_FWD_REQ_DE_VX_FORWARD_REQEUST_INTER__I_VX_WARP_CTL_VX_WARP_CTL_INTER__I_VX_BCKE_REQ_OUT_VX_FRE_TO_BCKE_REQ_INTER__I_VX_GPR_DATA_VX_GPR_DATA_INTER__.mr' +to +'/nethome/dshim8/Desktop/vortexGPU/191017_vortex/Vortex/syn/VX_GPR_STAGE_I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__I_VX_WRITEBACK_INTER_VX_WB_INTER__I_VX_FWD_RSP_VX_FORWARD_RESPONSE_INTER__I_VX_FWD_REQ_DE_VX_FORWARD_REQEUST_INTER__I_VX_WARP_CTL_VX_WARP_CTL_INTE_EFBA196D9E299CB8BE86C5524AD8111A54BE04AAEA2C3858_000.mr' +Information: Building the design 'VX_execute' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_gpr_data%I%WORK/VX_gpr_data_inter%%)(N%VX_fwd_exe%I%WORK/VX_forward_exe_inter%%)(N%in_csr_data%)(N%VX_exe_mem_req%I%WORK/VX_mem_req_inter%%)(N%out_csr_address%)(N%out_is_csr%)(N%out_csr_result%)(N%out_jal%)(N%out_jal_dest%)(N%out_branch_stall%))". (HDL-193) +Warning: ../rtl/VX_execute.v:64: signed to unsigned assignment occurs. (VER-318) + +Statistics for case statements in always block at line 67 in file + '../rtl/VX_execute.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 69 | auto/auto | +=============================================== +Warning: ../rtl/VX_execute.v:90: Net VX_exe_mem_req.wb[1] or a directly connected net may be driven by more than one process or block. (ELAB-405) +Warning: ../rtl/VX_execute.v:90: Net VX_exe_mem_req.wb[0] or a directly connected net may be driven by more than one process or block. (ELAB-405) +Presto compilation completed successfully. +Information: Building the design 'VX_e_m_reg' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%clk%)(N%reset%)(N%in_csr_address%)(N%in_is_csr%)(N%in_csr_result%)(N%in_jal%)(N%in_jal_dest%)(N%in_freeze%)(N%VX_exe_mem_req%I%WORK/VX_mem_req_inter%%)(N%VX_mem_req%I%WORK/VX_mem_req_inter%%)(N%out_csr_address%)(N%out_is_csr%)(N%out_csr_result%)(N%out_jal%)(N%out_jal_dest%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_memory' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%VX_mem_req%I%WORK/VX_mem_req_inter%%)(N%VX_mem_wb%I%WORK/VX_inst_mem_wb_inter%%)(N%VX_fwd_mem%I%WORK/VX_forward_mem_inter%%)(N%out_delay%)(N%VX_branch_rsp%I%WORK/VX_branch_response_inter%%)(N%VX_dcache_rsp%I%WORK/VX_dcache_response_inter%%)(N%VX_dcache_req%I%WORK/VX_dcache_request_inter%%))". (HDL-193) +Warning: ../rtl/VX_memory.v:57: signed to unsigned assignment occurs. (VER-318) + +Statistics for case statements in always block at line 59 in file + '../rtl/VX_memory.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 60 | auto/auto | +=============================================== +Presto compilation completed successfully. +Information: Building the design 'VX_writeback' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%VX_mw_wb%I%WORK/VX_mw_wb_inter%%)(N%VX_fwd_wb%I%WORK/VX_forward_wb_inter%%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_warp_scheduler'. (HDL-193) + +Inferred memory devices in process + in routine VX_warp_scheduler line 82 in file + '../rtl/VX_warp_scheduler.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| visible_active_reg | Flip-flop | 8 | Y | N | N | N | N | N | N | +| warp_pcs_reg | Flip-flop | 256 | Y | N | N | N | N | N | N | +| warp_active_reg | Flip-flop | 8 | Y | N | N | N | N | N | N | +| thread_masks_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | +| warp_stalled_reg | Flip-flop | 8 | Y | N | N | N | N | N | N | +| start_reg | Flip-flop | 2 | Y | N | N | N | N | N | N | +=============================================================================== +Statistics for MUX_OPs +=========================================================== +| block name/line | Inputs | Outputs | # sel inputs | +=========================================================== +| VX_warp_scheduler/147 | 8 | 1 | 3 | +| VX_warp_scheduler/152 | 8 | 32 | 3 | +| VX_warp_scheduler/153 | 8 | 4 | 3 | +=========================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_generic_register' instantiated from design 'VX_f_d_reg_I_fe_inst_meta_fd_VX_inst_meta_inter__I_fd_inst_meta_de_VX_inst_meta_inter__' with + the parameters "N=71". (HDL-193) + +Inferred memory devices in process + in routine VX_generic_register_N71 line 22 in file + '../rtl/VX_generic_register.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| value_reg | Flip-flop | 71 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_generic_register' instantiated from design 'VX_d_e_reg_I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "N=237". (HDL-193) + +Inferred memory devices in process + in routine VX_generic_register_N237 line 22 in file + '../rtl/VX_generic_register.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| value_reg | Flip-flop | 237 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_gpr_wrapper' instantiated from design 'VX_gpr_stage_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_bckE_req_out_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__' with + the parameters "|((N%clk%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%VX_fwd_rsp%I%WORK/VX_forward_response_inter%%)(N%VX_gpr_read%I%WORK/VX_gpr_read_inter%%)(N%VX_gpr_jal%I%WORK/VX_gpr_jal_inter%%)(N%out_a_reg_data%)(N%out_b_reg_data%)(N%out_gpr_stall%))". (HDL-193) +Statistics for MUX_OPs +================================================================================================================================================================================================== +| block name/line | Inputs | Outputs | # sel inputs | +================================================================================================================================================================================================== +| VX_gpr_wrapper_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_gpr_jal_VX_gpr_jal_inter__/25 | 8 | 256 | 3 | +================================================================================================================================================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_generic_register' instantiated from design 'VX_gpr_stage_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_bckE_req_out_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__' with + the parameters "N=256". (HDL-193) + +Inferred memory devices in process + in routine VX_generic_register_N256 line 22 in file + '../rtl/VX_generic_register.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| value_reg | Flip-flop | 256 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_alu'. (HDL-193) +Warning: ../rtl/VX_alu.v:41: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:50: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:51: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:57: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:62: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:70: signed to unsigned conversion occurs. (VER-318) +Warning: ../rtl/VX_alu.v:72: signed to unsigned conversion occurs. (VER-318) + +Statistics for case statements in always block at line 48 in file + '../rtl/VX_alu.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 49 | auto/auto | +=============================================== +Presto compilation completed successfully. +Information: Building the design 'VX_generic_register' instantiated from design 'VX_e_m_reg_I_VX_exe_mem_req_VX_mem_req_inter__I_VX_mem_req_VX_mem_req_inter__' with + the parameters "N=463". (HDL-193) + +Inferred memory devices in process + in routine VX_generic_register_N463 line 22 in file + '../rtl/VX_generic_register.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| value_reg | Flip-flop | 463 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_priority_encoder'. (HDL-193) +Warning: ../rtl/VX_priority_encoder.v:15: signed to unsigned part selection occurs. (VER-318) +Presto compilation completed successfully. +Information: Building the design 'VX_one_counter'. (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_gpr' instantiated from design 'VX_gpr_wrapper_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_gpr_jal_VX_gpr_jal_inter__' with + the parameters "|((N%clk%)(N%valid_write_request%)(N%VX_gpr_read%I%WORK/VX_gpr_read_inter%%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%out_a_reg_data%)(N%out_b_reg_data%))". (HDL-193) +Presto compilation completed successfully. +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +1 +link + + Linking design 'Vortex' + Using the following designs and libraries: + -------------------------------------------------------------------------- + * (25 designs) /nethome/dshim8/Desktop/vortexGPU/191017_vortex/Vortex/syn/Vortex.db, etc + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c (library) /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db + rf_2p_hce_ss_0p81v_0p81v_125c (library) /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/rf2_32x128_wm1_ss_0p81v_0p81v_125c.db + dw_foundation.sldb (library) /tools/synopsys/synthesis/syn/O-2018.06-SP4/libraries/syn/dw_foundation.sldb + +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (LINK-5) +0 +set clk_freq 100 +100 +set clk_period [expr 1000.0 / $clk_freq / 1.0] +10.0 +create_clock [get_ports clk] -period $clk_period +1 +set_max_fanout 20 [get_ports clk] +1 +set_ideal_network [get_ports clk] +1 +set_max_fanout 20 [get_ports reset] +1 +set_false_path -from [get_ports reset] +1 +compile_ultra -no_autoungroup +Information: Performing power optimization. (PWR-850) +Analyzing: "/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db" +Library analysis succeeded. +Information: Evaluating DesignWare library utilization. (UISN-27) + +============================================================================ +| DesignWare Building Block Library | Version | Available | +============================================================================ +| Basic DW Building Blocks | O-2018.06-DWBB_201806.4 | * | +| Licensed DW Building Blocks | O-2018.06-DWBB_201806.4 | * | +============================================================================ + +Information: Sequential output inversion is enabled. SVF file must be used for formal verification. (OPT-1208) + +Information: There are 3928 potential problems in your design. Please run 'check_design' for more information. (LINT-99) + +Information: Uniquified 2 instances of design 'VX_d_e_reg_I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__'. (OPT-1056) +Information: Uniquified 2 instances of design 'VX_generic_register_N237'. (OPT-1056) +Information: Uniquified 4 instances of design 'VX_alu'. (OPT-1056) +Information: Uniquified 2 instances of design 'VX_priority_encoder'. (OPT-1056) +Information: Uniquified 8 instances of design 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (OPT-1056) + Simplifying Design 'Vortex' + +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Loaded alib file './alib-52/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db.alib' +Information: State dependent leakage is now switched from on to off. + + Beginning Pass 1 Mapping + ------------------------ + Processing 'VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__' + Implement Synthetic for 'VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__'. + Processing 'VX_warp_scheduler' +Information: Added key list 'DesignWare' to design 'VX_warp_scheduler'. (DDB-72) +Information: The register 'start_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'start_reg[0]' is a constant and will be removed. (OPT-1206) + Implement Synthetic for 'VX_warp_scheduler'. + Processing 'VX_gpr_wrapper_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_gpr_jal_VX_gpr_jal_inter__' + Processing 'VX_generic_register_N463' + Processing 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' + Processing 'VX_forwarding_I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__' +Information: Added key list 'DesignWare' to design 'VX_forwarding_I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__'. (DDB-72) + Processing 'Vortex' + Processing 'VX_generic_register_N237_1' +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[189]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[190]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[191]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[192]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[193]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[194]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[195]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[196]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[197]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[198]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[199]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[200]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[201]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[202]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[203]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[204]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[205]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[206]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[207]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[208]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[209]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[210]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[211]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[212]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[213]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[214]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[215]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[216]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[217]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[218]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[219]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[221]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) + Processing 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0' + Processing 'VX_fetch_I_icache_response_VX_icache_response_inter__I_icache_request_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_fe_inst_meta_fd_VX_inst_meta_inter__I_VX_warp_ctl_VX_warp_ctl_inter__' + Processing 'VX_alu_0' + Implement Synthetic for 'VX_alu_0'. + Processing 'VX_alu_0_DW_div_uns_J9_0' + Processing 'VX_alu_0_DW_div_tc_J9_0' + Processing 'VX_alu_0_DW01_absval_J9_0' + Processing 'VX_alu_0_DW01_inc_J9_0' + Processing 'VX_alu_0_DW_div_uns_J9_1' + Processing 'VX_alu_0_DW_div_tc_J9_1' + Processing 'VX_alu_0_DW01_absval_J9_1' + Processing 'VX_alu_0_DW01_inc_J9_1' +Information: Added key list 'DesignWare' to design 'VX_alu_0'. (DDB-72) + Processing 'VX_writeback_I_VX_mw_wb_VX_mw_wb_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_writeback_inter_VX_wb_inter__' + Processing 'VX_d_e_reg_I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter___1' + Processing 'VX_generic_register_N256' + Processing 'VX_d_e_reg_I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter___0' + Processing 'VX_memory_I_VX_mem_req_VX_mem_req_inter__I_VX_mem_wb_VX_inst_mem_wb_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__' + Implement Synthetic for 'VX_memory_I_VX_mem_req_VX_mem_req_inter__I_VX_mem_wb_VX_inst_mem_wb_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__'. + Processing 'VX_one_counter' +Information: Added key list 'DesignWare' to design 'VX_one_counter'. (DDB-72) + Processing 'VX_gpr_stage_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_bckE_req_out_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__' + Processing 'VX_execute_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_exe_mem_req_VX_mem_req_inter__' + Implement Synthetic for 'VX_execute_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_exe_mem_req_VX_mem_req_inter__'. +Information: Added key list 'DesignWare' to design 'VX_execute_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_exe_mem_req_VX_mem_req_inter__'. (DDB-72) + Processing 'VX_generic_register_N71' + Processing 'VX_priority_encoder_0' + Processing 'VX_generic_register_N237_0' + Processing 'VX_e_m_reg_I_VX_exe_mem_req_VX_mem_req_inter__I_VX_mem_req_VX_mem_req_inter__' + Processing 'VX_f_d_reg_I_fe_inst_meta_fd_VX_inst_meta_inter__I_fd_inst_meta_de_VX_inst_meta_inter__' + Processing 'VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__' +Information: Added key list 'DesignWare' to design 'VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__'. (DDB-72) + Implement Synthetic for 'VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__'. + Processing 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' + Processing 'VX_scheduler_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__' +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) + + Updating timing information +Information: Updating design information... (UID-85) +Information: The library cell 'TIELO_X1M_A12TUL_C35' in the library 'sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c' is not characterized for internal power. (PWR-536) +Information: The library cell 'TIEHI_X1M_A12TUL_C35' in the library 'sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c' is not characterized for internal power. (PWR-536) +Information: The target library(s) contains cell(s), other than black boxes, that are not characterized for internal power. (PWR-24) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[0][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[0][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[0][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[0][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[1][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[1][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[1][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[1][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[2][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[2][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[2][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[2][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[3][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[3][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[3][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[3][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[4][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[4][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[4][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[4][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[5][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[5][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[5][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[5][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[6][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[6][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[6][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[6][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[7][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[7][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[7][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[7][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[70]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[69]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[68]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[67]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[66]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[65]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[64]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[62]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[60]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[58]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[57]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[55]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[54]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[52]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[51]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[50]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[49]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[48]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[46]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[45]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[44]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[42]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[41]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[40]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[39]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[71]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[71]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[417]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[104]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[104]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[105]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[105]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[106]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[106]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[107]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[107]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[108]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[108]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[109]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[109]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[110]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[110]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[111]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[111]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[112]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[112]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[113]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[113]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[114]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[114]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[115]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[115]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[116]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[116]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[117]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[117]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[118]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[118]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[119]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[119]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[120]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[120]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[121]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[121]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[122]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[122]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[123]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[123]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[124]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[124]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[125]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[125]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[126]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[126]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[33]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[35]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[36]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[37]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[38]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[39]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[40]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[41]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[42]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[44]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[45]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[46]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[48]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[49]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[50]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[51]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[52]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[54]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[55]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[57]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[58]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[60]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[62]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_decode/temp_branch_stall_reg' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[137]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[137]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[141]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[141]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[147]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[147]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[150]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[150]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[153]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[153]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[155]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[155]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[157]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[157]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[162]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[162]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[39]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[165]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[165]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[166]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[166]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[244]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[167]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[167]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[245]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[168]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[168]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[169]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[169]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[170]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[170]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[171]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[171]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[172]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[172]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[183]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[183]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[184]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[184]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[185]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[185]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[186]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[186]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[187]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[187]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[188]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[188]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[189]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[190]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[191]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[192]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[193]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[194]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[195]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[196]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[197]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[198]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[199]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[200]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[201]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[202]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[432]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[203]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[204]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[205]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[435]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[206]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[207]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[208]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[438]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[209]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[210]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[440]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[211]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[212]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[442]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[213]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[214]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[215]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[216]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[217]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[447]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[218]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[219]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[221]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[450]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[220]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[220]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[222]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[222]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[223]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[223]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[224]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[224]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[226]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[226]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[452]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[228]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[228]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[454]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[230]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[230]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[456]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[232]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[232]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[458]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[233]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[233]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[459]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[234]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[234]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[460]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[235]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[235]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[461]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[236]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[236]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[462]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[422]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[426]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[68]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[68]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[72]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[72]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[42]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[74]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[73]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[73]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[75]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[79]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[79]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[49]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[81]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[74]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[74]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[44]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[77]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[75]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[75]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[45]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[76]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[76]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[46]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[78]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[77]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[77]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[80]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[78]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[78]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[48]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[80]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[80]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[50]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[82]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[81]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[81]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[51]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[84]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[82]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[82]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[52]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[83]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[83]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[85]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[84]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[84]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[54]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[87]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[85]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[85]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[55]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[86]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[86]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[88]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[87]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[87]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[57]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[90]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[88]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[88]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[58]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[89]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[89]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[91]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[90]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[90]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[60]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[93]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[91]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[91]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[92]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[92]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[62]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[94]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[93]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[93]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[96]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[94]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[94]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[64]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[95]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[95]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[65]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[97]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[96]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[96]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[66]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[99]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[97]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[97]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[67]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[33]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[98]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[98]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[68]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[33]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[33]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[100]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[99]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[99]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[69]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[35]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[35]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[102]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[35]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[100]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[100]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[70]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[36]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[101]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[101]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[71]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[36]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[36]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[103]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[37]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[102]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[102]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[72]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[38]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[38]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[105]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[38]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[103]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[103]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[73]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[37]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[37]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[104]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[101]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[98]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[95]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[92]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[89]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[86]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[83]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[79]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[1]' is a constant and will be removed. (OPT-1206) +Information: In design 'Vortex', the register 'vx_csr_handler/decode_csr_address_reg[4]' is removed because it is merged to 'vx_csr_handler/decode_csr_address_reg[6]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_csr_handler/decode_csr_address_reg[2]' is removed because it is merged to 'vx_csr_handler/decode_csr_address_reg[6]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_csr_handler/decode_csr_address_reg[0]' is removed because it is merged to 'vx_csr_handler/decode_csr_address_reg[6]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[128]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[129]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[130]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[131]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[132]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[133]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[134]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[135]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[136]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[138]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[139]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[140]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[142]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[143]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[144]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[145]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[146]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[148]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[149]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[151]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[152]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[154]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[156]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[158]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[159]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[160]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[161]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[163]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[164]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[225]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[227]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[229]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[231]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[9]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[128]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[129]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[130]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[131]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[132]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[133]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[134]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[135]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[136]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[138]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[139]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[140]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[142]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[143]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[144]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[145]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[146]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[148]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[149]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[151]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[152]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[154]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[156]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[158]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[159]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[160]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[161]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[163]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[164]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[225]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[227]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[229]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[231]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[9]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: The register 'vx_csr_handler/decode_csr_address_reg[6]' will be removed. (OPT-1207) +Information: Removing unused design 'VX_priority_encoder_1'. (OPT-1055) +Information: Removing unused design 'VX_one_counter'. (OPT-1055) +Information: Removing unused design 'VX_priority_encoder_0'. (OPT-1055) + + Beginning Mapping Optimizations (Ultra High effort) + ------------------------------- +Information: Added key list 'DesignWare' to design 'VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__'. (DDB-72) +Information: Added key list 'DesignWare' to design 'VX_memory_I_VX_mem_req_VX_mem_req_inter__I_VX_mem_wb_VX_inst_mem_wb_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__'. (DDB-72) +Information: Updating design information... (UID-85) + Mapping Optimization (Phase 1) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[39]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[40]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[41]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[42]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[44]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[45]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[46]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[48]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[49]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[50]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[51]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[52]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[54]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[55]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[57]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[58]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[60]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[62]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[64]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[65]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[66]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[67]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[69]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[70]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) + + Beginning Constant Register Removal + ----------------------------------- +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) + + Beginning Global Optimizations + ------------------------------ + Numerical Synthesis (Phase 1) + Numerical Synthesis (Phase 2) + Global Optimization (Phase 1) + Global Optimization (Phase 2) + Global Optimization (Phase 3) + Global Optimization (Phase 4) + Global Optimization (Phase 5) + Global Optimization (Phase 6) + Global Optimization (Phase 7) + Global Optimization (Phase 8) + Global Optimization (Phase 9) + Global Optimization (Phase 10) + Global Optimization (Phase 11) + Global Optimization (Phase 12) + Global Optimization (Phase 13) + Global Optimization (Phase 14) + Global Optimization (Phase 15) + Global Optimization (Phase 16) + Global Optimization (Phase 17) + Global Optimization (Phase 18) + Global Optimization (Phase 19) + Global Optimization (Phase 20) + Global Optimization (Phase 21) + Global Optimization (Phase 22) + Global Optimization (Phase 23) + Global Optimization (Phase 24) + Global Optimization (Phase 25) + Global Optimization (Phase 26) + Global Optimization (Phase 27) + Global Optimization (Phase 28) + Global Optimization (Phase 29) + Global Optimization (Phase 30) + + Beginning Isolate Ports + ----------------------- + + Beginning Delay Optimization + ---------------------------- + + TOTAL + ELAPSED WORST NEG SETUP DESIGN LEAKAGE + TIME AREA SLACK COST RULE COST ENDPOINT POWER + --------- --------- --------- --------- --------- ------------------------- --------- + 0:05:06 3759.7 0.00 0.0 0.0 0.4062 + 0:05:06 3759.7 0.00 0.0 0.0 0.4062 + 0:05:06 3759.7 0.00 0.0 0.0 0.4062 + 0:05:07 3759.7 0.00 0.0 0.0 0.4062 + + Beginning WLM Backend Optimization + -------------------------------------- +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[69]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[67]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[66]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[65]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[39]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[40]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[41]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[42]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[44]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[45]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[46]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[48]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[49]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[50]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[51]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[52]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[54]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[55]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[57]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[58]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[60]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[62]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[64]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) + 0:05:12 3652.0 0.00 0.0 0.0 0.3687 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + + + Beginning Leakage Power Optimization (max_leakage_power 0) + ------------------------------------ + + TOTAL + ELAPSED WORST NEG SETUP DESIGN LEAKAGE + TIME AREA SLACK COST RULE COST ENDPOINT POWER + --------- --------- --------- --------- --------- ------------------------- --------- + 0:05:13 3652.0 0.00 0.0 0.0 0.3610 + Global Optimization (Phase 31) + Global Optimization (Phase 32) + Global Optimization (Phase 33) + Global Optimization (Phase 34) + Global Optimization (Phase 35) + Global Optimization (Phase 36) + Global Optimization (Phase 37) + Global Optimization (Phase 38) + Global Optimization (Phase 39) + Global Optimization (Phase 40) + Global Optimization (Phase 41) + 0:05:13 3651.0 0.00 0.0 0.0 0.3609 + 0:05:13 3651.0 0.00 0.0 0.0 0.3609 + 0:05:13 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + 0:05:14 3651.0 0.00 0.0 0.0 0.3609 + + TOTAL + ELAPSED WORST NEG SETUP DESIGN LEAKAGE + TIME AREA SLACK COST RULE COST ENDPOINT POWER + --------- --------- --------- --------- --------- ------------------------- --------- + 0:05:14 3122.9 0.00 0.0 0.0 0.3480 + 0:05:15 3456.3 0.00 0.0 0.0 0.5263 + 0:05:15 3456.3 0.00 0.0 0.0 0.5263 + 0:05:15 3456.3 0.00 0.0 0.0 0.5263 + 0:05:16 3127.6 0.00 0.0 0.0 0.3656 + 0:05:18 3124.0 0.00 0.0 0.0 0.3642 + 0:05:18 3124.0 0.00 0.0 0.0 0.3642 + 0:05:18 3124.0 0.00 0.0 0.0 0.3642 + 0:05:18 3124.0 0.00 0.0 0.0 0.3642 + 0:05:18 3080.6 0.00 0.0 0.0 0.3461 +Loading db file '/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db' +Loading db file '/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/rf2_32x128_wm1_ss_0p81v_0p81v_125c.db' + + +Note: Symbol # after min delay cost means estimated hold TNS across all active scenarios + + + Optimization Complete + --------------------- +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Information: State dependent leakage is now switched from off to on. +Information: Propagating switching activity (low effort zero delay simulation). (PWR-6) +Warning: Design has unannotated black box outputs. (PWR-428) +1 +ungroup -all -flatten +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___7'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___6'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___5'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___4'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___3'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___2'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___1'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Error: Width mismatch on port 'WENB' of reference to 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-3) +Warning: Unable to resolve reference 'rf2_32x128_wm1' in 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0'. (LINK-5) +Information: Updating graph... (UID-83) +Warning: Design 'Vortex' inherited license information from design 'VX_warp_scheduler'. (DDB-74) +Information: Added key list 'DesignWare' to design 'Vortex'. (DDB-72) +1 +uniquify +1 +define_name_rules verilog -remove_internal_net_bus -remove_port_bus +1 +change_names -rule verilog -hierarchy +Warning: In the design Vortex, net 'vx_front_end/vx_fetch/warp_scheduler/warp_num[0]' is connecting multiple ports. (UCN-1) +Warning: In the design Vortex, net 'vx_back_end/vx_e_m_reg/f_d_reg/out[0]' is connecting multiple ports. (UCN-1) +1 +report_qor +Information: Updating design information... (UID-85) + +**************************************** +Report : qor +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 12:10:41 2019 +**************************************** + + + Timing Path Group 'clk' + ----------------------------------- + Levels of Logic: 33.00 + Critical Path Length: 2.03 + Critical Path Slack: 7.90 + Critical Path Clk Period: 10.00 + Total Negative Slack: 0.00 + No. of Violating Paths: 0.00 + Worst Hold Violation: 0.00 + Total Hold Violation: 0.00 + No. of Hold Violations: 0.00 + ----------------------------------- + + + Cell Count + ----------------------------------- + Hierarchical Cell Count: 0 + Hierarchical Port Count: 0 + Leaf Cell Count: 2087 + Buf/Inv Cell Count: 774 + Buf Cell Count: 129 + Inv Cell Count: 645 + CT Buf/Inv Cell Count: 0 + Combinational Cell Count: 1411 + Sequential Cell Count: 676 + Macro Count: 0 + ----------------------------------- + + + Area + ----------------------------------- + Combinational Area: 1259.711995 + Noncombinational Area: 1820.879967 + Buf/Inv Area: 397.386001 + Total Buffer Area: 83.59 + Total Inverter Area: 313.79 + Macro/Black Box Area: 0.000000 + Net Area: 0.000000 + ----------------------------------- + Cell Area: 3080.591962 + Design Area: 3080.591962 + + + Design Rules + ----------------------------------- + Total Number of Nets: 2403 + Nets With Violations: 0 + Max Trans Violations: 0 + Max Cap Violations: 0 + ----------------------------------- + + + Hostname: gtcad-srv3 + + Compile CPU Statistics + ----------------------------------------- + Resource Sharing: 32.35 + Logic Optimization: 47.09 + Mapping Optimization: 7.50 + ----------------------------------------- + Overall Compile Time: 291.47 + Overall Compile Wall Clock Time: 324.09 + + -------------------------------------------------------------------- + + Design WNS: 0.00 TNS: 0.00 Number of Violating Paths: 0 + + + Design (Hold) WNS: 0.00 TNS: 0.00 Number of Violating Paths: 0 + + -------------------------------------------------------------------- + + +1 +report_area + +**************************************** +Report : area +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 12:10:41 2019 +**************************************** + +Library(s) Used: + + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c (File: /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db) + +Number of ports: 461 +Number of nets: 2403 +Number of cells: 2330 +Number of combinational cells: 1395 +Number of sequential cells: 692 +Number of macros/black boxes: 0 +Number of buf/inv: 774 +Number of references: 18 + +Combinational area: 1259.711995 +Buf/Inv area: 397.386001 +Noncombinational area: 1820.879967 +Macro/Black Box area: 0.000000 +Net Interconnect area: 0.000000 + +Total cell area: 3080.591962 +Total area: 3080.591962 + +Information: This design contains black box (unknown) components. (RPT-8) +1 +report_hierarchy + +**************************************** +Report : hierarchy +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 12:10:41 2019 +**************************************** + +Warning: 1 unresolved references are not included in this report. (RPT-2) + +Attributes: + r - licensed design + +Vortex r + ADDF_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + ADDH_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + AND2_X0P5B_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + AO22_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + BUF_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + DFFQL_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + INV_X0P6B_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + INV_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + INV_X1P2M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + INV_X1P4M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + LATQ_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + NOR2B_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + NOR2XB_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + TIEHI_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + TIELO_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + XOR2_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + XOR3_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c +1 +report_cell + +**************************************** +Report : cell +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 12:10:41 2019 +**************************************** + +Attributes: + b - black box (unknown) + h - hierarchical + mo - map_only + n - noncombinational + r - removable + so - sizing only + u - contains unmapped logic + +Cell Reference Library Area Attributes +-------------------------------------------------------------------------------- +U5 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_U1 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_U2 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_gpr_stage_reg_U1 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_70_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_173_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_174_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_175_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_176_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_177_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_178_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_179_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_180_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_181_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_182_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_0_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_1_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_2_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_3_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_4_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_5_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_6_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_7_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_8_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_9_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_10_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_11_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_12_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_13_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_14_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_15_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_16_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_17_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_18_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_19_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_20_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_21_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_22_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_23_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_24_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_25_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_26_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_27_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_28_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_29_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_30_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_31_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_32_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_33_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_34_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_35_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_36_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_37_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_38_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_39_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_40_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_41_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_42_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_43_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_44_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_45_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_46_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_47_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_48_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_49_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_50_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_51_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_52_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_53_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_54_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_55_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_56_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_57_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_58_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_59_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_60_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_61_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_62_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_63_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_64_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_65_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_66_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_67_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_68_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_69_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_70_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_71_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_72_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_73_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_74_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_75_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_76_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_77_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_78_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_79_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_80_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_81_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_82_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_83_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_84_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_85_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_86_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_87_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_88_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_89_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_90_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_91_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_92_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_93_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_94_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_95_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_96_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_97_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_98_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_99_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_100_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_101_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_102_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_103_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_104_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_105_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_106_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_107_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_108_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_109_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_110_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_111_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_112_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_113_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_114_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_115_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_116_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_117_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_118_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_119_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_120_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_121_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_122_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_123_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_124_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_125_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_126_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_127_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_128_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_129_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_130_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_131_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_132_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_133_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_134_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_135_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_136_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_137_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_138_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_139_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_140_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_141_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_142_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_143_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_144_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_145_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_146_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_147_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_148_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_149_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_150_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_151_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_152_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_153_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_154_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_155_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_156_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_157_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_158_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_159_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_160_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_161_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_162_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_163_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_164_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_165_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_166_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_167_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_168_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_169_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_170_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_171_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_172_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_173_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_174_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_175_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_176_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_177_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_178_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_179_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_180_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_181_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_182_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_183_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_184_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_185_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_186_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_187_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_188_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_189_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_190_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_191_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_192_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_193_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_194_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_195_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_196_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_197_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_198_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_199_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_200_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_201_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_202_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_203_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_204_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_205_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_206_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_207_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_208_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_209_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_210_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_211_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_212_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_213_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_214_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_215_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_216_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_217_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_218_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_219_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_220_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_221_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_222_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_223_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_224_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_225_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_226_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_227_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_228_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_229_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_230_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_231_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_232_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_233_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_234_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_235_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_236_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_237_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_238_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_239_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_240_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_241_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_242_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_243_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_244_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_245_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_246_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_247_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_248_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_249_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_250_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_251_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_252_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_253_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_254_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_255_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U2 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U3 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U4 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U5 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U6 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U7 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U8 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U9 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U10 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U11 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U12 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U13 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U14 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U15 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U16 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U17 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U18 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U19 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U20 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U21 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U22 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U23 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U24 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U25 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U26 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U27 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U28 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U29 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U30 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U31 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U32 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U33 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U34 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U35 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U36 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U37 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U38 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U39 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U40 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U41 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U42 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U43 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U44 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U45 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U46 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U47 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U48 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U49 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U50 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U51 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U52 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U53 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U54 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U55 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U56 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U57 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U58 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U59 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U60 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U61 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U62 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U63 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U64 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U65 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U66 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U67 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U68 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U69 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U70 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U71 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U72 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U73 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U74 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U75 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U76 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U77 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U78 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U79 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U80 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U81 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U82 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U83 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U84 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U85 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U86 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U87 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U88 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U89 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U90 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U91 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U92 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U93 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U94 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U95 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U96 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U97 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U98 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U99 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U100 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U101 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U102 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U103 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U104 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U105 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U106 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U107 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U108 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U109 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U110 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U111 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U112 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U113 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U114 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U115 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U116 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U117 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U118 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U119 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U120 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U121 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U122 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U123 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U124 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U125 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U126 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U127 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U128 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U129 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U130 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U131 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U132 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U133 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U134 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U135 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U136 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U137 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U138 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U139 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U140 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U141 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U142 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U143 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U144 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U145 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U146 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U147 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U148 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U149 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U150 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U151 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U152 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U153 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U155 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U161 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U167 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U173 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U179 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U185 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U191 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U197 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U203 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U209 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U215 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U221 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U227 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U233 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U239 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U245 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U251 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U257 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U263 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U269 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U275 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U281 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U287 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U293 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U299 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U305 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U311 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U317 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U323 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U329 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U335 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U341 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U347 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U353 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U359 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U365 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U371 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U377 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U383 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U389 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U395 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U401 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U407 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U413 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U419 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U425 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U431 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U437 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U443 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U449 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U455 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U461 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U467 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U473 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U479 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U485 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U491 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U497 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U503 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U509 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U515 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U521 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U527 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U533 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U539 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U545 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U551 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U557 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U563 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U569 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U575 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U581 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U587 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U593 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U599 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U605 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U611 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U617 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U623 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U629 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U635 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U641 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U647 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U653 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U659 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U665 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U671 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U677 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U683 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U689 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U695 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U701 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U707 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U713 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U719 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U725 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U731 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U737 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U743 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U749 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U755 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U761 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U767 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U773 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U779 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U785 + AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_0__vx_gpr_first_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_0__vx_gpr_second_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_1__vx_gpr_first_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_1__vx_gpr_second_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_2__vx_gpr_first_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_2__vx_gpr_second_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_3__vx_gpr_first_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_3__vx_gpr_second_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_4__vx_gpr_first_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_4__vx_gpr_second_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_5__vx_gpr_first_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_5__vx_gpr_second_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_6__vx_gpr_first_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_6__vx_gpr_second_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_7__vx_gpr_first_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_7__vx_gpr_second_ram + rf2_32x128_wm1 0.000000 b, so +vx_back_end_vx_e_m_reg_U2 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U3 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U4 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U5 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U6 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U7 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U8 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U9 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U10 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U11 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U12 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U13 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U14 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U15 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U16 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U17 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U18 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U19 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U20 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U21 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U22 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U23 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U24 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U25 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U26 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U27 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U28 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U29 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U30 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U31 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U32 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U33 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U34 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U35 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U36 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U37 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U38 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U39 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U40 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U41 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U42 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U43 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U44 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U45 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U46 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U47 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U48 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U49 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U50 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U51 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U52 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U53 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U54 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U55 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U56 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U57 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U58 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U59 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U60 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U61 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U62 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U63 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U64 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U65 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U66 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U67 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U68 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U69 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U70 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U71 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U72 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U73 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U74 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U75 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U76 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U77 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U78 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U79 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U80 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U81 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U82 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U83 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U84 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U85 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U86 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U87 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U88 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U89 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U90 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U91 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U92 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U93 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U94 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U95 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U96 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U97 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U98 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U99 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U100 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U101 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U102 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U103 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U104 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U105 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U106 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U107 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U108 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U109 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U110 + NOR2XB_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U111 + NOR2XB_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U112 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U113 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U114 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U115 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U116 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U117 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U118 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U119 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U120 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U121 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U122 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U123 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U124 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U125 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U126 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U127 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U128 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U129 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U130 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U131 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U132 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U133 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U134 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U135 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U136 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U137 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U138 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U139 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U140 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U141 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U142 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U143 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U144 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U145 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U146 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U147 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U148 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U149 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U150 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U151 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U152 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U153 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U154 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U155 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U156 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U157 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U158 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U159 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U160 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U161 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U162 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U163 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U164 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U165 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U166 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U167 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U168 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U169 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U170 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U171 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U172 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U173 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U174 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U175 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U176 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U177 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U178 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U179 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U180 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U181 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U182 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U183 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U184 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U185 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U186 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U187 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U188 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U189 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U190 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U191 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U192 + INV_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_e_m_reg_f_d_reg_U193 + INV_X1P2M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U194 + INV_X1P4M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U195 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U196 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_e_m_reg_f_d_reg_U197 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U198 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U199 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U200 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U201 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U202 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U203 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U204 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U205 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U206 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U207 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U208 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U209 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U210 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U211 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U212 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U213 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U214 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U215 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U216 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U217 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U218 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U219 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U220 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U221 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U222 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U223 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U224 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U225 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U226 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U227 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U228 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U229 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U230 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U231 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U232 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U233 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U234 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U235 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U236 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U237 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U238 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U239 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U240 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U241 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U242 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U243 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U244 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U245 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U246 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U247 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U248 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U249 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U250 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U251 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U252 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U253 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U254 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U255 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U256 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U257 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U258 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U259 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U260 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U261 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U262 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U263 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U264 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U265 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U266 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U267 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U268 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U269 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U270 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U271 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U272 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U273 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U274 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U275 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U276 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U277 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U278 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U279 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U280 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U281 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U282 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U283 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U284 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U285 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U286 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U287 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U288 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U289 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U290 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U291 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U292 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U293 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U294 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U295 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U296 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U297 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U298 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U299 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U300 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U301 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U302 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U303 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U304 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U305 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U306 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U307 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U308 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U309 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U310 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U311 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U312 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U313 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U314 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U315 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_10_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_11_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_12_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_13_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_15_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_16_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_17_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_19_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_20_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_21_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_22_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_23_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_25_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_26_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_28_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_29_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_31_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_33_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_35_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_36_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_37_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_38_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_40_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_41_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_76_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_106_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_107_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_108_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_109_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_110_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_111_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_112_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_113_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_114_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_115_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_116_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_117_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_118_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_119_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_120_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_121_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_122_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_123_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_124_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_125_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_126_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_127_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_128_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_129_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_130_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_131_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_132_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_133_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_134_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_135_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_136_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_137_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_138_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_139_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_140_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_141_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_142_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_143_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_144_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_145_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_146_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_147_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_148_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_149_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_150_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_151_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_152_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_153_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_154_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_155_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_156_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_157_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_158_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_159_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_160_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_161_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_162_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_163_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_164_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_165_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_166_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_167_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_168_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_169_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_170_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_171_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_172_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_173_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_174_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_175_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_176_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_177_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_178_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_179_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_180_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_181_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_182_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_183_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_184_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_185_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_186_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_187_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_188_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_189_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_190_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_191_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_192_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_193_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_194_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_195_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_196_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_197_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_198_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_199_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_200_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_201_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_202_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_203_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_204_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_205_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_206_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_207_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_208_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_209_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_210_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_211_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_212_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_213_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_214_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_215_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_216_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_217_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_218_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_219_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_220_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_221_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_222_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_223_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_224_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_225_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_226_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_227_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_228_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_229_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_230_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_231_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_232_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_233_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_234_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_235_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_236_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_237_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_238_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_239_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_240_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_241_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_242_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_243_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_246_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_247_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_248_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_249_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_250_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_251_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_252_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_253_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_254_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_255_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_256_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_257_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_258_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_259_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_260_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_261_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_262_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_263_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_264_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_265_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_266_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_267_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_268_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_269_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_270_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_271_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_272_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_273_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_274_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_275_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_276_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_277_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_278_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_279_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_280_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_281_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_282_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_283_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_284_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_285_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_286_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_287_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_288_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_289_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_290_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_291_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_292_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_293_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_294_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_295_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_296_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_297_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_298_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_299_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_300_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_301_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_302_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_303_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_304_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_305_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_306_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_307_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_308_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_309_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_310_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_311_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_312_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_313_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_314_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_315_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_316_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_317_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_318_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_319_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_320_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_321_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_322_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_323_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_324_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_325_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_326_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_327_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_328_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_329_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_330_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_331_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_332_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_333_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_334_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_335_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_336_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_337_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_338_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_339_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_340_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_341_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_342_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_343_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_344_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_345_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_346_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_347_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_348_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_349_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_350_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_351_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_352_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_353_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_354_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_355_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_356_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_357_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_358_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_359_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_360_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_361_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_362_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_363_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_364_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_365_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_366_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_367_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_368_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_369_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_370_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_371_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_372_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_373_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_374_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_375_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_376_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_377_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_378_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_379_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_380_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_381_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_382_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_383_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_384_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_385_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_386_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_387_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_388_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_389_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_390_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_391_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_392_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_393_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_394_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_395_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_396_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_397_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_398_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_399_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_400_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_401_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_402_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_403_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_404_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_405_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_406_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_407_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_408_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_409_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_410_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_411_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_412_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_413_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_414_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_415_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_416_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_418_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_419_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_420_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_421_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_423_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_424_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_425_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_427_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_428_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_429_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_430_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_431_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_433_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_434_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_436_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_437_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_439_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_441_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_443_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_444_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_445_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_446_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_448_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_449_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_451_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_453_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_455_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_457_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_execute_U3 XOR3_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.430000 +vx_back_end_vx_execute_U4 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J9_122_2672_U32 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_U3 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_0__vx_alu_U4 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_0__vx_alu_U5 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_0__vx_alu_U6 + AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J9_122_2672_U32 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_U3 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_1__vx_alu_U4 + AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_execute_genblk1_1__vx_alu_U5 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_1__vx_alu_U6 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J9_122_2672_U32 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_U3 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_2__vx_alu_U4 + AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_execute_genblk1_2__vx_alu_U5 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_2__vx_alu_U6 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J9_122_2672_U32 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_U3 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_3__vx_alu_U4 + AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_execute_genblk1_3__vx_alu_U5 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_3__vx_alu_U6 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_intadd_0_U2 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U32 + ADDH_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.782000 mo, r +vx_back_end_vx_writeback_U1 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U2 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U3 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U4 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U5 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U6 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U7 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U8 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U9 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U10 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U11 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U12 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U13 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U14 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U15 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U16 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U17 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U18 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U19 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U20 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U21 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U22 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U23 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U24 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U25 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U26 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U27 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U28 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U29 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U30 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U31 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U32 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U33 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U34 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U35 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U36 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U37 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U38 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U39 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U40 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U41 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U42 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U43 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U44 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U45 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U46 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U47 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U48 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U49 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U50 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U51 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U52 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U53 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U54 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U55 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U56 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U57 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U58 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U59 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U60 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U61 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U62 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U63 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U64 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U65 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U66 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U67 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U68 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U69 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U70 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U71 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U72 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U73 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U74 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U75 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U76 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U77 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U78 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U79 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U80 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U81 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U82 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U83 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U84 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U85 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U86 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U87 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U88 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U89 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U90 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U91 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U92 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U93 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U94 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U95 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U96 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U97 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U98 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U99 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U100 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U101 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U102 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U103 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U104 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U105 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U106 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U107 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U108 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U109 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U110 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U111 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U112 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U113 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U114 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U115 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U116 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U117 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U118 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U119 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U120 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U121 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U122 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U123 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U124 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U125 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U126 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U127 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U128 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U292 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U293 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U294 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U295 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U296 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U297 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U298 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U299 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U300 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U301 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U302 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U303 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U304 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U305 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U306 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U307 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U308 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U309 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U310 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U311 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U312 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U313 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U314 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U315 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U316 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U317 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U318 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U319 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U320 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U321 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U322 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U323 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U324 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U325 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U326 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U327 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U328 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U329 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U330 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U331 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U332 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U333 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U334 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U335 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U336 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U337 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U338 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U339 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U340 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U341 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U342 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U343 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U344 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U345 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U346 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U347 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U348 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U349 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U350 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U351 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U352 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U353 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U354 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U355 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U356 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U357 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U358 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U359 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U360 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U361 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U362 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U363 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U364 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U365 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U366 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U367 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U368 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U369 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U370 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U371 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U372 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U373 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U374 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U375 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U376 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U377 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U378 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U379 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U380 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U381 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U382 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U383 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U384 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U385 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U386 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U387 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U388 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U389 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U390 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U391 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U392 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U393 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U394 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U395 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U396 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U397 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U398 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U399 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U400 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U401 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U402 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U403 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U404 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U405 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U406 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U407 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U408 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U409 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U410 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U411 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U412 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U413 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U414 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U415 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U416 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U417 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U418 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U419 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U2 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U3 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U4 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U5 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U6 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U7 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U8 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U9 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U10 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U11 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U12 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U13 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U14 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U15 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U16 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U17 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U18 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U19 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U20 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U21 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U22 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U23 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U24 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U25 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U26 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U27 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U28 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U29 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U30 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U31 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U32 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U33 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U34 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U35 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U36 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U37 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U38 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U39 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U40 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U41 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U42 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U43 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U44 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U45 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U46 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U47 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U48 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U49 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U50 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U51 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U52 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U53 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U54 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U55 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U56 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U57 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U58 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U59 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U60 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U61 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U62 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U63 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U64 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U65 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U66 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U67 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U68 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U69 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U70 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U71 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U72 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U73 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U74 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U75 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U76 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U77 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U78 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U79 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U80 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U81 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U82 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U83 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U84 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U85 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U86 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U87 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U88 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U89 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U90 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U91 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U92 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U93 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U94 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U95 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U96 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U97 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U98 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U99 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U100 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U101 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U102 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U103 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U104 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U105 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U106 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U107 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U108 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U109 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U110 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U111 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U112 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U113 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U114 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U115 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U116 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U117 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U118 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U119 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U120 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U121 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U122 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U123 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U124 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U125 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U126 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U127 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U128 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U129 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1644 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1645 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1646 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1647 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1648 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1649 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1650 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1651 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1652 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1653 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1654 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1655 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1656 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1657 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1658 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1659 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1660 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1661 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1662 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1663 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1664 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1665 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1666 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1667 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1668 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1669 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1670 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1671 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1672 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1673 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1674 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1675 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1676 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1677 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1678 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1679 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1680 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1681 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1682 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1683 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1684 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1685 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1686 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1687 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1688 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1689 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1690 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1691 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1692 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1693 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1694 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1695 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1696 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1697 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1698 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1699 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1700 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1701 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1702 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1703 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1704 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1705 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1706 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1707 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1708 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1709 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1710 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1711 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1712 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1713 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1714 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1715 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1716 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1717 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1718 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1719 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1720 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1721 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1722 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1723 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1724 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1725 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1726 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1727 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1728 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1729 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1730 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1731 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1732 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1733 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1734 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1735 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1736 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1737 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1738 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1739 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1740 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1741 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1742 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1743 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1744 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1745 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1746 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1747 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1748 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1749 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1750 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1751 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1752 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1753 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1754 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1755 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1756 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1757 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1758 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1759 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1760 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1761 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1762 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1763 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1764 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1765 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1766 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1767 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1768 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1769 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1770 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1771 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1772 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1773 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1774 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1775 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1776 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1777 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1778 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1779 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1780 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1781 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1782 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1783 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1784 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1785 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1786 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1787 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1788 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1789 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1790 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1791 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1792 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1793 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1794 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1795 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1796 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1797 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1798 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1799 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1800 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1801 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1802 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1803 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1804 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1805 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1806 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1807 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1808 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1809 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1810 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1811 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1812 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1813 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1814 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1815 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1816 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1817 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1818 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1819 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1820 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1821 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1822 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1823 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1824 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1825 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1826 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1827 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1828 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1829 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1830 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1831 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1832 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1833 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1834 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1835 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1836 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1837 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1838 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1839 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1840 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1841 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1842 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1843 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1844 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1845 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1846 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1847 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1848 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1849 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1850 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1851 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1852 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1853 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1854 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1855 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1856 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1857 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1858 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1859 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1860 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1861 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1862 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1863 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1864 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1865 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1866 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1867 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1868 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1869 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1870 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1871 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1872 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1873 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1874 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1875 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1876 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1877 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1878 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1879 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1880 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1881 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1882 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1883 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1884 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1885 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1886 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1887 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1888 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1889 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1890 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1891 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1892 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1893 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1894 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1895 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1896 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1897 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1898 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1899 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_front_end_U2 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_d_e_reg_U1 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_d_e_reg_d_e_reg_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_d_e_reg_d_e_reg_U4 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_127_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_173_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_174_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_175_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_176_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_177_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_178_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_179_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_180_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_181_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_182_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_decode_U3 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_decode_U4 TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_decode_temp_branch_type_reg_0_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_branch_type_reg_1_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_branch_type_reg_2_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_0_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_1_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_2_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_3_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_4_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_5_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_6_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_7_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_8_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_9_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_10_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_11_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_12_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_13_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_14_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_15_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_16_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_17_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_18_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_19_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_20_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_21_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_22_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_23_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_24_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_25_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_26_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_27_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_28_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_29_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_30_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_31_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_reg + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_f_d_reg_U2 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_f_d_reg_f_d_reg_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_fetch_warp_scheduler_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +-------------------------------------------------------------------------------- +Total 2087 cells 3080.591962 +1 +report_reference + +**************************************** +Report : reference +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 12:10:41 2019 +**************************************** + +Attributes: + b - black box (unknown) + bo - allows boundary optimization + d - dont_touch + mo - map_only + h - hierarchical + n - noncombinational + r - removable + s - synthetic operator + u - contains unmapped logic + +Reference Library Unit Area Count Total Area Attributes +----------------------------------------------------------------------------- +ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 150 413.099992 r +ADDH_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.782000 1 1.782000 r +AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 4 3.240000 +AO22_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 128 165.888000 +BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 129 83.592000 +DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 640 1762.559967 n +INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 642 312.012001 +INV_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 1 0.486000 +INV_X1P2M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 1 0.648000 +INV_X1P4M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 1 0.648000 +LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 36 58.320000 n +NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 305 247.050001 +NOR2XB_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 2 1.620000 +TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 2 1.296000 +TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 16 10.368000 +XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 12 15.552000 +XOR3_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.430000 1 2.430000 +rf2_32x128_wm1 0.000000 16 0.000000 b +----------------------------------------------------------------------------- +Total 18 references 3080.591962 +1 +report_port + +**************************************** +Report : port +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 12:10:41 2019 +**************************************** + + + +Attributes: + i - ideal_network + + Pin Wire Max Max Connection +Port Dir Load Load Trans Cap Class Attrs +-------------------------------------------------------------------------------- +clk in 0.0000 0.0000 -- -- -- i +icache_response_instruction_0_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_1_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_2_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_3_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_4_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_5_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_6_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_7_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_8_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_9_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_10_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_11_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_12_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_13_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_14_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_15_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_16_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_17_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_18_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_19_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_20_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_21_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_22_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_23_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_24_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_25_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_26_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_27_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_28_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_29_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_30_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_31_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__0_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__1_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__2_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__3_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__4_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__5_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__6_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__7_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__8_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__9_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__10_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__11_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__12_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__13_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__14_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__15_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__16_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__17_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__18_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__19_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__20_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__21_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__22_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__23_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__24_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__25_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__26_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__27_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__28_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__29_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__30_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__31_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__0_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__1_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__2_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__3_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__4_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__5_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__6_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__7_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__8_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__9_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__10_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__11_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__12_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__13_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__14_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__15_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__16_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__17_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__18_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__19_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__20_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__21_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__22_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__23_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__24_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__25_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__26_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__27_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__28_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__29_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__30_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__31_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__0_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__1_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__2_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__3_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__4_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__5_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__6_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__7_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__8_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__9_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__10_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__11_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__12_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__13_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__14_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__15_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__16_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__17_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__18_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__19_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__20_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__21_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__22_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__23_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__24_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__25_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__26_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__27_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__28_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__29_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__30_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__31_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_3__0_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_3__1_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_3__2_ + in 0.0000 0.0000 -- -- -- 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+out_cache_driver_in_data_1__29_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_1__30_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_1__31_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__3_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__4_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__5_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__6_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__7_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__8_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__9_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__10_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__11_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__12_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__13_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__14_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__15_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__16_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__17_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__18_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__19_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__20_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__21_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__22_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__23_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__24_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__25_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__26_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__27_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__28_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__29_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__30_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__31_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__3_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__4_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__5_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__6_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__7_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__8_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__9_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__10_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__11_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__12_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__13_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__14_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__15_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__16_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__17_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__18_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__19_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__20_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__21_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__22_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__23_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__24_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__25_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__26_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__27_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__28_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__29_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__30_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__31_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_read_0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_read_1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_read_2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_write_0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_write_1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_write_2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_valid_0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_valid_1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_valid_2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_valid_3_ + out 0.0000 0.0000 -- -- -- +out_ebreak out 0.0000 0.0000 -- -- -- + +1 +write -hierarchy -format verilog -output Vortex.netlist.v +Writing verilog file '/nethome/dshim8/Desktop/vortexGPU/191017_vortex/Vortex/syn/Vortex.netlist.v'. +Warning: Verilog 'assign' or 'tran' statements are written out. (VO-4) +1 +remove_ideal_network [get_ports clk] +1 +set_propagated_clock [get_ports clk] +Information: set_input_delay values are added to the propagated clock skew. (TIM-113) +1 +write_sdc -version 1.9 Vortex.sdc +1 +exit + +Thank you... From a4d6ada16df9b49645f0d75da749f908788b18e9 Mon Sep 17 00:00:00 2001 From: Lingjun Zhu Date: Thu, 17 Oct 2019 14:18:52 -0400 Subject: [PATCH 2/4] Fixed the issues of memory during synthesis --- rtl/VX_gpr.v | 2 +- syn/syn.tcl | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/rtl/VX_gpr.v b/rtl/VX_gpr.v index b096a953..694126f9 100644 --- a/rtl/VX_gpr.v +++ b/rtl/VX_gpr.v @@ -48,7 +48,7 @@ module VX_gpr ( // .q1 (out_b_reg_data) // ); - // wire[127:0] write_bit_mask = {{32{~(VX_writeback_inter.wb_valid[3])}}, {32{~(VX_writeback_inter.wb_valid[2])}}, {32{~(VX_writeback_inter.wb_valid[1])}}, {32{~(VX_writeback_inter.wb_valid[0])}}}; + wire[127:0] write_bit_mask = {{32{~(VX_writeback_inter.wb_valid[3])}}, {32{~(VX_writeback_inter.wb_valid[2])}}, {32{~(VX_writeback_inter.wb_valid[1])}}, {32{~(VX_writeback_inter.wb_valid[0])}}}; /* verilator lint_off PINCONNECTEMPTY */ rf2_32x128_wm1 first_ram ( .CENYA(), diff --git a/syn/syn.tcl b/syn/syn.tcl index b4cb37c4..0ce1b74c 100755 --- a/syn/syn.tcl +++ b/syn/syn.tcl @@ -1,5 +1,5 @@ set search_path [concat /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/ /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/ ../rtl/ ../rtl/interfaces ../rtl/pipe_regs] -set link_library [concat * sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db rf2_32_128_wm1_ss_0p81v_0p81v_125c.db dw_foundation.sldb] +set link_library [concat * sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db rf2_32x128_wm1_ss_0p81v_0p81v_125c.db dw_foundation.sldb] set symbol_library {} set target_library [concat sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db] From d164ebfbc66b7d88a03942ce15bb0dc9de4fe1c8 Mon Sep 17 00:00:00 2001 From: Lingjun Zhu Date: Thu, 17 Oct 2019 14:25:54 -0400 Subject: [PATCH 3/4] Added log file of synthesis, too many registers are removed --- syn/dc.log | 22143 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 22143 insertions(+) create mode 100644 syn/dc.log diff --git a/syn/dc.log b/syn/dc.log new file mode 100644 index 00000000..bee40d17 --- /dev/null +++ b/syn/dc.log @@ -0,0 +1,22143 @@ + + Design Compiler Graphical + DC Ultra (TM) + DFTMAX (TM) + Power Compiler (TM) + DesignWare (R) + DC Expert (TM) + Design Vision (TM) + HDL Compiler (TM) + VHDL Compiler (TM) + DFT Compiler + Design Compiler(R) + + Version O-2018.06-SP4 for linux64 - Nov 27, 2018 + + Copyright (c) 1988 - 2018 Synopsys, Inc. + This software and the associated documentation are proprietary to Synopsys, + Inc. This software may only be used in accordance with the terms and conditions + of a written license agreement with Synopsys, Inc. All other use, reproduction, + or distribution of this software is strictly prohibited. +Initializing... +set search_path [concat /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/ /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/ ../rtl/ ../rtl/interfaces ../rtl/pipe_regs] +/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/ /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/ ../rtl/ ../rtl/interfaces ../rtl/pipe_regs +set link_library [concat * sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db rf2_32x128_wm1_ss_0p81v_0p81v_125c.db dw_foundation.sldb] +* sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db rf2_32x128_wm1_ss_0p81v_0p81v_125c.db dw_foundation.sldb +set symbol_library {} +set target_library [concat sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db] +sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db +set verilog_files [ list VX_alu.v VX_back_end.v VX_gpr_stage.v VX_gpr_data_inter.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_scheduler.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_memory.v VX_one_counter.v VX_priority_encoder.v VX_warp.v VX_warp_scheduler.v VX_writeback.v Vortex.v byte_enabled_simple_dual_port_ram.v VX_branch_response_inter.v VX_csr_write_request_inter.v VX_dcache_request_inter.v VX_dcache_response_inter.v VX_forward_csr_response_inter.v VX_forward_exe_inter.v VX_forward_mem_inter.v VX_forward_reqeust_inter.v VX_forward_response_inter.v VX_forward_wb_inter.v VX_frE_to_bckE_req_inter.v VX_gpr_clone_inter.v VX_gpr_jal_inter.v VX_gpr_read_inter.v VX_gpr_wspawn_inter.v VX_icache_request_inter.v VX_icache_response_inter.v VX_inst_mem_wb_inter.v VX_inst_meta_inter.v VX_jal_response_inter.v VX_mem_req_inter.v VX_mw_wb_inter.v VX_warp_ctl_inter.v VX_wb_inter.v VX_d_e_reg.v VX_e_m_reg.v VX_f_d_reg.v VX_m_w_reg.v ] +VX_alu.v VX_back_end.v VX_gpr_stage.v VX_gpr_data_inter.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_scheduler.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_memory.v VX_one_counter.v VX_priority_encoder.v VX_warp.v VX_warp_scheduler.v VX_writeback.v Vortex.v byte_enabled_simple_dual_port_ram.v VX_branch_response_inter.v VX_csr_write_request_inter.v VX_dcache_request_inter.v VX_dcache_response_inter.v VX_forward_csr_response_inter.v VX_forward_exe_inter.v VX_forward_mem_inter.v VX_forward_reqeust_inter.v VX_forward_response_inter.v VX_forward_wb_inter.v VX_frE_to_bckE_req_inter.v VX_gpr_clone_inter.v VX_gpr_jal_inter.v VX_gpr_read_inter.v VX_gpr_wspawn_inter.v VX_icache_request_inter.v VX_icache_response_inter.v VX_inst_mem_wb_inter.v VX_inst_meta_inter.v VX_jal_response_inter.v VX_mem_req_inter.v VX_mw_wb_inter.v VX_warp_ctl_inter.v VX_wb_inter.v VX_d_e_reg.v VX_e_m_reg.v VX_f_d_reg.v VX_m_w_reg.v +analyze -format sverilog $verilog_files +Running PRESTO HDLC +Compiling source file ../rtl/VX_alu.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_back_end.v +Compiling source file ../rtl/VX_gpr_stage.v +Compiling source file ../rtl/interfaces/VX_gpr_data_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_data_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/VX_csr_handler.v +Compiling source file ../rtl/VX_decode.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_csr_handler.v:34: The statements in initial blocks are ignored. (VER-281) +Compiling source file ../rtl/VX_define.v +Compiling source file ../rtl/VX_execute.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_scheduler.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_fetch.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_scheduler.v:18: The statements in initial blocks are ignored. (VER-281) +Compiling source file ../rtl/VX_forwarding.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_front_end.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_generic_register.v +Compiling source file ../rtl/VX_gpr.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_gpr_wrapper.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_memory.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/VX_one_counter.v +Compiling source file ../rtl/VX_priority_encoder.v +Compiling source file ../rtl/VX_warp.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_warp.v:29: The construct 'declaration initial assignment' is not supported in synthesis; it is ignored. (VER-708) +Compiling source file ../rtl/VX_warp_scheduler.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_warp.v:30: The statements in initial blocks are ignored. (VER-281) +Compiling source file ../rtl/VX_writeback.v +Opening include file ../rtl//VX_define.v +Warning: ../rtl/VX_warp_scheduler.v:73: The statements in initial blocks are ignored. (VER-281) +Compiling source file ../rtl/Vortex.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/byte_enabled_simple_dual_port_ram.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/interfaces/VX_branch_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Warning: ../rtl/byte_enabled_simple_dual_port_ram.v:21: The statements in initial blocks are ignored. (VER-281) +Information: ../rtl/interfaces/VX_branch_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_csr_write_request_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_csr_write_request_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_dcache_request_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_dcache_request_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_dcache_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_dcache_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_csr_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_csr_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_exe_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_exe_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_mem_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_mem_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_reqeust_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_reqeust_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_forward_wb_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_forward_wb_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_frE_to_bckE_req_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_frE_to_bckE_req_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_gpr_clone_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_clone_inter.v:9: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_gpr_jal_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_jal_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_gpr_read_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_read_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_gpr_wspawn_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_gpr_wspawn_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_icache_request_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_icache_request_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_icache_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_icache_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_inst_mem_wb_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_inst_mem_wb_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_inst_meta_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_inst_meta_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_jal_response_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_jal_response_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_mem_req_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_mem_req_inter.v:7: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_mw_wb_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_mw_wb_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_warp_ctl_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_warp_ctl_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/interfaces/VX_wb_inter.v +Opening include file ../rtl/interfaces/../VX_define.v +Information: ../rtl/interfaces/VX_wb_inter.v:8: List () of one, unnamed, port is ignored. (VER-988) +Compiling source file ../rtl/pipe_regs/VX_d_e_reg.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/pipe_regs/VX_e_m_reg.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/pipe_regs/VX_f_d_reg.v +Opening include file ../rtl//VX_define.v +Compiling source file ../rtl/pipe_regs/VX_m_w_reg.v +Opening include file ../rtl//VX_define.v +Presto compilation completed successfully. +Loading db file '/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db' +Loading db file '/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/rf2_32x128_wm1_ss_0p81v_0p81v_125c.db' +Loading db file '/tools/synopsys/synthesis/syn/O-2018.06-SP4/libraries/syn/dw_foundation.sldb' +1 +elaborate Vortex +Loading db file '/tools/synopsys/synthesis/syn/O-2018.06-SP4/libraries/syn/gtech.db' +Loading db file '/tools/synopsys/synthesis/syn/O-2018.06-SP4/libraries/syn/standard.sldb' + Loading link library 'sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c' + Loading link library 'rf_2p_hce_ss_0p81v_0p81v_125c' + Loading link library 'gtech' +Running PRESTO HDLC +Presto compilation completed successfully. +Elaborated 1 design. +Current design is now 'Vortex'. +Information: Building the design 'VX_front_end' instantiated from design 'Vortex' with + the parameters "|((N%clk%)(N%reset%)(N%VX_warp_ctl%I%WORK/VX_warp_ctl_inter%%)(N%forwarding_fwd_stall%)(N%execute_branch_stall%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%decode_csr_address%)(N%memory_delay%)(N%fetch_delay%)(N%schedule_delay%)(N%icache_response_fe%I%WORK/VX_icache_response_inter%%)(N%icache_request_fe%I%WORK/VX_icache_request_inter%%)(N%VX_jal_rsp%I%WORK/VX_jal_response_inter%%)(N%VX_branch_rsp%I%WORK/VX_branch_response_inter%%)(N%fetch_ebreak%)(N%in_gpr_stall%))". (HDL-193) +Presto compilation completed successfully. +Warning: Filename too long >255 chars. Renaming file: +'/home/gtcad9/lzhu308/work/projects/vortex/design/Vortex/syn/VX_FRONT_END_I_VX_WARP_CTL_VX_WARP_CTL_INTER__I_ICACHE_RESPONSE_FE_VX_ICACHE_RESPONSE_INTER__I_ICACHE_REQUEST_FE_VX_ICACHE_REQUEST_INTER__I_VX_JAL_RSP_VX_JAL_RESPONSE_INTER__I_VX_BRANCH_RSP_VX_BRANCH_RESPONSE_INTER__I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__.mr' +to +'/home/gtcad9/lzhu308/work/projects/vortex/design/Vortex/syn/VX_FRONT_END_I_VX_WARP_CTL_VX_WARP_CTL_INTER__I_ICACHE_RESPONSE_FE_VX_ICACHE_RESPONSE_INTER__I_ICACHE_REQUEST_FE_VX_ICACHE_REQUEST_INTER__I_VX_JAL_RSP_VX_JAL_RESPONSE_INTER__I_VX_BRANCH_RSP_VX_BRANCH_35FE527370C98E3C09E2E6E2555D7EE6F02ECB4FA9775364_000.mr' +Information: Building the design 'VX_scheduler' instantiated from design 'Vortex' with + the parameters "|((N%clk%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%schedule_delay%))". (HDL-193) + +Inferred memory devices in process + in routine VX_scheduler_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__ line 44 in file + '../rtl/VX_scheduler.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| rename_table_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | +=============================================================================== +Statistics for MUX_OPs +================================================================================================================================ +| block name/line | Inputs | Outputs | # sel inputs | +================================================================================================================================ +| VX_scheduler_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__/30 | 32 | 1 | 5 | +| VX_scheduler_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__/31 | 32 | 1 | 5 | +================================================================================================================================ +Presto compilation completed successfully. +Information: Building the design 'VX_back_end' instantiated from design 'Vortex' with + the parameters "|((N%clk%)(N%reset%)(N%schedule_delay%)(N%fetch_delay%)(N%in_fwd_stall%)(N%VX_fwd_req_de%I%WORK/VX_forward_reqeust_inter%%)(N%VX_fwd_rsp%I%WORK/VX_forward_response_inter%%)(N%VX_warp_ctl%I%WORK/VX_warp_ctl_inter%%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_fwd_exe%I%WORK/VX_forward_exe_inter%%)(N%csr_decode_csr_data%)(N%execute_branch_stall%)(N%VX_jal_rsp%I%WORK/VX_jal_response_inter%%)(N%VX_branch_rsp%I%WORK/VX_branch_response_inter%%)(N%VX_dcache_rsp%I%WORK/VX_dcache_response_inter%%)(N%VX_dcache_req%I%WORK/VX_dcache_request_inter%%)(N%VX_fwd_mem%I%WORK/VX_forward_mem_inter%%)(N%VX_fwd_wb%I%WORK/VX_forward_wb_inter%%)(N%VX_csr_w_req%I%WORK/VX_csr_write_request_inter%%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%out_mem_delay%)(N%out_gpr_stall%))". (HDL-193) +Presto compilation completed successfully. +Warning: Filename too long >255 chars. Renaming file: +'/home/gtcad9/lzhu308/work/projects/vortex/design/Vortex/syn/VX_BACK_END_I_VX_JAL_RSP_VX_JAL_RESPONSE_INTER__I_VX_BRANCH_RSP_VX_BRANCH_RESPONSE_INTER__I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__I_VX_WRITEBACK_INTER_VX_WB_INTER__I_VX_WARP_CTL_VX_WARP_CTL_INTER__I_VX_DCACHE_RSP_VX_DCACHE_RESPONSE_INTER__I_VX_DCACHE_REQ_VX_DCACHE_REQUEST_INTER__I_VX_FWD_REQ_DE_VX_FORWARD_REQEUST_INTER__I_VX_FWD_RSP_VX_FORWARD_RESPONSE_INTER__I_VX_FWD_EXE_VX_FORWARD_EXE_INTER__I_VX_FWD_MEM_VX_FORWARD_MEM_INTER__I_VX_FWD_WB_VX_FORWARD_WB_INTER__I_VX_CSR_W_REQ_VX_CSR_WRITE_REQUEST_INTER__.mr' +to +'/home/gtcad9/lzhu308/work/projects/vortex/design/Vortex/syn/VX_BACK_END_I_VX_JAL_RSP_VX_JAL_RESPONSE_INTER__I_VX_BRANCH_RSP_VX_BRANCH_RESPONSE_INTER__I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__I_VX_WRITEBACK_INTER_VX_WB_INTER__I_VX_WARP_CTL_VX_WARP_CTL_INTER__I__7F07B1EEE994C915DA9D538D8C0E27221FA22D3A417A3ECA_000.mr' +Information: Building the design 'VX_forwarding' instantiated from design 'Vortex' with + the parameters "|((N%VX_fwd_req_de%I%WORK/VX_forward_reqeust_inter%%)(N%VX_fwd_exe%I%WORK/VX_forward_exe_inter%%)(N%VX_fwd_mem%I%WORK/VX_forward_mem_inter%%)(N%VX_fwd_wb%I%WORK/VX_forward_wb_inter%%)(N%VX_fwd_rsp%I%WORK/VX_forward_response_inter%%)(N%out_fwd_stall%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_csr_handler' instantiated from design 'Vortex' with + the parameters "|((N%clk%)(N%in_decode_csr_address%)(N%VX_csr_w_req%I%WORK/VX_csr_write_request_inter%%)(N%in_wb_valid%)(N%out_decode_csr_data%))". (HDL-193) + +Inferred memory devices in process + in routine VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__ line 41 in file + '../rtl/VX_csr_handler.v'. +================================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +================================================================================== +| cycle_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | +| decode_csr_address_reg | Flip-flop | 12 | Y | N | N | N | N | N | N | +| instret_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | +================================================================================== + +Inferred memory devices in process + in routine VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__ line 50 in file + '../rtl/VX_csr_handler.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| csr_reg | Flip-flop | 12300 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_fetch' instantiated from design 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "|((N%clk%)(N%in_memory_delay%)(N%in_branch_stall%)(N%in_fwd_stall%)(N%schedule_delay%)(N%in_branch_stall_exe%)(N%in_gpr_stall%)(N%VX_jal_rsp%I%WORK/VX_jal_response_inter%%)(N%icache_response%I%WORK/VX_icache_response_inter%%)(N%VX_warp_ctl%I%WORK/VX_warp_ctl_inter%%)(N%icache_request%I%WORK/VX_icache_request_inter%%)(N%VX_branch_rsp%I%WORK/VX_branch_response_inter%%)(N%out_delay%)(N%out_ebreak%)(N%fe_inst_meta_fd%I%WORK/VX_inst_meta_inter%%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_f_d_reg' instantiated from design 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "|((N%clk%)(N%reset%)(N%in_fwd_stall%)(N%in_freeze%)(N%in_gpr_stall%)(N%fe_inst_meta_fd%I%WORK/VX_inst_meta_inter%%)(N%fd_inst_meta_de%I%WORK/VX_inst_meta_inter%%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_decode' instantiated from design 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "|((N%fd_inst_meta_de%I%WORK/VX_inst_meta_inter%%)(N%VX_frE_to_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%out_gpr_stall%)(N%out_branch_stall%)(N%out_ebreak%))". (HDL-193) +Warning: ../rtl/VX_decode.v:209: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_decode.v:376: DEFAULT branch of CASE statement cannot be reached. (ELAB-311) +Warning: ../rtl/VX_decode.v:391: DEFAULT branch of CASE statement cannot be reached. (ELAB-311) + +Statistics for case statements in always block at line 217 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 218 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 250 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 251 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 313 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 314 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 328 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 329 | auto/auto | +| 334 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 374 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 376 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 389 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 391 | auto/auto | +=============================================== + +Statistics for case statements in always block at line 406 in file + '../rtl/VX_decode.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 407 | auto/auto | +=============================================== + +Inferred memory devices in process + in routine VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__ line 250 in file + '../rtl/VX_decode.v'. +=========================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=========================================================================== +| temp_jal_reg | Latch | 1 | N | N | N | N | - | - | - | +| temp_jal_offset_reg | Latch | 32 | Y | N | N | N | - | - | - | +=========================================================================== + +Inferred memory devices in process + in routine VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__ line 328 in file + '../rtl/VX_decode.v'. +============================================================================= +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +============================================================================= +| temp_branch_stall_reg | Latch | 1 | N | N | N | N | - | - | - | +| temp_branch_type_reg | Latch | 3 | Y | N | N | N | - | - | - | +============================================================================= +Presto compilation completed successfully. +Information: Building the design 'VX_d_e_reg' instantiated from design 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "|((N%clk%)(N%reset%)(N%in_fwd_stall%)(N%in_branch_stall%)(N%in_freeze%)(N%in_gpr_stall%)(N%VX_frE_to_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_gpr_stage' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%clk%)(N%schedule_delay%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%VX_fwd_rsp%I%WORK/VX_forward_response_inter%%)(N%in_fwd_stall%)(N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_warp_ctl%I%WORK/VX_warp_ctl_inter%%)(N%VX_bckE_req_out%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_gpr_data%I%WORK/VX_gpr_data_inter%%)(N%VX_fwd_req_de%I%WORK/VX_forward_reqeust_inter%%)(N%out_gpr_stall%))". (HDL-193) +Presto compilation completed successfully. +Warning: Filename too long >255 chars. Renaming file: +'/home/gtcad9/lzhu308/work/projects/vortex/design/Vortex/syn/VX_GPR_STAGE_I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__I_VX_WRITEBACK_INTER_VX_WB_INTER__I_VX_FWD_RSP_VX_FORWARD_RESPONSE_INTER__I_VX_FWD_REQ_DE_VX_FORWARD_REQEUST_INTER__I_VX_WARP_CTL_VX_WARP_CTL_INTER__I_VX_BCKE_REQ_OUT_VX_FRE_TO_BCKE_REQ_INTER__I_VX_GPR_DATA_VX_GPR_DATA_INTER__.mr' +to +'/home/gtcad9/lzhu308/work/projects/vortex/design/Vortex/syn/VX_GPR_STAGE_I_VX_BCKE_REQ_VX_FRE_TO_BCKE_REQ_INTER__I_VX_WRITEBACK_INTER_VX_WB_INTER__I_VX_FWD_RSP_VX_FORWARD_RESPONSE_INTER__I_VX_FWD_REQ_DE_VX_FORWARD_REQEUST_INTER__I_VX_WARP_CTL_VX_WARP_CTL_INTE_EFBA196D9E299CB8BE86C5524AD8111A54BE04AAEA2C3858_000.mr' +Information: Building the design 'VX_execute' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%VX_bckE_req%I%WORK/VX_frE_to_bckE_req_inter%%)(N%VX_gpr_data%I%WORK/VX_gpr_data_inter%%)(N%VX_fwd_exe%I%WORK/VX_forward_exe_inter%%)(N%in_csr_data%)(N%VX_exe_mem_req%I%WORK/VX_mem_req_inter%%)(N%out_csr_address%)(N%out_is_csr%)(N%out_csr_result%)(N%out_jal%)(N%out_jal_dest%)(N%out_branch_stall%))". (HDL-193) +Warning: ../rtl/VX_execute.v:64: signed to unsigned assignment occurs. (VER-318) + +Statistics for case statements in always block at line 67 in file + '../rtl/VX_execute.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 69 | auto/auto | +=============================================== +Warning: ../rtl/VX_execute.v:90: Net VX_exe_mem_req.wb[1] or a directly connected net may be driven by more than one process or block. (ELAB-405) +Warning: ../rtl/VX_execute.v:90: Net VX_exe_mem_req.wb[0] or a directly connected net may be driven by more than one process or block. (ELAB-405) +Presto compilation completed successfully. +Information: Building the design 'VX_e_m_reg' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%clk%)(N%reset%)(N%in_csr_address%)(N%in_is_csr%)(N%in_csr_result%)(N%in_jal%)(N%in_jal_dest%)(N%in_freeze%)(N%VX_exe_mem_req%I%WORK/VX_mem_req_inter%%)(N%VX_mem_req%I%WORK/VX_mem_req_inter%%)(N%out_csr_address%)(N%out_is_csr%)(N%out_csr_result%)(N%out_jal%)(N%out_jal_dest%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_memory' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%VX_mem_req%I%WORK/VX_mem_req_inter%%)(N%VX_mem_wb%I%WORK/VX_inst_mem_wb_inter%%)(N%VX_fwd_mem%I%WORK/VX_forward_mem_inter%%)(N%out_delay%)(N%VX_branch_rsp%I%WORK/VX_branch_response_inter%%)(N%VX_dcache_rsp%I%WORK/VX_dcache_response_inter%%)(N%VX_dcache_req%I%WORK/VX_dcache_request_inter%%))". (HDL-193) +Warning: ../rtl/VX_memory.v:57: signed to unsigned assignment occurs. (VER-318) + +Statistics for case statements in always block at line 59 in file + '../rtl/VX_memory.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 60 | auto/auto | +=============================================== +Presto compilation completed successfully. +Information: Building the design 'VX_writeback' instantiated from design 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' with + the parameters "|((N%VX_mw_wb%I%WORK/VX_mw_wb_inter%%)(N%VX_fwd_wb%I%WORK/VX_forward_wb_inter%%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%))". (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_warp_scheduler'. (HDL-193) + +Inferred memory devices in process + in routine VX_warp_scheduler line 82 in file + '../rtl/VX_warp_scheduler.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| visible_active_reg | Flip-flop | 8 | Y | N | N | N | N | N | N | +| warp_pcs_reg | Flip-flop | 256 | Y | N | N | N | N | N | N | +| warp_active_reg | Flip-flop | 8 | Y | N | N | N | N | N | N | +| thread_masks_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | +| warp_stalled_reg | Flip-flop | 8 | Y | N | N | N | N | N | N | +| start_reg | Flip-flop | 2 | Y | N | N | N | N | N | N | +=============================================================================== +Statistics for MUX_OPs +=========================================================== +| block name/line | Inputs | Outputs | # sel inputs | +=========================================================== +| VX_warp_scheduler/147 | 8 | 1 | 3 | +| VX_warp_scheduler/152 | 8 | 32 | 3 | +| VX_warp_scheduler/153 | 8 | 4 | 3 | +=========================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_generic_register' instantiated from design 'VX_f_d_reg_I_fe_inst_meta_fd_VX_inst_meta_inter__I_fd_inst_meta_de_VX_inst_meta_inter__' with + the parameters "N=71". (HDL-193) + +Inferred memory devices in process + in routine VX_generic_register_N71 line 22 in file + '../rtl/VX_generic_register.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| value_reg | Flip-flop | 71 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_generic_register' instantiated from design 'VX_d_e_reg_I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' with + the parameters "N=237". (HDL-193) + +Inferred memory devices in process + in routine VX_generic_register_N237 line 22 in file + '../rtl/VX_generic_register.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| value_reg | Flip-flop | 237 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_gpr_wrapper' instantiated from design 'VX_gpr_stage_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_bckE_req_out_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__' with + the parameters "|((N%clk%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%VX_fwd_rsp%I%WORK/VX_forward_response_inter%%)(N%VX_gpr_read%I%WORK/VX_gpr_read_inter%%)(N%VX_gpr_jal%I%WORK/VX_gpr_jal_inter%%)(N%out_a_reg_data%)(N%out_b_reg_data%)(N%out_gpr_stall%))". (HDL-193) +Statistics for MUX_OPs +================================================================================================================================================================================================== +| block name/line | Inputs | Outputs | # sel inputs | +================================================================================================================================================================================================== +| VX_gpr_wrapper_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_gpr_jal_VX_gpr_jal_inter__/25 | 8 | 256 | 3 | +================================================================================================================================================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_generic_register' instantiated from design 'VX_gpr_stage_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_bckE_req_out_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__' with + the parameters "N=256". (HDL-193) + +Inferred memory devices in process + in routine VX_generic_register_N256 line 22 in file + '../rtl/VX_generic_register.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| value_reg | Flip-flop | 256 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_alu'. (HDL-193) +Warning: ../rtl/VX_alu.v:41: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:50: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:51: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:57: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:62: signed to unsigned assignment occurs. (VER-318) +Warning: ../rtl/VX_alu.v:70: signed to unsigned conversion occurs. (VER-318) +Warning: ../rtl/VX_alu.v:72: signed to unsigned conversion occurs. (VER-318) + +Statistics for case statements in always block at line 48 in file + '../rtl/VX_alu.v' +=============================================== +| Line | full/ parallel | +=============================================== +| 49 | auto/auto | +=============================================== +Presto compilation completed successfully. +Information: Building the design 'VX_generic_register' instantiated from design 'VX_e_m_reg_I_VX_exe_mem_req_VX_mem_req_inter__I_VX_mem_req_VX_mem_req_inter__' with + the parameters "N=463". (HDL-193) + +Inferred memory devices in process + in routine VX_generic_register_N463 line 22 in file + '../rtl/VX_generic_register.v'. +=============================================================================== +| Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | +=============================================================================== +| value_reg | Flip-flop | 463 | Y | N | N | N | N | N | N | +=============================================================================== +Presto compilation completed successfully. +Information: Building the design 'VX_priority_encoder'. (HDL-193) +Warning: ../rtl/VX_priority_encoder.v:15: signed to unsigned part selection occurs. (VER-318) +Presto compilation completed successfully. +Information: Building the design 'VX_one_counter'. (HDL-193) +Presto compilation completed successfully. +Information: Building the design 'VX_gpr' instantiated from design 'VX_gpr_wrapper_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_gpr_jal_VX_gpr_jal_inter__' with + the parameters "|((N%clk%)(N%valid_write_request%)(N%VX_gpr_read%I%WORK/VX_gpr_read_inter%%)(N%VX_writeback_inter%I%WORK/VX_wb_inter%%)(N%out_a_reg_data%)(N%out_b_reg_data%))". (HDL-193) +Presto compilation completed successfully. +1 +link + + Linking design 'Vortex' + Using the following designs and libraries: + -------------------------------------------------------------------------- + * (25 designs) /home/gtcad9/lzhu308/work/projects/vortex/design/Vortex/syn/Vortex.db, etc + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c (library) /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db + rf_2p_hce_ss_0p81v_0p81v_125c (library) /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/rf2_32x128_wm1_ss_0p81v_0p81v_125c.db + dw_foundation.sldb (library) /tools/synopsys/synthesis/syn/O-2018.06-SP4/libraries/syn/dw_foundation.sldb + +1 +set clk_freq 100 +100 +set clk_period [expr 1000.0 / $clk_freq / 1.0] +10.0 +create_clock [get_ports clk] -period $clk_period +1 +set_max_fanout 20 [get_ports clk] +1 +set_ideal_network [get_ports clk] +1 +set_max_fanout 20 [get_ports reset] +1 +set_false_path -from [get_ports reset] +1 +compile_ultra -no_autoungroup +Information: Performing power optimization. (PWR-850) +Alib files are up-to-date. +Information: Evaluating DesignWare library utilization. (UISN-27) + +============================================================================ +| DesignWare Building Block Library | Version | Available | +============================================================================ +| Basic DW Building Blocks | O-2018.06-DWBB_201806.4 | * | +| Licensed DW Building Blocks | O-2018.06-DWBB_201806.4 | * | +============================================================================ + +Information: Sequential output inversion is enabled. SVF file must be used for formal verification. (OPT-1208) + +Information: There are 3906 potential problems in your design. Please run 'check_design' for more information. (LINT-99) + +Information: Uniquified 2 instances of design 'VX_d_e_reg_I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__'. (OPT-1056) +Information: Uniquified 2 instances of design 'VX_generic_register_N237'. (OPT-1056) +Information: Uniquified 4 instances of design 'VX_alu'. (OPT-1056) +Information: Uniquified 2 instances of design 'VX_priority_encoder'. (OPT-1056) +Information: Uniquified 8 instances of design 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__'. (OPT-1056) + Simplifying Design 'Vortex' + +Loaded alib file './alib-52/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db.alib' +Information: State dependent leakage is now switched from on to off. + + Beginning Pass 1 Mapping + ------------------------ + Processing 'VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__' + Implement Synthetic for 'VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__'. + Processing 'VX_warp_scheduler' +Information: Added key list 'DesignWare' to design 'VX_warp_scheduler'. (DDB-72) +Information: The register 'start_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'start_reg[0]' is a constant and will be removed. (OPT-1206) + Implement Synthetic for 'VX_warp_scheduler'. + Processing 'VX_gpr_wrapper_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_gpr_jal_VX_gpr_jal_inter__' + Processing 'VX_generic_register_N463' + Processing 'VX_back_end_I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_csr_w_req_VX_csr_write_request_inter__' + Processing 'VX_forwarding_I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__' +Information: Added key list 'DesignWare' to design 'VX_forwarding_I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__'. (DDB-72) + Processing 'Vortex' + Processing 'VX_alu_0' + Implement Synthetic for 'VX_alu_0'. + Processing 'VX_alu_0_DW_div_uns_J8_0' + Processing 'VX_alu_0_DW_div_tc_J8_0' + Processing 'VX_alu_0_DW01_absval_J8_0' + Processing 'VX_alu_0_DW01_inc_J8_0' + Processing 'VX_alu_0_DW_div_uns_J8_1' + Processing 'VX_alu_0_DW_div_tc_J8_1' + Processing 'VX_alu_0_DW01_absval_J8_1' + Processing 'VX_alu_0_DW01_inc_J8_1' +Information: Added key list 'DesignWare' to design 'VX_alu_0'. (DDB-72) + Processing 'VX_generic_register_N71' + Processing 'VX_fetch_I_icache_response_VX_icache_response_inter__I_icache_request_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_fe_inst_meta_fd_VX_inst_meta_inter__I_VX_warp_ctl_VX_warp_ctl_inter__' + Processing 'VX_generic_register_N256' + Processing 'VX_writeback_I_VX_mw_wb_VX_mw_wb_inter__I_VX_fwd_wb_VX_forward_wb_inter__I_VX_writeback_inter_VX_wb_inter__' + Processing 'VX_memory_I_VX_mem_req_VX_mem_req_inter__I_VX_mem_wb_VX_inst_mem_wb_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__' + Implement Synthetic for 'VX_memory_I_VX_mem_req_VX_mem_req_inter__I_VX_mem_wb_VX_inst_mem_wb_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__'. + Processing 'VX_f_d_reg_I_fe_inst_meta_fd_VX_inst_meta_inter__I_fd_inst_meta_de_VX_inst_meta_inter__' + Processing 'VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__' +Information: Added key list 'DesignWare' to design 'VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__'. (DDB-72) + Implement Synthetic for 'VX_decode_I_fd_inst_meta_de_VX_inst_meta_inter__I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__'. + Processing 'VX_gpr_I_VX_gpr_read_VX_gpr_read_inter__I_VX_writeback_inter_VX_wb_inter___0' + Processing 'VX_d_e_reg_I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter___0' + Processing 'VX_d_e_reg_I_VX_frE_to_bckE_req_VX_frE_to_bckE_req_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter___1' + Processing 'VX_generic_register_N237_0' + Processing 'VX_scheduler_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__' + Processing 'VX_one_counter' +Information: Added key list 'DesignWare' to design 'VX_one_counter'. (DDB-72) + Processing 'VX_gpr_stage_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_writeback_inter_VX_wb_inter__I_VX_fwd_rsp_VX_forward_response_inter__I_VX_fwd_req_de_VX_forward_reqeust_inter__I_VX_warp_ctl_VX_warp_ctl_inter__I_VX_bckE_req_out_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__' + Processing 'VX_execute_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_exe_mem_req_VX_mem_req_inter__' + Implement Synthetic for 'VX_execute_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_exe_mem_req_VX_mem_req_inter__'. +Information: Added key list 'DesignWare' to design 'VX_execute_I_VX_bckE_req_VX_frE_to_bckE_req_inter__I_VX_gpr_data_VX_gpr_data_inter__I_VX_fwd_exe_VX_forward_exe_inter__I_VX_exe_mem_req_VX_mem_req_inter__'. (DDB-72) + Processing 'VX_e_m_reg_I_VX_exe_mem_req_VX_mem_req_inter__I_VX_mem_req_VX_mem_req_inter__' + Processing 'VX_priority_encoder_0' + Processing 'VX_generic_register_N237_1' +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[189]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[190]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[191]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[192]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[193]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[194]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[195]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[196]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[197]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[198]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[199]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[200]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[201]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[202]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[203]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[204]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[205]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[206]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[207]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[208]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[209]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[210]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[211]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[212]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[213]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[214]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[215]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[216]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[217]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[218]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[219]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) +Information: In design 'VX_generic_register_N237_1', the register 'value_reg[221]' is removed because it is merged to 'value_reg[188]'. (OPT-1215) + Processing 'VX_front_end_I_VX_warp_ctl_VX_warp_ctl_inter__I_icache_response_fe_VX_icache_response_inter__I_icache_request_fe_VX_icache_request_inter__I_VX_jal_rsp_VX_jal_response_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_bckE_req_VX_frE_to_bckE_req_inter__' + + Updating timing information +Information: Updating design information... (UID-85) +Information: The library cell 'TIELO_X1M_A12TUL_C35' in the library 'sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c' is not characterized for internal power. (PWR-536) +Information: The library cell 'TIEHI_X1M_A12TUL_C35' in the library 'sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c' is not characterized for internal power. (PWR-536) +Information: The target library(s) contains cell(s), other than black boxes, that are not characterized for internal power. (PWR-24) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[0][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[0][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[0][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[0][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[1][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[1][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[1][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[1][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[2][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[2][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[2][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[2][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[3][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[3][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[3][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[3][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[4][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[4][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[4][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[4][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[5][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[5][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[5][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[5][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[6][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[6][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[6][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[6][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[7][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[7][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[7][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/thread_masks_reg[7][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_active_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[70]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[69]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[68]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[67]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[66]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[65]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[64]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[62]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[60]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[58]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[57]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[55]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[54]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[52]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[51]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/decode_csr_address_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[50]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[49]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[48]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[46]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[45]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[44]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[42]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[41]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[40]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[39]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[71]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[71]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[417]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[104]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[104]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[105]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[105]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[106]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[106]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[107]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[107]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[108]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[108]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[109]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[109]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[110]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[110]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[111]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[111]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[112]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[112]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[113]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[113]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[114]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[114]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[115]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[115]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[116]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[116]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[117]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[117]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[118]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[118]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[119]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[119]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[120]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[120]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[121]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[121]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[122]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[122]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[123]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[123]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[124]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[124]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[125]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[125]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[126]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[126]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[33]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[35]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[36]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[37]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[38]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[39]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[40]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[41]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[42]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[44]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[45]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[46]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[48]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[49]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[50]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[51]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[52]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[54]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[55]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[57]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[58]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[60]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[62]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/instret_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_decode/temp_branch_stall_reg' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/visible_active_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_stalled_reg[0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[137]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[137]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[141]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[141]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[147]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[147]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[150]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[150]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[153]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[153]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[155]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[155]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[157]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[157]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[162]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[162]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[39]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[165]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[165]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[166]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[166]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[244]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[167]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[167]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[245]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[168]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[168]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[169]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[169]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[170]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[170]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[171]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[171]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[172]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[172]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[173]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[173]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[234]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[174]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[174]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[235]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[175]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[175]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[236]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[176]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[176]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[237]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[177]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[177]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[238]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[178]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[178]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[239]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[179]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[179]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[240]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[180]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[180]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[241]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[181]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[181]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[242]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[182]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[182]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[243]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[183]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[183]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[246]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[184]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[184]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[247]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[185]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[185]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[248]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[186]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[186]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[249]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[187]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[187]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[250]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[188]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[188]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[189]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[190]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[191]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[192]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[193]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[194]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[195]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[196]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[197]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[198]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[199]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[200]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[201]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[202]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[432]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[203]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[204]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[205]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[435]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[206]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[207]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[208]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[438]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[209]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[210]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[440]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[211]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[212]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[442]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[213]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[214]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[215]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[216]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[217]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[447]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[218]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[219]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[221]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[450]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[220]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[220]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[222]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[222]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[223]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[223]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[224]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[224]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[226]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[226]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[452]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[228]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[228]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[454]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[230]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[230]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[456]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[232]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[232]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[458]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[233]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[233]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[459]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[234]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[234]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[460]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[235]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[235]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[461]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[236]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[236]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[462]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[422]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[426]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[767][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[0][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[2][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[3][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[4][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[5][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[6][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[7][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[8][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[9][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[10][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[11][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[12][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[13][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[14][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[15][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[16][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[17][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[18][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[19][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[20][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[21][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[22][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[23][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[24][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[25][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[26][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[27][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[28][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[29][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[30][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[31][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[32][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[33][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[34][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[35][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[36][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[37][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[38][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[39][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[40][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[41][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[42][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[43][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[44][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[45][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[46][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[47][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[48][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[49][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[50][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[51][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[52][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[53][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[54][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[55][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[56][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[57][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[58][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[59][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[60][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[61][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[62][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[63][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[64][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[65][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[66][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[67][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[68][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[69][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[70][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[71][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[72][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[73][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[74][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[75][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[76][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[77][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[78][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[79][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[80][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[81][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[82][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[83][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[84][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[85][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[86][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[87][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[88][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[89][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[90][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[91][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[92][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[93][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[94][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[95][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[96][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[97][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[98][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[99][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[100][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[101][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[102][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[103][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[104][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[105][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[106][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[107][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[108][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[109][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[110][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[111][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[112][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[113][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[114][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[115][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[116][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[117][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[118][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[119][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[120][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[121][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[122][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[123][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[124][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[125][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[126][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[127][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[128][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[129][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[130][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[131][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[132][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[133][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[134][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[135][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[136][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[137][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[138][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[139][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[140][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[141][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[142][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[143][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[144][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[145][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[146][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[147][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[148][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[149][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[150][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[151][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[152][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[153][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[154][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[155][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[156][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[157][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[158][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[159][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[160][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[161][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[162][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[163][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[164][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[165][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[166][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[167][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[168][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[169][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[170][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[171][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[172][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[173][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[174][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[175][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[176][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[177][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[178][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[179][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[180][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[181][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[182][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[183][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[184][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[185][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[186][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[187][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[188][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[189][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[190][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[191][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[192][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[193][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[194][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[195][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[196][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[197][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[198][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[199][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[200][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[201][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[202][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[203][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[204][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[205][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[206][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[207][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[208][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[209][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[210][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[211][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[212][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[213][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[214][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[215][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[216][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[217][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[218][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[219][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[220][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[221][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[222][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[223][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[224][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[225][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[226][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[227][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[228][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[229][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[230][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[231][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[232][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[233][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[234][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[235][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[236][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[237][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[238][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[239][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[240][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[241][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[242][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[243][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[244][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[245][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[246][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[247][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[248][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[249][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[250][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[251][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[252][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[253][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[254][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[255][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[256][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[257][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[258][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[259][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[260][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[261][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[262][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[263][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[264][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[265][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[266][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[267][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[268][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[269][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[270][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[271][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[272][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[273][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[274][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[275][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[276][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[277][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[278][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[279][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[280][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[281][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[282][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[283][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[284][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[285][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[286][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[287][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[288][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[289][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[290][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[291][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[292][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[293][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[294][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[295][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[296][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[297][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[298][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[299][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[300][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[301][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[302][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[303][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[304][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[305][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[306][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[307][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[308][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[309][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[310][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[311][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[312][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[313][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[314][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[315][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[316][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[317][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[318][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[319][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[320][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[321][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[322][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[323][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[324][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[325][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[326][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[327][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[328][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[329][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[330][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[331][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[332][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[333][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[334][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[335][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[336][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[337][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[338][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[339][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[340][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[341][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[342][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[343][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[344][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[345][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[346][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[347][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[348][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[349][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[350][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[351][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[352][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[353][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[354][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[355][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[356][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[357][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[358][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[359][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[360][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[361][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[362][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[363][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[364][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[365][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[366][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[367][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[368][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[369][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[370][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[371][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[372][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[373][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[374][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[375][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[376][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[377][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[378][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[379][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[380][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[381][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[382][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[383][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[384][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[385][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[386][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[387][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[388][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[389][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[390][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[391][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[392][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[393][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[394][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[395][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[396][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[397][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[398][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[399][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[400][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[401][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[402][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[403][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[404][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[405][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[406][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[407][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[408][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[409][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[410][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[411][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[412][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[413][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[414][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[415][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[416][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[417][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[418][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[419][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[420][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[421][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[422][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[423][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[424][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[425][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[426][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[427][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[428][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[429][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[430][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[431][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[432][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[433][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[434][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[435][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[436][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[437][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[438][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[439][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[440][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[441][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[442][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[443][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[444][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[445][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[446][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[447][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[448][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[449][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[450][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[451][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[452][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[453][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[454][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[455][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[456][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[457][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[458][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[459][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[460][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[461][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[462][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[463][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[464][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[465][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[466][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[467][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[468][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[469][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[470][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[471][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[472][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[473][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[474][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[475][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[476][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[477][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[478][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[479][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[480][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[481][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[482][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[483][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[484][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[485][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[486][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[487][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[488][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[489][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[490][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[491][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[492][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[493][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[494][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[495][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[496][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[497][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[498][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[499][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[500][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[501][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[502][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[503][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[504][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[505][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[506][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[507][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[508][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[509][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[510][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[511][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[512][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[513][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[514][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[515][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[516][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[517][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[518][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[519][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[520][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[521][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[522][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[523][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[524][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[525][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[526][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[527][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[528][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[529][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[530][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[531][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[532][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[533][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[534][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[535][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[536][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[537][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[538][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[539][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[540][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[541][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[542][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[543][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[544][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[545][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[546][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[547][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[548][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[549][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[550][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[551][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[552][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[553][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[554][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[555][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[556][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[557][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[558][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[559][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[560][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[561][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[562][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[563][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[564][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[565][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[566][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[567][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[568][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[569][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[570][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[571][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[572][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[573][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[574][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[575][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[576][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[577][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[578][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[579][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[580][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[581][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[582][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[583][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[584][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[585][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[586][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[587][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[588][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[589][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[590][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[591][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[592][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[593][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[594][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[595][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[596][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[597][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[598][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[599][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[600][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[601][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[602][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[603][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[604][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[605][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[606][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[607][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[608][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[609][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[610][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[611][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[612][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[613][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[614][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[615][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[616][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[617][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[618][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[619][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[620][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[621][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[622][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[623][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[624][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[625][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[626][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[627][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[628][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[629][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[630][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[631][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[632][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[633][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[634][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[635][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[636][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[637][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[638][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[639][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[640][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[641][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[642][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[643][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[644][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[645][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[646][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[647][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[648][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[649][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[650][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[651][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[652][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[653][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[654][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[655][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[656][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[657][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[658][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[659][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[660][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[661][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[662][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[663][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[664][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[665][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[666][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[667][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[668][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[669][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[670][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[671][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[672][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[673][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[674][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[675][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[676][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[677][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[678][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[679][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[680][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[681][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[682][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[683][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[684][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[685][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[686][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[687][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[688][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[689][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[690][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[691][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[692][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[693][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[694][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[695][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[696][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[697][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[698][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[699][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[700][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[701][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[702][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[703][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[704][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[705][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[706][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[707][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[708][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[709][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[710][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[711][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[712][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[713][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[714][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[715][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[716][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[717][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[718][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[719][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[720][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[721][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[722][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[723][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[724][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[725][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[726][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[727][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[728][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[729][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[730][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[731][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[732][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[733][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[734][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[735][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[736][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[737][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[738][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[739][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[740][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[741][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[742][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[743][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[744][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[745][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[746][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[747][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[748][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[749][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[750][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[751][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[752][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[753][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[754][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[755][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[756][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[757][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[758][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[759][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[760][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[761][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[762][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[763][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[764][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[765][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[766][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[768][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[769][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[770][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[771][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[772][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[773][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[774][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[775][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[776][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[777][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[778][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[779][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[780][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[781][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[782][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[783][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[784][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[785][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[786][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[787][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[788][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[789][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[790][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[791][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[792][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[793][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[794][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[795][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[796][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[797][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[798][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[799][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[800][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[801][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[802][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[803][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[804][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[805][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[806][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[807][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[808][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[809][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[810][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[811][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[812][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[813][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[814][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[815][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[816][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[817][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[818][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[819][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[820][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[821][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[822][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[823][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[824][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[825][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[826][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[827][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[828][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[829][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[830][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[831][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[832][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[833][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[834][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[835][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[836][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[837][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[838][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[839][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[840][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[841][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[842][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[843][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[844][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[845][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[846][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[847][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[848][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[849][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[850][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[851][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[852][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[853][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[854][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[855][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[856][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[857][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[858][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[859][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[860][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[861][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[862][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[863][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[864][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[865][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[866][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[867][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[868][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[869][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[870][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[871][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[872][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[873][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[874][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[875][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[876][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[877][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[878][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[879][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[880][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[881][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[882][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[883][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[884][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[885][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[886][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[887][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[888][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[889][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[890][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[891][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[892][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[893][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[894][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[895][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[896][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[897][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[898][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[899][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[900][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[901][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[902][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[903][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[904][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[905][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[906][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[907][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[908][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[909][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[910][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[911][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[912][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[913][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[914][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[915][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[916][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[917][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[918][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[919][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[920][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[921][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[922][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[923][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[924][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[925][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[926][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[927][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[928][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[929][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[930][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[931][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[932][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[933][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[934][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[935][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[936][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[937][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[938][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[939][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[940][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[941][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[942][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[943][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[944][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[945][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[946][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[947][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[948][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[949][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[950][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[951][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[952][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[953][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[954][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[955][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[956][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[957][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[958][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[959][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[960][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[961][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[962][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[963][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[964][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[965][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[966][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[967][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[968][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[969][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[970][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[971][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[972][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[973][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[974][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[975][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[976][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[977][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[978][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[979][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[980][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[981][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[982][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[983][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[984][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[985][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[986][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[987][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[988][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[989][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[990][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[991][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[992][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[993][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[994][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[995][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[996][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[997][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[998][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[999][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1000][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1001][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1002][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1003][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1004][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1005][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1006][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1007][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1008][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1009][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1010][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1011][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1012][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1013][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1014][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1015][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1016][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1017][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1018][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1019][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1020][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1021][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1022][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1023][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_csr_handler/csr_reg[1024][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[68]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[68]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[72]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[72]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[42]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[74]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[73]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[73]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[43]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[75]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[79]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[79]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[49]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[81]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[81]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[81]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[51]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[83]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[80]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[80]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[50]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[82]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[78]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[78]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[48]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[80]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[77]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[77]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[47]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[79]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[76]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[76]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[46]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[78]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[75]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[75]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[45]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[77]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[38]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[103]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[103]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[73]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[38]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[38]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[105]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[74]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[74]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[44]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[82]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[82]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[52]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[84]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[83]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[83]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[53]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][11]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[86]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[84]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[84]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[54]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[85]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[85]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[55]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[87]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[86]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[86]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[56]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][14]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[89]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[87]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[87]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[57]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[88]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[88]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[58]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[90]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[89]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[89]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[59]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][17]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[92]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[90]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[90]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[60]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[91]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[91]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[61]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[93]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[92]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[92]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[62]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][20]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[95]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[93]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[93]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[63]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[94]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[94]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[64]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[96]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[95]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[95]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[65]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][23]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[98]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[96]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[96]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[66]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[97]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[97]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[67]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[32]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[99]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[33]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[98]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[98]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[68]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][26]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[101]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[34]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[99]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[99]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[69]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[35]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[100]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[100]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[70]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[35]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[35]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[102]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[36]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[101]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[101]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[71]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][29]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[36]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[36]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[103]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][28]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[33]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[33]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[100]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][25]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[97]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][22]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[94]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][19]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[91]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][16]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][15]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[88]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][13]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][12]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[85]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][10]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][9]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][8]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][7]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][6]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][5]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][4]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][3]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][2]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[0][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_f_d_reg/f_d_reg/value_reg[37]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[102]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[102]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[72]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][31]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][30]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[37]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[37]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_back_end/vx_e_m_reg/f_d_reg/value_reg[104]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][1]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[7][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[6][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[5][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[4][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[3][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[2][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'vx_front_end/vx_fetch/warp_scheduler/warp_pcs_reg[1][0]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[31]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[30]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[29]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[28]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[27]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[26]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[25]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[24]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[15]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[14]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[13]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[12]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[11]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[10]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[9]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[8]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[23]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[22]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[21]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[20]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[19]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[18]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[17]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[16]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[7]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[6]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[5]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[4]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[3]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[2]' is a constant and will be removed. (OPT-1206) +Information: The register 'schedule/rename_table_reg[1]' is a constant and will be removed. (OPT-1206) +Information: In design 'Vortex', the register 'vx_csr_handler/decode_csr_address_reg[4]' is removed because it is merged to 'vx_csr_handler/decode_csr_address_reg[6]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_csr_handler/decode_csr_address_reg[2]' is removed because it is merged to 'vx_csr_handler/decode_csr_address_reg[6]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_csr_handler/decode_csr_address_reg[0]' is removed because it is merged to 'vx_csr_handler/decode_csr_address_reg[6]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[128]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[129]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[130]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[131]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[132]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[133]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[134]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[135]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[136]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[138]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[139]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[140]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[142]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[143]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[144]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[145]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[146]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[148]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[149]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[151]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[152]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[154]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[156]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[158]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[159]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[160]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[161]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[163]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[164]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[225]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[227]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[229]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[231]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[9]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[128]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[129]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[130]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[131]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[132]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[133]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[134]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[135]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[136]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[138]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[139]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[140]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[142]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[143]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[144]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[145]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[146]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[148]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[149]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[151]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[152]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[154]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[156]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[158]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[159]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[160]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[161]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[163]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[164]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[225]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[227]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[229]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[231]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[9]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: The register 'vx_csr_handler/decode_csr_address_reg[6]' will be removed. (OPT-1207) +Information: Removing unused design 'VX_priority_encoder_1'. (OPT-1055) +Information: Removing unused design 'VX_one_counter'. (OPT-1055) +Information: Removing unused design 'VX_priority_encoder_0'. (OPT-1055) + + Beginning Mapping Optimizations (Ultra High effort) + ------------------------------- +Information: Added key list 'DesignWare' to design 'VX_csr_handler_I_VX_csr_w_req_VX_csr_write_request_inter__'. (DDB-72) +Information: Added key list 'DesignWare' to design 'VX_memory_I_VX_mem_req_VX_mem_req_inter__I_VX_mem_wb_VX_inst_mem_wb_inter__I_VX_fwd_mem_VX_forward_mem_inter__I_VX_branch_rsp_VX_branch_response_inter__I_VX_dcache_rsp_VX_dcache_response_inter__I_VX_dcache_req_VX_dcache_request_inter__'. (DDB-72) +Information: Updating design information... (UID-85) + Mapping Optimization (Phase 1) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[39]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[40]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[41]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[42]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[44]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[45]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[46]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[48]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[49]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[50]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[51]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[52]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[54]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[55]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[57]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[58]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[60]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[62]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[64]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[65]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[66]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[67]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[69]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[70]' is removed because it is merged to 'vx_front_end/vx_d_e_reg/d_e_reg/value_reg[127]'. (OPT-1215) + + Beginning Constant Register Removal + ----------------------------------- +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[127]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) + + Beginning Global Optimizations + ------------------------------ + Numerical Synthesis (Phase 1) + Numerical Synthesis (Phase 2) + Global Optimization (Phase 1) + Global Optimization (Phase 2) + Global Optimization (Phase 3) + Global Optimization (Phase 4) + Global Optimization (Phase 5) + Global Optimization (Phase 6) + Global Optimization (Phase 7) + Global Optimization (Phase 8) + Global Optimization (Phase 9) + Global Optimization (Phase 10) + Global Optimization (Phase 11) + Global Optimization (Phase 12) + Global Optimization (Phase 13) + Global Optimization (Phase 14) + Global Optimization (Phase 15) + Global Optimization (Phase 16) + Global Optimization (Phase 17) + Global Optimization (Phase 18) + Global Optimization (Phase 19) + Global Optimization (Phase 20) + Global Optimization (Phase 21) + Global Optimization (Phase 22) + Global Optimization (Phase 23) + Global Optimization (Phase 24) + Global Optimization (Phase 25) + Global Optimization (Phase 26) + Global Optimization (Phase 27) + Global Optimization (Phase 28) + Global Optimization (Phase 29) + Global Optimization (Phase 30) + + Beginning Isolate Ports + ----------------------- + + Beginning Delay Optimization + ---------------------------- + + TOTAL + ELAPSED WORST NEG SETUP DESIGN LEAKAGE + TIME AREA SLACK COST RULE COST ENDPOINT POWER + --------- --------- --------- --------- --------- ------------------------- --------- + 0:04:21 149253.0 0.00 0.0 0.0 1607.0739 + 0:04:21 149253.0 0.00 0.0 0.0 1607.0739 + 0:04:21 149253.0 0.00 0.0 0.0 1607.0739 + 0:04:21 149253.0 0.00 0.0 0.0 1607.0739 + + Beginning WLM Backend Optimization + -------------------------------------- +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[69]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[67]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[66]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[65]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[39]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[40]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[41]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[42]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[44]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[45]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[46]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[48]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[49]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[50]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[51]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[52]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[54]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[55]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[57]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[58]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[60]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[62]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) +Information: In design 'Vortex', the register 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[64]' is removed because it is merged to 'vx_back_end/VX_gpr_stage/gpr_stage_reg/d_e_reg/value_reg[70]'. (OPT-1215) + 0:04:24 149143.7 0.00 0.0 0.0 1607.0286 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + + + Beginning Leakage Power Optimization (max_leakage_power 0) + ------------------------------------ + + TOTAL + ELAPSED WORST NEG SETUP DESIGN LEAKAGE + TIME AREA SLACK COST RULE COST ENDPOINT POWER + --------- --------- --------- --------- --------- ------------------------- --------- + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + Global Optimization (Phase 31) + Global Optimization (Phase 32) + Global Optimization (Phase 33) + Global Optimization (Phase 34) + Global Optimization (Phase 35) + Global Optimization (Phase 36) + Global Optimization (Phase 37) + Global Optimization (Phase 38) + Global Optimization (Phase 39) + Global Optimization (Phase 40) + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:25 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + 0:04:26 149143.2 0.00 0.0 0.0 1607.0114 + + TOTAL + ELAPSED WORST NEG SETUP DESIGN LEAKAGE + TIME AREA SLACK COST RULE COST ENDPOINT POWER + --------- --------- --------- --------- --------- ------------------------- --------- + 0:04:26 148603.4 0.00 0.0 0.0 1606.9983 + 0:04:27 148603.4 0.00 0.0 0.0 1606.9983 + 0:04:27 148603.4 0.00 0.0 0.0 1606.9983 + 0:04:27 148603.4 0.00 0.0 0.0 1606.9983 + 0:04:28 148603.4 0.00 0.0 0.0 1606.9983 + 0:04:29 148603.4 0.00 0.0 0.0 1606.9983 + 0:04:29 148603.4 0.00 0.0 0.0 1606.9983 + 0:04:29 148603.4 0.00 0.0 0.0 1606.9983 + 0:04:29 148603.4 0.00 0.0 0.0 1606.9983 +Loading db file '/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db' +Loading db file '/nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/rf2_32x128_wm1_ss_0p81v_0p81v_125c.db' + + +Note: Symbol # after min delay cost means estimated hold TNS across all active scenarios + + + Optimization Complete + --------------------- +Warning: The trip points for the library named rf_2p_hce_ss_0p81v_0p81v_125c differ from those in the library named sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c. (TIM-164) +Information: State dependent leakage is now switched from off to on. +Information: Propagating switching activity (low effort zero delay simulation). (PWR-6) +Warning: Design has unannotated black box outputs. (PWR-428) +1 +ungroup -all -flatten +Information: Updating graph... (UID-83) +Warning: Design 'Vortex' inherited license information from design 'VX_warp_scheduler'. (DDB-74) +Information: Added key list 'DesignWare' to design 'Vortex'. (DDB-72) +1 +uniquify +1 +define_name_rules verilog -remove_internal_net_bus -remove_port_bus +1 +change_names -rule verilog -hierarchy +Warning: In the design Vortex, net 'vx_front_end/vx_fetch/warp_scheduler/warp_num[0]' is connecting multiple ports. (UCN-1) +Warning: In the design Vortex, net 'vx_back_end/vx_e_m_reg/f_d_reg/out[0]' is connecting multiple ports. (UCN-1) +1 +report_qor +Information: Updating design information... (UID-85) + +**************************************** +Report : qor +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 14:22:10 2019 +**************************************** + + + Timing Path Group 'clk' + ----------------------------------- + Levels of Logic: 33.00 + Critical Path Length: 2.03 + Critical Path Slack: 7.90 + Critical Path Clk Period: 10.00 + Total Negative Slack: 0.00 + No. of Violating Paths: 0.00 + Worst Hold Violation: 0.00 + Total Hold Violation: 0.00 + No. of Hold Violations: 0.00 + ----------------------------------- + + + Cell Count + ----------------------------------- + Hierarchical Cell Count: 0 + Hierarchical Port Count: 0 + Leaf Cell Count: 1804 + Buf/Inv Cell Count: 649 + Buf Cell Count: 4 + Inv Cell Count: 645 + CT Buf/Inv Cell Count: 0 + Combinational Cell Count: 1147 + Sequential Cell Count: 657 + Macro Count: 0 + ----------------------------------- + + + Area + ----------------------------------- + Combinational Area: 1014.119994 + Noncombinational Area: 1724.489969 + Buf/Inv Area: 316.062001 + Total Buffer Area: 2.59 + Total Inverter Area: 313.47 + Macro/Black Box Area: 145864.781250 + Net Area: 0.000000 + ----------------------------------- + Cell Area: 148603.391213 + Design Area: 148603.391213 + + + Design Rules + ----------------------------------- + Total Number of Nets: 1937 + Nets With Violations: 0 + Max Trans Violations: 0 + Max Cap Violations: 0 + ----------------------------------- + + + Hostname: gtcad-srv4 + + Compile CPU Statistics + ----------------------------------------- + Resource Sharing: 24.28 + Logic Optimization: 40.64 + Mapping Optimization: 5.97 + ----------------------------------------- + Overall Compile Time: 245.63 + Overall Compile Wall Clock Time: 273.14 + + -------------------------------------------------------------------- + + Design WNS: 0.00 TNS: 0.00 Number of Violating Paths: 0 + + + Design (Hold) WNS: 0.00 TNS: 0.00 Number of Violating Paths: 0 + + -------------------------------------------------------------------- + + +1 +report_area + +**************************************** +Report : area +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 14:22:10 2019 +**************************************** + +Library(s) Used: + + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c (File: /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_db/sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db) + rf_2p_hce_ss_0p81v_0p81v_125c (File: /nethome/dshim8/Desktop/GTCAD-3DPKG-v3/example/tech/cln28hpm/2d_hard_db/rf2_32x128_wm1_ss_0p81v_0p81v_125c.db) + +Number of ports: 461 +Number of nets: 1937 +Number of cells: 1991 +Number of combinational cells: 1147 +Number of sequential cells: 641 +Number of macros/black boxes: 16 +Number of buf/inv: 649 +Number of references: 15 + +Combinational area: 1014.119994 +Buf/Inv area: 316.062001 +Noncombinational area: 1724.489969 +Macro/Black Box area: 145864.781250 +Net Interconnect area: 0.000000 + +Total cell area: 148603.391213 +Total area: 148603.391213 +1 +report_hierarchy + +**************************************** +Report : hierarchy +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 14:22:10 2019 +**************************************** + +Attributes: + r - licensed design + +Vortex r + ADDF_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + ADDH_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + AND2_X0P5B_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + BUF_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + DFFQL_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + INV_X0P6B_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + INV_X0P6M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + INV_X0P7M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + LATQ_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + NOR2B_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + TIEHI_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + TIELO_X1M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + XOR2_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + XOR3_X0P5M_A12TUL_C35 sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c +1 +report_cell + +**************************************** +Report : cell +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 14:22:10 2019 +**************************************** + +Attributes: + b - black box (unknown) + d - dont_touch + h - hierarchical + mo - map_only + n - noncombinational + r - removable + u - contains unmapped logic + +Cell Reference Library Area Attributes +-------------------------------------------------------------------------------- +U5 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_U1 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_U2 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_gpr_stage_reg_U1 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_gpr_stage_reg_d_e_reg_value_reg_70_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_0_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_1_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_2_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_3_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_4_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_5_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_6_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_7_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_8_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_9_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_10_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_11_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_12_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_13_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_14_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_15_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_16_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_17_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_18_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_19_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_20_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_21_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_22_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_23_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_24_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_25_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_26_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_27_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_28_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_29_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_30_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_31_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_32_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_33_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_34_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_35_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_36_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_37_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_38_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_39_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_40_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_41_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_42_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_43_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_44_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_45_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_46_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_47_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_48_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_49_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_50_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_51_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_52_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_53_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_54_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_55_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_56_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_57_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_58_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_59_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_60_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_61_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_62_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_63_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_64_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_65_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_66_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_67_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_68_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_69_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_70_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_71_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_72_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_73_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_74_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_75_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_76_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_77_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_78_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_79_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_80_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_81_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_82_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_83_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_84_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_85_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_86_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_87_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_88_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_89_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_90_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_91_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_92_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_93_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_94_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_95_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_96_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_97_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_98_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_99_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_100_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_101_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_102_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_103_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_104_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_105_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_106_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_107_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_108_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_109_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_110_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_111_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_112_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_113_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_114_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_115_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_116_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_117_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_118_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_119_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_120_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_121_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_122_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_123_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_124_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_125_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_126_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_127_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_128_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_129_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_130_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_131_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_132_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_133_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_134_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_135_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_136_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_137_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_138_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_139_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_140_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_141_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_142_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_143_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_144_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_145_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_146_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_147_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_148_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_149_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_150_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_151_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_152_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_153_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_154_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_155_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_156_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_157_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_158_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_159_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_160_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_161_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_162_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_163_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_164_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_165_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_166_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_167_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_168_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_169_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_170_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_171_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_172_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_173_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_174_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_175_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_176_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_177_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_178_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_179_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_180_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_181_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_182_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_183_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_184_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_185_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_186_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_187_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_188_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_189_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_190_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_191_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_192_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_193_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_194_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_195_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_196_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_197_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_198_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_199_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_200_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_201_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_202_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_203_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_204_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_205_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_206_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_207_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_208_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_209_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_210_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_211_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_212_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_213_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_214_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_215_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_216_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_217_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_218_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_219_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_220_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_221_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_222_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_223_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_224_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_225_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_226_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_227_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_228_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_229_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_230_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_231_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_232_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_233_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_234_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_235_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_236_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_237_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_238_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_239_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_240_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_241_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_242_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_243_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_244_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_245_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_246_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_247_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_248_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_249_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_250_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_251_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_252_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_253_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_254_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_reg_data_value_reg_255_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_VX_gpr_stage_vx_grp_wrapper_U2 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_0__vx_gpr_U3 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_0__vx_gpr_U4 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_0__vx_gpr_first_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_0__vx_gpr_second_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_1__vx_gpr_U3 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_1__vx_gpr_U4 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_1__vx_gpr_first_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_1__vx_gpr_second_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_2__vx_gpr_U3 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_2__vx_gpr_U4 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_2__vx_gpr_first_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_2__vx_gpr_second_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_3__vx_gpr_U3 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_3__vx_gpr_U4 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_3__vx_gpr_first_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_3__vx_gpr_second_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_4__vx_gpr_U3 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_4__vx_gpr_U4 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_4__vx_gpr_first_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_4__vx_gpr_second_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_5__vx_gpr_U3 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_5__vx_gpr_U4 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_5__vx_gpr_first_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_5__vx_gpr_second_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_6__vx_gpr_U3 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_6__vx_gpr_U4 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_6__vx_gpr_first_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_6__vx_gpr_second_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_7__vx_gpr_U3 + TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_7__vx_gpr_U4 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_7__vx_gpr_first_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_VX_gpr_stage_vx_grp_wrapper_genblk2_7__vx_gpr_second_ram + rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 + b, d +vx_back_end_vx_e_m_reg_U2 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U4 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U5 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_e_m_reg_f_d_reg_U6 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_e_m_reg_f_d_reg_U7 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_e_m_reg_f_d_reg_U8 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U9 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U10 + BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_e_m_reg_f_d_reg_U11 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U12 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U13 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U14 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U15 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U16 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U17 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U18 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U19 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U20 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U21 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U22 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U23 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U24 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U25 + INV_X0P7M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_e_m_reg_f_d_reg_U26 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U27 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U28 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U29 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U30 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U31 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U32 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U33 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U34 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U35 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U36 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U37 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U38 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U39 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U40 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U41 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U42 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U43 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U44 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U45 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U46 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U47 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U48 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U49 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U50 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U51 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U52 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U53 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U54 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U55 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U56 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U57 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U58 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U59 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U60 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U61 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U62 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U63 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U64 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U65 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U66 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U67 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U68 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U69 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U70 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U71 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U72 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U73 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U74 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U75 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U76 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U77 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U78 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U79 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U80 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U81 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U82 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U83 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U84 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U85 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U86 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U87 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U88 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U89 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U90 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U91 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U92 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U93 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U94 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U95 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U96 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U97 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U98 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U99 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U100 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U101 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U102 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U103 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U104 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U105 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U106 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U107 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U108 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U109 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U110 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U111 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U112 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U113 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U114 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U115 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U116 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U117 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U118 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U119 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U120 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U121 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U122 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U123 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U124 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U125 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U126 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U127 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U128 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U129 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U130 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U131 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U132 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U133 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U134 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U135 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U136 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U137 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U138 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U139 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U140 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U141 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U142 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U143 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U144 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U145 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U146 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U147 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U148 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U149 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U150 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U151 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U152 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U153 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U154 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U155 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U156 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U157 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U158 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U159 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U160 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U161 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U162 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U163 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U164 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U165 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U166 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U167 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U168 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U169 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U170 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U171 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U172 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U173 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U174 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U175 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U176 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U177 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U178 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U179 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U180 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U181 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U182 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U183 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U184 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U185 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U186 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U187 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U188 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U189 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U190 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U191 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U192 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U193 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U194 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U195 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U196 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U197 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U198 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U199 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U200 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U201 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U202 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U203 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U204 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U205 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U206 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U207 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U208 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U209 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U210 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U211 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U212 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U213 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U214 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U215 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U216 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U217 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U218 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U219 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U220 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U221 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U222 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U223 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U224 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U225 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U226 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U227 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U228 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U229 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U230 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U231 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U232 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U233 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U234 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U235 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U236 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U237 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U238 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U239 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U240 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U241 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U242 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U243 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U244 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U245 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U246 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U247 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U248 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U249 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U250 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U251 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U252 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U253 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U254 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U255 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U256 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U257 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U258 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U259 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U260 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U261 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U262 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U263 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U264 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U265 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U266 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U267 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U268 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U269 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U270 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U271 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U272 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U273 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U274 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U275 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U276 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U277 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U278 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U279 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U280 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U281 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U282 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U283 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U284 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U285 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U286 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U287 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U288 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U289 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U290 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U291 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U292 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U293 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U294 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U295 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U296 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U297 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U298 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U299 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U300 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U301 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U302 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U303 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U304 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U305 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U306 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U307 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_U308 + NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_10_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_11_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_12_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_13_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_15_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_16_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_17_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_19_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_20_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_21_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_22_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_23_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_25_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_26_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_28_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_29_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_31_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_33_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_35_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_36_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_37_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_38_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_40_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_41_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_76_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_106_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_107_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_108_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_109_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_110_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_111_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_112_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_113_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_114_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_115_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_116_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_117_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_118_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_119_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_120_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_121_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_122_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_123_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_124_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_125_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_126_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_127_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_128_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_129_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_130_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_131_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_132_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_133_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_134_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_135_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_136_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_137_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_138_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_139_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_140_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_141_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_142_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_143_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_144_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_145_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_146_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_147_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_148_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_149_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_150_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_151_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_152_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_153_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_154_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_155_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_156_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_157_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_158_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_159_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_160_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_161_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_162_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_163_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_164_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_165_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_166_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_167_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_168_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_169_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_170_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_171_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_172_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_173_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_174_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_175_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_176_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_177_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_178_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_179_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_180_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_181_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_182_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_183_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_184_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_185_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_186_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_187_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_188_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_189_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_190_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_191_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_192_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_193_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_194_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_195_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_196_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_197_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_198_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_199_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_200_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_201_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_202_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_203_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_204_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_205_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_206_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_207_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_208_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_209_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_210_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_211_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_212_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_213_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_214_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_215_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_216_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_217_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_218_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_219_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_220_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_221_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_222_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_223_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_224_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_225_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_226_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_227_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_228_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_229_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_230_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_231_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_232_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_233_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_251_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_252_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_253_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_254_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_255_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_256_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_257_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_258_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_259_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_260_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_261_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_262_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_263_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_264_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_265_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_266_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_267_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_268_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_269_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_270_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_271_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_272_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_273_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_274_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_275_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_276_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_277_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_278_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_279_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_280_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_281_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_282_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_283_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_284_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_285_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_286_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_287_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_288_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_289_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_290_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_291_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_292_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_293_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_294_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_295_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_296_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_297_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_298_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_299_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_300_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_301_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_302_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_303_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_304_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_305_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_306_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_307_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_308_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_309_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_310_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_311_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_312_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_313_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_314_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_315_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_316_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_317_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_318_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_319_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_320_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_321_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_322_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_323_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_324_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_325_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_326_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_327_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_328_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_329_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_330_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_331_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_332_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_333_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_334_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_335_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_336_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_337_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_338_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_339_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_340_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_341_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_342_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_343_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_344_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_345_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_346_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_347_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_348_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_349_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_350_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_351_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_352_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_353_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_354_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_355_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_356_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_357_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_358_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_359_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_360_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_361_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_362_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_363_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_364_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_365_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_366_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_367_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_368_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_369_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_370_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_371_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_372_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_373_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_374_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_375_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_376_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_377_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_378_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_379_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_380_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_381_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_382_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_383_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_384_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_385_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_386_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_387_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_388_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_389_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_390_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_391_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_392_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_393_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_394_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_395_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_396_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_397_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_398_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_399_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_400_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_401_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_402_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_403_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_404_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_405_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_406_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_407_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_408_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_409_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_410_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_411_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_412_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_413_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_414_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_415_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_416_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_418_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_419_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_420_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_421_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_423_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_424_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_425_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_427_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_428_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_429_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_430_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_431_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_433_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_434_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_436_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_437_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_439_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_441_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_443_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_444_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_445_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_446_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_448_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_449_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_451_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_453_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_455_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_e_m_reg_f_d_reg_value_reg_457_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_back_end_vx_execute_U3 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_back_end_vx_execute_U4 XOR3_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.430000 +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_DP_OP_46J8_122_2672_U32 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_0__vx_alu_U3 + AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_execute_genblk1_0__vx_alu_U4 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_0__vx_alu_U5 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_0__vx_alu_U6 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_DP_OP_46J8_122_2672_U32 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_1__vx_alu_U3 + AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_execute_genblk1_1__vx_alu_U4 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_1__vx_alu_U5 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_1__vx_alu_U6 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_DP_OP_46J8_122_2672_U32 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_2__vx_alu_U3 + AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_execute_genblk1_2__vx_alu_U4 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_2__vx_alu_U5 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_2__vx_alu_U6 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_DP_OP_46J8_122_2672_U32 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_genblk1_3__vx_alu_U3 + AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 +vx_back_end_vx_execute_genblk1_3__vx_alu_U4 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_3__vx_alu_U5 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_genblk1_3__vx_alu_U6 + XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 +vx_back_end_vx_execute_intadd_0_U2 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U3 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U4 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U5 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U6 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U7 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U8 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U9 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U10 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U11 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U12 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U13 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U14 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U15 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U16 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U17 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U18 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U19 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U20 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U21 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U22 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U23 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U24 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U25 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U26 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U27 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U28 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U29 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U30 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U31 + ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 mo, r +vx_back_end_vx_execute_intadd_0_U32 + ADDH_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.782000 mo, r +vx_back_end_vx_writeback_U1 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U2 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U3 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U4 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U5 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U6 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U7 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U8 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U9 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U10 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U11 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U12 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U13 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U14 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U15 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U16 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U17 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U18 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U19 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U20 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U21 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U22 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U23 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U24 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U25 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U26 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U27 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U28 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U29 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U30 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U31 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U32 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U33 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U34 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U35 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U36 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U37 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U38 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U39 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U40 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U41 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U42 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U43 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U44 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U45 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U46 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U47 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U48 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U49 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U50 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U51 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U52 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U53 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U54 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U55 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U56 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U57 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U58 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U59 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U60 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U61 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U62 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U63 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U64 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U65 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U66 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U67 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U68 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U69 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U70 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U71 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U72 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U73 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U74 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U75 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U76 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U77 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U78 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U79 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U80 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U81 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U82 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U83 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U84 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U85 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U86 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U87 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U88 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U89 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U90 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U91 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U92 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U93 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U94 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U95 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U96 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U97 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U98 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U99 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U100 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U101 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U102 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U103 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U104 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U105 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U106 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U107 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U108 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U109 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U110 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U111 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U112 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U113 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U114 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U115 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U116 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U117 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U118 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U119 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U120 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U121 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U122 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U123 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U124 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U125 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U126 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U127 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U128 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U292 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U293 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U294 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U295 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U296 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U297 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U298 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U299 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U300 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U301 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U302 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U303 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U304 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U305 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U306 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U307 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U308 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U309 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U310 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U311 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U312 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U313 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U314 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U315 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U316 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U317 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U318 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U319 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U320 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U321 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U322 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U323 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U324 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U325 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U326 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U327 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U328 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U329 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U330 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U331 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U332 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U333 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U334 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U335 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U336 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U337 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U338 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U339 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U340 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U341 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U342 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U343 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U344 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U345 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U346 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U347 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U348 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U349 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U350 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U351 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U352 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U353 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U354 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U355 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U356 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U357 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U358 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U359 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U360 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U361 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U362 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U363 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U364 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U365 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U366 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U367 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U368 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U369 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U370 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U371 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U372 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U373 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U374 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U375 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U376 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U377 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U378 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U379 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U380 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U381 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U382 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U383 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U384 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U385 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U386 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U387 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U388 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U389 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U390 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U391 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U392 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U393 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U394 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U395 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U396 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U397 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U398 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U399 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U400 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U401 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U402 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U403 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U404 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U405 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U406 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U407 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U408 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U409 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U410 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U411 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U412 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U413 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U414 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U415 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U416 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U417 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U418 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_back_end_vx_writeback_U419 + INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U2 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U3 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U4 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U5 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U6 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U7 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U8 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U9 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U10 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U11 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U12 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U13 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U14 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U15 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U16 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U17 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U18 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U19 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U20 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U21 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U22 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U23 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U24 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U25 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U26 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U27 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U28 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U29 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U30 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U31 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U32 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U33 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U34 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U35 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U36 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U37 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U38 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U39 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U40 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U41 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U42 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U43 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U44 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U45 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U46 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U47 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U48 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U49 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U50 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U51 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U52 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U53 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U54 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U55 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U56 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U57 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U58 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U59 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U60 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U61 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U62 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U63 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U64 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U65 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U66 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U67 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U68 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U69 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U70 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U71 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U72 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U73 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U74 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U75 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U76 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U77 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U78 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U79 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U80 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U81 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U82 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U83 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U84 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U85 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U86 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U87 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U88 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U89 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U90 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U91 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U92 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U93 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U94 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U95 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U96 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U97 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U98 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U99 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U100 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U101 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U102 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U103 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U104 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U105 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U106 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U107 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U108 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U109 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U110 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U111 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U112 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U113 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U114 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U115 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U116 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U117 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U118 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U119 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U120 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U121 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U122 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U123 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U124 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U125 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U126 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U127 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U128 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U129 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U130 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U131 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U132 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U133 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U134 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U135 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U136 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U137 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U138 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1645 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1646 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1647 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1648 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1649 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1650 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1651 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1653 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1654 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1655 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1656 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1657 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1658 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1659 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1660 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1661 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1662 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1663 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1664 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1665 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1666 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1668 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1669 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1670 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1671 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1672 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1673 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1674 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1675 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1676 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1677 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1678 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1679 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1680 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1681 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1683 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1684 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1685 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1686 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1687 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1688 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1689 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1690 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1691 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1692 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1693 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1694 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1695 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1696 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1698 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1699 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1700 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1701 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1702 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1703 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1704 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1705 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1706 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1707 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1708 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1709 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1710 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1711 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1713 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1714 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1715 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1716 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1717 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1718 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1719 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1720 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1721 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1722 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1723 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1724 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1725 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1726 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1728 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1729 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1730 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1731 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1732 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1733 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1734 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1735 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1736 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1737 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1738 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1739 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1740 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1741 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1743 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1744 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1745 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1746 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1747 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1748 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1749 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1750 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1751 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1752 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1753 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1754 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1755 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1756 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1758 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1759 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1760 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1761 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1762 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1763 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1764 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1765 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1766 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1767 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1768 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1769 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1770 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1771 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1772 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1773 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1774 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1775 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1776 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1777 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1778 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1779 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1780 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1781 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1782 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1783 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1784 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1785 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1786 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1787 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1788 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1789 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1790 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1791 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1792 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1793 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1794 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1795 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1796 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1797 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1798 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1799 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1800 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1801 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1802 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1803 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1804 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1805 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1806 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1807 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1808 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1809 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1810 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1811 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1812 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1813 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1814 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1815 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1816 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1817 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1818 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1819 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1820 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1821 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1822 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1823 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1824 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1825 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1826 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1827 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1828 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1829 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1830 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1831 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1832 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1833 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1834 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1835 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1836 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1837 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1838 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1839 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1840 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1841 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1842 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1843 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1844 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1845 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1846 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1847 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1848 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1849 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1850 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1851 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1852 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1853 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1854 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1855 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1856 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1857 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1858 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1859 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1860 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1861 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1862 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1863 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1864 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1865 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1866 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1867 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1868 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1869 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1870 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1871 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1872 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1873 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1874 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1875 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1876 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1877 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1878 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1879 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1880 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1881 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1882 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1883 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1884 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1885 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1886 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1887 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1888 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1889 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1890 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1891 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1892 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1893 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1894 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1895 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1896 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1897 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1898 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_forwarding_U1899 INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_front_end_U2 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_d_e_reg_U1 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_d_e_reg_d_e_reg_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_d_e_reg_d_e_reg_U4 + INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 +vx_front_end_vx_d_e_reg_d_e_reg_value_reg_127_ + DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 n +vx_front_end_vx_decode_U3 TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_decode_U4 TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_decode_temp_branch_type_reg_0_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_branch_type_reg_1_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_branch_type_reg_2_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_0_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_1_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_2_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_3_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_4_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_5_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_6_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_7_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_8_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_9_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_10_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_11_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_12_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_13_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_14_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_15_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_16_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_17_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_18_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_19_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_20_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_21_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_22_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_23_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_24_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_25_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_26_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_27_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_28_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_29_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_30_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_offset_reg_31_ + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_decode_temp_jal_reg + LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 n +vx_front_end_vx_f_d_reg_U2 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_f_d_reg_f_d_reg_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +vx_front_end_vx_fetch_warp_scheduler_U3 + TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 +-------------------------------------------------------------------------------- +Total 1804 cells 148603.391213 +1 +report_reference + +**************************************** +Report : reference +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 14:22:10 2019 +**************************************** + +Attributes: + b - black box (unknown) + bo - allows boundary optimization + d - dont_touch + mo - map_only + h - hierarchical + n - noncombinational + r - removable + s - synthetic operator + u - contains unmapped logic + +Reference Library Unit Area Count Total Area Attributes +----------------------------------------------------------------------------- +ADDF_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 150 413.099992 r +ADDH_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.782000 1 1.782000 r +AND2_X0P5B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 4 3.240000 +BUF_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 4 2.592000 +DFFQL_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.754000 605 1666.169969 n +INV_X0P6B_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 516 250.776001 +INV_X0P6M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 128 62.208000 +INV_X0P7M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.486000 1 0.486000 +LATQ_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.620000 36 58.320000 n +NOR2B_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.810000 297 240.570001 +TIEHI_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 9 5.832000 +TIELO_X1M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 0.648000 24 15.552000 +XOR2_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 1.296000 12 15.552000 +XOR3_X0P5M_A12TUL_C35 + sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c + 2.430000 1 2.430000 +rf2_32x128_wm1 rf_2p_hce_ss_0p81v_0p81v_125c + 9116.548828 16 145864.781250 b, d +----------------------------------------------------------------------------- +Total 15 references 148603.391213 +1 +report_port + +**************************************** +Report : port +Design : Vortex +Version: O-2018.06-SP4 +Date : Thu Oct 17 14:22:10 2019 +**************************************** + + + +Attributes: + i - ideal_network + + Pin Wire Max Max Connection +Port Dir Load Load Trans Cap Class Attrs +-------------------------------------------------------------------------------- +clk in 0.0000 0.0000 -- -- -- i +icache_response_instruction_0_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_1_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_2_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_3_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_4_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_5_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_6_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_7_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_8_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_9_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_10_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_11_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_12_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_13_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_14_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_15_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_16_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_17_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_18_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_19_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_20_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_21_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_22_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_23_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_24_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_25_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_26_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_27_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_28_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_29_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_30_ + in 0.0000 0.0000 -- -- -- +icache_response_instruction_31_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__0_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__1_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__2_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__3_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__4_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__5_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__6_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__7_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__8_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__9_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__10_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__11_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__12_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__13_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__14_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__15_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__16_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__17_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__18_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__19_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__20_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__21_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__22_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__23_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__24_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__25_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__26_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__27_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__28_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__29_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__30_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_0__31_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__0_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__1_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__2_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__3_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__4_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__5_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__6_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__7_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__8_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__9_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__10_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__11_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__12_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__13_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__14_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__15_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__16_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__17_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__18_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__19_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__20_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__21_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__22_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__23_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__24_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__25_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__26_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__27_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__28_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__29_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__30_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_1__31_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__0_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__1_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__2_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__3_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__4_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__5_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__6_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__7_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__8_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__9_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__10_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__11_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__12_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__13_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__14_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__15_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__16_ + in 0.0000 0.0000 -- -- -- +in_cache_driver_out_data_2__17_ + in 0.0000 0.0000 -- -- -- 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+out_cache_driver_in_data_2__12_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__13_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__14_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__15_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__16_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__17_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__18_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__19_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__20_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__21_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__22_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__23_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__24_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__25_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__26_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__27_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__28_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__29_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__30_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_2__31_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__3_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__4_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__5_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__6_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__7_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__8_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__9_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__10_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__11_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__12_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__13_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__14_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__15_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__16_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__17_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__18_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__19_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__20_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__21_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__22_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__23_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__24_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__25_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__26_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__27_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__28_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__29_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__30_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_data_3__31_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_read_0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_read_1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_read_2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_write_0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_write_1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_mem_write_2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_valid_0_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_valid_1_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_valid_2_ + out 0.0000 0.0000 -- -- -- +out_cache_driver_in_valid_3_ + out 0.0000 0.0000 -- -- -- +out_ebreak out 0.0000 0.0000 -- -- -- + +1 +write -hierarchy -format verilog -output Vortex.netlist.v +Writing verilog file '/home/gtcad9/lzhu308/work/projects/vortex/design/Vortex/syn/Vortex.netlist.v'. +Warning: Verilog 'assign' or 'tran' statements are written out. (VO-4) +1 +remove_ideal_network [get_ports clk] +1 +set_propagated_clock [get_ports clk] +Information: set_input_delay values are added to the propagated clock skew. (TIM-113) +1 +write_sdc -version 1.9 Vortex.sdc +1 +exit + +Thank you... From 84d321a51739436ac3bf06a7f7ea9ec1bc4715ae Mon Sep 17 00:00:00 2001 From: Lingjun Zhu Date: Thu, 17 Oct 2019 15:38:48 -0400 Subject: [PATCH 4/4] Create the memory blocks with CLN28HPM --- .../rf2_32x128_wm1/rf2_32x128_wm1.bitmap | 33 + .../rf2_32x128_wm1/rf2_32x128_wm1.cpf | 69 + .../rf2_32x128_wm1/rf2_32x128_wm1.ctl | 1307 + .../rf2_32x128_wm1/rf2_32x128_wm1.lef | 30569 +++++++ .../rf2_32x128_wm1/rf2_32x128_wm1.mdt | 2704 + .../rf2_32x128_wm1/rf2_32x128_wm1.memlib | 357 + .../cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.tv | 2411 + .../cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v | 29949 +++++++ .../rf2_32x128_wm1/rf2_32x128_wm1_antenna.clf | 1121 + .../rf2_32x128_wm1_ff_0p99v_0p99v_125c.avm | 162 + .../rf2_32x128_wm1_ff_0p99v_0p99v_125c.dat | 334 + .../rf2_32x128_wm1_ff_0p99v_0p99v_125c.lib | 71102 ++++++++++++++++ .../rf2_32x128_wm1_ff_0p99v_0p99v_125c.ps | 5472 ++ .../rf2_32x128_wm1/rf2_32x128_wm1_rtl.v | 275 + .../rf2_32x128_wm1_ss_0p81v_0p81v_m40c.avm | 162 + .../rf2_32x128_wm1_ss_0p81v_0p81v_m40c.dat | 334 + .../rf2_32x128_wm1_ss_0p81v_0p81v_m40c.lib | 71102 ++++++++++++++++ .../rf2_32x128_wm1_ss_0p81v_0p81v_m40c.ps | 5472 ++ .../rf2_32x128_wm1_tt_0p90v_0p90v_25c.avm | 162 + .../rf2_32x128_wm1_tt_0p90v_0p90v_25c.dat | 334 + .../rf2_32x128_wm1_tt_0p90v_0p90v_25c.lib | 71102 ++++++++++++++++ .../rf2_32x128_wm1_tt_0p90v_0p90v_25c.ps | 5472 ++ 22 files changed, 300005 insertions(+) create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.bitmap create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.cpf create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.ctl create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.lef create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.mdt create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.memlib create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.tv create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_antenna.clf create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.avm create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.dat create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.lib create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.ps create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_rtl.v create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.avm create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.dat create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.lib create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.ps create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.avm create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.dat create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.lib create mode 100644 models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.ps diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.bitmap b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.bitmap new file mode 100644 index 00000000..8490754e --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.bitmap @@ -0,0 +1,33 @@ +#address bit[0] bit[0]_ bit[1] bit[1]_ bit[2] bit[2]_ bit[3] bit[3]_ bit[4] bit[4]_ bit[5] bit[5]_ bit[6] bit[6]_ bit[7] bit[7]_ bit[8] bit[8]_ bit[9] bit[9]_ bit[10] bit[10]_ bit[11] bit[11]_ bit[12] bit[12]_ bit[13] bit[13]_ bit[14] bit[14]_ bit[15] bit[15]_ bit[16] bit[16]_ bit[17] bit[17]_ bit[18] bit[18]_ bit[19] bit[19]_ bit[20] bit[20]_ bit[21] bit[21]_ bit[22] bit[22]_ bit[23] bit[23]_ bit[24] bit[24]_ bit[25] bit[25]_ bit[26] bit[26]_ bit[27] bit[27]_ bit[28] bit[28]_ bit[29] bit[29]_ bit[30] bit[30]_ bit[31] bit[31]_ bit[32] bit[32]_ bit[33] bit[33]_ bit[34] bit[34]_ bit[35] bit[35]_ bit[36] bit[36]_ bit[37] bit[37]_ bit[38] bit[38]_ bit[39] bit[39]_ bit[40] bit[40]_ bit[41] bit[41]_ bit[42] bit[42]_ bit[43] bit[43]_ bit[44] bit[44]_ bit[45] bit[45]_ bit[46] bit[46]_ bit[47] bit[47]_ bit[48] bit[48]_ bit[49] bit[49]_ bit[50] bit[50]_ bit[51] bit[51]_ bit[52] bit[52]_ bit[53] bit[53]_ bit[54] bit[54]_ bit[55] bit[55]_ bit[56] bit[56]_ bit[57] bit[57]_ bit[58] bit[58]_ bit[59] bit[59]_ bit[60] bit[60]_ bit[61] bit[61]_ bit[62] bit[62]_ bit[63] bit[63]_ bit[64] bit[64]_ bit[65] bit[65]_ bit[66] bit[66]_ bit[67] bit[67]_ bit[68] bit[68]_ bit[69] bit[69]_ bit[70] bit[70]_ bit[71] bit[71]_ bit[72] bit[72]_ bit[73] bit[73]_ bit[74] bit[74]_ bit[75] bit[75]_ bit[76] bit[76]_ bit[77] bit[77]_ bit[78] bit[78]_ bit[79] bit[79]_ bit[80] bit[80]_ bit[81] bit[81]_ bit[82] bit[82]_ bit[83] bit[83]_ bit[84] bit[84]_ bit[85] bit[85]_ bit[86] bit[86]_ bit[87] bit[87]_ bit[88] bit[88]_ bit[89] bit[89]_ bit[90] bit[90]_ bit[91] bit[91]_ bit[92] bit[92]_ bit[93] bit[93]_ bit[94] bit[94]_ bit[95] bit[95]_ bit[96] bit[96]_ bit[97] bit[97]_ bit[98] bit[98]_ bit[99] bit[99]_ bit[100] bit[100]_ bit[101] bit[101]_ bit[102] bit[102]_ bit[103] bit[103]_ bit[104] bit[104]_ bit[105] bit[105]_ bit[106] bit[106]_ bit[107] bit[107]_ bit[108] bit[108]_ bit[109] bit[109]_ bit[110] bit[110]_ bit[111] bit[111]_ bit[112] bit[112]_ bit[113] bit[113]_ bit[114] bit[114]_ bit[115] bit[115]_ bit[116] bit[116]_ bit[117] bit[117]_ bit[118] bit[118]_ bit[119] bit[119]_ bit[120] bit[120]_ bit[121] bit[121]_ bit[122] bit[122]_ bit[123] bit[123]_ bit[124] bit[124]_ bit[125] bit[125]_ bit[126] bit[126]_ bit[127] bit[127]_ +00000 15.175,2.960 15.275,3.030 15.175,5.840 15.275,5.910 15.175,8.720 15.275,8.790 15.175,11.600 15.275,11.670 15.175,14.480 15.275,14.550 15.175,17.360 15.275,17.430 15.175,20.240 15.275,20.310 15.175,23.120 15.275,23.190 15.175,26.000 15.275,26.070 15.175,28.880 15.275,28.950 15.175,31.760 15.275,31.830 15.175,34.640 15.275,34.710 15.175,37.520 15.275,37.590 15.175,40.400 15.275,40.470 15.175,43.280 15.275,43.350 15.175,46.160 15.275,46.230 15.175,49.040 15.275,49.110 15.175,51.920 15.275,51.990 15.175,54.800 15.275,54.870 15.175,57.680 15.275,57.750 15.175,60.560 15.275,60.630 15.175,63.440 15.275,63.510 15.175,66.320 15.275,66.390 15.175,69.200 15.275,69.270 15.175,72.080 15.275,72.150 15.175,74.960 15.275,75.030 15.175,77.840 15.275,77.910 15.175,80.720 15.275,80.790 15.175,83.600 15.275,83.670 15.175,86.480 15.275,86.550 15.175,89.360 15.275,89.430 15.175,92.240 15.275,92.310 15.175,95.120 15.275,95.190 15.175,98.000 15.275,98.070 15.175,100.880 15.275,100.950 15.175,103.760 15.275,103.830 15.175,106.640 15.275,106.710 15.175,109.520 15.275,109.590 15.175,112.400 15.275,112.470 15.175,115.280 15.275,115.350 15.175,118.160 15.275,118.230 15.175,121.040 15.275,121.110 15.175,123.920 15.275,123.990 15.175,126.800 15.275,126.870 15.175,129.680 15.275,129.750 15.175,132.560 15.275,132.630 15.175,135.440 15.275,135.510 15.175,138.320 15.275,138.390 15.175,141.200 15.275,141.270 15.175,144.080 15.275,144.150 15.175,146.960 15.275,147.030 15.175,149.840 15.275,149.910 15.175,152.720 15.275,152.790 15.175,155.600 15.275,155.670 15.175,158.480 15.275,158.550 15.175,161.360 15.275,161.430 15.175,164.240 15.275,164.310 15.175,167.120 15.275,167.190 15.175,170.000 15.275,170.070 15.175,172.880 15.275,172.950 15.175,175.760 15.275,175.830 15.175,178.640 15.275,178.710 15.175,181.520 15.275,181.590 15.175,184.400 15.275,184.470 15.175,230.460 15.275,230.390 15.175,233.340 15.275,233.270 15.175,236.220 15.275,236.150 15.175,239.100 15.275,239.030 15.175,241.980 15.275,241.910 15.175,244.860 15.275,244.790 15.175,247.740 15.275,247.670 15.175,250.620 15.275,250.550 15.175,253.500 15.275,253.430 15.175,256.380 15.275,256.310 15.175,259.260 15.275,259.190 15.175,262.140 15.275,262.070 15.175,265.020 15.275,264.950 15.175,267.900 15.275,267.830 15.175,270.780 15.275,270.710 15.175,273.660 15.275,273.590 15.175,276.540 15.275,276.470 15.175,279.420 15.275,279.350 15.175,282.300 15.275,282.230 15.175,285.180 15.275,285.110 15.175,288.060 15.275,287.990 15.175,290.940 15.275,290.870 15.175,293.820 15.275,293.750 15.175,296.700 15.275,296.630 15.175,299.580 15.275,299.510 15.175,302.460 15.275,302.390 15.175,305.340 15.275,305.270 15.175,308.220 15.275,308.150 15.175,311.100 15.275,311.030 15.175,313.980 15.275,313.910 15.175,316.860 15.275,316.790 15.175,319.740 15.275,319.670 15.175,322.620 15.275,322.550 15.175,325.500 15.275,325.430 15.175,328.380 15.275,328.310 15.175,331.260 15.275,331.190 15.175,334.140 15.275,334.070 15.175,337.020 15.275,336.950 15.175,339.900 15.275,339.830 15.175,342.780 15.275,342.710 15.175,345.660 15.275,345.590 15.175,348.540 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18.685,292.380 18.785,295.190 18.685,295.260 18.785,298.070 18.685,298.140 18.785,300.950 18.685,301.020 18.785,303.830 18.685,303.900 18.785,306.710 18.685,306.780 18.785,309.590 18.685,309.660 18.785,312.470 18.685,312.540 18.785,315.350 18.685,315.420 18.785,318.230 18.685,318.300 18.785,321.110 18.685,321.180 18.785,323.990 18.685,324.060 18.785,326.870 18.685,326.940 18.785,329.750 18.685,329.820 18.785,332.630 18.685,332.700 18.785,335.510 18.685,335.580 18.785,338.390 18.685,338.460 18.785,341.270 18.685,341.340 18.785,344.150 18.685,344.220 18.785,347.030 18.685,347.100 18.785,349.910 18.685,349.980 18.785,352.790 18.685,352.860 18.785,355.670 18.685,355.740 18.785,358.550 18.685,358.620 18.785,361.430 18.685,361.500 18.785,364.310 18.685,364.380 18.785,367.190 18.685,367.260 18.785,370.070 18.685,370.140 18.785,372.950 18.685,373.020 18.785,375.830 18.685,375.900 18.785,378.710 18.685,378.780 18.785,381.590 18.685,381.660 18.785,384.470 18.685,384.540 18.785,387.350 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19.055,75.030 18.955,77.840 19.055,77.910 18.955,80.720 19.055,80.790 18.955,83.600 19.055,83.670 18.955,86.480 19.055,86.550 18.955,89.360 19.055,89.430 18.955,92.240 19.055,92.310 18.955,95.120 19.055,95.190 18.955,98.000 19.055,98.070 18.955,100.880 19.055,100.950 18.955,103.760 19.055,103.830 18.955,106.640 19.055,106.710 18.955,109.520 19.055,109.590 18.955,112.400 19.055,112.470 18.955,115.280 19.055,115.350 18.955,118.160 19.055,118.230 18.955,121.040 19.055,121.110 18.955,123.920 19.055,123.990 18.955,126.800 19.055,126.870 18.955,129.680 19.055,129.750 18.955,132.560 19.055,132.630 18.955,135.440 19.055,135.510 18.955,138.320 19.055,138.390 18.955,141.200 19.055,141.270 18.955,144.080 19.055,144.150 18.955,146.960 19.055,147.030 18.955,149.840 19.055,149.910 18.955,152.720 19.055,152.790 18.955,155.600 19.055,155.670 18.955,158.480 19.055,158.550 18.955,161.360 19.055,161.430 18.955,164.240 19.055,164.310 18.955,167.120 19.055,167.190 18.955,170.000 19.055,170.070 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18.955,311.100 19.055,311.030 18.955,313.980 19.055,313.910 18.955,316.860 19.055,316.790 18.955,319.740 19.055,319.670 18.955,322.620 19.055,322.550 18.955,325.500 19.055,325.430 18.955,328.380 19.055,328.310 18.955,331.260 19.055,331.190 18.955,334.140 19.055,334.070 18.955,337.020 19.055,336.950 18.955,339.900 19.055,339.830 18.955,342.780 19.055,342.710 18.955,345.660 19.055,345.590 18.955,348.540 19.055,348.470 18.955,351.420 19.055,351.350 18.955,354.300 19.055,354.230 18.955,357.180 19.055,357.110 18.955,360.060 19.055,359.990 18.955,362.940 19.055,362.870 18.955,365.820 19.055,365.750 18.955,368.700 19.055,368.630 18.955,371.580 19.055,371.510 18.955,374.460 19.055,374.390 18.955,377.340 19.055,377.270 18.955,380.220 19.055,380.150 18.955,383.100 19.055,383.030 18.955,385.980 19.055,385.910 18.955,388.860 19.055,388.790 18.955,391.740 19.055,391.670 18.955,394.620 19.055,394.550 18.955,397.500 19.055,397.430 18.955,400.380 19.055,400.310 18.955,403.260 19.055,403.190 18.955,406.140 19.055,406.070 18.955,409.020 19.055,408.950 18.955,411.900 19.055,411.830 +0001D 18.955,1.590 19.055,1.520 18.955,4.470 19.055,4.400 18.955,7.350 19.055,7.280 18.955,10.230 19.055,10.160 18.955,13.110 19.055,13.040 18.955,15.990 19.055,15.920 18.955,18.870 19.055,18.800 18.955,21.750 19.055,21.680 18.955,24.630 19.055,24.560 18.955,27.510 19.055,27.440 18.955,30.390 19.055,30.320 18.955,33.270 19.055,33.200 18.955,36.150 19.055,36.080 18.955,39.030 19.055,38.960 18.955,41.910 19.055,41.840 18.955,44.790 19.055,44.720 18.955,47.670 19.055,47.600 18.955,50.550 19.055,50.480 18.955,53.430 19.055,53.360 18.955,56.310 19.055,56.240 18.955,59.190 19.055,59.120 18.955,62.070 19.055,62.000 18.955,64.950 19.055,64.880 18.955,67.830 19.055,67.760 18.955,70.710 19.055,70.640 18.955,73.590 19.055,73.520 18.955,76.470 19.055,76.400 18.955,79.350 19.055,79.280 18.955,82.230 19.055,82.160 18.955,85.110 19.055,85.040 18.955,87.990 19.055,87.920 18.955,90.870 19.055,90.800 18.955,93.750 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18.955,332.630 19.055,332.700 18.955,335.510 19.055,335.580 18.955,338.390 19.055,338.460 18.955,341.270 19.055,341.340 18.955,344.150 19.055,344.220 18.955,347.030 19.055,347.100 18.955,349.910 19.055,349.980 18.955,352.790 19.055,352.860 18.955,355.670 19.055,355.740 18.955,358.550 19.055,358.620 18.955,361.430 19.055,361.500 18.955,364.310 19.055,364.380 18.955,367.190 19.055,367.260 18.955,370.070 19.055,370.140 18.955,372.950 19.055,373.020 18.955,375.830 19.055,375.900 18.955,378.710 19.055,378.780 18.955,381.590 19.055,381.660 18.955,384.470 19.055,384.540 18.955,387.350 19.055,387.420 18.955,390.230 19.055,390.300 18.955,393.110 19.055,393.180 18.955,395.990 19.055,396.060 18.955,398.870 19.055,398.940 18.955,401.750 19.055,401.820 18.955,404.630 19.055,404.700 18.955,407.510 19.055,407.580 18.955,410.390 19.055,410.460 18.955,413.270 19.055,413.340 +0001E 19.325,2.960 19.225,3.030 19.325,5.840 19.225,5.910 19.325,8.720 19.225,8.790 19.325,11.600 19.225,11.670 19.325,14.480 19.225,14.550 19.325,17.360 19.225,17.430 19.325,20.240 19.225,20.310 19.325,23.120 19.225,23.190 19.325,26.000 19.225,26.070 19.325,28.880 19.225,28.950 19.325,31.760 19.225,31.830 19.325,34.640 19.225,34.710 19.325,37.520 19.225,37.590 19.325,40.400 19.225,40.470 19.325,43.280 19.225,43.350 19.325,46.160 19.225,46.230 19.325,49.040 19.225,49.110 19.325,51.920 19.225,51.990 19.325,54.800 19.225,54.870 19.325,57.680 19.225,57.750 19.325,60.560 19.225,60.630 19.325,63.440 19.225,63.510 19.325,66.320 19.225,66.390 19.325,69.200 19.225,69.270 19.325,72.080 19.225,72.150 19.325,74.960 19.225,75.030 19.325,77.840 19.225,77.910 19.325,80.720 19.225,80.790 19.325,83.600 19.225,83.670 19.325,86.480 19.225,86.550 19.325,89.360 19.225,89.430 19.325,92.240 19.225,92.310 19.325,95.120 19.225,95.190 19.325,98.000 19.225,98.070 19.325,100.880 19.225,100.950 19.325,103.760 19.225,103.830 19.325,106.640 19.225,106.710 19.325,109.520 19.225,109.590 19.325,112.400 19.225,112.470 19.325,115.280 19.225,115.350 19.325,118.160 19.225,118.230 19.325,121.040 19.225,121.110 19.325,123.920 19.225,123.990 19.325,126.800 19.225,126.870 19.325,129.680 19.225,129.750 19.325,132.560 19.225,132.630 19.325,135.440 19.225,135.510 19.325,138.320 19.225,138.390 19.325,141.200 19.225,141.270 19.325,144.080 19.225,144.150 19.325,146.960 19.225,147.030 19.325,149.840 19.225,149.910 19.325,152.720 19.225,152.790 19.325,155.600 19.225,155.670 19.325,158.480 19.225,158.550 19.325,161.360 19.225,161.430 19.325,164.240 19.225,164.310 19.325,167.120 19.225,167.190 19.325,170.000 19.225,170.070 19.325,172.880 19.225,172.950 19.325,175.760 19.225,175.830 19.325,178.640 19.225,178.710 19.325,181.520 19.225,181.590 19.325,184.400 19.225,184.470 19.325,230.460 19.225,230.390 19.325,233.340 19.225,233.270 19.325,236.220 19.225,236.150 19.325,239.100 19.225,239.030 19.325,241.980 19.225,241.910 19.325,244.860 19.225,244.790 19.325,247.740 19.225,247.670 19.325,250.620 19.225,250.550 19.325,253.500 19.225,253.430 19.325,256.380 19.225,256.310 19.325,259.260 19.225,259.190 19.325,262.140 19.225,262.070 19.325,265.020 19.225,264.950 19.325,267.900 19.225,267.830 19.325,270.780 19.225,270.710 19.325,273.660 19.225,273.590 19.325,276.540 19.225,276.470 19.325,279.420 19.225,279.350 19.325,282.300 19.225,282.230 19.325,285.180 19.225,285.110 19.325,288.060 19.225,287.990 19.325,290.940 19.225,290.870 19.325,293.820 19.225,293.750 19.325,296.700 19.225,296.630 19.325,299.580 19.225,299.510 19.325,302.460 19.225,302.390 19.325,305.340 19.225,305.270 19.325,308.220 19.225,308.150 19.325,311.100 19.225,311.030 19.325,313.980 19.225,313.910 19.325,316.860 19.225,316.790 19.325,319.740 19.225,319.670 19.325,322.620 19.225,322.550 19.325,325.500 19.225,325.430 19.325,328.380 19.225,328.310 19.325,331.260 19.225,331.190 19.325,334.140 19.225,334.070 19.325,337.020 19.225,336.950 19.325,339.900 19.225,339.830 19.325,342.780 19.225,342.710 19.325,345.660 19.225,345.590 19.325,348.540 19.225,348.470 19.325,351.420 19.225,351.350 19.325,354.300 19.225,354.230 19.325,357.180 19.225,357.110 19.325,360.060 19.225,359.990 19.325,362.940 19.225,362.870 19.325,365.820 19.225,365.750 19.325,368.700 19.225,368.630 19.325,371.580 19.225,371.510 19.325,374.460 19.225,374.390 19.325,377.340 19.225,377.270 19.325,380.220 19.225,380.150 19.325,383.100 19.225,383.030 19.325,385.980 19.225,385.910 19.325,388.860 19.225,388.790 19.325,391.740 19.225,391.670 19.325,394.620 19.225,394.550 19.325,397.500 19.225,397.430 19.325,400.380 19.225,400.310 19.325,403.260 19.225,403.190 19.325,406.140 19.225,406.070 19.325,409.020 19.225,408.950 19.325,411.900 19.225,411.830 +0001F 19.325,1.590 19.225,1.520 19.325,4.470 19.225,4.400 19.325,7.350 19.225,7.280 19.325,10.230 19.225,10.160 19.325,13.110 19.225,13.040 19.325,15.990 19.225,15.920 19.325,18.870 19.225,18.800 19.325,21.750 19.225,21.680 19.325,24.630 19.225,24.560 19.325,27.510 19.225,27.440 19.325,30.390 19.225,30.320 19.325,33.270 19.225,33.200 19.325,36.150 19.225,36.080 19.325,39.030 19.225,38.960 19.325,41.910 19.225,41.840 19.325,44.790 19.225,44.720 19.325,47.670 19.225,47.600 19.325,50.550 19.225,50.480 19.325,53.430 19.225,53.360 19.325,56.310 19.225,56.240 19.325,59.190 19.225,59.120 19.325,62.070 19.225,62.000 19.325,64.950 19.225,64.880 19.325,67.830 19.225,67.760 19.325,70.710 19.225,70.640 19.325,73.590 19.225,73.520 19.325,76.470 19.225,76.400 19.325,79.350 19.225,79.280 19.325,82.230 19.225,82.160 19.325,85.110 19.225,85.040 19.325,87.990 19.225,87.920 19.325,90.870 19.225,90.800 19.325,93.750 19.225,93.680 19.325,96.630 19.225,96.560 19.325,99.510 19.225,99.440 19.325,102.390 19.225,102.320 19.325,105.270 19.225,105.200 19.325,108.150 19.225,108.080 19.325,111.030 19.225,110.960 19.325,113.910 19.225,113.840 19.325,116.790 19.225,116.720 19.325,119.670 19.225,119.600 19.325,122.550 19.225,122.480 19.325,125.430 19.225,125.360 19.325,128.310 19.225,128.240 19.325,131.190 19.225,131.120 19.325,134.070 19.225,134.000 19.325,136.950 19.225,136.880 19.325,139.830 19.225,139.760 19.325,142.710 19.225,142.640 19.325,145.590 19.225,145.520 19.325,148.470 19.225,148.400 19.325,151.350 19.225,151.280 19.325,154.230 19.225,154.160 19.325,157.110 19.225,157.040 19.325,159.990 19.225,159.920 19.325,162.870 19.225,162.800 19.325,165.750 19.225,165.680 19.325,168.630 19.225,168.560 19.325,171.510 19.225,171.440 19.325,174.390 19.225,174.320 19.325,177.270 19.225,177.200 19.325,180.150 19.225,180.080 19.325,183.030 19.225,182.960 19.325,231.830 19.225,231.900 19.325,234.710 19.225,234.780 19.325,237.590 19.225,237.660 19.325,240.470 19.225,240.540 19.325,243.350 19.225,243.420 19.325,246.230 19.225,246.300 19.325,249.110 19.225,249.180 19.325,251.990 19.225,252.060 19.325,254.870 19.225,254.940 19.325,257.750 19.225,257.820 19.325,260.630 19.225,260.700 19.325,263.510 19.225,263.580 19.325,266.390 19.225,266.460 19.325,269.270 19.225,269.340 19.325,272.150 19.225,272.220 19.325,275.030 19.225,275.100 19.325,277.910 19.225,277.980 19.325,280.790 19.225,280.860 19.325,283.670 19.225,283.740 19.325,286.550 19.225,286.620 19.325,289.430 19.225,289.500 19.325,292.310 19.225,292.380 19.325,295.190 19.225,295.260 19.325,298.070 19.225,298.140 19.325,300.950 19.225,301.020 19.325,303.830 19.225,303.900 19.325,306.710 19.225,306.780 19.325,309.590 19.225,309.660 19.325,312.470 19.225,312.540 19.325,315.350 19.225,315.420 19.325,318.230 19.225,318.300 19.325,321.110 19.225,321.180 19.325,323.990 19.225,324.060 19.325,326.870 19.225,326.940 19.325,329.750 19.225,329.820 19.325,332.630 19.225,332.700 19.325,335.510 19.225,335.580 19.325,338.390 19.225,338.460 19.325,341.270 19.225,341.340 19.325,344.150 19.225,344.220 19.325,347.030 19.225,347.100 19.325,349.910 19.225,349.980 19.325,352.790 19.225,352.860 19.325,355.670 19.225,355.740 19.325,358.550 19.225,358.620 19.325,361.430 19.225,361.500 19.325,364.310 19.225,364.380 19.325,367.190 19.225,367.260 19.325,370.070 19.225,370.140 19.325,372.950 19.225,373.020 19.325,375.830 19.225,375.900 19.325,378.710 19.225,378.780 19.325,381.590 19.225,381.660 19.325,384.470 19.225,384.540 19.325,387.350 19.225,387.420 19.325,390.230 19.225,390.300 19.325,393.110 19.225,393.180 19.325,395.990 19.225,396.060 19.325,398.870 19.225,398.940 19.325,401.750 19.225,401.820 19.325,404.630 19.225,404.700 19.325,407.510 19.225,407.580 19.325,410.390 19.225,410.460 19.325,413.270 19.225,413.340 diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.cpf b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.cpf new file mode 100644 index 00000000..dead889b --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.cpf @@ -0,0 +1,69 @@ +# cpf_memcomp Version: 4.0.6-EAC +# common_memcomp Version: c0.1.0-EAC +# lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# CPF Macro-Model for High Density Two Port Register File SVT MVT Compiler +# +# Instance Name: rf2_32x128_wm1 +# Words: 32 +# Bits: 128 +# Mux: 2 +# Drive: 6 +# Write Mask: On +# Write Thru: Off +# Extra Margin Adjustment: On +# Test Muxes On +# Power Gating: Off +# Retention: On +# Pipeline: Off +# Read Disturb Test: Off +# +# Creation Date: Thu Oct 17 15:29:56 2019 +# Version: r4p0 +# +set_cpf_version 1.1 +set_macro_model rf2_32x128_wm1 + +#The Voltages Specified in this macro-model not real. They are dummy values suggested by Cadence. +create_nominal_condition -name nc_on -voltage 1 -ground_voltage 0.0 -state on +create_nominal_condition -name nc_off -voltage 0.0 -ground_voltage 0.0 -state off + +create_power_domain -name PDPE -default \ + -boundary_ports { CENYA AYA[*] CENYB WENYB[*] AYB[*] QA[*] SOA[*] SOB[*] CLKA CENA AA[*] CLKB CENB WENB[*] AB[*] DB[*] EMAA[*] EMASA EMAB[*] TENA TCENA TAA[*] TENB TCENB TWENB[*] TAB[*] TDB[*] SIA[*] SEA DFTRAMBYP SIB[*] SEB COLLDISN } \ + -instances { clk0_int CENA_int AA_int[4] AA_int[3] AA_int[2] AA_int[1] AA_int[0] clk1_int CENB_int WENB_int[127] WENB_int[126] WENB_int[125] WENB_int[124] WENB_int[123] WENB_int[122] WENB_int[121] WENB_int[120] WENB_int[119] WENB_int[118] WENB_int[117] WENB_int[116] WENB_int[115] WENB_int[114] WENB_int[113] WENB_int[112] WENB_int[111] WENB_int[110] WENB_int[109] WENB_int[108] WENB_int[107] WENB_int[106] WENB_int[105] WENB_int[104] WENB_int[103] WENB_int[102] WENB_int[101] WENB_int[100] WENB_int[99] WENB_int[98] WENB_int[97] WENB_int[96] WENB_int[95] WENB_int[94] WENB_int[93] WENB_int[92] WENB_int[91] WENB_int[90] WENB_int[89] WENB_int[88] WENB_int[87] WENB_int[86] WENB_int[85] WENB_int[84] WENB_int[83] WENB_int[82] WENB_int[81] WENB_int[80] WENB_int[79] WENB_int[78] WENB_int[77] WENB_int[76] WENB_int[75] WENB_int[74] WENB_int[73] WENB_int[72] WENB_int[71] WENB_int[70] WENB_int[69] WENB_int[68] WENB_int[67] WENB_int[66] WENB_int[65] WENB_int[64] WENB_int[63] WENB_int[62] WENB_int[61] WENB_int[60] WENB_int[59] WENB_int[58] WENB_int[57] WENB_int[56] WENB_int[55] WENB_int[54] WENB_int[53] WENB_int[52] WENB_int[51] WENB_int[50] WENB_int[49] WENB_int[48] WENB_int[47] WENB_int[46] WENB_int[45] WENB_int[44] WENB_int[43] WENB_int[42] WENB_int[41] WENB_int[40] WENB_int[39] WENB_int[38] WENB_int[37] WENB_int[36] WENB_int[35] WENB_int[34] WENB_int[33] WENB_int[32] WENB_int[31] WENB_int[30] WENB_int[29] WENB_int[28] WENB_int[27] WENB_int[26] WENB_int[25] WENB_int[24] WENB_int[23] WENB_int[22] WENB_int[21] WENB_int[20] WENB_int[19] WENB_int[18] WENB_int[17] WENB_int[16] WENB_int[15] WENB_int[14] WENB_int[13] WENB_int[12] WENB_int[11] WENB_int[10] WENB_int[9] WENB_int[8] WENB_int[7] WENB_int[6] WENB_int[5] WENB_int[4] WENB_int[3] WENB_int[2] WENB_int[1] WENB_int[0] AB_int[4] AB_int[3] AB_int[2] AB_int[1] AB_int[0] DB_int[127] DB_int[126] DB_int[125] DB_int[124] DB_int[123] DB_int[122] DB_int[121] DB_int[120] DB_int[119] DB_int[118] DB_int[117] DB_int[116] DB_int[115] DB_int[114] DB_int[113] DB_int[112] DB_int[111] DB_int[110] DB_int[109] DB_int[108] DB_int[107] DB_int[106] DB_int[105] DB_int[104] DB_int[103] DB_int[102] DB_int[101] DB_int[100] DB_int[99] DB_int[98] DB_int[97] DB_int[96] DB_int[95] DB_int[94] DB_int[93] DB_int[92] DB_int[91] DB_int[90] DB_int[89] DB_int[88] DB_int[87] DB_int[86] DB_int[85] DB_int[84] DB_int[83] DB_int[82] DB_int[81] DB_int[80] DB_int[79] DB_int[78] DB_int[77] DB_int[76] DB_int[75] DB_int[74] DB_int[73] DB_int[72] DB_int[71] DB_int[70] DB_int[69] DB_int[68] DB_int[67] DB_int[66] DB_int[65] DB_int[64] DB_int[63] DB_int[62] DB_int[61] DB_int[60] DB_int[59] DB_int[58] DB_int[57] DB_int[56] DB_int[55] DB_int[54] DB_int[53] DB_int[52] DB_int[51] DB_int[50] DB_int[49] DB_int[48] DB_int[47] DB_int[46] DB_int[45] DB_int[44] DB_int[43] DB_int[42] DB_int[41] DB_int[40] DB_int[39] DB_int[38] DB_int[37] DB_int[36] DB_int[35] DB_int[34] DB_int[33] DB_int[32] DB_int[31] DB_int[30] DB_int[29] DB_int[28] DB_int[27] DB_int[26] DB_int[25] DB_int[24] DB_int[23] DB_int[22] DB_int[21] DB_int[20] DB_int[19] DB_int[18] DB_int[17] DB_int[16] DB_int[15] DB_int[14] DB_int[13] DB_int[12] DB_int[11] DB_int[10] DB_int[9] DB_int[8] DB_int[7] DB_int[6] DB_int[5] DB_int[4] DB_int[3] DB_int[2] DB_int[1] DB_int[0] EMAA_int[2] EMAA_int[1] EMAA_int[0] EMASA_int EMAB_int[2] EMAB_int[1] EMAB_int[0] TENA_int TCENA_int TAA_int[4] TAA_int[3] TAA_int[2] TAA_int[1] TAA_int[0] TENB_int TCENB_int TWENB_int[127] TWENB_int[126] TWENB_int[125] TWENB_int[124] TWENB_int[123] TWENB_int[122] TWENB_int[121] TWENB_int[120] TWENB_int[119] TWENB_int[118] TWENB_int[117] TWENB_int[116] TWENB_int[115] TWENB_int[114] TWENB_int[113] TWENB_int[112] TWENB_int[111] TWENB_int[110] TWENB_int[109] TWENB_int[108] TWENB_int[107] TWENB_int[106] TWENB_int[105] TWENB_int[104] TWENB_int[103] TWENB_int[102] TWENB_int[101] TWENB_int[100] TWENB_int[99] TWENB_int[98] TWENB_int[97] TWENB_int[96] TWENB_int[95] TWENB_int[94] TWENB_int[93] TWENB_int[92] TWENB_int[91] TWENB_int[90] TWENB_int[89] TWENB_int[88] TWENB_int[87] TWENB_int[86] TWENB_int[85] TWENB_int[84] TWENB_int[83] TWENB_int[82] TWENB_int[81] TWENB_int[80] TWENB_int[79] TWENB_int[78] TWENB_int[77] TWENB_int[76] TWENB_int[75] TWENB_int[74] TWENB_int[73] TWENB_int[72] TWENB_int[71] TWENB_int[70] TWENB_int[69] TWENB_int[68] TWENB_int[67] TWENB_int[66] TWENB_int[65] TWENB_int[64] TWENB_int[63] TWENB_int[62] TWENB_int[61] TWENB_int[60] TWENB_int[59] TWENB_int[58] TWENB_int[57] TWENB_int[56] TWENB_int[55] TWENB_int[54] TWENB_int[53] TWENB_int[52] TWENB_int[51] TWENB_int[50] TWENB_int[49] TWENB_int[48] TWENB_int[47] TWENB_int[46] TWENB_int[45] TWENB_int[44] TWENB_int[43] TWENB_int[42] TWENB_int[41] TWENB_int[40] TWENB_int[39] TWENB_int[38] TWENB_int[37] TWENB_int[36] TWENB_int[35] TWENB_int[34] TWENB_int[33] TWENB_int[32] TWENB_int[31] TWENB_int[30] TWENB_int[29] TWENB_int[28] TWENB_int[27] TWENB_int[26] TWENB_int[25] TWENB_int[24] TWENB_int[23] TWENB_int[22] TWENB_int[21] TWENB_int[20] TWENB_int[19] TWENB_int[18] TWENB_int[17] TWENB_int[16] TWENB_int[15] TWENB_int[14] TWENB_int[13] TWENB_int[12] TWENB_int[11] TWENB_int[10] TWENB_int[9] TWENB_int[8] TWENB_int[7] TWENB_int[6] TWENB_int[5] TWENB_int[4] TWENB_int[3] TWENB_int[2] TWENB_int[1] TWENB_int[0] TAB_int[4] TAB_int[3] TAB_int[2] TAB_int[1] TAB_int[0] TDB_int[127] TDB_int[126] TDB_int[125] TDB_int[124] TDB_int[123] TDB_int[122] TDB_int[121] TDB_int[120] TDB_int[119] TDB_int[118] TDB_int[117] TDB_int[116] TDB_int[115] TDB_int[114] TDB_int[113] TDB_int[112] TDB_int[111] TDB_int[110] TDB_int[109] TDB_int[108] TDB_int[107] TDB_int[106] TDB_int[105] TDB_int[104] TDB_int[103] TDB_int[102] TDB_int[101] TDB_int[100] TDB_int[99] TDB_int[98] TDB_int[97] TDB_int[96] TDB_int[95] TDB_int[94] TDB_int[93] TDB_int[92] TDB_int[91] TDB_int[90] TDB_int[89] TDB_int[88] TDB_int[87] TDB_int[86] TDB_int[85] TDB_int[84] TDB_int[83] TDB_int[82] TDB_int[81] TDB_int[80] TDB_int[79] TDB_int[78] TDB_int[77] TDB_int[76] TDB_int[75] TDB_int[74] TDB_int[73] TDB_int[72] TDB_int[71] TDB_int[70] TDB_int[69] TDB_int[68] TDB_int[67] TDB_int[66] TDB_int[65] TDB_int[64] TDB_int[63] TDB_int[62] TDB_int[61] TDB_int[60] TDB_int[59] TDB_int[58] TDB_int[57] TDB_int[56] TDB_int[55] TDB_int[54] TDB_int[53] TDB_int[52] TDB_int[51] TDB_int[50] TDB_int[49] TDB_int[48] TDB_int[47] TDB_int[46] TDB_int[45] TDB_int[44] TDB_int[43] TDB_int[42] TDB_int[41] TDB_int[40] TDB_int[39] TDB_int[38] TDB_int[37] TDB_int[36] TDB_int[35] TDB_int[34] TDB_int[33] TDB_int[32] TDB_int[31] TDB_int[30] TDB_int[29] TDB_int[28] TDB_int[27] TDB_int[26] TDB_int[25] TDB_int[24] TDB_int[23] TDB_int[22] TDB_int[21] TDB_int[20] TDB_int[19] TDB_int[18] TDB_int[17] TDB_int[16] TDB_int[15] TDB_int[14] TDB_int[13] TDB_int[12] TDB_int[11] TDB_int[10] TDB_int[9] TDB_int[8] TDB_int[7] TDB_int[6] TDB_int[5] TDB_int[4] TDB_int[3] TDB_int[2] TDB_int[1] TDB_int[0] SIA_int[1] SIA_int[0] SEA_int DFTRAMBYP_int SIB_int[1] SIB_int[0] SEB_int COLLDISN_int } +update_power_domain -name PDPE \ + -primary_power_net VDDPE -primary_ground_net VSSE + +create_power_domain -name PDCE \ + -boundary_ports { RET1N } \ + -instances { mem* RET1N_int } +update_power_domain -name PDCE \ + -primary_power_net VDDCE -primary_ground_net VSSE + + + # mode A1/A2 - Normal/Selective_Precharge + create_power_mode -name PM1 -domain_conditions \ + {PDPE@nc_on PDCE@nc_on} -default + + #mode A3 - Retention mode + create_power_mode -name PM2 -domain_conditions \ + {PDPE@nc_off PDCE@nc_on} + + #mode A4 - power down mode + create_power_mode -name PM3 -domain_conditions \ + {PDPE@nc_off PDCE@nc_off} + + +end_macro_model rf2_32x128_wm1 diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.ctl b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.ctl new file mode 100644 index 00000000..cb54b3e9 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.ctl @@ -0,0 +1,1307 @@ +/* ctl_memcomp Version: 4.0.5-EAC3 */ +/* common_memcomp Version: 4.0.5.2-amci */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// CTL model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x128_wm1 +// Words: 32 +// Bits: 128 +// Mux: 2 +// Drive: 6 +// Write Mask: On +// Write Thru: Off +// Extra Margin Adjustment: On +// Redundant Columns: 2 +// Test Muxes On +// Power Gating: Off +// Retention: On +// Pipeline: Off +// Read Disturb Test: Off +// +// Creation Date: Thu Oct 17 15:29:59 2019 +// Version: r4p0 +STIL 1.0 { + CTL P2001.10; + Design P2001.01; +} +Header { + Title "CTL model for `rf2_32x128_wm1"; +} +Signals { + "CENYA" Out; + "AYA[4]" Out; + "AYA[3]" Out; + "AYA[2]" Out; + "AYA[1]" Out; + "AYA[0]" Out; + "CENYB" Out; + "WENYB[127]" Out; + "WENYB[126]" Out; + "WENYB[125]" Out; + "WENYB[124]" Out; + "WENYB[123]" Out; + "WENYB[122]" Out; + "WENYB[121]" Out; + "WENYB[120]" Out; + "WENYB[119]" Out; + "WENYB[118]" Out; + "WENYB[117]" Out; + "WENYB[116]" Out; + "WENYB[115]" Out; + "WENYB[114]" Out; + "WENYB[113]" Out; + "WENYB[112]" Out; + "WENYB[111]" Out; + "WENYB[110]" Out; + "WENYB[109]" Out; + "WENYB[108]" Out; + "WENYB[107]" Out; + "WENYB[106]" Out; + "WENYB[105]" Out; + "WENYB[104]" Out; + "WENYB[103]" Out; + "WENYB[102]" Out; + "WENYB[101]" Out; + "WENYB[100]" Out; + "WENYB[99]" Out; + "WENYB[98]" Out; + "WENYB[97]" Out; + "WENYB[96]" Out; + "WENYB[95]" Out; + "WENYB[94]" Out; + "WENYB[93]" Out; + "WENYB[92]" Out; + "WENYB[91]" Out; + "WENYB[90]" Out; + "WENYB[89]" Out; + "WENYB[88]" Out; + "WENYB[87]" Out; + "WENYB[86]" Out; + "WENYB[85]" Out; + "WENYB[84]" Out; + "WENYB[83]" Out; + "WENYB[82]" Out; + "WENYB[81]" Out; + "WENYB[80]" Out; + "WENYB[79]" Out; + "WENYB[78]" Out; + "WENYB[77]" Out; + "WENYB[76]" Out; + "WENYB[75]" Out; + "WENYB[74]" Out; + "WENYB[73]" Out; + "WENYB[72]" Out; + "WENYB[71]" Out; + "WENYB[70]" Out; + "WENYB[69]" Out; + "WENYB[68]" Out; + "WENYB[67]" Out; + "WENYB[66]" Out; + "WENYB[65]" Out; + "WENYB[64]" Out; + "WENYB[63]" Out; + "WENYB[62]" Out; + "WENYB[61]" Out; + "WENYB[60]" Out; + "WENYB[59]" Out; + "WENYB[58]" Out; + "WENYB[57]" Out; + "WENYB[56]" Out; + "WENYB[55]" Out; + "WENYB[54]" Out; + "WENYB[53]" Out; + "WENYB[52]" Out; + "WENYB[51]" Out; + "WENYB[50]" Out; + "WENYB[49]" Out; + "WENYB[48]" Out; + "WENYB[47]" Out; + "WENYB[46]" Out; + "WENYB[45]" Out; + "WENYB[44]" Out; + "WENYB[43]" Out; + "WENYB[42]" Out; + "WENYB[41]" Out; + "WENYB[40]" Out; + "WENYB[39]" Out; + "WENYB[38]" Out; + "WENYB[37]" Out; + "WENYB[36]" Out; + "WENYB[35]" Out; + "WENYB[34]" Out; + "WENYB[33]" Out; + "WENYB[32]" Out; + "WENYB[31]" Out; + "WENYB[30]" Out; + "WENYB[29]" Out; + "WENYB[28]" Out; + "WENYB[27]" Out; + "WENYB[26]" Out; + "WENYB[25]" Out; + "WENYB[24]" Out; + "WENYB[23]" Out; + "WENYB[22]" Out; + "WENYB[21]" Out; + "WENYB[20]" Out; + "WENYB[19]" Out; + "WENYB[18]" Out; + "WENYB[17]" Out; + "WENYB[16]" Out; + "WENYB[15]" Out; + "WENYB[14]" Out; + "WENYB[13]" Out; + "WENYB[12]" Out; + "WENYB[11]" Out; + "WENYB[10]" Out; + "WENYB[9]" Out; + "WENYB[8]" Out; + "WENYB[7]" Out; + "WENYB[6]" Out; + "WENYB[5]" Out; + "WENYB[4]" Out; + "WENYB[3]" Out; + "WENYB[2]" Out; + "WENYB[1]" Out; + "WENYB[0]" Out; + "AYB[4]" Out; + "AYB[3]" Out; + "AYB[2]" Out; + "AYB[1]" Out; + "AYB[0]" Out; + "QA[127]" Out; + "QA[126]" Out; + "QA[125]" Out; + "QA[124]" Out; + "QA[123]" Out; + "QA[122]" Out; + "QA[121]" Out; + "QA[120]" Out; + "QA[119]" Out; + "QA[118]" Out; + "QA[117]" Out; + "QA[116]" Out; + "QA[115]" Out; + "QA[114]" Out; + "QA[113]" Out; + "QA[112]" Out; + "QA[111]" Out; + "QA[110]" Out; + "QA[109]" Out; + "QA[108]" Out; + "QA[107]" Out; + "QA[106]" Out; + "QA[105]" Out; + "QA[104]" Out; + "QA[103]" Out; + "QA[102]" Out; + "QA[101]" Out; + "QA[100]" Out; + "QA[99]" Out; + "QA[98]" Out; + "QA[97]" Out; + "QA[96]" Out; + "QA[95]" Out; + "QA[94]" Out; + "QA[93]" Out; + "QA[92]" Out; + "QA[91]" Out; + "QA[90]" Out; + "QA[89]" Out; + "QA[88]" Out; + "QA[87]" Out; + "QA[86]" Out; + "QA[85]" Out; + "QA[84]" Out; + "QA[83]" Out; + "QA[82]" Out; + "QA[81]" Out; + "QA[80]" Out; + "QA[79]" Out; + "QA[78]" Out; + "QA[77]" Out; + "QA[76]" Out; + "QA[75]" Out; + "QA[74]" Out; + "QA[73]" Out; + "QA[72]" Out; + "QA[71]" Out; + "QA[70]" Out; + "QA[69]" Out; + "QA[68]" Out; + "QA[67]" Out; + "QA[66]" Out; + "QA[65]" Out; + "QA[64]" Out; + "QA[63]" Out; + "QA[62]" Out; + "QA[61]" Out; + "QA[60]" Out; + "QA[59]" Out; + "QA[58]" Out; + "QA[57]" Out; + "QA[56]" Out; + "QA[55]" Out; + "QA[54]" Out; + "QA[53]" Out; + "QA[52]" Out; + "QA[51]" Out; + "QA[50]" Out; + "QA[49]" Out; + "QA[48]" Out; + "QA[47]" Out; + "QA[46]" Out; + "QA[45]" Out; + "QA[44]" Out; + "QA[43]" Out; + "QA[42]" Out; + "QA[41]" Out; + "QA[40]" Out; + "QA[39]" Out; + "QA[38]" Out; + "QA[37]" Out; + "QA[36]" Out; + "QA[35]" Out; + "QA[34]" Out; + "QA[33]" Out; + "QA[32]" Out; + "QA[31]" Out; + "QA[30]" Out; + "QA[29]" Out; + "QA[28]" Out; + "QA[27]" Out; + "QA[26]" Out; + "QA[25]" Out; + "QA[24]" Out; + "QA[23]" Out; + "QA[22]" Out; + "QA[21]" Out; + "QA[20]" Out; + "QA[19]" Out; + "QA[18]" Out; + "QA[17]" Out; + "QA[16]" Out; + "QA[15]" Out; + "QA[14]" Out; + "QA[13]" Out; + "QA[12]" Out; + "QA[11]" Out; + "QA[10]" Out; + "QA[9]" Out; + "QA[8]" Out; + "QA[7]" Out; + "QA[6]" Out; + "QA[5]" Out; + "QA[4]" Out; + "QA[3]" Out; + "QA[2]" Out; + "QA[1]" Out; + "QA[0]" Out; + "SOA[1]" Out; + "SOA[0]" Out; + "SOB[1]" Out; + "SOB[0]" Out; + "CLKA" In; + "CENA" In; + "AA[4]" In; + "AA[3]" In; + "AA[2]" In; + "AA[1]" In; + "AA[0]" In; + "CLKB" In; + "CENB" In; + "WENB[127]" In; + "WENB[126]" In; + "WENB[125]" In; + "WENB[124]" In; + "WENB[123]" In; + "WENB[122]" In; + "WENB[121]" In; + "WENB[120]" In; + "WENB[119]" In; + "WENB[118]" In; + "WENB[117]" In; + "WENB[116]" In; + "WENB[115]" In; + "WENB[114]" In; + "WENB[113]" In; + "WENB[112]" In; + "WENB[111]" In; + "WENB[110]" In; + "WENB[109]" In; + "WENB[108]" In; + "WENB[107]" In; + "WENB[106]" In; + "WENB[105]" In; + "WENB[104]" In; + "WENB[103]" In; + "WENB[102]" In; + "WENB[101]" In; + "WENB[100]" In; + "WENB[99]" In; + "WENB[98]" In; + "WENB[97]" In; + "WENB[96]" In; + "WENB[95]" In; + "WENB[94]" In; + "WENB[93]" In; + "WENB[92]" In; + "WENB[91]" In; + "WENB[90]" In; + "WENB[89]" In; + "WENB[88]" In; + "WENB[87]" In; + "WENB[86]" In; + "WENB[85]" In; + "WENB[84]" In; + "WENB[83]" In; + "WENB[82]" In; + "WENB[81]" In; + "WENB[80]" In; + "WENB[79]" In; + "WENB[78]" In; + "WENB[77]" In; + "WENB[76]" In; + "WENB[75]" In; + "WENB[74]" In; + "WENB[73]" In; + "WENB[72]" In; + "WENB[71]" In; + "WENB[70]" In; + "WENB[69]" In; + "WENB[68]" In; + "WENB[67]" In; + "WENB[66]" In; + "WENB[65]" In; + "WENB[64]" In; + "WENB[63]" In; + "WENB[62]" In; + "WENB[61]" In; + "WENB[60]" In; + "WENB[59]" In; + "WENB[58]" In; + "WENB[57]" In; + "WENB[56]" In; + "WENB[55]" In; + "WENB[54]" In; + "WENB[53]" In; + "WENB[52]" In; + "WENB[51]" In; + "WENB[50]" In; + "WENB[49]" In; + "WENB[48]" In; + "WENB[47]" In; + "WENB[46]" In; + "WENB[45]" In; + "WENB[44]" In; + "WENB[43]" In; + "WENB[42]" In; + "WENB[41]" In; + "WENB[40]" In; + "WENB[39]" In; + "WENB[38]" In; + "WENB[37]" In; + "WENB[36]" In; + "WENB[35]" In; + "WENB[34]" In; + "WENB[33]" In; + "WENB[32]" In; + "WENB[31]" In; + "WENB[30]" In; + "WENB[29]" In; + "WENB[28]" In; + "WENB[27]" In; + "WENB[26]" In; + "WENB[25]" In; + "WENB[24]" In; + "WENB[23]" In; + "WENB[22]" In; + "WENB[21]" In; + "WENB[20]" In; + "WENB[19]" In; + "WENB[18]" In; + "WENB[17]" In; + "WENB[16]" In; + "WENB[15]" In; + "WENB[14]" In; + "WENB[13]" In; + "WENB[12]" In; + "WENB[11]" In; + "WENB[10]" In; + "WENB[9]" In; + "WENB[8]" In; + "WENB[7]" In; + "WENB[6]" In; + "WENB[5]" In; + "WENB[4]" In; + "WENB[3]" In; + "WENB[2]" In; + "WENB[1]" In; + "WENB[0]" In; + "AB[4]" In; + "AB[3]" In; + "AB[2]" In; + "AB[1]" In; + "AB[0]" In; + "DB[127]" In; + "DB[126]" In; + "DB[125]" In; + "DB[124]" In; + "DB[123]" In; + "DB[122]" In; + "DB[121]" In; + "DB[120]" In; + "DB[119]" In; + "DB[118]" In; + "DB[117]" In; + "DB[116]" In; + "DB[115]" In; + "DB[114]" In; + "DB[113]" In; + "DB[112]" In; + "DB[111]" In; + "DB[110]" In; + "DB[109]" In; + "DB[108]" In; + "DB[107]" In; + "DB[106]" In; + "DB[105]" In; + "DB[104]" In; + "DB[103]" In; + "DB[102]" In; + "DB[101]" In; + "DB[100]" In; + "DB[99]" In; + "DB[98]" In; + "DB[97]" In; + "DB[96]" In; + "DB[95]" In; + "DB[94]" In; + "DB[93]" In; + "DB[92]" In; + "DB[91]" In; + "DB[90]" In; + "DB[89]" In; + "DB[88]" In; + "DB[87]" In; + "DB[86]" In; + "DB[85]" In; + "DB[84]" In; + "DB[83]" In; + "DB[82]" In; + "DB[81]" In; + "DB[80]" In; + "DB[79]" In; + "DB[78]" In; + "DB[77]" In; + "DB[76]" In; + "DB[75]" In; + "DB[74]" In; + "DB[73]" In; + "DB[72]" In; + "DB[71]" In; + "DB[70]" In; + "DB[69]" In; + "DB[68]" In; + "DB[67]" In; + "DB[66]" In; + "DB[65]" In; + "DB[64]" In; + "DB[63]" In; + "DB[62]" In; + "DB[61]" In; + "DB[60]" In; + "DB[59]" In; + "DB[58]" In; + "DB[57]" In; + "DB[56]" In; + "DB[55]" In; + "DB[54]" In; + "DB[53]" In; + "DB[52]" In; + "DB[51]" In; + "DB[50]" In; + "DB[49]" In; + "DB[48]" In; + "DB[47]" In; + "DB[46]" In; + "DB[45]" In; + "DB[44]" In; + "DB[43]" In; + "DB[42]" In; + "DB[41]" In; + "DB[40]" In; + "DB[39]" In; + "DB[38]" In; + "DB[37]" In; + "DB[36]" In; + "DB[35]" In; + "DB[34]" In; + "DB[33]" In; + "DB[32]" In; + "DB[31]" In; + "DB[30]" In; + "DB[29]" In; + "DB[28]" In; + "DB[27]" In; + "DB[26]" In; + "DB[25]" In; + "DB[24]" In; + "DB[23]" In; + "DB[22]" In; + "DB[21]" In; + "DB[20]" In; + "DB[19]" In; + "DB[18]" In; + "DB[17]" In; + "DB[16]" In; + "DB[15]" In; + "DB[14]" In; + "DB[13]" In; + "DB[12]" In; + "DB[11]" In; + "DB[10]" In; + "DB[9]" In; + "DB[8]" In; + "DB[7]" In; + "DB[6]" In; + "DB[5]" In; + "DB[4]" In; + "DB[3]" In; + "DB[2]" In; + "DB[1]" In; + "DB[0]" In; + "EMAA[2]" In; + "EMAA[1]" In; + "EMAA[0]" In; + "EMASA" In; + "EMAB[2]" In; + "EMAB[1]" In; + "EMAB[0]" In; + "TENA" In; + "TCENA" In; + "TAA[4]" In; + "TAA[3]" In; + "TAA[2]" In; + "TAA[1]" In; + "TAA[0]" In; + "TENB" In; + "TCENB" In; + "TWENB[127]" In; + "TWENB[126]" In; + "TWENB[125]" In; + "TWENB[124]" In; + "TWENB[123]" In; + "TWENB[122]" In; + "TWENB[121]" In; + "TWENB[120]" In; + "TWENB[119]" In; + "TWENB[118]" In; + "TWENB[117]" In; + "TWENB[116]" In; + "TWENB[115]" In; + "TWENB[114]" In; + "TWENB[113]" In; + "TWENB[112]" In; + "TWENB[111]" In; + "TWENB[110]" In; + "TWENB[109]" In; + "TWENB[108]" In; + "TWENB[107]" In; + "TWENB[106]" In; + "TWENB[105]" In; + "TWENB[104]" In; + "TWENB[103]" In; + "TWENB[102]" In; + "TWENB[101]" In; + "TWENB[100]" In; + "TWENB[99]" In; + "TWENB[98]" In; + "TWENB[97]" In; + "TWENB[96]" In; + "TWENB[95]" In; + "TWENB[94]" In; + "TWENB[93]" In; + "TWENB[92]" In; + "TWENB[91]" In; + "TWENB[90]" In; + "TWENB[89]" In; + "TWENB[88]" In; + "TWENB[87]" In; + "TWENB[86]" In; + "TWENB[85]" In; + "TWENB[84]" In; + "TWENB[83]" In; + "TWENB[82]" In; + "TWENB[81]" In; + "TWENB[80]" In; + "TWENB[79]" In; + "TWENB[78]" In; + "TWENB[77]" In; + "TWENB[76]" In; + "TWENB[75]" In; + "TWENB[74]" In; + "TWENB[73]" In; + "TWENB[72]" In; + "TWENB[71]" In; + "TWENB[70]" In; + "TWENB[69]" In; + "TWENB[68]" In; + "TWENB[67]" In; + "TWENB[66]" In; + "TWENB[65]" In; + "TWENB[64]" In; + "TWENB[63]" In; + "TWENB[62]" In; + "TWENB[61]" In; + "TWENB[60]" In; + "TWENB[59]" In; + "TWENB[58]" In; + "TWENB[57]" In; + "TWENB[56]" In; + "TWENB[55]" In; + "TWENB[54]" In; + "TWENB[53]" In; + "TWENB[52]" In; + "TWENB[51]" In; + "TWENB[50]" In; + "TWENB[49]" In; + "TWENB[48]" In; + "TWENB[47]" In; + "TWENB[46]" In; + "TWENB[45]" In; + "TWENB[44]" In; + "TWENB[43]" In; + "TWENB[42]" In; + "TWENB[41]" In; + "TWENB[40]" In; + "TWENB[39]" In; + "TWENB[38]" In; + "TWENB[37]" In; + "TWENB[36]" In; + "TWENB[35]" In; + "TWENB[34]" In; + "TWENB[33]" In; + "TWENB[32]" In; + "TWENB[31]" In; + "TWENB[30]" In; + "TWENB[29]" In; + "TWENB[28]" In; + "TWENB[27]" In; + "TWENB[26]" In; + "TWENB[25]" In; + "TWENB[24]" In; + "TWENB[23]" In; + "TWENB[22]" In; + "TWENB[21]" In; + "TWENB[20]" In; + "TWENB[19]" In; + "TWENB[18]" In; + "TWENB[17]" In; + "TWENB[16]" In; + "TWENB[15]" In; + "TWENB[14]" In; + "TWENB[13]" In; + "TWENB[12]" In; + "TWENB[11]" In; + "TWENB[10]" In; + "TWENB[9]" In; + "TWENB[8]" In; + "TWENB[7]" In; + "TWENB[6]" In; + "TWENB[5]" In; + "TWENB[4]" In; + "TWENB[3]" In; + "TWENB[2]" In; + "TWENB[1]" In; + "TWENB[0]" In; + "TAB[4]" In; + "TAB[3]" In; + "TAB[2]" In; + "TAB[1]" In; + "TAB[0]" In; + "TDB[127]" In; + "TDB[126]" In; + "TDB[125]" In; + "TDB[124]" In; + "TDB[123]" In; + "TDB[122]" In; + "TDB[121]" In; + "TDB[120]" In; + "TDB[119]" In; + "TDB[118]" In; + "TDB[117]" In; + "TDB[116]" In; + "TDB[115]" In; + "TDB[114]" In; + "TDB[113]" In; + "TDB[112]" In; + "TDB[111]" In; + "TDB[110]" In; + "TDB[109]" In; + "TDB[108]" In; + "TDB[107]" In; + "TDB[106]" In; + "TDB[105]" In; + "TDB[104]" In; + "TDB[103]" In; + "TDB[102]" In; + "TDB[101]" In; + "TDB[100]" In; + "TDB[99]" In; + "TDB[98]" In; + "TDB[97]" In; + "TDB[96]" In; + "TDB[95]" In; + "TDB[94]" In; + "TDB[93]" In; + "TDB[92]" In; + "TDB[91]" In; + "TDB[90]" In; + "TDB[89]" In; + "TDB[88]" In; + "TDB[87]" In; + "TDB[86]" In; + "TDB[85]" In; + "TDB[84]" In; + "TDB[83]" In; + "TDB[82]" In; + "TDB[81]" In; + "TDB[80]" In; + "TDB[79]" In; + "TDB[78]" In; + "TDB[77]" In; + "TDB[76]" In; + "TDB[75]" In; + "TDB[74]" In; + "TDB[73]" In; + "TDB[72]" In; + "TDB[71]" In; + "TDB[70]" In; + "TDB[69]" In; + "TDB[68]" In; + "TDB[67]" In; + "TDB[66]" In; + "TDB[65]" In; + "TDB[64]" In; + "TDB[63]" In; + "TDB[62]" In; + "TDB[61]" In; + "TDB[60]" In; + "TDB[59]" In; + "TDB[58]" In; + "TDB[57]" In; + "TDB[56]" In; + "TDB[55]" In; + "TDB[54]" In; + "TDB[53]" In; + "TDB[52]" In; + "TDB[51]" In; + "TDB[50]" In; + "TDB[49]" In; + "TDB[48]" In; + "TDB[47]" In; + "TDB[46]" In; + "TDB[45]" In; + "TDB[44]" In; + "TDB[43]" In; + "TDB[42]" In; + "TDB[41]" In; + "TDB[40]" In; + "TDB[39]" In; + "TDB[38]" In; + "TDB[37]" In; + "TDB[36]" In; + "TDB[35]" In; + "TDB[34]" In; + "TDB[33]" In; + "TDB[32]" In; + "TDB[31]" In; + "TDB[30]" In; + "TDB[29]" In; + "TDB[28]" In; + "TDB[27]" In; + "TDB[26]" In; + "TDB[25]" In; + "TDB[24]" In; + "TDB[23]" In; + "TDB[22]" In; + "TDB[21]" In; + "TDB[20]" In; + "TDB[19]" In; + "TDB[18]" In; + "TDB[17]" In; + "TDB[16]" In; + "TDB[15]" In; + "TDB[14]" In; + "TDB[13]" In; + "TDB[12]" In; + "TDB[11]" In; + "TDB[10]" In; + "TDB[9]" In; + "TDB[8]" In; + "TDB[7]" In; + "TDB[6]" In; + "TDB[5]" In; + "TDB[4]" In; + "TDB[3]" In; + "TDB[2]" In; + "TDB[1]" In; + "TDB[0]" In; + "RET1N" In; + "SIA[1]" In; + "SIA[0]" In; + "SEA" In; + "DFTRAMBYP" In; + "SIB[1]" In; + "SIB[0]" In; + "SEB" In; + "COLLDISN" In; +} +SignalGroups { + "all_inputs" = '"CLKA" + "CENA" + "AA[4]" + "AA[3]" + "AA[2]" + "AA[1]" + "AA[0]" + + "CLKB" + "CENB" + "WENB[127]" + "WENB[126]" + "WENB[125]" + "WENB[124]" + "WENB[123]" + + "WENB[122]" + "WENB[121]" + "WENB[120]" + "WENB[119]" + "WENB[118]" + "WENB[117]" + + "WENB[116]" + "WENB[115]" + "WENB[114]" + "WENB[113]" + "WENB[112]" + "WENB[111]" + + "WENB[110]" + "WENB[109]" + "WENB[108]" + "WENB[107]" + "WENB[106]" + "WENB[105]" + + "WENB[104]" + "WENB[103]" + "WENB[102]" + "WENB[101]" + "WENB[100]" + "WENB[99]" + + "WENB[98]" + "WENB[97]" + "WENB[96]" + "WENB[95]" + "WENB[94]" + "WENB[93]" + + "WENB[92]" + "WENB[91]" + "WENB[90]" + "WENB[89]" + "WENB[88]" + "WENB[87]" + + "WENB[86]" + "WENB[85]" + "WENB[84]" + "WENB[83]" + "WENB[82]" + "WENB[81]" + + "WENB[80]" + "WENB[79]" + "WENB[78]" + "WENB[77]" + "WENB[76]" + "WENB[75]" + + "WENB[74]" + "WENB[73]" + "WENB[72]" + "WENB[71]" + "WENB[70]" + "WENB[69]" + + "WENB[68]" + "WENB[67]" + "WENB[66]" + "WENB[65]" + "WENB[64]" + "WENB[63]" + + "WENB[62]" + "WENB[61]" + "WENB[60]" + "WENB[59]" + "WENB[58]" + "WENB[57]" + + "WENB[56]" + "WENB[55]" + "WENB[54]" + "WENB[53]" + "WENB[52]" + "WENB[51]" + + "WENB[50]" + "WENB[49]" + "WENB[48]" + "WENB[47]" + "WENB[46]" + "WENB[45]" + + "WENB[44]" + "WENB[43]" + "WENB[42]" + "WENB[41]" + "WENB[40]" + "WENB[39]" + + "WENB[38]" + "WENB[37]" + "WENB[36]" + "WENB[35]" + "WENB[34]" + "WENB[33]" + + "WENB[32]" + "WENB[31]" + "WENB[30]" + "WENB[29]" + "WENB[28]" + "WENB[27]" + + "WENB[26]" + "WENB[25]" + "WENB[24]" + "WENB[23]" + "WENB[22]" + "WENB[21]" + + "WENB[20]" + "WENB[19]" + "WENB[18]" + "WENB[17]" + "WENB[16]" + "WENB[15]" + + "WENB[14]" + "WENB[13]" + "WENB[12]" + "WENB[11]" + "WENB[10]" + "WENB[9]" + "WENB[8]" + + "WENB[7]" + "WENB[6]" + "WENB[5]" + "WENB[4]" + "WENB[3]" + "WENB[2]" + "WENB[1]" + + "WENB[0]" + "AB[4]" + "AB[3]" + "AB[2]" + "AB[1]" + "AB[0]" + "DB[127]" + "DB[126]" + + "DB[125]" + "DB[124]" + "DB[123]" + "DB[122]" + "DB[121]" + "DB[120]" + "DB[119]" + + "DB[118]" + "DB[117]" + "DB[116]" + "DB[115]" + "DB[114]" + "DB[113]" + "DB[112]" + + "DB[111]" + "DB[110]" + "DB[109]" + "DB[108]" + "DB[107]" + "DB[106]" + "DB[105]" + + "DB[104]" + "DB[103]" + "DB[102]" + "DB[101]" + "DB[100]" + "DB[99]" + "DB[98]" + + "DB[97]" + "DB[96]" + "DB[95]" + "DB[94]" + "DB[93]" + "DB[92]" + "DB[91]" + "DB[90]" + + "DB[89]" + "DB[88]" + "DB[87]" + "DB[86]" + "DB[85]" + "DB[84]" + "DB[83]" + "DB[82]" + + "DB[81]" + "DB[80]" + "DB[79]" + "DB[78]" + "DB[77]" + "DB[76]" + "DB[75]" + "DB[74]" + + "DB[73]" + "DB[72]" + "DB[71]" + "DB[70]" + "DB[69]" + "DB[68]" + "DB[67]" + "DB[66]" + + "DB[65]" + "DB[64]" + "DB[63]" + "DB[62]" + "DB[61]" + "DB[60]" + "DB[59]" + "DB[58]" + + "DB[57]" + "DB[56]" + "DB[55]" + "DB[54]" + "DB[53]" + "DB[52]" + "DB[51]" + "DB[50]" + + "DB[49]" + "DB[48]" + "DB[47]" + "DB[46]" + "DB[45]" + "DB[44]" + "DB[43]" + "DB[42]" + + "DB[41]" + "DB[40]" + "DB[39]" + "DB[38]" + "DB[37]" + "DB[36]" + "DB[35]" + "DB[34]" + + "DB[33]" + "DB[32]" + "DB[31]" + "DB[30]" + "DB[29]" + "DB[28]" + "DB[27]" + "DB[26]" + + "DB[25]" + "DB[24]" + "DB[23]" + "DB[22]" + "DB[21]" + "DB[20]" + "DB[19]" + "DB[18]" + + "DB[17]" + "DB[16]" + "DB[15]" + "DB[14]" + "DB[13]" + "DB[12]" + "DB[11]" + "DB[10]" + + "DB[9]" + "DB[8]" + "DB[7]" + "DB[6]" + "DB[5]" + "DB[4]" + "DB[3]" + "DB[2]" + + "DB[1]" + "DB[0]" + "EMAA[2]" + "EMAA[1]" + "EMAA[0]" + "EMASA" + "EMAB[2]" + + "EMAB[1]" + "EMAB[0]" + "TENA" + "TCENA" + "TAA[4]" + "TAA[3]" + "TAA[2]" + "TAA[1]" + + "TAA[0]" + "TENB" + "TCENB" + "TWENB[127]" + "TWENB[126]" + "TWENB[125]" + "TWENB[124]" + + "TWENB[123]" + "TWENB[122]" + "TWENB[121]" + "TWENB[120]" + "TWENB[119]" + "TWENB[118]" + + "TWENB[117]" + "TWENB[116]" + "TWENB[115]" + "TWENB[114]" + "TWENB[113]" + "TWENB[112]" + + "TWENB[111]" + "TWENB[110]" + "TWENB[109]" + "TWENB[108]" + "TWENB[107]" + "TWENB[106]" + + "TWENB[105]" + "TWENB[104]" + "TWENB[103]" + "TWENB[102]" + "TWENB[101]" + "TWENB[100]" + + "TWENB[99]" + "TWENB[98]" + "TWENB[97]" + "TWENB[96]" + "TWENB[95]" + "TWENB[94]" + + "TWENB[93]" + "TWENB[92]" + "TWENB[91]" + "TWENB[90]" + "TWENB[89]" + "TWENB[88]" + + "TWENB[87]" + "TWENB[86]" + "TWENB[85]" + "TWENB[84]" + "TWENB[83]" + "TWENB[82]" + + "TWENB[81]" + "TWENB[80]" + "TWENB[79]" + "TWENB[78]" + "TWENB[77]" + "TWENB[76]" + + "TWENB[75]" + "TWENB[74]" + "TWENB[73]" + "TWENB[72]" + "TWENB[71]" + "TWENB[70]" + + "TWENB[69]" + "TWENB[68]" + "TWENB[67]" + "TWENB[66]" + "TWENB[65]" + "TWENB[64]" + + "TWENB[63]" + "TWENB[62]" + "TWENB[61]" + "TWENB[60]" + "TWENB[59]" + "TWENB[58]" + + "TWENB[57]" + "TWENB[56]" + "TWENB[55]" + "TWENB[54]" + "TWENB[53]" + "TWENB[52]" + + "TWENB[51]" + "TWENB[50]" + "TWENB[49]" + "TWENB[48]" + "TWENB[47]" + "TWENB[46]" + + "TWENB[45]" + "TWENB[44]" + "TWENB[43]" + "TWENB[42]" + "TWENB[41]" + "TWENB[40]" + + "TWENB[39]" + "TWENB[38]" + "TWENB[37]" + "TWENB[36]" + "TWENB[35]" + "TWENB[34]" + + "TWENB[33]" + "TWENB[32]" + "TWENB[31]" + "TWENB[30]" + "TWENB[29]" + "TWENB[28]" + + "TWENB[27]" + "TWENB[26]" + "TWENB[25]" + "TWENB[24]" + "TWENB[23]" + "TWENB[22]" + + "TWENB[21]" + "TWENB[20]" + "TWENB[19]" + "TWENB[18]" + "TWENB[17]" + "TWENB[16]" + + "TWENB[15]" + "TWENB[14]" + "TWENB[13]" + "TWENB[12]" + "TWENB[11]" + "TWENB[10]" + + "TWENB[9]" + "TWENB[8]" + "TWENB[7]" + "TWENB[6]" + "TWENB[5]" + "TWENB[4]" + + "TWENB[3]" + "TWENB[2]" + "TWENB[1]" + "TWENB[0]" + "TAB[4]" + "TAB[3]" + "TAB[2]" + + "TAB[1]" + "TAB[0]" + "TDB[127]" + "TDB[126]" + "TDB[125]" + "TDB[124]" + "TDB[123]" + + "TDB[122]" + "TDB[121]" + "TDB[120]" + "TDB[119]" + "TDB[118]" + "TDB[117]" + + "TDB[116]" + "TDB[115]" + "TDB[114]" + "TDB[113]" + "TDB[112]" + "TDB[111]" + + "TDB[110]" + "TDB[109]" + "TDB[108]" + "TDB[107]" + "TDB[106]" + "TDB[105]" + + "TDB[104]" + "TDB[103]" + "TDB[102]" + "TDB[101]" + "TDB[100]" + "TDB[99]" + "TDB[98]" + + "TDB[97]" + "TDB[96]" + "TDB[95]" + "TDB[94]" + "TDB[93]" + "TDB[92]" + "TDB[91]" + + "TDB[90]" + "TDB[89]" + "TDB[88]" + "TDB[87]" + "TDB[86]" + "TDB[85]" + "TDB[84]" + + "TDB[83]" + "TDB[82]" + "TDB[81]" + "TDB[80]" + "TDB[79]" + "TDB[78]" + "TDB[77]" + + "TDB[76]" + "TDB[75]" + "TDB[74]" + "TDB[73]" + "TDB[72]" + "TDB[71]" + "TDB[70]" + + "TDB[69]" + "TDB[68]" + "TDB[67]" + "TDB[66]" + "TDB[65]" + "TDB[64]" + "TDB[63]" + + "TDB[62]" + "TDB[61]" + "TDB[60]" + "TDB[59]" + "TDB[58]" + "TDB[57]" + "TDB[56]" + + "TDB[55]" + "TDB[54]" + "TDB[53]" + "TDB[52]" + "TDB[51]" + "TDB[50]" + "TDB[49]" + + "TDB[48]" + "TDB[47]" + "TDB[46]" + "TDB[45]" + "TDB[44]" + "TDB[43]" + "TDB[42]" + + "TDB[41]" + "TDB[40]" + "TDB[39]" + "TDB[38]" + "TDB[37]" + "TDB[36]" + "TDB[35]" + + "TDB[34]" + "TDB[33]" + "TDB[32]" + "TDB[31]" + "TDB[30]" + "TDB[29]" + "TDB[28]" + + "TDB[27]" + "TDB[26]" + "TDB[25]" + "TDB[24]" + "TDB[23]" + "TDB[22]" + "TDB[21]" + + "TDB[20]" + "TDB[19]" + "TDB[18]" + "TDB[17]" + "TDB[16]" + "TDB[15]" + "TDB[14]" + + "TDB[13]" + "TDB[12]" + "TDB[11]" + "TDB[10]" + "TDB[9]" + "TDB[8]" + "TDB[7]" + + "TDB[6]" + "TDB[5]" + "TDB[4]" + "TDB[3]" + "TDB[2]" + "TDB[1]" + "TDB[0]" + "RET1N" + + "SIA[1]" + "SIA[0]" + "SEA" + "DFTRAMBYP" + "SIB[1]" + "SIB[0]" + "SEB" + "COLLDISN"'; + "all_outputs" = '"CENYA" + "AYA[4]" + "AYA[3]" + "AYA[2]" + "AYA[1]" + "AYA[0]" + + "CENYB" + "WENYB[127]" + "WENYB[126]" + "WENYB[125]" + "WENYB[124]" + "WENYB[123]" + + "WENYB[122]" + "WENYB[121]" + "WENYB[120]" + "WENYB[119]" + "WENYB[118]" + "WENYB[117]" + + "WENYB[116]" + "WENYB[115]" + "WENYB[114]" + "WENYB[113]" + "WENYB[112]" + "WENYB[111]" + + "WENYB[110]" + "WENYB[109]" + "WENYB[108]" + "WENYB[107]" + "WENYB[106]" + "WENYB[105]" + + "WENYB[104]" + "WENYB[103]" + "WENYB[102]" + "WENYB[101]" + "WENYB[100]" + "WENYB[99]" + + "WENYB[98]" + "WENYB[97]" + "WENYB[96]" + "WENYB[95]" + "WENYB[94]" + "WENYB[93]" + + "WENYB[92]" + "WENYB[91]" + "WENYB[90]" + "WENYB[89]" + "WENYB[88]" + "WENYB[87]" + + "WENYB[86]" + "WENYB[85]" + "WENYB[84]" + "WENYB[83]" + "WENYB[82]" + "WENYB[81]" + + "WENYB[80]" + "WENYB[79]" + "WENYB[78]" + "WENYB[77]" + "WENYB[76]" + "WENYB[75]" + + "WENYB[74]" + "WENYB[73]" + "WENYB[72]" + "WENYB[71]" + "WENYB[70]" + "WENYB[69]" + + "WENYB[68]" + "WENYB[67]" + "WENYB[66]" + "WENYB[65]" + "WENYB[64]" + "WENYB[63]" + + "WENYB[62]" + "WENYB[61]" + "WENYB[60]" + "WENYB[59]" + "WENYB[58]" + "WENYB[57]" + + "WENYB[56]" + "WENYB[55]" + "WENYB[54]" + "WENYB[53]" + "WENYB[52]" + "WENYB[51]" + + "WENYB[50]" + "WENYB[49]" + "WENYB[48]" + "WENYB[47]" + "WENYB[46]" + "WENYB[45]" + + "WENYB[44]" + "WENYB[43]" + "WENYB[42]" + "WENYB[41]" + "WENYB[40]" + "WENYB[39]" + + "WENYB[38]" + "WENYB[37]" + "WENYB[36]" + "WENYB[35]" + "WENYB[34]" + "WENYB[33]" + + "WENYB[32]" + "WENYB[31]" + "WENYB[30]" + "WENYB[29]" + "WENYB[28]" + "WENYB[27]" + + "WENYB[26]" + "WENYB[25]" + "WENYB[24]" + "WENYB[23]" + "WENYB[22]" + "WENYB[21]" + + "WENYB[20]" + "WENYB[19]" + "WENYB[18]" + "WENYB[17]" + "WENYB[16]" + "WENYB[15]" + + "WENYB[14]" + "WENYB[13]" + "WENYB[12]" + "WENYB[11]" + "WENYB[10]" + "WENYB[9]" + + "WENYB[8]" + "WENYB[7]" + "WENYB[6]" + "WENYB[5]" + "WENYB[4]" + "WENYB[3]" + + "WENYB[2]" + "WENYB[1]" + "WENYB[0]" + "AYB[4]" + "AYB[3]" + "AYB[2]" + "AYB[1]" + + "AYB[0]" + "QA[127]" + "QA[126]" + "QA[125]" + "QA[124]" + "QA[123]" + "QA[122]" + + "QA[121]" + "QA[120]" + "QA[119]" + "QA[118]" + "QA[117]" + "QA[116]" + "QA[115]" + + "QA[114]" + "QA[113]" + "QA[112]" + "QA[111]" + "QA[110]" + "QA[109]" + "QA[108]" + + "QA[107]" + "QA[106]" + "QA[105]" + "QA[104]" + "QA[103]" + "QA[102]" + "QA[101]" + + "QA[100]" + "QA[99]" + "QA[98]" + "QA[97]" + "QA[96]" + "QA[95]" + "QA[94]" + + "QA[93]" + "QA[92]" + "QA[91]" + "QA[90]" + "QA[89]" + "QA[88]" + "QA[87]" + "QA[86]" + + "QA[85]" + "QA[84]" + "QA[83]" + "QA[82]" + "QA[81]" + "QA[80]" + "QA[79]" + "QA[78]" + + "QA[77]" + "QA[76]" + "QA[75]" + "QA[74]" + "QA[73]" + "QA[72]" + "QA[71]" + "QA[70]" + + "QA[69]" + "QA[68]" + "QA[67]" + "QA[66]" + "QA[65]" + "QA[64]" + "QA[63]" + "QA[62]" + + "QA[61]" + "QA[60]" + "QA[59]" + "QA[58]" + "QA[57]" + "QA[56]" + "QA[55]" + "QA[54]" + + "QA[53]" + "QA[52]" + "QA[51]" + "QA[50]" + "QA[49]" + "QA[48]" + "QA[47]" + "QA[46]" + + "QA[45]" + "QA[44]" + "QA[43]" + "QA[42]" + "QA[41]" + "QA[40]" + "QA[39]" + "QA[38]" + + "QA[37]" + "QA[36]" + "QA[35]" + "QA[34]" + "QA[33]" + "QA[32]" + "QA[31]" + "QA[30]" + + "QA[29]" + "QA[28]" + "QA[27]" + "QA[26]" + "QA[25]" + "QA[24]" + "QA[23]" + "QA[22]" + + "QA[21]" + "QA[20]" + "QA[19]" + "QA[18]" + "QA[17]" + "QA[16]" + "QA[15]" + "QA[14]" + + "QA[13]" + "QA[12]" + "QA[11]" + "QA[10]" + "QA[9]" + "QA[8]" + "QA[7]" + "QA[6]" + + "QA[5]" + "QA[4]" + "QA[3]" + "QA[2]" + "QA[1]" + "QA[0]" + "SOA[1]" + "SOA[0]" + + "SOB[1]" + "SOB[0]"'; + "all_ports" = '"all_inputs" + "all_outputs"'; + "_pi" = '"CLKA" + "CENA" + "AA[4]" + "AA[3]" + "AA[2]" + "AA[1]" + "AA[0]" + "CLKB" + + "CENB" + "WENB[127]" + "WENB[126]" + "WENB[125]" + "WENB[124]" + "WENB[123]" + + "WENB[122]" + "WENB[121]" + "WENB[120]" + "WENB[119]" + "WENB[118]" + "WENB[117]" + + "WENB[116]" + "WENB[115]" + "WENB[114]" + "WENB[113]" + "WENB[112]" + "WENB[111]" + + "WENB[110]" + "WENB[109]" + "WENB[108]" + "WENB[107]" + "WENB[106]" + "WENB[105]" + + "WENB[104]" + "WENB[103]" + "WENB[102]" + "WENB[101]" + "WENB[100]" + "WENB[99]" + + "WENB[98]" + "WENB[97]" + "WENB[96]" + "WENB[95]" + "WENB[94]" + "WENB[93]" + + "WENB[92]" + "WENB[91]" + "WENB[90]" + "WENB[89]" + "WENB[88]" + "WENB[87]" + + "WENB[86]" + "WENB[85]" + "WENB[84]" + "WENB[83]" + "WENB[82]" + "WENB[81]" + + "WENB[80]" + "WENB[79]" + "WENB[78]" + "WENB[77]" + "WENB[76]" + "WENB[75]" + + "WENB[74]" + "WENB[73]" + "WENB[72]" + "WENB[71]" + "WENB[70]" + "WENB[69]" + + "WENB[68]" + "WENB[67]" + "WENB[66]" + "WENB[65]" + "WENB[64]" + "WENB[63]" + + "WENB[62]" + "WENB[61]" + "WENB[60]" + "WENB[59]" + "WENB[58]" + "WENB[57]" + + "WENB[56]" + "WENB[55]" + "WENB[54]" + "WENB[53]" + "WENB[52]" + "WENB[51]" + + "WENB[50]" + "WENB[49]" + "WENB[48]" + "WENB[47]" + "WENB[46]" + "WENB[45]" + + "WENB[44]" + "WENB[43]" + "WENB[42]" + "WENB[41]" + "WENB[40]" + "WENB[39]" + + "WENB[38]" + "WENB[37]" + "WENB[36]" + "WENB[35]" + "WENB[34]" + "WENB[33]" + + "WENB[32]" + "WENB[31]" + "WENB[30]" + "WENB[29]" + "WENB[28]" + "WENB[27]" + + "WENB[26]" + "WENB[25]" + "WENB[24]" + "WENB[23]" + "WENB[22]" + "WENB[21]" + + "WENB[20]" + "WENB[19]" + "WENB[18]" + "WENB[17]" + "WENB[16]" + "WENB[15]" + + "WENB[14]" + "WENB[13]" + "WENB[12]" + "WENB[11]" + "WENB[10]" + "WENB[9]" + "WENB[8]" + + "WENB[7]" + "WENB[6]" + "WENB[5]" + "WENB[4]" + "WENB[3]" + "WENB[2]" + "WENB[1]" + + "WENB[0]" + "AB[4]" + "AB[3]" + "AB[2]" + "AB[1]" + "AB[0]" + "DB[127]" + "DB[126]" + + "DB[125]" + "DB[124]" + "DB[123]" + "DB[122]" + "DB[121]" + "DB[120]" + "DB[119]" + + "DB[118]" + "DB[117]" + "DB[116]" + "DB[115]" + "DB[114]" + "DB[113]" + "DB[112]" + + "DB[111]" + "DB[110]" + "DB[109]" + "DB[108]" + "DB[107]" + "DB[106]" + "DB[105]" + + "DB[104]" + "DB[103]" + "DB[102]" + "DB[101]" + "DB[100]" + "DB[99]" + "DB[98]" + + "DB[97]" + "DB[96]" + "DB[95]" + "DB[94]" + "DB[93]" + "DB[92]" + "DB[91]" + "DB[90]" + + "DB[89]" + "DB[88]" + "DB[87]" + "DB[86]" + "DB[85]" + "DB[84]" + "DB[83]" + "DB[82]" + + "DB[81]" + "DB[80]" + "DB[79]" + "DB[78]" + "DB[77]" + "DB[76]" + "DB[75]" + "DB[74]" + + "DB[73]" + "DB[72]" + "DB[71]" + "DB[70]" + "DB[69]" + "DB[68]" + "DB[67]" + "DB[66]" + + "DB[65]" + "DB[64]" + "DB[63]" + "DB[62]" + "DB[61]" + "DB[60]" + "DB[59]" + "DB[58]" + + "DB[57]" + "DB[56]" + "DB[55]" + "DB[54]" + "DB[53]" + "DB[52]" + "DB[51]" + "DB[50]" + + "DB[49]" + "DB[48]" + "DB[47]" + "DB[46]" + "DB[45]" + "DB[44]" + "DB[43]" + "DB[42]" + + "DB[41]" + "DB[40]" + "DB[39]" + "DB[38]" + "DB[37]" + "DB[36]" + "DB[35]" + "DB[34]" + + "DB[33]" + "DB[32]" + "DB[31]" + "DB[30]" + "DB[29]" + "DB[28]" + "DB[27]" + "DB[26]" + + "DB[25]" + "DB[24]" + "DB[23]" + "DB[22]" + "DB[21]" + "DB[20]" + "DB[19]" + "DB[18]" + + "DB[17]" + "DB[16]" + "DB[15]" + "DB[14]" + "DB[13]" + "DB[12]" + "DB[11]" + "DB[10]" + + "DB[9]" + "DB[8]" + "DB[7]" + "DB[6]" + "DB[5]" + "DB[4]" + "DB[3]" + "DB[2]" + + "DB[1]" + "DB[0]" + "EMAA[2]" + "EMAA[1]" + "EMAA[0]" + "EMASA" + "EMAB[2]" + + "EMAB[1]" + "EMAB[0]" + "TENA" + "TCENA" + "TAA[4]" + "TAA[3]" + "TAA[2]" + "TAA[1]" + + "TAA[0]" + "TENB" + "TCENB" + "TWENB[127]" + "TWENB[126]" + "TWENB[125]" + "TWENB[124]" + + "TWENB[123]" + "TWENB[122]" + "TWENB[121]" + "TWENB[120]" + "TWENB[119]" + "TWENB[118]" + + "TWENB[117]" + "TWENB[116]" + "TWENB[115]" + "TWENB[114]" + "TWENB[113]" + "TWENB[112]" + + "TWENB[111]" + "TWENB[110]" + "TWENB[109]" + "TWENB[108]" + "TWENB[107]" + "TWENB[106]" + + "TWENB[105]" + "TWENB[104]" + "TWENB[103]" + "TWENB[102]" + "TWENB[101]" + "TWENB[100]" + + "TWENB[99]" + "TWENB[98]" + "TWENB[97]" + "TWENB[96]" + "TWENB[95]" + "TWENB[94]" + + "TWENB[93]" + "TWENB[92]" + "TWENB[91]" + "TWENB[90]" + "TWENB[89]" + "TWENB[88]" + + "TWENB[87]" + "TWENB[86]" + "TWENB[85]" + "TWENB[84]" + "TWENB[83]" + "TWENB[82]" + + "TWENB[81]" + "TWENB[80]" + "TWENB[79]" + "TWENB[78]" + "TWENB[77]" + "TWENB[76]" + + "TWENB[75]" + "TWENB[74]" + "TWENB[73]" + "TWENB[72]" + "TWENB[71]" + "TWENB[70]" + + "TWENB[69]" + "TWENB[68]" + "TWENB[67]" + "TWENB[66]" + "TWENB[65]" + "TWENB[64]" + + "TWENB[63]" + "TWENB[62]" + "TWENB[61]" + "TWENB[60]" + "TWENB[59]" + "TWENB[58]" + + "TWENB[57]" + "TWENB[56]" + "TWENB[55]" + "TWENB[54]" + "TWENB[53]" + "TWENB[52]" + + "TWENB[51]" + "TWENB[50]" + "TWENB[49]" + "TWENB[48]" + "TWENB[47]" + "TWENB[46]" + + "TWENB[45]" + "TWENB[44]" + "TWENB[43]" + "TWENB[42]" + "TWENB[41]" + "TWENB[40]" + + "TWENB[39]" + "TWENB[38]" + "TWENB[37]" + "TWENB[36]" + "TWENB[35]" + "TWENB[34]" + + "TWENB[33]" + "TWENB[32]" + "TWENB[31]" + "TWENB[30]" + "TWENB[29]" + "TWENB[28]" + + "TWENB[27]" + "TWENB[26]" + "TWENB[25]" + "TWENB[24]" + "TWENB[23]" + "TWENB[22]" + + "TWENB[21]" + "TWENB[20]" + "TWENB[19]" + "TWENB[18]" + "TWENB[17]" + "TWENB[16]" + + "TWENB[15]" + "TWENB[14]" + "TWENB[13]" + "TWENB[12]" + "TWENB[11]" + "TWENB[10]" + + "TWENB[9]" + "TWENB[8]" + "TWENB[7]" + "TWENB[6]" + "TWENB[5]" + "TWENB[4]" + + "TWENB[3]" + "TWENB[2]" + "TWENB[1]" + "TWENB[0]" + "TAB[4]" + "TAB[3]" + "TAB[2]" + + "TAB[1]" + "TAB[0]" + "TDB[127]" + "TDB[126]" + "TDB[125]" + "TDB[124]" + "TDB[123]" + + "TDB[122]" + "TDB[121]" + "TDB[120]" + "TDB[119]" + "TDB[118]" + "TDB[117]" + + "TDB[116]" + "TDB[115]" + "TDB[114]" + "TDB[113]" + "TDB[112]" + "TDB[111]" + + "TDB[110]" + "TDB[109]" + "TDB[108]" + "TDB[107]" + "TDB[106]" + "TDB[105]" + + "TDB[104]" + "TDB[103]" + "TDB[102]" + "TDB[101]" + "TDB[100]" + "TDB[99]" + "TDB[98]" + + "TDB[97]" + "TDB[96]" + "TDB[95]" + "TDB[94]" + "TDB[93]" + "TDB[92]" + "TDB[91]" + + "TDB[90]" + "TDB[89]" + "TDB[88]" + "TDB[87]" + "TDB[86]" + "TDB[85]" + "TDB[84]" + + "TDB[83]" + "TDB[82]" + "TDB[81]" + "TDB[80]" + "TDB[79]" + "TDB[78]" + "TDB[77]" + + "TDB[76]" + "TDB[75]" + "TDB[74]" + "TDB[73]" + "TDB[72]" + "TDB[71]" + "TDB[70]" + + "TDB[69]" + "TDB[68]" + "TDB[67]" + "TDB[66]" + "TDB[65]" + "TDB[64]" + "TDB[63]" + + "TDB[62]" + "TDB[61]" + "TDB[60]" + "TDB[59]" + "TDB[58]" + "TDB[57]" + "TDB[56]" + + "TDB[55]" + "TDB[54]" + "TDB[53]" + "TDB[52]" + "TDB[51]" + "TDB[50]" + "TDB[49]" + + "TDB[48]" + "TDB[47]" + "TDB[46]" + "TDB[45]" + "TDB[44]" + "TDB[43]" + "TDB[42]" + + "TDB[41]" + "TDB[40]" + "TDB[39]" + "TDB[38]" + "TDB[37]" + "TDB[36]" + "TDB[35]" + + "TDB[34]" + "TDB[33]" + "TDB[32]" + "TDB[31]" + "TDB[30]" + "TDB[29]" + "TDB[28]" + + "TDB[27]" + "TDB[26]" + "TDB[25]" + "TDB[24]" + "TDB[23]" + "TDB[22]" + "TDB[21]" + + "TDB[20]" + "TDB[19]" + "TDB[18]" + "TDB[17]" + "TDB[16]" + "TDB[15]" + "TDB[14]" + + "TDB[13]" + "TDB[12]" + "TDB[11]" + "TDB[10]" + "TDB[9]" + "TDB[8]" + "TDB[7]" + + "TDB[6]" + "TDB[5]" + "TDB[4]" + "TDB[3]" + "TDB[2]" + "TDB[1]" + "TDB[0]" + "RET1N" + + "SIA[1]" + "SIA[0]" + "SEA" + "DFTRAMBYP" + "SIB[1]" + "SIB[0]" + "SEB" + "COLLDISN"'; + "_po" = '"CENYA" + "AYA[4]" + "AYA[3]" + "AYA[2]" + "AYA[1]" + "AYA[0]" + "CENYB" + + "WENYB[127]" + "WENYB[126]" + "WENYB[125]" + "WENYB[124]" + "WENYB[123]" + "WENYB[122]" + + "WENYB[121]" + "WENYB[120]" + "WENYB[119]" + "WENYB[118]" + "WENYB[117]" + "WENYB[116]" + + "WENYB[115]" + "WENYB[114]" + "WENYB[113]" + "WENYB[112]" + "WENYB[111]" + "WENYB[110]" + + "WENYB[109]" + "WENYB[108]" + "WENYB[107]" + "WENYB[106]" + "WENYB[105]" + "WENYB[104]" + + "WENYB[103]" + "WENYB[102]" + "WENYB[101]" + "WENYB[100]" + "WENYB[99]" + "WENYB[98]" + + "WENYB[97]" + "WENYB[96]" + "WENYB[95]" + "WENYB[94]" + "WENYB[93]" + "WENYB[92]" + + "WENYB[91]" + "WENYB[90]" + "WENYB[89]" + "WENYB[88]" + "WENYB[87]" + "WENYB[86]" + + "WENYB[85]" + "WENYB[84]" + "WENYB[83]" + "WENYB[82]" + "WENYB[81]" + "WENYB[80]" + + "WENYB[79]" + "WENYB[78]" + "WENYB[77]" + "WENYB[76]" + "WENYB[75]" + "WENYB[74]" + + "WENYB[73]" + "WENYB[72]" + "WENYB[71]" + "WENYB[70]" + "WENYB[69]" + "WENYB[68]" + + "WENYB[67]" + "WENYB[66]" + "WENYB[65]" + "WENYB[64]" + "WENYB[63]" + "WENYB[62]" + + "WENYB[61]" + "WENYB[60]" + "WENYB[59]" + "WENYB[58]" + "WENYB[57]" + "WENYB[56]" + + "WENYB[55]" + "WENYB[54]" + "WENYB[53]" + "WENYB[52]" + "WENYB[51]" + "WENYB[50]" + + "WENYB[49]" + "WENYB[48]" + "WENYB[47]" + "WENYB[46]" + "WENYB[45]" + "WENYB[44]" + + "WENYB[43]" + "WENYB[42]" + "WENYB[41]" + "WENYB[40]" + "WENYB[39]" + "WENYB[38]" + + "WENYB[37]" + "WENYB[36]" + "WENYB[35]" + "WENYB[34]" + "WENYB[33]" + "WENYB[32]" + + "WENYB[31]" + "WENYB[30]" + "WENYB[29]" + "WENYB[28]" + "WENYB[27]" + "WENYB[26]" + + "WENYB[25]" + "WENYB[24]" + "WENYB[23]" + "WENYB[22]" + "WENYB[21]" + "WENYB[20]" + + "WENYB[19]" + "WENYB[18]" + "WENYB[17]" + "WENYB[16]" + "WENYB[15]" + "WENYB[14]" + + "WENYB[13]" + "WENYB[12]" + "WENYB[11]" + "WENYB[10]" + "WENYB[9]" + "WENYB[8]" + + "WENYB[7]" + "WENYB[6]" + "WENYB[5]" + "WENYB[4]" + "WENYB[3]" + "WENYB[2]" + + "WENYB[1]" + "WENYB[0]" + "AYB[4]" + "AYB[3]" + "AYB[2]" + "AYB[1]" + "AYB[0]" + + "QA[127]" + "QA[126]" + "QA[125]" + "QA[124]" + "QA[123]" + "QA[122]" + "QA[121]" + + "QA[120]" + "QA[119]" + "QA[118]" + "QA[117]" + "QA[116]" + "QA[115]" + "QA[114]" + + "QA[113]" + "QA[112]" + "QA[111]" + "QA[110]" + "QA[109]" + "QA[108]" + "QA[107]" + + "QA[106]" + "QA[105]" + "QA[104]" + "QA[103]" + "QA[102]" + "QA[101]" + "QA[100]" + + "QA[99]" + "QA[98]" + "QA[97]" + "QA[96]" + "QA[95]" + "QA[94]" + "QA[93]" + "QA[92]" + + "QA[91]" + "QA[90]" + "QA[89]" + "QA[88]" + "QA[87]" + "QA[86]" + "QA[85]" + "QA[84]" + + "QA[83]" + "QA[82]" + "QA[81]" + "QA[80]" + "QA[79]" + "QA[78]" + "QA[77]" + "QA[76]" + + "QA[75]" + "QA[74]" + "QA[73]" + "QA[72]" + "QA[71]" + "QA[70]" + "QA[69]" + "QA[68]" + + "QA[67]" + "QA[66]" + "QA[65]" + "QA[64]" + "QA[63]" + "QA[62]" + "QA[61]" + "QA[60]" + + "QA[59]" + "QA[58]" + "QA[57]" + "QA[56]" + "QA[55]" + "QA[54]" + "QA[53]" + "QA[52]" + + "QA[51]" + "QA[50]" + "QA[49]" + "QA[48]" + "QA[47]" + "QA[46]" + "QA[45]" + "QA[44]" + + "QA[43]" + "QA[42]" + "QA[41]" + "QA[40]" + "QA[39]" + "QA[38]" + "QA[37]" + "QA[36]" + + "QA[35]" + "QA[34]" + "QA[33]" + "QA[32]" + "QA[31]" + "QA[30]" + "QA[29]" + "QA[28]" + + "QA[27]" + "QA[26]" + "QA[25]" + "QA[24]" + "QA[23]" + "QA[22]" + "QA[21]" + "QA[20]" + + "QA[19]" + "QA[18]" + "QA[17]" + "QA[16]" + "QA[15]" + "QA[14]" + "QA[13]" + "QA[12]" + + "QA[11]" + "QA[10]" + "QA[9]" + "QA[8]" + "QA[7]" + "QA[6]" + "QA[5]" + "QA[4]" + + "QA[3]" + "QA[2]" + "QA[1]" + "QA[0]" + "SOA[1]" + "SOA[0]" + "SOB[1]" + "SOB[0]"'; + "_si" = '"SIA[0]" + "SIA[1]" + "SIB[0]" + "SIB[1]"' {ScanIn; } + "_so" = '"SOA[0]" + "SOA[1]" + "SOB[0]" + "SOB[1]"' {ScanOut; } +} +ScanStructures { + ScanChain "chain_rf2_32x128_wm1_1" { + ScanLength 64; + ScanCells "uDQA63" "uDQA62" "uDQA61" "uDQA60" "uDQA59" "uDQA58" "uDQA57" "uDQA56" "uDQA55" "uDQA54" "uDQA53" "uDQA52" "uDQA51" "uDQA50" "uDQA49" "uDQA48" "uDQA47" "uDQA46" "uDQA45" "uDQA44" "uDQA43" "uDQA42" "uDQA41" "uDQA40" "uDQA39" "uDQA38" "uDQA37" "uDQA36" "uDQA35" "uDQA34" "uDQA33" "uDQA32" "uDQA31" "uDQA30" "uDQA29" "uDQA28" "uDQA27" "uDQA26" "uDQA25" "uDQA24" "uDQA23" "uDQA22" "uDQA21" "uDQA20" "uDQA19" "uDQA18" "uDQA17" "uDQA16" "uDQA15" "uDQA14" "uDQA13" "uDQA12" "uDQA11" "uDQA10" "uDQA9" "uDQA8" "uDQA7" "uDQA6" "uDQA5" "uDQA4" "uDQA3" "uDQA2" "uDQA1" "uDQA0" ; + ScanIn "SIA[0]"; + ScanOut "SOA[0]"; + ScanEnable "SEA"; + ScanMasterClock "CLKA"; + } + ScanChain "chain_rf2_32x128_wm1_2" { + ScanLength 64; + ScanCells "uDQA64" "uDQA65" "uDQA66" "uDQA67" "uDQA68" "uDQA69" "uDQA70" "uDQA71" "uDQA72" "uDQA73" "uDQA74" "uDQA75" "uDQA76" "uDQA77" "uDQA78" "uDQA79" "uDQA80" "uDQA81" "uDQA82" "uDQA83" "uDQA84" "uDQA85" "uDQA86" "uDQA87" "uDQA88" "uDQA89" "uDQA90" "uDQA91" "uDQA92" "uDQA93" "uDQA94" "uDQA95" "uDQA96" "uDQA97" "uDQA98" "uDQA99" "uDQA100" "uDQA101" "uDQA102" "uDQA103" "uDQA104" "uDQA105" "uDQA106" "uDQA107" "uDQA108" "uDQA109" "uDQA110" "uDQA111" "uDQA112" "uDQA113" "uDQA114" "uDQA115" "uDQA116" "uDQA117" "uDQA118" "uDQA119" "uDQA120" "uDQA121" "uDQA122" "uDQA123" "uDQA124" "uDQA125" "uDQA126" "uDQA127" ; + ScanIn "SIA[1]"; + ScanOut "SOA[1]"; + ScanEnable "SEA"; + ScanMasterClock "CLKA"; + } + ScanChain "chain_rf2_32x128_wm1_3" { + ScanLength 64; + ScanCells "uDQB63" "uDQB62" "uDQB61" "uDQB60" "uDQB59" "uDQB58" "uDQB57" "uDQB56" "uDQB55" "uDQB54" "uDQB53" "uDQB52" "uDQB51" "uDQB50" "uDQB49" "uDQB48" "uDQB47" "uDQB46" "uDQB45" "uDQB44" "uDQB43" "uDQB42" "uDQB41" "uDQB40" "uDQB39" "uDQB38" "uDQB37" "uDQB36" "uDQB35" "uDQB34" "uDQB33" "uDQB32" "uDQB31" "uDQB30" "uDQB29" "uDQB28" "uDQB27" "uDQB26" "uDQB25" "uDQB24" "uDQB23" "uDQB22" "uDQB21" "uDQB20" "uDQB19" "uDQB18" "uDQB17" "uDQB16" "uDQB15" "uDQB14" "uDQB13" "uDQB12" "uDQB11" "uDQB10" "uDQB9" "uDQB8" "uDQB7" "uDQB6" "uDQB5" "uDQB4" "uDQB3" "uDQB2" "uDQB1" "uDQB0" ; + ScanIn "SIB[0]"; + ScanOut "SOB[0]"; + ScanEnable "SEB"; + ScanMasterClock "CLKB"; + } + ScanChain "chain_rf2_32x128_wm1_4" { + ScanLength 64; + ScanCells "uDQB64" "uDQB65" "uDQB66" "uDQB67" "uDQB68" "uDQB69" "uDQB70" "uDQB71" "uDQB72" "uDQB73" "uDQB74" "uDQB75" "uDQB76" "uDQB77" "uDQB78" "uDQB79" "uDQB80" "uDQB81" "uDQB82" "uDQB83" "uDQB84" "uDQB85" "uDQB86" "uDQB87" "uDQB88" "uDQB89" "uDQB90" "uDQB91" "uDQB92" "uDQB93" "uDQB94" "uDQB95" "uDQB96" "uDQB97" "uDQB98" "uDQB99" "uDQB100" "uDQB101" "uDQB102" "uDQB103" "uDQB104" "uDQB105" "uDQB106" "uDQB107" "uDQB108" "uDQB109" "uDQB110" "uDQB111" "uDQB112" "uDQB113" "uDQB114" "uDQB115" "uDQB116" "uDQB117" "uDQB118" "uDQB119" "uDQB120" "uDQB121" "uDQB122" "uDQB123" "uDQB124" "uDQB125" "uDQB126" "uDQB127" ; + ScanIn "SIB[1]"; + ScanOut "SOB[1]"; + ScanEnable "SEB"; + ScanMasterClock "CLKB"; + } +} +Timing { + WaveformTable "_default_WFT_" { + Period '100ns'; + Waveforms { + "all_inputs" { + 01ZN { '0ns' D/U/Z/N; } + } + "all_outputs" { + XHTL { '40ns' X/H/T/L; } + } + "CLKA" { + P { '0ns' D; '45ns' U; '55ns' D; } + } + "CLKB" { + P { '0ns' D; '45ns' U; '55ns' D; } + } + } + } +} +Procedures { + "capture" { + W "_default_WFT_"; + V { "_pi" = #; "_po" = #; } + } + "capture_CLK" { + W "_default_WFT_"; + V {"_pi" = #; "_po" = #;"CLKA" = P;"CLKB" = P; } + } + "load_unload" { + W "_default_WFT_"; + V { "CLKA" = 0; "CLKB" = 0; "_si" = \r2 N; "_so" =\r2 X; "SEA" = 1; "SEB" = 1; "DFTRAMBYP" = 1; } + Shift { + V { "CLKA" = P; "CLKB" = P; "_si" = \r2 #; "_so" = \r2 #; } + } + } +} +MacroDefs { + "test_setup" { + W "_default_WFT_"; + C {"all_inputs" = \r60 N; "all_outputs" = \r34 X; } + V { "CLKA" = P; "CLKB" = P; } + } +} +Environment "rf2_32x128_wm1" { + CTL { + } + CTL Internal_scan { + TestMode InternalTest; + Focus Top { + } + Internal { + "SIA[0]" { + CaptureClock "CLKA" { + LeadingEdge; + } + DataType ScanDataIn { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SIA[1]" { + CaptureClock "CLKA" { + LeadingEdge; + } + DataType ScanDataIn { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SOA[0]" { + LaunchClock "CLKA" { + LeadingEdge; + } + DataType ScanDataOut { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SOA[1]" { + LaunchClock "CLKA" { + LeadingEdge; + } + DataType ScanDataOut { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SEA" { + DataType ScanEnable { + ActiveState ForceUp; + } + } + "CLKA" { + DataType ScanMasterClock MasterClock; + } + "SIB[0]" { + CaptureClock "CLKB" { + LeadingEdge; + } + DataType ScanDataIn { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SIB[1]" { + CaptureClock "CLKB" { + LeadingEdge; + } + DataType ScanDataIn { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SOB[0]" { + LaunchClock "CLKB" { + LeadingEdge; + } + DataType ScanDataOut { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SOB[1]" { + LaunchClock "CLKB" { + LeadingEdge; + } + DataType ScanDataOut { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SEB" { + DataType ScanEnable { + ActiveState ForceUp; + } + } + "CLKB" { + DataType ScanMasterClock MasterClock; + } + } + } +} +Environment dftSpec { + CTL { + } + CTL all_dft { + TestMode ForInheritOnly; + } +} diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.lef b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.lef new file mode 100644 index 00000000..70b26b50 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.lef @@ -0,0 +1,30569 @@ +# Copyright (c) 1993 - 2019 ARM Limited. All Rights Reserved. +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Limited. + +# PhyVGen V 8.3.0 +# ARM Version r4p0 +# Creation Date: Thu Oct 17 15:30:20 2019 + + +# Memory Configuration: +# ~~~~~~~~~~~~~~~~~~~~~ +# -activity_factor 50 -atf off -back_biasing off -bits 128 -bmux on +# -bus_notation on -check_instname off -diodes on -drive 6 -ema on -frequency +# 1.0 -instname rf2_32x128_wm1 -left_bus_delim "[" -mux 2 -mvt BASE -name_case +# upper -pipeline off -power_gating off -power_type otc -pwr_gnd_rename +# vddpe:VDDPE,vddce:VDDCE,vsse:VSSE -rcols 2 -redundancy off -retention on +# -right_bus_delim "]" -rrows 0 -ser none -site_def off -top_layer m5-m10 +# -words 32 -wp_size 1 -write_mask on -write_thru off -corners +# ff_0p99v_0p99v_125c,ss_0p81v_0p81v_m40c,tt_0p90v_0p90v_25c +# + +VERSION 5.7 ; +BUSBITCHARS "[]" ; +MACRO rf2_32x128_wm1 + FOREIGN rf2_32x128_wm1 0 0 ; + SYMMETRY X Y ; + SIZE 21.165 BY 414.86 ; + CLASS BLOCK ; + PIN AA[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 191.27 0.25 191.37 ; + LAYER M2 ; + RECT 0 191.27 0.25 191.37 ; + LAYER M3 ; + RECT 0 191.27 0.25 191.37 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[0] + + PIN AA[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 194.3 0.25 194.4 ; + LAYER M2 ; + RECT 0 194.3 0.25 194.4 ; + LAYER M3 ; + RECT 0 194.3 0.25 194.4 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[1] + + PIN AA[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 197.33 0.25 197.43 ; + LAYER M2 ; + RECT 0 197.33 0.25 197.43 ; + LAYER M3 ; + RECT 0 197.33 0.25 197.43 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[2] + + PIN AA[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 198.875 0.25 198.975 ; + LAYER M2 ; + RECT 0 198.875 0.25 198.975 ; + LAYER M3 ; + RECT 0 198.875 0.25 198.975 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[3] + + PIN AA[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 201.905 0.25 202.005 ; + LAYER M2 ; + RECT 0 201.905 0.25 202.005 ; + LAYER M3 ; + RECT 0 201.905 0.25 202.005 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[4] + + PIN AB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 224.185 0.25 224.285 ; + LAYER M2 ; + RECT 0 224.185 0.25 224.285 ; + LAYER M3 ; + RECT 0 224.185 0.25 224.285 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[0] + + PIN AB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 220.96 0.25 221.06 ; + LAYER M2 ; + RECT 0 220.96 0.25 221.06 ; + LAYER M3 ; + RECT 0 220.96 0.25 221.06 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[1] + + PIN AB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 218.125 0.25 218.225 ; + LAYER M2 ; + RECT 0 218.125 0.25 218.225 ; + LAYER M3 ; + RECT 0 218.125 0.25 218.225 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[2] + + PIN AB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 216.58 0.25 216.68 ; + LAYER M2 ; + RECT 0 216.58 0.25 216.68 ; + LAYER M3 ; + RECT 0 216.58 0.25 216.68 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[3] + + PIN AB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 213.55 0.25 213.65 ; + LAYER M2 ; + RECT 0 213.55 0.25 213.65 ; + LAYER M3 ; + RECT 0 213.55 0.25 213.65 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[4] + + PIN AYA[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 191.675 0.25 191.775 ; + LAYER M2 ; + RECT 0 191.675 0.25 191.775 ; + LAYER M3 ; + RECT 0 191.675 0.25 191.775 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[0] + + PIN AYA[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 194.705 0.25 194.805 ; + LAYER M2 ; + RECT 0 194.705 0.25 194.805 ; + LAYER M3 ; + RECT 0 194.705 0.25 194.805 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[1] + + PIN AYA[2] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 197.735 0.25 197.835 ; + LAYER M2 ; + RECT 0 197.735 0.25 197.835 ; + LAYER M3 ; + RECT 0 197.735 0.25 197.835 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[2] + + PIN AYA[3] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 198.5 0.25 198.6 ; + LAYER M2 ; + RECT 0 198.5 0.25 198.6 ; + LAYER M3 ; + RECT 0 198.5 0.25 198.6 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[3] + + PIN AYA[4] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 201.705 0.25 201.805 ; + LAYER M2 ; + RECT 0 201.705 0.25 201.805 ; + LAYER M3 ; + RECT 0 201.705 0.25 201.805 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[4] + + PIN AYB[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 223.78 0.25 223.88 ; + LAYER M2 ; + RECT 0 223.78 0.25 223.88 ; + LAYER M3 ; + RECT 0 223.78 0.25 223.88 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[0] + + PIN AYB[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 220.75 0.25 220.85 ; + LAYER M2 ; + RECT 0 220.75 0.25 220.85 ; + LAYER M3 ; + RECT 0 220.75 0.25 220.85 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[1] + + PIN AYB[2] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 217.75 0.25 217.85 ; + LAYER M2 ; + RECT 0 217.75 0.25 217.85 ; + LAYER M3 ; + RECT 0 217.75 0.25 217.85 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[2] + + PIN AYB[3] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 216.985 0.25 217.085 ; + LAYER M2 ; + RECT 0 216.985 0.25 217.085 ; + LAYER M3 ; + RECT 0 216.985 0.25 217.085 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[3] + + PIN AYB[4] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 213.925 0.25 214.025 ; + LAYER M2 ; + RECT 0 213.925 0.25 214.025 ; + LAYER M3 ; + RECT 0 213.925 0.25 214.025 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[4] + + PIN CENA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 188.51 0.25 188.61 ; + LAYER M2 ; + RECT 0 188.51 0.25 188.61 ; + LAYER M3 ; + RECT 0 188.51 0.25 188.61 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CENA + + PIN CENB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 228.705 0.25 228.805 ; + LAYER M2 ; + RECT 0 228.705 0.25 228.805 ; + LAYER M3 ; + RECT 0 228.705 0.25 228.805 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CENB + + PIN CENYA + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 187.1 0.25 187.2 ; + LAYER M2 ; + RECT 0 187.1 0.25 187.2 ; + LAYER M3 ; + RECT 0 187.1 0.25 187.2 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CENYA + + PIN CENYB + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 229.25 0.25 229.35 ; + LAYER M2 ; + RECT 0 229.25 0.25 229.35 ; + LAYER M3 ; + RECT 0 229.25 0.25 229.35 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CENYB + + PIN CLKA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 198.13 0.25 198.23 ; + LAYER M2 ; + RECT 0 198.13 0.25 198.23 ; + LAYER M3 ; + RECT 0 198.13 0.25 198.23 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CLKA + + PIN CLKB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 218.78 0.25 218.88 ; + LAYER M2 ; + RECT 0 218.78 0.25 218.88 ; + LAYER M3 ; + RECT 0 218.78 0.25 218.88 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CLKB + + PIN COLLDISN + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 206.3 0.25 206.4 ; + LAYER M2 ; + RECT 0 206.3 0.25 206.4 ; + LAYER M3 ; + RECT 0 206.3 0.25 206.4 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END COLLDISN + + PIN DB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 2.195 0.25 2.295 ; + LAYER M2 ; + RECT 0 2.195 0.25 2.295 ; + LAYER M3 ; + RECT 0 2.195 0.25 2.295 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[0] + + PIN DB[100] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 334.805 0.25 334.905 ; + LAYER M2 ; + RECT 0 334.805 0.25 334.905 ; + LAYER M3 ; + RECT 0 334.805 0.25 334.905 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[100] + + PIN DB[101] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 337.685 0.25 337.785 ; + LAYER M2 ; + RECT 0 337.685 0.25 337.785 ; + LAYER M3 ; + RECT 0 337.685 0.25 337.785 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[101] + + PIN DB[102] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 340.565 0.25 340.665 ; + LAYER M2 ; + RECT 0 340.565 0.25 340.665 ; + LAYER M3 ; + RECT 0 340.565 0.25 340.665 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[102] + + PIN DB[103] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 343.445 0.25 343.545 ; + LAYER M2 ; + RECT 0 343.445 0.25 343.545 ; + LAYER M3 ; + RECT 0 343.445 0.25 343.545 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[103] + + PIN DB[104] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 346.325 0.25 346.425 ; + LAYER M2 ; + RECT 0 346.325 0.25 346.425 ; + LAYER M3 ; + RECT 0 346.325 0.25 346.425 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[104] + + PIN DB[105] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 349.205 0.25 349.305 ; + LAYER M2 ; + RECT 0 349.205 0.25 349.305 ; + LAYER M3 ; + RECT 0 349.205 0.25 349.305 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[105] + + PIN DB[106] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 352.085 0.25 352.185 ; + LAYER M2 ; + RECT 0 352.085 0.25 352.185 ; + LAYER M3 ; + RECT 0 352.085 0.25 352.185 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[106] + + PIN DB[107] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 354.965 0.25 355.065 ; + LAYER M2 ; + RECT 0 354.965 0.25 355.065 ; + LAYER M3 ; + RECT 0 354.965 0.25 355.065 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[107] + + PIN DB[108] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 357.845 0.25 357.945 ; + LAYER M2 ; + RECT 0 357.845 0.25 357.945 ; + LAYER M3 ; + RECT 0 357.845 0.25 357.945 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[108] + + PIN DB[109] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 360.725 0.25 360.825 ; + LAYER M2 ; + RECT 0 360.725 0.25 360.825 ; + LAYER M3 ; + RECT 0 360.725 0.25 360.825 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[109] + + PIN DB[10] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 30.995 0.25 31.095 ; + LAYER M2 ; + RECT 0 30.995 0.25 31.095 ; + LAYER M3 ; + RECT 0 30.995 0.25 31.095 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[10] + + PIN DB[110] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 363.605 0.25 363.705 ; + LAYER M2 ; + RECT 0 363.605 0.25 363.705 ; + LAYER M3 ; + RECT 0 363.605 0.25 363.705 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[110] + + PIN DB[111] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 366.485 0.25 366.585 ; + LAYER M2 ; + RECT 0 366.485 0.25 366.585 ; + LAYER M3 ; + RECT 0 366.485 0.25 366.585 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[111] + + PIN DB[112] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 369.365 0.25 369.465 ; + LAYER M2 ; + RECT 0 369.365 0.25 369.465 ; + LAYER M3 ; + RECT 0 369.365 0.25 369.465 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[112] + + PIN DB[113] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 372.245 0.25 372.345 ; + LAYER M2 ; + RECT 0 372.245 0.25 372.345 ; + LAYER M3 ; + RECT 0 372.245 0.25 372.345 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[113] + + PIN DB[114] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 375.125 0.25 375.225 ; + LAYER M2 ; + RECT 0 375.125 0.25 375.225 ; + LAYER M3 ; + RECT 0 375.125 0.25 375.225 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[114] + + PIN DB[115] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 378.005 0.25 378.105 ; + LAYER M2 ; + RECT 0 378.005 0.25 378.105 ; + LAYER M3 ; + RECT 0 378.005 0.25 378.105 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[115] + + PIN DB[116] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 380.885 0.25 380.985 ; + LAYER M2 ; + RECT 0 380.885 0.25 380.985 ; + LAYER M3 ; + RECT 0 380.885 0.25 380.985 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[116] + + PIN DB[117] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 383.765 0.25 383.865 ; + LAYER M2 ; + RECT 0 383.765 0.25 383.865 ; + LAYER M3 ; + RECT 0 383.765 0.25 383.865 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[117] + + PIN DB[118] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 386.645 0.25 386.745 ; + LAYER M2 ; + RECT 0 386.645 0.25 386.745 ; + LAYER M3 ; + RECT 0 386.645 0.25 386.745 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[118] + + PIN DB[119] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 389.525 0.25 389.625 ; + LAYER M2 ; + RECT 0 389.525 0.25 389.625 ; + LAYER M3 ; + RECT 0 389.525 0.25 389.625 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[119] + + PIN DB[11] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 33.875 0.25 33.975 ; + LAYER M2 ; + RECT 0 33.875 0.25 33.975 ; + LAYER M3 ; + RECT 0 33.875 0.25 33.975 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[11] + + PIN DB[120] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 392.405 0.25 392.505 ; + LAYER M2 ; + RECT 0 392.405 0.25 392.505 ; + LAYER M3 ; + RECT 0 392.405 0.25 392.505 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[120] + + PIN DB[121] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 395.285 0.25 395.385 ; + LAYER M2 ; + RECT 0 395.285 0.25 395.385 ; + LAYER M3 ; + RECT 0 395.285 0.25 395.385 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[121] + + PIN DB[122] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 398.165 0.25 398.265 ; + LAYER M2 ; + RECT 0 398.165 0.25 398.265 ; + LAYER M3 ; + RECT 0 398.165 0.25 398.265 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[122] + + PIN DB[123] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 401.045 0.25 401.145 ; + LAYER M2 ; + RECT 0 401.045 0.25 401.145 ; + LAYER M3 ; + RECT 0 401.045 0.25 401.145 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[123] + + PIN DB[124] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 403.925 0.25 404.025 ; + LAYER M2 ; + RECT 0 403.925 0.25 404.025 ; + LAYER M3 ; + RECT 0 403.925 0.25 404.025 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[124] + + PIN DB[125] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 406.805 0.25 406.905 ; + LAYER M2 ; + RECT 0 406.805 0.25 406.905 ; + LAYER M3 ; + RECT 0 406.805 0.25 406.905 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[125] + + PIN DB[126] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 409.685 0.25 409.785 ; + LAYER M2 ; + RECT 0 409.685 0.25 409.785 ; + LAYER M3 ; + RECT 0 409.685 0.25 409.785 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[126] + + PIN DB[127] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 412.565 0.25 412.665 ; + LAYER M2 ; + RECT 0 412.565 0.25 412.665 ; + LAYER M3 ; + RECT 0 412.565 0.25 412.665 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[127] + + PIN DB[12] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 36.755 0.25 36.855 ; + LAYER M2 ; + RECT 0 36.755 0.25 36.855 ; + LAYER M3 ; + RECT 0 36.755 0.25 36.855 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[12] + + PIN DB[13] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 39.635 0.25 39.735 ; + LAYER M2 ; + RECT 0 39.635 0.25 39.735 ; + LAYER M3 ; + RECT 0 39.635 0.25 39.735 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[13] + + PIN DB[14] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 42.515 0.25 42.615 ; + LAYER M2 ; + RECT 0 42.515 0.25 42.615 ; + LAYER M3 ; + RECT 0 42.515 0.25 42.615 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[14] + + PIN DB[15] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 45.395 0.25 45.495 ; + LAYER M2 ; + RECT 0 45.395 0.25 45.495 ; + LAYER M3 ; + RECT 0 45.395 0.25 45.495 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[15] + + PIN DB[16] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 48.275 0.25 48.375 ; + LAYER M2 ; + RECT 0 48.275 0.25 48.375 ; + LAYER M3 ; + RECT 0 48.275 0.25 48.375 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[16] + + PIN DB[17] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 51.155 0.25 51.255 ; + LAYER M2 ; + RECT 0 51.155 0.25 51.255 ; + LAYER M3 ; + RECT 0 51.155 0.25 51.255 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[17] + + PIN DB[18] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 54.035 0.25 54.135 ; + LAYER M2 ; + RECT 0 54.035 0.25 54.135 ; + LAYER M3 ; + RECT 0 54.035 0.25 54.135 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[18] + + PIN DB[19] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 56.915 0.25 57.015 ; + LAYER M2 ; + RECT 0 56.915 0.25 57.015 ; + LAYER M3 ; + RECT 0 56.915 0.25 57.015 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[19] + + PIN DB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 5.075 0.25 5.175 ; + LAYER M2 ; + RECT 0 5.075 0.25 5.175 ; + LAYER M3 ; + RECT 0 5.075 0.25 5.175 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[1] + + PIN DB[20] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 59.795 0.25 59.895 ; + LAYER M2 ; + RECT 0 59.795 0.25 59.895 ; + LAYER M3 ; + RECT 0 59.795 0.25 59.895 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[20] + + PIN DB[21] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 62.675 0.25 62.775 ; + LAYER M2 ; + RECT 0 62.675 0.25 62.775 ; + LAYER M3 ; + RECT 0 62.675 0.25 62.775 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[21] + + PIN DB[22] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 65.555 0.25 65.655 ; + LAYER M2 ; + RECT 0 65.555 0.25 65.655 ; + LAYER M3 ; + RECT 0 65.555 0.25 65.655 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[22] + + PIN DB[23] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 68.435 0.25 68.535 ; + LAYER M2 ; + RECT 0 68.435 0.25 68.535 ; + LAYER M3 ; + RECT 0 68.435 0.25 68.535 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[23] + + PIN DB[24] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 71.315 0.25 71.415 ; + LAYER M2 ; + RECT 0 71.315 0.25 71.415 ; + LAYER M3 ; + RECT 0 71.315 0.25 71.415 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[24] + + PIN DB[25] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 74.195 0.25 74.295 ; + LAYER M2 ; + RECT 0 74.195 0.25 74.295 ; + LAYER M3 ; + RECT 0 74.195 0.25 74.295 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[25] + + PIN DB[26] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 77.075 0.25 77.175 ; + LAYER M2 ; + RECT 0 77.075 0.25 77.175 ; + LAYER M3 ; + RECT 0 77.075 0.25 77.175 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[26] + + PIN DB[27] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 79.955 0.25 80.055 ; + LAYER M2 ; + RECT 0 79.955 0.25 80.055 ; + LAYER M3 ; + RECT 0 79.955 0.25 80.055 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[27] + + PIN DB[28] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 82.835 0.25 82.935 ; + LAYER M2 ; + RECT 0 82.835 0.25 82.935 ; + LAYER M3 ; + RECT 0 82.835 0.25 82.935 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[28] + + PIN DB[29] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 85.715 0.25 85.815 ; + LAYER M2 ; + RECT 0 85.715 0.25 85.815 ; + LAYER M3 ; + RECT 0 85.715 0.25 85.815 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[29] + + PIN DB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 7.955 0.25 8.055 ; + LAYER M2 ; + RECT 0 7.955 0.25 8.055 ; + LAYER M3 ; + RECT 0 7.955 0.25 8.055 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[2] + + PIN DB[30] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 88.595 0.25 88.695 ; + LAYER M2 ; + RECT 0 88.595 0.25 88.695 ; + LAYER M3 ; + RECT 0 88.595 0.25 88.695 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[30] + + PIN DB[31] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 91.475 0.25 91.575 ; + LAYER M2 ; + RECT 0 91.475 0.25 91.575 ; + LAYER M3 ; + RECT 0 91.475 0.25 91.575 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[31] + + PIN DB[32] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 94.355 0.25 94.455 ; + LAYER M2 ; + RECT 0 94.355 0.25 94.455 ; + LAYER M3 ; + RECT 0 94.355 0.25 94.455 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[32] + + PIN DB[33] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 97.235 0.25 97.335 ; + LAYER M2 ; + RECT 0 97.235 0.25 97.335 ; + LAYER M3 ; + RECT 0 97.235 0.25 97.335 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[33] + + PIN DB[34] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 100.115 0.25 100.215 ; + LAYER M2 ; + RECT 0 100.115 0.25 100.215 ; + LAYER M3 ; + RECT 0 100.115 0.25 100.215 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[34] + + PIN DB[35] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 102.995 0.25 103.095 ; + LAYER M2 ; + RECT 0 102.995 0.25 103.095 ; + LAYER M3 ; + RECT 0 102.995 0.25 103.095 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[35] + + PIN DB[36] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 105.875 0.25 105.975 ; + LAYER M2 ; + RECT 0 105.875 0.25 105.975 ; + LAYER M3 ; + RECT 0 105.875 0.25 105.975 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[36] + + PIN DB[37] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 108.755 0.25 108.855 ; + LAYER M2 ; + RECT 0 108.755 0.25 108.855 ; + LAYER M3 ; + RECT 0 108.755 0.25 108.855 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[37] + + PIN DB[38] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 111.635 0.25 111.735 ; + LAYER M2 ; + RECT 0 111.635 0.25 111.735 ; + LAYER M3 ; + RECT 0 111.635 0.25 111.735 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[38] + + PIN DB[39] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 114.515 0.25 114.615 ; + LAYER M2 ; + RECT 0 114.515 0.25 114.615 ; + LAYER M3 ; + RECT 0 114.515 0.25 114.615 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[39] + + PIN DB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 10.835 0.25 10.935 ; + LAYER M2 ; + RECT 0 10.835 0.25 10.935 ; + LAYER M3 ; + RECT 0 10.835 0.25 10.935 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[3] + + PIN DB[40] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 117.395 0.25 117.495 ; + LAYER M2 ; + RECT 0 117.395 0.25 117.495 ; + LAYER M3 ; + RECT 0 117.395 0.25 117.495 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[40] + + PIN DB[41] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 120.275 0.25 120.375 ; + LAYER M2 ; + RECT 0 120.275 0.25 120.375 ; + LAYER M3 ; + RECT 0 120.275 0.25 120.375 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[41] + + PIN DB[42] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 123.155 0.25 123.255 ; + LAYER M2 ; + RECT 0 123.155 0.25 123.255 ; + LAYER M3 ; + RECT 0 123.155 0.25 123.255 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[42] + + PIN DB[43] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 126.035 0.25 126.135 ; + LAYER M2 ; + RECT 0 126.035 0.25 126.135 ; + LAYER M3 ; + RECT 0 126.035 0.25 126.135 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[43] + + PIN DB[44] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 128.915 0.25 129.015 ; + LAYER M2 ; + RECT 0 128.915 0.25 129.015 ; + LAYER M3 ; + RECT 0 128.915 0.25 129.015 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[44] + + PIN DB[45] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 131.795 0.25 131.895 ; + LAYER M2 ; + RECT 0 131.795 0.25 131.895 ; + LAYER M3 ; + RECT 0 131.795 0.25 131.895 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[45] + + PIN DB[46] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 134.675 0.25 134.775 ; + LAYER M2 ; + RECT 0 134.675 0.25 134.775 ; + LAYER M3 ; + RECT 0 134.675 0.25 134.775 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[46] + + PIN DB[47] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 137.555 0.25 137.655 ; + LAYER M2 ; + RECT 0 137.555 0.25 137.655 ; + LAYER M3 ; + RECT 0 137.555 0.25 137.655 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[47] + + PIN DB[48] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 140.435 0.25 140.535 ; + LAYER M2 ; + RECT 0 140.435 0.25 140.535 ; + LAYER M3 ; + RECT 0 140.435 0.25 140.535 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[48] + + PIN DB[49] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 143.315 0.25 143.415 ; + LAYER M2 ; + RECT 0 143.315 0.25 143.415 ; + LAYER M3 ; + RECT 0 143.315 0.25 143.415 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[49] + + PIN DB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 13.715 0.25 13.815 ; + LAYER M2 ; + RECT 0 13.715 0.25 13.815 ; + LAYER M3 ; + RECT 0 13.715 0.25 13.815 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[4] + + PIN DB[50] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 146.195 0.25 146.295 ; + LAYER M2 ; + RECT 0 146.195 0.25 146.295 ; + LAYER M3 ; + RECT 0 146.195 0.25 146.295 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[50] + + PIN DB[51] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 149.075 0.25 149.175 ; + LAYER M2 ; + RECT 0 149.075 0.25 149.175 ; + LAYER M3 ; + RECT 0 149.075 0.25 149.175 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[51] + + PIN DB[52] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 151.955 0.25 152.055 ; + LAYER M2 ; + RECT 0 151.955 0.25 152.055 ; + LAYER M3 ; + RECT 0 151.955 0.25 152.055 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[52] + + PIN DB[53] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 154.835 0.25 154.935 ; + LAYER M2 ; + RECT 0 154.835 0.25 154.935 ; + LAYER M3 ; + RECT 0 154.835 0.25 154.935 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[53] + + PIN DB[54] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 157.715 0.25 157.815 ; + LAYER M2 ; + RECT 0 157.715 0.25 157.815 ; + LAYER M3 ; + RECT 0 157.715 0.25 157.815 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[54] + + PIN DB[55] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 160.595 0.25 160.695 ; + LAYER M2 ; + RECT 0 160.595 0.25 160.695 ; + LAYER M3 ; + RECT 0 160.595 0.25 160.695 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[55] + + PIN DB[56] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 163.475 0.25 163.575 ; + LAYER M2 ; + RECT 0 163.475 0.25 163.575 ; + LAYER M3 ; + RECT 0 163.475 0.25 163.575 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[56] + + PIN DB[57] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 166.355 0.25 166.455 ; + LAYER M2 ; + RECT 0 166.355 0.25 166.455 ; + LAYER M3 ; + RECT 0 166.355 0.25 166.455 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[57] + + PIN DB[58] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 169.235 0.25 169.335 ; + LAYER M2 ; + RECT 0 169.235 0.25 169.335 ; + LAYER M3 ; + RECT 0 169.235 0.25 169.335 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[58] + + PIN DB[59] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 172.115 0.25 172.215 ; + LAYER M2 ; + RECT 0 172.115 0.25 172.215 ; + LAYER M3 ; + RECT 0 172.115 0.25 172.215 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[59] + + PIN DB[5] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 16.595 0.25 16.695 ; + LAYER M2 ; + RECT 0 16.595 0.25 16.695 ; + LAYER M3 ; + RECT 0 16.595 0.25 16.695 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[5] + + PIN DB[60] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 174.995 0.25 175.095 ; + LAYER M2 ; + RECT 0 174.995 0.25 175.095 ; + LAYER M3 ; + RECT 0 174.995 0.25 175.095 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[60] + + PIN DB[61] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 177.875 0.25 177.975 ; + LAYER M2 ; + RECT 0 177.875 0.25 177.975 ; + LAYER M3 ; + RECT 0 177.875 0.25 177.975 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[61] + + PIN DB[62] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 180.755 0.25 180.855 ; + LAYER M2 ; + RECT 0 180.755 0.25 180.855 ; + LAYER M3 ; + RECT 0 180.755 0.25 180.855 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[62] + + PIN DB[63] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 183.635 0.25 183.735 ; + LAYER M2 ; + RECT 0 183.635 0.25 183.735 ; + LAYER M3 ; + RECT 0 183.635 0.25 183.735 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[63] + + PIN DB[64] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 231.125 0.25 231.225 ; + LAYER M2 ; + RECT 0 231.125 0.25 231.225 ; + LAYER M3 ; + RECT 0 231.125 0.25 231.225 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[64] + + PIN DB[65] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 234.005 0.25 234.105 ; + LAYER M2 ; + RECT 0 234.005 0.25 234.105 ; + LAYER M3 ; + RECT 0 234.005 0.25 234.105 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[65] + + PIN DB[66] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 236.885 0.25 236.985 ; + LAYER M2 ; + RECT 0 236.885 0.25 236.985 ; + LAYER M3 ; + RECT 0 236.885 0.25 236.985 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[66] + + PIN DB[67] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 239.765 0.25 239.865 ; + LAYER M2 ; + RECT 0 239.765 0.25 239.865 ; + LAYER M3 ; + RECT 0 239.765 0.25 239.865 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[67] + + PIN DB[68] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 242.645 0.25 242.745 ; + LAYER M2 ; + RECT 0 242.645 0.25 242.745 ; + LAYER M3 ; + RECT 0 242.645 0.25 242.745 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[68] + + PIN DB[69] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 245.525 0.25 245.625 ; + LAYER M2 ; + RECT 0 245.525 0.25 245.625 ; + LAYER M3 ; + RECT 0 245.525 0.25 245.625 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[69] + + PIN DB[6] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 19.475 0.25 19.575 ; + LAYER M2 ; + RECT 0 19.475 0.25 19.575 ; + LAYER M3 ; + RECT 0 19.475 0.25 19.575 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[6] + + PIN DB[70] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 248.405 0.25 248.505 ; + LAYER M2 ; + RECT 0 248.405 0.25 248.505 ; + LAYER M3 ; + RECT 0 248.405 0.25 248.505 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[70] + + PIN DB[71] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 251.285 0.25 251.385 ; + LAYER M2 ; + RECT 0 251.285 0.25 251.385 ; + LAYER M3 ; + RECT 0 251.285 0.25 251.385 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[71] + + PIN DB[72] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 254.165 0.25 254.265 ; + LAYER M2 ; + RECT 0 254.165 0.25 254.265 ; + LAYER M3 ; + RECT 0 254.165 0.25 254.265 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[72] + + PIN DB[73] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 257.045 0.25 257.145 ; + LAYER M2 ; + RECT 0 257.045 0.25 257.145 ; + LAYER M3 ; + RECT 0 257.045 0.25 257.145 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[73] + + PIN DB[74] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 259.925 0.25 260.025 ; + LAYER M2 ; + RECT 0 259.925 0.25 260.025 ; + LAYER M3 ; + RECT 0 259.925 0.25 260.025 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[74] + + PIN DB[75] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 262.805 0.25 262.905 ; + LAYER M2 ; + RECT 0 262.805 0.25 262.905 ; + LAYER M3 ; + RECT 0 262.805 0.25 262.905 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[75] + + PIN DB[76] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 265.685 0.25 265.785 ; + LAYER M2 ; + RECT 0 265.685 0.25 265.785 ; + LAYER M3 ; + RECT 0 265.685 0.25 265.785 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[76] + + PIN DB[77] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 268.565 0.25 268.665 ; + LAYER M2 ; + RECT 0 268.565 0.25 268.665 ; + LAYER M3 ; + RECT 0 268.565 0.25 268.665 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[77] + + PIN DB[78] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 271.445 0.25 271.545 ; + LAYER M2 ; + RECT 0 271.445 0.25 271.545 ; + LAYER M3 ; + RECT 0 271.445 0.25 271.545 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[78] + + PIN DB[79] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 274.325 0.25 274.425 ; + LAYER M2 ; + RECT 0 274.325 0.25 274.425 ; + LAYER M3 ; + RECT 0 274.325 0.25 274.425 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[79] + + PIN DB[7] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 22.355 0.25 22.455 ; + LAYER M2 ; + RECT 0 22.355 0.25 22.455 ; + LAYER M3 ; + RECT 0 22.355 0.25 22.455 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[7] + + PIN DB[80] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 277.205 0.25 277.305 ; + LAYER M2 ; + RECT 0 277.205 0.25 277.305 ; + LAYER M3 ; + RECT 0 277.205 0.25 277.305 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[80] + + PIN DB[81] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 280.085 0.25 280.185 ; + LAYER M2 ; + RECT 0 280.085 0.25 280.185 ; + LAYER M3 ; + RECT 0 280.085 0.25 280.185 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[81] + + PIN DB[82] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 282.965 0.25 283.065 ; + LAYER M2 ; + RECT 0 282.965 0.25 283.065 ; + LAYER M3 ; + RECT 0 282.965 0.25 283.065 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[82] + + PIN DB[83] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 285.845 0.25 285.945 ; + LAYER M2 ; + RECT 0 285.845 0.25 285.945 ; + LAYER M3 ; + RECT 0 285.845 0.25 285.945 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[83] + + PIN DB[84] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 288.725 0.25 288.825 ; + LAYER M2 ; + RECT 0 288.725 0.25 288.825 ; + LAYER M3 ; + RECT 0 288.725 0.25 288.825 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[84] + + PIN DB[85] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 291.605 0.25 291.705 ; + LAYER M2 ; + RECT 0 291.605 0.25 291.705 ; + LAYER M3 ; + RECT 0 291.605 0.25 291.705 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[85] + + PIN DB[86] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 294.485 0.25 294.585 ; + LAYER M2 ; + RECT 0 294.485 0.25 294.585 ; + LAYER M3 ; + RECT 0 294.485 0.25 294.585 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[86] + + PIN DB[87] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 297.365 0.25 297.465 ; + LAYER M2 ; + RECT 0 297.365 0.25 297.465 ; + LAYER M3 ; + RECT 0 297.365 0.25 297.465 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[87] + + PIN DB[88] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 300.245 0.25 300.345 ; + LAYER M2 ; + RECT 0 300.245 0.25 300.345 ; + LAYER M3 ; + RECT 0 300.245 0.25 300.345 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[88] + + PIN DB[89] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 303.125 0.25 303.225 ; + LAYER M2 ; + RECT 0 303.125 0.25 303.225 ; + LAYER M3 ; + RECT 0 303.125 0.25 303.225 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[89] + + PIN DB[8] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 25.235 0.25 25.335 ; + LAYER M2 ; + RECT 0 25.235 0.25 25.335 ; + LAYER M3 ; + RECT 0 25.235 0.25 25.335 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[8] + + PIN DB[90] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 306.005 0.25 306.105 ; + LAYER M2 ; + RECT 0 306.005 0.25 306.105 ; + LAYER M3 ; + RECT 0 306.005 0.25 306.105 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[90] + + PIN DB[91] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 308.885 0.25 308.985 ; + LAYER M2 ; + RECT 0 308.885 0.25 308.985 ; + LAYER M3 ; + RECT 0 308.885 0.25 308.985 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[91] + + PIN DB[92] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 311.765 0.25 311.865 ; + LAYER M2 ; + RECT 0 311.765 0.25 311.865 ; + LAYER M3 ; + RECT 0 311.765 0.25 311.865 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[92] + + PIN DB[93] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 314.645 0.25 314.745 ; + LAYER M2 ; + RECT 0 314.645 0.25 314.745 ; + LAYER M3 ; + RECT 0 314.645 0.25 314.745 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[93] + + PIN DB[94] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 317.525 0.25 317.625 ; + LAYER M2 ; + RECT 0 317.525 0.25 317.625 ; + LAYER M3 ; + RECT 0 317.525 0.25 317.625 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[94] + + PIN DB[95] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 320.405 0.25 320.505 ; + LAYER M2 ; + RECT 0 320.405 0.25 320.505 ; + LAYER M3 ; + RECT 0 320.405 0.25 320.505 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[95] + + PIN DB[96] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 323.285 0.25 323.385 ; + LAYER M2 ; + RECT 0 323.285 0.25 323.385 ; + LAYER M3 ; + RECT 0 323.285 0.25 323.385 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[96] + + PIN DB[97] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 326.165 0.25 326.265 ; + LAYER M2 ; + RECT 0 326.165 0.25 326.265 ; + LAYER M3 ; + RECT 0 326.165 0.25 326.265 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[97] + + PIN DB[98] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 329.045 0.25 329.145 ; + LAYER M2 ; + RECT 0 329.045 0.25 329.145 ; + LAYER M3 ; + RECT 0 329.045 0.25 329.145 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[98] + + PIN DB[99] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 331.925 0.25 332.025 ; + LAYER M2 ; + RECT 0 331.925 0.25 332.025 ; + LAYER M3 ; + RECT 0 331.925 0.25 332.025 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[99] + + PIN DB[9] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 28.115 0.25 28.215 ; + LAYER M2 ; + RECT 0 28.115 0.25 28.215 ; + LAYER M3 ; + RECT 0 28.115 0.25 28.215 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[9] + + PIN DFTRAMBYP + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 225.7 0.25 225.8 ; + LAYER M2 ; + RECT 0 225.7 0.25 225.8 ; + LAYER M3 ; + RECT 0 225.7 0.25 225.8 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DFTRAMBYP + + PIN EMAA[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 199.77 0.25 199.87 ; + LAYER M2 ; + RECT 0 199.77 0.25 199.87 ; + LAYER M3 ; + RECT 0 199.77 0.25 199.87 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAA[0] + + PIN EMAA[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 199.57 0.25 199.67 ; + LAYER M2 ; + RECT 0 199.57 0.25 199.67 ; + LAYER M3 ; + RECT 0 199.57 0.25 199.67 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAA[1] + + PIN EMAA[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 201.505 0.25 201.605 ; + LAYER M2 ; + RECT 0 201.505 0.25 201.605 ; + LAYER M3 ; + RECT 0 201.505 0.25 201.605 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAA[2] + + PIN EMAB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 214.305 0.25 214.405 ; + LAYER M2 ; + RECT 0 214.305 0.25 214.405 ; + LAYER M3 ; + RECT 0 214.305 0.25 214.405 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAB[0] + + PIN EMAB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 215.305 0.25 215.405 ; + LAYER M2 ; + RECT 0 215.305 0.25 215.405 ; + LAYER M3 ; + RECT 0 215.305 0.25 215.405 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAB[1] + + PIN EMAB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 212.825 0.25 212.925 ; + LAYER M2 ; + RECT 0 212.825 0.25 212.925 ; + LAYER M3 ; + RECT 0 212.825 0.25 212.925 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAB[2] + + PIN EMASA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 187.45 0.25 187.55 ; + LAYER M2 ; + RECT 0 187.45 0.25 187.55 ; + LAYER M3 ; + RECT 0 187.45 0.25 187.55 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMASA + + PIN QA[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 2.455 0.25 2.555 ; + LAYER M2 ; + RECT 0 2.455 0.25 2.555 ; + LAYER M3 ; + RECT 0 2.455 0.25 2.555 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[0] + + PIN QA[100] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 334.545 0.25 334.645 ; + LAYER M2 ; + RECT 0 334.545 0.25 334.645 ; + LAYER M3 ; + RECT 0 334.545 0.25 334.645 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[100] + + PIN QA[101] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 337.425 0.25 337.525 ; + LAYER M2 ; + RECT 0 337.425 0.25 337.525 ; + LAYER M3 ; + RECT 0 337.425 0.25 337.525 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[101] + + PIN QA[102] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 340.305 0.25 340.405 ; + LAYER M2 ; + RECT 0 340.305 0.25 340.405 ; + LAYER M3 ; + RECT 0 340.305 0.25 340.405 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[102] + + PIN QA[103] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 343.185 0.25 343.285 ; + LAYER M2 ; + RECT 0 343.185 0.25 343.285 ; + LAYER M3 ; + RECT 0 343.185 0.25 343.285 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[103] + + PIN QA[104] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 346.065 0.25 346.165 ; + LAYER M2 ; + RECT 0 346.065 0.25 346.165 ; + LAYER M3 ; + RECT 0 346.065 0.25 346.165 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[104] + + PIN QA[105] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 348.945 0.25 349.045 ; + LAYER M2 ; + RECT 0 348.945 0.25 349.045 ; + LAYER M3 ; + RECT 0 348.945 0.25 349.045 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[105] + + PIN QA[106] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 351.825 0.25 351.925 ; + LAYER M2 ; + RECT 0 351.825 0.25 351.925 ; + LAYER M3 ; + RECT 0 351.825 0.25 351.925 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[106] + + PIN QA[107] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 354.705 0.25 354.805 ; + LAYER M2 ; + RECT 0 354.705 0.25 354.805 ; + LAYER M3 ; + RECT 0 354.705 0.25 354.805 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[107] + + PIN QA[108] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 357.585 0.25 357.685 ; + LAYER M2 ; + RECT 0 357.585 0.25 357.685 ; + LAYER M3 ; + RECT 0 357.585 0.25 357.685 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[108] + + PIN QA[109] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 360.465 0.25 360.565 ; + LAYER M2 ; + RECT 0 360.465 0.25 360.565 ; + LAYER M3 ; + RECT 0 360.465 0.25 360.565 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[109] + + PIN QA[10] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 31.255 0.25 31.355 ; + LAYER M2 ; + RECT 0 31.255 0.25 31.355 ; + LAYER M3 ; + RECT 0 31.255 0.25 31.355 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[10] + + PIN QA[110] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 363.345 0.25 363.445 ; + LAYER M2 ; + RECT 0 363.345 0.25 363.445 ; + LAYER M3 ; + RECT 0 363.345 0.25 363.445 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[110] + + PIN QA[111] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 366.225 0.25 366.325 ; + LAYER M2 ; + RECT 0 366.225 0.25 366.325 ; + LAYER M3 ; + RECT 0 366.225 0.25 366.325 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[111] + + PIN QA[112] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 369.105 0.25 369.205 ; + LAYER M2 ; + RECT 0 369.105 0.25 369.205 ; + LAYER M3 ; + RECT 0 369.105 0.25 369.205 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[112] + + PIN QA[113] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 371.985 0.25 372.085 ; + LAYER M2 ; + RECT 0 371.985 0.25 372.085 ; + LAYER M3 ; + RECT 0 371.985 0.25 372.085 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[113] + + PIN QA[114] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 374.865 0.25 374.965 ; + LAYER M2 ; + RECT 0 374.865 0.25 374.965 ; + LAYER M3 ; + RECT 0 374.865 0.25 374.965 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[114] + + PIN QA[115] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 377.745 0.25 377.845 ; + LAYER M2 ; + RECT 0 377.745 0.25 377.845 ; + LAYER M3 ; + RECT 0 377.745 0.25 377.845 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[115] + + PIN QA[116] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 380.625 0.25 380.725 ; + LAYER M2 ; + RECT 0 380.625 0.25 380.725 ; + LAYER M3 ; + RECT 0 380.625 0.25 380.725 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[116] + + PIN QA[117] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 383.505 0.25 383.605 ; + LAYER M2 ; + RECT 0 383.505 0.25 383.605 ; + LAYER M3 ; + RECT 0 383.505 0.25 383.605 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[117] + + PIN QA[118] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 386.385 0.25 386.485 ; + LAYER M2 ; + RECT 0 386.385 0.25 386.485 ; + LAYER M3 ; + RECT 0 386.385 0.25 386.485 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[118] + + PIN QA[119] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 389.265 0.25 389.365 ; + LAYER M2 ; + RECT 0 389.265 0.25 389.365 ; + LAYER M3 ; + RECT 0 389.265 0.25 389.365 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[119] + + PIN QA[11] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 34.135 0.25 34.235 ; + LAYER M2 ; + RECT 0 34.135 0.25 34.235 ; + LAYER M3 ; + RECT 0 34.135 0.25 34.235 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[11] + + PIN QA[120] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 392.145 0.25 392.245 ; + LAYER M2 ; + RECT 0 392.145 0.25 392.245 ; + LAYER M3 ; + RECT 0 392.145 0.25 392.245 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[120] + + PIN QA[121] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 395.025 0.25 395.125 ; + LAYER M2 ; + RECT 0 395.025 0.25 395.125 ; + LAYER M3 ; + RECT 0 395.025 0.25 395.125 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[121] + + PIN QA[122] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 397.905 0.25 398.005 ; + LAYER M2 ; + RECT 0 397.905 0.25 398.005 ; + LAYER M3 ; + RECT 0 397.905 0.25 398.005 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[122] + + PIN QA[123] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 400.785 0.25 400.885 ; + LAYER M2 ; + RECT 0 400.785 0.25 400.885 ; + LAYER M3 ; + RECT 0 400.785 0.25 400.885 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[123] + + PIN QA[124] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 403.665 0.25 403.765 ; + LAYER M2 ; + RECT 0 403.665 0.25 403.765 ; + LAYER M3 ; + RECT 0 403.665 0.25 403.765 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[124] + + PIN QA[125] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 406.545 0.25 406.645 ; + LAYER M2 ; + RECT 0 406.545 0.25 406.645 ; + LAYER M3 ; + RECT 0 406.545 0.25 406.645 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[125] + + PIN QA[126] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 409.425 0.25 409.525 ; + LAYER M2 ; + RECT 0 409.425 0.25 409.525 ; + LAYER M3 ; + RECT 0 409.425 0.25 409.525 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[126] + + PIN QA[127] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 412.305 0.25 412.405 ; + LAYER M2 ; + RECT 0 412.305 0.25 412.405 ; + LAYER M3 ; + RECT 0 412.305 0.25 412.405 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[127] + + PIN QA[12] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 37.015 0.25 37.115 ; + LAYER M2 ; + RECT 0 37.015 0.25 37.115 ; + LAYER M3 ; + RECT 0 37.015 0.25 37.115 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[12] + + PIN QA[13] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 39.895 0.25 39.995 ; + LAYER M2 ; + RECT 0 39.895 0.25 39.995 ; + LAYER M3 ; + RECT 0 39.895 0.25 39.995 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[13] + + PIN QA[14] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 42.775 0.25 42.875 ; + LAYER M2 ; + RECT 0 42.775 0.25 42.875 ; + LAYER M3 ; + RECT 0 42.775 0.25 42.875 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[14] + + PIN QA[15] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 45.655 0.25 45.755 ; + LAYER M2 ; + RECT 0 45.655 0.25 45.755 ; + LAYER M3 ; + RECT 0 45.655 0.25 45.755 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[15] + + PIN QA[16] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 48.535 0.25 48.635 ; + LAYER M2 ; + RECT 0 48.535 0.25 48.635 ; + LAYER M3 ; + RECT 0 48.535 0.25 48.635 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[16] + + PIN QA[17] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 51.415 0.25 51.515 ; + LAYER M2 ; + RECT 0 51.415 0.25 51.515 ; + LAYER M3 ; + RECT 0 51.415 0.25 51.515 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[17] + + PIN QA[18] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 54.295 0.25 54.395 ; + LAYER M2 ; + RECT 0 54.295 0.25 54.395 ; + LAYER M3 ; + RECT 0 54.295 0.25 54.395 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[18] + + PIN QA[19] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 57.175 0.25 57.275 ; + LAYER M2 ; + RECT 0 57.175 0.25 57.275 ; + LAYER M3 ; + RECT 0 57.175 0.25 57.275 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[19] + + PIN QA[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 5.335 0.25 5.435 ; + LAYER M2 ; + RECT 0 5.335 0.25 5.435 ; + LAYER M3 ; + RECT 0 5.335 0.25 5.435 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[1] + + PIN QA[20] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 60.055 0.25 60.155 ; + LAYER M2 ; + RECT 0 60.055 0.25 60.155 ; + LAYER M3 ; + RECT 0 60.055 0.25 60.155 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[20] + + PIN QA[21] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 62.935 0.25 63.035 ; + LAYER M2 ; + RECT 0 62.935 0.25 63.035 ; + LAYER M3 ; + RECT 0 62.935 0.25 63.035 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[21] + + PIN QA[22] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 65.815 0.25 65.915 ; + LAYER M2 ; + RECT 0 65.815 0.25 65.915 ; + LAYER M3 ; + RECT 0 65.815 0.25 65.915 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[22] + + PIN QA[23] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 68.695 0.25 68.795 ; + LAYER M2 ; + RECT 0 68.695 0.25 68.795 ; + LAYER M3 ; + RECT 0 68.695 0.25 68.795 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[23] + + PIN QA[24] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 71.575 0.25 71.675 ; + LAYER M2 ; + RECT 0 71.575 0.25 71.675 ; + LAYER M3 ; + RECT 0 71.575 0.25 71.675 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[24] + + PIN QA[25] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 74.455 0.25 74.555 ; + LAYER M2 ; + RECT 0 74.455 0.25 74.555 ; + LAYER M3 ; + RECT 0 74.455 0.25 74.555 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[25] + + PIN QA[26] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 77.335 0.25 77.435 ; + LAYER M2 ; + RECT 0 77.335 0.25 77.435 ; + LAYER M3 ; + RECT 0 77.335 0.25 77.435 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[26] + + PIN QA[27] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 80.215 0.25 80.315 ; + LAYER M2 ; + RECT 0 80.215 0.25 80.315 ; + LAYER M3 ; + RECT 0 80.215 0.25 80.315 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[27] + + PIN QA[28] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 83.095 0.25 83.195 ; + LAYER M2 ; + RECT 0 83.095 0.25 83.195 ; + LAYER M3 ; + RECT 0 83.095 0.25 83.195 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[28] + + PIN QA[29] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 85.975 0.25 86.075 ; + LAYER M2 ; + RECT 0 85.975 0.25 86.075 ; + LAYER M3 ; + RECT 0 85.975 0.25 86.075 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[29] + + PIN QA[2] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 8.215 0.25 8.315 ; + LAYER M2 ; + RECT 0 8.215 0.25 8.315 ; + LAYER M3 ; + RECT 0 8.215 0.25 8.315 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[2] + + PIN QA[30] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 88.855 0.25 88.955 ; + LAYER M2 ; + RECT 0 88.855 0.25 88.955 ; + LAYER M3 ; + RECT 0 88.855 0.25 88.955 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[30] + + PIN QA[31] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 91.735 0.25 91.835 ; + LAYER M2 ; + RECT 0 91.735 0.25 91.835 ; + LAYER M3 ; + RECT 0 91.735 0.25 91.835 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[31] + + PIN QA[32] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 94.615 0.25 94.715 ; + LAYER M2 ; + RECT 0 94.615 0.25 94.715 ; + LAYER M3 ; + RECT 0 94.615 0.25 94.715 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[32] + + PIN QA[33] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 97.495 0.25 97.595 ; + LAYER M2 ; + RECT 0 97.495 0.25 97.595 ; + LAYER M3 ; + RECT 0 97.495 0.25 97.595 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[33] + + PIN QA[34] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 100.375 0.25 100.475 ; + LAYER M2 ; + RECT 0 100.375 0.25 100.475 ; + LAYER M3 ; + RECT 0 100.375 0.25 100.475 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[34] + + PIN QA[35] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 103.255 0.25 103.355 ; + LAYER M2 ; + RECT 0 103.255 0.25 103.355 ; + LAYER M3 ; + RECT 0 103.255 0.25 103.355 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[35] + + PIN QA[36] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 106.135 0.25 106.235 ; + LAYER M2 ; + RECT 0 106.135 0.25 106.235 ; + LAYER M3 ; + RECT 0 106.135 0.25 106.235 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[36] + + PIN QA[37] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 109.015 0.25 109.115 ; + LAYER M2 ; + RECT 0 109.015 0.25 109.115 ; + LAYER M3 ; + RECT 0 109.015 0.25 109.115 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[37] + + PIN QA[38] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 111.895 0.25 111.995 ; + LAYER M2 ; + RECT 0 111.895 0.25 111.995 ; + LAYER M3 ; + RECT 0 111.895 0.25 111.995 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[38] + + PIN QA[39] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 114.775 0.25 114.875 ; + LAYER M2 ; + RECT 0 114.775 0.25 114.875 ; + LAYER M3 ; + RECT 0 114.775 0.25 114.875 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[39] + + PIN QA[3] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 11.095 0.25 11.195 ; + LAYER M2 ; + RECT 0 11.095 0.25 11.195 ; + LAYER M3 ; + RECT 0 11.095 0.25 11.195 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[3] + + PIN QA[40] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 117.655 0.25 117.755 ; + LAYER M2 ; + RECT 0 117.655 0.25 117.755 ; + LAYER M3 ; + RECT 0 117.655 0.25 117.755 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[40] + + PIN QA[41] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 120.535 0.25 120.635 ; + LAYER M2 ; + RECT 0 120.535 0.25 120.635 ; + LAYER M3 ; + RECT 0 120.535 0.25 120.635 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[41] + + PIN QA[42] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 123.415 0.25 123.515 ; + LAYER M2 ; + RECT 0 123.415 0.25 123.515 ; + LAYER M3 ; + RECT 0 123.415 0.25 123.515 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[42] + + PIN QA[43] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 126.295 0.25 126.395 ; + LAYER M2 ; + RECT 0 126.295 0.25 126.395 ; + LAYER M3 ; + RECT 0 126.295 0.25 126.395 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[43] + + PIN QA[44] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 129.175 0.25 129.275 ; + LAYER M2 ; + RECT 0 129.175 0.25 129.275 ; + LAYER M3 ; + RECT 0 129.175 0.25 129.275 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[44] + + PIN QA[45] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 132.055 0.25 132.155 ; + LAYER M2 ; + RECT 0 132.055 0.25 132.155 ; + LAYER M3 ; + RECT 0 132.055 0.25 132.155 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[45] + + PIN QA[46] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 134.935 0.25 135.035 ; + LAYER M2 ; + RECT 0 134.935 0.25 135.035 ; + LAYER M3 ; + RECT 0 134.935 0.25 135.035 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[46] + + PIN QA[47] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 137.815 0.25 137.915 ; + LAYER M2 ; + RECT 0 137.815 0.25 137.915 ; + LAYER M3 ; + RECT 0 137.815 0.25 137.915 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[47] + + PIN QA[48] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 140.695 0.25 140.795 ; + LAYER M2 ; + RECT 0 140.695 0.25 140.795 ; + LAYER M3 ; + RECT 0 140.695 0.25 140.795 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[48] + + PIN QA[49] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 143.575 0.25 143.675 ; + LAYER M2 ; + RECT 0 143.575 0.25 143.675 ; + LAYER M3 ; + RECT 0 143.575 0.25 143.675 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[49] + + PIN QA[4] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 13.975 0.25 14.075 ; + LAYER M2 ; + RECT 0 13.975 0.25 14.075 ; + LAYER M3 ; + RECT 0 13.975 0.25 14.075 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[4] + + PIN QA[50] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 146.455 0.25 146.555 ; + LAYER M2 ; + RECT 0 146.455 0.25 146.555 ; + LAYER M3 ; + RECT 0 146.455 0.25 146.555 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[50] + + PIN QA[51] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 149.335 0.25 149.435 ; + LAYER M2 ; + RECT 0 149.335 0.25 149.435 ; + LAYER M3 ; + RECT 0 149.335 0.25 149.435 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[51] + + PIN QA[52] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 152.215 0.25 152.315 ; + LAYER M2 ; + RECT 0 152.215 0.25 152.315 ; + LAYER M3 ; + RECT 0 152.215 0.25 152.315 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[52] + + PIN QA[53] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 155.095 0.25 155.195 ; + LAYER M2 ; + RECT 0 155.095 0.25 155.195 ; + LAYER M3 ; + RECT 0 155.095 0.25 155.195 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[53] + + PIN QA[54] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 157.975 0.25 158.075 ; + LAYER M2 ; + RECT 0 157.975 0.25 158.075 ; + LAYER M3 ; + RECT 0 157.975 0.25 158.075 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[54] + + PIN QA[55] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 160.855 0.25 160.955 ; + LAYER M2 ; + RECT 0 160.855 0.25 160.955 ; + LAYER M3 ; + RECT 0 160.855 0.25 160.955 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[55] + + PIN QA[56] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 163.735 0.25 163.835 ; + LAYER M2 ; + RECT 0 163.735 0.25 163.835 ; + LAYER M3 ; + RECT 0 163.735 0.25 163.835 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[56] + + PIN QA[57] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 166.615 0.25 166.715 ; + LAYER M2 ; + RECT 0 166.615 0.25 166.715 ; + LAYER M3 ; + RECT 0 166.615 0.25 166.715 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[57] + + PIN QA[58] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 169.495 0.25 169.595 ; + LAYER M2 ; + RECT 0 169.495 0.25 169.595 ; + LAYER M3 ; + RECT 0 169.495 0.25 169.595 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[58] + + PIN QA[59] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 172.375 0.25 172.475 ; + LAYER M2 ; + RECT 0 172.375 0.25 172.475 ; + LAYER M3 ; + RECT 0 172.375 0.25 172.475 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[59] + + PIN QA[5] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 16.855 0.25 16.955 ; + LAYER M2 ; + RECT 0 16.855 0.25 16.955 ; + LAYER M3 ; + RECT 0 16.855 0.25 16.955 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[5] + + PIN QA[60] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 175.255 0.25 175.355 ; + LAYER M2 ; + RECT 0 175.255 0.25 175.355 ; + LAYER M3 ; + RECT 0 175.255 0.25 175.355 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[60] + + PIN QA[61] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 178.135 0.25 178.235 ; + LAYER M2 ; + RECT 0 178.135 0.25 178.235 ; + LAYER M3 ; + RECT 0 178.135 0.25 178.235 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[61] + + PIN QA[62] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 181.015 0.25 181.115 ; + LAYER M2 ; + RECT 0 181.015 0.25 181.115 ; + LAYER M3 ; + RECT 0 181.015 0.25 181.115 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[62] + + PIN QA[63] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 183.895 0.25 183.995 ; + LAYER M2 ; + RECT 0 183.895 0.25 183.995 ; + LAYER M3 ; + RECT 0 183.895 0.25 183.995 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[63] + + PIN QA[64] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 230.865 0.25 230.965 ; + LAYER M2 ; + RECT 0 230.865 0.25 230.965 ; + LAYER M3 ; + RECT 0 230.865 0.25 230.965 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[64] + + PIN QA[65] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 233.745 0.25 233.845 ; + LAYER M2 ; + RECT 0 233.745 0.25 233.845 ; + LAYER M3 ; + RECT 0 233.745 0.25 233.845 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[65] + + PIN QA[66] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 236.625 0.25 236.725 ; + LAYER M2 ; + RECT 0 236.625 0.25 236.725 ; + LAYER M3 ; + RECT 0 236.625 0.25 236.725 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[66] + + PIN QA[67] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 239.505 0.25 239.605 ; + LAYER M2 ; + RECT 0 239.505 0.25 239.605 ; + LAYER M3 ; + RECT 0 239.505 0.25 239.605 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[67] + + PIN QA[68] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 242.385 0.25 242.485 ; + LAYER M2 ; + RECT 0 242.385 0.25 242.485 ; + LAYER M3 ; + RECT 0 242.385 0.25 242.485 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[68] + + PIN QA[69] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 245.265 0.25 245.365 ; + LAYER M2 ; + RECT 0 245.265 0.25 245.365 ; + LAYER M3 ; + RECT 0 245.265 0.25 245.365 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[69] + + PIN QA[6] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 19.735 0.25 19.835 ; + LAYER M2 ; + RECT 0 19.735 0.25 19.835 ; + LAYER M3 ; + RECT 0 19.735 0.25 19.835 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[6] + + PIN QA[70] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 248.145 0.25 248.245 ; + LAYER M2 ; + RECT 0 248.145 0.25 248.245 ; + LAYER M3 ; + RECT 0 248.145 0.25 248.245 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[70] + + PIN QA[71] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 251.025 0.25 251.125 ; + LAYER M2 ; + RECT 0 251.025 0.25 251.125 ; + LAYER M3 ; + RECT 0 251.025 0.25 251.125 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[71] + + PIN QA[72] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 253.905 0.25 254.005 ; + LAYER M2 ; + RECT 0 253.905 0.25 254.005 ; + LAYER M3 ; + RECT 0 253.905 0.25 254.005 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[72] + + PIN QA[73] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 256.785 0.25 256.885 ; + LAYER M2 ; + RECT 0 256.785 0.25 256.885 ; + LAYER M3 ; + RECT 0 256.785 0.25 256.885 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[73] + + PIN QA[74] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 259.665 0.25 259.765 ; + LAYER M2 ; + RECT 0 259.665 0.25 259.765 ; + LAYER M3 ; + RECT 0 259.665 0.25 259.765 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[74] + + PIN QA[75] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 262.545 0.25 262.645 ; + LAYER M2 ; + RECT 0 262.545 0.25 262.645 ; + LAYER M3 ; + RECT 0 262.545 0.25 262.645 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[75] + + PIN QA[76] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 265.425 0.25 265.525 ; + LAYER M2 ; + RECT 0 265.425 0.25 265.525 ; + LAYER M3 ; + RECT 0 265.425 0.25 265.525 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[76] + + PIN QA[77] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 268.305 0.25 268.405 ; + LAYER M2 ; + RECT 0 268.305 0.25 268.405 ; + LAYER M3 ; + RECT 0 268.305 0.25 268.405 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[77] + + PIN QA[78] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 271.185 0.25 271.285 ; + LAYER M2 ; + RECT 0 271.185 0.25 271.285 ; + LAYER M3 ; + RECT 0 271.185 0.25 271.285 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[78] + + PIN QA[79] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 274.065 0.25 274.165 ; + LAYER M2 ; + RECT 0 274.065 0.25 274.165 ; + LAYER M3 ; + RECT 0 274.065 0.25 274.165 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[79] + + PIN QA[7] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 22.615 0.25 22.715 ; + LAYER M2 ; + RECT 0 22.615 0.25 22.715 ; + LAYER M3 ; + RECT 0 22.615 0.25 22.715 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[7] + + PIN QA[80] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 276.945 0.25 277.045 ; + LAYER M2 ; + RECT 0 276.945 0.25 277.045 ; + LAYER M3 ; + RECT 0 276.945 0.25 277.045 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[80] + + PIN QA[81] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 279.825 0.25 279.925 ; + LAYER M2 ; + RECT 0 279.825 0.25 279.925 ; + LAYER M3 ; + RECT 0 279.825 0.25 279.925 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[81] + + PIN QA[82] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 282.705 0.25 282.805 ; + LAYER M2 ; + RECT 0 282.705 0.25 282.805 ; + LAYER M3 ; + RECT 0 282.705 0.25 282.805 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[82] + + PIN QA[83] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 285.585 0.25 285.685 ; + LAYER M2 ; + RECT 0 285.585 0.25 285.685 ; + LAYER M3 ; + RECT 0 285.585 0.25 285.685 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[83] + + PIN QA[84] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 288.465 0.25 288.565 ; + LAYER M2 ; + RECT 0 288.465 0.25 288.565 ; + LAYER M3 ; + RECT 0 288.465 0.25 288.565 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[84] + + PIN QA[85] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 291.345 0.25 291.445 ; + LAYER M2 ; + RECT 0 291.345 0.25 291.445 ; + LAYER M3 ; + RECT 0 291.345 0.25 291.445 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[85] + + PIN QA[86] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 294.225 0.25 294.325 ; + LAYER M2 ; + RECT 0 294.225 0.25 294.325 ; + LAYER M3 ; + RECT 0 294.225 0.25 294.325 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[86] + + PIN QA[87] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 297.105 0.25 297.205 ; + LAYER M2 ; + RECT 0 297.105 0.25 297.205 ; + LAYER M3 ; + RECT 0 297.105 0.25 297.205 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[87] + + PIN QA[88] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 299.985 0.25 300.085 ; + LAYER M2 ; + RECT 0 299.985 0.25 300.085 ; + LAYER M3 ; + RECT 0 299.985 0.25 300.085 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[88] + + PIN QA[89] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 302.865 0.25 302.965 ; + LAYER M2 ; + RECT 0 302.865 0.25 302.965 ; + LAYER M3 ; + RECT 0 302.865 0.25 302.965 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[89] + + PIN QA[8] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 25.495 0.25 25.595 ; + LAYER M2 ; + RECT 0 25.495 0.25 25.595 ; + LAYER M3 ; + RECT 0 25.495 0.25 25.595 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[8] + + PIN QA[90] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 305.745 0.25 305.845 ; + LAYER M2 ; + RECT 0 305.745 0.25 305.845 ; + LAYER M3 ; + RECT 0 305.745 0.25 305.845 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[90] + + PIN QA[91] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 308.625 0.25 308.725 ; + LAYER M2 ; + RECT 0 308.625 0.25 308.725 ; + LAYER M3 ; + RECT 0 308.625 0.25 308.725 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[91] + + PIN QA[92] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 311.505 0.25 311.605 ; + LAYER M2 ; + RECT 0 311.505 0.25 311.605 ; + LAYER M3 ; + RECT 0 311.505 0.25 311.605 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[92] + + PIN QA[93] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 314.385 0.25 314.485 ; + LAYER M2 ; + RECT 0 314.385 0.25 314.485 ; + LAYER M3 ; + RECT 0 314.385 0.25 314.485 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[93] + + PIN QA[94] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 317.265 0.25 317.365 ; + LAYER M2 ; + RECT 0 317.265 0.25 317.365 ; + LAYER M3 ; + RECT 0 317.265 0.25 317.365 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[94] + + PIN QA[95] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 320.145 0.25 320.245 ; + LAYER M2 ; + RECT 0 320.145 0.25 320.245 ; + LAYER M3 ; + RECT 0 320.145 0.25 320.245 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[95] + + PIN QA[96] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 323.025 0.25 323.125 ; + LAYER M2 ; + RECT 0 323.025 0.25 323.125 ; + LAYER M3 ; + RECT 0 323.025 0.25 323.125 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[96] + + PIN QA[97] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 325.905 0.25 326.005 ; + LAYER M2 ; + RECT 0 325.905 0.25 326.005 ; + LAYER M3 ; + RECT 0 325.905 0.25 326.005 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[97] + + PIN QA[98] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 328.785 0.25 328.885 ; + LAYER M2 ; + RECT 0 328.785 0.25 328.885 ; + LAYER M3 ; + RECT 0 328.785 0.25 328.885 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[98] + + PIN QA[99] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 331.665 0.25 331.765 ; + LAYER M2 ; + RECT 0 331.665 0.25 331.765 ; + LAYER M3 ; + RECT 0 331.665 0.25 331.765 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[99] + + PIN QA[9] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 28.375 0.25 28.475 ; + LAYER M2 ; + RECT 0 28.375 0.25 28.475 ; + LAYER M3 ; + RECT 0 28.375 0.25 28.475 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[9] + + PIN RET1N + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 188.11 0.25 188.21 ; + LAYER M2 ; + RECT 0 188.11 0.25 188.21 ; + LAYER M3 ; + RECT 0 188.11 0.25 188.21 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END RET1N + + PIN SEA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 205.9 0.25 206 ; + LAYER M2 ; + RECT 0 205.9 0.25 206 ; + LAYER M3 ; + RECT 0 205.9 0.25 206 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SEA + + PIN SEB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 208.735 0.25 208.835 ; + LAYER M2 ; + RECT 0 208.735 0.25 208.835 ; + LAYER M3 ; + RECT 0 208.735 0.25 208.835 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SEB + + PIN SIA[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 206.1 0.25 206.2 ; + LAYER M2 ; + RECT 0 206.1 0.25 206.2 ; + LAYER M3 ; + RECT 0 206.1 0.25 206.2 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SIA[0] + + PIN SIA[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 207.07 0.25 207.17 ; + LAYER M2 ; + RECT 0 207.07 0.25 207.17 ; + LAYER M3 ; + RECT 0 207.07 0.25 207.17 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SIA[1] + + PIN SIB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 202.675 0.25 202.775 ; + LAYER M2 ; + RECT 0 202.675 0.25 202.775 ; + LAYER M3 ; + RECT 0 202.675 0.25 202.775 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SIB[0] + + PIN SIB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 220.325 0.25 220.425 ; + LAYER M2 ; + RECT 0 220.325 0.25 220.425 ; + LAYER M3 ; + RECT 0 220.325 0.25 220.425 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SIB[1] + + PIN SOA[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 0.36 0.25 0.46 ; + LAYER M2 ; + RECT 0 0.36 0.25 0.46 ; + LAYER M3 ; + RECT 0 0.36 0.25 0.46 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SOA[0] + + PIN SOA[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 414.4 0.25 414.5 ; + LAYER M2 ; + RECT 0 414.4 0.25 414.5 ; + LAYER M3 ; + RECT 0 414.4 0.25 414.5 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SOA[1] + + PIN SOB[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 0.09 0.25 0.19 ; + LAYER M2 ; + RECT 0 0.09 0.25 0.19 ; + LAYER M3 ; + RECT 0 0.09 0.25 0.19 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SOB[0] + + PIN SOB[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 414.67 0.25 414.77 ; + LAYER M2 ; + RECT 0 414.67 0.25 414.77 ; + LAYER M3 ; + RECT 0 414.67 0.25 414.77 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SOB[1] + + PIN TAA[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 190.755 0.25 190.855 ; + LAYER M2 ; + RECT 0 190.755 0.25 190.855 ; + LAYER M3 ; + RECT 0 190.755 0.25 190.855 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[0] + + PIN TAA[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 193.785 0.25 193.885 ; + LAYER M2 ; + RECT 0 193.785 0.25 193.885 ; + LAYER M3 ; + RECT 0 193.785 0.25 193.885 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[1] + + PIN TAA[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 196.845 0.25 196.945 ; + LAYER M2 ; + RECT 0 196.845 0.25 196.945 ; + LAYER M3 ; + RECT 0 196.845 0.25 196.945 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[2] + + PIN TAA[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 199.36 0.25 199.46 ; + LAYER M2 ; + RECT 0 199.36 0.25 199.46 ; + LAYER M3 ; + RECT 0 199.36 0.25 199.46 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[3] + + PIN TAA[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 202.39 0.25 202.49 ; + LAYER M2 ; + RECT 0 202.39 0.25 202.49 ; + LAYER M3 ; + RECT 0 202.39 0.25 202.49 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[4] + + PIN TAB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 224.67 0.25 224.77 ; + LAYER M2 ; + RECT 0 224.67 0.25 224.77 ; + LAYER M3 ; + RECT 0 224.67 0.25 224.77 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[0] + + PIN TAB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 221.64 0.25 221.74 ; + LAYER M2 ; + RECT 0 221.64 0.25 221.74 ; + LAYER M3 ; + RECT 0 221.64 0.25 221.74 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[1] + + PIN TAB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 218.58 0.25 218.68 ; + LAYER M2 ; + RECT 0 218.58 0.25 218.68 ; + LAYER M3 ; + RECT 0 218.58 0.25 218.68 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[2] + + PIN TAB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 216.095 0.25 216.195 ; + LAYER M2 ; + RECT 0 216.095 0.25 216.195 ; + LAYER M3 ; + RECT 0 216.095 0.25 216.195 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[3] + + PIN TAB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 213.06 0.25 213.16 ; + LAYER M2 ; + RECT 0 213.06 0.25 213.16 ; + LAYER M3 ; + RECT 0 213.06 0.25 213.16 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[4] + + PIN TCENA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 188.31 0.25 188.41 ; + LAYER M2 ; + RECT 0 188.31 0.25 188.41 ; + LAYER M3 ; + RECT 0 188.31 0.25 188.41 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TCENA + + PIN TCENB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 228.31 0.25 228.41 ; + LAYER M2 ; + RECT 0 228.31 0.25 228.41 ; + LAYER M3 ; + RECT 0 228.31 0.25 228.41 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TCENB + + PIN TDB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 1.465 0.25 1.565 ; + LAYER M2 ; + RECT 0 1.465 0.25 1.565 ; + LAYER M3 ; + RECT 0 1.465 0.25 1.565 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[0] + + PIN TDB[100] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 335.535 0.25 335.635 ; + LAYER M2 ; + RECT 0 335.535 0.25 335.635 ; + LAYER M3 ; + RECT 0 335.535 0.25 335.635 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[100] + + PIN TDB[101] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 338.415 0.25 338.515 ; + LAYER M2 ; + RECT 0 338.415 0.25 338.515 ; + LAYER M3 ; + RECT 0 338.415 0.25 338.515 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[101] + + PIN TDB[102] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 341.295 0.25 341.395 ; + LAYER M2 ; + RECT 0 341.295 0.25 341.395 ; + LAYER M3 ; + RECT 0 341.295 0.25 341.395 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[102] + + PIN TDB[103] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 344.175 0.25 344.275 ; + LAYER M2 ; + RECT 0 344.175 0.25 344.275 ; + LAYER M3 ; + RECT 0 344.175 0.25 344.275 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[103] + + PIN TDB[104] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 347.055 0.25 347.155 ; + LAYER M2 ; + RECT 0 347.055 0.25 347.155 ; + LAYER M3 ; + RECT 0 347.055 0.25 347.155 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[104] + + PIN TDB[105] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 349.935 0.25 350.035 ; + LAYER M2 ; + RECT 0 349.935 0.25 350.035 ; + LAYER M3 ; + RECT 0 349.935 0.25 350.035 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[105] + + PIN TDB[106] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 352.815 0.25 352.915 ; + LAYER M2 ; + RECT 0 352.815 0.25 352.915 ; + LAYER M3 ; + RECT 0 352.815 0.25 352.915 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[106] + + PIN TDB[107] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 355.695 0.25 355.795 ; + LAYER M2 ; + RECT 0 355.695 0.25 355.795 ; + LAYER M3 ; + RECT 0 355.695 0.25 355.795 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[107] + + PIN TDB[108] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 358.575 0.25 358.675 ; + LAYER M2 ; + RECT 0 358.575 0.25 358.675 ; + LAYER M3 ; + RECT 0 358.575 0.25 358.675 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[108] + + PIN TDB[109] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 361.455 0.25 361.555 ; + LAYER M2 ; + RECT 0 361.455 0.25 361.555 ; + LAYER M3 ; + RECT 0 361.455 0.25 361.555 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[109] + + PIN TDB[10] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 30.265 0.25 30.365 ; + LAYER M2 ; + RECT 0 30.265 0.25 30.365 ; + LAYER M3 ; + RECT 0 30.265 0.25 30.365 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[10] + + PIN TDB[110] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 364.335 0.25 364.435 ; + LAYER M2 ; + RECT 0 364.335 0.25 364.435 ; + LAYER M3 ; + RECT 0 364.335 0.25 364.435 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[110] + + PIN TDB[111] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 367.215 0.25 367.315 ; + LAYER M2 ; + RECT 0 367.215 0.25 367.315 ; + LAYER M3 ; + RECT 0 367.215 0.25 367.315 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[111] + + PIN TDB[112] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 370.095 0.25 370.195 ; + LAYER M2 ; + RECT 0 370.095 0.25 370.195 ; + LAYER M3 ; + RECT 0 370.095 0.25 370.195 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[112] + + PIN TDB[113] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 372.975 0.25 373.075 ; + LAYER M2 ; + RECT 0 372.975 0.25 373.075 ; + LAYER M3 ; + RECT 0 372.975 0.25 373.075 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[113] + + PIN TDB[114] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 375.855 0.25 375.955 ; + LAYER M2 ; + RECT 0 375.855 0.25 375.955 ; + LAYER M3 ; + RECT 0 375.855 0.25 375.955 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[114] + + PIN TDB[115] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 378.735 0.25 378.835 ; + LAYER M2 ; + RECT 0 378.735 0.25 378.835 ; + LAYER M3 ; + RECT 0 378.735 0.25 378.835 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[115] + + PIN TDB[116] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 381.615 0.25 381.715 ; + LAYER M2 ; + RECT 0 381.615 0.25 381.715 ; + LAYER M3 ; + RECT 0 381.615 0.25 381.715 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[116] + + PIN TDB[117] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 384.495 0.25 384.595 ; + LAYER M2 ; + RECT 0 384.495 0.25 384.595 ; + LAYER M3 ; + RECT 0 384.495 0.25 384.595 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[117] + + PIN TDB[118] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 387.375 0.25 387.475 ; + LAYER M2 ; + RECT 0 387.375 0.25 387.475 ; + LAYER M3 ; + RECT 0 387.375 0.25 387.475 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[118] + + PIN TDB[119] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 390.255 0.25 390.355 ; + LAYER M2 ; + RECT 0 390.255 0.25 390.355 ; + LAYER M3 ; + RECT 0 390.255 0.25 390.355 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[119] + + PIN TDB[11] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 33.145 0.25 33.245 ; + LAYER M2 ; + RECT 0 33.145 0.25 33.245 ; + LAYER M3 ; + RECT 0 33.145 0.25 33.245 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[11] + + PIN TDB[120] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 393.135 0.25 393.235 ; + LAYER M2 ; + RECT 0 393.135 0.25 393.235 ; + LAYER M3 ; + RECT 0 393.135 0.25 393.235 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[120] + + PIN TDB[121] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 396.015 0.25 396.115 ; + LAYER M2 ; + RECT 0 396.015 0.25 396.115 ; + LAYER M3 ; + RECT 0 396.015 0.25 396.115 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[121] + + PIN TDB[122] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 398.895 0.25 398.995 ; + LAYER M2 ; + RECT 0 398.895 0.25 398.995 ; + LAYER M3 ; + RECT 0 398.895 0.25 398.995 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[122] + + PIN TDB[123] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 401.775 0.25 401.875 ; + LAYER M2 ; + RECT 0 401.775 0.25 401.875 ; + LAYER M3 ; + RECT 0 401.775 0.25 401.875 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[123] + + PIN TDB[124] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 404.655 0.25 404.755 ; + LAYER M2 ; + RECT 0 404.655 0.25 404.755 ; + LAYER M3 ; + RECT 0 404.655 0.25 404.755 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[124] + + PIN TDB[125] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 407.535 0.25 407.635 ; + LAYER M2 ; + RECT 0 407.535 0.25 407.635 ; + LAYER M3 ; + RECT 0 407.535 0.25 407.635 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[125] + + PIN TDB[126] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 410.415 0.25 410.515 ; + LAYER M2 ; + RECT 0 410.415 0.25 410.515 ; + LAYER M3 ; + RECT 0 410.415 0.25 410.515 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[126] + + PIN TDB[127] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 413.295 0.25 413.395 ; + LAYER M2 ; + RECT 0 413.295 0.25 413.395 ; + LAYER M3 ; + RECT 0 413.295 0.25 413.395 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[127] + + PIN TDB[12] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 36.025 0.25 36.125 ; + LAYER M2 ; + RECT 0 36.025 0.25 36.125 ; + LAYER M3 ; + RECT 0 36.025 0.25 36.125 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[12] + + PIN TDB[13] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 38.905 0.25 39.005 ; + LAYER M2 ; + RECT 0 38.905 0.25 39.005 ; + LAYER M3 ; + RECT 0 38.905 0.25 39.005 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[13] + + PIN TDB[14] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 41.785 0.25 41.885 ; + LAYER M2 ; + RECT 0 41.785 0.25 41.885 ; + LAYER M3 ; + RECT 0 41.785 0.25 41.885 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[14] + + PIN TDB[15] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 44.665 0.25 44.765 ; + LAYER M2 ; + RECT 0 44.665 0.25 44.765 ; + LAYER M3 ; + RECT 0 44.665 0.25 44.765 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[15] + + PIN TDB[16] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 47.545 0.25 47.645 ; + LAYER M2 ; + RECT 0 47.545 0.25 47.645 ; + LAYER M3 ; + RECT 0 47.545 0.25 47.645 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[16] + + PIN TDB[17] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 50.425 0.25 50.525 ; + LAYER M2 ; + RECT 0 50.425 0.25 50.525 ; + LAYER M3 ; + RECT 0 50.425 0.25 50.525 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[17] + + PIN TDB[18] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 53.305 0.25 53.405 ; + LAYER M2 ; + RECT 0 53.305 0.25 53.405 ; + LAYER M3 ; + RECT 0 53.305 0.25 53.405 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[18] + + PIN TDB[19] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 56.185 0.25 56.285 ; + LAYER M2 ; + RECT 0 56.185 0.25 56.285 ; + LAYER M3 ; + RECT 0 56.185 0.25 56.285 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[19] + + PIN TDB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 4.345 0.25 4.445 ; + LAYER M2 ; + RECT 0 4.345 0.25 4.445 ; + LAYER M3 ; + RECT 0 4.345 0.25 4.445 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[1] + + PIN TDB[20] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 59.065 0.25 59.165 ; + LAYER M2 ; + RECT 0 59.065 0.25 59.165 ; + LAYER M3 ; + RECT 0 59.065 0.25 59.165 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[20] + + PIN TDB[21] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 61.945 0.25 62.045 ; + LAYER M2 ; + RECT 0 61.945 0.25 62.045 ; + LAYER M3 ; + RECT 0 61.945 0.25 62.045 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[21] + + PIN TDB[22] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 64.825 0.25 64.925 ; + LAYER M2 ; + RECT 0 64.825 0.25 64.925 ; + LAYER M3 ; + RECT 0 64.825 0.25 64.925 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[22] + + PIN TDB[23] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 67.705 0.25 67.805 ; + LAYER M2 ; + RECT 0 67.705 0.25 67.805 ; + LAYER M3 ; + RECT 0 67.705 0.25 67.805 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[23] + + PIN TDB[24] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 70.585 0.25 70.685 ; + LAYER M2 ; + RECT 0 70.585 0.25 70.685 ; + LAYER M3 ; + RECT 0 70.585 0.25 70.685 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[24] + + PIN TDB[25] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 73.465 0.25 73.565 ; + LAYER M2 ; + RECT 0 73.465 0.25 73.565 ; + LAYER M3 ; + RECT 0 73.465 0.25 73.565 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[25] + + PIN TDB[26] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 76.345 0.25 76.445 ; + LAYER M2 ; + RECT 0 76.345 0.25 76.445 ; + LAYER M3 ; + RECT 0 76.345 0.25 76.445 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[26] + + PIN TDB[27] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 79.225 0.25 79.325 ; + LAYER M2 ; + RECT 0 79.225 0.25 79.325 ; + LAYER M3 ; + RECT 0 79.225 0.25 79.325 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[27] + + PIN TDB[28] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 82.105 0.25 82.205 ; + LAYER M2 ; + RECT 0 82.105 0.25 82.205 ; + LAYER M3 ; + RECT 0 82.105 0.25 82.205 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[28] + + PIN TDB[29] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 84.985 0.25 85.085 ; + LAYER M2 ; + RECT 0 84.985 0.25 85.085 ; + LAYER M3 ; + RECT 0 84.985 0.25 85.085 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[29] + + PIN TDB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 7.225 0.25 7.325 ; + LAYER M2 ; + RECT 0 7.225 0.25 7.325 ; + LAYER M3 ; + RECT 0 7.225 0.25 7.325 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[2] + + PIN TDB[30] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 87.865 0.25 87.965 ; + LAYER M2 ; + RECT 0 87.865 0.25 87.965 ; + LAYER M3 ; + RECT 0 87.865 0.25 87.965 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[30] + + PIN TDB[31] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 90.745 0.25 90.845 ; + LAYER M2 ; + RECT 0 90.745 0.25 90.845 ; + LAYER M3 ; + RECT 0 90.745 0.25 90.845 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[31] + + PIN TDB[32] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 93.625 0.25 93.725 ; + LAYER M2 ; + RECT 0 93.625 0.25 93.725 ; + LAYER M3 ; + RECT 0 93.625 0.25 93.725 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[32] + + PIN TDB[33] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 96.505 0.25 96.605 ; + LAYER M2 ; + RECT 0 96.505 0.25 96.605 ; + LAYER M3 ; + RECT 0 96.505 0.25 96.605 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[33] + + PIN TDB[34] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 99.385 0.25 99.485 ; + LAYER M2 ; + RECT 0 99.385 0.25 99.485 ; + LAYER M3 ; + RECT 0 99.385 0.25 99.485 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[34] + + PIN TDB[35] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 102.265 0.25 102.365 ; + LAYER M2 ; + RECT 0 102.265 0.25 102.365 ; + LAYER M3 ; + RECT 0 102.265 0.25 102.365 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[35] + + PIN TDB[36] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 105.145 0.25 105.245 ; + LAYER M2 ; + RECT 0 105.145 0.25 105.245 ; + LAYER M3 ; + RECT 0 105.145 0.25 105.245 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[36] + + PIN TDB[37] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 108.025 0.25 108.125 ; + LAYER M2 ; + RECT 0 108.025 0.25 108.125 ; + LAYER M3 ; + RECT 0 108.025 0.25 108.125 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[37] + + PIN TDB[38] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 110.905 0.25 111.005 ; + LAYER M2 ; + RECT 0 110.905 0.25 111.005 ; + LAYER M3 ; + RECT 0 110.905 0.25 111.005 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[38] + + PIN TDB[39] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 113.785 0.25 113.885 ; + LAYER M2 ; + RECT 0 113.785 0.25 113.885 ; + LAYER M3 ; + RECT 0 113.785 0.25 113.885 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[39] + + PIN TDB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 10.105 0.25 10.205 ; + LAYER M2 ; + RECT 0 10.105 0.25 10.205 ; + LAYER M3 ; + RECT 0 10.105 0.25 10.205 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[3] + + PIN TDB[40] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 116.665 0.25 116.765 ; + LAYER M2 ; + RECT 0 116.665 0.25 116.765 ; + LAYER M3 ; + RECT 0 116.665 0.25 116.765 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[40] + + PIN TDB[41] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 119.545 0.25 119.645 ; + LAYER M2 ; + RECT 0 119.545 0.25 119.645 ; + LAYER M3 ; + RECT 0 119.545 0.25 119.645 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[41] + + PIN TDB[42] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 122.425 0.25 122.525 ; + LAYER M2 ; + RECT 0 122.425 0.25 122.525 ; + LAYER M3 ; + RECT 0 122.425 0.25 122.525 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[42] + + PIN TDB[43] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 125.305 0.25 125.405 ; + LAYER M2 ; + RECT 0 125.305 0.25 125.405 ; + LAYER M3 ; + RECT 0 125.305 0.25 125.405 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[43] + + PIN TDB[44] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 128.185 0.25 128.285 ; + LAYER M2 ; + RECT 0 128.185 0.25 128.285 ; + LAYER M3 ; + RECT 0 128.185 0.25 128.285 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[44] + + PIN TDB[45] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 131.065 0.25 131.165 ; + LAYER M2 ; + RECT 0 131.065 0.25 131.165 ; + LAYER M3 ; + RECT 0 131.065 0.25 131.165 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[45] + + PIN TDB[46] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 133.945 0.25 134.045 ; + LAYER M2 ; + RECT 0 133.945 0.25 134.045 ; + LAYER M3 ; + RECT 0 133.945 0.25 134.045 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[46] + + PIN TDB[47] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 136.825 0.25 136.925 ; + LAYER M2 ; + RECT 0 136.825 0.25 136.925 ; + LAYER M3 ; + RECT 0 136.825 0.25 136.925 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[47] + + PIN TDB[48] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 139.705 0.25 139.805 ; + LAYER M2 ; + RECT 0 139.705 0.25 139.805 ; + LAYER M3 ; + RECT 0 139.705 0.25 139.805 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[48] + + PIN TDB[49] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 142.585 0.25 142.685 ; + LAYER M2 ; + RECT 0 142.585 0.25 142.685 ; + LAYER M3 ; + RECT 0 142.585 0.25 142.685 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[49] + + PIN TDB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 12.985 0.25 13.085 ; + LAYER M2 ; + RECT 0 12.985 0.25 13.085 ; + LAYER M3 ; + RECT 0 12.985 0.25 13.085 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[4] + + PIN TDB[50] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 145.465 0.25 145.565 ; + LAYER M2 ; + RECT 0 145.465 0.25 145.565 ; + LAYER M3 ; + RECT 0 145.465 0.25 145.565 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[50] + + PIN TDB[51] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 148.345 0.25 148.445 ; + LAYER M2 ; + RECT 0 148.345 0.25 148.445 ; + LAYER M3 ; + RECT 0 148.345 0.25 148.445 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[51] + + PIN TDB[52] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 151.225 0.25 151.325 ; + LAYER M2 ; + RECT 0 151.225 0.25 151.325 ; + LAYER M3 ; + RECT 0 151.225 0.25 151.325 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[52] + + PIN TDB[53] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 154.105 0.25 154.205 ; + LAYER M2 ; + RECT 0 154.105 0.25 154.205 ; + LAYER M3 ; + RECT 0 154.105 0.25 154.205 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[53] + + PIN TDB[54] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 156.985 0.25 157.085 ; + LAYER M2 ; + RECT 0 156.985 0.25 157.085 ; + LAYER M3 ; + RECT 0 156.985 0.25 157.085 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[54] + + PIN TDB[55] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 159.865 0.25 159.965 ; + LAYER M2 ; + RECT 0 159.865 0.25 159.965 ; + LAYER M3 ; + RECT 0 159.865 0.25 159.965 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[55] + + PIN TDB[56] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 162.745 0.25 162.845 ; + LAYER M2 ; + RECT 0 162.745 0.25 162.845 ; + LAYER M3 ; + RECT 0 162.745 0.25 162.845 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[56] + + PIN TDB[57] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 165.625 0.25 165.725 ; + LAYER M2 ; + RECT 0 165.625 0.25 165.725 ; + LAYER M3 ; + RECT 0 165.625 0.25 165.725 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[57] + + PIN TDB[58] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 168.505 0.25 168.605 ; + LAYER M2 ; + RECT 0 168.505 0.25 168.605 ; + LAYER M3 ; + RECT 0 168.505 0.25 168.605 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[58] + + PIN TDB[59] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 171.385 0.25 171.485 ; + LAYER M2 ; + RECT 0 171.385 0.25 171.485 ; + LAYER M3 ; + RECT 0 171.385 0.25 171.485 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[59] + + PIN TDB[5] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 15.865 0.25 15.965 ; + LAYER M2 ; + RECT 0 15.865 0.25 15.965 ; + LAYER M3 ; + RECT 0 15.865 0.25 15.965 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[5] + + PIN TDB[60] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 174.265 0.25 174.365 ; + LAYER M2 ; + RECT 0 174.265 0.25 174.365 ; + LAYER M3 ; + RECT 0 174.265 0.25 174.365 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[60] + + PIN TDB[61] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 177.145 0.25 177.245 ; + LAYER M2 ; + RECT 0 177.145 0.25 177.245 ; + LAYER M3 ; + RECT 0 177.145 0.25 177.245 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[61] + + PIN TDB[62] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 180.025 0.25 180.125 ; + LAYER M2 ; + RECT 0 180.025 0.25 180.125 ; + LAYER M3 ; + RECT 0 180.025 0.25 180.125 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[62] + + PIN TDB[63] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 182.905 0.25 183.005 ; + LAYER M2 ; + RECT 0 182.905 0.25 183.005 ; + LAYER M3 ; + RECT 0 182.905 0.25 183.005 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[63] + + PIN TDB[64] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 231.855 0.25 231.955 ; + LAYER M2 ; + RECT 0 231.855 0.25 231.955 ; + LAYER M3 ; + RECT 0 231.855 0.25 231.955 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[64] + + PIN TDB[65] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 234.735 0.25 234.835 ; + LAYER M2 ; + RECT 0 234.735 0.25 234.835 ; + LAYER M3 ; + RECT 0 234.735 0.25 234.835 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[65] + + PIN TDB[66] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 237.615 0.25 237.715 ; + LAYER M2 ; + RECT 0 237.615 0.25 237.715 ; + LAYER M3 ; + RECT 0 237.615 0.25 237.715 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[66] + + PIN TDB[67] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 240.495 0.25 240.595 ; + LAYER M2 ; + RECT 0 240.495 0.25 240.595 ; + LAYER M3 ; + RECT 0 240.495 0.25 240.595 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[67] + + PIN TDB[68] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 243.375 0.25 243.475 ; + LAYER M2 ; + RECT 0 243.375 0.25 243.475 ; + LAYER M3 ; + RECT 0 243.375 0.25 243.475 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[68] + + PIN TDB[69] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 246.255 0.25 246.355 ; + LAYER M2 ; + RECT 0 246.255 0.25 246.355 ; + LAYER M3 ; + RECT 0 246.255 0.25 246.355 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[69] + + PIN TDB[6] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 18.745 0.25 18.845 ; + LAYER M2 ; + RECT 0 18.745 0.25 18.845 ; + LAYER M3 ; + RECT 0 18.745 0.25 18.845 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[6] + + PIN TDB[70] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 249.135 0.25 249.235 ; + LAYER M2 ; + RECT 0 249.135 0.25 249.235 ; + LAYER M3 ; + RECT 0 249.135 0.25 249.235 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[70] + + PIN TDB[71] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 252.015 0.25 252.115 ; + LAYER M2 ; + RECT 0 252.015 0.25 252.115 ; + LAYER M3 ; + RECT 0 252.015 0.25 252.115 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[71] + + PIN TDB[72] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 254.895 0.25 254.995 ; + LAYER M2 ; + RECT 0 254.895 0.25 254.995 ; + LAYER M3 ; + RECT 0 254.895 0.25 254.995 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[72] + + PIN TDB[73] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 257.775 0.25 257.875 ; + LAYER M2 ; + RECT 0 257.775 0.25 257.875 ; + LAYER M3 ; + RECT 0 257.775 0.25 257.875 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[73] + + PIN TDB[74] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 260.655 0.25 260.755 ; + LAYER M2 ; + RECT 0 260.655 0.25 260.755 ; + LAYER M3 ; + RECT 0 260.655 0.25 260.755 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[74] + + PIN TDB[75] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 263.535 0.25 263.635 ; + LAYER M2 ; + RECT 0 263.535 0.25 263.635 ; + LAYER M3 ; + RECT 0 263.535 0.25 263.635 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[75] + + PIN TDB[76] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 266.415 0.25 266.515 ; + LAYER M2 ; + RECT 0 266.415 0.25 266.515 ; + LAYER M3 ; + RECT 0 266.415 0.25 266.515 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[76] + + PIN TDB[77] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 269.295 0.25 269.395 ; + LAYER M2 ; + RECT 0 269.295 0.25 269.395 ; + LAYER M3 ; + RECT 0 269.295 0.25 269.395 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[77] + + PIN TDB[78] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 272.175 0.25 272.275 ; + LAYER M2 ; + RECT 0 272.175 0.25 272.275 ; + LAYER M3 ; + RECT 0 272.175 0.25 272.275 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[78] + + PIN TDB[79] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 275.055 0.25 275.155 ; + LAYER M2 ; + RECT 0 275.055 0.25 275.155 ; + LAYER M3 ; + RECT 0 275.055 0.25 275.155 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[79] + + PIN TDB[7] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 21.625 0.25 21.725 ; + LAYER M2 ; + RECT 0 21.625 0.25 21.725 ; + LAYER M3 ; + RECT 0 21.625 0.25 21.725 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[7] + + PIN TDB[80] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 277.935 0.25 278.035 ; + LAYER M2 ; + RECT 0 277.935 0.25 278.035 ; + LAYER M3 ; + RECT 0 277.935 0.25 278.035 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[80] + + PIN TDB[81] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 280.815 0.25 280.915 ; + LAYER M2 ; + RECT 0 280.815 0.25 280.915 ; + LAYER M3 ; + RECT 0 280.815 0.25 280.915 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[81] + + PIN TDB[82] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 283.695 0.25 283.795 ; + LAYER M2 ; + RECT 0 283.695 0.25 283.795 ; + LAYER M3 ; + RECT 0 283.695 0.25 283.795 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[82] + + PIN TDB[83] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 286.575 0.25 286.675 ; + LAYER M2 ; + RECT 0 286.575 0.25 286.675 ; + LAYER M3 ; + RECT 0 286.575 0.25 286.675 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[83] + + PIN TDB[84] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 289.455 0.25 289.555 ; + LAYER M2 ; + RECT 0 289.455 0.25 289.555 ; + LAYER M3 ; + RECT 0 289.455 0.25 289.555 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[84] + + PIN TDB[85] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 292.335 0.25 292.435 ; + LAYER M2 ; + RECT 0 292.335 0.25 292.435 ; + LAYER M3 ; + RECT 0 292.335 0.25 292.435 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[85] + + PIN TDB[86] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 295.215 0.25 295.315 ; + LAYER M2 ; + RECT 0 295.215 0.25 295.315 ; + LAYER M3 ; + RECT 0 295.215 0.25 295.315 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[86] + + PIN TDB[87] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 298.095 0.25 298.195 ; + LAYER M2 ; + RECT 0 298.095 0.25 298.195 ; + LAYER M3 ; + RECT 0 298.095 0.25 298.195 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[87] + + PIN TDB[88] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 300.975 0.25 301.075 ; + LAYER M2 ; + RECT 0 300.975 0.25 301.075 ; + LAYER M3 ; + RECT 0 300.975 0.25 301.075 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[88] + + PIN TDB[89] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 303.855 0.25 303.955 ; + LAYER M2 ; + RECT 0 303.855 0.25 303.955 ; + LAYER M3 ; + RECT 0 303.855 0.25 303.955 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[89] + + PIN TDB[8] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 24.505 0.25 24.605 ; + LAYER M2 ; + RECT 0 24.505 0.25 24.605 ; + LAYER M3 ; + RECT 0 24.505 0.25 24.605 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[8] + + PIN TDB[90] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 306.735 0.25 306.835 ; + LAYER M2 ; + RECT 0 306.735 0.25 306.835 ; + LAYER M3 ; + RECT 0 306.735 0.25 306.835 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[90] + + PIN TDB[91] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 309.615 0.25 309.715 ; + LAYER M2 ; + RECT 0 309.615 0.25 309.715 ; + LAYER M3 ; + RECT 0 309.615 0.25 309.715 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[91] + + PIN TDB[92] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 312.495 0.25 312.595 ; + LAYER M2 ; + RECT 0 312.495 0.25 312.595 ; + LAYER M3 ; + RECT 0 312.495 0.25 312.595 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[92] + + PIN TDB[93] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 315.375 0.25 315.475 ; + LAYER M2 ; + RECT 0 315.375 0.25 315.475 ; + LAYER M3 ; + RECT 0 315.375 0.25 315.475 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[93] + + PIN TDB[94] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 318.255 0.25 318.355 ; + LAYER M2 ; + RECT 0 318.255 0.25 318.355 ; + LAYER M3 ; + RECT 0 318.255 0.25 318.355 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[94] + + PIN TDB[95] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 321.135 0.25 321.235 ; + LAYER M2 ; + RECT 0 321.135 0.25 321.235 ; + LAYER M3 ; + RECT 0 321.135 0.25 321.235 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[95] + + PIN TDB[96] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 324.015 0.25 324.115 ; + LAYER M2 ; + RECT 0 324.015 0.25 324.115 ; + LAYER M3 ; + RECT 0 324.015 0.25 324.115 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[96] + + PIN TDB[97] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 326.895 0.25 326.995 ; + LAYER M2 ; + RECT 0 326.895 0.25 326.995 ; + LAYER M3 ; + RECT 0 326.895 0.25 326.995 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[97] + + PIN TDB[98] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 329.775 0.25 329.875 ; + LAYER M2 ; + RECT 0 329.775 0.25 329.875 ; + LAYER M3 ; + RECT 0 329.775 0.25 329.875 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[98] + + PIN TDB[99] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 332.655 0.25 332.755 ; + LAYER M2 ; + RECT 0 332.655 0.25 332.755 ; + LAYER M3 ; + RECT 0 332.655 0.25 332.755 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[99] + + PIN TDB[9] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 27.385 0.25 27.485 ; + LAYER M2 ; + RECT 0 27.385 0.25 27.485 ; + LAYER M3 ; + RECT 0 27.385 0.25 27.485 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[9] + + PIN TENA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 190.45 0.25 190.55 ; + LAYER M2 ; + RECT 0 190.45 0.25 190.55 ; + LAYER M3 ; + RECT 0 190.45 0.25 190.55 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TENA + + PIN TENB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 224.925 0.25 225.025 ; + LAYER M2 ; + RECT 0 224.925 0.25 225.025 ; + LAYER M3 ; + RECT 0 224.925 0.25 225.025 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TENB + + PIN TWENB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 3.26 0.25 3.36 ; + LAYER M2 ; + RECT 0 3.26 0.25 3.36 ; + LAYER M3 ; + RECT 0 3.26 0.25 3.36 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[0] + + PIN TWENB[100] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 333.74 0.25 333.84 ; + LAYER M2 ; + RECT 0 333.74 0.25 333.84 ; + LAYER M3 ; + RECT 0 333.74 0.25 333.84 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[100] + + PIN TWENB[101] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 336.62 0.25 336.72 ; + LAYER M2 ; + RECT 0 336.62 0.25 336.72 ; + LAYER M3 ; + RECT 0 336.62 0.25 336.72 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[101] + + PIN TWENB[102] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 339.5 0.25 339.6 ; + LAYER M2 ; + RECT 0 339.5 0.25 339.6 ; + LAYER M3 ; + RECT 0 339.5 0.25 339.6 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[102] + + PIN TWENB[103] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 342.38 0.25 342.48 ; + LAYER M2 ; + RECT 0 342.38 0.25 342.48 ; + LAYER M3 ; + RECT 0 342.38 0.25 342.48 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[103] + + PIN TWENB[104] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 345.26 0.25 345.36 ; + LAYER M2 ; + RECT 0 345.26 0.25 345.36 ; + LAYER M3 ; + RECT 0 345.26 0.25 345.36 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[104] + + PIN TWENB[105] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 348.14 0.25 348.24 ; + LAYER M2 ; + RECT 0 348.14 0.25 348.24 ; + LAYER M3 ; + RECT 0 348.14 0.25 348.24 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[105] + + PIN TWENB[106] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 351.02 0.25 351.12 ; + LAYER M2 ; + RECT 0 351.02 0.25 351.12 ; + LAYER M3 ; + RECT 0 351.02 0.25 351.12 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[106] + + PIN TWENB[107] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 353.9 0.25 354 ; + LAYER M2 ; + RECT 0 353.9 0.25 354 ; + LAYER M3 ; + RECT 0 353.9 0.25 354 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[107] + + PIN TWENB[108] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 356.78 0.25 356.88 ; + LAYER M2 ; + RECT 0 356.78 0.25 356.88 ; + LAYER M3 ; + RECT 0 356.78 0.25 356.88 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[108] + + PIN TWENB[109] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 359.66 0.25 359.76 ; + LAYER M2 ; + RECT 0 359.66 0.25 359.76 ; + LAYER M3 ; + RECT 0 359.66 0.25 359.76 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[109] + + PIN TWENB[10] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 32.06 0.25 32.16 ; + LAYER M2 ; + RECT 0 32.06 0.25 32.16 ; + LAYER M3 ; + RECT 0 32.06 0.25 32.16 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[10] + + PIN TWENB[110] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 362.54 0.25 362.64 ; + LAYER M2 ; + RECT 0 362.54 0.25 362.64 ; + LAYER M3 ; + RECT 0 362.54 0.25 362.64 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[110] + + PIN TWENB[111] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 365.42 0.25 365.52 ; + LAYER M2 ; + RECT 0 365.42 0.25 365.52 ; + LAYER M3 ; + RECT 0 365.42 0.25 365.52 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[111] + + PIN TWENB[112] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 368.3 0.25 368.4 ; + LAYER M2 ; + RECT 0 368.3 0.25 368.4 ; + LAYER M3 ; + RECT 0 368.3 0.25 368.4 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[112] + + PIN TWENB[113] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 371.18 0.25 371.28 ; + LAYER M2 ; + RECT 0 371.18 0.25 371.28 ; + LAYER M3 ; + RECT 0 371.18 0.25 371.28 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[113] + + PIN TWENB[114] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 374.06 0.25 374.16 ; + LAYER M2 ; + RECT 0 374.06 0.25 374.16 ; + LAYER M3 ; + RECT 0 374.06 0.25 374.16 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[114] + + PIN TWENB[115] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 376.94 0.25 377.04 ; + LAYER M2 ; + RECT 0 376.94 0.25 377.04 ; + LAYER M3 ; + RECT 0 376.94 0.25 377.04 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[115] + + PIN TWENB[116] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 379.82 0.25 379.92 ; + LAYER M2 ; + RECT 0 379.82 0.25 379.92 ; + LAYER M3 ; + RECT 0 379.82 0.25 379.92 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[116] + + PIN TWENB[117] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 382.7 0.25 382.8 ; + LAYER M2 ; + RECT 0 382.7 0.25 382.8 ; + LAYER M3 ; + RECT 0 382.7 0.25 382.8 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[117] + + PIN TWENB[118] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 385.58 0.25 385.68 ; + LAYER M2 ; + RECT 0 385.58 0.25 385.68 ; + LAYER M3 ; + RECT 0 385.58 0.25 385.68 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[118] + + PIN TWENB[119] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 388.46 0.25 388.56 ; + LAYER M2 ; + RECT 0 388.46 0.25 388.56 ; + LAYER M3 ; + RECT 0 388.46 0.25 388.56 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[119] + + PIN TWENB[11] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 34.94 0.25 35.04 ; + LAYER M2 ; + RECT 0 34.94 0.25 35.04 ; + LAYER M3 ; + RECT 0 34.94 0.25 35.04 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[11] + + PIN TWENB[120] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 391.34 0.25 391.44 ; + LAYER M2 ; + RECT 0 391.34 0.25 391.44 ; + LAYER M3 ; + RECT 0 391.34 0.25 391.44 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[120] + + PIN TWENB[121] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 394.22 0.25 394.32 ; + LAYER M2 ; + RECT 0 394.22 0.25 394.32 ; + LAYER M3 ; + RECT 0 394.22 0.25 394.32 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[121] + + PIN TWENB[122] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 397.1 0.25 397.2 ; + LAYER M2 ; + RECT 0 397.1 0.25 397.2 ; + LAYER M3 ; + RECT 0 397.1 0.25 397.2 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[122] + + PIN TWENB[123] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 399.98 0.25 400.08 ; + LAYER M2 ; + RECT 0 399.98 0.25 400.08 ; + LAYER M3 ; + RECT 0 399.98 0.25 400.08 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[123] + + PIN TWENB[124] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 402.86 0.25 402.96 ; + LAYER M2 ; + RECT 0 402.86 0.25 402.96 ; + LAYER M3 ; + RECT 0 402.86 0.25 402.96 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[124] + + PIN TWENB[125] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 405.74 0.25 405.84 ; + LAYER M2 ; + RECT 0 405.74 0.25 405.84 ; + LAYER M3 ; + RECT 0 405.74 0.25 405.84 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[125] + + PIN TWENB[126] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 408.62 0.25 408.72 ; + LAYER M2 ; + RECT 0 408.62 0.25 408.72 ; + LAYER M3 ; + RECT 0 408.62 0.25 408.72 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[126] + + PIN TWENB[127] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 411.5 0.25 411.6 ; + LAYER M2 ; + RECT 0 411.5 0.25 411.6 ; + LAYER M3 ; + RECT 0 411.5 0.25 411.6 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[127] + + PIN TWENB[12] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 37.82 0.25 37.92 ; + LAYER M2 ; + RECT 0 37.82 0.25 37.92 ; + LAYER M3 ; + RECT 0 37.82 0.25 37.92 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[12] + + PIN TWENB[13] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 40.7 0.25 40.8 ; + LAYER M2 ; + RECT 0 40.7 0.25 40.8 ; + LAYER M3 ; + RECT 0 40.7 0.25 40.8 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[13] + + PIN TWENB[14] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 43.58 0.25 43.68 ; + LAYER M2 ; + RECT 0 43.58 0.25 43.68 ; + LAYER M3 ; + RECT 0 43.58 0.25 43.68 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[14] + + PIN TWENB[15] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 46.46 0.25 46.56 ; + LAYER M2 ; + RECT 0 46.46 0.25 46.56 ; + LAYER M3 ; + RECT 0 46.46 0.25 46.56 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[15] + + PIN TWENB[16] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 49.34 0.25 49.44 ; + LAYER M2 ; + RECT 0 49.34 0.25 49.44 ; + LAYER M3 ; + RECT 0 49.34 0.25 49.44 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[16] + + PIN TWENB[17] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 52.22 0.25 52.32 ; + LAYER M2 ; + RECT 0 52.22 0.25 52.32 ; + LAYER M3 ; + RECT 0 52.22 0.25 52.32 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[17] + + PIN TWENB[18] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 55.1 0.25 55.2 ; + LAYER M2 ; + RECT 0 55.1 0.25 55.2 ; + LAYER M3 ; + RECT 0 55.1 0.25 55.2 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[18] + + PIN TWENB[19] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 57.98 0.25 58.08 ; + LAYER M2 ; + RECT 0 57.98 0.25 58.08 ; + LAYER M3 ; + RECT 0 57.98 0.25 58.08 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[19] + + PIN TWENB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 6.14 0.25 6.24 ; + LAYER M2 ; + RECT 0 6.14 0.25 6.24 ; + LAYER M3 ; + RECT 0 6.14 0.25 6.24 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[1] + + PIN TWENB[20] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 60.86 0.25 60.96 ; + LAYER M2 ; + RECT 0 60.86 0.25 60.96 ; + LAYER M3 ; + RECT 0 60.86 0.25 60.96 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[20] + + PIN TWENB[21] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 63.74 0.25 63.84 ; + LAYER M2 ; + RECT 0 63.74 0.25 63.84 ; + LAYER M3 ; + RECT 0 63.74 0.25 63.84 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[21] + + PIN TWENB[22] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 66.62 0.25 66.72 ; + LAYER M2 ; + RECT 0 66.62 0.25 66.72 ; + LAYER M3 ; + RECT 0 66.62 0.25 66.72 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[22] + + PIN TWENB[23] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 69.5 0.25 69.6 ; + LAYER M2 ; + RECT 0 69.5 0.25 69.6 ; + LAYER M3 ; + RECT 0 69.5 0.25 69.6 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[23] + + PIN TWENB[24] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 72.38 0.25 72.48 ; + LAYER M2 ; + RECT 0 72.38 0.25 72.48 ; + LAYER M3 ; + RECT 0 72.38 0.25 72.48 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[24] + + PIN TWENB[25] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 75.26 0.25 75.36 ; + LAYER M2 ; + RECT 0 75.26 0.25 75.36 ; + LAYER M3 ; + RECT 0 75.26 0.25 75.36 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[25] + + PIN TWENB[26] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 78.14 0.25 78.24 ; + LAYER M2 ; + RECT 0 78.14 0.25 78.24 ; + LAYER M3 ; + RECT 0 78.14 0.25 78.24 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[26] + + PIN TWENB[27] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 81.02 0.25 81.12 ; + LAYER M2 ; + RECT 0 81.02 0.25 81.12 ; + LAYER M3 ; + RECT 0 81.02 0.25 81.12 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[27] + + PIN TWENB[28] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 83.9 0.25 84 ; + LAYER M2 ; + RECT 0 83.9 0.25 84 ; + LAYER M3 ; + RECT 0 83.9 0.25 84 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[28] + + PIN TWENB[29] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 86.78 0.25 86.88 ; + LAYER M2 ; + RECT 0 86.78 0.25 86.88 ; + LAYER M3 ; + RECT 0 86.78 0.25 86.88 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[29] + + PIN TWENB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 9.02 0.25 9.12 ; + LAYER M2 ; + RECT 0 9.02 0.25 9.12 ; + LAYER M3 ; + RECT 0 9.02 0.25 9.12 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[2] + + PIN TWENB[30] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 89.66 0.25 89.76 ; + LAYER M2 ; + RECT 0 89.66 0.25 89.76 ; + LAYER M3 ; + RECT 0 89.66 0.25 89.76 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[30] + + PIN TWENB[31] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 92.54 0.25 92.64 ; + LAYER M2 ; + RECT 0 92.54 0.25 92.64 ; + LAYER M3 ; + RECT 0 92.54 0.25 92.64 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[31] + + PIN TWENB[32] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 95.42 0.25 95.52 ; + LAYER M2 ; + RECT 0 95.42 0.25 95.52 ; + LAYER M3 ; + RECT 0 95.42 0.25 95.52 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[32] + + PIN TWENB[33] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 98.3 0.25 98.4 ; + LAYER M2 ; + RECT 0 98.3 0.25 98.4 ; + LAYER M3 ; + RECT 0 98.3 0.25 98.4 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[33] + + PIN TWENB[34] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 101.18 0.25 101.28 ; + LAYER M2 ; + RECT 0 101.18 0.25 101.28 ; + LAYER M3 ; + RECT 0 101.18 0.25 101.28 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[34] + + PIN TWENB[35] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 104.06 0.25 104.16 ; + LAYER M2 ; + RECT 0 104.06 0.25 104.16 ; + LAYER M3 ; + RECT 0 104.06 0.25 104.16 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[35] + + PIN TWENB[36] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 106.94 0.25 107.04 ; + LAYER M2 ; + RECT 0 106.94 0.25 107.04 ; + LAYER M3 ; + RECT 0 106.94 0.25 107.04 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[36] + + PIN TWENB[37] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 109.82 0.25 109.92 ; + LAYER M2 ; + RECT 0 109.82 0.25 109.92 ; + LAYER M3 ; + RECT 0 109.82 0.25 109.92 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[37] + + PIN TWENB[38] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 112.7 0.25 112.8 ; + LAYER M2 ; + RECT 0 112.7 0.25 112.8 ; + LAYER M3 ; + RECT 0 112.7 0.25 112.8 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[38] + + PIN TWENB[39] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 115.58 0.25 115.68 ; + LAYER M2 ; + RECT 0 115.58 0.25 115.68 ; + LAYER M3 ; + RECT 0 115.58 0.25 115.68 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[39] + + PIN TWENB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 11.9 0.25 12 ; + LAYER M2 ; + RECT 0 11.9 0.25 12 ; + LAYER M3 ; + RECT 0 11.9 0.25 12 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[3] + + PIN TWENB[40] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 118.46 0.25 118.56 ; + LAYER M2 ; + RECT 0 118.46 0.25 118.56 ; + LAYER M3 ; + RECT 0 118.46 0.25 118.56 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[40] + + PIN TWENB[41] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 121.34 0.25 121.44 ; + LAYER M2 ; + RECT 0 121.34 0.25 121.44 ; + LAYER M3 ; + RECT 0 121.34 0.25 121.44 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[41] + + PIN TWENB[42] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 124.22 0.25 124.32 ; + LAYER M2 ; + RECT 0 124.22 0.25 124.32 ; + LAYER M3 ; + RECT 0 124.22 0.25 124.32 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[42] + + PIN TWENB[43] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 127.1 0.25 127.2 ; + LAYER M2 ; + RECT 0 127.1 0.25 127.2 ; + LAYER M3 ; + RECT 0 127.1 0.25 127.2 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[43] + + PIN TWENB[44] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 129.98 0.25 130.08 ; + LAYER M2 ; + RECT 0 129.98 0.25 130.08 ; + LAYER M3 ; + RECT 0 129.98 0.25 130.08 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[44] + + PIN TWENB[45] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 132.86 0.25 132.96 ; + LAYER M2 ; + RECT 0 132.86 0.25 132.96 ; + LAYER M3 ; + RECT 0 132.86 0.25 132.96 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[45] + + PIN TWENB[46] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 135.74 0.25 135.84 ; + LAYER M2 ; + RECT 0 135.74 0.25 135.84 ; + LAYER M3 ; + RECT 0 135.74 0.25 135.84 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[46] + + PIN TWENB[47] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 138.62 0.25 138.72 ; + LAYER M2 ; + RECT 0 138.62 0.25 138.72 ; + LAYER M3 ; + RECT 0 138.62 0.25 138.72 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[47] + + PIN TWENB[48] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 141.5 0.25 141.6 ; + LAYER M2 ; + RECT 0 141.5 0.25 141.6 ; + LAYER M3 ; + RECT 0 141.5 0.25 141.6 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[48] + + PIN TWENB[49] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 144.38 0.25 144.48 ; + LAYER M2 ; + RECT 0 144.38 0.25 144.48 ; + LAYER M3 ; + RECT 0 144.38 0.25 144.48 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[49] + + PIN TWENB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 14.78 0.25 14.88 ; + LAYER M2 ; + RECT 0 14.78 0.25 14.88 ; + LAYER M3 ; + RECT 0 14.78 0.25 14.88 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[4] + + PIN TWENB[50] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 147.26 0.25 147.36 ; + LAYER M2 ; + RECT 0 147.26 0.25 147.36 ; + LAYER M3 ; + RECT 0 147.26 0.25 147.36 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[50] + + PIN TWENB[51] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 150.14 0.25 150.24 ; + LAYER M2 ; + RECT 0 150.14 0.25 150.24 ; + LAYER M3 ; + RECT 0 150.14 0.25 150.24 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[51] + + PIN TWENB[52] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 153.02 0.25 153.12 ; + LAYER M2 ; + RECT 0 153.02 0.25 153.12 ; + LAYER M3 ; + RECT 0 153.02 0.25 153.12 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[52] + + PIN TWENB[53] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 155.9 0.25 156 ; + LAYER M2 ; + RECT 0 155.9 0.25 156 ; + LAYER M3 ; + RECT 0 155.9 0.25 156 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[53] + + PIN TWENB[54] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 158.78 0.25 158.88 ; + LAYER M2 ; + RECT 0 158.78 0.25 158.88 ; + LAYER M3 ; + RECT 0 158.78 0.25 158.88 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[54] + + PIN TWENB[55] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 161.66 0.25 161.76 ; + LAYER M2 ; + RECT 0 161.66 0.25 161.76 ; + LAYER M3 ; + RECT 0 161.66 0.25 161.76 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[55] + + PIN TWENB[56] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 164.54 0.25 164.64 ; + LAYER M2 ; + RECT 0 164.54 0.25 164.64 ; + LAYER M3 ; + RECT 0 164.54 0.25 164.64 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[56] + + PIN TWENB[57] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 167.42 0.25 167.52 ; + LAYER M2 ; + RECT 0 167.42 0.25 167.52 ; + LAYER M3 ; + RECT 0 167.42 0.25 167.52 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[57] + + PIN TWENB[58] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 170.3 0.25 170.4 ; + LAYER M2 ; + RECT 0 170.3 0.25 170.4 ; + LAYER M3 ; + RECT 0 170.3 0.25 170.4 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[58] + + PIN TWENB[59] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 173.18 0.25 173.28 ; + LAYER M2 ; + RECT 0 173.18 0.25 173.28 ; + LAYER M3 ; + RECT 0 173.18 0.25 173.28 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[59] + + PIN TWENB[5] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 17.66 0.25 17.76 ; + LAYER M2 ; + RECT 0 17.66 0.25 17.76 ; + LAYER M3 ; + RECT 0 17.66 0.25 17.76 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[5] + + PIN TWENB[60] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 176.06 0.25 176.16 ; + LAYER M2 ; + RECT 0 176.06 0.25 176.16 ; + LAYER M3 ; + RECT 0 176.06 0.25 176.16 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[60] + + PIN TWENB[61] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 178.94 0.25 179.04 ; + LAYER M2 ; + RECT 0 178.94 0.25 179.04 ; + LAYER M3 ; + RECT 0 178.94 0.25 179.04 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[61] + + PIN TWENB[62] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 181.82 0.25 181.92 ; + LAYER M2 ; + RECT 0 181.82 0.25 181.92 ; + LAYER M3 ; + RECT 0 181.82 0.25 181.92 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[62] + + PIN TWENB[63] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 184.7 0.25 184.8 ; + LAYER M2 ; + RECT 0 184.7 0.25 184.8 ; + LAYER M3 ; + RECT 0 184.7 0.25 184.8 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[63] + + PIN TWENB[64] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 230.06 0.25 230.16 ; + LAYER M2 ; + RECT 0 230.06 0.25 230.16 ; + LAYER M3 ; + RECT 0 230.06 0.25 230.16 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[64] + + PIN TWENB[65] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 232.94 0.25 233.04 ; + LAYER M2 ; + RECT 0 232.94 0.25 233.04 ; + LAYER M3 ; + RECT 0 232.94 0.25 233.04 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[65] + + PIN TWENB[66] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 235.82 0.25 235.92 ; + LAYER M2 ; + RECT 0 235.82 0.25 235.92 ; + LAYER M3 ; + RECT 0 235.82 0.25 235.92 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[66] + + PIN TWENB[67] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 238.7 0.25 238.8 ; + LAYER M2 ; + RECT 0 238.7 0.25 238.8 ; + LAYER M3 ; + RECT 0 238.7 0.25 238.8 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[67] + + PIN TWENB[68] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 241.58 0.25 241.68 ; + LAYER M2 ; + RECT 0 241.58 0.25 241.68 ; + LAYER M3 ; + RECT 0 241.58 0.25 241.68 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[68] + + PIN TWENB[69] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 244.46 0.25 244.56 ; + LAYER M2 ; + RECT 0 244.46 0.25 244.56 ; + LAYER M3 ; + RECT 0 244.46 0.25 244.56 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[69] + + PIN TWENB[6] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 20.54 0.25 20.64 ; + LAYER M2 ; + RECT 0 20.54 0.25 20.64 ; + LAYER M3 ; + RECT 0 20.54 0.25 20.64 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[6] + + PIN TWENB[70] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 247.34 0.25 247.44 ; + LAYER M2 ; + RECT 0 247.34 0.25 247.44 ; + LAYER M3 ; + RECT 0 247.34 0.25 247.44 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[70] + + PIN TWENB[71] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 250.22 0.25 250.32 ; + LAYER M2 ; + RECT 0 250.22 0.25 250.32 ; + LAYER M3 ; + RECT 0 250.22 0.25 250.32 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[71] + + PIN TWENB[72] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 253.1 0.25 253.2 ; + LAYER M2 ; + RECT 0 253.1 0.25 253.2 ; + LAYER M3 ; + RECT 0 253.1 0.25 253.2 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[72] + + PIN TWENB[73] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 255.98 0.25 256.08 ; + LAYER M2 ; + RECT 0 255.98 0.25 256.08 ; + LAYER M3 ; + RECT 0 255.98 0.25 256.08 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[73] + + PIN TWENB[74] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 258.86 0.25 258.96 ; + LAYER M2 ; + RECT 0 258.86 0.25 258.96 ; + LAYER M3 ; + RECT 0 258.86 0.25 258.96 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[74] + + PIN TWENB[75] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 261.74 0.25 261.84 ; + LAYER M2 ; + RECT 0 261.74 0.25 261.84 ; + LAYER M3 ; + RECT 0 261.74 0.25 261.84 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[75] + + PIN TWENB[76] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 264.62 0.25 264.72 ; + LAYER M2 ; + RECT 0 264.62 0.25 264.72 ; + LAYER M3 ; + RECT 0 264.62 0.25 264.72 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[76] + + PIN TWENB[77] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 267.5 0.25 267.6 ; + LAYER M2 ; + RECT 0 267.5 0.25 267.6 ; + LAYER M3 ; + RECT 0 267.5 0.25 267.6 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[77] + + PIN TWENB[78] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 270.38 0.25 270.48 ; + LAYER M2 ; + RECT 0 270.38 0.25 270.48 ; + LAYER M3 ; + RECT 0 270.38 0.25 270.48 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[78] + + PIN TWENB[79] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 273.26 0.25 273.36 ; + LAYER M2 ; + RECT 0 273.26 0.25 273.36 ; + LAYER M3 ; + RECT 0 273.26 0.25 273.36 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[79] + + PIN TWENB[7] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 23.42 0.25 23.52 ; + LAYER M2 ; + RECT 0 23.42 0.25 23.52 ; + LAYER M3 ; + RECT 0 23.42 0.25 23.52 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[7] + + PIN TWENB[80] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 276.14 0.25 276.24 ; + LAYER M2 ; + RECT 0 276.14 0.25 276.24 ; + LAYER M3 ; + RECT 0 276.14 0.25 276.24 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[80] + + PIN TWENB[81] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 279.02 0.25 279.12 ; + LAYER M2 ; + RECT 0 279.02 0.25 279.12 ; + LAYER M3 ; + RECT 0 279.02 0.25 279.12 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[81] + + PIN TWENB[82] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 281.9 0.25 282 ; + LAYER M2 ; + RECT 0 281.9 0.25 282 ; + LAYER M3 ; + RECT 0 281.9 0.25 282 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[82] + + PIN TWENB[83] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 284.78 0.25 284.88 ; + LAYER M2 ; + RECT 0 284.78 0.25 284.88 ; + LAYER M3 ; + RECT 0 284.78 0.25 284.88 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[83] + + PIN TWENB[84] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 287.66 0.25 287.76 ; + LAYER M2 ; + RECT 0 287.66 0.25 287.76 ; + LAYER M3 ; + RECT 0 287.66 0.25 287.76 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[84] + + PIN TWENB[85] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 290.54 0.25 290.64 ; + LAYER M2 ; + RECT 0 290.54 0.25 290.64 ; + LAYER M3 ; + RECT 0 290.54 0.25 290.64 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[85] + + PIN TWENB[86] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 293.42 0.25 293.52 ; + LAYER M2 ; + RECT 0 293.42 0.25 293.52 ; + LAYER M3 ; + RECT 0 293.42 0.25 293.52 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[86] + + PIN TWENB[87] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 296.3 0.25 296.4 ; + LAYER M2 ; + RECT 0 296.3 0.25 296.4 ; + LAYER M3 ; + RECT 0 296.3 0.25 296.4 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[87] + + PIN TWENB[88] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 299.18 0.25 299.28 ; + LAYER M2 ; + RECT 0 299.18 0.25 299.28 ; + LAYER M3 ; + RECT 0 299.18 0.25 299.28 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[88] + + PIN TWENB[89] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 302.06 0.25 302.16 ; + LAYER M2 ; + RECT 0 302.06 0.25 302.16 ; + LAYER M3 ; + RECT 0 302.06 0.25 302.16 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[89] + + PIN TWENB[8] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 26.3 0.25 26.4 ; + LAYER M2 ; + RECT 0 26.3 0.25 26.4 ; + LAYER M3 ; + RECT 0 26.3 0.25 26.4 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[8] + + PIN TWENB[90] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 304.94 0.25 305.04 ; + LAYER M2 ; + RECT 0 304.94 0.25 305.04 ; + LAYER M3 ; + RECT 0 304.94 0.25 305.04 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[90] + + PIN TWENB[91] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 307.82 0.25 307.92 ; + LAYER M2 ; + RECT 0 307.82 0.25 307.92 ; + LAYER M3 ; + RECT 0 307.82 0.25 307.92 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[91] + + PIN TWENB[92] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 310.7 0.25 310.8 ; + LAYER M2 ; + RECT 0 310.7 0.25 310.8 ; + LAYER M3 ; + RECT 0 310.7 0.25 310.8 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[92] + + PIN TWENB[93] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 313.58 0.25 313.68 ; + LAYER M2 ; + RECT 0 313.58 0.25 313.68 ; + LAYER M3 ; + RECT 0 313.58 0.25 313.68 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[93] + + PIN TWENB[94] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 316.46 0.25 316.56 ; + LAYER M2 ; + RECT 0 316.46 0.25 316.56 ; + LAYER M3 ; + RECT 0 316.46 0.25 316.56 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[94] + + PIN TWENB[95] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 319.34 0.25 319.44 ; + LAYER M2 ; + RECT 0 319.34 0.25 319.44 ; + LAYER M3 ; + RECT 0 319.34 0.25 319.44 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[95] + + PIN TWENB[96] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 322.22 0.25 322.32 ; + LAYER M2 ; + RECT 0 322.22 0.25 322.32 ; + LAYER M3 ; + RECT 0 322.22 0.25 322.32 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[96] + + PIN TWENB[97] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 325.1 0.25 325.2 ; + LAYER M2 ; + RECT 0 325.1 0.25 325.2 ; + LAYER M3 ; + RECT 0 325.1 0.25 325.2 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[97] + + PIN TWENB[98] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 327.98 0.25 328.08 ; + LAYER M2 ; + RECT 0 327.98 0.25 328.08 ; + LAYER M3 ; + RECT 0 327.98 0.25 328.08 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[98] + + PIN TWENB[99] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 330.86 0.25 330.96 ; + LAYER M2 ; + RECT 0 330.86 0.25 330.96 ; + LAYER M3 ; + RECT 0 330.86 0.25 330.96 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[99] + + PIN TWENB[9] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 29.18 0.25 29.28 ; + LAYER M2 ; + RECT 0 29.18 0.25 29.28 ; + LAYER M3 ; + RECT 0 29.18 0.25 29.28 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TWENB[9] + + PIN VDDCE + USE POWER ; + DIRECTION INOUT ; + PORT + LAYER M4 ; + RECT 0 411.415 21.165 411.565 ; + END + + PORT + LAYER M4 ; + RECT 0 118.495 21.165 118.645 ; + END + + PORT + LAYER M4 ; + RECT 0 115.615 21.165 115.765 ; + END + + PORT + LAYER M4 ; + RECT 0 112.735 21.165 112.885 ; + END + + PORT + LAYER M4 ; + RECT 0 109.855 21.165 110.005 ; + END + + PORT + LAYER M4 ; + RECT 0 106.975 21.165 107.125 ; + END + + PORT + LAYER M4 ; + RECT 0 104.095 21.165 104.245 ; + END + + PORT + LAYER M4 ; + RECT 0 101.215 21.165 101.365 ; + END + + PORT + LAYER M4 ; + RECT 0 98.335 21.165 98.485 ; + END + + PORT + LAYER M4 ; + RECT 0 95.455 21.165 95.605 ; + END + + PORT + LAYER M4 ; + RECT 0 92.575 21.165 92.725 ; + END + + PORT + LAYER M4 ; + RECT 0 89.695 21.165 89.845 ; + END + + PORT + LAYER M4 ; + RECT 0 86.815 21.165 86.965 ; + END + + PORT + LAYER M4 ; + RECT 0 83.935 21.165 84.085 ; + END + + PORT + LAYER M4 ; + RECT 0 81.055 21.165 81.205 ; + END + + PORT + LAYER M4 ; + RECT 0 78.175 21.165 78.325 ; + END + + PORT + LAYER M4 ; + RECT 0 75.295 21.165 75.445 ; + END + + PORT + LAYER M4 ; + RECT 0 72.415 21.165 72.565 ; + END + + PORT + LAYER M4 ; + RECT 0 69.535 21.165 69.685 ; + END + + PORT + LAYER M4 ; + RECT 0 66.655 21.165 66.805 ; + END + + PORT + LAYER M4 ; + RECT 0 63.775 21.165 63.925 ; + END + + PORT + LAYER M4 ; + RECT 0 60.895 21.165 61.045 ; + END + + PORT + LAYER M4 ; + RECT 0 58.015 21.165 58.165 ; + END + + PORT + LAYER M4 ; + RECT 0 55.135 21.165 55.285 ; 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+ RECT 0 196.79 21.165 196.98 ; + END + + PORT + LAYER M4 ; + RECT 0 198.76 21.165 198.95 ; + END + + PORT + LAYER M4 ; + RECT 0 199.73 21.165 199.94 ; + END + + PORT + LAYER M4 ; + RECT 0 200.725 21.165 200.915 ; + END + + PORT + LAYER M4 ; + RECT 0 202.7 21.165 202.89 ; + END + + PORT + LAYER M4 ; + RECT 0 203.68 21.165 203.87 ; + END + + PORT + LAYER M4 ; + RECT 0 206.63 21.165 206.82 ; + END + + PORT + LAYER M4 ; + RECT 0 208.105 21.165 208.295 ; + END + + PORT + LAYER M4 ; + RECT 0 211.055 21.165 211.245 ; + END + + PORT + LAYER M4 ; + RECT 0 212.045 21.165 212.235 ; + END + + PORT + LAYER M4 ; + RECT 0 214.01 21.165 214.2 ; + END + + PORT + LAYER M4 ; + RECT 0 214.985 21.165 215.195 ; + END + + PORT + LAYER M4 ; + RECT 0 215.98 21.165 216.17 ; + END + + PORT + LAYER M4 ; + RECT 0 217.945 21.165 218.135 ; + END + + PORT + LAYER M4 ; + RECT 0 218.93 21.165 219.12 ; + END + + PORT + LAYER M4 ; + RECT 0 219.915 21.165 220.105 ; + END + + PORT + LAYER M4 ; + RECT 0 222.855 21.165 223.065 ; + END + + PORT + LAYER M4 ; + RECT 0 223.85 21.165 224.04 ; + END + + PORT + LAYER M4 ; + RECT 0 225.82 21.165 226.01 ; + END + + PORT + LAYER M4 ; + RECT 0 226.805 21.165 226.995 ; + END + + PORT + LAYER M4 ; + RECT 0 64.005 21.165 64.155 ; + END + + PORT + LAYER M4 ; + RECT 0 61.125 21.165 61.275 ; + END + + PORT + LAYER M4 ; + RECT 0 58.245 21.165 58.395 ; + END + + PORT + LAYER M4 ; + RECT 0 55.365 21.165 55.515 ; + END + + PORT + LAYER M4 ; + RECT 0 52.485 21.165 52.635 ; + END + + PORT + LAYER M4 ; + RECT 0 49.605 21.165 49.755 ; + END + + PORT + LAYER M4 ; + RECT 0 46.725 21.165 46.875 ; + END + + PORT + LAYER M4 ; + RECT 0 43.845 21.165 43.995 ; + END + + PORT + LAYER M4 ; + RECT 0 40.965 21.165 41.115 ; + END + + PORT + LAYER M4 ; + RECT 0 38.085 21.165 38.235 ; + END + + PORT + LAYER M4 ; + RECT 0 35.205 21.165 35.355 ; + END + + PORT + LAYER M4 ; + RECT 0 32.325 21.165 32.475 ; + END + + PORT + LAYER M4 ; + RECT 0 29.445 21.165 29.595 ; + END + + PORT + LAYER M4 ; + RECT 0 26.565 21.165 26.715 ; + END + + PORT + LAYER M4 ; + RECT 0 365.105 21.165 365.255 ; + END + + PORT + LAYER M4 ; + RECT 0 362.225 21.165 362.375 ; + END + + PORT + LAYER M4 ; + RECT 0 359.345 21.165 359.495 ; + END + + PORT + LAYER M4 ; + RECT 0 356.465 21.165 356.615 ; + END + + PORT + LAYER M4 ; + RECT 0 353.585 21.165 353.735 ; + END + + PORT + LAYER M4 ; + RECT 0 350.705 21.165 350.855 ; + END + + PORT + LAYER M4 ; + RECT 0 347.825 21.165 347.975 ; + END + + PORT + LAYER M4 ; + RECT 0 344.945 21.165 345.095 ; + END + + PORT + LAYER M4 ; + RECT 0 342.065 21.165 342.215 ; + END + + PORT + LAYER M4 ; + RECT 0 339.185 21.165 339.335 ; + END + + PORT + LAYER M4 ; + RECT 0 336.305 21.165 336.455 ; + END + + PORT + LAYER M4 ; + RECT 0 333.425 21.165 333.575 ; + END + + PORT + LAYER M4 ; + RECT 0 330.545 21.165 330.695 ; + END + + PORT + LAYER M4 ; + RECT 0 327.665 21.165 327.815 ; + END + + PORT + LAYER M4 ; + RECT 0 267.185 21.165 267.335 ; + END + + PORT + LAYER M4 ; + RECT 0 264.305 21.165 264.455 ; + END + + PORT + LAYER M4 ; + RECT 0 261.425 21.165 261.575 ; + END + + PORT + LAYER M4 ; + RECT 0 258.545 21.165 258.695 ; + END + + PORT + LAYER M4 ; + RECT 0 255.665 21.165 255.815 ; + END + + PORT + LAYER M4 ; + RECT 0 252.785 21.165 252.935 ; + END + + PORT + LAYER M4 ; + RECT 0 249.905 21.165 250.055 ; + END + + PORT + LAYER M4 ; + RECT 0 247.025 21.165 247.175 ; + END + + PORT + LAYER M4 ; + RECT 0 244.145 21.165 244.295 ; + END + + PORT + LAYER M4 ; + RECT 0 241.265 21.165 241.415 ; + END + + PORT + LAYER M4 ; + RECT 0 64.465 21.165 64.615 ; + END + + PORT + LAYER M4 ; + RECT 0 61.585 21.165 61.735 ; + END + + PORT + LAYER M4 ; + RECT 0 58.705 21.165 58.855 ; + END + + PORT + LAYER M4 ; + RECT 0 364.645 21.165 364.795 ; + END + + PORT + LAYER M4 ; + RECT 0 361.765 21.165 361.915 ; + END + + PORT + LAYER M4 ; + RECT 0 358.885 21.165 359.035 ; + END + + END VSSE + + PIN WENB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 1.995 0.25 2.095 ; + LAYER M2 ; + RECT 0 1.995 0.25 2.095 ; + LAYER M3 ; + RECT 0 1.995 0.25 2.095 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[0] + + PIN WENB[100] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 335.005 0.25 335.105 ; + LAYER M2 ; + RECT 0 335.005 0.25 335.105 ; + LAYER M3 ; + RECT 0 335.005 0.25 335.105 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[100] + + PIN WENB[101] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 337.885 0.25 337.985 ; + LAYER M2 ; + RECT 0 337.885 0.25 337.985 ; + LAYER M3 ; + RECT 0 337.885 0.25 337.985 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[101] + + PIN WENB[102] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 340.765 0.25 340.865 ; + LAYER M2 ; + RECT 0 340.765 0.25 340.865 ; + LAYER M3 ; + RECT 0 340.765 0.25 340.865 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[102] + + PIN WENB[103] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 343.645 0.25 343.745 ; + LAYER M2 ; + RECT 0 343.645 0.25 343.745 ; + LAYER M3 ; + RECT 0 343.645 0.25 343.745 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[103] + + PIN WENB[104] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 346.525 0.25 346.625 ; + LAYER M2 ; + RECT 0 346.525 0.25 346.625 ; + LAYER M3 ; + RECT 0 346.525 0.25 346.625 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[104] + + PIN WENB[105] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 349.405 0.25 349.505 ; + LAYER M2 ; + RECT 0 349.405 0.25 349.505 ; + LAYER M3 ; + RECT 0 349.405 0.25 349.505 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[105] + + PIN WENB[106] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 352.285 0.25 352.385 ; + LAYER M2 ; + RECT 0 352.285 0.25 352.385 ; + LAYER M3 ; + RECT 0 352.285 0.25 352.385 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[106] + + PIN WENB[107] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 355.165 0.25 355.265 ; + LAYER M2 ; + RECT 0 355.165 0.25 355.265 ; + LAYER M3 ; + RECT 0 355.165 0.25 355.265 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[107] + + PIN WENB[108] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 358.045 0.25 358.145 ; + LAYER M2 ; + RECT 0 358.045 0.25 358.145 ; + LAYER M3 ; + RECT 0 358.045 0.25 358.145 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[108] + + PIN WENB[109] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 360.925 0.25 361.025 ; + LAYER M2 ; + RECT 0 360.925 0.25 361.025 ; + LAYER M3 ; + RECT 0 360.925 0.25 361.025 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[109] + + PIN WENB[10] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 30.795 0.25 30.895 ; + LAYER M2 ; + RECT 0 30.795 0.25 30.895 ; + LAYER M3 ; + RECT 0 30.795 0.25 30.895 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[10] + + PIN WENB[110] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 363.805 0.25 363.905 ; + LAYER M2 ; + RECT 0 363.805 0.25 363.905 ; + LAYER M3 ; + RECT 0 363.805 0.25 363.905 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[110] + + PIN WENB[111] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 366.685 0.25 366.785 ; + LAYER M2 ; + RECT 0 366.685 0.25 366.785 ; + LAYER M3 ; + RECT 0 366.685 0.25 366.785 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[111] + + PIN WENB[112] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 369.565 0.25 369.665 ; + LAYER M2 ; + RECT 0 369.565 0.25 369.665 ; + LAYER M3 ; + RECT 0 369.565 0.25 369.665 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[112] + + PIN WENB[113] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 372.445 0.25 372.545 ; + LAYER M2 ; + RECT 0 372.445 0.25 372.545 ; + LAYER M3 ; + RECT 0 372.445 0.25 372.545 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[113] + + PIN WENB[114] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 375.325 0.25 375.425 ; + LAYER M2 ; + RECT 0 375.325 0.25 375.425 ; + LAYER M3 ; + RECT 0 375.325 0.25 375.425 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[114] + + PIN WENB[115] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 378.205 0.25 378.305 ; + LAYER M2 ; + RECT 0 378.205 0.25 378.305 ; + LAYER M3 ; + RECT 0 378.205 0.25 378.305 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[115] + + PIN WENB[116] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 381.085 0.25 381.185 ; + LAYER M2 ; + RECT 0 381.085 0.25 381.185 ; + LAYER M3 ; + RECT 0 381.085 0.25 381.185 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[116] + + PIN WENB[117] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 383.965 0.25 384.065 ; + LAYER M2 ; + RECT 0 383.965 0.25 384.065 ; + LAYER M3 ; + RECT 0 383.965 0.25 384.065 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[117] + + PIN WENB[118] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 386.845 0.25 386.945 ; + LAYER M2 ; + RECT 0 386.845 0.25 386.945 ; + LAYER M3 ; + RECT 0 386.845 0.25 386.945 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[118] + + PIN WENB[119] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 389.725 0.25 389.825 ; + LAYER M2 ; + RECT 0 389.725 0.25 389.825 ; + LAYER M3 ; + RECT 0 389.725 0.25 389.825 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[119] + + PIN WENB[11] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 33.675 0.25 33.775 ; + LAYER M2 ; + RECT 0 33.675 0.25 33.775 ; + LAYER M3 ; + RECT 0 33.675 0.25 33.775 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[11] + + PIN WENB[120] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 392.605 0.25 392.705 ; + LAYER M2 ; + RECT 0 392.605 0.25 392.705 ; + LAYER M3 ; + RECT 0 392.605 0.25 392.705 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[120] + + PIN WENB[121] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 395.485 0.25 395.585 ; + LAYER M2 ; + RECT 0 395.485 0.25 395.585 ; + LAYER M3 ; + RECT 0 395.485 0.25 395.585 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[121] + + PIN WENB[122] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 398.365 0.25 398.465 ; + LAYER M2 ; + RECT 0 398.365 0.25 398.465 ; + LAYER M3 ; + RECT 0 398.365 0.25 398.465 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[122] + + PIN WENB[123] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 401.245 0.25 401.345 ; + LAYER M2 ; + RECT 0 401.245 0.25 401.345 ; + LAYER M3 ; + RECT 0 401.245 0.25 401.345 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[123] + + PIN WENB[124] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 404.125 0.25 404.225 ; + LAYER M2 ; + RECT 0 404.125 0.25 404.225 ; + LAYER M3 ; + RECT 0 404.125 0.25 404.225 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[124] + + PIN WENB[125] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 407.005 0.25 407.105 ; + LAYER M2 ; + RECT 0 407.005 0.25 407.105 ; + LAYER M3 ; + RECT 0 407.005 0.25 407.105 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[125] + + PIN WENB[126] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 409.885 0.25 409.985 ; + LAYER M2 ; + RECT 0 409.885 0.25 409.985 ; + LAYER M3 ; + RECT 0 409.885 0.25 409.985 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[126] + + PIN WENB[127] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 412.765 0.25 412.865 ; + LAYER M2 ; + RECT 0 412.765 0.25 412.865 ; + LAYER M3 ; + RECT 0 412.765 0.25 412.865 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[127] + + PIN WENB[12] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 36.555 0.25 36.655 ; + LAYER M2 ; + RECT 0 36.555 0.25 36.655 ; + LAYER M3 ; + RECT 0 36.555 0.25 36.655 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[12] + + PIN WENB[13] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 39.435 0.25 39.535 ; + LAYER M2 ; + RECT 0 39.435 0.25 39.535 ; + LAYER M3 ; + RECT 0 39.435 0.25 39.535 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[13] + + PIN WENB[14] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 42.315 0.25 42.415 ; + LAYER M2 ; + RECT 0 42.315 0.25 42.415 ; + LAYER M3 ; + RECT 0 42.315 0.25 42.415 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[14] + + PIN WENB[15] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 45.195 0.25 45.295 ; + LAYER M2 ; + RECT 0 45.195 0.25 45.295 ; + LAYER M3 ; + RECT 0 45.195 0.25 45.295 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[15] + + PIN WENB[16] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 48.075 0.25 48.175 ; + LAYER M2 ; + RECT 0 48.075 0.25 48.175 ; + LAYER M3 ; + RECT 0 48.075 0.25 48.175 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[16] + + PIN WENB[17] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 50.955 0.25 51.055 ; + LAYER M2 ; + RECT 0 50.955 0.25 51.055 ; + LAYER M3 ; + RECT 0 50.955 0.25 51.055 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[17] + + PIN WENB[18] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 53.835 0.25 53.935 ; + LAYER M2 ; + RECT 0 53.835 0.25 53.935 ; + LAYER M3 ; + RECT 0 53.835 0.25 53.935 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[18] + + PIN WENB[19] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 56.715 0.25 56.815 ; + LAYER M2 ; + RECT 0 56.715 0.25 56.815 ; + LAYER M3 ; + RECT 0 56.715 0.25 56.815 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[19] + + PIN WENB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 4.875 0.25 4.975 ; + LAYER M2 ; + RECT 0 4.875 0.25 4.975 ; + LAYER M3 ; + RECT 0 4.875 0.25 4.975 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[1] + + PIN WENB[20] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 59.595 0.25 59.695 ; + LAYER M2 ; + RECT 0 59.595 0.25 59.695 ; + LAYER M3 ; + RECT 0 59.595 0.25 59.695 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[20] + + PIN WENB[21] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 62.475 0.25 62.575 ; + LAYER M2 ; + RECT 0 62.475 0.25 62.575 ; + LAYER M3 ; + RECT 0 62.475 0.25 62.575 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[21] + + PIN WENB[22] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 65.355 0.25 65.455 ; + LAYER M2 ; + RECT 0 65.355 0.25 65.455 ; + LAYER M3 ; + RECT 0 65.355 0.25 65.455 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[22] + + PIN WENB[23] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 68.235 0.25 68.335 ; + LAYER M2 ; + RECT 0 68.235 0.25 68.335 ; + LAYER M3 ; + RECT 0 68.235 0.25 68.335 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[23] + + PIN WENB[24] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 71.115 0.25 71.215 ; + LAYER M2 ; + RECT 0 71.115 0.25 71.215 ; + LAYER M3 ; + RECT 0 71.115 0.25 71.215 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[24] + + PIN WENB[25] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 73.995 0.25 74.095 ; + LAYER M2 ; + RECT 0 73.995 0.25 74.095 ; + LAYER M3 ; + RECT 0 73.995 0.25 74.095 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[25] + + PIN WENB[26] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 76.875 0.25 76.975 ; + LAYER M2 ; + RECT 0 76.875 0.25 76.975 ; + LAYER M3 ; + RECT 0 76.875 0.25 76.975 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[26] + + PIN WENB[27] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 79.755 0.25 79.855 ; + LAYER M2 ; + RECT 0 79.755 0.25 79.855 ; + LAYER M3 ; + RECT 0 79.755 0.25 79.855 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[27] + + PIN WENB[28] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 82.635 0.25 82.735 ; + LAYER M2 ; + RECT 0 82.635 0.25 82.735 ; + LAYER M3 ; + RECT 0 82.635 0.25 82.735 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[28] + + PIN WENB[29] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 85.515 0.25 85.615 ; + LAYER M2 ; + RECT 0 85.515 0.25 85.615 ; + LAYER M3 ; + RECT 0 85.515 0.25 85.615 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[29] + + PIN WENB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 7.755 0.25 7.855 ; + LAYER M2 ; + RECT 0 7.755 0.25 7.855 ; + LAYER M3 ; + RECT 0 7.755 0.25 7.855 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[2] + + PIN WENB[30] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 88.395 0.25 88.495 ; + LAYER M2 ; + RECT 0 88.395 0.25 88.495 ; + LAYER M3 ; + RECT 0 88.395 0.25 88.495 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[30] + + PIN WENB[31] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 91.275 0.25 91.375 ; + LAYER M2 ; + RECT 0 91.275 0.25 91.375 ; + LAYER M3 ; + RECT 0 91.275 0.25 91.375 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[31] + + PIN WENB[32] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 94.155 0.25 94.255 ; + LAYER M2 ; + RECT 0 94.155 0.25 94.255 ; + LAYER M3 ; + RECT 0 94.155 0.25 94.255 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[32] + + PIN WENB[33] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 97.035 0.25 97.135 ; + LAYER M2 ; + RECT 0 97.035 0.25 97.135 ; + LAYER M3 ; + RECT 0 97.035 0.25 97.135 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[33] + + PIN WENB[34] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 99.915 0.25 100.015 ; + LAYER M2 ; + RECT 0 99.915 0.25 100.015 ; + LAYER M3 ; + RECT 0 99.915 0.25 100.015 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[34] + + PIN WENB[35] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 102.795 0.25 102.895 ; + LAYER M2 ; + RECT 0 102.795 0.25 102.895 ; + LAYER M3 ; + RECT 0 102.795 0.25 102.895 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[35] + + PIN WENB[36] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 105.675 0.25 105.775 ; + LAYER M2 ; + RECT 0 105.675 0.25 105.775 ; + LAYER M3 ; + RECT 0 105.675 0.25 105.775 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[36] + + PIN WENB[37] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 108.555 0.25 108.655 ; + LAYER M2 ; + RECT 0 108.555 0.25 108.655 ; + LAYER M3 ; + RECT 0 108.555 0.25 108.655 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[37] + + PIN WENB[38] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 111.435 0.25 111.535 ; + LAYER M2 ; + RECT 0 111.435 0.25 111.535 ; + LAYER M3 ; + RECT 0 111.435 0.25 111.535 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[38] + + PIN WENB[39] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 114.315 0.25 114.415 ; + LAYER M2 ; + RECT 0 114.315 0.25 114.415 ; + LAYER M3 ; + RECT 0 114.315 0.25 114.415 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[39] + + PIN WENB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 10.635 0.25 10.735 ; + LAYER M2 ; + RECT 0 10.635 0.25 10.735 ; + LAYER M3 ; + RECT 0 10.635 0.25 10.735 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[3] + + PIN WENB[40] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 117.195 0.25 117.295 ; + LAYER M2 ; + RECT 0 117.195 0.25 117.295 ; + LAYER M3 ; + RECT 0 117.195 0.25 117.295 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[40] + + PIN WENB[41] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 120.075 0.25 120.175 ; + LAYER M2 ; + RECT 0 120.075 0.25 120.175 ; + LAYER M3 ; + RECT 0 120.075 0.25 120.175 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[41] + + PIN WENB[42] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 122.955 0.25 123.055 ; + LAYER M2 ; + RECT 0 122.955 0.25 123.055 ; + LAYER M3 ; + RECT 0 122.955 0.25 123.055 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[42] + + PIN WENB[43] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 125.835 0.25 125.935 ; + LAYER M2 ; + RECT 0 125.835 0.25 125.935 ; + LAYER M3 ; + RECT 0 125.835 0.25 125.935 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[43] + + PIN WENB[44] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 128.715 0.25 128.815 ; + LAYER M2 ; + RECT 0 128.715 0.25 128.815 ; + LAYER M3 ; + RECT 0 128.715 0.25 128.815 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[44] + + PIN WENB[45] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 131.595 0.25 131.695 ; + LAYER M2 ; + RECT 0 131.595 0.25 131.695 ; + LAYER M3 ; + RECT 0 131.595 0.25 131.695 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[45] + + PIN WENB[46] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 134.475 0.25 134.575 ; + LAYER M2 ; + RECT 0 134.475 0.25 134.575 ; + LAYER M3 ; + RECT 0 134.475 0.25 134.575 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[46] + + PIN WENB[47] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 137.355 0.25 137.455 ; + LAYER M2 ; + RECT 0 137.355 0.25 137.455 ; + LAYER M3 ; + RECT 0 137.355 0.25 137.455 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[47] + + PIN WENB[48] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 140.235 0.25 140.335 ; + LAYER M2 ; + RECT 0 140.235 0.25 140.335 ; + LAYER M3 ; + RECT 0 140.235 0.25 140.335 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[48] + + PIN WENB[49] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 143.115 0.25 143.215 ; + LAYER M2 ; + RECT 0 143.115 0.25 143.215 ; + LAYER M3 ; + RECT 0 143.115 0.25 143.215 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[49] + + PIN WENB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 13.515 0.25 13.615 ; + LAYER M2 ; + RECT 0 13.515 0.25 13.615 ; + LAYER M3 ; + RECT 0 13.515 0.25 13.615 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[4] + + PIN WENB[50] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 145.995 0.25 146.095 ; + LAYER M2 ; + RECT 0 145.995 0.25 146.095 ; + LAYER M3 ; + RECT 0 145.995 0.25 146.095 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[50] + + PIN WENB[51] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 148.875 0.25 148.975 ; + LAYER M2 ; + RECT 0 148.875 0.25 148.975 ; + LAYER M3 ; + RECT 0 148.875 0.25 148.975 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[51] + + PIN WENB[52] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 151.755 0.25 151.855 ; + LAYER M2 ; + RECT 0 151.755 0.25 151.855 ; + LAYER M3 ; + RECT 0 151.755 0.25 151.855 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[52] + + PIN WENB[53] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 154.635 0.25 154.735 ; + LAYER M2 ; + RECT 0 154.635 0.25 154.735 ; + LAYER M3 ; + RECT 0 154.635 0.25 154.735 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[53] + + PIN WENB[54] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 157.515 0.25 157.615 ; + LAYER M2 ; + RECT 0 157.515 0.25 157.615 ; + LAYER M3 ; + RECT 0 157.515 0.25 157.615 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[54] + + PIN WENB[55] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 160.395 0.25 160.495 ; + LAYER M2 ; + RECT 0 160.395 0.25 160.495 ; + LAYER M3 ; + RECT 0 160.395 0.25 160.495 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[55] + + PIN WENB[56] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 163.275 0.25 163.375 ; + LAYER M2 ; + RECT 0 163.275 0.25 163.375 ; + LAYER M3 ; + RECT 0 163.275 0.25 163.375 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[56] + + PIN WENB[57] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 166.155 0.25 166.255 ; + LAYER M2 ; + RECT 0 166.155 0.25 166.255 ; + LAYER M3 ; + RECT 0 166.155 0.25 166.255 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[57] + + PIN WENB[58] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 169.035 0.25 169.135 ; + LAYER M2 ; + RECT 0 169.035 0.25 169.135 ; + LAYER M3 ; + RECT 0 169.035 0.25 169.135 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[58] + + PIN WENB[59] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 171.915 0.25 172.015 ; + LAYER M2 ; + RECT 0 171.915 0.25 172.015 ; + LAYER M3 ; + RECT 0 171.915 0.25 172.015 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[59] + + PIN WENB[5] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 16.395 0.25 16.495 ; + LAYER M2 ; + RECT 0 16.395 0.25 16.495 ; + LAYER M3 ; + RECT 0 16.395 0.25 16.495 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[5] + + PIN WENB[60] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 174.795 0.25 174.895 ; + LAYER M2 ; + RECT 0 174.795 0.25 174.895 ; + LAYER M3 ; + RECT 0 174.795 0.25 174.895 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[60] + + PIN WENB[61] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 177.675 0.25 177.775 ; + LAYER M2 ; + RECT 0 177.675 0.25 177.775 ; + LAYER M3 ; + RECT 0 177.675 0.25 177.775 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[61] + + PIN WENB[62] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 180.555 0.25 180.655 ; + LAYER M2 ; + RECT 0 180.555 0.25 180.655 ; + LAYER M3 ; + RECT 0 180.555 0.25 180.655 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[62] + + PIN WENB[63] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 183.435 0.25 183.535 ; + LAYER M2 ; + RECT 0 183.435 0.25 183.535 ; + LAYER M3 ; + RECT 0 183.435 0.25 183.535 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[63] + + PIN WENB[64] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 231.325 0.25 231.425 ; + LAYER M2 ; + RECT 0 231.325 0.25 231.425 ; + LAYER M3 ; + RECT 0 231.325 0.25 231.425 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[64] + + PIN WENB[65] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 234.205 0.25 234.305 ; + LAYER M2 ; + RECT 0 234.205 0.25 234.305 ; + LAYER M3 ; + RECT 0 234.205 0.25 234.305 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[65] + + PIN WENB[66] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 237.085 0.25 237.185 ; + LAYER M2 ; + RECT 0 237.085 0.25 237.185 ; + LAYER M3 ; + RECT 0 237.085 0.25 237.185 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[66] + + PIN WENB[67] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 239.965 0.25 240.065 ; + LAYER M2 ; + RECT 0 239.965 0.25 240.065 ; + LAYER M3 ; + RECT 0 239.965 0.25 240.065 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[67] + + PIN WENB[68] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 242.845 0.25 242.945 ; + LAYER M2 ; + RECT 0 242.845 0.25 242.945 ; + LAYER M3 ; + RECT 0 242.845 0.25 242.945 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[68] + + PIN WENB[69] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 245.725 0.25 245.825 ; + LAYER M2 ; + RECT 0 245.725 0.25 245.825 ; + LAYER M3 ; + RECT 0 245.725 0.25 245.825 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[69] + + PIN WENB[6] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 19.275 0.25 19.375 ; + LAYER M2 ; + RECT 0 19.275 0.25 19.375 ; + LAYER M3 ; + RECT 0 19.275 0.25 19.375 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[6] + + PIN WENB[70] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 248.605 0.25 248.705 ; + LAYER M2 ; + RECT 0 248.605 0.25 248.705 ; + LAYER M3 ; + RECT 0 248.605 0.25 248.705 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[70] + + PIN WENB[71] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 251.485 0.25 251.585 ; + LAYER M2 ; + RECT 0 251.485 0.25 251.585 ; + LAYER M3 ; + RECT 0 251.485 0.25 251.585 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[71] + + PIN WENB[72] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 254.365 0.25 254.465 ; + LAYER M2 ; + RECT 0 254.365 0.25 254.465 ; + LAYER M3 ; + RECT 0 254.365 0.25 254.465 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[72] + + PIN WENB[73] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 257.245 0.25 257.345 ; + LAYER M2 ; + RECT 0 257.245 0.25 257.345 ; + LAYER M3 ; + RECT 0 257.245 0.25 257.345 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[73] + + PIN WENB[74] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 260.125 0.25 260.225 ; + LAYER M2 ; + RECT 0 260.125 0.25 260.225 ; + LAYER M3 ; + RECT 0 260.125 0.25 260.225 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[74] + + PIN WENB[75] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 263.005 0.25 263.105 ; + LAYER M2 ; + RECT 0 263.005 0.25 263.105 ; + LAYER M3 ; + RECT 0 263.005 0.25 263.105 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[75] + + PIN WENB[76] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 265.885 0.25 265.985 ; + LAYER M2 ; + RECT 0 265.885 0.25 265.985 ; + LAYER M3 ; + RECT 0 265.885 0.25 265.985 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[76] + + PIN WENB[77] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 268.765 0.25 268.865 ; + LAYER M2 ; + RECT 0 268.765 0.25 268.865 ; + LAYER M3 ; + RECT 0 268.765 0.25 268.865 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[77] + + PIN WENB[78] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 271.645 0.25 271.745 ; + LAYER M2 ; + RECT 0 271.645 0.25 271.745 ; + LAYER M3 ; + RECT 0 271.645 0.25 271.745 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[78] + + PIN WENB[79] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 274.525 0.25 274.625 ; + LAYER M2 ; + RECT 0 274.525 0.25 274.625 ; + LAYER M3 ; + RECT 0 274.525 0.25 274.625 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[79] + + PIN WENB[7] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 22.155 0.25 22.255 ; + LAYER M2 ; + RECT 0 22.155 0.25 22.255 ; + LAYER M3 ; + RECT 0 22.155 0.25 22.255 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[7] + + PIN WENB[80] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 277.405 0.25 277.505 ; + LAYER M2 ; + RECT 0 277.405 0.25 277.505 ; + LAYER M3 ; + RECT 0 277.405 0.25 277.505 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[80] + + PIN WENB[81] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 280.285 0.25 280.385 ; + LAYER M2 ; + RECT 0 280.285 0.25 280.385 ; + LAYER M3 ; + RECT 0 280.285 0.25 280.385 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[81] + + PIN WENB[82] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 283.165 0.25 283.265 ; + LAYER M2 ; + RECT 0 283.165 0.25 283.265 ; + LAYER M3 ; + RECT 0 283.165 0.25 283.265 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[82] + + PIN WENB[83] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 286.045 0.25 286.145 ; + LAYER M2 ; + RECT 0 286.045 0.25 286.145 ; + LAYER M3 ; + RECT 0 286.045 0.25 286.145 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[83] + + PIN WENB[84] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 288.925 0.25 289.025 ; + LAYER M2 ; + RECT 0 288.925 0.25 289.025 ; + LAYER M3 ; + RECT 0 288.925 0.25 289.025 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[84] + + PIN WENB[85] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 291.805 0.25 291.905 ; + LAYER M2 ; + RECT 0 291.805 0.25 291.905 ; + LAYER M3 ; + RECT 0 291.805 0.25 291.905 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[85] + + PIN WENB[86] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 294.685 0.25 294.785 ; + LAYER M2 ; + RECT 0 294.685 0.25 294.785 ; + LAYER M3 ; + RECT 0 294.685 0.25 294.785 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[86] + + PIN WENB[87] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 297.565 0.25 297.665 ; + LAYER M2 ; + RECT 0 297.565 0.25 297.665 ; + LAYER M3 ; + RECT 0 297.565 0.25 297.665 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[87] + + PIN WENB[88] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 300.445 0.25 300.545 ; + LAYER M2 ; + RECT 0 300.445 0.25 300.545 ; + LAYER M3 ; + RECT 0 300.445 0.25 300.545 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[88] + + PIN WENB[89] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 303.325 0.25 303.425 ; + LAYER M2 ; + RECT 0 303.325 0.25 303.425 ; + LAYER M3 ; + RECT 0 303.325 0.25 303.425 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[89] + + PIN WENB[8] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 25.035 0.25 25.135 ; + LAYER M2 ; + RECT 0 25.035 0.25 25.135 ; + LAYER M3 ; + RECT 0 25.035 0.25 25.135 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[8] + + PIN WENB[90] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 306.205 0.25 306.305 ; + LAYER M2 ; + RECT 0 306.205 0.25 306.305 ; + LAYER M3 ; + RECT 0 306.205 0.25 306.305 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[90] + + PIN WENB[91] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 309.085 0.25 309.185 ; + LAYER M2 ; + RECT 0 309.085 0.25 309.185 ; + LAYER M3 ; + RECT 0 309.085 0.25 309.185 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[91] + + PIN WENB[92] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 311.965 0.25 312.065 ; + LAYER M2 ; + RECT 0 311.965 0.25 312.065 ; + LAYER M3 ; + RECT 0 311.965 0.25 312.065 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[92] + + PIN WENB[93] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 314.845 0.25 314.945 ; + LAYER M2 ; + RECT 0 314.845 0.25 314.945 ; + LAYER M3 ; + RECT 0 314.845 0.25 314.945 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[93] + + PIN WENB[94] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 317.725 0.25 317.825 ; + LAYER M2 ; + RECT 0 317.725 0.25 317.825 ; + LAYER M3 ; + RECT 0 317.725 0.25 317.825 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[94] + + PIN WENB[95] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 320.605 0.25 320.705 ; + LAYER M2 ; + RECT 0 320.605 0.25 320.705 ; + LAYER M3 ; + RECT 0 320.605 0.25 320.705 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[95] + + PIN WENB[96] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 323.485 0.25 323.585 ; + LAYER M2 ; + RECT 0 323.485 0.25 323.585 ; + LAYER M3 ; + RECT 0 323.485 0.25 323.585 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[96] + + PIN WENB[97] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 326.365 0.25 326.465 ; + LAYER M2 ; + RECT 0 326.365 0.25 326.465 ; + LAYER M3 ; + RECT 0 326.365 0.25 326.465 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[97] + + PIN WENB[98] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 329.245 0.25 329.345 ; + LAYER M2 ; + RECT 0 329.245 0.25 329.345 ; + LAYER M3 ; + RECT 0 329.245 0.25 329.345 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[98] + + PIN WENB[99] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 332.125 0.25 332.225 ; + LAYER M2 ; + RECT 0 332.125 0.25 332.225 ; + LAYER M3 ; + RECT 0 332.125 0.25 332.225 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[99] + + PIN WENB[9] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 27.915 0.25 28.015 ; + LAYER M2 ; + RECT 0 27.915 0.25 28.015 ; + LAYER M3 ; + RECT 0 27.915 0.25 28.015 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENB[9] + + PIN WENYB[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 1.73 0.25 1.83 ; + LAYER M2 ; + RECT 0 1.73 0.25 1.83 ; + LAYER M3 ; + RECT 0 1.73 0.25 1.83 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[0] + + PIN WENYB[100] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 335.27 0.25 335.37 ; + LAYER M2 ; + RECT 0 335.27 0.25 335.37 ; + LAYER M3 ; + RECT 0 335.27 0.25 335.37 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[100] + + PIN WENYB[101] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 338.15 0.25 338.25 ; + LAYER M2 ; + RECT 0 338.15 0.25 338.25 ; + LAYER M3 ; + RECT 0 338.15 0.25 338.25 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[101] + + PIN WENYB[102] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 341.03 0.25 341.13 ; + LAYER M2 ; + RECT 0 341.03 0.25 341.13 ; + LAYER M3 ; + RECT 0 341.03 0.25 341.13 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[102] + + PIN WENYB[103] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 343.91 0.25 344.01 ; + LAYER M2 ; + RECT 0 343.91 0.25 344.01 ; + LAYER M3 ; + RECT 0 343.91 0.25 344.01 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[103] + + PIN WENYB[104] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 346.79 0.25 346.89 ; + LAYER M2 ; + RECT 0 346.79 0.25 346.89 ; + LAYER M3 ; + RECT 0 346.79 0.25 346.89 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[104] + + PIN WENYB[105] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 349.67 0.25 349.77 ; + LAYER M2 ; + RECT 0 349.67 0.25 349.77 ; + LAYER M3 ; + RECT 0 349.67 0.25 349.77 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[105] + + PIN WENYB[106] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 352.55 0.25 352.65 ; + LAYER M2 ; + RECT 0 352.55 0.25 352.65 ; + LAYER M3 ; + RECT 0 352.55 0.25 352.65 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[106] + + PIN WENYB[107] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 355.43 0.25 355.53 ; + LAYER M2 ; + RECT 0 355.43 0.25 355.53 ; + LAYER M3 ; + RECT 0 355.43 0.25 355.53 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[107] + + PIN WENYB[108] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 358.31 0.25 358.41 ; + LAYER M2 ; + RECT 0 358.31 0.25 358.41 ; + LAYER M3 ; + RECT 0 358.31 0.25 358.41 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[108] + + PIN WENYB[109] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 361.19 0.25 361.29 ; + LAYER M2 ; + RECT 0 361.19 0.25 361.29 ; + LAYER M3 ; + RECT 0 361.19 0.25 361.29 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[109] + + PIN WENYB[10] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 30.53 0.25 30.63 ; + LAYER M2 ; + RECT 0 30.53 0.25 30.63 ; + LAYER M3 ; + RECT 0 30.53 0.25 30.63 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[10] + + PIN WENYB[110] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 364.07 0.25 364.17 ; + LAYER M2 ; + RECT 0 364.07 0.25 364.17 ; + LAYER M3 ; + RECT 0 364.07 0.25 364.17 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[110] + + PIN WENYB[111] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 366.95 0.25 367.05 ; + LAYER M2 ; + RECT 0 366.95 0.25 367.05 ; + LAYER M3 ; + RECT 0 366.95 0.25 367.05 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[111] + + PIN WENYB[112] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 369.83 0.25 369.93 ; + LAYER M2 ; + RECT 0 369.83 0.25 369.93 ; + LAYER M3 ; + RECT 0 369.83 0.25 369.93 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[112] + + PIN WENYB[113] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 372.71 0.25 372.81 ; + LAYER M2 ; + RECT 0 372.71 0.25 372.81 ; + LAYER M3 ; + RECT 0 372.71 0.25 372.81 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[113] + + PIN WENYB[114] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 375.59 0.25 375.69 ; + LAYER M2 ; + RECT 0 375.59 0.25 375.69 ; + LAYER M3 ; + RECT 0 375.59 0.25 375.69 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[114] + + PIN WENYB[115] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 378.47 0.25 378.57 ; + LAYER M2 ; + RECT 0 378.47 0.25 378.57 ; + LAYER M3 ; + RECT 0 378.47 0.25 378.57 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[115] + + PIN WENYB[116] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 381.35 0.25 381.45 ; + LAYER M2 ; + RECT 0 381.35 0.25 381.45 ; + LAYER M3 ; + RECT 0 381.35 0.25 381.45 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[116] + + PIN WENYB[117] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 384.23 0.25 384.33 ; + LAYER M2 ; + RECT 0 384.23 0.25 384.33 ; + LAYER M3 ; + RECT 0 384.23 0.25 384.33 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[117] + + PIN WENYB[118] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 387.11 0.25 387.21 ; + LAYER M2 ; + RECT 0 387.11 0.25 387.21 ; + LAYER M3 ; + RECT 0 387.11 0.25 387.21 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[118] + + PIN WENYB[119] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 389.99 0.25 390.09 ; + LAYER M2 ; + RECT 0 389.99 0.25 390.09 ; + LAYER M3 ; + RECT 0 389.99 0.25 390.09 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[119] + + PIN WENYB[11] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 33.41 0.25 33.51 ; + LAYER M2 ; + RECT 0 33.41 0.25 33.51 ; + LAYER M3 ; + RECT 0 33.41 0.25 33.51 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[11] + + PIN WENYB[120] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 392.87 0.25 392.97 ; + LAYER M2 ; + RECT 0 392.87 0.25 392.97 ; + LAYER M3 ; + RECT 0 392.87 0.25 392.97 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[120] + + PIN WENYB[121] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 395.75 0.25 395.85 ; + LAYER M2 ; + RECT 0 395.75 0.25 395.85 ; + LAYER M3 ; + RECT 0 395.75 0.25 395.85 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[121] + + PIN WENYB[122] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 398.63 0.25 398.73 ; + LAYER M2 ; + RECT 0 398.63 0.25 398.73 ; + LAYER M3 ; + RECT 0 398.63 0.25 398.73 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[122] + + PIN WENYB[123] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 401.51 0.25 401.61 ; + LAYER M2 ; + RECT 0 401.51 0.25 401.61 ; + LAYER M3 ; + RECT 0 401.51 0.25 401.61 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[123] + + PIN WENYB[124] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 404.39 0.25 404.49 ; + LAYER M2 ; + RECT 0 404.39 0.25 404.49 ; + LAYER M3 ; + RECT 0 404.39 0.25 404.49 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[124] + + PIN WENYB[125] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 407.27 0.25 407.37 ; + LAYER M2 ; + RECT 0 407.27 0.25 407.37 ; + LAYER M3 ; + RECT 0 407.27 0.25 407.37 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[125] + + PIN WENYB[126] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 410.15 0.25 410.25 ; + LAYER M2 ; + RECT 0 410.15 0.25 410.25 ; + LAYER M3 ; + RECT 0 410.15 0.25 410.25 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[126] + + PIN WENYB[127] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 413.03 0.25 413.13 ; + LAYER M2 ; + RECT 0 413.03 0.25 413.13 ; + LAYER M3 ; + RECT 0 413.03 0.25 413.13 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[127] + + PIN WENYB[12] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 36.29 0.25 36.39 ; + LAYER M2 ; + RECT 0 36.29 0.25 36.39 ; + LAYER M3 ; + RECT 0 36.29 0.25 36.39 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[12] + + PIN WENYB[13] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 39.17 0.25 39.27 ; + LAYER M2 ; + RECT 0 39.17 0.25 39.27 ; + LAYER M3 ; + RECT 0 39.17 0.25 39.27 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[13] + + PIN WENYB[14] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 42.05 0.25 42.15 ; + LAYER M2 ; + RECT 0 42.05 0.25 42.15 ; + LAYER M3 ; + RECT 0 42.05 0.25 42.15 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[14] + + PIN WENYB[15] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 44.93 0.25 45.03 ; + LAYER M2 ; + RECT 0 44.93 0.25 45.03 ; + LAYER M3 ; + RECT 0 44.93 0.25 45.03 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[15] + + PIN WENYB[16] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 47.81 0.25 47.91 ; + LAYER M2 ; + RECT 0 47.81 0.25 47.91 ; + LAYER M3 ; + RECT 0 47.81 0.25 47.91 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[16] + + PIN WENYB[17] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 50.69 0.25 50.79 ; + LAYER M2 ; + RECT 0 50.69 0.25 50.79 ; + LAYER M3 ; + RECT 0 50.69 0.25 50.79 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[17] + + PIN WENYB[18] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 53.57 0.25 53.67 ; + LAYER M2 ; + RECT 0 53.57 0.25 53.67 ; + LAYER M3 ; + RECT 0 53.57 0.25 53.67 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[18] + + PIN WENYB[19] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 56.45 0.25 56.55 ; + LAYER M2 ; + RECT 0 56.45 0.25 56.55 ; + LAYER M3 ; + RECT 0 56.45 0.25 56.55 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[19] + + PIN WENYB[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 4.61 0.25 4.71 ; + LAYER M2 ; + RECT 0 4.61 0.25 4.71 ; + LAYER M3 ; + RECT 0 4.61 0.25 4.71 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[1] + + PIN WENYB[20] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 59.33 0.25 59.43 ; + LAYER M2 ; + RECT 0 59.33 0.25 59.43 ; + LAYER M3 ; + RECT 0 59.33 0.25 59.43 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[20] + + PIN WENYB[21] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 62.21 0.25 62.31 ; + LAYER M2 ; + RECT 0 62.21 0.25 62.31 ; + LAYER M3 ; + RECT 0 62.21 0.25 62.31 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[21] + + PIN WENYB[22] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 65.09 0.25 65.19 ; + LAYER M2 ; + RECT 0 65.09 0.25 65.19 ; + LAYER M3 ; + RECT 0 65.09 0.25 65.19 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[22] + + PIN WENYB[23] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 67.97 0.25 68.07 ; + LAYER M2 ; + RECT 0 67.97 0.25 68.07 ; + LAYER M3 ; + RECT 0 67.97 0.25 68.07 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[23] + + PIN WENYB[24] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 70.85 0.25 70.95 ; + LAYER M2 ; + RECT 0 70.85 0.25 70.95 ; + LAYER M3 ; + RECT 0 70.85 0.25 70.95 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[24] + + PIN WENYB[25] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 73.73 0.25 73.83 ; + LAYER M2 ; + RECT 0 73.73 0.25 73.83 ; + LAYER M3 ; + RECT 0 73.73 0.25 73.83 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[25] + + PIN WENYB[26] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 76.61 0.25 76.71 ; + LAYER M2 ; + RECT 0 76.61 0.25 76.71 ; + LAYER M3 ; + RECT 0 76.61 0.25 76.71 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[26] + + PIN WENYB[27] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 79.49 0.25 79.59 ; + LAYER M2 ; + RECT 0 79.49 0.25 79.59 ; + LAYER M3 ; + RECT 0 79.49 0.25 79.59 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[27] + + PIN WENYB[28] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 82.37 0.25 82.47 ; + LAYER M2 ; + RECT 0 82.37 0.25 82.47 ; + LAYER M3 ; + RECT 0 82.37 0.25 82.47 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[28] + + PIN WENYB[29] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 85.25 0.25 85.35 ; + LAYER M2 ; + RECT 0 85.25 0.25 85.35 ; + LAYER M3 ; + RECT 0 85.25 0.25 85.35 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[29] + + PIN WENYB[2] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 7.49 0.25 7.59 ; + LAYER M2 ; + RECT 0 7.49 0.25 7.59 ; + LAYER M3 ; + RECT 0 7.49 0.25 7.59 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[2] + + PIN WENYB[30] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 88.13 0.25 88.23 ; + LAYER M2 ; + RECT 0 88.13 0.25 88.23 ; + LAYER M3 ; + RECT 0 88.13 0.25 88.23 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[30] + + PIN WENYB[31] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 91.01 0.25 91.11 ; + LAYER M2 ; + RECT 0 91.01 0.25 91.11 ; + LAYER M3 ; + RECT 0 91.01 0.25 91.11 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[31] + + PIN WENYB[32] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 93.89 0.25 93.99 ; + LAYER M2 ; + RECT 0 93.89 0.25 93.99 ; + LAYER M3 ; + RECT 0 93.89 0.25 93.99 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[32] + + PIN WENYB[33] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 96.77 0.25 96.87 ; + LAYER M2 ; + RECT 0 96.77 0.25 96.87 ; + LAYER M3 ; + RECT 0 96.77 0.25 96.87 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[33] + + PIN WENYB[34] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 99.65 0.25 99.75 ; + LAYER M2 ; + RECT 0 99.65 0.25 99.75 ; + LAYER M3 ; + RECT 0 99.65 0.25 99.75 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[34] + + PIN WENYB[35] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 102.53 0.25 102.63 ; + LAYER M2 ; + RECT 0 102.53 0.25 102.63 ; + LAYER M3 ; + RECT 0 102.53 0.25 102.63 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[35] + + PIN WENYB[36] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 105.41 0.25 105.51 ; + LAYER M2 ; + RECT 0 105.41 0.25 105.51 ; + LAYER M3 ; + RECT 0 105.41 0.25 105.51 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[36] + + PIN WENYB[37] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 108.29 0.25 108.39 ; + LAYER M2 ; + RECT 0 108.29 0.25 108.39 ; + LAYER M3 ; + RECT 0 108.29 0.25 108.39 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[37] + + PIN WENYB[38] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 111.17 0.25 111.27 ; + LAYER M2 ; + RECT 0 111.17 0.25 111.27 ; + LAYER M3 ; + RECT 0 111.17 0.25 111.27 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[38] + + PIN WENYB[39] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 114.05 0.25 114.15 ; + LAYER M2 ; + RECT 0 114.05 0.25 114.15 ; + LAYER M3 ; + RECT 0 114.05 0.25 114.15 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[39] + + PIN WENYB[3] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 10.37 0.25 10.47 ; + LAYER M2 ; + RECT 0 10.37 0.25 10.47 ; + LAYER M3 ; + RECT 0 10.37 0.25 10.47 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[3] + + PIN WENYB[40] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 116.93 0.25 117.03 ; + LAYER M2 ; + RECT 0 116.93 0.25 117.03 ; + LAYER M3 ; + RECT 0 116.93 0.25 117.03 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[40] + + PIN WENYB[41] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 119.81 0.25 119.91 ; + LAYER M2 ; + RECT 0 119.81 0.25 119.91 ; + LAYER M3 ; + RECT 0 119.81 0.25 119.91 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[41] + + PIN WENYB[42] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 122.69 0.25 122.79 ; + LAYER M2 ; + RECT 0 122.69 0.25 122.79 ; + LAYER M3 ; + RECT 0 122.69 0.25 122.79 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[42] + + PIN WENYB[43] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 125.57 0.25 125.67 ; + LAYER M2 ; + RECT 0 125.57 0.25 125.67 ; + LAYER M3 ; + RECT 0 125.57 0.25 125.67 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[43] + + PIN WENYB[44] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 128.45 0.25 128.55 ; + LAYER M2 ; + RECT 0 128.45 0.25 128.55 ; + LAYER M3 ; + RECT 0 128.45 0.25 128.55 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[44] + + PIN WENYB[45] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 131.33 0.25 131.43 ; + LAYER M2 ; + RECT 0 131.33 0.25 131.43 ; + LAYER M3 ; + RECT 0 131.33 0.25 131.43 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[45] + + PIN WENYB[46] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 134.21 0.25 134.31 ; + LAYER M2 ; + RECT 0 134.21 0.25 134.31 ; + LAYER M3 ; + RECT 0 134.21 0.25 134.31 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[46] + + PIN WENYB[47] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 137.09 0.25 137.19 ; + LAYER M2 ; + RECT 0 137.09 0.25 137.19 ; + LAYER M3 ; + RECT 0 137.09 0.25 137.19 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[47] + + PIN WENYB[48] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 139.97 0.25 140.07 ; + LAYER M2 ; + RECT 0 139.97 0.25 140.07 ; + LAYER M3 ; + RECT 0 139.97 0.25 140.07 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[48] + + PIN WENYB[49] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 142.85 0.25 142.95 ; + LAYER M2 ; + RECT 0 142.85 0.25 142.95 ; + LAYER M3 ; + RECT 0 142.85 0.25 142.95 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[49] + + PIN WENYB[4] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 13.25 0.25 13.35 ; + LAYER M2 ; + RECT 0 13.25 0.25 13.35 ; + LAYER M3 ; + RECT 0 13.25 0.25 13.35 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[4] + + PIN WENYB[50] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 145.73 0.25 145.83 ; + LAYER M2 ; + RECT 0 145.73 0.25 145.83 ; + LAYER M3 ; + RECT 0 145.73 0.25 145.83 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[50] + + PIN WENYB[51] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 148.61 0.25 148.71 ; + LAYER M2 ; + RECT 0 148.61 0.25 148.71 ; + LAYER M3 ; + RECT 0 148.61 0.25 148.71 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[51] + + PIN WENYB[52] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 151.49 0.25 151.59 ; + LAYER M2 ; + RECT 0 151.49 0.25 151.59 ; + LAYER M3 ; + RECT 0 151.49 0.25 151.59 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[52] + + PIN WENYB[53] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 154.37 0.25 154.47 ; + LAYER M2 ; + RECT 0 154.37 0.25 154.47 ; + LAYER M3 ; + RECT 0 154.37 0.25 154.47 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[53] + + PIN WENYB[54] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 157.25 0.25 157.35 ; + LAYER M2 ; + RECT 0 157.25 0.25 157.35 ; + LAYER M3 ; + RECT 0 157.25 0.25 157.35 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[54] + + PIN WENYB[55] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 160.13 0.25 160.23 ; + LAYER M2 ; + RECT 0 160.13 0.25 160.23 ; + LAYER M3 ; + RECT 0 160.13 0.25 160.23 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[55] + + PIN WENYB[56] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 163.01 0.25 163.11 ; + LAYER M2 ; + RECT 0 163.01 0.25 163.11 ; + LAYER M3 ; + RECT 0 163.01 0.25 163.11 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[56] + + PIN WENYB[57] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 165.89 0.25 165.99 ; + LAYER M2 ; + RECT 0 165.89 0.25 165.99 ; + LAYER M3 ; + RECT 0 165.89 0.25 165.99 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[57] + + PIN WENYB[58] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 168.77 0.25 168.87 ; + LAYER M2 ; + RECT 0 168.77 0.25 168.87 ; + LAYER M3 ; + RECT 0 168.77 0.25 168.87 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[58] + + PIN WENYB[59] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 171.65 0.25 171.75 ; + LAYER M2 ; + RECT 0 171.65 0.25 171.75 ; + LAYER M3 ; + RECT 0 171.65 0.25 171.75 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[59] + + PIN WENYB[5] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 16.13 0.25 16.23 ; + LAYER M2 ; + RECT 0 16.13 0.25 16.23 ; + LAYER M3 ; + RECT 0 16.13 0.25 16.23 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[5] + + PIN WENYB[60] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 174.53 0.25 174.63 ; + LAYER M2 ; + RECT 0 174.53 0.25 174.63 ; + LAYER M3 ; + RECT 0 174.53 0.25 174.63 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[60] + + PIN WENYB[61] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 177.41 0.25 177.51 ; + LAYER M2 ; + RECT 0 177.41 0.25 177.51 ; + LAYER M3 ; + RECT 0 177.41 0.25 177.51 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[61] + + PIN WENYB[62] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 180.29 0.25 180.39 ; + LAYER M2 ; + RECT 0 180.29 0.25 180.39 ; + LAYER M3 ; + RECT 0 180.29 0.25 180.39 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[62] + + PIN WENYB[63] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 183.17 0.25 183.27 ; + LAYER M2 ; + RECT 0 183.17 0.25 183.27 ; + LAYER M3 ; + RECT 0 183.17 0.25 183.27 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[63] + + PIN WENYB[64] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 231.59 0.25 231.69 ; + LAYER M2 ; + RECT 0 231.59 0.25 231.69 ; + LAYER M3 ; + RECT 0 231.59 0.25 231.69 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[64] + + PIN WENYB[65] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 234.47 0.25 234.57 ; + LAYER M2 ; + RECT 0 234.47 0.25 234.57 ; + LAYER M3 ; + RECT 0 234.47 0.25 234.57 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[65] + + PIN WENYB[66] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 237.35 0.25 237.45 ; + LAYER M2 ; + RECT 0 237.35 0.25 237.45 ; + LAYER M3 ; + RECT 0 237.35 0.25 237.45 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[66] + + PIN WENYB[67] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 240.23 0.25 240.33 ; + LAYER M2 ; + RECT 0 240.23 0.25 240.33 ; + LAYER M3 ; + RECT 0 240.23 0.25 240.33 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[67] + + PIN WENYB[68] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 243.11 0.25 243.21 ; + LAYER M2 ; + RECT 0 243.11 0.25 243.21 ; + LAYER M3 ; + RECT 0 243.11 0.25 243.21 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[68] + + PIN WENYB[69] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 245.99 0.25 246.09 ; + LAYER M2 ; + RECT 0 245.99 0.25 246.09 ; + LAYER M3 ; + RECT 0 245.99 0.25 246.09 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[69] + + PIN WENYB[6] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 19.01 0.25 19.11 ; + LAYER M2 ; + RECT 0 19.01 0.25 19.11 ; + LAYER M3 ; + RECT 0 19.01 0.25 19.11 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[6] + + PIN WENYB[70] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 248.87 0.25 248.97 ; + LAYER M2 ; + RECT 0 248.87 0.25 248.97 ; + LAYER M3 ; + RECT 0 248.87 0.25 248.97 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[70] + + PIN WENYB[71] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 251.75 0.25 251.85 ; + LAYER M2 ; + RECT 0 251.75 0.25 251.85 ; + LAYER M3 ; + RECT 0 251.75 0.25 251.85 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[71] + + PIN WENYB[72] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 254.63 0.25 254.73 ; + LAYER M2 ; + RECT 0 254.63 0.25 254.73 ; + LAYER M3 ; + RECT 0 254.63 0.25 254.73 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[72] + + PIN WENYB[73] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 257.51 0.25 257.61 ; + LAYER M2 ; + RECT 0 257.51 0.25 257.61 ; + LAYER M3 ; + RECT 0 257.51 0.25 257.61 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[73] + + PIN WENYB[74] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 260.39 0.25 260.49 ; + LAYER M2 ; + RECT 0 260.39 0.25 260.49 ; + LAYER M3 ; + RECT 0 260.39 0.25 260.49 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[74] + + PIN WENYB[75] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 263.27 0.25 263.37 ; + LAYER M2 ; + RECT 0 263.27 0.25 263.37 ; + LAYER M3 ; + RECT 0 263.27 0.25 263.37 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[75] + + PIN WENYB[76] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 266.15 0.25 266.25 ; + LAYER M2 ; + RECT 0 266.15 0.25 266.25 ; + LAYER M3 ; + RECT 0 266.15 0.25 266.25 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[76] + + PIN WENYB[77] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 269.03 0.25 269.13 ; + LAYER M2 ; + RECT 0 269.03 0.25 269.13 ; + LAYER M3 ; + RECT 0 269.03 0.25 269.13 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[77] + + PIN WENYB[78] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 271.91 0.25 272.01 ; + LAYER M2 ; + RECT 0 271.91 0.25 272.01 ; + LAYER M3 ; + RECT 0 271.91 0.25 272.01 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[78] + + PIN WENYB[79] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 274.79 0.25 274.89 ; + LAYER M2 ; + RECT 0 274.79 0.25 274.89 ; + LAYER M3 ; + RECT 0 274.79 0.25 274.89 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[79] + + PIN WENYB[7] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 21.89 0.25 21.99 ; + LAYER M2 ; + RECT 0 21.89 0.25 21.99 ; + LAYER M3 ; + RECT 0 21.89 0.25 21.99 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[7] + + PIN WENYB[80] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 277.67 0.25 277.77 ; + LAYER M2 ; + RECT 0 277.67 0.25 277.77 ; + LAYER M3 ; + RECT 0 277.67 0.25 277.77 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[80] + + PIN WENYB[81] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 280.55 0.25 280.65 ; + LAYER M2 ; + RECT 0 280.55 0.25 280.65 ; + LAYER M3 ; + RECT 0 280.55 0.25 280.65 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[81] + + PIN WENYB[82] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 283.43 0.25 283.53 ; + LAYER M2 ; + RECT 0 283.43 0.25 283.53 ; + LAYER M3 ; + RECT 0 283.43 0.25 283.53 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[82] + + PIN WENYB[83] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 286.31 0.25 286.41 ; + LAYER M2 ; + RECT 0 286.31 0.25 286.41 ; + LAYER M3 ; + RECT 0 286.31 0.25 286.41 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[83] + + PIN WENYB[84] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 289.19 0.25 289.29 ; + LAYER M2 ; + RECT 0 289.19 0.25 289.29 ; + LAYER M3 ; + RECT 0 289.19 0.25 289.29 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[84] + + PIN WENYB[85] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 292.07 0.25 292.17 ; + LAYER M2 ; + RECT 0 292.07 0.25 292.17 ; + LAYER M3 ; + RECT 0 292.07 0.25 292.17 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[85] + + PIN WENYB[86] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 294.95 0.25 295.05 ; + LAYER M2 ; + RECT 0 294.95 0.25 295.05 ; + LAYER M3 ; + RECT 0 294.95 0.25 295.05 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[86] + + PIN WENYB[87] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 297.83 0.25 297.93 ; + LAYER M2 ; + RECT 0 297.83 0.25 297.93 ; + LAYER M3 ; + RECT 0 297.83 0.25 297.93 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[87] + + PIN WENYB[88] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 300.71 0.25 300.81 ; + LAYER M2 ; + RECT 0 300.71 0.25 300.81 ; + LAYER M3 ; + RECT 0 300.71 0.25 300.81 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[88] + + PIN WENYB[89] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 303.59 0.25 303.69 ; + LAYER M2 ; + RECT 0 303.59 0.25 303.69 ; + LAYER M3 ; + RECT 0 303.59 0.25 303.69 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[89] + + PIN WENYB[8] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 24.77 0.25 24.87 ; + LAYER M2 ; + RECT 0 24.77 0.25 24.87 ; + LAYER M3 ; + RECT 0 24.77 0.25 24.87 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[8] + + PIN WENYB[90] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 306.47 0.25 306.57 ; + LAYER M2 ; + RECT 0 306.47 0.25 306.57 ; + LAYER M3 ; + RECT 0 306.47 0.25 306.57 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[90] + + PIN WENYB[91] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 309.35 0.25 309.45 ; + LAYER M2 ; + RECT 0 309.35 0.25 309.45 ; + LAYER M3 ; + RECT 0 309.35 0.25 309.45 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[91] + + PIN WENYB[92] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 312.23 0.25 312.33 ; + LAYER M2 ; + RECT 0 312.23 0.25 312.33 ; + LAYER M3 ; + RECT 0 312.23 0.25 312.33 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[92] + + PIN WENYB[93] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 315.11 0.25 315.21 ; + LAYER M2 ; + RECT 0 315.11 0.25 315.21 ; + LAYER M3 ; + RECT 0 315.11 0.25 315.21 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[93] + + PIN WENYB[94] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 317.99 0.25 318.09 ; + LAYER M2 ; + RECT 0 317.99 0.25 318.09 ; + LAYER M3 ; + RECT 0 317.99 0.25 318.09 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[94] + + PIN WENYB[95] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 320.87 0.25 320.97 ; + LAYER M2 ; + RECT 0 320.87 0.25 320.97 ; + LAYER M3 ; + RECT 0 320.87 0.25 320.97 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[95] + + PIN WENYB[96] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 323.75 0.25 323.85 ; + LAYER M2 ; + RECT 0 323.75 0.25 323.85 ; + LAYER M3 ; + RECT 0 323.75 0.25 323.85 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[96] + + PIN WENYB[97] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 326.63 0.25 326.73 ; + LAYER M2 ; + RECT 0 326.63 0.25 326.73 ; + LAYER M3 ; + RECT 0 326.63 0.25 326.73 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[97] + + PIN WENYB[98] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 329.51 0.25 329.61 ; + LAYER M2 ; + RECT 0 329.51 0.25 329.61 ; + LAYER M3 ; + RECT 0 329.51 0.25 329.61 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[98] + + PIN WENYB[99] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 332.39 0.25 332.49 ; + LAYER M2 ; + RECT 0 332.39 0.25 332.49 ; + LAYER M3 ; + RECT 0 332.39 0.25 332.49 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[99] + + PIN WENYB[9] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 27.65 0.25 27.75 ; + LAYER M2 ; + RECT 0 27.65 0.25 27.75 ; + LAYER M3 ; + RECT 0 27.65 0.25 27.75 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END WENYB[9] + + OBS + LAYER M1 DESIGNRULEWIDTH 0.165 ; + RECT 0.32 0.35 20.845 414.51 ; + RECT 0 0.56 0.32 1.365 ; + RECT 0 2.655 0.32 3.16 ; + RECT 0 3.46 0.32 4.245 ; + RECT 0 5.535 0.32 6.04 ; + RECT 0 6.34 0.32 7.125 ; + RECT 0 8.415 0.32 8.92 ; + RECT 0 9.22 0.32 10.005 ; + RECT 0 11.295 0.32 11.8 ; + RECT 0 12.1 0.32 12.885 ; + RECT 0 14.175 0.32 14.68 ; + RECT 0 14.98 0.32 15.765 ; + RECT 0 17.055 0.32 17.56 ; + RECT 0 17.86 0.32 18.645 ; + RECT 0 19.935 0.32 20.44 ; + RECT 0 20.74 0.32 21.525 ; + RECT 0 22.815 0.32 23.32 ; + RECT 0 23.62 0.32 24.405 ; + RECT 0 25.695 0.32 26.2 ; + RECT 0 26.5 0.32 27.285 ; + RECT 0 28.575 0.32 29.08 ; + RECT 0 29.38 0.32 30.165 ; + RECT 0 31.455 0.32 31.96 ; + RECT 0 32.26 0.32 33.045 ; + RECT 0 34.335 0.32 34.84 ; + RECT 0 35.14 0.32 35.925 ; + RECT 0 37.215 0.32 37.72 ; + RECT 0 38.02 0.32 38.805 ; + RECT 0 40.095 0.32 40.6 ; + RECT 0 40.9 0.32 41.685 ; + RECT 0 42.975 0.32 43.48 ; + RECT 0 43.78 0.32 44.565 ; + RECT 0 45.855 0.32 46.36 ; + RECT 0 46.66 0.32 47.445 ; + RECT 0 48.735 0.32 49.24 ; + RECT 0 49.54 0.32 50.325 ; + RECT 0 51.615 0.32 52.12 ; + RECT 0 52.42 0.32 53.205 ; + RECT 0 54.495 0.32 55 ; + RECT 0 55.3 0.32 56.085 ; + RECT 0 57.375 0.32 57.88 ; + RECT 0 58.18 0.32 58.965 ; + RECT 0 60.255 0.32 60.76 ; + RECT 0 61.06 0.32 61.845 ; + RECT 0 63.135 0.32 63.64 ; + RECT 0 63.94 0.32 64.725 ; + RECT 0 66.015 0.32 66.52 ; + RECT 0 66.82 0.32 67.605 ; + RECT 0 68.895 0.32 69.4 ; + RECT 0 69.7 0.32 70.485 ; + RECT 0 71.775 0.32 72.28 ; + RECT 0 72.58 0.32 73.365 ; + RECT 0 74.655 0.32 75.16 ; + RECT 0 75.46 0.32 76.245 ; + RECT 0 77.535 0.32 78.04 ; + RECT 0 78.34 0.32 79.125 ; + RECT 0 80.415 0.32 80.92 ; + RECT 0 81.22 0.32 82.005 ; + RECT 0 83.295 0.32 83.8 ; + RECT 0 84.1 0.32 84.885 ; + RECT 0 86.175 0.32 86.68 ; + RECT 0 86.98 0.32 87.765 ; + RECT 0 89.055 0.32 89.56 ; + RECT 0 89.86 0.32 90.645 ; + RECT 0 91.935 0.32 92.44 ; + RECT 0 92.74 0.32 93.525 ; + RECT 0 94.815 0.32 95.32 ; + RECT 0 95.62 0.32 96.405 ; + RECT 0 97.695 0.32 98.2 ; + RECT 0 98.5 0.32 99.285 ; + RECT 0 100.575 0.32 101.08 ; + RECT 0 101.38 0.32 102.165 ; + RECT 0 103.455 0.32 103.96 ; + RECT 0 104.26 0.32 105.045 ; + RECT 0 106.335 0.32 106.84 ; + RECT 0 107.14 0.32 107.925 ; + RECT 0 109.215 0.32 109.72 ; + RECT 0 110.02 0.32 110.805 ; + RECT 0 112.095 0.32 112.6 ; + RECT 0 112.9 0.32 113.685 ; + RECT 0 114.975 0.32 115.48 ; + RECT 0 115.78 0.32 116.565 ; + RECT 0 117.855 0.32 118.36 ; + RECT 0 118.66 0.32 119.445 ; + RECT 0 120.735 0.32 121.24 ; + RECT 0 121.54 0.32 122.325 ; + RECT 0 123.615 0.32 124.12 ; + RECT 0 124.42 0.32 125.205 ; + RECT 0 126.495 0.32 127 ; + RECT 0 127.3 0.32 128.085 ; + RECT 0 129.375 0.32 129.88 ; + RECT 0 130.18 0.32 130.965 ; + RECT 0 132.255 0.32 132.76 ; + RECT 0 133.06 0.32 133.845 ; + RECT 0 135.135 0.32 135.64 ; + RECT 0 135.94 0.32 136.725 ; + RECT 0 138.015 0.32 138.52 ; + RECT 0 138.82 0.32 139.605 ; + RECT 0 140.895 0.32 141.4 ; + RECT 0 141.7 0.32 142.485 ; + RECT 0 143.775 0.32 144.28 ; + RECT 0 144.58 0.32 145.365 ; + RECT 0 146.655 0.32 147.16 ; + RECT 0 147.46 0.32 148.245 ; + RECT 0 149.535 0.32 150.04 ; + RECT 0 150.34 0.32 151.125 ; + RECT 0 152.415 0.32 152.92 ; + RECT 0 153.22 0.32 154.005 ; + RECT 0 155.295 0.32 155.8 ; + RECT 0 156.1 0.32 156.885 ; + RECT 0 158.175 0.32 158.68 ; + RECT 0 158.98 0.32 159.765 ; + RECT 0 161.055 0.32 161.56 ; + RECT 0 161.86 0.32 162.645 ; + RECT 0 163.935 0.32 164.44 ; + RECT 0 164.74 0.32 165.525 ; + RECT 0 166.815 0.32 167.32 ; + RECT 0 167.62 0.32 168.405 ; + RECT 0 169.695 0.32 170.2 ; + RECT 0 170.5 0.32 171.285 ; + RECT 0 172.575 0.32 173.08 ; + RECT 0 173.38 0.32 174.165 ; + RECT 0 175.455 0.32 175.96 ; + RECT 0 176.26 0.32 177.045 ; + RECT 0 178.335 0.32 178.84 ; + RECT 0 179.14 0.32 179.925 ; + RECT 0 181.215 0.32 181.72 ; + RECT 0 182.02 0.32 182.805 ; + RECT 0 184.095 0.32 184.6 ; + RECT 0 184.9 0.32 187 ; + RECT 0 187.3 0.32 187.35 ; + RECT 0 187.65 0.32 188.01 ; + RECT 0 188.71 0.32 190.35 ; + RECT 0 190.955 0.32 191.17 ; + RECT 0 191.47 0.32 191.575 ; + RECT 0 191.875 0.32 193.685 ; + RECT 0 193.985 0.32 194.2 ; + RECT 0 194.5 0.32 194.605 ; + RECT 0 194.905 0.32 196.745 ; + RECT 0 197.045 0.32 197.23 ; + RECT 0 197.53 0.32 197.635 ; + RECT 0 197.935 0.32 198.03 ; + RECT 0 198.33 0.32 198.4 ; + RECT 0 198.7 0.32 198.775 ; + RECT 0 199.075 0.32 199.26 ; + RECT 0 199.97 0.32 201.405 ; + RECT 0 202.105 0.32 202.29 ; + RECT 0 202.875 0.32 205.8 ; + RECT 0 206.5 0.32 206.97 ; + RECT 0 207.27 0.32 208.635 ; + RECT 0 208.935 0.32 212.725 ; + RECT 0 213.26 0.32 213.45 ; + RECT 0 213.75 0.32 213.825 ; + RECT 0 214.125 0.32 214.205 ; + RECT 0 214.505 0.32 215.205 ; + RECT 0 215.505 0.32 215.995 ; + RECT 0 216.295 0.32 216.48 ; + RECT 0 216.78 0.32 216.885 ; + RECT 0 217.185 0.32 217.65 ; + RECT 0 217.95 0.32 218.025 ; + RECT 0 218.325 0.32 218.48 ; + RECT 0 218.98 0.32 220.225 ; + RECT 0 220.525 0.32 220.65 ; + RECT 0 221.16 0.32 221.54 ; + RECT 0 221.84 0.32 223.68 ; + RECT 0 223.98 0.32 224.085 ; + RECT 0 224.385 0.32 224.57 ; + RECT 0 225.125 0.32 225.6 ; + RECT 0 225.9 0.32 228.21 ; + RECT 0 228.51 0.32 228.605 ; + RECT 0 228.905 0.32 229.15 ; + RECT 0 229.45 0.32 229.96 ; + RECT 0 230.26 0.32 230.765 ; + RECT 0 232.055 0.32 232.84 ; + RECT 0 233.14 0.32 233.645 ; + RECT 0 234.935 0.32 235.72 ; + RECT 0 236.02 0.32 236.525 ; + RECT 0 237.815 0.32 238.6 ; + RECT 0 238.9 0.32 239.405 ; + RECT 0 240.695 0.32 241.48 ; + RECT 0 241.78 0.32 242.285 ; + RECT 0 243.575 0.32 244.36 ; + RECT 0 244.66 0.32 245.165 ; + RECT 0 246.455 0.32 247.24 ; + RECT 0 247.54 0.32 248.045 ; + RECT 0 249.335 0.32 250.12 ; + RECT 0 250.42 0.32 250.925 ; + RECT 0 252.215 0.32 253 ; + RECT 0 253.3 0.32 253.805 ; + RECT 0 255.095 0.32 255.88 ; + RECT 0 256.18 0.32 256.685 ; + RECT 0 257.975 0.32 258.76 ; + RECT 0 259.06 0.32 259.565 ; + RECT 0 260.855 0.32 261.64 ; + RECT 0 261.94 0.32 262.445 ; + RECT 0 263.735 0.32 264.52 ; + RECT 0 264.82 0.32 265.325 ; + RECT 0 266.615 0.32 267.4 ; + RECT 0 267.7 0.32 268.205 ; + RECT 0 269.495 0.32 270.28 ; + RECT 0 270.58 0.32 271.085 ; + RECT 0 272.375 0.32 273.16 ; + RECT 0 273.46 0.32 273.965 ; + RECT 0 275.255 0.32 276.04 ; + RECT 0 276.34 0.32 276.845 ; + RECT 0 278.135 0.32 278.92 ; + RECT 0 279.22 0.32 279.725 ; + RECT 0 281.015 0.32 281.8 ; + RECT 0 282.1 0.32 282.605 ; + RECT 0 283.895 0.32 284.68 ; + RECT 0 284.98 0.32 285.485 ; + RECT 0 286.775 0.32 287.56 ; + RECT 0 287.86 0.32 288.365 ; + RECT 0 289.655 0.32 290.44 ; + RECT 0 290.74 0.32 291.245 ; + RECT 0 292.535 0.32 293.32 ; + RECT 0 293.62 0.32 294.125 ; + RECT 0 295.415 0.32 296.2 ; + RECT 0 296.5 0.32 297.005 ; + RECT 0 298.295 0.32 299.08 ; + RECT 0 299.38 0.32 299.885 ; + RECT 0 301.175 0.32 301.96 ; + RECT 0 302.26 0.32 302.765 ; + RECT 0 304.055 0.32 304.84 ; + RECT 0 305.14 0.32 305.645 ; + RECT 0 306.935 0.32 307.72 ; + RECT 0 308.02 0.32 308.525 ; + RECT 0 309.815 0.32 310.6 ; + RECT 0 310.9 0.32 311.405 ; + RECT 0 312.695 0.32 313.48 ; + RECT 0 313.78 0.32 314.285 ; + RECT 0 315.575 0.32 316.36 ; + RECT 0 316.66 0.32 317.165 ; + RECT 0 318.455 0.32 319.24 ; + RECT 0 319.54 0.32 320.045 ; + RECT 0 321.335 0.32 322.12 ; + RECT 0 322.42 0.32 322.925 ; + RECT 0 324.215 0.32 325 ; + RECT 0 325.3 0.32 325.805 ; + RECT 0 327.095 0.32 327.88 ; + RECT 0 328.18 0.32 328.685 ; + RECT 0 329.975 0.32 330.76 ; + RECT 0 331.06 0.32 331.565 ; + RECT 0 332.855 0.32 333.64 ; + RECT 0 333.94 0.32 334.445 ; + RECT 0 335.735 0.32 336.52 ; + RECT 0 336.82 0.32 337.325 ; + RECT 0 338.615 0.32 339.4 ; + RECT 0 339.7 0.32 340.205 ; + RECT 0 341.495 0.32 342.28 ; + RECT 0 342.58 0.32 343.085 ; + RECT 0 344.375 0.32 345.16 ; + RECT 0 345.46 0.32 345.965 ; + RECT 0 347.255 0.32 348.04 ; + RECT 0 348.34 0.32 348.845 ; + RECT 0 350.135 0.32 350.92 ; + RECT 0 351.22 0.32 351.725 ; + RECT 0 353.015 0.32 353.8 ; + RECT 0 354.1 0.32 354.605 ; + RECT 0 355.895 0.32 356.68 ; + RECT 0 356.98 0.32 357.485 ; + RECT 0 358.775 0.32 359.56 ; + RECT 0 359.86 0.32 360.365 ; + RECT 0 361.655 0.32 362.44 ; + RECT 0 362.74 0.32 363.245 ; + RECT 0 364.535 0.32 365.32 ; + RECT 0 365.62 0.32 366.125 ; + RECT 0 367.415 0.32 368.2 ; + RECT 0 368.5 0.32 369.005 ; + RECT 0 370.295 0.32 371.08 ; + RECT 0 371.38 0.32 371.885 ; + RECT 0 373.175 0.32 373.96 ; + RECT 0 374.26 0.32 374.765 ; + RECT 0 376.055 0.32 376.84 ; + RECT 0 377.14 0.32 377.645 ; + RECT 0 378.935 0.32 379.72 ; + RECT 0 380.02 0.32 380.525 ; + RECT 0 381.815 0.32 382.6 ; + RECT 0 382.9 0.32 383.405 ; + RECT 0 384.695 0.32 385.48 ; + RECT 0 385.78 0.32 386.285 ; + RECT 0 387.575 0.32 388.36 ; + RECT 0 388.66 0.32 389.165 ; + RECT 0 390.455 0.32 391.24 ; + RECT 0 391.54 0.32 392.045 ; + RECT 0 393.335 0.32 394.12 ; + RECT 0 394.42 0.32 394.925 ; + RECT 0 396.215 0.32 397 ; + RECT 0 397.3 0.32 397.805 ; + RECT 0 399.095 0.32 399.88 ; + RECT 0 400.18 0.32 400.685 ; + RECT 0 401.975 0.32 402.76 ; + RECT 0 403.06 0.32 403.565 ; + RECT 0 404.855 0.32 405.64 ; + RECT 0 405.94 0.32 406.445 ; + RECT 0 407.735 0.32 408.52 ; + RECT 0 408.82 0.32 409.325 ; + RECT 0 410.615 0.32 411.4 ; + RECT 0 411.7 0.32 412.205 ; + RECT 0 413.495 0.32 414.3 ; + RECT 20.845 0 21.165 414.86 ; + RECT 0.32 0 20.845 0.35 ; + RECT 0.32 414.51 20.845 414.86 ; + LAYER M2 DESIGNRULEWIDTH 0.165 ; + RECT 0.32 0.35 20.845 414.51 ; + RECT 0 0.56 0.32 1.365 ; + RECT 0 2.655 0.32 3.16 ; + RECT 0 3.46 0.32 4.245 ; + RECT 0 5.535 0.32 6.04 ; + RECT 0 6.34 0.32 7.125 ; + RECT 0 8.415 0.32 8.92 ; + RECT 0 9.22 0.32 10.005 ; + RECT 0 11.295 0.32 11.8 ; + RECT 0 12.1 0.32 12.885 ; + RECT 0 14.175 0.32 14.68 ; + RECT 0 14.98 0.32 15.765 ; + RECT 0 17.055 0.32 17.56 ; + RECT 0 17.86 0.32 18.645 ; + RECT 0 19.935 0.32 20.44 ; + RECT 0 20.74 0.32 21.525 ; + RECT 0 22.815 0.32 23.32 ; + RECT 0 23.62 0.32 24.405 ; + RECT 0 25.695 0.32 26.2 ; + RECT 0 26.5 0.32 27.285 ; + RECT 0 28.575 0.32 29.08 ; + RECT 0 29.38 0.32 30.165 ; + RECT 0 31.455 0.32 31.96 ; + RECT 0 32.26 0.32 33.045 ; + RECT 0 34.335 0.32 34.84 ; + RECT 0 35.14 0.32 35.925 ; + RECT 0 37.215 0.32 37.72 ; + RECT 0 38.02 0.32 38.805 ; + RECT 0 40.095 0.32 40.6 ; + RECT 0 40.9 0.32 41.685 ; + RECT 0 42.975 0.32 43.48 ; + RECT 0 43.78 0.32 44.565 ; + RECT 0 45.855 0.32 46.36 ; + RECT 0 46.66 0.32 47.445 ; + RECT 0 48.735 0.32 49.24 ; + RECT 0 49.54 0.32 50.325 ; + RECT 0 51.615 0.32 52.12 ; + RECT 0 52.42 0.32 53.205 ; + RECT 0 54.495 0.32 55 ; + RECT 0 55.3 0.32 56.085 ; + RECT 0 57.375 0.32 57.88 ; + RECT 0 58.18 0.32 58.965 ; + RECT 0 60.255 0.32 60.76 ; + RECT 0 61.06 0.32 61.845 ; + RECT 0 63.135 0.32 63.64 ; + RECT 0 63.94 0.32 64.725 ; + RECT 0 66.015 0.32 66.52 ; + RECT 0 66.82 0.32 67.605 ; + RECT 0 68.895 0.32 69.4 ; + RECT 0 69.7 0.32 70.485 ; + RECT 0 71.775 0.32 72.28 ; + RECT 0 72.58 0.32 73.365 ; + RECT 0 74.655 0.32 75.16 ; + RECT 0 75.46 0.32 76.245 ; + RECT 0 77.535 0.32 78.04 ; + RECT 0 78.34 0.32 79.125 ; + RECT 0 80.415 0.32 80.92 ; + RECT 0 81.22 0.32 82.005 ; + RECT 0 83.295 0.32 83.8 ; + RECT 0 84.1 0.32 84.885 ; + RECT 0 86.175 0.32 86.68 ; + RECT 0 86.98 0.32 87.765 ; + RECT 0 89.055 0.32 89.56 ; + RECT 0 89.86 0.32 90.645 ; + RECT 0 91.935 0.32 92.44 ; + RECT 0 92.74 0.32 93.525 ; + RECT 0 94.815 0.32 95.32 ; + RECT 0 95.62 0.32 96.405 ; + RECT 0 97.695 0.32 98.2 ; + RECT 0 98.5 0.32 99.285 ; + RECT 0 100.575 0.32 101.08 ; + RECT 0 101.38 0.32 102.165 ; + RECT 0 103.455 0.32 103.96 ; + RECT 0 104.26 0.32 105.045 ; + RECT 0 106.335 0.32 106.84 ; + RECT 0 107.14 0.32 107.925 ; + RECT 0 109.215 0.32 109.72 ; + RECT 0 110.02 0.32 110.805 ; + RECT 0 112.095 0.32 112.6 ; + RECT 0 112.9 0.32 113.685 ; + RECT 0 114.975 0.32 115.48 ; + RECT 0 115.78 0.32 116.565 ; + RECT 0 117.855 0.32 118.36 ; + RECT 0 118.66 0.32 119.445 ; + RECT 0 120.735 0.32 121.24 ; + RECT 0 121.54 0.32 122.325 ; + RECT 0 123.615 0.32 124.12 ; + RECT 0 124.42 0.32 125.205 ; + RECT 0 126.495 0.32 127 ; + RECT 0 127.3 0.32 128.085 ; + RECT 0 129.375 0.32 129.88 ; + RECT 0 130.18 0.32 130.965 ; + RECT 0 132.255 0.32 132.76 ; + RECT 0 133.06 0.32 133.845 ; + RECT 0 135.135 0.32 135.64 ; + RECT 0 135.94 0.32 136.725 ; + RECT 0 138.015 0.32 138.52 ; + RECT 0 138.82 0.32 139.605 ; + RECT 0 140.895 0.32 141.4 ; + RECT 0 141.7 0.32 142.485 ; + RECT 0 143.775 0.32 144.28 ; + RECT 0 144.58 0.32 145.365 ; + RECT 0 146.655 0.32 147.16 ; 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+ RECT 0 193.985 0.32 194.2 ; + RECT 0 194.5 0.32 194.605 ; + RECT 0 194.905 0.32 196.745 ; + RECT 0 197.045 0.32 197.23 ; + RECT 0 197.53 0.32 197.635 ; + RECT 0 197.935 0.32 198.03 ; + RECT 0 198.33 0.32 198.4 ; + RECT 0 198.7 0.32 198.775 ; + RECT 0 199.075 0.32 199.26 ; + RECT 0 199.97 0.32 201.405 ; + RECT 0 202.105 0.32 202.29 ; + RECT 0 202.875 0.32 205.8 ; + RECT 0 206.5 0.32 206.97 ; + RECT 0 207.27 0.32 208.635 ; + RECT 0 208.935 0.32 212.725 ; + RECT 0 213.26 0.32 213.45 ; + RECT 0 213.75 0.32 213.825 ; + RECT 0 214.125 0.32 214.205 ; + RECT 0 214.505 0.32 215.205 ; + RECT 0 215.505 0.32 215.995 ; + RECT 0 216.295 0.32 216.48 ; + RECT 0 216.78 0.32 216.885 ; + RECT 0 217.185 0.32 217.65 ; + RECT 0 217.95 0.32 218.025 ; + RECT 0 218.325 0.32 218.48 ; + RECT 0 218.98 0.32 220.225 ; + RECT 0 220.525 0.32 220.65 ; + RECT 0 221.16 0.32 221.54 ; + RECT 0 221.84 0.32 223.68 ; + RECT 0 223.98 0.32 224.085 ; + RECT 0 224.385 0.32 224.57 ; + RECT 0 225.125 0.32 225.6 ; + RECT 0 225.9 0.32 228.21 ; + RECT 0 228.51 0.32 228.605 ; + RECT 0 228.905 0.32 229.15 ; + RECT 0 229.45 0.32 229.96 ; + RECT 0 230.26 0.32 230.765 ; + RECT 0 232.055 0.32 232.84 ; + RECT 0 233.14 0.32 233.645 ; + RECT 0 234.935 0.32 235.72 ; + RECT 0 236.02 0.32 236.525 ; + RECT 0 237.815 0.32 238.6 ; + RECT 0 238.9 0.32 239.405 ; + RECT 0 240.695 0.32 241.48 ; + RECT 0 241.78 0.32 242.285 ; + RECT 0 243.575 0.32 244.36 ; + RECT 0 244.66 0.32 245.165 ; + RECT 0 246.455 0.32 247.24 ; + RECT 0 247.54 0.32 248.045 ; + RECT 0 249.335 0.32 250.12 ; + RECT 0 250.42 0.32 250.925 ; + RECT 0 252.215 0.32 253 ; + RECT 0 253.3 0.32 253.805 ; + RECT 0 255.095 0.32 255.88 ; + RECT 0 256.18 0.32 256.685 ; + RECT 0 257.975 0.32 258.76 ; + RECT 0 259.06 0.32 259.565 ; + RECT 0 260.855 0.32 261.64 ; + RECT 0 261.94 0.32 262.445 ; + RECT 0 263.735 0.32 264.52 ; + RECT 0 264.82 0.32 265.325 ; + RECT 0 266.615 0.32 267.4 ; + RECT 0 267.7 0.32 268.205 ; + RECT 0 269.495 0.32 270.28 ; + RECT 0 270.58 0.32 271.085 ; + RECT 0 272.375 0.32 273.16 ; + RECT 0 273.46 0.32 273.965 ; + RECT 0 275.255 0.32 276.04 ; + RECT 0 276.34 0.32 276.845 ; + RECT 0 278.135 0.32 278.92 ; + RECT 0 279.22 0.32 279.725 ; + RECT 0 281.015 0.32 281.8 ; + RECT 0 282.1 0.32 282.605 ; + RECT 0 283.895 0.32 284.68 ; + RECT 0 284.98 0.32 285.485 ; + RECT 0 286.775 0.32 287.56 ; + RECT 0 287.86 0.32 288.365 ; + RECT 0 289.655 0.32 290.44 ; + RECT 0 290.74 0.32 291.245 ; + RECT 0 292.535 0.32 293.32 ; + RECT 0 293.62 0.32 294.125 ; + RECT 0 295.415 0.32 296.2 ; + RECT 0 296.5 0.32 297.005 ; + RECT 0 298.295 0.32 299.08 ; + RECT 0 299.38 0.32 299.885 ; + RECT 0 301.175 0.32 301.96 ; + RECT 0 302.26 0.32 302.765 ; + RECT 0 304.055 0.32 304.84 ; + RECT 0 305.14 0.32 305.645 ; + RECT 0 306.935 0.32 307.72 ; + RECT 0 308.02 0.32 308.525 ; + RECT 0 309.815 0.32 310.6 ; + RECT 0 310.9 0.32 311.405 ; + RECT 0 312.695 0.32 313.48 ; + RECT 0 313.78 0.32 314.285 ; + RECT 0 315.575 0.32 316.36 ; + RECT 0 316.66 0.32 317.165 ; + RECT 0 318.455 0.32 319.24 ; + RECT 0 319.54 0.32 320.045 ; + RECT 0 321.335 0.32 322.12 ; + RECT 0 322.42 0.32 322.925 ; + RECT 0 324.215 0.32 325 ; + RECT 0 325.3 0.32 325.805 ; + RECT 0 327.095 0.32 327.88 ; + RECT 0 328.18 0.32 328.685 ; + RECT 0 329.975 0.32 330.76 ; + RECT 0 331.06 0.32 331.565 ; + RECT 0 332.855 0.32 333.64 ; + RECT 0 333.94 0.32 334.445 ; + RECT 0 335.735 0.32 336.52 ; + RECT 0 336.82 0.32 337.325 ; + RECT 0 338.615 0.32 339.4 ; + RECT 0 339.7 0.32 340.205 ; + RECT 0 341.495 0.32 342.28 ; + RECT 0 342.58 0.32 343.085 ; + RECT 0 344.375 0.32 345.16 ; + RECT 0 345.46 0.32 345.965 ; + RECT 0 347.255 0.32 348.04 ; + RECT 0 348.34 0.32 348.845 ; + RECT 0 350.135 0.32 350.92 ; + RECT 0 351.22 0.32 351.725 ; + RECT 0 353.015 0.32 353.8 ; + RECT 0 354.1 0.32 354.605 ; + RECT 0 355.895 0.32 356.68 ; + RECT 0 356.98 0.32 357.485 ; + RECT 0 358.775 0.32 359.56 ; + RECT 0 359.86 0.32 360.365 ; + RECT 0 361.655 0.32 362.44 ; + RECT 0 362.74 0.32 363.245 ; + RECT 0 364.535 0.32 365.32 ; + RECT 0 365.62 0.32 366.125 ; + RECT 0 367.415 0.32 368.2 ; + RECT 0 368.5 0.32 369.005 ; + RECT 0 370.295 0.32 371.08 ; + RECT 0 371.38 0.32 371.885 ; + RECT 0 373.175 0.32 373.96 ; + RECT 0 374.26 0.32 374.765 ; + RECT 0 376.055 0.32 376.84 ; + RECT 0 377.14 0.32 377.645 ; + RECT 0 378.935 0.32 379.72 ; + RECT 0 380.02 0.32 380.525 ; + RECT 0 381.815 0.32 382.6 ; + RECT 0 382.9 0.32 383.405 ; + RECT 0 384.695 0.32 385.48 ; + RECT 0 385.78 0.32 386.285 ; + RECT 0 387.575 0.32 388.36 ; + RECT 0 388.66 0.32 389.165 ; + RECT 0 390.455 0.32 391.24 ; + RECT 0 391.54 0.32 392.045 ; + RECT 0 393.335 0.32 394.12 ; + RECT 0 394.42 0.32 394.925 ; + RECT 0 396.215 0.32 397 ; + RECT 0 397.3 0.32 397.805 ; + RECT 0 399.095 0.32 399.88 ; + RECT 0 400.18 0.32 400.685 ; + RECT 0 401.975 0.32 402.76 ; + RECT 0 403.06 0.32 403.565 ; + RECT 0 404.855 0.32 405.64 ; + RECT 0 405.94 0.32 406.445 ; + RECT 0 407.735 0.32 408.52 ; + RECT 0 408.82 0.32 409.325 ; + RECT 0 410.615 0.32 411.4 ; + RECT 0 411.7 0.32 412.205 ; + RECT 0 413.495 0.32 414.3 ; + RECT 20.845 0 21.165 414.86 ; + RECT 0.32 0 20.845 0.35 ; + RECT 0.32 414.51 20.845 414.86 ; + LAYER M3 DESIGNRULEWIDTH 0.165 ; + RECT 0.32 0.35 20.845 414.51 ; + RECT 0 0.56 0.32 1.365 ; + RECT 0 2.655 0.32 3.16 ; + RECT 0 3.46 0.32 4.245 ; + RECT 0 5.535 0.32 6.04 ; + RECT 0 6.34 0.32 7.125 ; + RECT 0 8.415 0.32 8.92 ; + RECT 0 9.22 0.32 10.005 ; + RECT 0 11.295 0.32 11.8 ; + RECT 0 12.1 0.32 12.885 ; + RECT 0 14.175 0.32 14.68 ; + RECT 0 14.98 0.32 15.765 ; + RECT 0 17.055 0.32 17.56 ; + RECT 0 17.86 0.32 18.645 ; + RECT 0 19.935 0.32 20.44 ; + RECT 0 20.74 0.32 21.525 ; + RECT 0 22.815 0.32 23.32 ; + RECT 0 23.62 0.32 24.405 ; + RECT 0 25.695 0.32 26.2 ; + RECT 0 26.5 0.32 27.285 ; + RECT 0 28.575 0.32 29.08 ; + RECT 0 29.38 0.32 30.165 ; + RECT 0 31.455 0.32 31.96 ; + RECT 0 32.26 0.32 33.045 ; + RECT 0 34.335 0.32 34.84 ; + RECT 0 35.14 0.32 35.925 ; + RECT 0 37.215 0.32 37.72 ; + RECT 0 38.02 0.32 38.805 ; + RECT 0 40.095 0.32 40.6 ; + RECT 0 40.9 0.32 41.685 ; + RECT 0 42.975 0.32 43.48 ; + RECT 0 43.78 0.32 44.565 ; + RECT 0 45.855 0.32 46.36 ; + RECT 0 46.66 0.32 47.445 ; + RECT 0 48.735 0.32 49.24 ; + RECT 0 49.54 0.32 50.325 ; + RECT 0 51.615 0.32 52.12 ; + RECT 0 52.42 0.32 53.205 ; + RECT 0 54.495 0.32 55 ; + RECT 0 55.3 0.32 56.085 ; + RECT 0 57.375 0.32 57.88 ; + RECT 0 58.18 0.32 58.965 ; + RECT 0 60.255 0.32 60.76 ; + RECT 0 61.06 0.32 61.845 ; + RECT 0 63.135 0.32 63.64 ; + RECT 0 63.94 0.32 64.725 ; + RECT 0 66.015 0.32 66.52 ; + RECT 0 66.82 0.32 67.605 ; + RECT 0 68.895 0.32 69.4 ; + RECT 0 69.7 0.32 70.485 ; + RECT 0 71.775 0.32 72.28 ; + RECT 0 72.58 0.32 73.365 ; + RECT 0 74.655 0.32 75.16 ; + RECT 0 75.46 0.32 76.245 ; + RECT 0 77.535 0.32 78.04 ; + RECT 0 78.34 0.32 79.125 ; + RECT 0 80.415 0.32 80.92 ; + RECT 0 81.22 0.32 82.005 ; + RECT 0 83.295 0.32 83.8 ; + RECT 0 84.1 0.32 84.885 ; + RECT 0 86.175 0.32 86.68 ; + RECT 0 86.98 0.32 87.765 ; + RECT 0 89.055 0.32 89.56 ; + RECT 0 89.86 0.32 90.645 ; + RECT 0 91.935 0.32 92.44 ; + RECT 0 92.74 0.32 93.525 ; + RECT 0 94.815 0.32 95.32 ; + RECT 0 95.62 0.32 96.405 ; + RECT 0 97.695 0.32 98.2 ; + RECT 0 98.5 0.32 99.285 ; + RECT 0 100.575 0.32 101.08 ; + RECT 0 101.38 0.32 102.165 ; + RECT 0 103.455 0.32 103.96 ; + RECT 0 104.26 0.32 105.045 ; + RECT 0 106.335 0.32 106.84 ; + RECT 0 107.14 0.32 107.925 ; + RECT 0 109.215 0.32 109.72 ; + RECT 0 110.02 0.32 110.805 ; + RECT 0 112.095 0.32 112.6 ; + RECT 0 112.9 0.32 113.685 ; + RECT 0 114.975 0.32 115.48 ; + RECT 0 115.78 0.32 116.565 ; + RECT 0 117.855 0.32 118.36 ; + RECT 0 118.66 0.32 119.445 ; + RECT 0 120.735 0.32 121.24 ; + RECT 0 121.54 0.32 122.325 ; + RECT 0 123.615 0.32 124.12 ; + RECT 0 124.42 0.32 125.205 ; + RECT 0 126.495 0.32 127 ; + RECT 0 127.3 0.32 128.085 ; + RECT 0 129.375 0.32 129.88 ; + RECT 0 130.18 0.32 130.965 ; + RECT 0 132.255 0.32 132.76 ; + RECT 0 133.06 0.32 133.845 ; + RECT 0 135.135 0.32 135.64 ; + RECT 0 135.94 0.32 136.725 ; + RECT 0 138.015 0.32 138.52 ; + RECT 0 138.82 0.32 139.605 ; + RECT 0 140.895 0.32 141.4 ; + RECT 0 141.7 0.32 142.485 ; + RECT 0 143.775 0.32 144.28 ; + RECT 0 144.58 0.32 145.365 ; + RECT 0 146.655 0.32 147.16 ; + RECT 0 147.46 0.32 148.245 ; + RECT 0 149.535 0.32 150.04 ; + RECT 0 150.34 0.32 151.125 ; + RECT 0 152.415 0.32 152.92 ; + RECT 0 153.22 0.32 154.005 ; + RECT 0 155.295 0.32 155.8 ; + RECT 0 156.1 0.32 156.885 ; + RECT 0 158.175 0.32 158.68 ; + RECT 0 158.98 0.32 159.765 ; + RECT 0 161.055 0.32 161.56 ; + RECT 0 161.86 0.32 162.645 ; + RECT 0 163.935 0.32 164.44 ; + RECT 0 164.74 0.32 165.525 ; + RECT 0 166.815 0.32 167.32 ; + RECT 0 167.62 0.32 168.405 ; + RECT 0 169.695 0.32 170.2 ; + RECT 0 170.5 0.32 171.285 ; + RECT 0 172.575 0.32 173.08 ; + RECT 0 173.38 0.32 174.165 ; + RECT 0 175.455 0.32 175.96 ; + RECT 0 176.26 0.32 177.045 ; + RECT 0 178.335 0.32 178.84 ; + RECT 0 179.14 0.32 179.925 ; + RECT 0 181.215 0.32 181.72 ; + RECT 0 182.02 0.32 182.805 ; + RECT 0 184.095 0.32 184.6 ; + RECT 0 184.9 0.32 187 ; + RECT 0 187.3 0.32 187.35 ; + RECT 0 187.65 0.32 188.01 ; + RECT 0 188.71 0.32 190.35 ; + RECT 0 190.955 0.32 191.17 ; + RECT 0 191.47 0.32 191.575 ; + RECT 0 191.875 0.32 193.685 ; + RECT 0 193.985 0.32 194.2 ; + RECT 0 194.5 0.32 194.605 ; + RECT 0 194.905 0.32 196.745 ; + RECT 0 197.045 0.32 197.23 ; + RECT 0 197.53 0.32 197.635 ; + RECT 0 197.935 0.32 198.03 ; + RECT 0 198.33 0.32 198.4 ; + RECT 0 198.7 0.32 198.775 ; + RECT 0 199.075 0.32 199.26 ; + RECT 0 199.97 0.32 201.405 ; + RECT 0 202.105 0.32 202.29 ; + RECT 0 202.875 0.32 205.8 ; + RECT 0 206.5 0.32 206.97 ; + RECT 0 207.27 0.32 208.635 ; + RECT 0 208.935 0.32 212.725 ; + RECT 0 213.26 0.32 213.45 ; + RECT 0 213.75 0.32 213.825 ; + RECT 0 214.125 0.32 214.205 ; + RECT 0 214.505 0.32 215.205 ; + RECT 0 215.505 0.32 215.995 ; + RECT 0 216.295 0.32 216.48 ; + RECT 0 216.78 0.32 216.885 ; + RECT 0 217.185 0.32 217.65 ; + RECT 0 217.95 0.32 218.025 ; + RECT 0 218.325 0.32 218.48 ; + RECT 0 218.98 0.32 220.225 ; + RECT 0 220.525 0.32 220.65 ; + RECT 0 221.16 0.32 221.54 ; + RECT 0 221.84 0.32 223.68 ; + RECT 0 223.98 0.32 224.085 ; + RECT 0 224.385 0.32 224.57 ; + RECT 0 225.125 0.32 225.6 ; + RECT 0 225.9 0.32 228.21 ; + RECT 0 228.51 0.32 228.605 ; + RECT 0 228.905 0.32 229.15 ; + RECT 0 229.45 0.32 229.96 ; + RECT 0 230.26 0.32 230.765 ; + RECT 0 232.055 0.32 232.84 ; + RECT 0 233.14 0.32 233.645 ; + RECT 0 234.935 0.32 235.72 ; + RECT 0 236.02 0.32 236.525 ; + RECT 0 237.815 0.32 238.6 ; + RECT 0 238.9 0.32 239.405 ; + RECT 0 240.695 0.32 241.48 ; + RECT 0 241.78 0.32 242.285 ; + RECT 0 243.575 0.32 244.36 ; + RECT 0 244.66 0.32 245.165 ; + RECT 0 246.455 0.32 247.24 ; + RECT 0 247.54 0.32 248.045 ; + RECT 0 249.335 0.32 250.12 ; + RECT 0 250.42 0.32 250.925 ; + RECT 0 252.215 0.32 253 ; + RECT 0 253.3 0.32 253.805 ; + RECT 0 255.095 0.32 255.88 ; + RECT 0 256.18 0.32 256.685 ; + RECT 0 257.975 0.32 258.76 ; + RECT 0 259.06 0.32 259.565 ; + RECT 0 260.855 0.32 261.64 ; + RECT 0 261.94 0.32 262.445 ; + RECT 0 263.735 0.32 264.52 ; + RECT 0 264.82 0.32 265.325 ; + RECT 0 266.615 0.32 267.4 ; + RECT 0 267.7 0.32 268.205 ; + RECT 0 269.495 0.32 270.28 ; + RECT 0 270.58 0.32 271.085 ; + RECT 0 272.375 0.32 273.16 ; + RECT 0 273.46 0.32 273.965 ; + RECT 0 275.255 0.32 276.04 ; + RECT 0 276.34 0.32 276.845 ; + RECT 0 278.135 0.32 278.92 ; + RECT 0 279.22 0.32 279.725 ; + RECT 0 281.015 0.32 281.8 ; + RECT 0 282.1 0.32 282.605 ; + RECT 0 283.895 0.32 284.68 ; + RECT 0 284.98 0.32 285.485 ; + RECT 0 286.775 0.32 287.56 ; + RECT 0 287.86 0.32 288.365 ; + RECT 0 289.655 0.32 290.44 ; + RECT 0 290.74 0.32 291.245 ; + RECT 0 292.535 0.32 293.32 ; + RECT 0 293.62 0.32 294.125 ; + RECT 0 295.415 0.32 296.2 ; + RECT 0 296.5 0.32 297.005 ; + RECT 0 298.295 0.32 299.08 ; + RECT 0 299.38 0.32 299.885 ; + RECT 0 301.175 0.32 301.96 ; + RECT 0 302.26 0.32 302.765 ; + RECT 0 304.055 0.32 304.84 ; + RECT 0 305.14 0.32 305.645 ; + RECT 0 306.935 0.32 307.72 ; + RECT 0 308.02 0.32 308.525 ; + RECT 0 309.815 0.32 310.6 ; + RECT 0 310.9 0.32 311.405 ; + RECT 0 312.695 0.32 313.48 ; + RECT 0 313.78 0.32 314.285 ; + RECT 0 315.575 0.32 316.36 ; + RECT 0 316.66 0.32 317.165 ; + RECT 0 318.455 0.32 319.24 ; + RECT 0 319.54 0.32 320.045 ; + RECT 0 321.335 0.32 322.12 ; + RECT 0 322.42 0.32 322.925 ; + RECT 0 324.215 0.32 325 ; + RECT 0 325.3 0.32 325.805 ; + RECT 0 327.095 0.32 327.88 ; + RECT 0 328.18 0.32 328.685 ; + RECT 0 329.975 0.32 330.76 ; + RECT 0 331.06 0.32 331.565 ; + RECT 0 332.855 0.32 333.64 ; + RECT 0 333.94 0.32 334.445 ; + RECT 0 335.735 0.32 336.52 ; + RECT 0 336.82 0.32 337.325 ; + RECT 0 338.615 0.32 339.4 ; + RECT 0 339.7 0.32 340.205 ; + RECT 0 341.495 0.32 342.28 ; + RECT 0 342.58 0.32 343.085 ; + RECT 0 344.375 0.32 345.16 ; + RECT 0 345.46 0.32 345.965 ; + RECT 0 347.255 0.32 348.04 ; + RECT 0 348.34 0.32 348.845 ; + RECT 0 350.135 0.32 350.92 ; + RECT 0 351.22 0.32 351.725 ; + RECT 0 353.015 0.32 353.8 ; + RECT 0 354.1 0.32 354.605 ; + RECT 0 355.895 0.32 356.68 ; + RECT 0 356.98 0.32 357.485 ; + RECT 0 358.775 0.32 359.56 ; + RECT 0 359.86 0.32 360.365 ; + RECT 0 361.655 0.32 362.44 ; + RECT 0 362.74 0.32 363.245 ; + RECT 0 364.535 0.32 365.32 ; + RECT 0 365.62 0.32 366.125 ; + RECT 0 367.415 0.32 368.2 ; + RECT 0 368.5 0.32 369.005 ; + RECT 0 370.295 0.32 371.08 ; + RECT 0 371.38 0.32 371.885 ; + RECT 0 373.175 0.32 373.96 ; + RECT 0 374.26 0.32 374.765 ; + RECT 0 376.055 0.32 376.84 ; + RECT 0 377.14 0.32 377.645 ; + RECT 0 378.935 0.32 379.72 ; + RECT 0 380.02 0.32 380.525 ; + RECT 0 381.815 0.32 382.6 ; + RECT 0 382.9 0.32 383.405 ; + RECT 0 384.695 0.32 385.48 ; + RECT 0 385.78 0.32 386.285 ; + RECT 0 387.575 0.32 388.36 ; + RECT 0 388.66 0.32 389.165 ; + RECT 0 390.455 0.32 391.24 ; + RECT 0 391.54 0.32 392.045 ; + RECT 0 393.335 0.32 394.12 ; + RECT 0 394.42 0.32 394.925 ; + RECT 0 396.215 0.32 397 ; + RECT 0 397.3 0.32 397.805 ; + RECT 0 399.095 0.32 399.88 ; + RECT 0 400.18 0.32 400.685 ; + RECT 0 401.975 0.32 402.76 ; + RECT 0 403.06 0.32 403.565 ; + RECT 0 404.855 0.32 405.64 ; + RECT 0 405.94 0.32 406.445 ; + RECT 0 407.735 0.32 408.52 ; + RECT 0 408.82 0.32 409.325 ; + RECT 0 410.615 0.32 411.4 ; + RECT 0 411.7 0.32 412.205 ; + RECT 0 413.495 0.32 414.3 ; + RECT 20.845 0 21.165 414.86 ; + RECT 0.32 0 20.845 0.35 ; + RECT 0.32 414.51 20.845 414.86 ; + LAYER M4 DESIGNRULEWIDTH 0.165 ; + RECT 0.57 185.175 14.49 186.345 ; + RECT 14.185 186.345 14.49 186.575 ; + RECT 0.57 186.405 14.125 186.555 ; + RECT 0.57 187.305 14.49 187.415 ; + RECT 0.57 187.55 14.49 187.74 ; + RECT 0.57 188.225 14.49 188.325 ; + RECT 0.57 188.715 11.56 188.815 ; + RECT 0.57 189.205 14.49 189.305 ; + RECT 11.255 189.305 14.49 189.31 ; + RECT 11.255 189.31 12.345 189.655 ; + RECT 0.57 189.405 11.155 189.615 ; + RECT 12.445 189.41 14.49 189.6 ; + RECT 11.255 189.655 11.56 189.715 ; + RECT 0.57 189.715 11.56 189.785 ; + RECT 0.57 189.885 14.49 190.075 ; + RECT 0.57 190.175 14.49 190.33 ; + RECT 0.57 190.72 14.49 190.785 ; + RECT 0.57 191.175 14.49 191.28 ; + RECT 0.57 191.67 14.49 191.77 ; + RECT 0.57 192.16 14.15 192.26 ; + RECT 0.57 192.65 14.49 192.755 ; + RECT 0.57 193.145 14.49 193.245 ; + RECT 0.57 193.635 14.49 193.74 ; + RECT 0.57 193.84 14.49 194.03 ; + RECT 0.57 194.13 14.49 194.23 ; + RECT 0.57 194.62 14.49 194.725 ; + RECT 0.57 195.115 14.49 195.215 ; + RECT 0.57 195.605 14.49 195.705 ; + RECT 0.57 196.095 14.49 196.2 ; + RECT 0.57 196.59 14.49 196.69 ; + RECT 0.57 197.08 14.49 197.18 ; + RECT 0.57 197.57 14.49 197.675 ; + RECT 0.57 197.775 14.49 197.965 ; + RECT 0.57 198.065 14.49 198.165 ; + RECT 0.57 198.555 14.49 198.66 ; + RECT 0.57 199.05 14.49 199.15 ; + RECT 8.61 199.54 14.49 199.63 ; + RECT 0.57 199.555 8.56 199.625 ; + RECT 0.57 200.04 14.49 200.135 ; + RECT 0.57 200.525 14.49 200.625 ; + RECT 0.57 201.015 14.49 201.12 ; + RECT 9.515 201.51 14.49 201.6 ; + RECT 9.295 201.515 9.465 201.525 ; + RECT 0.57 201.525 9.465 201.595 ; + RECT 9.295 201.595 9.465 201.605 ; + RECT 0.57 201.7 14.49 201.91 ; + RECT 0.57 202.01 14.49 202.105 ; + RECT 0.57 202.495 14.49 202.6 ; + RECT 0.57 202.99 14.49 203.085 ; + RECT 0.57 203.475 14.49 203.58 ; + RECT 0.57 203.97 14.49 204.055 ; + RECT 0.57 204.445 14.49 204.68 ; + RECT 0.57 204.68 13.465 204.795 ; + RECT 13.565 204.78 14.49 204.97 ; + RECT 11.215 204.795 13.465 205.055 ; + RECT 0.57 204.855 11.155 205.005 ; + RECT 0.57 205.445 13.8 205.545 ; + RECT 0.57 205.645 14.49 205.835 ; + RECT 0.57 205.935 13.8 206.04 ; + RECT 0.57 206.43 14.49 206.53 ; + RECT 0.57 206.92 14.49 207.02 ; + RECT 0.57 207.41 7.02 207.515 ; + RECT 13.595 207.41 14.49 207.515 ; + RECT 0.57 207.905 14.49 208.005 ; + RECT 0.57 208.395 14.49 208.5 ; + RECT 0.57 208.89 13.8 208.99 ; + RECT 0.57 209.09 14.49 209.28 ; + RECT 0.57 209.38 13.8 209.48 ; + RECT 11.215 209.87 13.5 210.13 ; + RECT 13.6 209.895 14.49 210.085 ; + RECT 0.57 209.92 11.155 210.07 ; + RECT 0.57 210.13 13.5 210.185 ; + RECT 0.57 210.185 14.49 210.48 ; + RECT 0.57 210.87 14.49 210.955 ; + RECT 0.57 211.345 14.49 211.45 ; + RECT 0.57 211.84 14.49 211.945 ; + RECT 0.57 212.335 14.49 212.425 ; + RECT 7.785 212.835 14.49 212.915 ; + RECT 0.57 212.84 7.735 212.91 ; + RECT 0.57 213.015 14.49 213.225 ; + RECT 0.57 213.325 14.49 213.42 ; + RECT 0.57 213.81 14.49 213.91 ; + RECT 0.57 214.3 14.49 214.405 ; + RECT 0.57 214.795 14.49 214.885 ; + RECT 8.06 215.295 14.49 215.385 ; + RECT 0.57 215.3 8.01 215.37 ; + RECT 0.57 215.775 14.49 215.88 ; + RECT 0.57 216.27 14.49 216.37 ; + RECT 0.57 216.76 14.49 216.865 ; + RECT 0.57 216.965 14.49 217.155 ; + RECT 0.57 217.255 14.49 217.355 ; + RECT 0.57 217.745 14.49 217.845 ; + RECT 0.57 218.235 14.49 218.34 ; + RECT 0.57 218.73 14.49 218.83 ; + RECT 0.57 219.22 14.49 219.325 ; + RECT 0.57 219.715 14.49 219.815 ; + RECT 0.57 220.205 14.49 220.305 ; + RECT 0.57 220.695 14.15 220.79 ; + RECT 0.57 220.89 14.49 221.1 ; + RECT 2.785 221.2 14.49 221.29 ; + RECT 0.57 221.68 14.49 221.775 ; + RECT 0.57 222.19 14.49 222.26 ; + RECT 0.57 222.68 14.49 222.75 ; + RECT 0.57 223.165 14.49 223.225 ; + RECT 0.57 223.615 14.49 223.75 ; + RECT 0.57 224.14 14.49 224.21 ; + RECT 0.57 224.6 14.49 224.75 ; + RECT 0.57 224.85 14.49 225.04 ; + RECT 0.57 225.14 12.555 225.215 ; + RECT 11.255 225.215 12.555 225.225 ; + RECT 11.255 225.225 12.27 225.615 ; + RECT 0.57 225.315 11.155 225.525 ; + RECT 12.37 225.325 14.49 225.515 ; + RECT 11.255 225.615 14.49 225.625 ; + RECT 0.57 225.625 14.49 225.72 ; + RECT 0.57 226.11 12.555 226.21 ; + RECT 0.57 226.6 14.49 226.705 ; + RECT 0.57 227.105 14.49 227.315 ; + RECT 0.57 227.445 14.49 227.555 ; + RECT 14.21 228.285 14.49 228.515 ; + RECT 0.57 228.305 14.15 228.455 ; + RECT 0.57 228.515 14.49 229.685 ; + RECT 0.21 186.405 0.57 186.555 ; + RECT 0.215 187.55 0.57 187.74 ; + RECT 0.22 189.405 0.57 189.615 ; + RECT 0.22 189.885 0.57 190.075 ; + RECT 0.22 193.84 0.57 194.03 ; + RECT 0.23 197.775 0.57 197.965 ; + RECT 0.14 199.555 0.57 199.625 ; + RECT 0.15 201.525 0.57 201.595 ; + RECT 0.215 201.7 0.57 201.91 ; + RECT 0.21 204.855 0.57 205.005 ; + RECT 0.225 205.645 0.57 205.835 ; + RECT 0.325 209.09 0.61 209.28 ; + RECT 0.21 209.92 0.57 210.07 ; + RECT 0.15 212.84 0.57 212.91 ; + RECT 0.235 213.015 0.57 213.225 ; + RECT 0.14 215.3 0.57 215.37 ; + RECT 0.24 216.965 0.57 217.155 ; + RECT 0.225 220.89 0.57 221.1 ; + RECT 0.14 221.205 0.57 221.275 ; + RECT 0.235 224.85 0.57 225.04 ; + RECT 0.225 225.315 0.57 225.525 ; + RECT 0.24 227.105 0.57 227.315 ; + RECT 0.22 228.305 0.57 228.455 ; + RECT 5.7 181.625 13.945 181.775 ; + RECT 5.7 155.705 13.945 155.855 ; + RECT 5.7 152.825 13.945 152.975 ; + RECT 5.7 149.945 13.945 150.095 ; + RECT 5.7 147.065 13.945 147.215 ; + RECT 5.7 144.185 13.945 144.335 ; + RECT 5.7 141.305 13.945 141.455 ; + RECT 5.7 138.425 13.945 138.575 ; + RECT 5.7 135.545 13.945 135.695 ; + RECT 5.7 132.665 13.945 132.815 ; + RECT 5.7 129.785 13.945 129.935 ; + RECT 5.7 178.745 13.945 178.895 ; + RECT 5.7 126.905 13.945 127.055 ; + RECT 5.7 124.025 13.945 124.175 ; + RECT 5.7 121.145 13.945 121.295 ; + RECT 5.7 118.265 13.945 118.415 ; + RECT 5.7 115.385 13.945 115.535 ; + RECT 5.7 112.505 13.945 112.655 ; + RECT 5.7 109.625 13.945 109.775 ; + RECT 5.7 106.745 13.945 106.895 ; + RECT 5.7 103.865 13.945 104.015 ; + RECT 5.7 100.985 13.945 101.135 ; + RECT 5.7 175.865 13.945 176.015 ; + RECT 5.7 98.105 13.945 98.255 ; + RECT 5.7 95.225 13.945 95.375 ; + RECT 5.7 92.345 13.945 92.495 ; + RECT 5.7 89.465 13.945 89.615 ; + RECT 5.7 86.585 13.945 86.735 ; + RECT 5.7 83.705 13.945 83.855 ; + RECT 5.7 80.825 13.945 80.975 ; + RECT 5.7 77.945 13.945 78.095 ; + RECT 5.7 75.065 13.945 75.215 ; + RECT 5.7 72.185 13.945 72.335 ; + RECT 5.7 172.985 13.945 173.135 ; + RECT 5.7 69.305 13.945 69.455 ; + RECT 5.7 66.425 13.945 66.575 ; + RECT 5.7 63.545 13.945 63.695 ; + RECT 5.7 60.665 13.945 60.815 ; + RECT 5.7 57.785 13.945 57.935 ; + RECT 5.7 54.905 13.945 55.055 ; + RECT 5.7 52.025 13.945 52.175 ; + RECT 5.7 49.145 13.945 49.295 ; + RECT 5.7 46.265 13.945 46.415 ; + RECT 5.7 43.385 13.945 43.535 ; + RECT 5.7 170.105 13.945 170.255 ; + RECT 5.7 40.505 13.945 40.655 ; + RECT 5.7 37.625 13.945 37.775 ; + RECT 5.7 34.745 13.945 34.895 ; + RECT 5.7 31.865 13.945 32.015 ; + RECT 5.7 28.985 13.945 29.135 ; + RECT 5.7 26.105 13.945 26.255 ; + RECT 5.7 23.225 13.945 23.375 ; + RECT 5.7 20.345 13.945 20.495 ; + RECT 5.7 17.465 13.945 17.615 ; + RECT 5.7 14.585 13.945 14.735 ; + RECT 5.7 167.225 13.945 167.375 ; + RECT 5.7 11.705 13.945 11.855 ; + RECT 5.7 8.825 13.945 8.975 ; + RECT 5.7 5.945 13.945 6.095 ; + RECT 5.7 164.345 13.945 164.495 ; + RECT 5.7 161.465 13.945 161.615 ; + RECT 5.7 158.585 13.945 158.735 ; + RECT 5.7 3.065 13.945 3.215 ; + RECT 5.7 184.505 13.945 184.655 ; + RECT 0.57 181.625 1.11 181.775 ; + RECT 0.57 155.705 1.11 155.855 ; + RECT 0.57 152.825 1.11 152.975 ; + RECT 0.57 149.945 1.11 150.095 ; + RECT 0.57 147.065 1.11 147.215 ; + RECT 0.57 144.185 1.11 144.335 ; + RECT 0.57 141.305 1.11 141.455 ; + RECT 0.57 138.425 1.11 138.575 ; + RECT 0.57 135.545 1.11 135.695 ; + RECT 0.57 132.665 1.11 132.815 ; + RECT 0.57 129.785 1.11 129.935 ; + RECT 0.57 178.745 1.11 178.895 ; + RECT 0.57 126.905 1.11 127.055 ; + RECT 0.57 124.025 1.11 124.175 ; + RECT 0.57 121.145 1.11 121.295 ; + RECT 0.57 118.265 1.11 118.415 ; + RECT 0.57 115.385 1.11 115.535 ; + RECT 0.57 112.505 1.11 112.655 ; + RECT 0.57 109.625 1.11 109.775 ; + RECT 0.57 106.745 1.11 106.895 ; + RECT 0.57 103.865 1.11 104.015 ; + RECT 0.57 100.985 1.11 101.135 ; + RECT 0.57 175.865 1.11 176.015 ; + RECT 0.57 98.105 1.11 98.255 ; + RECT 0.57 95.225 1.11 95.375 ; + RECT 0.57 92.345 1.11 92.495 ; + RECT 0.57 89.465 1.11 89.615 ; + RECT 0.57 86.585 1.11 86.735 ; + RECT 0.57 83.705 1.11 83.855 ; + RECT 0.57 80.825 1.11 80.975 ; + RECT 0.57 77.945 1.11 78.095 ; + RECT 0.57 75.065 1.11 75.215 ; + RECT 0.57 72.185 1.11 72.335 ; + RECT 0.57 172.985 1.11 173.135 ; + RECT 0.57 69.305 1.11 69.455 ; + RECT 0.57 66.425 1.11 66.575 ; + RECT 0.57 63.545 1.11 63.695 ; + RECT 0.57 60.665 1.11 60.815 ; + RECT 0.57 57.785 1.11 57.935 ; + RECT 0.57 54.905 1.11 55.055 ; + RECT 0.57 52.025 1.11 52.175 ; + RECT 0.57 49.145 1.11 49.295 ; + RECT 0.57 46.265 1.11 46.415 ; + RECT 0.57 43.385 1.11 43.535 ; + RECT 0.57 170.105 1.11 170.255 ; + RECT 0.57 40.505 1.11 40.655 ; + RECT 0.57 37.625 1.11 37.775 ; + RECT 0.57 34.745 1.11 34.895 ; + RECT 0.57 31.865 1.11 32.015 ; + RECT 0.57 28.985 1.11 29.135 ; + RECT 0.57 26.105 1.11 26.255 ; + RECT 0.57 23.225 1.11 23.375 ; + RECT 0.57 20.345 1.11 20.495 ; + RECT 0.57 17.465 1.11 17.615 ; + RECT 0.57 14.585 1.11 14.735 ; + RECT 0.57 167.225 1.11 167.375 ; + RECT 0.57 11.705 1.11 11.855 ; + RECT 0.57 8.825 1.11 8.975 ; + RECT 0.57 5.945 1.11 6.095 ; + RECT 0.57 164.345 1.11 164.495 ; + RECT 0.57 161.465 1.11 161.615 ; + RECT 0.57 158.585 1.11 158.735 ; + RECT 0.57 3.065 1.11 3.215 ; + RECT 0.57 184.505 1.11 184.655 ; + RECT 1.005 181.625 5.7 181.775 ; + RECT 1.005 155.705 5.7 155.855 ; + RECT 1.005 152.825 5.7 152.975 ; + RECT 1.005 149.945 5.7 150.095 ; + RECT 1.005 147.065 5.7 147.215 ; + RECT 1.005 144.185 5.7 144.335 ; + RECT 1.005 141.305 5.7 141.455 ; + RECT 1.005 138.425 5.7 138.575 ; + RECT 1.005 135.545 5.7 135.695 ; + RECT 1.005 132.665 5.7 132.815 ; + RECT 1.005 129.785 5.7 129.935 ; + RECT 1.005 178.745 5.7 178.895 ; + RECT 1.005 126.905 5.7 127.055 ; + RECT 1.005 124.025 5.7 124.175 ; + RECT 1.005 121.145 5.7 121.295 ; + RECT 1.005 118.265 5.7 118.415 ; + RECT 1.005 115.385 5.7 115.535 ; + RECT 1.005 112.505 5.7 112.655 ; + RECT 1.005 109.625 5.7 109.775 ; + RECT 1.005 106.745 5.7 106.895 ; + RECT 1.005 103.865 5.7 104.015 ; + RECT 1.005 100.985 5.7 101.135 ; + RECT 1.005 175.865 5.7 176.015 ; + RECT 1.005 98.105 5.7 98.255 ; + RECT 1.005 95.225 5.7 95.375 ; + RECT 1.005 92.345 5.7 92.495 ; + RECT 1.005 89.465 5.7 89.615 ; + RECT 1.005 86.585 5.7 86.735 ; + RECT 1.005 83.705 5.7 83.855 ; + RECT 1.005 80.825 5.7 80.975 ; + RECT 1.005 77.945 5.7 78.095 ; + RECT 1.005 75.065 5.7 75.215 ; + RECT 1.005 72.185 5.7 72.335 ; + RECT 1.005 172.985 5.7 173.135 ; + RECT 1.005 69.305 5.7 69.455 ; + RECT 1.005 66.425 5.7 66.575 ; + RECT 1.005 63.545 5.7 63.695 ; + RECT 1.005 60.665 5.7 60.815 ; + RECT 1.005 57.785 5.7 57.935 ; + RECT 1.005 54.905 5.7 55.055 ; + RECT 1.005 52.025 5.7 52.175 ; + RECT 1.005 49.145 5.7 49.295 ; + RECT 1.005 46.265 5.7 46.415 ; + RECT 1.005 43.385 5.7 43.535 ; + RECT 1.005 170.105 5.7 170.255 ; + RECT 1.005 40.505 5.7 40.655 ; + RECT 1.005 37.625 5.7 37.775 ; + RECT 1.005 34.745 5.7 34.895 ; + RECT 1.005 31.865 5.7 32.015 ; + RECT 1.005 28.985 5.7 29.135 ; + RECT 1.005 26.105 5.7 26.255 ; + RECT 1.005 23.225 5.7 23.375 ; + RECT 1.005 20.345 5.7 20.495 ; + RECT 1.005 17.465 5.7 17.615 ; + RECT 1.005 14.585 5.7 14.735 ; + RECT 1.005 167.225 5.7 167.375 ; + RECT 1.005 11.705 5.7 11.855 ; + RECT 1.005 8.825 5.7 8.975 ; + RECT 1.005 5.945 5.7 6.095 ; + RECT 1.005 164.345 5.7 164.495 ; + RECT 1.005 161.465 5.7 161.615 ; + RECT 1.005 158.585 5.7 158.735 ; + RECT 1.005 3.065 5.7 3.215 ; + RECT 1.005 184.505 5.7 184.655 ; + RECT 0.255 184.505 0.57 184.655 ; + RECT 0.255 181.625 0.57 181.775 ; + RECT 0.255 155.705 0.57 155.855 ; + RECT 0.255 152.825 0.57 152.975 ; + RECT 0.255 149.945 0.57 150.095 ; + RECT 0.255 147.065 0.57 147.215 ; + RECT 0.255 144.185 0.57 144.335 ; + RECT 0.255 141.305 0.57 141.455 ; + RECT 0.255 138.425 0.57 138.575 ; + RECT 0.255 135.545 0.57 135.695 ; + RECT 0.255 132.665 0.57 132.815 ; + RECT 0.255 129.785 0.57 129.935 ; + RECT 0.255 178.745 0.57 178.895 ; + RECT 0.255 126.905 0.57 127.055 ; + RECT 0.255 124.025 0.57 124.175 ; + RECT 0.255 121.145 0.57 121.295 ; + RECT 0.255 118.265 0.57 118.415 ; + RECT 0.255 115.385 0.57 115.535 ; + RECT 0.255 112.505 0.57 112.655 ; + RECT 0.255 109.625 0.57 109.775 ; + RECT 0.255 106.745 0.57 106.895 ; + RECT 0.255 103.865 0.57 104.015 ; + RECT 0.255 100.985 0.57 101.135 ; + RECT 0.255 175.865 0.57 176.015 ; + RECT 0.255 98.105 0.57 98.255 ; + RECT 0.255 95.225 0.57 95.375 ; + RECT 0.255 92.345 0.57 92.495 ; + RECT 0.255 89.465 0.57 89.615 ; + RECT 0.255 86.585 0.57 86.735 ; + RECT 0.255 83.705 0.57 83.855 ; + RECT 0.255 80.825 0.57 80.975 ; + RECT 0.255 77.945 0.57 78.095 ; + RECT 0.255 75.065 0.57 75.215 ; + RECT 0.255 72.185 0.57 72.335 ; + RECT 0.255 172.985 0.57 173.135 ; + RECT 0.255 69.305 0.57 69.455 ; + RECT 0.255 66.425 0.57 66.575 ; + RECT 0.255 63.545 0.57 63.695 ; + RECT 0.255 60.665 0.57 60.815 ; + RECT 0.255 57.785 0.57 57.935 ; + RECT 0.255 54.905 0.57 55.055 ; + RECT 0.255 52.025 0.57 52.175 ; + RECT 0.255 49.145 0.57 49.295 ; + RECT 0.255 46.265 0.57 46.415 ; + RECT 0.255 43.385 0.57 43.535 ; + RECT 0.255 170.105 0.57 170.255 ; + RECT 0.255 40.505 0.57 40.655 ; + RECT 0.255 37.625 0.57 37.775 ; + RECT 0.255 34.745 0.57 34.895 ; + RECT 0.255 31.865 0.57 32.015 ; + RECT 0.255 28.985 0.57 29.135 ; + RECT 0.255 26.105 0.57 26.255 ; + RECT 0.255 23.225 0.57 23.375 ; + RECT 0.255 20.345 0.57 20.495 ; + RECT 0.255 17.465 0.57 17.615 ; + RECT 0.255 14.585 0.57 14.735 ; + RECT 0.255 167.225 0.57 167.375 ; + RECT 0.255 11.705 0.57 11.855 ; + RECT 0.255 8.825 0.57 8.975 ; + RECT 0.255 5.945 0.57 6.095 ; + RECT 0.255 3.065 0.57 3.215 ; + RECT 0.255 164.345 0.57 164.495 ; + RECT 0.255 161.465 0.57 161.615 ; + RECT 0.255 158.585 0.57 158.735 ; + RECT 5.7 233.085 13.945 233.235 ; + RECT 5.7 259.005 13.945 259.155 ; + RECT 5.7 261.885 13.945 262.035 ; + RECT 5.7 264.765 13.945 264.915 ; + RECT 5.7 267.645 13.945 267.795 ; + RECT 5.7 270.525 13.945 270.675 ; + RECT 5.7 273.405 13.945 273.555 ; + RECT 5.7 276.285 13.945 276.435 ; + RECT 5.7 279.165 13.945 279.315 ; + RECT 5.7 282.045 13.945 282.195 ; + RECT 5.7 284.925 13.945 285.075 ; + RECT 5.7 235.965 13.945 236.115 ; + RECT 5.7 287.805 13.945 287.955 ; + RECT 5.7 290.685 13.945 290.835 ; + RECT 5.7 293.565 13.945 293.715 ; + RECT 5.7 296.445 13.945 296.595 ; + RECT 5.7 299.325 13.945 299.475 ; + RECT 5.7 302.205 13.945 302.355 ; + RECT 5.7 305.085 13.945 305.235 ; + RECT 5.7 307.965 13.945 308.115 ; + RECT 5.7 310.845 13.945 310.995 ; + RECT 5.7 313.725 13.945 313.875 ; + RECT 5.7 238.845 13.945 238.995 ; + RECT 5.7 316.605 13.945 316.755 ; + RECT 5.7 319.485 13.945 319.635 ; + RECT 5.7 322.365 13.945 322.515 ; + RECT 5.7 325.245 13.945 325.395 ; + RECT 5.7 328.125 13.945 328.275 ; + RECT 5.7 331.005 13.945 331.155 ; + RECT 5.7 333.885 13.945 334.035 ; + RECT 5.7 336.765 13.945 336.915 ; + RECT 5.7 339.645 13.945 339.795 ; + RECT 5.7 342.525 13.945 342.675 ; + RECT 5.7 241.725 13.945 241.875 ; + RECT 5.7 345.405 13.945 345.555 ; + RECT 5.7 348.285 13.945 348.435 ; + RECT 5.7 351.165 13.945 351.315 ; + RECT 5.7 354.045 13.945 354.195 ; + RECT 5.7 356.925 13.945 357.075 ; + RECT 5.7 359.805 13.945 359.955 ; + RECT 5.7 362.685 13.945 362.835 ; + RECT 5.7 365.565 13.945 365.715 ; + RECT 5.7 368.445 13.945 368.595 ; + RECT 5.7 371.325 13.945 371.475 ; + RECT 5.7 244.605 13.945 244.755 ; + RECT 5.7 374.205 13.945 374.355 ; + RECT 5.7 377.085 13.945 377.235 ; + RECT 5.7 379.965 13.945 380.115 ; + RECT 5.7 382.845 13.945 382.995 ; + RECT 5.7 385.725 13.945 385.875 ; + RECT 5.7 388.605 13.945 388.755 ; + RECT 5.7 391.485 13.945 391.635 ; + RECT 5.7 394.365 13.945 394.515 ; + RECT 5.7 397.245 13.945 397.395 ; + RECT 5.7 400.125 13.945 400.275 ; + RECT 5.7 247.485 13.945 247.635 ; + RECT 5.7 403.005 13.945 403.155 ; + RECT 5.7 405.885 13.945 406.035 ; + RECT 5.7 408.765 13.945 408.915 ; + RECT 5.7 250.365 13.945 250.515 ; + RECT 5.7 253.245 13.945 253.395 ; + RECT 5.7 256.125 13.945 256.275 ; + RECT 5.7 411.645 13.945 411.795 ; + RECT 5.7 230.205 13.945 230.355 ; + RECT 0.57 233.085 1.11 233.235 ; + RECT 0.57 259.005 1.11 259.155 ; + RECT 0.57 261.885 1.11 262.035 ; + RECT 0.57 264.765 1.11 264.915 ; + RECT 0.57 267.645 1.11 267.795 ; + RECT 0.57 270.525 1.11 270.675 ; + RECT 0.57 273.405 1.11 273.555 ; + RECT 0.57 276.285 1.11 276.435 ; + RECT 0.57 279.165 1.11 279.315 ; + RECT 0.57 282.045 1.11 282.195 ; + RECT 0.57 284.925 1.11 285.075 ; + RECT 0.57 235.965 1.11 236.115 ; + RECT 0.57 287.805 1.11 287.955 ; + RECT 0.57 290.685 1.11 290.835 ; + RECT 0.57 293.565 1.11 293.715 ; + RECT 0.57 296.445 1.11 296.595 ; + RECT 0.57 299.325 1.11 299.475 ; + RECT 0.57 302.205 1.11 302.355 ; + RECT 0.57 305.085 1.11 305.235 ; + RECT 0.57 307.965 1.11 308.115 ; + RECT 0.57 310.845 1.11 310.995 ; + RECT 0.57 313.725 1.11 313.875 ; + RECT 0.57 238.845 1.11 238.995 ; + RECT 0.57 316.605 1.11 316.755 ; + RECT 0.57 319.485 1.11 319.635 ; + RECT 0.57 322.365 1.11 322.515 ; + RECT 0.57 325.245 1.11 325.395 ; + RECT 0.57 328.125 1.11 328.275 ; + RECT 0.57 331.005 1.11 331.155 ; + RECT 0.57 333.885 1.11 334.035 ; + RECT 0.57 336.765 1.11 336.915 ; + RECT 0.57 339.645 1.11 339.795 ; + RECT 0.57 342.525 1.11 342.675 ; + RECT 0.57 241.725 1.11 241.875 ; + RECT 0.57 345.405 1.11 345.555 ; + RECT 0.57 348.285 1.11 348.435 ; + RECT 0.57 351.165 1.11 351.315 ; + RECT 0.57 354.045 1.11 354.195 ; + RECT 0.57 356.925 1.11 357.075 ; + RECT 0.57 359.805 1.11 359.955 ; + RECT 0.57 362.685 1.11 362.835 ; + RECT 0.57 365.565 1.11 365.715 ; + RECT 0.57 368.445 1.11 368.595 ; + RECT 0.57 371.325 1.11 371.475 ; + RECT 0.57 244.605 1.11 244.755 ; + RECT 0.57 374.205 1.11 374.355 ; + RECT 0.57 377.085 1.11 377.235 ; + RECT 0.57 379.965 1.11 380.115 ; + RECT 0.57 382.845 1.11 382.995 ; + RECT 0.57 385.725 1.11 385.875 ; + RECT 0.57 388.605 1.11 388.755 ; + RECT 0.57 391.485 1.11 391.635 ; + RECT 0.57 394.365 1.11 394.515 ; + RECT 0.57 397.245 1.11 397.395 ; + RECT 0.57 400.125 1.11 400.275 ; + RECT 0.57 247.485 1.11 247.635 ; + RECT 0.57 403.005 1.11 403.155 ; + RECT 0.57 405.885 1.11 406.035 ; + RECT 0.57 408.765 1.11 408.915 ; + RECT 0.57 250.365 1.11 250.515 ; + RECT 0.57 253.245 1.11 253.395 ; + RECT 0.57 256.125 1.11 256.275 ; + RECT 0.57 411.645 1.11 411.795 ; + RECT 0.57 230.205 1.11 230.355 ; + RECT 1.005 233.085 5.7 233.235 ; + RECT 1.005 259.005 5.7 259.155 ; + RECT 1.005 261.885 5.7 262.035 ; + RECT 1.005 264.765 5.7 264.915 ; + RECT 1.005 267.645 5.7 267.795 ; + RECT 1.005 270.525 5.7 270.675 ; + RECT 1.005 273.405 5.7 273.555 ; + RECT 1.005 276.285 5.7 276.435 ; + RECT 1.005 279.165 5.7 279.315 ; + RECT 1.005 282.045 5.7 282.195 ; + RECT 1.005 284.925 5.7 285.075 ; + RECT 1.005 235.965 5.7 236.115 ; + RECT 1.005 287.805 5.7 287.955 ; + RECT 1.005 290.685 5.7 290.835 ; + RECT 1.005 293.565 5.7 293.715 ; + RECT 1.005 296.445 5.7 296.595 ; + RECT 1.005 299.325 5.7 299.475 ; + RECT 1.005 302.205 5.7 302.355 ; + RECT 1.005 305.085 5.7 305.235 ; + RECT 1.005 307.965 5.7 308.115 ; + RECT 1.005 310.845 5.7 310.995 ; + RECT 1.005 313.725 5.7 313.875 ; + RECT 1.005 238.845 5.7 238.995 ; + RECT 1.005 316.605 5.7 316.755 ; + RECT 1.005 319.485 5.7 319.635 ; + RECT 1.005 322.365 5.7 322.515 ; + RECT 1.005 325.245 5.7 325.395 ; + RECT 1.005 328.125 5.7 328.275 ; + RECT 1.005 331.005 5.7 331.155 ; + RECT 1.005 333.885 5.7 334.035 ; + RECT 1.005 336.765 5.7 336.915 ; + RECT 1.005 339.645 5.7 339.795 ; + RECT 1.005 342.525 5.7 342.675 ; + RECT 1.005 241.725 5.7 241.875 ; + RECT 1.005 345.405 5.7 345.555 ; + RECT 1.005 348.285 5.7 348.435 ; + RECT 1.005 351.165 5.7 351.315 ; + RECT 1.005 354.045 5.7 354.195 ; + RECT 1.005 356.925 5.7 357.075 ; + RECT 1.005 359.805 5.7 359.955 ; + RECT 1.005 362.685 5.7 362.835 ; + RECT 1.005 365.565 5.7 365.715 ; + RECT 1.005 368.445 5.7 368.595 ; + RECT 1.005 371.325 5.7 371.475 ; + RECT 1.005 244.605 5.7 244.755 ; + RECT 1.005 374.205 5.7 374.355 ; + RECT 1.005 377.085 5.7 377.235 ; + RECT 1.005 379.965 5.7 380.115 ; + RECT 1.005 382.845 5.7 382.995 ; + RECT 1.005 385.725 5.7 385.875 ; + RECT 1.005 388.605 5.7 388.755 ; + RECT 1.005 391.485 5.7 391.635 ; + RECT 1.005 394.365 5.7 394.515 ; + RECT 1.005 397.245 5.7 397.395 ; + RECT 1.005 400.125 5.7 400.275 ; + RECT 1.005 247.485 5.7 247.635 ; + RECT 1.005 403.005 5.7 403.155 ; + RECT 1.005 405.885 5.7 406.035 ; + RECT 1.005 408.765 5.7 408.915 ; + RECT 1.005 250.365 5.7 250.515 ; + RECT 1.005 253.245 5.7 253.395 ; + RECT 1.005 256.125 5.7 256.275 ; + RECT 1.005 411.645 5.7 411.795 ; + RECT 1.005 230.205 5.7 230.355 ; + RECT 0.255 230.205 0.57 230.355 ; + RECT 0.255 233.085 0.57 233.235 ; + RECT 0.255 259.005 0.57 259.155 ; + RECT 0.255 261.885 0.57 262.035 ; + RECT 0.255 264.765 0.57 264.915 ; + RECT 0.255 267.645 0.57 267.795 ; + RECT 0.255 270.525 0.57 270.675 ; + RECT 0.255 273.405 0.57 273.555 ; + RECT 0.255 276.285 0.57 276.435 ; + RECT 0.255 279.165 0.57 279.315 ; + RECT 0.255 282.045 0.57 282.195 ; + RECT 0.255 284.925 0.57 285.075 ; + RECT 0.255 235.965 0.57 236.115 ; + RECT 0.255 287.805 0.57 287.955 ; + RECT 0.255 290.685 0.57 290.835 ; + RECT 0.255 293.565 0.57 293.715 ; + RECT 0.255 296.445 0.57 296.595 ; + RECT 0.255 299.325 0.57 299.475 ; + RECT 0.255 302.205 0.57 302.355 ; + RECT 0.255 305.085 0.57 305.235 ; + RECT 0.255 307.965 0.57 308.115 ; + RECT 0.255 310.845 0.57 310.995 ; + RECT 0.255 313.725 0.57 313.875 ; + RECT 0.255 238.845 0.57 238.995 ; + RECT 0.255 316.605 0.57 316.755 ; + RECT 0.255 319.485 0.57 319.635 ; + RECT 0.255 322.365 0.57 322.515 ; + RECT 0.255 325.245 0.57 325.395 ; + RECT 0.255 328.125 0.57 328.275 ; + RECT 0.255 331.005 0.57 331.155 ; + RECT 0.255 333.885 0.57 334.035 ; + RECT 0.255 336.765 0.57 336.915 ; + RECT 0.255 339.645 0.57 339.795 ; + RECT 0.255 342.525 0.57 342.675 ; + RECT 0.255 241.725 0.57 241.875 ; + RECT 0.255 345.405 0.57 345.555 ; + RECT 0.255 348.285 0.57 348.435 ; + RECT 0.255 351.165 0.57 351.315 ; + RECT 0.255 354.045 0.57 354.195 ; + RECT 0.255 356.925 0.57 357.075 ; + RECT 0.255 359.805 0.57 359.955 ; + RECT 0.255 362.685 0.57 362.835 ; + RECT 0.255 365.565 0.57 365.715 ; + RECT 0.255 368.445 0.57 368.595 ; + RECT 0.255 371.325 0.57 371.475 ; + RECT 0.255 244.605 0.57 244.755 ; + RECT 0.255 374.205 0.57 374.355 ; + RECT 0.255 377.085 0.57 377.235 ; + RECT 0.255 379.965 0.57 380.115 ; + RECT 0.255 382.845 0.57 382.995 ; + RECT 0.255 385.725 0.57 385.875 ; + RECT 0.255 388.605 0.57 388.755 ; + RECT 0.255 391.485 0.57 391.635 ; + RECT 0.255 394.365 0.57 394.515 ; + RECT 0.255 397.245 0.57 397.395 ; + RECT 0.255 400.125 0.57 400.275 ; + RECT 0.255 247.485 0.57 247.635 ; + RECT 0.255 403.005 0.57 403.155 ; + RECT 0.255 405.885 0.57 406.035 ; + RECT 0.255 408.765 0.57 408.915 ; + RECT 0.255 411.645 0.57 411.795 ; + RECT 0.255 250.365 0.57 250.515 ; + RECT 0.255 253.245 0.57 253.395 ; + RECT 0.255 256.125 0.57 256.275 ; + RECT 15.63 187.305 16.17 187.415 ; + RECT 15.63 185.175 16.17 186.575 ; + RECT 16.17 187.305 16.71 187.415 ; + RECT 16.17 185.175 16.71 186.575 ; + RECT 16.71 187.305 17.25 187.415 ; + RECT 16.71 185.175 17.25 186.575 ; + RECT 15.09 187.305 15.63 187.415 ; + RECT 15.09 185.175 15.63 186.575 ; + RECT 14.49 187.305 15.09 187.415 ; + RECT 14.49 185.175 15.09 186.575 ; + RECT 17.25 187.305 17.79 187.415 ; + RECT 17.25 185.175 17.79 186.575 ; + RECT 17.79 187.305 18.33 187.415 ; + RECT 17.79 185.175 18.33 186.575 ; + RECT 18.33 187.305 18.87 187.415 ; + RECT 18.33 185.175 18.87 186.575 ; + RECT 19.41 187.305 20.01 187.415 ; + RECT 19.41 185.175 20.01 186.575 ; + RECT 18.87 187.305 19.41 187.415 ; + RECT 18.87 185.175 19.41 186.575 ; + RECT 15.09 227.445 15.63 227.555 ; + RECT 15.09 228.285 15.63 229.685 ; + RECT 14.49 227.445 15.09 227.555 ; + RECT 14.49 228.285 15.09 229.685 ; + RECT 15.63 227.445 16.17 227.555 ; + RECT 15.63 228.285 16.17 229.685 ; + RECT 16.17 227.445 16.71 227.555 ; + RECT 16.17 228.285 16.71 229.685 ; + RECT 16.71 227.445 17.25 227.555 ; + RECT 16.71 228.285 17.25 229.685 ; + RECT 17.25 227.445 17.79 227.555 ; + RECT 17.25 228.285 17.79 229.685 ; + RECT 17.79 227.445 18.33 227.555 ; + RECT 17.79 228.285 18.33 229.685 ; + RECT 18.33 227.445 18.87 227.555 ; + RECT 18.33 228.285 18.87 229.685 ; + RECT 19.41 227.445 20.01 227.555 ; + RECT 19.41 228.285 20.01 229.685 ; + RECT 18.87 227.445 19.41 227.555 ; + RECT 18.87 228.285 19.41 229.685 ; + RECT 20.01 185.175 21.165 186.575 ; + RECT 20.01 187.305 21.165 187.415 ; + RECT 20.97 187.415 21.165 187.835 ; + RECT 20.01 187.55 20.87 187.74 ; + RECT 20.01 188.225 21.165 188.325 ; + RECT 20.01 189.205 21.165 189.31 ; + RECT 20.97 189.31 21.165 189.655 ; + RECT 20.01 189.41 20.87 189.6 ; + RECT 20.97 189.835 21.165 190.175 ; + RECT 20.01 189.885 20.87 190.075 ; + RECT 20.92 190.175 21.165 190.33 ; + RECT 20.01 190.18 20.86 190.33 ; + RECT 20.01 190.72 21.165 190.785 ; + RECT 20.01 191.175 21.165 191.28 ; + RECT 20.01 191.67 21.165 191.77 ; + RECT 20.41 192.16 21.165 192.26 ; + RECT 20.01 192.65 21.165 192.755 ; + RECT 20.79 192.755 21.165 193.145 ; + RECT 20.01 193.145 21.165 193.245 ; + RECT 20.01 193.635 21.165 193.74 ; + RECT 20.97 193.74 21.165 194.13 ; + RECT 20.01 193.84 20.87 194.03 ; + RECT 20.01 194.13 21.165 194.23 ; + RECT 20.01 194.62 21.165 194.725 ; + RECT 20.01 195.115 21.165 195.215 ; + RECT 20.01 195.605 21.165 195.705 ; + RECT 20.01 196.095 21.165 196.2 ; + RECT 20.01 196.59 21.165 196.69 ; + RECT 20.01 197.08 21.165 197.18 ; + RECT 20.01 197.57 21.165 197.675 ; + RECT 20.97 197.675 21.165 198.065 ; + RECT 20.01 197.775 20.87 197.965 ; + RECT 20.01 198.065 21.165 198.165 ; + RECT 20.01 198.555 21.165 198.66 ; + RECT 20.01 199.05 21.165 199.15 ; + RECT 20.01 199.54 21.165 199.63 ; + RECT 20.01 200.04 21.165 200.135 ; + RECT 20.01 200.525 21.165 200.625 ; + RECT 20.01 201.015 21.165 201.12 ; + RECT 20.01 201.51 21.165 201.6 ; + RECT 20.97 201.6 21.165 202.01 ; + RECT 20.01 201.7 20.87 201.91 ; + RECT 20.01 202.01 21.165 202.105 ; + RECT 20.97 202.105 21.165 202.495 ; + RECT 20.01 202.495 21.165 202.6 ; + RECT 20.01 202.99 21.165 203.085 ; + RECT 20.01 203.475 21.165 203.58 ; + RECT 20.01 203.97 21.165 204.055 ; + RECT 20.97 204.055 21.165 205.055 ; + RECT 20.01 204.455 20.87 204.665 ; + RECT 20.01 204.78 20.86 204.97 ; + RECT 20.97 205.59 21.165 205.895 ; + RECT 20.01 205.645 20.87 205.835 ; + RECT 20.01 206.43 21.165 206.53 ; + RECT 20.01 206.92 21.165 207.02 ; + RECT 20.01 207.41 21.165 207.515 ; + RECT 20.01 207.905 21.165 208.005 ; + RECT 20.01 208.395 21.165 208.5 ; + RECT 20.97 209.035 21.165 209.335 ; + RECT 20.01 209.09 20.87 209.28 ; + RECT 20.97 209.87 21.165 210.87 ; + RECT 20.01 209.895 20.87 210.085 ; + RECT 20.01 210.23 20.87 210.44 ; + RECT 20.01 210.87 21.165 210.955 ; + RECT 20.01 211.345 21.165 211.45 ; + RECT 20.01 211.84 21.165 211.945 ; + RECT 20.01 212.335 21.165 212.425 ; + RECT 20.97 212.425 21.165 212.835 ; + RECT 20.01 212.835 21.165 212.915 ; + RECT 20.97 212.915 21.165 213.325 ; + RECT 20.01 213.015 20.87 213.225 ; + RECT 20.01 213.325 21.165 213.42 ; + RECT 20.01 213.81 21.165 213.91 ; + RECT 20.01 214.3 21.165 214.405 ; + RECT 20.01 214.795 21.165 214.885 ; + RECT 20.01 215.295 21.165 215.385 ; + RECT 20.01 215.775 21.165 215.88 ; + RECT 20.01 216.27 21.165 216.37 ; + RECT 20.01 216.76 21.165 216.865 ; + RECT 20.97 216.865 21.165 217.255 ; + RECT 20.01 216.965 20.87 217.155 ; + RECT 20.01 217.255 21.165 217.355 ; + RECT 20.01 217.745 21.165 217.845 ; + RECT 20.01 218.235 21.165 218.34 ; + RECT 20.01 218.73 21.165 218.83 ; + RECT 20.01 219.22 21.165 219.325 ; + RECT 20.01 219.715 21.165 219.815 ; + RECT 20.01 220.205 21.165 220.305 ; + RECT 20.41 220.695 21.165 220.79 ; + RECT 20.97 220.79 21.165 221.2 ; + RECT 20.01 220.89 20.87 221.1 ; + RECT 20.01 221.2 21.165 221.29 ; + RECT 20.01 221.68 21.165 221.775 ; + RECT 20.79 221.775 21.165 222.185 ; + RECT 20.74 222.185 21.165 222.275 ; + RECT 20.74 222.665 21.165 222.755 ; + RECT 20.01 223.165 21.165 223.225 ; + RECT 20.01 223.615 21.165 223.75 ; + RECT 20.01 224.14 21.165 224.21 ; + RECT 20.97 224.6 21.165 225.09 ; + RECT 20.01 224.6 20.87 224.75 ; + RECT 20.01 224.85 20.87 225.04 ; + RECT 20.97 225.27 21.165 225.615 ; + RECT 20.01 225.325 20.87 225.515 ; + RECT 20.01 225.615 21.165 225.72 ; + RECT 20.01 226.6 21.165 226.705 ; + RECT 20.97 227.095 21.165 227.445 ; + RECT 20.01 227.105 20.87 227.315 ; + RECT 20.01 227.445 21.165 227.555 ; + RECT 20.01 228.285 21.165 229.685 ; + RECT 14.49 187.55 19.41 187.74 ; + RECT 14.49 188.225 19.41 188.325 ; + RECT 14.49 189.205 19.41 189.31 ; + RECT 14.49 189.41 19.41 189.6 ; + RECT 14.49 189.885 19.41 190.075 ; + RECT 14.59 190.18 19.41 190.33 ; + RECT 14.49 190.72 19.41 190.785 ; + RECT 14.49 191.175 19.41 191.28 ; + RECT 14.49 191.67 19.41 191.77 ; + RECT 14.49 192.65 19.41 192.755 ; + RECT 14.49 193.145 19.41 193.245 ; + RECT 14.49 193.635 19.41 193.74 ; + RECT 14.49 193.84 19.41 194.03 ; + RECT 14.49 194.13 19.41 194.23 ; + RECT 14.49 194.62 19.41 194.725 ; + RECT 14.49 195.115 19.41 195.215 ; + RECT 14.49 195.605 19.41 195.705 ; + RECT 14.49 196.095 19.41 196.2 ; + RECT 14.49 196.59 19.41 196.69 ; + RECT 14.49 197.08 19.41 197.18 ; + RECT 14.49 197.57 19.41 197.675 ; + RECT 14.49 197.775 19.41 197.965 ; + RECT 14.49 198.065 19.41 198.165 ; + RECT 14.49 198.555 19.41 198.66 ; + RECT 14.49 199.05 19.41 199.15 ; + RECT 14.49 199.54 19.41 199.63 ; + RECT 14.49 200.04 19.41 200.135 ; + RECT 14.49 200.525 19.41 200.625 ; + RECT 14.49 201.015 19.41 201.12 ; + RECT 14.49 201.51 19.41 201.6 ; + RECT 14.49 201.7 19.41 201.91 ; + RECT 14.49 202.01 19.41 202.105 ; + RECT 14.49 202.495 19.41 202.6 ; + RECT 14.49 202.99 19.41 203.085 ; + RECT 14.49 203.475 19.41 203.58 ; + RECT 14.49 203.97 19.41 204.055 ; + RECT 14.49 204.445 14.595 204.68 ; + RECT 14.695 204.455 19.41 204.665 ; + RECT 14.49 204.78 19.41 204.97 ; + RECT 14.49 205.645 19.41 205.835 ; + RECT 14.49 206.43 19.41 206.53 ; + RECT 14.49 206.92 19.41 207.02 ; + RECT 14.49 207.41 19.41 207.515 ; + RECT 14.49 207.905 19.41 208.005 ; + RECT 14.49 208.395 19.41 208.5 ; + RECT 14.49 209.09 19.41 209.28 ; + RECT 14.49 209.895 19.41 210.085 ; + RECT 14.59 210.23 19.41 210.44 ; + RECT 14.49 210.87 19.41 210.955 ; + RECT 14.49 211.345 19.41 211.45 ; + RECT 14.49 211.84 19.41 211.945 ; + RECT 14.49 212.335 19.41 212.425 ; + RECT 14.49 212.835 19.41 212.915 ; + RECT 14.49 213.015 19.41 213.225 ; + RECT 14.49 213.325 19.41 213.42 ; + RECT 14.49 213.81 19.41 213.91 ; + RECT 14.49 214.3 19.41 214.405 ; + RECT 14.49 214.795 19.41 214.885 ; + RECT 14.49 215.295 19.41 215.385 ; + RECT 14.49 215.775 19.41 215.88 ; + RECT 14.49 216.27 19.41 216.37 ; + RECT 14.49 216.76 19.41 216.865 ; + RECT 14.49 216.965 19.41 217.155 ; + RECT 14.49 217.255 19.41 217.355 ; + RECT 14.49 217.745 19.41 217.845 ; + RECT 14.49 218.235 19.41 218.34 ; + RECT 14.49 218.73 19.41 218.83 ; + RECT 14.49 219.22 19.41 219.325 ; + RECT 14.49 219.715 19.41 219.815 ; + RECT 14.49 220.205 19.41 220.305 ; + RECT 14.49 220.89 19.41 221.1 ; + RECT 14.49 221.2 19.41 221.29 ; + RECT 14.49 221.68 19.41 221.775 ; + RECT 14.49 222.19 19.41 222.26 ; + RECT 14.49 222.68 19.445 222.75 ; + RECT 14.49 223.165 19.41 223.225 ; + RECT 14.49 223.615 19.41 223.75 ; + RECT 14.49 224.14 19.41 224.21 ; + RECT 14.49 224.6 14.63 224.75 ; + RECT 14.69 224.6 19.41 224.75 ; + RECT 14.49 224.85 19.41 225.04 ; + RECT 14.49 225.325 19.41 225.515 ; + RECT 14.49 225.615 19.41 225.72 ; + RECT 14.49 226.6 19.41 226.705 ; + RECT 14.49 227.105 19.41 227.315 ; + RECT 19.41 187.55 20.01 187.74 ; + RECT 19.41 188.225 20.01 188.325 ; + RECT 19.41 189.205 20.01 189.31 ; + RECT 19.41 189.41 20.01 189.6 ; + RECT 19.41 189.885 20.01 190.075 ; + RECT 19.41 190.18 20.175 190.33 ; + RECT 19.41 190.72 20.01 190.785 ; + RECT 19.41 191.175 20.01 191.28 ; + RECT 19.41 191.67 20.01 191.77 ; + RECT 19.41 192.65 20.01 192.755 ; + RECT 19.41 193.145 20.01 193.245 ; + RECT 19.41 193.635 20.01 193.74 ; + RECT 19.41 193.84 20.01 194.03 ; + RECT 19.41 194.13 20.01 194.23 ; + RECT 19.41 194.62 20.01 194.725 ; + RECT 19.41 195.115 20.01 195.215 ; + RECT 19.41 195.605 20.01 195.705 ; + RECT 19.41 196.095 20.01 196.2 ; + RECT 19.41 196.59 20.01 196.69 ; + RECT 19.41 197.08 20.01 197.18 ; + RECT 19.41 197.57 20.01 197.675 ; + RECT 19.41 197.775 20.01 197.965 ; + RECT 19.41 198.065 20.01 198.165 ; + RECT 19.41 198.555 20.01 198.66 ; + RECT 19.41 199.05 20.01 199.15 ; + RECT 19.41 199.54 20.01 199.63 ; + RECT 19.41 200.04 20.01 200.135 ; + RECT 19.41 200.525 20.01 200.625 ; + RECT 19.41 201.015 20.01 201.12 ; + RECT 19.41 201.51 20.01 201.6 ; + RECT 19.41 201.7 20.01 201.91 ; + RECT 19.41 202.01 20.01 202.105 ; + RECT 19.41 202.495 20.01 202.6 ; + RECT 19.41 202.99 20.01 203.085 ; + RECT 19.41 203.475 20.01 203.58 ; + RECT 19.41 203.97 20.01 204.055 ; + RECT 19.41 204.455 20.085 204.665 ; + RECT 19.41 204.78 20.01 204.97 ; + RECT 19.41 205.645 20.01 205.835 ; + RECT 19.41 206.43 20.01 206.53 ; + RECT 19.41 206.92 20.01 207.02 ; + RECT 19.41 207.41 20.01 207.515 ; + RECT 19.41 207.905 20.01 208.005 ; + RECT 19.41 208.395 20.01 208.5 ; + RECT 19.41 209.09 20.01 209.28 ; + RECT 19.41 209.895 20.01 210.085 ; + RECT 19.41 210.23 20.01 210.44 ; + RECT 19.41 210.87 20.01 210.955 ; + RECT 19.41 211.345 20.01 211.45 ; + RECT 19.41 211.84 20.01 211.945 ; + RECT 19.41 212.335 20.01 212.425 ; + RECT 19.41 212.835 20.01 212.915 ; + RECT 19.41 213.015 20.01 213.225 ; + RECT 19.41 213.325 20.01 213.42 ; + RECT 19.41 213.81 20.01 213.91 ; + RECT 19.41 214.3 20.01 214.405 ; + RECT 19.41 214.795 20.01 214.885 ; + RECT 19.41 215.295 20.01 215.385 ; + RECT 19.41 215.775 20.01 215.88 ; + RECT 19.41 216.27 20.01 216.37 ; + RECT 19.41 216.76 20.01 216.865 ; + RECT 19.41 216.965 20.01 217.155 ; + RECT 19.41 217.255 20.01 217.355 ; + RECT 19.41 217.745 20.01 217.845 ; + RECT 19.41 218.235 20.01 218.34 ; + RECT 19.41 218.73 20.01 218.83 ; + RECT 19.41 219.22 20.01 219.325 ; + RECT 19.41 219.715 20.01 219.815 ; + RECT 19.41 220.205 20.01 220.305 ; + RECT 19.41 220.89 20.01 221.1 ; + RECT 19.41 221.2 20.01 221.29 ; + RECT 19.41 221.68 20.01 221.775 ; + RECT 19.41 222.19 20.01 222.26 ; + RECT 19.41 222.68 20.01 222.75 ; + RECT 19.41 223.165 20.01 223.225 ; + RECT 19.41 223.615 20.01 223.75 ; + RECT 19.41 224.14 20.01 224.21 ; + RECT 19.41 224.6 20.01 224.75 ; + RECT 19.41 224.85 20.01 225.04 ; + RECT 19.41 225.325 20.01 225.515 ; + RECT 19.41 225.615 20.01 225.72 ; + RECT 19.41 226.6 20.01 226.705 ; + RECT 19.41 227.105 20.01 227.315 ; + RECT 0.295 192.855 20.69 193.045 ; + RECT 0.215 202.205 20.87 202.395 ; + RECT 0.21 204.155 20.86 204.345 ; + RECT 0.22 210.58 20.87 210.77 ; + RECT 0.225 212.525 20.87 212.735 ; + RECT 0.225 221.875 20.69 222.085 ; + RECT 0.225 222.19 0.57 222.26 ; + RECT 0.22 222.68 0.57 222.75 ; + RECT 11.61 188.72 21.07 188.81 ; + RECT 11.61 189.705 21.07 189.785 ; + RECT 14.2 192.165 20.36 192.255 ; + RECT 13.85 205.45 21.07 205.54 ; + RECT 13.85 205.945 21.07 206.035 ; + RECT 7.07 207.415 13.545 207.515 ; + RECT 13.85 208.895 21.07 208.985 ; + RECT 13.85 209.385 21.07 209.475 ; + RECT 14.2 220.7 20.36 220.79 ; + RECT 0.57 221.205 2.735 221.275 ; + RECT 12.605 225.14 21.07 225.22 ; + RECT 12.605 226.115 21.07 226.205 ; + RECT 20.01 222.19 20.69 222.26 ; + RECT 20.01 222.68 20.69 222.75 ; + LAYER VIA1 DESIGNRULEWIDTH 0.07 ; + RECT 0 0 21.165 414.86 ; + LAYER VIA2 DESIGNRULEWIDTH 0.07 ; + RECT 0 0 21.165 414.86 ; + LAYER VIA3 DESIGNRULEWIDTH 0.07 ; + RECT 0.435 186.415 0.485 186.545 ; + RECT 0.435 187.58 0.485 187.71 ; + RECT 0.435 189.445 0.485 189.575 ; + RECT 0.435 189.915 0.485 190.045 ; + RECT 0.435 193.87 0.485 194 ; + RECT 0.435 197.805 0.485 197.935 ; + RECT 0.435 201.74 0.485 201.87 ; + RECT 0.435 204.865 0.485 204.995 ; + RECT 0.435 205.675 0.485 205.805 ; + RECT 0.435 209.12 0.485 209.25 ; + RECT 0.435 209.93 0.485 210.06 ; + RECT 0.435 213.055 0.485 213.185 ; + RECT 0.435 216.995 0.485 217.125 ; + RECT 0.435 220.93 0.485 221.06 ; + RECT 0.435 224.88 0.485 225.01 ; + RECT 0.435 225.355 0.485 225.485 ; + RECT 0.435 227.145 0.485 227.275 ; + RECT 0.435 228.315 0.485 228.445 ; + RECT 0.435 186.875 0.485 187.005 ; + RECT 0.435 192.885 0.485 193.015 ; + RECT 0.435 221.915 0.485 222.045 ; + RECT 0.435 227.855 0.485 227.985 ; + RECT 1.085 186.415 1.135 186.545 ; + RECT 1.38 186.415 1.43 186.545 ; + RECT 1.86 186.415 1.91 186.545 ; + RECT 2.01 186.415 2.06 186.545 ; + RECT 3.25 186.415 3.3 186.545 ; + RECT 3.515 186.415 3.565 186.545 ; + RECT 4.51 186.415 4.56 186.545 ; + RECT 5.035 186.415 5.085 186.545 ; + RECT 6.22 186.415 6.27 186.545 ; + RECT 7.5 186.415 7.55 186.545 ; + RECT 9.315 186.415 9.365 186.545 ; + RECT 9.72 186.415 9.77 186.545 ; + RECT 11.025 186.415 11.075 186.545 ; + RECT 0.62 186.645 0.67 186.775 ; + RECT 3.65 186.645 3.7 186.775 ; + RECT 7.19 186.645 7.24 186.775 ; + RECT 14.14 186.645 14.19 186.775 ; + RECT 2.18 186.875 2.23 187.005 ; + RECT 8.56 186.875 8.61 187.005 ; + RECT 10.27 186.875 10.32 187.005 ; + RECT 13.8 187.105 13.85 187.235 ; + RECT 1.045 187.555 1.175 187.605 ; + RECT 1.34 187.555 1.47 187.605 ; + RECT 4.47 187.555 4.6 187.605 ; + RECT 9.275 187.555 9.405 187.605 ; + RECT 1.86 187.58 1.91 187.71 ; + RECT 2.01 187.58 2.06 187.71 ; + RECT 3.25 187.58 3.3 187.71 ; + RECT 3.515 187.58 3.565 187.71 ; + RECT 5.035 187.58 5.085 187.71 ; + RECT 6.22 187.58 6.27 187.71 ; + RECT 7.5 187.58 7.55 187.71 ; + RECT 9.72 187.58 9.77 187.71 ; + RECT 11.025 187.58 11.075 187.71 ; + RECT 1.045 187.685 1.175 187.735 ; + RECT 1.34 187.685 1.47 187.735 ; + RECT 4.47 187.685 4.6 187.735 ; + RECT 9.275 187.685 9.405 187.735 ; + RECT 3.02 187.94 3.15 187.99 ; + RECT 1.57 187.965 1.62 188.095 ; + RECT 4.87 187.965 4.92 188.095 ; + RECT 5.9 187.965 5.95 188.095 ; + RECT 8.955 187.965 9.005 188.095 ; + RECT 12.79 187.965 12.84 188.095 ; + RECT 14.33 187.965 14.38 188.095 ; + RECT 3.02 188.07 3.15 188.12 ; + RECT 3.8 188.43 3.93 188.48 ; + RECT 5.635 188.43 5.765 188.48 ; + RECT 8.31 188.43 8.44 188.48 ; + RECT 8.73 188.43 8.86 188.48 ; + RECT 0.9 188.455 0.95 188.585 ; + RECT 2.485 188.455 2.535 188.585 ; + RECT 2.615 188.455 2.665 188.585 ; + RECT 6.065 188.455 6.115 188.585 ; + RECT 6.725 188.455 6.775 188.585 ; + RECT 11.555 188.455 11.865 188.585 ; + RECT 12.52 188.455 12.57 188.585 ; + RECT 14.005 188.455 14.055 188.585 ; + RECT 3.8 188.56 3.93 188.61 ; + RECT 5.635 188.56 5.765 188.61 ; + RECT 8.31 188.56 8.44 188.61 ; + RECT 8.73 188.56 8.86 188.61 ; + RECT 11.685 188.74 11.735 188.79 ; + RECT 12.655 188.74 12.705 188.79 ; + RECT 3.02 188.92 3.15 188.97 ; + RECT 1.57 188.945 1.62 189.075 ; + RECT 4.87 188.945 4.92 189.075 ; + RECT 5.9 188.945 5.95 189.075 ; + RECT 8.955 188.945 9.005 189.075 ; + RECT 12.79 188.945 12.84 189.075 ; + RECT 14.335 188.945 14.385 189.075 ; + RECT 3.02 189.05 3.15 189.1 ; + RECT 1.045 189.42 1.175 189.47 ; + RECT 1.34 189.42 1.47 189.47 ; + RECT 4.47 189.42 4.6 189.47 ; + RECT 9.275 189.42 9.405 189.47 ; + RECT 13.675 189.44 13.725 189.57 ; + RECT 1.86 189.445 1.91 189.575 ; + RECT 2.01 189.445 2.06 189.575 ; + RECT 3.25 189.445 3.3 189.575 ; + RECT 3.515 189.445 3.565 189.575 ; + RECT 5.035 189.445 5.085 189.575 ; + RECT 6.22 189.445 6.27 189.575 ; + RECT 7.5 189.445 7.55 189.575 ; + RECT 9.72 189.445 9.77 189.575 ; + RECT 11.025 189.445 11.075 189.575 ; + RECT 1.045 189.55 1.175 189.6 ; + RECT 1.34 189.55 1.47 189.6 ; + RECT 4.47 189.55 4.6 189.6 ; + RECT 9.275 189.55 9.405 189.6 ; + RECT 11.685 189.72 11.735 189.77 ; + RECT 12.655 189.72 12.705 189.77 ; + RECT 1.045 189.89 1.175 189.94 ; + RECT 1.34 189.89 1.47 189.94 ; + RECT 4.47 189.89 4.6 189.94 ; + RECT 9.275 189.89 9.405 189.94 ; + RECT 1.86 189.915 1.91 190.045 ; + RECT 2.01 189.915 2.06 190.045 ; + RECT 3.25 189.915 3.3 190.045 ; + RECT 3.515 189.915 3.565 190.045 ; + RECT 5.035 189.915 5.085 190.045 ; + RECT 6.22 189.915 6.27 190.045 ; + RECT 7.5 189.915 7.55 190.045 ; + RECT 9.72 189.915 9.77 190.045 ; + RECT 11.025 189.915 11.075 190.045 ; + RECT 1.045 190.02 1.175 190.07 ; + RECT 1.34 190.02 1.47 190.07 ; + RECT 4.47 190.02 4.6 190.07 ; + RECT 9.275 190.02 9.405 190.07 ; + RECT 3.8 190.435 3.93 190.485 ; + RECT 5.635 190.435 5.765 190.485 ; + RECT 8.31 190.435 8.44 190.485 ; + RECT 8.73 190.435 8.86 190.485 ; + RECT 0.9 190.46 0.95 190.59 ; + RECT 2.485 190.46 2.535 190.59 ; + RECT 2.615 190.46 2.665 190.59 ; + RECT 6.065 190.46 6.115 190.59 ; + RECT 6.725 190.46 6.775 190.59 ; + RECT 11.555 190.46 11.865 190.59 ; + RECT 12.52 190.46 12.57 190.59 ; + RECT 14.005 190.46 14.055 190.59 ; + RECT 3.8 190.565 3.93 190.615 ; + RECT 5.635 190.565 5.765 190.615 ; + RECT 8.31 190.565 8.44 190.615 ; + RECT 8.73 190.565 8.86 190.615 ; + RECT 3.02 190.89 3.15 190.94 ; + RECT 1.57 190.915 1.62 191.045 ; + RECT 4.87 190.915 4.92 191.045 ; + RECT 5.9 190.915 5.95 191.045 ; + RECT 8.955 190.915 9.005 191.045 ; + RECT 12.79 190.915 12.84 191.045 ; + RECT 14.335 190.915 14.385 191.045 ; + RECT 3.02 191.02 3.15 191.07 ; + RECT 4.035 191.41 4.085 191.54 ; + RECT 6.495 191.41 6.545 191.54 ; + RECT 11.685 191.41 11.735 191.54 ; + RECT 12.655 191.41 12.705 191.54 ; + RECT 3.02 191.875 3.15 191.925 ; + RECT 1.57 191.9 1.62 192.03 ; + RECT 4.87 191.9 4.92 192.03 ; + RECT 5.9 191.9 5.95 192.03 ; + RECT 8.955 191.9 9.005 192.03 ; + RECT 12.79 191.9 12.84 192.03 ; + RECT 14.335 191.9 14.385 192.03 ; + RECT 3.02 192.005 3.15 192.055 ; + RECT 14.29 192.185 14.42 192.235 ; + RECT 4.035 192.39 4.085 192.52 ; + RECT 6.495 192.39 6.545 192.52 ; + RECT 2.18 192.885 2.23 193.015 ; + RECT 8.56 192.885 8.61 193.015 ; + RECT 10.27 192.885 10.32 193.015 ; + RECT 3.8 193.35 3.93 193.4 ; + RECT 5.635 193.35 5.765 193.4 ; + RECT 8.31 193.35 8.44 193.4 ; + RECT 8.73 193.35 8.86 193.4 ; + RECT 0.9 193.375 0.95 193.505 ; + RECT 2.485 193.375 2.535 193.505 ; + RECT 2.615 193.375 2.665 193.505 ; + RECT 6.065 193.375 6.115 193.505 ; + RECT 6.725 193.375 6.775 193.505 ; + RECT 11.555 193.375 11.865 193.505 ; + RECT 12.52 193.375 12.57 193.505 ; + RECT 14.005 193.375 14.055 193.505 ; + RECT 3.8 193.48 3.93 193.53 ; + RECT 5.635 193.48 5.765 193.53 ; + RECT 8.31 193.48 8.44 193.53 ; + RECT 8.73 193.48 8.86 193.53 ; + RECT 1.045 193.845 1.175 193.895 ; + RECT 1.34 193.845 1.47 193.895 ; + RECT 4.47 193.845 4.6 193.895 ; + RECT 1.86 193.87 1.91 194 ; + RECT 2.01 193.87 2.06 194 ; + RECT 2.32 193.87 2.37 194 ; + RECT 3.25 193.87 3.3 194 ; + RECT 3.515 193.87 3.565 194 ; + RECT 5.035 193.87 5.085 194 ; + RECT 6.22 193.87 6.27 194 ; + RECT 7.5 193.87 7.55 194 ; + RECT 9.72 193.87 9.77 194 ; + RECT 11.025 193.87 11.075 194 ; + RECT 1.045 193.975 1.175 194.025 ; + RECT 1.34 193.975 1.47 194.025 ; + RECT 4.47 193.975 4.6 194.025 ; + RECT 3.8 194.335 3.93 194.385 ; + RECT 5.635 194.335 5.765 194.385 ; + RECT 8.31 194.335 8.44 194.385 ; + RECT 8.73 194.335 8.86 194.385 ; + RECT 0.9 194.36 0.95 194.49 ; + RECT 2.485 194.36 2.535 194.49 ; + RECT 2.615 194.36 2.665 194.49 ; + RECT 6.065 194.36 6.115 194.49 ; + RECT 6.725 194.36 6.775 194.49 ; + RECT 11.555 194.36 11.865 194.49 ; + RECT 12.52 194.36 12.57 194.49 ; + RECT 14.005 194.36 14.055 194.49 ; + RECT 3.8 194.465 3.93 194.515 ; + RECT 5.635 194.465 5.765 194.515 ; + RECT 8.31 194.465 8.44 194.515 ; + RECT 8.73 194.465 8.86 194.515 ; + RECT 3.02 194.83 3.15 194.88 ; + RECT 1.57 194.855 1.62 194.985 ; + RECT 4.87 194.855 4.92 194.985 ; + RECT 5.9 194.855 5.95 194.985 ; + RECT 9.195 194.855 9.245 194.985 ; + RECT 10.27 194.855 10.32 194.985 ; + RECT 12.79 194.855 12.84 194.985 ; + RECT 14.335 194.855 14.385 194.985 ; + RECT 3.02 194.96 3.15 195.01 ; + RECT 4.035 195.345 4.085 195.475 ; + RECT 3.02 195.81 3.15 195.86 ; + RECT 1.57 195.835 1.62 195.965 ; + RECT 4.87 195.835 4.92 195.965 ; + RECT 5.9 195.835 5.95 195.965 ; + RECT 9.195 195.835 9.245 195.965 ; + RECT 9.43 195.835 9.48 195.965 ; + RECT 10.27 195.835 10.32 195.965 ; + RECT 12.79 195.835 12.84 195.965 ; + RECT 14.335 195.835 14.385 195.965 ; + RECT 3.02 195.94 3.15 195.99 ; + RECT 0.9 196.305 14.055 196.485 ; + RECT 3.02 196.795 3.15 196.845 ; + RECT 1.57 196.82 1.62 196.95 ; + RECT 4.87 196.82 4.92 196.95 ; + RECT 5.9 196.82 5.95 196.95 ; + RECT 9.43 196.82 9.48 196.95 ; + RECT 10.27 196.82 10.32 196.95 ; + RECT 12.79 196.82 12.84 196.95 ; + RECT 14.33 196.82 14.38 196.95 ; + RECT 3.02 196.925 3.15 196.975 ; + RECT 3.8 197.285 3.93 197.335 ; + RECT 5.635 197.285 5.765 197.335 ; + RECT 8.31 197.285 8.44 197.335 ; + RECT 8.73 197.285 8.86 197.335 ; + RECT 0.9 197.31 0.95 197.44 ; + RECT 2.485 197.31 2.535 197.44 ; + RECT 2.615 197.31 2.665 197.44 ; + RECT 6.065 197.31 6.115 197.44 ; + RECT 6.725 197.31 6.775 197.44 ; + RECT 11.555 197.31 11.865 197.44 ; + RECT 12.52 197.31 12.57 197.44 ; + RECT 14.005 197.31 14.055 197.44 ; + RECT 3.8 197.415 3.93 197.465 ; + RECT 5.635 197.415 5.765 197.465 ; + RECT 8.31 197.415 8.44 197.465 ; + RECT 8.73 197.415 8.86 197.465 ; + RECT 1.045 197.78 1.175 197.83 ; + RECT 1.34 197.78 1.47 197.83 ; + RECT 4.47 197.78 4.6 197.83 ; + RECT 1.86 197.805 1.91 197.935 ; + RECT 2.01 197.805 2.06 197.935 ; + RECT 2.32 197.805 2.37 197.935 ; + RECT 3.25 197.805 3.3 197.935 ; + RECT 3.515 197.805 3.565 197.935 ; + RECT 5.035 197.805 5.085 197.935 ; + RECT 6.22 197.805 6.27 197.935 ; + RECT 7.5 197.805 7.55 197.935 ; + RECT 9.72 197.805 9.77 197.935 ; + RECT 11.025 197.805 11.075 197.935 ; + RECT 1.045 197.91 1.175 197.96 ; + RECT 1.34 197.91 1.47 197.96 ; + RECT 4.47 197.91 4.6 197.96 ; + RECT 3.8 198.27 3.93 198.32 ; + RECT 5.635 198.27 5.765 198.32 ; + RECT 8.31 198.27 8.44 198.32 ; + RECT 8.73 198.27 8.86 198.32 ; + RECT 0.9 198.295 0.95 198.425 ; + RECT 2.485 198.295 2.535 198.425 ; + RECT 2.615 198.295 2.665 198.425 ; + RECT 6.065 198.295 6.115 198.425 ; + RECT 6.725 198.295 6.775 198.425 ; + RECT 11.555 198.295 11.865 198.425 ; + RECT 12.52 198.295 12.57 198.425 ; + RECT 14.005 198.295 14.055 198.425 ; + RECT 3.8 198.4 3.93 198.45 ; + RECT 5.635 198.4 5.765 198.45 ; + RECT 8.31 198.4 8.44 198.45 ; + RECT 8.73 198.4 8.86 198.45 ; + RECT 3.02 198.765 3.15 198.815 ; + RECT 1.57 198.79 1.62 198.92 ; + RECT 4.87 198.79 4.92 198.92 ; + RECT 5.9 198.79 5.95 198.92 ; + RECT 6.375 198.79 6.425 198.92 ; + RECT 10.27 198.79 10.32 198.92 ; + RECT 12.65 198.79 12.84 198.92 ; + RECT 14.33 198.79 14.38 198.92 ; + RECT 3.02 198.895 3.15 198.945 ; + RECT 4.035 199.28 4.085 199.41 ; + RECT 6.835 199.565 6.885 199.615 ; + RECT 3.02 199.745 3.15 199.795 ; + RECT 1.57 199.77 1.62 199.9 ; + RECT 4.87 199.77 4.92 199.9 ; + RECT 5.9 199.77 5.95 199.9 ; + RECT 6.375 199.77 6.425 199.9 ; + RECT 7.015 199.77 7.065 199.9 ; + RECT 10.27 199.77 10.32 199.9 ; + RECT 12.79 199.77 12.84 199.9 ; + RECT 14.33 199.77 14.38 199.9 ; + RECT 3.02 199.875 3.15 199.925 ; + RECT 4.035 200.265 4.085 200.395 ; + RECT 3.02 200.73 3.15 200.78 ; + RECT 1.57 200.755 1.62 200.885 ; + RECT 4.87 200.755 4.92 200.885 ; + RECT 5.9 200.755 5.95 200.885 ; + RECT 6.375 200.755 6.425 200.885 ; + RECT 7.015 200.755 7.065 200.885 ; + RECT 10.27 200.755 10.32 200.885 ; + RECT 12.79 200.755 12.84 200.885 ; + RECT 14.33 200.755 14.38 200.885 ; + RECT 3.02 200.86 3.15 200.91 ; + RECT 0.9 201.25 0.95 201.38 ; + RECT 2.485 201.25 2.535 201.38 ; + RECT 2.615 201.25 2.665 201.38 ; + RECT 6.065 201.25 6.115 201.38 ; + RECT 6.675 201.25 6.725 201.38 ; + RECT 11.555 201.25 11.865 201.38 ; + RECT 12.52 201.25 12.57 201.38 ; + RECT 14.005 201.25 14.055 201.38 ; + RECT 3.8 201.29 3.93 201.34 ; + RECT 5.635 201.29 5.765 201.34 ; + RECT 8.31 201.29 8.44 201.34 ; + RECT 8.73 201.29 8.86 201.34 ; + RECT 9.315 201.535 9.445 201.585 ; + RECT 1.045 201.715 1.175 201.765 ; + RECT 1.34 201.715 1.47 201.765 ; + RECT 4.47 201.715 4.6 201.765 ; + RECT 1.86 201.74 1.91 201.87 ; + RECT 2.01 201.74 2.06 201.87 ; + RECT 2.32 201.74 2.37 201.87 ; + RECT 3.25 201.74 3.3 201.87 ; + RECT 3.515 201.74 3.565 201.87 ; + RECT 5.035 201.74 5.085 201.87 ; + RECT 6.22 201.74 6.27 201.87 ; + RECT 7.5 201.74 7.55 201.87 ; + RECT 9.72 201.74 9.77 201.87 ; + RECT 11.025 201.74 11.075 201.87 ; + RECT 1.045 201.845 1.175 201.895 ; + RECT 1.34 201.845 1.47 201.895 ; + RECT 4.47 201.845 4.6 201.895 ; + RECT 0.62 202.235 0.67 202.365 ; + RECT 3.65 202.235 3.7 202.365 ; + RECT 7.19 202.235 7.24 202.365 ; + RECT 14.14 202.235 14.19 202.365 ; + RECT 3.02 202.705 3.15 202.755 ; + RECT 1.57 202.73 1.62 202.86 ; + RECT 4.87 202.73 4.92 202.86 ; + RECT 5.9 202.73 5.95 202.86 ; + RECT 6.375 202.73 6.425 202.86 ; + RECT 7.015 202.73 7.065 202.86 ; + RECT 10.27 202.73 10.32 202.86 ; + RECT 12.79 202.73 12.84 202.86 ; + RECT 14.335 202.73 14.385 202.86 ; + RECT 3.02 202.835 3.15 202.885 ; + RECT 4.035 203.215 4.085 203.345 ; + RECT 11.685 203.215 11.735 203.345 ; + RECT 13.9 203.215 13.95 203.345 ; + RECT 3.02 203.685 3.15 203.735 ; + RECT 1.57 203.71 1.62 203.84 ; + RECT 4.87 203.71 4.92 203.84 ; + RECT 5.9 203.71 5.95 203.84 ; + RECT 6.375 203.71 6.425 203.84 ; + RECT 7.015 203.71 7.065 203.84 ; + RECT 10.27 203.71 10.32 203.84 ; + RECT 12.79 203.71 12.84 203.84 ; + RECT 14.335 203.71 14.385 203.84 ; + RECT 3.02 203.815 3.15 203.865 ; + RECT 13.8 204.185 13.85 204.315 ; + RECT 13.675 204.81 13.725 204.94 ; + RECT 1.085 204.865 1.135 204.995 ; + RECT 1.38 204.865 1.43 204.995 ; + RECT 1.86 204.865 1.91 204.995 ; + RECT 2.01 204.865 2.06 204.995 ; + RECT 2.32 204.865 2.37 204.995 ; + RECT 3.25 204.865 3.3 204.995 ; + RECT 3.515 204.865 3.565 204.995 ; + RECT 4.51 204.865 4.56 204.995 ; + RECT 5.035 204.865 5.085 204.995 ; + RECT 6.22 204.865 6.27 204.995 ; + RECT 7.5 204.865 7.55 204.995 ; + RECT 9.72 204.865 9.77 204.995 ; + RECT 11.025 204.865 11.075 204.995 ; + RECT 3.8 205.16 3.93 205.21 ; + RECT 5.635 205.16 5.765 205.21 ; + RECT 8.31 205.16 8.44 205.21 ; + RECT 8.73 205.16 8.86 205.21 ; + RECT 0.9 205.185 0.95 205.315 ; + RECT 2.485 205.185 2.535 205.315 ; + RECT 2.615 205.185 2.665 205.315 ; + RECT 6.065 205.185 6.115 205.315 ; + RECT 6.675 205.185 6.725 205.315 ; + RECT 11.555 205.185 11.865 205.315 ; + RECT 12.52 205.185 12.57 205.315 ; + RECT 14.005 205.185 14.055 205.315 ; + RECT 3.8 205.29 3.93 205.34 ; + RECT 5.635 205.29 5.765 205.34 ; + RECT 8.31 205.29 8.44 205.34 ; + RECT 8.73 205.29 8.86 205.34 ; + RECT 13.9 205.47 13.95 205.52 ; + RECT 1.045 205.65 1.175 205.7 ; + RECT 1.34 205.65 1.47 205.7 ; + RECT 4.47 205.65 4.6 205.7 ; + RECT 1.86 205.675 1.91 205.805 ; + RECT 2.01 205.675 2.06 205.805 ; + RECT 2.32 205.675 2.37 205.805 ; + RECT 3.25 205.675 3.3 205.805 ; + RECT 3.515 205.675 3.565 205.805 ; + RECT 5.035 205.675 5.085 205.805 ; + RECT 6.22 205.675 6.27 205.805 ; + RECT 7.5 205.675 7.55 205.805 ; + RECT 9.72 205.675 9.77 205.805 ; + RECT 11.025 205.675 11.075 205.805 ; + RECT 1.045 205.78 1.175 205.83 ; + RECT 1.34 205.78 1.47 205.83 ; + RECT 4.47 205.78 4.6 205.83 ; + RECT 13.9 205.965 13.95 206.015 ; + RECT 3.8 206.145 3.93 206.195 ; + RECT 5.635 206.145 5.765 206.195 ; + RECT 8.31 206.145 8.44 206.195 ; + RECT 8.73 206.145 8.86 206.195 ; + RECT 0.9 206.17 0.95 206.3 ; + RECT 2.485 206.17 2.535 206.3 ; + RECT 2.615 206.17 2.665 206.3 ; + RECT 6.065 206.17 6.115 206.3 ; + RECT 6.675 206.17 6.725 206.3 ; + RECT 10.12 206.17 10.17 206.3 ; + RECT 11.555 206.17 11.865 206.3 ; + RECT 12.52 206.17 12.57 206.3 ; + RECT 14.005 206.17 14.055 206.3 ; + RECT 3.8 206.275 3.93 206.325 ; + RECT 5.635 206.275 5.765 206.325 ; + RECT 8.31 206.275 8.44 206.325 ; + RECT 8.73 206.275 8.86 206.325 ; + RECT 3.02 206.635 3.15 206.685 ; + RECT 1.57 206.66 1.62 206.79 ; + RECT 4.87 206.66 4.92 206.79 ; + RECT 5.9 206.66 5.95 206.79 ; + RECT 6.375 206.66 6.425 206.79 ; + RECT 7.015 206.66 7.065 206.79 ; + RECT 9.11 206.66 9.16 206.79 ; + RECT 10.27 206.66 10.32 206.79 ; + RECT 12.79 206.66 12.84 206.79 ; + RECT 14.335 206.66 14.385 206.79 ; + RECT 3.02 206.765 3.15 206.815 ; + RECT 4.035 207.15 4.085 207.28 ; + RECT 13.9 207.15 13.95 207.28 ; + RECT 7.19 207.44 7.24 207.49 ; + RECT 12.655 207.44 12.705 207.49 ; + RECT 4.035 207.645 4.085 207.775 ; + RECT 13.9 207.645 13.95 207.775 ; + RECT 3.02 208.11 3.15 208.16 ; + RECT 1.57 208.135 1.62 208.265 ; + RECT 4.87 208.135 4.92 208.265 ; + RECT 5.9 208.135 5.95 208.265 ; + RECT 6.375 208.135 6.425 208.265 ; + RECT 7.015 208.135 7.065 208.265 ; + RECT 9.11 208.135 9.16 208.265 ; + RECT 10.27 208.135 10.32 208.265 ; + RECT 12.79 208.135 12.84 208.265 ; + RECT 14.335 208.135 14.385 208.265 ; + RECT 3.02 208.24 3.15 208.29 ; + RECT 3.8 208.605 3.93 208.655 ; + RECT 4.22 208.605 4.35 208.655 ; + RECT 5.635 208.605 5.765 208.655 ; + RECT 8.31 208.605 8.44 208.655 ; + RECT 8.73 208.605 8.86 208.655 ; + RECT 0.9 208.63 0.95 208.76 ; + RECT 2.485 208.63 2.535 208.76 ; + RECT 2.615 208.63 2.665 208.76 ; + RECT 6.065 208.63 6.115 208.76 ; + RECT 6.675 208.63 6.725 208.76 ; + RECT 10.12 208.63 10.17 208.76 ; + RECT 11.555 208.63 11.865 208.76 ; + RECT 12.52 208.63 12.57 208.76 ; + RECT 14.005 208.63 14.055 208.76 ; + RECT 3.8 208.735 3.93 208.785 ; + RECT 4.22 208.735 4.35 208.785 ; + RECT 5.635 208.735 5.765 208.785 ; + RECT 8.31 208.735 8.44 208.785 ; + RECT 8.73 208.735 8.86 208.785 ; + RECT 13.9 208.915 13.95 208.965 ; + RECT 1.045 209.095 1.175 209.145 ; + RECT 1.34 209.095 1.47 209.145 ; + RECT 4.47 209.095 4.6 209.145 ; + RECT 1.86 209.12 1.91 209.25 ; + RECT 2.01 209.12 2.06 209.25 ; + RECT 2.32 209.12 2.37 209.25 ; + RECT 3.25 209.12 3.3 209.25 ; + RECT 3.515 209.12 3.565 209.25 ; + RECT 5.035 209.12 5.085 209.25 ; + RECT 6.22 209.12 6.27 209.25 ; + RECT 7.5 209.12 7.55 209.25 ; + RECT 9.72 209.12 9.77 209.25 ; + RECT 11.025 209.12 11.075 209.25 ; + RECT 1.045 209.225 1.175 209.275 ; + RECT 1.34 209.225 1.47 209.275 ; + RECT 4.47 209.225 4.6 209.275 ; + RECT 13.9 209.405 13.95 209.455 ; + RECT 0.9 209.585 14.055 209.765 ; + RECT 13.675 209.925 13.725 210.055 ; + RECT 1.085 209.93 1.135 210.06 ; + RECT 1.38 209.93 1.43 210.06 ; + RECT 1.86 209.93 1.91 210.06 ; + RECT 2.01 209.93 2.06 210.06 ; + RECT 2.32 209.93 2.37 210.06 ; + RECT 3.25 209.93 3.3 210.06 ; + RECT 3.515 209.93 3.565 210.06 ; + RECT 4.51 209.93 4.56 210.06 ; + RECT 5.035 209.93 5.085 210.06 ; + RECT 6.22 209.93 6.27 210.06 ; + RECT 7.5 209.93 7.55 210.06 ; + RECT 9.72 209.93 9.77 210.06 ; + RECT 11.025 209.93 11.075 210.06 ; + RECT 13.8 210.61 13.85 210.74 ; + RECT 3.02 211.06 3.15 211.11 ; + RECT 1.57 211.085 1.62 211.215 ; + RECT 4.87 211.085 4.92 211.215 ; + RECT 6.375 211.085 6.425 211.215 ; + RECT 7.015 211.085 7.065 211.215 ; + RECT 10.27 211.085 10.32 211.215 ; + RECT 12.79 211.085 12.84 211.215 ; + RECT 14.33 211.085 14.38 211.215 ; + RECT 3.02 211.19 3.15 211.24 ; + RECT 4.035 211.58 4.085 211.71 ; + RECT 12.655 211.58 12.705 211.71 ; + RECT 13.9 211.58 13.95 211.71 ; + RECT 3.02 212.05 3.15 212.1 ; + RECT 1.57 212.075 1.62 212.205 ; + RECT 4.87 212.075 4.92 212.205 ; + RECT 6.375 212.075 6.425 212.205 ; + RECT 7.015 212.075 7.065 212.205 ; + RECT 10.27 212.075 10.32 212.205 ; + RECT 12.79 212.075 12.84 212.205 ; + RECT 14.33 212.075 14.38 212.205 ; + RECT 3.02 212.18 3.15 212.23 ; + RECT 0.62 212.565 0.67 212.695 ; + RECT 3.65 212.565 3.7 212.695 ; + RECT 7.19 212.565 7.24 212.695 ; + RECT 14.14 212.565 14.19 212.695 ; + RECT 6.85 212.85 6.9 212.9 ; + RECT 1.045 213.03 1.175 213.08 ; + RECT 1.34 213.03 1.47 213.08 ; + RECT 4.47 213.03 4.6 213.08 ; + RECT 1.86 213.055 1.91 213.185 ; + RECT 2.01 213.055 2.06 213.185 ; + RECT 2.32 213.055 2.37 213.185 ; + RECT 3.25 213.055 3.3 213.185 ; + RECT 3.515 213.055 3.565 213.185 ; + RECT 5.035 213.055 5.085 213.185 ; + RECT 6.22 213.055 6.27 213.185 ; + RECT 7.5 213.055 7.55 213.185 ; + RECT 9.72 213.055 9.77 213.185 ; + RECT 11.025 213.055 11.075 213.185 ; + RECT 1.045 213.16 1.175 213.21 ; + RECT 1.34 213.16 1.47 213.21 ; + RECT 4.47 213.16 4.6 213.21 ; + RECT 0.9 213.525 14.055 213.705 ; + RECT 3.02 214.015 3.15 214.065 ; + RECT 1.57 214.04 1.62 214.17 ; + RECT 4.87 214.04 4.92 214.17 ; + RECT 6.375 214.04 6.425 214.17 ; + RECT 7.015 214.04 7.065 214.17 ; + RECT 10.27 214.04 10.32 214.17 ; + RECT 12.79 214.04 12.84 214.17 ; + RECT 14.33 214.04 14.38 214.17 ; + RECT 3.02 214.145 3.15 214.195 ; + RECT 4.035 214.535 4.085 214.665 ; + RECT 12.655 214.535 12.705 214.665 ; + RECT 13.9 214.535 13.95 214.665 ; + RECT 3.02 215 3.15 215.05 ; + RECT 1.57 215.025 1.62 215.155 ; + RECT 4.87 215.025 4.92 215.155 ; + RECT 6.375 215.025 6.425 215.155 ; + RECT 7.015 215.025 7.065 215.155 ; + RECT 10.27 215.025 10.32 215.155 ; + RECT 12.79 215.025 12.84 215.155 ; + RECT 14.33 215.025 14.38 215.155 ; + RECT 3.02 215.13 3.15 215.18 ; + RECT 6.85 215.31 6.9 215.36 ; + RECT 4.035 215.515 4.085 215.645 ; + RECT 12.655 215.515 12.705 215.645 ; + RECT 3.02 215.985 3.15 216.035 ; + RECT 1.57 216.01 1.62 216.14 ; + RECT 4.87 216.01 4.92 216.14 ; + RECT 6.375 216.01 6.425 216.14 ; + RECT 10.27 216.01 10.32 216.14 ; + RECT 12.79 216.01 12.84 216.14 ; + RECT 14.33 216.01 14.38 216.14 ; + RECT 3.02 216.115 3.15 216.165 ; + RECT 3.8 216.475 3.93 216.525 ; + RECT 5.635 216.475 5.765 216.525 ; + RECT 8.31 216.475 8.44 216.525 ; + RECT 8.73 216.475 8.86 216.525 ; + RECT 0.9 216.5 0.95 216.63 ; + RECT 2.485 216.5 2.535 216.63 ; + RECT 2.615 216.5 2.665 216.63 ; + RECT 6.065 216.5 6.115 216.63 ; + RECT 6.725 216.5 6.775 216.63 ; + RECT 11.555 216.5 12.57 216.63 ; + RECT 14.005 216.5 14.055 216.63 ; + RECT 3.8 216.605 3.93 216.655 ; + RECT 5.635 216.605 5.765 216.655 ; + RECT 8.31 216.605 8.44 216.655 ; + RECT 8.73 216.605 8.86 216.655 ; + RECT 1.045 216.97 1.175 217.02 ; + RECT 1.34 216.97 1.47 217.02 ; + RECT 4.47 216.97 4.6 217.02 ; + RECT 9.275 216.97 9.405 217.02 ; + RECT 1.86 216.995 1.91 217.125 ; + RECT 2.01 216.995 2.06 217.125 ; + RECT 2.32 216.995 2.37 217.125 ; + RECT 3.25 216.995 3.3 217.125 ; + RECT 3.515 216.995 3.565 217.125 ; + RECT 6.22 216.995 6.27 217.125 ; + RECT 7.5 216.995 7.55 217.125 ; + RECT 9.72 216.995 9.77 217.125 ; + RECT 11.025 216.995 11.075 217.125 ; + RECT 1.045 217.1 1.175 217.15 ; + RECT 1.34 217.1 1.47 217.15 ; + RECT 4.47 217.1 4.6 217.15 ; + RECT 9.275 217.1 9.405 217.15 ; + RECT 3.8 217.46 3.93 217.51 ; + RECT 5.635 217.46 5.765 217.51 ; + RECT 8.31 217.46 8.44 217.51 ; + RECT 8.73 217.46 8.86 217.51 ; + RECT 0.9 217.485 0.95 217.615 ; + RECT 2.485 217.485 2.535 217.615 ; + RECT 2.615 217.485 2.665 217.615 ; + RECT 6.065 217.485 6.115 217.615 ; + RECT 6.725 217.485 6.775 217.615 ; + RECT 11.555 217.485 11.865 217.615 ; + RECT 12.52 217.485 12.57 217.615 ; + RECT 14.005 217.485 14.055 217.615 ; + RECT 3.8 217.59 3.93 217.64 ; + RECT 5.635 217.59 5.765 217.64 ; + RECT 8.31 217.59 8.44 217.64 ; + RECT 8.73 217.59 8.86 217.64 ; + RECT 3.02 217.95 3.15 218 ; + RECT 1.57 217.975 1.62 218.105 ; + RECT 4.87 217.975 4.92 218.105 ; + RECT 6.375 217.975 6.425 218.105 ; + RECT 10.27 217.975 10.32 218.105 ; + RECT 12.79 217.975 12.84 218.105 ; + RECT 14.33 217.975 14.38 218.105 ; + RECT 3.02 218.08 3.15 218.13 ; + RECT 0.9 218.445 14.055 218.625 ; + RECT 3.02 218.935 3.15 218.985 ; + RECT 1.57 218.96 1.62 219.09 ; + RECT 4.87 218.96 4.92 219.09 ; + RECT 6.375 218.96 6.425 219.09 ; + RECT 10.27 218.96 10.32 219.09 ; + RECT 12.79 218.96 12.84 219.09 ; + RECT 14.33 218.96 14.38 219.09 ; + RECT 3.02 219.065 3.15 219.115 ; + RECT 12.655 219.445 12.705 219.575 ; + RECT 4.035 219.455 4.085 219.585 ; + RECT 3.02 219.92 3.15 219.97 ; + RECT 1.57 219.945 1.62 220.075 ; + RECT 4.87 219.945 4.92 220.075 ; + RECT 6.375 219.945 6.425 220.075 ; + RECT 10.27 219.945 10.32 220.075 ; + RECT 12.79 219.945 12.84 220.075 ; + RECT 14.33 219.945 14.38 220.075 ; + RECT 3.02 220.05 3.15 220.1 ; + RECT 0.9 220.41 14.055 220.59 ; + RECT 14.29 220.72 14.42 220.77 ; + RECT 1.045 220.905 1.175 220.955 ; + RECT 1.34 220.905 1.47 220.955 ; + RECT 4.47 220.905 4.6 220.955 ; + RECT 9.275 220.905 9.405 220.955 ; + RECT 1.86 220.93 1.91 221.06 ; + RECT 2.01 220.93 2.06 221.06 ; + RECT 2.32 220.93 2.37 221.06 ; + RECT 3.25 220.93 3.3 221.06 ; + RECT 3.515 220.93 3.565 221.06 ; + RECT 6.22 220.93 6.27 221.06 ; + RECT 7.5 220.93 7.55 221.06 ; + RECT 9.72 220.93 9.77 221.06 ; + RECT 11.025 220.93 11.075 221.06 ; + RECT 1.045 221.035 1.175 221.085 ; + RECT 1.34 221.035 1.47 221.085 ; + RECT 4.47 221.035 4.6 221.085 ; + RECT 9.275 221.035 9.405 221.085 ; + RECT 0.9 221.215 0.95 221.265 ; + RECT 2.51 221.215 2.64 221.265 ; + RECT 0.9 221.395 14.055 221.575 ; + RECT 2.18 221.915 2.23 222.045 ; + RECT 8.56 221.915 8.61 222.045 ; + RECT 10.27 221.915 10.32 222.045 ; + RECT 4.035 222.405 4.085 222.535 ; + RECT 3.02 222.87 3.15 222.92 ; + RECT 1.57 222.895 1.62 223.025 ; + RECT 4.87 222.895 4.92 223.025 ; + RECT 6.375 222.895 6.425 223.025 ; + RECT 11.69 222.895 11.74 223.025 ; + RECT 12.79 222.895 12.84 223.025 ; + RECT 12.79 222.895 12.84 223.025 ; + RECT 14.33 222.895 14.38 223.025 ; + RECT 3.02 223 3.15 223.05 ; + RECT 4.035 223.355 4.085 223.485 ; + RECT 12.655 223.355 12.705 223.485 ; + RECT 3.02 223.855 3.15 223.905 ; + RECT 1.57 223.88 1.62 224.01 ; + RECT 4.87 223.88 4.92 224.01 ; + RECT 6.375 223.88 6.425 224.01 ; + RECT 11.69 223.88 11.74 224.01 ; + RECT 12.79 223.88 12.84 224.01 ; + RECT 12.79 223.88 12.84 224.01 ; + RECT 14.33 223.88 14.38 224.01 ; + RECT 3.02 223.985 3.15 224.035 ; + RECT 0.9 224.315 14.055 224.495 ; + RECT 1.045 224.855 1.175 224.905 ; + RECT 1.34 224.855 1.47 224.905 ; + RECT 4.47 224.855 4.6 224.905 ; + RECT 9.275 224.855 9.405 224.905 ; + RECT 1.86 224.88 1.91 225.01 ; + RECT 2.01 224.88 2.06 225.01 ; + RECT 3.25 224.88 3.3 225.01 ; + RECT 3.515 224.88 3.565 225.01 ; + RECT 6.22 224.88 6.27 225.01 ; + RECT 7.5 224.88 7.55 225.01 ; + RECT 9.72 224.88 9.77 225.01 ; + RECT 11.025 224.88 11.075 225.01 ; + RECT 1.045 224.985 1.175 225.035 ; + RECT 1.34 224.985 1.47 225.035 ; + RECT 4.47 224.985 4.6 225.035 ; + RECT 9.275 224.985 9.405 225.035 ; + RECT 12.655 225.155 12.705 225.205 ; + RECT 1.045 225.33 1.175 225.38 ; + RECT 1.34 225.33 1.47 225.38 ; + RECT 4.47 225.33 4.6 225.38 ; + RECT 9.275 225.33 9.405 225.38 ; + RECT 1.86 225.355 1.91 225.485 ; + RECT 2.01 225.355 2.06 225.485 ; + RECT 3.25 225.355 3.3 225.485 ; + RECT 3.515 225.355 3.565 225.485 ; + RECT 6.22 225.355 6.27 225.485 ; + RECT 7.5 225.355 7.55 225.485 ; + RECT 9.72 225.355 9.77 225.485 ; + RECT 11.025 225.355 11.075 225.485 ; + RECT 13.675 225.355 13.725 225.485 ; + RECT 1.045 225.46 1.175 225.51 ; + RECT 1.34 225.46 1.47 225.51 ; + RECT 4.47 225.46 4.6 225.51 ; + RECT 9.275 225.46 9.405 225.51 ; + RECT 3.02 225.825 3.15 225.875 ; + RECT 1.57 225.85 1.62 225.98 ; + RECT 4.87 225.85 4.92 225.98 ; + RECT 6.375 225.85 6.425 225.98 ; + RECT 8.975 225.85 9.025 225.98 ; + RECT 11.69 225.85 11.74 225.98 ; + RECT 12.79 225.85 12.84 225.98 ; + RECT 14.33 225.85 14.38 225.98 ; + RECT 3.02 225.955 3.15 226.005 ; + RECT 12.655 226.135 12.705 226.185 ; + RECT 0.9 226.315 14.055 226.495 ; + RECT 1.57 226.835 1.62 226.965 ; + RECT 4.87 226.835 4.92 226.965 ; + RECT 6.375 226.835 6.425 226.965 ; + RECT 8.975 226.835 9.025 226.965 ; + RECT 11.69 226.835 11.74 226.965 ; + RECT 12.79 226.835 12.84 226.965 ; + RECT 14.33 226.835 14.38 226.965 ; + RECT 3.02 226.875 3.15 226.925 ; + RECT 1.045 227.12 1.175 227.17 ; + RECT 1.34 227.12 1.47 227.17 ; + RECT 4.47 227.12 4.6 227.17 ; + RECT 9.275 227.12 9.405 227.17 ; + RECT 1.86 227.145 1.91 227.275 ; + RECT 2.01 227.145 2.06 227.275 ; + RECT 3.25 227.145 3.3 227.275 ; + RECT 3.515 227.145 3.565 227.275 ; + RECT 6.22 227.145 6.27 227.275 ; + RECT 7.5 227.145 7.55 227.275 ; + RECT 9.72 227.145 9.77 227.275 ; + RECT 11.025 227.145 11.075 227.275 ; + RECT 1.045 227.25 1.175 227.3 ; + RECT 1.34 227.25 1.47 227.3 ; + RECT 4.47 227.25 4.6 227.3 ; + RECT 9.275 227.25 9.405 227.3 ; + RECT 13.8 227.625 13.85 227.755 ; + RECT 2.18 227.855 2.23 227.985 ; + RECT 8.56 227.855 8.61 227.985 ; + RECT 10.27 227.855 10.32 227.985 ; + RECT 0.62 228.085 0.67 228.215 ; + RECT 3.65 228.085 3.7 228.215 ; + RECT 7.19 228.085 7.24 228.215 ; + RECT 14.14 228.085 14.19 228.215 ; + RECT 1.085 228.315 1.135 228.445 ; + RECT 1.38 228.315 1.43 228.445 ; + RECT 1.86 228.315 1.91 228.445 ; + RECT 2.01 228.315 2.06 228.445 ; + RECT 3.25 228.315 3.3 228.445 ; + RECT 3.515 228.315 3.565 228.445 ; + RECT 4.51 228.315 4.56 228.445 ; + RECT 6.22 228.315 6.27 228.445 ; + RECT 7.5 228.315 7.55 228.445 ; + RECT 9.315 228.315 9.365 228.445 ; + RECT 9.72 228.315 9.77 228.445 ; + RECT 11.025 228.315 11.075 228.445 ; + RECT 0.435 187.965 0.485 188.095 ; + RECT 0.435 188.945 0.485 189.075 ; + RECT 0.435 190.915 0.485 191.045 ; + RECT 0.435 191.9 0.485 192.03 ; + RECT 0.435 194.855 0.485 194.985 ; + RECT 0.435 195.835 0.485 195.965 ; + RECT 0.435 196.82 0.485 196.95 ; + RECT 0.435 198.79 0.485 198.92 ; + RECT 0.17 199.57 0.22 199.62 ; + RECT 0.435 199.77 0.485 199.9 ; + RECT 0.435 200.755 0.485 200.885 ; + RECT 0.18 201.535 0.23 201.585 ; + RECT 0.435 202.73 0.485 202.86 ; + RECT 0.435 203.71 0.485 203.84 ; + RECT 0.435 206.66 0.485 206.79 ; + RECT 0.435 208.135 0.485 208.265 ; + RECT 0.435 211.085 0.485 211.215 ; + RECT 0.435 212.075 0.485 212.205 ; + RECT 0.18 212.85 0.23 212.9 ; + RECT 0.435 214.04 0.485 214.17 ; + RECT 0.435 215.025 0.485 215.155 ; + RECT 0.17 215.31 0.22 215.36 ; + RECT 0.435 216.01 0.485 216.14 ; + RECT 0.435 217.975 0.485 218.105 ; + RECT 0.435 218.96 0.485 219.09 ; + RECT 0.435 219.945 0.485 220.075 ; + RECT 0.17 221.215 0.22 221.265 ; + RECT 0.435 222.2 0.485 222.25 ; + RECT 0.435 222.69 0.485 222.74 ; + RECT 0.435 222.895 0.485 223.025 ; + RECT 0.435 223.88 0.485 224.01 ; + RECT 0.435 225.85 0.485 225.98 ; + RECT 0.435 226.835 0.485 226.965 ; + RECT 1.57 186.415 1.62 186.545 ; + RECT 3.06 186.415 3.11 186.545 ; + RECT 4.87 186.415 4.92 186.545 ; + RECT 12.79 186.415 12.84 186.545 ; + RECT 1.57 187.58 1.62 187.71 ; + RECT 3.02 187.555 3.15 187.735 ; + RECT 4.87 187.58 4.92 187.71 ; + RECT 8.955 187.58 9.005 187.71 ; + RECT 12.79 187.58 12.84 187.71 ; + RECT 14.29 187.555 14.42 187.735 ; + RECT 1.045 187.94 1.175 188.12 ; + RECT 1.34 187.94 1.47 188.12 ; + RECT 1.86 187.965 1.91 188.095 ; + RECT 2.01 187.965 2.06 188.095 ; + RECT 3.25 187.965 3.3 188.095 ; + RECT 3.515 187.965 3.565 188.095 ; + RECT 4.47 187.94 4.6 188.12 ; + RECT 5.035 187.965 5.085 188.095 ; + RECT 6.22 187.965 6.27 188.095 ; + RECT 7.5 187.965 7.55 188.095 ; + RECT 9.275 187.94 9.405 188.12 ; + RECT 9.72 187.965 9.77 188.095 ; + RECT 11.025 187.965 11.075 188.095 ; + RECT 1.045 188.92 1.175 189.1 ; + RECT 1.34 188.92 1.47 189.1 ; + RECT 1.86 188.945 1.91 189.075 ; + RECT 2.01 188.945 2.06 189.075 ; + RECT 3.25 188.945 3.3 189.075 ; + RECT 3.515 188.945 3.565 189.075 ; + RECT 4.47 188.92 4.6 189.1 ; + RECT 5.035 188.945 5.085 189.075 ; + RECT 6.22 188.945 6.27 189.075 ; + RECT 7.5 188.945 7.55 189.075 ; + RECT 9.275 188.92 9.405 189.1 ; + RECT 9.72 188.945 9.77 189.075 ; + RECT 11.025 188.945 11.075 189.075 ; + RECT 1.57 189.445 1.62 189.575 ; + RECT 3.02 189.42 3.15 189.6 ; + RECT 4.87 189.445 4.92 189.575 ; + RECT 5.9 189.445 5.95 189.575 ; + RECT 8.955 189.445 9.005 189.575 ; + RECT 1.57 189.915 1.62 190.045 ; + RECT 3.02 189.89 3.15 190.07 ; + RECT 4.87 189.915 4.92 190.045 ; + RECT 5.9 189.915 5.95 190.045 ; + RECT 8.955 189.915 9.005 190.045 ; + RECT 12.79 189.915 12.84 190.045 ; + RECT 1.045 190.89 1.175 191.07 ; + RECT 1.34 190.89 1.47 191.07 ; + RECT 1.86 190.915 1.91 191.045 ; + RECT 2.01 190.915 2.06 191.045 ; + RECT 3.25 190.915 3.3 191.045 ; + RECT 3.515 190.915 3.565 191.045 ; + RECT 4.47 190.89 4.6 191.07 ; + RECT 5.035 190.915 5.085 191.045 ; + RECT 6.22 190.915 6.27 191.045 ; + RECT 7.5 190.915 7.55 191.045 ; + RECT 9.275 190.89 9.405 191.07 ; + RECT 9.72 190.915 9.77 191.045 ; + RECT 11.025 190.915 11.075 191.045 ; + RECT 1.045 191.875 1.175 192.055 ; + RECT 1.34 191.875 1.47 192.055 ; + RECT 1.86 191.9 1.91 192.03 ; + RECT 2.01 191.9 2.06 192.03 ; + RECT 3.25 191.9 3.3 192.03 ; + RECT 3.515 191.9 3.565 192.03 ; + RECT 4.47 191.875 4.6 192.055 ; + RECT 5.035 191.9 5.085 192.03 ; + RECT 6.22 191.9 6.27 192.03 ; + RECT 7.5 191.9 7.55 192.03 ; + RECT 9.72 191.9 9.77 192.03 ; + RECT 11.025 191.9 11.075 192.03 ; + RECT 1.57 193.87 1.62 194 ; + RECT 3.02 193.845 3.15 194.025 ; + RECT 4.87 193.87 4.92 194 ; + RECT 5.9 193.87 5.95 194 ; + RECT 12.79 193.87 12.84 194 ; + RECT 14.29 193.845 14.42 194.025 ; + RECT 1.045 194.83 1.175 195.01 ; + RECT 1.34 194.83 1.47 195.01 ; + RECT 1.86 194.855 1.91 194.985 ; + RECT 2.01 194.855 2.06 194.985 ; + RECT 2.32 194.855 2.37 194.985 ; + RECT 3.25 194.855 3.3 194.985 ; + RECT 3.515 194.855 3.565 194.985 ; + RECT 4.47 194.83 4.6 195.01 ; + RECT 5.035 194.855 5.085 194.985 ; + RECT 6.22 194.855 6.27 194.985 ; + RECT 7.5 194.855 7.55 194.985 ; + RECT 9.72 194.855 9.77 194.985 ; + RECT 11.025 194.855 11.075 194.985 ; + RECT 1.045 195.81 1.175 195.99 ; + RECT 1.34 195.81 1.47 195.99 ; + RECT 1.86 195.835 1.91 195.965 ; + RECT 2.01 195.835 2.06 195.965 ; + RECT 2.32 195.835 2.37 195.965 ; + RECT 3.25 195.835 3.3 195.965 ; + RECT 3.515 195.835 3.565 195.965 ; + RECT 4.47 195.81 4.6 195.99 ; + RECT 5.035 195.835 5.085 195.965 ; + RECT 6.22 195.835 6.27 195.965 ; + RECT 7.5 195.835 7.55 195.965 ; + RECT 9.72 195.835 9.77 195.965 ; + RECT 11.025 195.835 11.075 195.965 ; + RECT 1.045 196.795 1.175 196.975 ; + RECT 1.34 196.795 1.47 196.975 ; + RECT 1.86 196.82 1.91 196.95 ; + RECT 2.01 196.82 2.06 196.95 ; + RECT 2.32 196.82 2.37 196.95 ; + RECT 3.25 196.82 3.3 196.95 ; + RECT 3.515 196.82 3.565 196.95 ; + RECT 4.47 196.795 4.6 196.975 ; + RECT 5.035 196.82 5.085 196.95 ; + RECT 6.22 196.82 6.27 196.95 ; + RECT 7.5 196.82 7.55 196.95 ; + RECT 9.72 196.82 9.77 196.95 ; + RECT 11.025 196.82 11.075 196.95 ; + RECT 1.57 197.805 1.62 197.935 ; + RECT 3.02 197.78 3.15 197.96 ; + RECT 4.87 197.805 4.92 197.935 ; + RECT 5.9 197.805 5.95 197.935 ; + RECT 9.43 197.805 9.48 197.935 ; + RECT 10.27 197.805 10.32 197.935 ; + RECT 12.79 197.805 12.84 197.935 ; + RECT 14.29 197.78 14.42 197.96 ; + RECT 1.045 198.765 1.175 198.945 ; + RECT 1.34 198.765 1.47 198.945 ; + RECT 1.86 198.79 1.91 198.92 ; + RECT 2.01 198.79 2.06 198.92 ; + RECT 2.32 198.79 2.37 198.92 ; + RECT 3.25 198.79 3.3 198.92 ; + RECT 3.515 198.79 3.565 198.92 ; + RECT 4.47 198.765 4.6 198.945 ; + RECT 5.035 198.79 5.085 198.92 ; + RECT 6.22 198.79 6.27 198.92 ; + RECT 7.5 198.79 7.55 198.92 ; + RECT 9.72 198.79 9.77 198.92 ; + RECT 11.025 198.79 11.075 198.92 ; + RECT 1.045 199.745 1.175 199.925 ; + RECT 1.34 199.745 1.47 199.925 ; + RECT 1.86 199.77 1.91 199.9 ; + RECT 2.01 199.77 2.06 199.9 ; + RECT 2.32 199.77 2.37 199.9 ; + RECT 3.25 199.77 3.3 199.9 ; + RECT 3.515 199.77 3.565 199.9 ; + RECT 4.47 199.745 4.6 199.925 ; + RECT 5.035 199.77 5.085 199.9 ; + RECT 6.22 199.77 6.27 199.9 ; + RECT 7.5 199.77 7.55 199.9 ; + RECT 9.72 199.77 9.77 199.9 ; + RECT 11.025 199.77 11.075 199.9 ; + RECT 1.045 200.73 1.175 200.91 ; + RECT 1.34 200.73 1.47 200.91 ; + RECT 1.86 200.755 1.91 200.885 ; + RECT 2.01 200.755 2.06 200.885 ; + RECT 2.32 200.755 2.37 200.885 ; + RECT 3.25 200.755 3.3 200.885 ; + RECT 3.515 200.755 3.565 200.885 ; + RECT 4.47 200.73 4.6 200.91 ; + RECT 5.035 200.755 5.085 200.885 ; + RECT 6.22 200.755 6.27 200.885 ; + RECT 7.5 200.755 7.55 200.885 ; + RECT 9.72 200.755 9.77 200.885 ; + RECT 11.025 200.755 11.075 200.885 ; + RECT 1.57 201.74 1.62 201.87 ; + RECT 3.02 201.715 3.15 201.895 ; + RECT 4.87 201.74 4.92 201.87 ; + RECT 5.9 201.74 5.95 201.87 ; + RECT 6.375 201.74 6.425 201.87 ; + RECT 7.015 201.74 7.065 201.87 ; + RECT 10.27 201.74 10.32 201.87 ; + RECT 12.79 201.74 12.84 201.87 ; + RECT 14.29 201.715 14.42 201.895 ; + RECT 1.045 202.705 1.175 202.885 ; + RECT 1.34 202.705 1.47 202.885 ; + RECT 1.86 202.73 1.91 202.86 ; + RECT 2.01 202.73 2.06 202.86 ; + RECT 2.32 202.73 2.37 202.86 ; + RECT 3.25 202.73 3.3 202.86 ; + RECT 3.515 202.73 3.565 202.86 ; + RECT 4.47 202.705 4.6 202.885 ; + RECT 5.035 202.73 5.085 202.86 ; + RECT 6.22 202.73 6.27 202.86 ; + RECT 7.5 202.73 7.55 202.86 ; + RECT 9.72 202.73 9.77 202.86 ; + RECT 11.025 202.73 11.075 202.86 ; + RECT 1.045 203.685 1.175 203.865 ; + RECT 1.34 203.685 1.47 203.865 ; + RECT 1.86 203.71 1.91 203.84 ; + RECT 2.01 203.71 2.06 203.84 ; + RECT 2.32 203.71 2.37 203.84 ; + RECT 3.25 203.71 3.3 203.84 ; + RECT 3.515 203.71 3.565 203.84 ; + RECT 4.47 203.685 4.6 203.865 ; + RECT 5.035 203.71 5.085 203.84 ; + RECT 6.22 203.71 6.27 203.84 ; + RECT 7.5 203.71 7.55 203.84 ; + RECT 9.72 203.71 9.77 203.84 ; + RECT 11.025 203.71 11.075 203.84 ; + RECT 1.57 204.865 1.62 204.995 ; + RECT 3.06 204.865 3.11 204.995 ; + RECT 4.87 204.865 4.92 204.995 ; + RECT 5.9 204.865 5.95 204.995 ; + RECT 6.375 204.865 6.425 204.995 ; + RECT 7.015 204.865 7.065 204.995 ; + RECT 9.11 204.865 9.16 204.995 ; + RECT 10.27 204.865 10.32 204.995 ; + RECT 1.57 205.675 1.62 205.805 ; + RECT 3.02 205.65 3.15 205.83 ; + RECT 4.87 205.675 4.92 205.805 ; + RECT 5.9 205.675 5.95 205.805 ; + RECT 6.375 205.675 6.425 205.805 ; + RECT 7.015 205.675 7.065 205.805 ; + RECT 9.11 205.675 9.16 205.805 ; + RECT 10.27 205.675 10.32 205.805 ; + RECT 12.79 205.675 12.84 205.805 ; + RECT 1.045 206.635 1.175 206.815 ; + RECT 1.34 206.635 1.47 206.815 ; + RECT 1.86 206.66 1.91 206.79 ; + RECT 2.01 206.66 2.06 206.79 ; + RECT 2.32 206.66 2.37 206.79 ; + RECT 3.25 206.66 3.3 206.79 ; + RECT 3.515 206.66 3.565 206.79 ; + RECT 4.47 206.635 4.6 206.815 ; + RECT 5.035 206.66 5.085 206.79 ; + RECT 6.22 206.66 6.27 206.79 ; + RECT 7.5 206.66 7.55 206.79 ; + RECT 9.72 206.66 9.77 206.79 ; + RECT 11.025 206.66 11.075 206.79 ; + RECT 1.045 208.11 1.175 208.29 ; + RECT 1.34 208.11 1.47 208.29 ; + RECT 1.86 208.135 1.91 208.265 ; + RECT 2.01 208.135 2.06 208.265 ; + RECT 2.32 208.135 2.37 208.265 ; + RECT 3.25 208.135 3.3 208.265 ; + RECT 3.515 208.135 3.565 208.265 ; + RECT 4.47 208.11 4.6 208.29 ; + RECT 5.035 208.135 5.085 208.265 ; + RECT 6.22 208.135 6.27 208.265 ; + RECT 7.5 208.135 7.55 208.265 ; + RECT 9.72 208.135 9.77 208.265 ; + RECT 11.025 208.135 11.075 208.265 ; + RECT 1.57 209.12 1.62 209.25 ; + RECT 3.02 209.095 3.15 209.275 ; + RECT 4.87 209.12 4.92 209.25 ; + RECT 6.375 209.12 6.425 209.25 ; + RECT 7.015 209.12 7.065 209.25 ; + RECT 9.11 209.12 9.16 209.25 ; + RECT 10.27 209.12 10.32 209.25 ; + RECT 12.79 209.12 12.84 209.25 ; + RECT 1.57 209.93 1.62 210.06 ; + RECT 3.06 209.93 3.11 210.06 ; + RECT 4.87 209.93 4.92 210.06 ; + RECT 6.375 209.93 6.425 210.06 ; + RECT 7.015 209.93 7.065 210.06 ; + RECT 9.11 209.93 9.16 210.06 ; + RECT 10.27 209.93 10.32 210.06 ; + RECT 1.045 211.06 1.175 211.24 ; + RECT 1.34 211.06 1.47 211.24 ; + RECT 1.86 211.085 1.91 211.215 ; + RECT 2.01 211.085 2.06 211.215 ; + RECT 2.32 211.085 2.37 211.215 ; + RECT 3.25 211.085 3.3 211.215 ; + RECT 3.515 211.085 3.565 211.215 ; + RECT 4.47 211.06 4.6 211.24 ; + RECT 5.035 211.085 5.085 211.215 ; + RECT 6.22 211.085 6.27 211.215 ; + RECT 7.5 211.085 7.55 211.215 ; + RECT 9.72 211.085 9.77 211.215 ; + RECT 11.025 211.085 11.075 211.215 ; + RECT 1.045 212.05 1.175 212.23 ; + RECT 1.34 212.05 1.47 212.23 ; + RECT 1.86 212.075 1.91 212.205 ; + RECT 2.01 212.075 2.06 212.205 ; + RECT 2.32 212.075 2.37 212.205 ; + RECT 3.25 212.075 3.3 212.205 ; + RECT 3.515 212.075 3.565 212.205 ; + RECT 4.47 212.05 4.6 212.23 ; + RECT 5.035 212.075 5.085 212.205 ; + RECT 6.22 212.075 6.27 212.205 ; + RECT 7.5 212.075 7.55 212.205 ; + RECT 9.72 212.075 9.77 212.205 ; + RECT 11.025 212.075 11.075 212.205 ; + RECT 1.57 213.055 1.62 213.185 ; + RECT 3.02 213.03 3.15 213.21 ; + RECT 4.87 213.055 4.92 213.185 ; + RECT 6.375 213.055 6.425 213.185 ; + RECT 7.015 213.055 7.065 213.185 ; + RECT 10.27 213.055 10.32 213.185 ; + RECT 12.79 213.055 12.84 213.185 ; + RECT 14.29 213.03 14.42 213.21 ; + RECT 1.045 214.015 1.175 214.195 ; + RECT 1.34 214.015 1.47 214.195 ; + RECT 1.86 214.04 1.91 214.17 ; + RECT 2.01 214.04 2.06 214.17 ; + RECT 2.32 214.04 2.37 214.17 ; + RECT 3.25 214.04 3.3 214.17 ; + RECT 3.515 214.04 3.565 214.17 ; + RECT 4.47 214.015 4.6 214.195 ; + RECT 5.035 214.04 5.085 214.17 ; + RECT 6.22 214.04 6.27 214.17 ; + RECT 7.5 214.04 7.55 214.17 ; + RECT 9.275 214.015 9.405 214.195 ; + RECT 9.72 214.04 9.77 214.17 ; + RECT 11.025 214.04 11.075 214.17 ; + RECT 1.045 215 1.175 215.18 ; + RECT 1.34 215 1.47 215.18 ; + RECT 1.86 215.025 1.91 215.155 ; + RECT 2.01 215.025 2.06 215.155 ; + RECT 2.32 215.025 2.37 215.155 ; + RECT 3.25 215.025 3.3 215.155 ; + RECT 3.515 215.025 3.565 215.155 ; + RECT 4.47 215 4.6 215.18 ; + RECT 5.035 215.025 5.085 215.155 ; + RECT 6.22 215.025 6.27 215.155 ; + RECT 7.5 215.025 7.55 215.155 ; + RECT 9.275 215 9.405 215.18 ; + RECT 9.72 215.025 9.77 215.155 ; + RECT 11.025 215.025 11.075 215.155 ; + RECT 1.045 215.985 1.175 216.165 ; + RECT 1.34 215.985 1.47 216.165 ; + RECT 1.86 216.01 1.91 216.14 ; + RECT 2.01 216.01 2.06 216.14 ; + RECT 2.32 216.01 2.37 216.14 ; + RECT 3.25 216.01 3.3 216.14 ; + RECT 3.515 216.01 3.565 216.14 ; + RECT 4.47 215.985 4.6 216.165 ; + RECT 6.22 216.01 6.27 216.14 ; + RECT 7.5 216.01 7.55 216.14 ; + RECT 9.275 215.985 9.405 216.165 ; + RECT 9.72 216.01 9.77 216.14 ; + RECT 11.025 216.01 11.075 216.14 ; + RECT 1.57 216.995 1.62 217.125 ; + RECT 3.02 216.97 3.15 217.15 ; + RECT 4.87 216.995 4.92 217.125 ; + RECT 6.375 216.995 6.425 217.125 ; + RECT 10 216.995 10.05 217.125 ; + RECT 10.27 216.995 10.32 217.125 ; + RECT 12.79 216.995 12.84 217.125 ; + RECT 14.29 216.97 14.42 217.15 ; + RECT 1.045 217.95 1.175 218.13 ; + RECT 1.34 217.95 1.47 218.13 ; + RECT 1.86 217.975 1.91 218.105 ; + RECT 2.01 217.975 2.06 218.105 ; + RECT 2.32 217.975 2.37 218.105 ; + RECT 3.25 217.975 3.3 218.105 ; + RECT 3.515 217.975 3.565 218.105 ; + RECT 4.47 217.95 4.6 218.13 ; + RECT 6.22 217.975 6.27 218.105 ; + RECT 7.5 217.975 7.55 218.105 ; + RECT 9.275 217.95 9.405 218.13 ; + RECT 9.72 217.975 9.77 218.105 ; + RECT 11.025 217.975 11.075 218.105 ; + RECT 1.045 218.935 1.175 219.115 ; + RECT 1.34 218.935 1.47 219.115 ; + RECT 1.86 218.96 1.91 219.09 ; + RECT 2.01 218.96 2.06 219.09 ; + RECT 2.32 218.96 2.37 219.09 ; + RECT 3.25 218.96 3.3 219.09 ; + RECT 3.515 218.96 3.565 219.09 ; + RECT 4.47 218.935 4.6 219.115 ; + RECT 6.22 218.96 6.27 219.09 ; + RECT 7.5 218.96 7.55 219.09 ; + RECT 9.275 218.935 9.405 219.115 ; + RECT 9.72 218.96 9.77 219.09 ; + RECT 11.025 218.96 11.075 219.09 ; + RECT 1.045 219.92 1.175 220.1 ; + RECT 1.34 219.92 1.47 220.1 ; + RECT 1.86 219.945 1.91 220.075 ; + RECT 2.01 219.945 2.06 220.075 ; + RECT 2.32 219.945 2.37 220.075 ; + RECT 3.25 219.945 3.3 220.075 ; + RECT 3.515 219.945 3.565 220.075 ; + RECT 4.47 219.92 4.6 220.1 ; + RECT 6.22 219.945 6.27 220.075 ; + RECT 7.5 219.945 7.55 220.075 ; + RECT 9.275 219.92 9.405 220.1 ; + RECT 9.72 219.945 9.77 220.075 ; + RECT 11.025 219.945 11.075 220.075 ; + RECT 1.57 220.93 1.62 221.06 ; + RECT 3.02 220.905 3.15 221.085 ; + RECT 4.87 220.93 4.92 221.06 ; + RECT 6.375 220.93 6.425 221.06 ; + RECT 12.79 220.93 12.84 221.06 ; + RECT 14.29 220.905 14.42 221.085 ; + RECT 1.045 222.87 1.175 223.05 ; + RECT 1.34 222.87 1.47 223.05 ; + RECT 1.86 222.895 1.91 223.025 ; + RECT 2.01 222.895 2.06 223.025 ; + RECT 2.32 222.895 2.37 223.025 ; + RECT 3.25 222.895 3.3 223.025 ; + RECT 3.515 222.895 3.565 223.025 ; + RECT 4.47 222.87 4.6 223.05 ; + RECT 6.22 222.895 6.27 223.025 ; + RECT 7.5 222.895 7.55 223.025 ; + RECT 9.275 222.87 9.405 223.05 ; + RECT 9.72 222.895 9.77 223.025 ; + RECT 11.025 222.895 11.075 223.025 ; + RECT 1.045 223.855 1.175 224.035 ; + RECT 1.34 223.855 1.47 224.035 ; + RECT 1.86 223.88 1.91 224.01 ; + RECT 2.01 223.88 2.06 224.01 ; + RECT 2.32 223.88 2.37 224.01 ; + RECT 3.25 223.88 3.3 224.01 ; + RECT 3.515 223.88 3.565 224.01 ; + RECT 4.47 223.855 4.6 224.035 ; + RECT 6.22 223.88 6.27 224.01 ; + RECT 7.5 223.88 7.55 224.01 ; + RECT 9.275 223.855 9.405 224.035 ; + RECT 9.72 223.88 9.77 224.01 ; + RECT 11.025 223.88 11.075 224.01 ; + RECT 1.57 224.88 1.62 225.01 ; + RECT 3.02 224.855 3.15 225.035 ; + RECT 4.87 224.88 4.92 225.01 ; + RECT 6.375 224.88 6.425 225.01 ; + RECT 11.69 224.88 11.74 225.01 ; + RECT 12.79 224.88 12.84 225.01 ; + RECT 1.57 225.355 1.62 225.485 ; + RECT 3.02 225.33 3.15 225.51 ; + RECT 4.87 225.355 4.92 225.485 ; + RECT 6.375 225.355 6.425 225.485 ; + RECT 1.045 225.825 1.175 226.005 ; + RECT 1.34 225.825 1.47 226.005 ; + RECT 1.86 225.85 1.91 225.98 ; + RECT 2.01 225.85 2.06 225.98 ; + RECT 3.25 225.85 3.3 225.98 ; + RECT 3.515 225.85 3.565 225.98 ; + RECT 4.47 225.825 4.6 226.005 ; + RECT 6.22 225.85 6.27 225.98 ; + RECT 7.5 225.85 7.55 225.98 ; + RECT 9.275 225.825 9.405 226.005 ; + RECT 9.72 225.85 9.77 225.98 ; + RECT 11.025 225.85 11.075 225.98 ; + RECT 1.86 226.835 1.91 226.965 ; + RECT 2.01 226.835 2.06 226.965 ; + RECT 3.25 226.835 3.3 226.965 ; + RECT 3.515 226.835 3.565 226.965 ; + RECT 6.22 226.835 6.27 226.965 ; + RECT 7.5 226.835 7.55 226.965 ; + RECT 9.72 226.835 9.77 226.965 ; + RECT 11.025 226.835 11.075 226.965 ; + RECT 1.57 227.145 1.62 227.275 ; + RECT 3.02 227.12 3.15 227.3 ; + RECT 4.87 227.145 4.92 227.275 ; + RECT 6.375 227.145 6.425 227.275 ; + RECT 8.975 227.145 9.025 227.275 ; + RECT 12.79 227.145 12.84 227.275 ; + RECT 14.29 227.12 14.42 227.3 ; + RECT 3.06 228.315 3.11 228.445 ; + RECT 4.87 228.315 4.92 228.445 ; + RECT 6.375 228.315 6.425 228.445 ; + RECT 8.975 228.315 9.025 228.445 ; + RECT 12.79 228.315 12.84 228.445 ; + RECT 0.9 186.645 0.95 186.775 ; + RECT 2.485 186.645 2.665 186.775 ; + RECT 3.84 186.645 3.89 186.775 ; + RECT 5.675 186.645 5.725 186.775 ; + RECT 6.065 186.645 6.115 186.775 ; + RECT 6.725 186.645 6.775 186.775 ; + RECT 8.35 186.645 8.4 186.775 ; + RECT 8.77 186.645 8.82 186.775 ; + RECT 11.555 186.645 11.605 186.775 ; + RECT 11.815 186.645 11.865 186.775 ; + RECT 12.52 186.645 12.57 186.775 ; + RECT 14.005 186.645 14.055 186.775 ; + RECT 0.62 188.455 0.67 188.585 ; + RECT 3.65 188.455 3.7 188.585 ; + RECT 7.18 188.455 7.23 188.585 ; + RECT 14.14 188.455 14.19 188.585 ; + RECT 0.62 190.46 0.67 190.59 ; + RECT 3.65 190.46 3.7 190.59 ; + RECT 7.18 190.46 7.23 190.59 ; + RECT 14.14 190.46 14.19 190.59 ; + RECT 0.62 193.375 0.67 193.505 ; + RECT 3.65 193.375 3.7 193.505 ; + RECT 7.18 193.375 7.23 193.505 ; + RECT 14.14 193.375 14.19 193.505 ; + RECT 0.62 194.36 0.67 194.49 ; + RECT 3.65 194.36 3.7 194.49 ; + RECT 7.18 194.36 7.23 194.49 ; + RECT 14.14 194.36 14.19 194.49 ; + RECT 0.62 196.33 0.67 196.46 ; + RECT 3.65 196.33 3.7 196.46 ; + RECT 7.18 196.33 7.23 196.46 ; + RECT 14.14 196.33 14.19 196.46 ; + RECT 0.62 197.31 0.67 197.44 ; + RECT 3.65 197.31 3.7 197.44 ; + RECT 7.18 197.31 7.23 197.44 ; + RECT 14.14 197.31 14.19 197.44 ; + RECT 0.62 198.295 0.67 198.425 ; + RECT 3.65 198.295 3.7 198.425 ; + RECT 7.18 198.295 7.23 198.425 ; + RECT 14.14 198.295 14.19 198.425 ; + RECT 0.62 201.25 0.67 201.38 ; + RECT 3.65 201.25 3.7 201.38 ; + RECT 7.18 201.25 7.23 201.38 ; + RECT 14.14 201.25 14.19 201.38 ; + RECT 0.9 202.235 0.95 202.365 ; + RECT 2.485 202.235 2.665 202.365 ; + RECT 3.8 202.21 3.93 202.39 ; + RECT 5.635 202.21 5.765 202.39 ; + RECT 6.065 202.235 6.115 202.365 ; + RECT 6.675 202.235 6.725 202.365 ; + RECT 8.31 202.21 8.44 202.39 ; + RECT 8.73 202.21 8.86 202.39 ; + RECT 11.555 202.235 11.605 202.365 ; + RECT 11.815 202.235 11.865 202.365 ; + RECT 12.52 202.235 12.57 202.365 ; + RECT 14.005 202.235 14.055 202.365 ; + RECT 0.62 205.185 0.67 205.315 ; + RECT 3.65 205.185 3.7 205.315 ; + RECT 7.18 205.185 7.23 205.315 ; + RECT 14.14 205.185 14.19 205.315 ; + RECT 0.62 206.17 0.67 206.3 ; + RECT 3.65 206.17 3.7 206.3 ; + RECT 7.18 206.17 7.23 206.3 ; + RECT 14.14 206.17 14.19 206.3 ; + RECT 8.31 207.44 8.44 207.49 ; + RECT 8.73 207.44 8.86 207.49 ; + RECT 10.12 207.44 10.17 207.49 ; + RECT 11.555 207.44 11.605 207.49 ; + RECT 11.815 207.44 11.865 207.49 ; + RECT 12.52 207.44 12.57 207.49 ; + RECT 0.62 208.63 0.67 208.76 ; + RECT 3.65 208.63 3.7 208.76 ; + RECT 7.18 208.63 7.23 208.76 ; + RECT 12.655 208.63 12.705 208.76 ; + RECT 14.14 208.63 14.19 208.76 ; + RECT 0.62 209.61 0.67 209.74 ; + RECT 3.65 209.61 3.7 209.74 ; + RECT 7.18 209.61 7.23 209.74 ; + RECT 14.14 209.61 14.19 209.74 ; + RECT 0.9 212.565 0.95 212.695 ; + RECT 2.51 212.54 2.64 212.72 ; + RECT 3.8 212.54 3.93 212.72 ; + RECT 5.635 212.54 5.765 212.72 ; + RECT 6.065 212.565 6.115 212.695 ; + RECT 6.675 212.565 6.725 212.695 ; + RECT 8.31 212.54 8.44 212.72 ; + RECT 8.73 212.54 8.86 212.72 ; + RECT 11.555 212.565 11.605 212.695 ; + RECT 11.815 212.565 11.865 212.695 ; + RECT 12.52 212.565 12.57 212.695 ; + RECT 14.005 212.565 14.055 212.695 ; + RECT 0.62 213.55 0.67 213.68 ; + RECT 3.65 213.55 3.7 213.68 ; + RECT 7.18 213.55 7.23 213.68 ; + RECT 14.14 213.55 14.19 213.68 ; + RECT 0.62 216.5 0.67 216.63 ; + RECT 3.65 216.5 3.7 216.63 ; + RECT 7.18 216.5 7.23 216.63 ; + RECT 14.14 216.5 14.19 216.63 ; + RECT 0.62 217.485 0.67 217.615 ; + RECT 3.65 217.485 3.7 217.615 ; + RECT 7.18 217.485 7.23 217.615 ; + RECT 14.14 217.485 14.19 217.615 ; + RECT 0.62 218.47 0.67 218.6 ; + RECT 3.65 218.47 3.7 218.6 ; + RECT 7.18 218.47 7.23 218.6 ; + RECT 14.14 218.47 14.19 218.6 ; + RECT 0.62 220.435 0.67 220.565 ; + RECT 3.65 220.435 3.7 220.565 ; + RECT 7.18 220.435 7.23 220.565 ; + RECT 14.14 220.435 14.19 220.565 ; + RECT 0.62 221.215 0.67 221.265 ; + RECT 0.62 221.42 0.67 221.55 ; + RECT 3.65 221.42 3.7 221.55 ; + RECT 7.18 221.42 7.23 221.55 ; + RECT 14.14 221.42 14.19 221.55 ; + RECT 0.62 224.34 0.67 224.47 ; + RECT 3.65 224.34 3.7 224.47 ; + RECT 7.18 224.34 7.23 224.47 ; + RECT 14.14 224.34 14.19 224.47 ; + RECT 0.62 226.34 0.67 226.47 ; + RECT 3.65 226.34 3.7 226.47 ; + RECT 7.18 226.34 7.23 226.47 ; + RECT 14.14 226.34 14.19 226.47 ; + RECT 0.9 228.085 0.95 228.215 ; + RECT 2.485 228.085 2.665 228.215 ; + RECT 3.84 228.085 3.89 228.215 ; + RECT 5.675 228.085 5.725 228.215 ; + RECT 6.065 228.085 6.115 228.215 ; + RECT 6.725 228.085 6.775 228.215 ; + RECT 8.35 228.085 8.4 228.215 ; + RECT 8.77 228.085 8.82 228.215 ; + RECT 11.555 228.085 11.605 228.215 ; + RECT 11.815 228.085 11.865 228.215 ; + RECT 12.52 228.085 12.57 228.215 ; + RECT 14.005 228.085 14.055 228.215 ; + RECT 1.57 186.875 1.62 187.005 ; + RECT 3.06 186.875 3.11 187.005 ; + RECT 4.87 186.875 4.92 187.005 ; + RECT 12.79 186.875 12.84 187.005 ; + RECT 14.33 186.875 14.38 187.005 ; + RECT 2.18 187.965 2.23 188.095 ; + RECT 8.56 187.965 8.61 188.095 ; + RECT 10.27 187.965 10.32 188.095 ; + RECT 2.18 188.945 2.23 189.075 ; + RECT 8.56 188.945 8.61 189.075 ; + RECT 10.27 188.945 10.32 189.075 ; + RECT 2.18 190.915 2.23 191.045 ; + RECT 8.56 190.915 8.61 191.045 ; + RECT 10.27 190.915 10.32 191.045 ; + RECT 2.18 191.9 2.23 192.03 ; + RECT 8.56 191.9 8.61 192.03 ; + RECT 10.27 191.9 10.32 192.03 ; + RECT 1.57 192.885 1.62 193.015 ; + RECT 3.02 192.86 3.15 193.04 ; + RECT 4.87 192.885 4.92 193.015 ; + RECT 5.9 192.885 5.95 193.015 ; + RECT 12.79 192.885 12.84 193.015 ; + RECT 14.29 192.86 14.42 193.04 ; + RECT 2.18 194.855 2.23 194.985 ; + RECT 8.56 194.855 8.61 194.985 ; + RECT 2.18 195.835 2.23 195.965 ; + RECT 8.56 195.835 8.61 195.965 ; + RECT 2.18 196.82 2.23 196.95 ; + RECT 8.56 196.82 8.61 196.95 ; + RECT 2.18 198.79 2.23 198.92 ; + RECT 8.56 198.79 8.61 198.92 ; + RECT 2.18 199.77 2.23 199.9 ; + RECT 8.56 199.77 8.61 199.9 ; + RECT 2.18 200.755 2.23 200.885 ; + RECT 8.56 200.755 8.61 200.885 ; + RECT 2.18 202.73 2.23 202.86 ; + RECT 8.56 202.73 8.61 202.86 ; + RECT 2.18 203.71 2.23 203.84 ; + RECT 8.56 203.71 8.61 203.84 ; + RECT 2.18 206.66 2.23 206.79 ; + RECT 8.56 206.66 8.61 206.79 ; + RECT 2.18 208.135 2.23 208.265 ; + RECT 8.56 208.135 8.61 208.265 ; + RECT 2.18 211.085 2.23 211.215 ; + RECT 8.56 211.085 8.61 211.215 ; + RECT 2.18 212.075 2.23 212.205 ; + RECT 8.56 212.075 8.61 212.205 ; + RECT 2.18 214.04 2.23 214.17 ; + RECT 8.56 214.04 8.61 214.17 ; + RECT 2.18 215.025 2.23 215.155 ; + RECT 8.56 215.025 8.61 215.155 ; + RECT 2.18 216.01 2.23 216.14 ; + RECT 8.56 216.01 8.61 216.14 ; + RECT 2.18 217.975 2.23 218.105 ; + RECT 8.56 217.975 8.61 218.105 ; + RECT 2.18 218.96 2.23 219.09 ; + RECT 8.56 218.96 8.61 219.09 ; + RECT 2.18 219.945 2.23 220.075 ; + RECT 8.56 219.945 8.61 220.075 ; + RECT 1.57 221.915 1.62 222.045 ; + RECT 3.02 221.89 3.15 222.07 ; + RECT 4.87 221.915 4.92 222.045 ; + RECT 6.375 221.915 6.425 222.045 ; + RECT 12.79 221.915 12.84 222.045 ; + RECT 14.29 221.89 14.42 222.07 ; + RECT 2.18 222.895 2.23 223.025 ; + RECT 8.56 222.895 8.61 223.025 ; + RECT 10.27 222.895 10.32 223.025 ; + RECT 2.18 223.88 2.23 224.01 ; + RECT 8.56 223.88 8.61 224.01 ; + RECT 10.27 223.88 10.32 224.01 ; + RECT 2.18 225.85 2.23 225.98 ; + RECT 8.56 225.85 8.61 225.98 ; + RECT 10.27 225.85 10.32 225.98 ; + RECT 2.18 226.835 2.23 226.965 ; + RECT 8.56 226.835 8.61 226.965 ; + RECT 10.27 226.835 10.32 226.965 ; + RECT 3.06 227.855 3.11 227.985 ; + RECT 4.87 227.855 4.92 227.985 ; + RECT 6.375 227.855 6.425 227.985 ; + RECT 8.975 227.855 9.025 227.985 ; + RECT 12.79 227.855 12.84 227.985 ; + RECT 14.33 227.855 14.38 227.985 ; + RECT 20.875 0.425 21.055 0.555 ; + RECT 14.965 0.655 15.015 0.785 ; + RECT 19.485 0.655 19.535 0.785 ; + RECT 14.765 0.655 14.815 0.785 ; + RECT 19.685 0.655 19.735 0.785 ; + RECT 20.7 0.425 20.75 0.555 ; + RECT 20.875 414.305 21.055 414.435 ; + RECT 14.965 414.075 15.015 414.205 ; + RECT 19.485 414.075 19.535 414.205 ; + RECT 14.765 414.075 14.815 414.205 ; + RECT 19.685 414.075 19.735 414.205 ; + RECT 20.7 414.305 20.75 414.435 ; + RECT 14.565 3.305 14.615 3.435 ; + RECT 19.885 3.305 19.935 3.435 ; + RECT 14.765 3.535 14.815 3.665 ; + RECT 14.765 1.115 14.815 1.245 ; + RECT 19.685 3.535 19.735 3.665 ; + RECT 19.685 1.115 19.735 1.245 ; + RECT 14.965 3.535 15.015 3.665 ; + RECT 14.965 1.115 15.015 1.245 ; + RECT 19.485 3.535 19.535 3.665 ; + RECT 19.485 1.115 19.535 1.245 ; + RECT 14.565 184.745 14.615 184.875 ; + RECT 19.885 184.745 19.935 184.875 ; + RECT 14.765 184.975 14.815 185.105 ; + RECT 14.765 182.555 14.815 182.685 ; + RECT 19.685 184.975 19.735 185.105 ; + RECT 19.685 182.555 19.735 182.685 ; + RECT 14.965 184.975 15.015 185.105 ; + RECT 14.965 182.555 15.015 182.685 ; + RECT 19.485 184.975 19.535 185.105 ; + RECT 19.485 182.555 19.535 182.685 ; + RECT 14.565 181.865 14.615 181.995 ; + RECT 19.885 181.865 19.935 181.995 ; + RECT 14.765 182.095 14.815 182.225 ; + RECT 14.765 179.675 14.815 179.805 ; + RECT 19.685 182.095 19.735 182.225 ; + RECT 19.685 179.675 19.735 179.805 ; + RECT 14.965 182.095 15.015 182.225 ; + RECT 14.965 179.675 15.015 179.805 ; + RECT 19.485 182.095 19.535 182.225 ; + RECT 19.485 179.675 19.535 179.805 ; + RECT 14.565 155.945 14.615 156.075 ; + RECT 19.885 155.945 19.935 156.075 ; + RECT 14.765 156.175 14.815 156.305 ; + RECT 14.765 153.755 14.815 153.885 ; + RECT 19.685 156.175 19.735 156.305 ; + RECT 19.685 153.755 19.735 153.885 ; + RECT 14.965 156.175 15.015 156.305 ; + RECT 14.965 153.755 15.015 153.885 ; + RECT 19.485 156.175 19.535 156.305 ; + RECT 19.485 153.755 19.535 153.885 ; + RECT 14.565 153.065 14.615 153.195 ; + RECT 19.885 153.065 19.935 153.195 ; + RECT 14.765 153.295 14.815 153.425 ; + RECT 14.765 150.875 14.815 151.005 ; + RECT 19.685 153.295 19.735 153.425 ; + RECT 19.685 150.875 19.735 151.005 ; + RECT 14.965 153.295 15.015 153.425 ; + RECT 14.965 150.875 15.015 151.005 ; + RECT 19.485 153.295 19.535 153.425 ; + RECT 19.485 150.875 19.535 151.005 ; + RECT 14.565 150.185 14.615 150.315 ; + RECT 19.885 150.185 19.935 150.315 ; + RECT 14.765 150.415 14.815 150.545 ; + RECT 14.765 147.995 14.815 148.125 ; + RECT 19.685 150.415 19.735 150.545 ; + RECT 19.685 147.995 19.735 148.125 ; + RECT 14.965 150.415 15.015 150.545 ; + RECT 14.965 147.995 15.015 148.125 ; + RECT 19.485 150.415 19.535 150.545 ; + RECT 19.485 147.995 19.535 148.125 ; + RECT 14.565 147.305 14.615 147.435 ; + RECT 19.885 147.305 19.935 147.435 ; + RECT 14.765 147.535 14.815 147.665 ; + RECT 14.765 145.115 14.815 145.245 ; + RECT 19.685 147.535 19.735 147.665 ; + RECT 19.685 145.115 19.735 145.245 ; + RECT 14.965 147.535 15.015 147.665 ; + RECT 14.965 145.115 15.015 145.245 ; + RECT 19.485 147.535 19.535 147.665 ; + RECT 19.485 145.115 19.535 145.245 ; + RECT 14.565 144.425 14.615 144.555 ; + RECT 19.885 144.425 19.935 144.555 ; + RECT 14.765 144.655 14.815 144.785 ; + RECT 14.765 142.235 14.815 142.365 ; + RECT 19.685 144.655 19.735 144.785 ; + RECT 19.685 142.235 19.735 142.365 ; + RECT 14.965 144.655 15.015 144.785 ; + RECT 14.965 142.235 15.015 142.365 ; + RECT 19.485 144.655 19.535 144.785 ; + RECT 19.485 142.235 19.535 142.365 ; + RECT 14.565 141.545 14.615 141.675 ; + RECT 19.885 141.545 19.935 141.675 ; + RECT 14.765 141.775 14.815 141.905 ; + RECT 14.765 139.355 14.815 139.485 ; + RECT 19.685 141.775 19.735 141.905 ; + RECT 19.685 139.355 19.735 139.485 ; + RECT 14.965 141.775 15.015 141.905 ; + RECT 14.965 139.355 15.015 139.485 ; + RECT 19.485 141.775 19.535 141.905 ; + RECT 19.485 139.355 19.535 139.485 ; + RECT 14.565 138.665 14.615 138.795 ; + RECT 19.885 138.665 19.935 138.795 ; + RECT 14.765 138.895 14.815 139.025 ; + RECT 14.765 136.475 14.815 136.605 ; + RECT 19.685 138.895 19.735 139.025 ; + RECT 19.685 136.475 19.735 136.605 ; + RECT 14.965 138.895 15.015 139.025 ; + RECT 14.965 136.475 15.015 136.605 ; + RECT 19.485 138.895 19.535 139.025 ; + RECT 19.485 136.475 19.535 136.605 ; + RECT 14.565 135.785 14.615 135.915 ; + RECT 19.885 135.785 19.935 135.915 ; + RECT 14.765 136.015 14.815 136.145 ; + RECT 14.765 133.595 14.815 133.725 ; + RECT 19.685 136.015 19.735 136.145 ; + RECT 19.685 133.595 19.735 133.725 ; + RECT 14.965 136.015 15.015 136.145 ; + RECT 14.965 133.595 15.015 133.725 ; + RECT 19.485 136.015 19.535 136.145 ; + RECT 19.485 133.595 19.535 133.725 ; + RECT 14.565 132.905 14.615 133.035 ; + RECT 19.885 132.905 19.935 133.035 ; + RECT 14.765 133.135 14.815 133.265 ; + RECT 14.765 130.715 14.815 130.845 ; + RECT 19.685 133.135 19.735 133.265 ; + RECT 19.685 130.715 19.735 130.845 ; + RECT 14.965 133.135 15.015 133.265 ; + RECT 14.965 130.715 15.015 130.845 ; + RECT 19.485 133.135 19.535 133.265 ; + RECT 19.485 130.715 19.535 130.845 ; + RECT 14.565 130.025 14.615 130.155 ; + RECT 19.885 130.025 19.935 130.155 ; + RECT 14.765 130.255 14.815 130.385 ; + RECT 14.765 127.835 14.815 127.965 ; + RECT 19.685 130.255 19.735 130.385 ; + RECT 19.685 127.835 19.735 127.965 ; + RECT 14.965 130.255 15.015 130.385 ; + RECT 14.965 127.835 15.015 127.965 ; + RECT 19.485 130.255 19.535 130.385 ; + RECT 19.485 127.835 19.535 127.965 ; + RECT 14.565 178.985 14.615 179.115 ; + RECT 19.885 178.985 19.935 179.115 ; + RECT 14.765 179.215 14.815 179.345 ; + RECT 14.765 176.795 14.815 176.925 ; + RECT 19.685 179.215 19.735 179.345 ; + RECT 19.685 176.795 19.735 176.925 ; + RECT 14.965 179.215 15.015 179.345 ; + RECT 14.965 176.795 15.015 176.925 ; + RECT 19.485 179.215 19.535 179.345 ; + RECT 19.485 176.795 19.535 176.925 ; + RECT 14.565 127.145 14.615 127.275 ; + RECT 19.885 127.145 19.935 127.275 ; + RECT 14.765 127.375 14.815 127.505 ; + RECT 14.765 124.955 14.815 125.085 ; + RECT 19.685 127.375 19.735 127.505 ; + RECT 19.685 124.955 19.735 125.085 ; + RECT 14.965 127.375 15.015 127.505 ; + RECT 14.965 124.955 15.015 125.085 ; + RECT 19.485 127.375 19.535 127.505 ; + RECT 19.485 124.955 19.535 125.085 ; + RECT 14.565 124.265 14.615 124.395 ; + RECT 19.885 124.265 19.935 124.395 ; + RECT 14.765 124.495 14.815 124.625 ; + RECT 14.765 122.075 14.815 122.205 ; + RECT 19.685 124.495 19.735 124.625 ; + RECT 19.685 122.075 19.735 122.205 ; + RECT 14.965 124.495 15.015 124.625 ; + RECT 14.965 122.075 15.015 122.205 ; + RECT 19.485 124.495 19.535 124.625 ; + RECT 19.485 122.075 19.535 122.205 ; + RECT 14.565 121.385 14.615 121.515 ; + RECT 19.885 121.385 19.935 121.515 ; + RECT 14.765 121.615 14.815 121.745 ; + RECT 14.765 119.195 14.815 119.325 ; + RECT 19.685 121.615 19.735 121.745 ; + RECT 19.685 119.195 19.735 119.325 ; + RECT 14.965 121.615 15.015 121.745 ; + RECT 14.965 119.195 15.015 119.325 ; + RECT 19.485 121.615 19.535 121.745 ; + RECT 19.485 119.195 19.535 119.325 ; + RECT 14.565 118.505 14.615 118.635 ; + RECT 19.885 118.505 19.935 118.635 ; + RECT 14.765 118.735 14.815 118.865 ; + RECT 14.765 116.315 14.815 116.445 ; + RECT 19.685 118.735 19.735 118.865 ; + RECT 19.685 116.315 19.735 116.445 ; + RECT 14.965 118.735 15.015 118.865 ; + RECT 14.965 116.315 15.015 116.445 ; + RECT 19.485 118.735 19.535 118.865 ; + RECT 19.485 116.315 19.535 116.445 ; + RECT 14.565 115.625 14.615 115.755 ; + RECT 19.885 115.625 19.935 115.755 ; + RECT 14.765 115.855 14.815 115.985 ; + RECT 14.765 113.435 14.815 113.565 ; + RECT 19.685 115.855 19.735 115.985 ; + RECT 19.685 113.435 19.735 113.565 ; + RECT 14.965 115.855 15.015 115.985 ; + RECT 14.965 113.435 15.015 113.565 ; + RECT 19.485 115.855 19.535 115.985 ; + RECT 19.485 113.435 19.535 113.565 ; + RECT 14.565 112.745 14.615 112.875 ; + RECT 19.885 112.745 19.935 112.875 ; + RECT 14.765 112.975 14.815 113.105 ; + RECT 14.765 110.555 14.815 110.685 ; + RECT 19.685 112.975 19.735 113.105 ; + RECT 19.685 110.555 19.735 110.685 ; + RECT 14.965 112.975 15.015 113.105 ; + RECT 14.965 110.555 15.015 110.685 ; + RECT 19.485 112.975 19.535 113.105 ; + RECT 19.485 110.555 19.535 110.685 ; + RECT 14.565 109.865 14.615 109.995 ; + RECT 19.885 109.865 19.935 109.995 ; + RECT 14.765 110.095 14.815 110.225 ; + RECT 14.765 107.675 14.815 107.805 ; + RECT 19.685 110.095 19.735 110.225 ; + RECT 19.685 107.675 19.735 107.805 ; + RECT 14.965 110.095 15.015 110.225 ; + RECT 14.965 107.675 15.015 107.805 ; + RECT 19.485 110.095 19.535 110.225 ; + RECT 19.485 107.675 19.535 107.805 ; + RECT 14.565 106.985 14.615 107.115 ; + RECT 19.885 106.985 19.935 107.115 ; + RECT 14.765 107.215 14.815 107.345 ; + RECT 14.765 104.795 14.815 104.925 ; + RECT 19.685 107.215 19.735 107.345 ; + RECT 19.685 104.795 19.735 104.925 ; + RECT 14.965 107.215 15.015 107.345 ; + RECT 14.965 104.795 15.015 104.925 ; + RECT 19.485 107.215 19.535 107.345 ; + RECT 19.485 104.795 19.535 104.925 ; + RECT 14.565 104.105 14.615 104.235 ; + RECT 19.885 104.105 19.935 104.235 ; + RECT 14.765 104.335 14.815 104.465 ; + RECT 14.765 101.915 14.815 102.045 ; + RECT 19.685 104.335 19.735 104.465 ; + RECT 19.685 101.915 19.735 102.045 ; + RECT 14.965 104.335 15.015 104.465 ; + RECT 14.965 101.915 15.015 102.045 ; + RECT 19.485 104.335 19.535 104.465 ; + RECT 19.485 101.915 19.535 102.045 ; + RECT 14.565 101.225 14.615 101.355 ; + RECT 19.885 101.225 19.935 101.355 ; + RECT 14.765 101.455 14.815 101.585 ; + RECT 14.765 99.035 14.815 99.165 ; + RECT 19.685 101.455 19.735 101.585 ; + RECT 19.685 99.035 19.735 99.165 ; + RECT 14.965 101.455 15.015 101.585 ; + RECT 14.965 99.035 15.015 99.165 ; + RECT 19.485 101.455 19.535 101.585 ; + RECT 19.485 99.035 19.535 99.165 ; + RECT 14.565 176.105 14.615 176.235 ; + RECT 19.885 176.105 19.935 176.235 ; + RECT 14.765 176.335 14.815 176.465 ; + RECT 14.765 173.915 14.815 174.045 ; + RECT 19.685 176.335 19.735 176.465 ; + RECT 19.685 173.915 19.735 174.045 ; + RECT 14.965 176.335 15.015 176.465 ; + RECT 14.965 173.915 15.015 174.045 ; + RECT 19.485 176.335 19.535 176.465 ; + RECT 19.485 173.915 19.535 174.045 ; + RECT 14.565 98.345 14.615 98.475 ; + RECT 19.885 98.345 19.935 98.475 ; + RECT 14.765 98.575 14.815 98.705 ; + RECT 14.765 96.155 14.815 96.285 ; + RECT 19.685 98.575 19.735 98.705 ; + RECT 19.685 96.155 19.735 96.285 ; + RECT 14.965 98.575 15.015 98.705 ; + RECT 14.965 96.155 15.015 96.285 ; + RECT 19.485 98.575 19.535 98.705 ; + RECT 19.485 96.155 19.535 96.285 ; + RECT 14.565 95.465 14.615 95.595 ; + RECT 19.885 95.465 19.935 95.595 ; + RECT 14.765 95.695 14.815 95.825 ; + RECT 14.765 93.275 14.815 93.405 ; + RECT 19.685 95.695 19.735 95.825 ; + RECT 19.685 93.275 19.735 93.405 ; + RECT 14.965 95.695 15.015 95.825 ; + RECT 14.965 93.275 15.015 93.405 ; + RECT 19.485 95.695 19.535 95.825 ; + RECT 19.485 93.275 19.535 93.405 ; + RECT 14.565 92.585 14.615 92.715 ; + RECT 19.885 92.585 19.935 92.715 ; + RECT 14.765 92.815 14.815 92.945 ; + RECT 14.765 90.395 14.815 90.525 ; + RECT 19.685 92.815 19.735 92.945 ; + RECT 19.685 90.395 19.735 90.525 ; + RECT 14.965 92.815 15.015 92.945 ; + RECT 14.965 90.395 15.015 90.525 ; + RECT 19.485 92.815 19.535 92.945 ; + RECT 19.485 90.395 19.535 90.525 ; + RECT 14.565 89.705 14.615 89.835 ; + RECT 19.885 89.705 19.935 89.835 ; + RECT 14.765 89.935 14.815 90.065 ; + RECT 14.765 87.515 14.815 87.645 ; + RECT 19.685 89.935 19.735 90.065 ; + RECT 19.685 87.515 19.735 87.645 ; + RECT 14.965 89.935 15.015 90.065 ; + RECT 14.965 87.515 15.015 87.645 ; + RECT 19.485 89.935 19.535 90.065 ; + RECT 19.485 87.515 19.535 87.645 ; + RECT 14.565 86.825 14.615 86.955 ; + RECT 19.885 86.825 19.935 86.955 ; + RECT 14.765 87.055 14.815 87.185 ; + RECT 14.765 84.635 14.815 84.765 ; + RECT 19.685 87.055 19.735 87.185 ; + RECT 19.685 84.635 19.735 84.765 ; + RECT 14.965 87.055 15.015 87.185 ; + RECT 14.965 84.635 15.015 84.765 ; + RECT 19.485 87.055 19.535 87.185 ; + RECT 19.485 84.635 19.535 84.765 ; + RECT 14.565 83.945 14.615 84.075 ; + RECT 19.885 83.945 19.935 84.075 ; + RECT 14.765 84.175 14.815 84.305 ; + RECT 14.765 81.755 14.815 81.885 ; + RECT 19.685 84.175 19.735 84.305 ; + RECT 19.685 81.755 19.735 81.885 ; + RECT 14.965 84.175 15.015 84.305 ; + RECT 14.965 81.755 15.015 81.885 ; + RECT 19.485 84.175 19.535 84.305 ; + RECT 19.485 81.755 19.535 81.885 ; + RECT 14.565 81.065 14.615 81.195 ; + RECT 19.885 81.065 19.935 81.195 ; + RECT 14.765 81.295 14.815 81.425 ; + RECT 14.765 78.875 14.815 79.005 ; + RECT 19.685 81.295 19.735 81.425 ; + RECT 19.685 78.875 19.735 79.005 ; + RECT 14.965 81.295 15.015 81.425 ; + RECT 14.965 78.875 15.015 79.005 ; + RECT 19.485 81.295 19.535 81.425 ; + RECT 19.485 78.875 19.535 79.005 ; + RECT 14.565 78.185 14.615 78.315 ; + RECT 19.885 78.185 19.935 78.315 ; + RECT 14.765 78.415 14.815 78.545 ; + RECT 14.765 75.995 14.815 76.125 ; + RECT 19.685 78.415 19.735 78.545 ; + RECT 19.685 75.995 19.735 76.125 ; + RECT 14.965 78.415 15.015 78.545 ; + RECT 14.965 75.995 15.015 76.125 ; + RECT 19.485 78.415 19.535 78.545 ; + RECT 19.485 75.995 19.535 76.125 ; + RECT 14.565 75.305 14.615 75.435 ; + RECT 19.885 75.305 19.935 75.435 ; + RECT 14.765 75.535 14.815 75.665 ; + RECT 14.765 73.115 14.815 73.245 ; + RECT 19.685 75.535 19.735 75.665 ; + RECT 19.685 73.115 19.735 73.245 ; + RECT 14.965 75.535 15.015 75.665 ; + RECT 14.965 73.115 15.015 73.245 ; + RECT 19.485 75.535 19.535 75.665 ; + RECT 19.485 73.115 19.535 73.245 ; + RECT 14.565 72.425 14.615 72.555 ; + RECT 19.885 72.425 19.935 72.555 ; + RECT 14.765 72.655 14.815 72.785 ; + RECT 14.765 70.235 14.815 70.365 ; + RECT 19.685 72.655 19.735 72.785 ; + RECT 19.685 70.235 19.735 70.365 ; + RECT 14.965 72.655 15.015 72.785 ; + RECT 14.965 70.235 15.015 70.365 ; + RECT 19.485 72.655 19.535 72.785 ; + RECT 19.485 70.235 19.535 70.365 ; + RECT 14.565 173.225 14.615 173.355 ; + RECT 19.885 173.225 19.935 173.355 ; + RECT 14.765 173.455 14.815 173.585 ; + RECT 14.765 171.035 14.815 171.165 ; + RECT 19.685 173.455 19.735 173.585 ; + RECT 19.685 171.035 19.735 171.165 ; + RECT 14.965 173.455 15.015 173.585 ; + RECT 14.965 171.035 15.015 171.165 ; + RECT 19.485 173.455 19.535 173.585 ; + RECT 19.485 171.035 19.535 171.165 ; + RECT 14.565 69.545 14.615 69.675 ; + RECT 19.885 69.545 19.935 69.675 ; + RECT 14.765 69.775 14.815 69.905 ; + RECT 14.765 67.355 14.815 67.485 ; + RECT 19.685 69.775 19.735 69.905 ; + RECT 19.685 67.355 19.735 67.485 ; + RECT 14.965 69.775 15.015 69.905 ; + RECT 14.965 67.355 15.015 67.485 ; + RECT 19.485 69.775 19.535 69.905 ; + RECT 19.485 67.355 19.535 67.485 ; + RECT 14.565 66.665 14.615 66.795 ; + RECT 19.885 66.665 19.935 66.795 ; + RECT 14.765 66.895 14.815 67.025 ; + RECT 14.765 64.475 14.815 64.605 ; + RECT 19.685 66.895 19.735 67.025 ; + RECT 19.685 64.475 19.735 64.605 ; + RECT 14.965 66.895 15.015 67.025 ; + RECT 14.965 64.475 15.015 64.605 ; + RECT 19.485 66.895 19.535 67.025 ; + RECT 19.485 64.475 19.535 64.605 ; + RECT 14.565 63.785 14.615 63.915 ; + RECT 19.885 63.785 19.935 63.915 ; + RECT 14.765 64.015 14.815 64.145 ; + RECT 14.765 61.595 14.815 61.725 ; + RECT 19.685 64.015 19.735 64.145 ; + RECT 19.685 61.595 19.735 61.725 ; + RECT 14.965 64.015 15.015 64.145 ; + RECT 14.965 61.595 15.015 61.725 ; + RECT 19.485 64.015 19.535 64.145 ; + RECT 19.485 61.595 19.535 61.725 ; + RECT 14.565 60.905 14.615 61.035 ; + RECT 19.885 60.905 19.935 61.035 ; + RECT 14.765 61.135 14.815 61.265 ; + RECT 14.765 58.715 14.815 58.845 ; + RECT 19.685 61.135 19.735 61.265 ; + RECT 19.685 58.715 19.735 58.845 ; + RECT 14.965 61.135 15.015 61.265 ; + RECT 14.965 58.715 15.015 58.845 ; + RECT 19.485 61.135 19.535 61.265 ; + RECT 19.485 58.715 19.535 58.845 ; + RECT 14.565 58.025 14.615 58.155 ; + RECT 19.885 58.025 19.935 58.155 ; + RECT 14.765 58.255 14.815 58.385 ; + RECT 14.765 55.835 14.815 55.965 ; + RECT 19.685 58.255 19.735 58.385 ; + RECT 19.685 55.835 19.735 55.965 ; + RECT 14.965 58.255 15.015 58.385 ; + RECT 14.965 55.835 15.015 55.965 ; + RECT 19.485 58.255 19.535 58.385 ; + RECT 19.485 55.835 19.535 55.965 ; + RECT 14.565 55.145 14.615 55.275 ; + RECT 19.885 55.145 19.935 55.275 ; + RECT 14.765 55.375 14.815 55.505 ; + RECT 14.765 52.955 14.815 53.085 ; + RECT 19.685 55.375 19.735 55.505 ; + RECT 19.685 52.955 19.735 53.085 ; + RECT 14.965 55.375 15.015 55.505 ; + RECT 14.965 52.955 15.015 53.085 ; + RECT 19.485 55.375 19.535 55.505 ; + RECT 19.485 52.955 19.535 53.085 ; + RECT 14.565 52.265 14.615 52.395 ; + RECT 19.885 52.265 19.935 52.395 ; + RECT 14.765 52.495 14.815 52.625 ; + RECT 14.765 50.075 14.815 50.205 ; + RECT 19.685 52.495 19.735 52.625 ; + RECT 19.685 50.075 19.735 50.205 ; + RECT 14.965 52.495 15.015 52.625 ; + RECT 14.965 50.075 15.015 50.205 ; + RECT 19.485 52.495 19.535 52.625 ; + RECT 19.485 50.075 19.535 50.205 ; + RECT 14.565 49.385 14.615 49.515 ; + RECT 19.885 49.385 19.935 49.515 ; + RECT 14.765 49.615 14.815 49.745 ; + RECT 14.765 47.195 14.815 47.325 ; + RECT 19.685 49.615 19.735 49.745 ; + RECT 19.685 47.195 19.735 47.325 ; + RECT 14.965 49.615 15.015 49.745 ; + RECT 14.965 47.195 15.015 47.325 ; + RECT 19.485 49.615 19.535 49.745 ; + RECT 19.485 47.195 19.535 47.325 ; + RECT 14.565 46.505 14.615 46.635 ; + RECT 19.885 46.505 19.935 46.635 ; + RECT 14.765 46.735 14.815 46.865 ; + RECT 14.765 44.315 14.815 44.445 ; + RECT 19.685 46.735 19.735 46.865 ; + RECT 19.685 44.315 19.735 44.445 ; + RECT 14.965 46.735 15.015 46.865 ; + RECT 14.965 44.315 15.015 44.445 ; + RECT 19.485 46.735 19.535 46.865 ; + RECT 19.485 44.315 19.535 44.445 ; + RECT 14.565 43.625 14.615 43.755 ; + RECT 19.885 43.625 19.935 43.755 ; + RECT 14.765 43.855 14.815 43.985 ; + RECT 14.765 41.435 14.815 41.565 ; + RECT 19.685 43.855 19.735 43.985 ; + RECT 19.685 41.435 19.735 41.565 ; + RECT 14.965 43.855 15.015 43.985 ; + RECT 14.965 41.435 15.015 41.565 ; + RECT 19.485 43.855 19.535 43.985 ; + RECT 19.485 41.435 19.535 41.565 ; + RECT 14.565 170.345 14.615 170.475 ; + RECT 19.885 170.345 19.935 170.475 ; + RECT 14.765 170.575 14.815 170.705 ; + RECT 14.765 168.155 14.815 168.285 ; + RECT 19.685 170.575 19.735 170.705 ; + RECT 19.685 168.155 19.735 168.285 ; + RECT 14.965 170.575 15.015 170.705 ; + RECT 14.965 168.155 15.015 168.285 ; + RECT 19.485 170.575 19.535 170.705 ; + RECT 19.485 168.155 19.535 168.285 ; + RECT 14.565 40.745 14.615 40.875 ; + RECT 19.885 40.745 19.935 40.875 ; + RECT 14.765 40.975 14.815 41.105 ; + RECT 14.765 38.555 14.815 38.685 ; + RECT 19.685 40.975 19.735 41.105 ; + RECT 19.685 38.555 19.735 38.685 ; + RECT 14.965 40.975 15.015 41.105 ; + RECT 14.965 38.555 15.015 38.685 ; + RECT 19.485 40.975 19.535 41.105 ; + RECT 19.485 38.555 19.535 38.685 ; + RECT 14.565 37.865 14.615 37.995 ; + RECT 19.885 37.865 19.935 37.995 ; + RECT 14.765 38.095 14.815 38.225 ; + RECT 14.765 35.675 14.815 35.805 ; + RECT 19.685 38.095 19.735 38.225 ; + RECT 19.685 35.675 19.735 35.805 ; + RECT 14.965 38.095 15.015 38.225 ; + RECT 14.965 35.675 15.015 35.805 ; + RECT 19.485 38.095 19.535 38.225 ; + RECT 19.485 35.675 19.535 35.805 ; + RECT 14.565 34.985 14.615 35.115 ; + RECT 19.885 34.985 19.935 35.115 ; + RECT 14.765 35.215 14.815 35.345 ; + RECT 14.765 32.795 14.815 32.925 ; + RECT 19.685 35.215 19.735 35.345 ; + RECT 19.685 32.795 19.735 32.925 ; + RECT 14.965 35.215 15.015 35.345 ; + RECT 14.965 32.795 15.015 32.925 ; + RECT 19.485 35.215 19.535 35.345 ; + RECT 19.485 32.795 19.535 32.925 ; + RECT 14.565 32.105 14.615 32.235 ; + RECT 19.885 32.105 19.935 32.235 ; + RECT 14.765 32.335 14.815 32.465 ; + RECT 14.765 29.915 14.815 30.045 ; + RECT 19.685 32.335 19.735 32.465 ; + RECT 19.685 29.915 19.735 30.045 ; + RECT 14.965 32.335 15.015 32.465 ; + RECT 14.965 29.915 15.015 30.045 ; + RECT 19.485 32.335 19.535 32.465 ; + RECT 19.485 29.915 19.535 30.045 ; + RECT 14.565 29.225 14.615 29.355 ; + RECT 19.885 29.225 19.935 29.355 ; + RECT 14.765 29.455 14.815 29.585 ; + RECT 14.765 27.035 14.815 27.165 ; + RECT 19.685 29.455 19.735 29.585 ; + RECT 19.685 27.035 19.735 27.165 ; + RECT 14.965 29.455 15.015 29.585 ; + RECT 14.965 27.035 15.015 27.165 ; + RECT 19.485 29.455 19.535 29.585 ; + RECT 19.485 27.035 19.535 27.165 ; + RECT 14.565 26.345 14.615 26.475 ; + RECT 19.885 26.345 19.935 26.475 ; + RECT 14.765 26.575 14.815 26.705 ; + RECT 14.765 24.155 14.815 24.285 ; + RECT 19.685 26.575 19.735 26.705 ; + RECT 19.685 24.155 19.735 24.285 ; + RECT 14.965 26.575 15.015 26.705 ; + RECT 14.965 24.155 15.015 24.285 ; + RECT 19.485 26.575 19.535 26.705 ; + RECT 19.485 24.155 19.535 24.285 ; + RECT 14.565 23.465 14.615 23.595 ; + RECT 19.885 23.465 19.935 23.595 ; + RECT 14.765 23.695 14.815 23.825 ; + RECT 14.765 21.275 14.815 21.405 ; + RECT 19.685 23.695 19.735 23.825 ; + RECT 19.685 21.275 19.735 21.405 ; + RECT 14.965 23.695 15.015 23.825 ; + RECT 14.965 21.275 15.015 21.405 ; + RECT 19.485 23.695 19.535 23.825 ; + RECT 19.485 21.275 19.535 21.405 ; + RECT 14.565 20.585 14.615 20.715 ; + RECT 19.885 20.585 19.935 20.715 ; + RECT 14.765 20.815 14.815 20.945 ; + RECT 14.765 18.395 14.815 18.525 ; + RECT 19.685 20.815 19.735 20.945 ; + RECT 19.685 18.395 19.735 18.525 ; + RECT 14.965 20.815 15.015 20.945 ; + RECT 14.965 18.395 15.015 18.525 ; + RECT 19.485 20.815 19.535 20.945 ; + RECT 19.485 18.395 19.535 18.525 ; + RECT 14.565 17.705 14.615 17.835 ; + RECT 19.885 17.705 19.935 17.835 ; + RECT 14.765 17.935 14.815 18.065 ; + RECT 14.765 15.515 14.815 15.645 ; + RECT 19.685 17.935 19.735 18.065 ; + RECT 19.685 15.515 19.735 15.645 ; + RECT 14.965 17.935 15.015 18.065 ; + RECT 14.965 15.515 15.015 15.645 ; + RECT 19.485 17.935 19.535 18.065 ; + RECT 19.485 15.515 19.535 15.645 ; + RECT 14.565 14.825 14.615 14.955 ; + RECT 19.885 14.825 19.935 14.955 ; + RECT 14.765 15.055 14.815 15.185 ; + RECT 14.765 12.635 14.815 12.765 ; + RECT 19.685 15.055 19.735 15.185 ; + RECT 19.685 12.635 19.735 12.765 ; + RECT 14.965 15.055 15.015 15.185 ; + RECT 14.965 12.635 15.015 12.765 ; + RECT 19.485 15.055 19.535 15.185 ; + RECT 19.485 12.635 19.535 12.765 ; + RECT 14.565 167.465 14.615 167.595 ; + RECT 19.885 167.465 19.935 167.595 ; + RECT 14.765 167.695 14.815 167.825 ; + RECT 14.765 165.275 14.815 165.405 ; + RECT 19.685 167.695 19.735 167.825 ; + RECT 19.685 165.275 19.735 165.405 ; + RECT 14.965 167.695 15.015 167.825 ; + RECT 14.965 165.275 15.015 165.405 ; + RECT 19.485 167.695 19.535 167.825 ; + RECT 19.485 165.275 19.535 165.405 ; + RECT 14.565 11.945 14.615 12.075 ; + RECT 19.885 11.945 19.935 12.075 ; + RECT 14.765 12.175 14.815 12.305 ; + RECT 14.765 9.755 14.815 9.885 ; + RECT 19.685 12.175 19.735 12.305 ; + RECT 19.685 9.755 19.735 9.885 ; + RECT 14.965 12.175 15.015 12.305 ; + RECT 14.965 9.755 15.015 9.885 ; + RECT 19.485 12.175 19.535 12.305 ; + RECT 19.485 9.755 19.535 9.885 ; + RECT 14.565 9.065 14.615 9.195 ; + RECT 19.885 9.065 19.935 9.195 ; + RECT 14.765 9.295 14.815 9.425 ; + RECT 14.765 6.875 14.815 7.005 ; + RECT 19.685 9.295 19.735 9.425 ; + RECT 19.685 6.875 19.735 7.005 ; + RECT 14.965 9.295 15.015 9.425 ; + RECT 14.965 6.875 15.015 7.005 ; + RECT 19.485 9.295 19.535 9.425 ; + RECT 19.485 6.875 19.535 7.005 ; + RECT 14.565 6.185 14.615 6.315 ; + RECT 19.885 6.185 19.935 6.315 ; + RECT 14.765 6.415 14.815 6.545 ; + RECT 14.765 3.995 14.815 4.125 ; + RECT 19.685 6.415 19.735 6.545 ; + RECT 19.685 3.995 19.735 4.125 ; + RECT 14.965 6.415 15.015 6.545 ; + RECT 14.965 3.995 15.015 4.125 ; + RECT 19.485 6.415 19.535 6.545 ; + RECT 19.485 3.995 19.535 4.125 ; + RECT 14.565 164.585 14.615 164.715 ; + RECT 19.885 164.585 19.935 164.715 ; + RECT 14.765 164.815 14.815 164.945 ; + RECT 14.765 162.395 14.815 162.525 ; + RECT 19.685 164.815 19.735 164.945 ; + RECT 19.685 162.395 19.735 162.525 ; + RECT 14.965 164.815 15.015 164.945 ; + RECT 14.965 162.395 15.015 162.525 ; + RECT 19.485 164.815 19.535 164.945 ; + RECT 19.485 162.395 19.535 162.525 ; + RECT 14.565 161.705 14.615 161.835 ; + RECT 19.885 161.705 19.935 161.835 ; + RECT 14.765 161.935 14.815 162.065 ; + RECT 14.765 159.515 14.815 159.645 ; + RECT 19.685 161.935 19.735 162.065 ; + RECT 19.685 159.515 19.735 159.645 ; + RECT 14.965 161.935 15.015 162.065 ; + RECT 14.965 159.515 15.015 159.645 ; + RECT 19.485 161.935 19.535 162.065 ; + RECT 19.485 159.515 19.535 159.645 ; + RECT 14.565 158.825 14.615 158.955 ; + RECT 19.885 158.825 19.935 158.955 ; + RECT 14.765 159.055 14.815 159.185 ; + RECT 14.765 156.635 14.815 156.765 ; + RECT 19.685 159.055 19.735 159.185 ; + RECT 19.685 156.635 19.735 156.765 ; + RECT 14.965 159.055 15.015 159.185 ; + RECT 14.965 156.635 15.015 156.765 ; + RECT 19.485 159.055 19.535 159.185 ; + RECT 19.485 156.635 19.535 156.765 ; + RECT 20.085 182.095 20.265 182.225 ; + RECT 20.875 181.865 21.055 181.995 ; + RECT 20.085 179.675 20.265 179.805 ; + RECT 20.43 179.445 20.48 179.575 ; + RECT 20.085 156.175 20.265 156.305 ; + RECT 20.875 155.945 21.055 156.075 ; + RECT 20.085 153.755 20.265 153.885 ; + RECT 20.43 153.525 20.48 153.655 ; + RECT 20.085 153.295 20.265 153.425 ; + RECT 20.875 153.065 21.055 153.195 ; + RECT 20.085 150.875 20.265 151.005 ; + RECT 20.43 150.645 20.48 150.775 ; + RECT 20.085 150.415 20.265 150.545 ; + RECT 20.875 150.185 21.055 150.315 ; + RECT 20.085 147.995 20.265 148.125 ; + RECT 20.43 147.765 20.48 147.895 ; + RECT 20.085 147.535 20.265 147.665 ; + RECT 20.875 147.305 21.055 147.435 ; + RECT 20.085 145.115 20.265 145.245 ; + RECT 20.43 144.885 20.48 145.015 ; + RECT 20.085 144.655 20.265 144.785 ; + RECT 20.875 144.425 21.055 144.555 ; + RECT 20.085 142.235 20.265 142.365 ; + RECT 20.43 142.005 20.48 142.135 ; + RECT 20.085 141.775 20.265 141.905 ; + RECT 20.875 141.545 21.055 141.675 ; + RECT 20.085 139.355 20.265 139.485 ; + RECT 20.43 139.125 20.48 139.255 ; + RECT 20.085 138.895 20.265 139.025 ; + RECT 20.875 138.665 21.055 138.795 ; + RECT 20.085 136.475 20.265 136.605 ; + RECT 20.43 136.245 20.48 136.375 ; + RECT 20.085 136.015 20.265 136.145 ; + RECT 20.875 135.785 21.055 135.915 ; + RECT 20.085 133.595 20.265 133.725 ; + RECT 20.43 133.365 20.48 133.495 ; + RECT 20.085 133.135 20.265 133.265 ; + RECT 20.875 132.905 21.055 133.035 ; + RECT 20.085 130.715 20.265 130.845 ; + RECT 20.43 130.485 20.48 130.615 ; + RECT 20.085 130.255 20.265 130.385 ; + RECT 20.875 130.025 21.055 130.155 ; + RECT 20.085 127.835 20.265 127.965 ; + RECT 20.43 127.605 20.48 127.735 ; + RECT 20.085 179.215 20.265 179.345 ; + RECT 20.875 178.985 21.055 179.115 ; + RECT 20.085 176.795 20.265 176.925 ; + RECT 20.43 176.565 20.48 176.695 ; + RECT 20.085 127.375 20.265 127.505 ; + RECT 20.875 127.145 21.055 127.275 ; + RECT 20.085 124.955 20.265 125.085 ; + RECT 20.43 124.725 20.48 124.855 ; + RECT 20.085 124.495 20.265 124.625 ; + RECT 20.875 124.265 21.055 124.395 ; + RECT 20.085 122.075 20.265 122.205 ; + RECT 20.43 121.845 20.48 121.975 ; + RECT 20.085 121.615 20.265 121.745 ; + RECT 20.875 121.385 21.055 121.515 ; + RECT 20.085 119.195 20.265 119.325 ; + RECT 20.43 118.965 20.48 119.095 ; + RECT 20.085 118.735 20.265 118.865 ; + RECT 20.875 118.505 21.055 118.635 ; + RECT 20.085 116.315 20.265 116.445 ; + RECT 20.43 116.085 20.48 116.215 ; + RECT 20.085 115.855 20.265 115.985 ; + RECT 20.875 115.625 21.055 115.755 ; + RECT 20.085 113.435 20.265 113.565 ; + RECT 20.43 113.205 20.48 113.335 ; + RECT 20.085 112.975 20.265 113.105 ; + RECT 20.875 112.745 21.055 112.875 ; + RECT 20.085 110.555 20.265 110.685 ; + RECT 20.43 110.325 20.48 110.455 ; + RECT 20.085 110.095 20.265 110.225 ; + RECT 20.875 109.865 21.055 109.995 ; + RECT 20.085 107.675 20.265 107.805 ; + RECT 20.43 107.445 20.48 107.575 ; + RECT 20.085 107.215 20.265 107.345 ; + RECT 20.875 106.985 21.055 107.115 ; + RECT 20.085 104.795 20.265 104.925 ; + RECT 20.43 104.565 20.48 104.695 ; + RECT 20.085 104.335 20.265 104.465 ; + RECT 20.875 104.105 21.055 104.235 ; + RECT 20.085 101.915 20.265 102.045 ; + RECT 20.43 101.685 20.48 101.815 ; + RECT 20.085 101.455 20.265 101.585 ; + RECT 20.875 101.225 21.055 101.355 ; + RECT 20.085 99.035 20.265 99.165 ; + RECT 20.43 98.805 20.48 98.935 ; + RECT 20.085 176.335 20.265 176.465 ; + RECT 20.875 176.105 21.055 176.235 ; + RECT 20.085 173.915 20.265 174.045 ; + RECT 20.43 173.685 20.48 173.815 ; + RECT 20.085 98.575 20.265 98.705 ; + RECT 20.875 98.345 21.055 98.475 ; + RECT 20.085 96.155 20.265 96.285 ; + RECT 20.43 95.925 20.48 96.055 ; + RECT 20.085 95.695 20.265 95.825 ; + RECT 20.875 95.465 21.055 95.595 ; + RECT 20.085 93.275 20.265 93.405 ; + RECT 20.43 93.045 20.48 93.175 ; + RECT 20.085 92.815 20.265 92.945 ; + RECT 20.875 92.585 21.055 92.715 ; + RECT 20.085 90.395 20.265 90.525 ; + RECT 20.43 90.165 20.48 90.295 ; + RECT 20.085 89.935 20.265 90.065 ; + RECT 20.875 89.705 21.055 89.835 ; + RECT 20.085 87.515 20.265 87.645 ; + RECT 20.43 87.285 20.48 87.415 ; + RECT 20.085 87.055 20.265 87.185 ; + RECT 20.875 86.825 21.055 86.955 ; + RECT 20.085 84.635 20.265 84.765 ; + RECT 20.43 84.405 20.48 84.535 ; + RECT 20.085 84.175 20.265 84.305 ; + RECT 20.875 83.945 21.055 84.075 ; + RECT 20.085 81.755 20.265 81.885 ; + RECT 20.43 81.525 20.48 81.655 ; + RECT 20.085 81.295 20.265 81.425 ; + RECT 20.875 81.065 21.055 81.195 ; + RECT 20.085 78.875 20.265 79.005 ; + RECT 20.43 78.645 20.48 78.775 ; + RECT 20.085 78.415 20.265 78.545 ; + RECT 20.875 78.185 21.055 78.315 ; + RECT 20.085 75.995 20.265 76.125 ; + RECT 20.43 75.765 20.48 75.895 ; + RECT 20.085 75.535 20.265 75.665 ; + RECT 20.875 75.305 21.055 75.435 ; + RECT 20.085 73.115 20.265 73.245 ; + RECT 20.43 72.885 20.48 73.015 ; + RECT 20.085 72.655 20.265 72.785 ; + RECT 20.875 72.425 21.055 72.555 ; + RECT 20.085 70.235 20.265 70.365 ; + RECT 20.43 70.005 20.48 70.135 ; + RECT 20.085 173.455 20.265 173.585 ; + RECT 20.875 173.225 21.055 173.355 ; + RECT 20.085 171.035 20.265 171.165 ; + RECT 20.43 170.805 20.48 170.935 ; + RECT 20.085 69.775 20.265 69.905 ; + RECT 20.875 69.545 21.055 69.675 ; + RECT 20.085 67.355 20.265 67.485 ; + RECT 20.43 67.125 20.48 67.255 ; + RECT 20.085 66.895 20.265 67.025 ; + RECT 20.875 66.665 21.055 66.795 ; + RECT 20.085 64.475 20.265 64.605 ; + RECT 20.43 64.245 20.48 64.375 ; + RECT 20.085 64.015 20.265 64.145 ; + RECT 20.875 63.785 21.055 63.915 ; + RECT 20.085 61.595 20.265 61.725 ; + RECT 20.43 61.365 20.48 61.495 ; + RECT 20.085 61.135 20.265 61.265 ; + RECT 20.875 60.905 21.055 61.035 ; + RECT 20.085 58.715 20.265 58.845 ; + RECT 20.43 58.485 20.48 58.615 ; + RECT 20.085 58.255 20.265 58.385 ; + RECT 20.875 58.025 21.055 58.155 ; + RECT 20.085 55.835 20.265 55.965 ; + RECT 20.43 55.605 20.48 55.735 ; + RECT 20.085 55.375 20.265 55.505 ; + RECT 20.875 55.145 21.055 55.275 ; + RECT 20.085 52.955 20.265 53.085 ; + RECT 20.43 52.725 20.48 52.855 ; + RECT 20.085 52.495 20.265 52.625 ; + RECT 20.875 52.265 21.055 52.395 ; + RECT 20.085 50.075 20.265 50.205 ; + RECT 20.43 49.845 20.48 49.975 ; + RECT 20.085 49.615 20.265 49.745 ; + RECT 20.875 49.385 21.055 49.515 ; + RECT 20.085 47.195 20.265 47.325 ; + RECT 20.43 46.965 20.48 47.095 ; + RECT 20.085 46.735 20.265 46.865 ; + RECT 20.875 46.505 21.055 46.635 ; + RECT 20.085 44.315 20.265 44.445 ; + RECT 20.43 44.085 20.48 44.215 ; + RECT 20.085 43.855 20.265 43.985 ; + RECT 20.875 43.625 21.055 43.755 ; + RECT 20.085 41.435 20.265 41.565 ; + RECT 20.43 41.205 20.48 41.335 ; + RECT 20.085 170.575 20.265 170.705 ; + RECT 20.875 170.345 21.055 170.475 ; + RECT 20.085 168.155 20.265 168.285 ; + RECT 20.43 167.925 20.48 168.055 ; + RECT 20.085 40.975 20.265 41.105 ; + RECT 20.875 40.745 21.055 40.875 ; + RECT 20.085 38.555 20.265 38.685 ; + RECT 20.43 38.325 20.48 38.455 ; + RECT 20.085 38.095 20.265 38.225 ; + RECT 20.875 37.865 21.055 37.995 ; + RECT 20.085 35.675 20.265 35.805 ; + RECT 20.43 35.445 20.48 35.575 ; + RECT 20.085 35.215 20.265 35.345 ; + RECT 20.875 34.985 21.055 35.115 ; + RECT 20.085 32.795 20.265 32.925 ; + RECT 20.43 32.565 20.48 32.695 ; + RECT 20.085 32.335 20.265 32.465 ; + RECT 20.875 32.105 21.055 32.235 ; + RECT 20.085 29.915 20.265 30.045 ; + RECT 20.43 29.685 20.48 29.815 ; + RECT 20.085 29.455 20.265 29.585 ; + RECT 20.875 29.225 21.055 29.355 ; + RECT 20.085 27.035 20.265 27.165 ; + RECT 20.43 26.805 20.48 26.935 ; + RECT 20.085 26.575 20.265 26.705 ; + RECT 20.875 26.345 21.055 26.475 ; + RECT 20.085 24.155 20.265 24.285 ; + RECT 20.43 23.925 20.48 24.055 ; + RECT 20.085 23.695 20.265 23.825 ; + RECT 20.875 23.465 21.055 23.595 ; + RECT 20.085 21.275 20.265 21.405 ; + RECT 20.43 21.045 20.48 21.175 ; + RECT 20.085 20.815 20.265 20.945 ; + RECT 20.875 20.585 21.055 20.715 ; + RECT 20.085 18.395 20.265 18.525 ; + RECT 20.43 18.165 20.48 18.295 ; + RECT 20.085 17.935 20.265 18.065 ; + RECT 20.875 17.705 21.055 17.835 ; + RECT 20.085 15.515 20.265 15.645 ; + RECT 20.43 15.285 20.48 15.415 ; + RECT 20.085 15.055 20.265 15.185 ; + RECT 20.875 14.825 21.055 14.955 ; + RECT 20.085 12.635 20.265 12.765 ; + RECT 20.43 12.405 20.48 12.535 ; + RECT 20.085 167.695 20.265 167.825 ; + RECT 20.875 167.465 21.055 167.595 ; + RECT 20.085 165.275 20.265 165.405 ; + RECT 20.43 165.045 20.48 165.175 ; + RECT 20.085 12.175 20.265 12.305 ; + RECT 20.875 11.945 21.055 12.075 ; + RECT 20.085 9.755 20.265 9.885 ; + RECT 20.43 9.525 20.48 9.655 ; + RECT 20.085 9.295 20.265 9.425 ; + RECT 20.875 9.065 21.055 9.195 ; + RECT 20.085 6.875 20.265 7.005 ; + RECT 20.43 6.645 20.48 6.775 ; + RECT 20.085 6.415 20.265 6.545 ; + RECT 20.875 6.185 21.055 6.315 ; + RECT 20.085 3.995 20.265 4.125 ; + RECT 20.43 3.765 20.48 3.895 ; + RECT 20.085 164.815 20.265 164.945 ; + RECT 20.875 164.585 21.055 164.715 ; + RECT 20.085 162.395 20.265 162.525 ; + RECT 20.43 162.165 20.48 162.295 ; + RECT 20.085 161.935 20.265 162.065 ; + RECT 20.875 161.705 21.055 161.835 ; + RECT 20.085 159.515 20.265 159.645 ; + RECT 20.43 159.285 20.48 159.415 ; + RECT 20.085 159.055 20.265 159.185 ; + RECT 20.875 158.825 21.055 158.955 ; + RECT 20.085 156.635 20.265 156.765 ; + RECT 20.43 156.405 20.48 156.535 ; + RECT 20.085 3.535 20.265 3.665 ; + RECT 20.875 3.305 21.055 3.435 ; + RECT 20.085 1.115 20.265 1.245 ; + RECT 20.43 0.885 20.48 1.015 ; + RECT 20.085 184.975 20.265 185.105 ; + RECT 20.875 184.745 21.055 184.875 ; + RECT 20.085 182.555 20.265 182.685 ; + RECT 20.43 182.325 20.48 182.455 ; + RECT 14.565 411.425 14.615 411.555 ; + RECT 19.885 411.425 19.935 411.555 ; + RECT 14.765 411.195 14.815 411.325 ; + RECT 14.765 413.615 14.815 413.745 ; + RECT 19.685 411.195 19.735 411.325 ; + RECT 19.685 413.615 19.735 413.745 ; + RECT 14.965 411.195 15.015 411.325 ; + RECT 14.965 413.615 15.015 413.745 ; + RECT 19.485 411.195 19.535 411.325 ; + RECT 19.485 413.615 19.535 413.745 ; + RECT 14.565 229.985 14.615 230.115 ; + RECT 19.885 229.985 19.935 230.115 ; + RECT 14.765 229.755 14.815 229.885 ; + RECT 14.765 232.175 14.815 232.305 ; + RECT 19.685 229.755 19.735 229.885 ; + RECT 19.685 232.175 19.735 232.305 ; + RECT 14.965 229.755 15.015 229.885 ; + RECT 14.965 232.175 15.015 232.305 ; + RECT 19.485 229.755 19.535 229.885 ; + RECT 19.485 232.175 19.535 232.305 ; + RECT 14.565 232.865 14.615 232.995 ; + RECT 19.885 232.865 19.935 232.995 ; + RECT 14.765 232.635 14.815 232.765 ; + RECT 14.765 235.055 14.815 235.185 ; + RECT 19.685 232.635 19.735 232.765 ; + RECT 19.685 235.055 19.735 235.185 ; + RECT 14.965 232.635 15.015 232.765 ; + RECT 14.965 235.055 15.015 235.185 ; + RECT 19.485 232.635 19.535 232.765 ; + RECT 19.485 235.055 19.535 235.185 ; + RECT 14.565 258.785 14.615 258.915 ; + RECT 19.885 258.785 19.935 258.915 ; + RECT 14.765 258.555 14.815 258.685 ; + RECT 14.765 260.975 14.815 261.105 ; + RECT 19.685 258.555 19.735 258.685 ; + RECT 19.685 260.975 19.735 261.105 ; + RECT 14.965 258.555 15.015 258.685 ; + RECT 14.965 260.975 15.015 261.105 ; + RECT 19.485 258.555 19.535 258.685 ; + RECT 19.485 260.975 19.535 261.105 ; + RECT 14.565 261.665 14.615 261.795 ; + RECT 19.885 261.665 19.935 261.795 ; + RECT 14.765 261.435 14.815 261.565 ; + RECT 14.765 263.855 14.815 263.985 ; + RECT 19.685 261.435 19.735 261.565 ; + RECT 19.685 263.855 19.735 263.985 ; + RECT 14.965 261.435 15.015 261.565 ; + RECT 14.965 263.855 15.015 263.985 ; + RECT 19.485 261.435 19.535 261.565 ; + RECT 19.485 263.855 19.535 263.985 ; + RECT 14.565 264.545 14.615 264.675 ; + RECT 19.885 264.545 19.935 264.675 ; + RECT 14.765 264.315 14.815 264.445 ; + RECT 14.765 266.735 14.815 266.865 ; + RECT 19.685 264.315 19.735 264.445 ; + RECT 19.685 266.735 19.735 266.865 ; + RECT 14.965 264.315 15.015 264.445 ; + RECT 14.965 266.735 15.015 266.865 ; + RECT 19.485 264.315 19.535 264.445 ; + RECT 19.485 266.735 19.535 266.865 ; + RECT 14.565 267.425 14.615 267.555 ; + RECT 19.885 267.425 19.935 267.555 ; + RECT 14.765 267.195 14.815 267.325 ; + RECT 14.765 269.615 14.815 269.745 ; + RECT 19.685 267.195 19.735 267.325 ; + RECT 19.685 269.615 19.735 269.745 ; + RECT 14.965 267.195 15.015 267.325 ; + RECT 14.965 269.615 15.015 269.745 ; + RECT 19.485 267.195 19.535 267.325 ; + RECT 19.485 269.615 19.535 269.745 ; + RECT 14.565 270.305 14.615 270.435 ; + RECT 19.885 270.305 19.935 270.435 ; + RECT 14.765 270.075 14.815 270.205 ; + RECT 14.765 272.495 14.815 272.625 ; + RECT 19.685 270.075 19.735 270.205 ; + RECT 19.685 272.495 19.735 272.625 ; + RECT 14.965 270.075 15.015 270.205 ; + RECT 14.965 272.495 15.015 272.625 ; + RECT 19.485 270.075 19.535 270.205 ; + RECT 19.485 272.495 19.535 272.625 ; + RECT 14.565 273.185 14.615 273.315 ; + RECT 19.885 273.185 19.935 273.315 ; + RECT 14.765 272.955 14.815 273.085 ; + RECT 14.765 275.375 14.815 275.505 ; + RECT 19.685 272.955 19.735 273.085 ; + RECT 19.685 275.375 19.735 275.505 ; + RECT 14.965 272.955 15.015 273.085 ; + RECT 14.965 275.375 15.015 275.505 ; + RECT 19.485 272.955 19.535 273.085 ; + RECT 19.485 275.375 19.535 275.505 ; + RECT 14.565 276.065 14.615 276.195 ; + RECT 19.885 276.065 19.935 276.195 ; + RECT 14.765 275.835 14.815 275.965 ; + RECT 14.765 278.255 14.815 278.385 ; + RECT 19.685 275.835 19.735 275.965 ; + RECT 19.685 278.255 19.735 278.385 ; + RECT 14.965 275.835 15.015 275.965 ; + RECT 14.965 278.255 15.015 278.385 ; + RECT 19.485 275.835 19.535 275.965 ; + RECT 19.485 278.255 19.535 278.385 ; + RECT 14.565 278.945 14.615 279.075 ; + RECT 19.885 278.945 19.935 279.075 ; + RECT 14.765 278.715 14.815 278.845 ; + RECT 14.765 281.135 14.815 281.265 ; + RECT 19.685 278.715 19.735 278.845 ; + RECT 19.685 281.135 19.735 281.265 ; + RECT 14.965 278.715 15.015 278.845 ; + RECT 14.965 281.135 15.015 281.265 ; + RECT 19.485 278.715 19.535 278.845 ; + RECT 19.485 281.135 19.535 281.265 ; + RECT 14.565 281.825 14.615 281.955 ; + RECT 19.885 281.825 19.935 281.955 ; + RECT 14.765 281.595 14.815 281.725 ; + RECT 14.765 284.015 14.815 284.145 ; + RECT 19.685 281.595 19.735 281.725 ; + RECT 19.685 284.015 19.735 284.145 ; + RECT 14.965 281.595 15.015 281.725 ; + RECT 14.965 284.015 15.015 284.145 ; + RECT 19.485 281.595 19.535 281.725 ; + RECT 19.485 284.015 19.535 284.145 ; + RECT 14.565 284.705 14.615 284.835 ; + RECT 19.885 284.705 19.935 284.835 ; + RECT 14.765 284.475 14.815 284.605 ; + RECT 14.765 286.895 14.815 287.025 ; + RECT 19.685 284.475 19.735 284.605 ; + RECT 19.685 286.895 19.735 287.025 ; + RECT 14.965 284.475 15.015 284.605 ; + RECT 14.965 286.895 15.015 287.025 ; + RECT 19.485 284.475 19.535 284.605 ; + RECT 19.485 286.895 19.535 287.025 ; + RECT 14.565 235.745 14.615 235.875 ; + RECT 19.885 235.745 19.935 235.875 ; + RECT 14.765 235.515 14.815 235.645 ; + RECT 14.765 237.935 14.815 238.065 ; + RECT 19.685 235.515 19.735 235.645 ; + RECT 19.685 237.935 19.735 238.065 ; + RECT 14.965 235.515 15.015 235.645 ; + RECT 14.965 237.935 15.015 238.065 ; + RECT 19.485 235.515 19.535 235.645 ; + RECT 19.485 237.935 19.535 238.065 ; + RECT 14.565 287.585 14.615 287.715 ; + RECT 19.885 287.585 19.935 287.715 ; + RECT 14.765 287.355 14.815 287.485 ; + RECT 14.765 289.775 14.815 289.905 ; + RECT 19.685 287.355 19.735 287.485 ; + RECT 19.685 289.775 19.735 289.905 ; + RECT 14.965 287.355 15.015 287.485 ; + RECT 14.965 289.775 15.015 289.905 ; + RECT 19.485 287.355 19.535 287.485 ; + RECT 19.485 289.775 19.535 289.905 ; + RECT 14.565 290.465 14.615 290.595 ; + RECT 19.885 290.465 19.935 290.595 ; + RECT 14.765 290.235 14.815 290.365 ; + RECT 14.765 292.655 14.815 292.785 ; + RECT 19.685 290.235 19.735 290.365 ; + RECT 19.685 292.655 19.735 292.785 ; + RECT 14.965 290.235 15.015 290.365 ; + RECT 14.965 292.655 15.015 292.785 ; + RECT 19.485 290.235 19.535 290.365 ; + RECT 19.485 292.655 19.535 292.785 ; + RECT 14.565 293.345 14.615 293.475 ; + RECT 19.885 293.345 19.935 293.475 ; + RECT 14.765 293.115 14.815 293.245 ; + RECT 14.765 295.535 14.815 295.665 ; + RECT 19.685 293.115 19.735 293.245 ; + RECT 19.685 295.535 19.735 295.665 ; + RECT 14.965 293.115 15.015 293.245 ; + RECT 14.965 295.535 15.015 295.665 ; + RECT 19.485 293.115 19.535 293.245 ; + RECT 19.485 295.535 19.535 295.665 ; + RECT 14.565 296.225 14.615 296.355 ; + RECT 19.885 296.225 19.935 296.355 ; + RECT 14.765 295.995 14.815 296.125 ; + RECT 14.765 298.415 14.815 298.545 ; + RECT 19.685 295.995 19.735 296.125 ; + RECT 19.685 298.415 19.735 298.545 ; + RECT 14.965 295.995 15.015 296.125 ; + RECT 14.965 298.415 15.015 298.545 ; + RECT 19.485 295.995 19.535 296.125 ; + RECT 19.485 298.415 19.535 298.545 ; + RECT 14.565 299.105 14.615 299.235 ; + RECT 19.885 299.105 19.935 299.235 ; + RECT 14.765 298.875 14.815 299.005 ; + RECT 14.765 301.295 14.815 301.425 ; + RECT 19.685 298.875 19.735 299.005 ; + RECT 19.685 301.295 19.735 301.425 ; + RECT 14.965 298.875 15.015 299.005 ; + RECT 14.965 301.295 15.015 301.425 ; + RECT 19.485 298.875 19.535 299.005 ; + RECT 19.485 301.295 19.535 301.425 ; + RECT 14.565 301.985 14.615 302.115 ; + RECT 19.885 301.985 19.935 302.115 ; + RECT 14.765 301.755 14.815 301.885 ; + RECT 14.765 304.175 14.815 304.305 ; + RECT 19.685 301.755 19.735 301.885 ; + RECT 19.685 304.175 19.735 304.305 ; + RECT 14.965 301.755 15.015 301.885 ; + RECT 14.965 304.175 15.015 304.305 ; + RECT 19.485 301.755 19.535 301.885 ; + RECT 19.485 304.175 19.535 304.305 ; + RECT 14.565 304.865 14.615 304.995 ; + RECT 19.885 304.865 19.935 304.995 ; + RECT 14.765 304.635 14.815 304.765 ; + RECT 14.765 307.055 14.815 307.185 ; + RECT 19.685 304.635 19.735 304.765 ; + RECT 19.685 307.055 19.735 307.185 ; + RECT 14.965 304.635 15.015 304.765 ; + RECT 14.965 307.055 15.015 307.185 ; + RECT 19.485 304.635 19.535 304.765 ; + RECT 19.485 307.055 19.535 307.185 ; + RECT 14.565 307.745 14.615 307.875 ; + RECT 19.885 307.745 19.935 307.875 ; + RECT 14.765 307.515 14.815 307.645 ; + RECT 14.765 309.935 14.815 310.065 ; + RECT 19.685 307.515 19.735 307.645 ; + RECT 19.685 309.935 19.735 310.065 ; + RECT 14.965 307.515 15.015 307.645 ; + RECT 14.965 309.935 15.015 310.065 ; + RECT 19.485 307.515 19.535 307.645 ; + RECT 19.485 309.935 19.535 310.065 ; + RECT 14.565 310.625 14.615 310.755 ; + RECT 19.885 310.625 19.935 310.755 ; + RECT 14.765 310.395 14.815 310.525 ; + RECT 14.765 312.815 14.815 312.945 ; + RECT 19.685 310.395 19.735 310.525 ; + RECT 19.685 312.815 19.735 312.945 ; + RECT 14.965 310.395 15.015 310.525 ; + RECT 14.965 312.815 15.015 312.945 ; + RECT 19.485 310.395 19.535 310.525 ; + RECT 19.485 312.815 19.535 312.945 ; + RECT 14.565 313.505 14.615 313.635 ; + RECT 19.885 313.505 19.935 313.635 ; + RECT 14.765 313.275 14.815 313.405 ; + RECT 14.765 315.695 14.815 315.825 ; + RECT 19.685 313.275 19.735 313.405 ; + RECT 19.685 315.695 19.735 315.825 ; + RECT 14.965 313.275 15.015 313.405 ; + RECT 14.965 315.695 15.015 315.825 ; + RECT 19.485 313.275 19.535 313.405 ; + RECT 19.485 315.695 19.535 315.825 ; + RECT 14.565 238.625 14.615 238.755 ; + RECT 19.885 238.625 19.935 238.755 ; + RECT 14.765 238.395 14.815 238.525 ; + RECT 14.765 240.815 14.815 240.945 ; + RECT 19.685 238.395 19.735 238.525 ; + RECT 19.685 240.815 19.735 240.945 ; + RECT 14.965 238.395 15.015 238.525 ; + RECT 14.965 240.815 15.015 240.945 ; + RECT 19.485 238.395 19.535 238.525 ; + RECT 19.485 240.815 19.535 240.945 ; + RECT 14.565 316.385 14.615 316.515 ; + RECT 19.885 316.385 19.935 316.515 ; + RECT 14.765 316.155 14.815 316.285 ; + RECT 14.765 318.575 14.815 318.705 ; + RECT 19.685 316.155 19.735 316.285 ; + RECT 19.685 318.575 19.735 318.705 ; + RECT 14.965 316.155 15.015 316.285 ; + RECT 14.965 318.575 15.015 318.705 ; + RECT 19.485 316.155 19.535 316.285 ; + RECT 19.485 318.575 19.535 318.705 ; + RECT 14.565 319.265 14.615 319.395 ; + RECT 19.885 319.265 19.935 319.395 ; + RECT 14.765 319.035 14.815 319.165 ; + RECT 14.765 321.455 14.815 321.585 ; + RECT 19.685 319.035 19.735 319.165 ; + RECT 19.685 321.455 19.735 321.585 ; + RECT 14.965 319.035 15.015 319.165 ; + RECT 14.965 321.455 15.015 321.585 ; + RECT 19.485 319.035 19.535 319.165 ; + RECT 19.485 321.455 19.535 321.585 ; + RECT 14.565 322.145 14.615 322.275 ; + RECT 19.885 322.145 19.935 322.275 ; + RECT 14.765 321.915 14.815 322.045 ; + RECT 14.765 324.335 14.815 324.465 ; + RECT 19.685 321.915 19.735 322.045 ; + RECT 19.685 324.335 19.735 324.465 ; + RECT 14.965 321.915 15.015 322.045 ; + RECT 14.965 324.335 15.015 324.465 ; + RECT 19.485 321.915 19.535 322.045 ; + RECT 19.485 324.335 19.535 324.465 ; + RECT 14.565 325.025 14.615 325.155 ; + RECT 19.885 325.025 19.935 325.155 ; + RECT 14.765 324.795 14.815 324.925 ; + RECT 14.765 327.215 14.815 327.345 ; + RECT 19.685 324.795 19.735 324.925 ; + RECT 19.685 327.215 19.735 327.345 ; + RECT 14.965 324.795 15.015 324.925 ; + RECT 14.965 327.215 15.015 327.345 ; + RECT 19.485 324.795 19.535 324.925 ; + RECT 19.485 327.215 19.535 327.345 ; + RECT 14.565 327.905 14.615 328.035 ; + RECT 19.885 327.905 19.935 328.035 ; + RECT 14.765 327.675 14.815 327.805 ; + RECT 14.765 330.095 14.815 330.225 ; + RECT 19.685 327.675 19.735 327.805 ; + RECT 19.685 330.095 19.735 330.225 ; + RECT 14.965 327.675 15.015 327.805 ; + RECT 14.965 330.095 15.015 330.225 ; + RECT 19.485 327.675 19.535 327.805 ; + RECT 19.485 330.095 19.535 330.225 ; + RECT 14.565 330.785 14.615 330.915 ; + RECT 19.885 330.785 19.935 330.915 ; + RECT 14.765 330.555 14.815 330.685 ; + RECT 14.765 332.975 14.815 333.105 ; + RECT 19.685 330.555 19.735 330.685 ; + RECT 19.685 332.975 19.735 333.105 ; + RECT 14.965 330.555 15.015 330.685 ; + RECT 14.965 332.975 15.015 333.105 ; + RECT 19.485 330.555 19.535 330.685 ; + RECT 19.485 332.975 19.535 333.105 ; + RECT 14.565 333.665 14.615 333.795 ; + RECT 19.885 333.665 19.935 333.795 ; + RECT 14.765 333.435 14.815 333.565 ; + RECT 14.765 335.855 14.815 335.985 ; + RECT 19.685 333.435 19.735 333.565 ; + RECT 19.685 335.855 19.735 335.985 ; + RECT 14.965 333.435 15.015 333.565 ; + RECT 14.965 335.855 15.015 335.985 ; + RECT 19.485 333.435 19.535 333.565 ; + RECT 19.485 335.855 19.535 335.985 ; + RECT 14.565 336.545 14.615 336.675 ; + RECT 19.885 336.545 19.935 336.675 ; + RECT 14.765 336.315 14.815 336.445 ; + RECT 14.765 338.735 14.815 338.865 ; + RECT 19.685 336.315 19.735 336.445 ; + RECT 19.685 338.735 19.735 338.865 ; + RECT 14.965 336.315 15.015 336.445 ; + RECT 14.965 338.735 15.015 338.865 ; + RECT 19.485 336.315 19.535 336.445 ; + RECT 19.485 338.735 19.535 338.865 ; + RECT 14.565 339.425 14.615 339.555 ; + RECT 19.885 339.425 19.935 339.555 ; + RECT 14.765 339.195 14.815 339.325 ; + RECT 14.765 341.615 14.815 341.745 ; + RECT 19.685 339.195 19.735 339.325 ; + RECT 19.685 341.615 19.735 341.745 ; + RECT 14.965 339.195 15.015 339.325 ; + RECT 14.965 341.615 15.015 341.745 ; + RECT 19.485 339.195 19.535 339.325 ; + RECT 19.485 341.615 19.535 341.745 ; + RECT 14.565 342.305 14.615 342.435 ; + RECT 19.885 342.305 19.935 342.435 ; + RECT 14.765 342.075 14.815 342.205 ; + RECT 14.765 344.495 14.815 344.625 ; + RECT 19.685 342.075 19.735 342.205 ; + RECT 19.685 344.495 19.735 344.625 ; + RECT 14.965 342.075 15.015 342.205 ; + RECT 14.965 344.495 15.015 344.625 ; + RECT 19.485 342.075 19.535 342.205 ; + RECT 19.485 344.495 19.535 344.625 ; + RECT 14.565 241.505 14.615 241.635 ; + RECT 19.885 241.505 19.935 241.635 ; + RECT 14.765 241.275 14.815 241.405 ; + RECT 14.765 243.695 14.815 243.825 ; + RECT 19.685 241.275 19.735 241.405 ; + RECT 19.685 243.695 19.735 243.825 ; + RECT 14.965 241.275 15.015 241.405 ; + RECT 14.965 243.695 15.015 243.825 ; + RECT 19.485 241.275 19.535 241.405 ; + RECT 19.485 243.695 19.535 243.825 ; + RECT 14.565 345.185 14.615 345.315 ; + RECT 19.885 345.185 19.935 345.315 ; + RECT 14.765 344.955 14.815 345.085 ; + RECT 14.765 347.375 14.815 347.505 ; + RECT 19.685 344.955 19.735 345.085 ; + RECT 19.685 347.375 19.735 347.505 ; + RECT 14.965 344.955 15.015 345.085 ; + RECT 14.965 347.375 15.015 347.505 ; + RECT 19.485 344.955 19.535 345.085 ; + RECT 19.485 347.375 19.535 347.505 ; + RECT 14.565 348.065 14.615 348.195 ; + RECT 19.885 348.065 19.935 348.195 ; + RECT 14.765 347.835 14.815 347.965 ; + RECT 14.765 350.255 14.815 350.385 ; + RECT 19.685 347.835 19.735 347.965 ; + RECT 19.685 350.255 19.735 350.385 ; + RECT 14.965 347.835 15.015 347.965 ; + RECT 14.965 350.255 15.015 350.385 ; + RECT 19.485 347.835 19.535 347.965 ; + RECT 19.485 350.255 19.535 350.385 ; + RECT 14.565 350.945 14.615 351.075 ; + RECT 19.885 350.945 19.935 351.075 ; + RECT 14.765 350.715 14.815 350.845 ; + RECT 14.765 353.135 14.815 353.265 ; + RECT 19.685 350.715 19.735 350.845 ; + RECT 19.685 353.135 19.735 353.265 ; + RECT 14.965 350.715 15.015 350.845 ; + RECT 14.965 353.135 15.015 353.265 ; + RECT 19.485 350.715 19.535 350.845 ; + RECT 19.485 353.135 19.535 353.265 ; + RECT 14.565 353.825 14.615 353.955 ; + RECT 19.885 353.825 19.935 353.955 ; + RECT 14.765 353.595 14.815 353.725 ; + RECT 14.765 356.015 14.815 356.145 ; + RECT 19.685 353.595 19.735 353.725 ; + RECT 19.685 356.015 19.735 356.145 ; + RECT 14.965 353.595 15.015 353.725 ; + RECT 14.965 356.015 15.015 356.145 ; + RECT 19.485 353.595 19.535 353.725 ; + RECT 19.485 356.015 19.535 356.145 ; + RECT 14.565 356.705 14.615 356.835 ; + RECT 19.885 356.705 19.935 356.835 ; + RECT 14.765 356.475 14.815 356.605 ; + RECT 14.765 358.895 14.815 359.025 ; + RECT 19.685 356.475 19.735 356.605 ; + RECT 19.685 358.895 19.735 359.025 ; + RECT 14.965 356.475 15.015 356.605 ; + RECT 14.965 358.895 15.015 359.025 ; + RECT 19.485 356.475 19.535 356.605 ; + RECT 19.485 358.895 19.535 359.025 ; + RECT 14.565 359.585 14.615 359.715 ; + RECT 19.885 359.585 19.935 359.715 ; + RECT 14.765 359.355 14.815 359.485 ; + RECT 14.765 361.775 14.815 361.905 ; + RECT 19.685 359.355 19.735 359.485 ; + RECT 19.685 361.775 19.735 361.905 ; + RECT 14.965 359.355 15.015 359.485 ; + RECT 14.965 361.775 15.015 361.905 ; + RECT 19.485 359.355 19.535 359.485 ; + RECT 19.485 361.775 19.535 361.905 ; + RECT 14.565 362.465 14.615 362.595 ; + RECT 19.885 362.465 19.935 362.595 ; + RECT 14.765 362.235 14.815 362.365 ; + RECT 14.765 364.655 14.815 364.785 ; + RECT 19.685 362.235 19.735 362.365 ; + RECT 19.685 364.655 19.735 364.785 ; + RECT 14.965 362.235 15.015 362.365 ; + RECT 14.965 364.655 15.015 364.785 ; + RECT 19.485 362.235 19.535 362.365 ; + RECT 19.485 364.655 19.535 364.785 ; + RECT 14.565 365.345 14.615 365.475 ; + RECT 19.885 365.345 19.935 365.475 ; + RECT 14.765 365.115 14.815 365.245 ; + RECT 14.765 367.535 14.815 367.665 ; + RECT 19.685 365.115 19.735 365.245 ; + RECT 19.685 367.535 19.735 367.665 ; + RECT 14.965 365.115 15.015 365.245 ; + RECT 14.965 367.535 15.015 367.665 ; + RECT 19.485 365.115 19.535 365.245 ; + RECT 19.485 367.535 19.535 367.665 ; + RECT 14.565 368.225 14.615 368.355 ; + RECT 19.885 368.225 19.935 368.355 ; + RECT 14.765 367.995 14.815 368.125 ; + RECT 14.765 370.415 14.815 370.545 ; + RECT 19.685 367.995 19.735 368.125 ; + RECT 19.685 370.415 19.735 370.545 ; + RECT 14.965 367.995 15.015 368.125 ; + RECT 14.965 370.415 15.015 370.545 ; + RECT 19.485 367.995 19.535 368.125 ; + RECT 19.485 370.415 19.535 370.545 ; + RECT 14.565 371.105 14.615 371.235 ; + RECT 19.885 371.105 19.935 371.235 ; + RECT 14.765 370.875 14.815 371.005 ; + RECT 14.765 373.295 14.815 373.425 ; + RECT 19.685 370.875 19.735 371.005 ; + RECT 19.685 373.295 19.735 373.425 ; + RECT 14.965 370.875 15.015 371.005 ; + RECT 14.965 373.295 15.015 373.425 ; + RECT 19.485 370.875 19.535 371.005 ; + RECT 19.485 373.295 19.535 373.425 ; + RECT 14.565 244.385 14.615 244.515 ; + RECT 19.885 244.385 19.935 244.515 ; + RECT 14.765 244.155 14.815 244.285 ; + RECT 14.765 246.575 14.815 246.705 ; + RECT 19.685 244.155 19.735 244.285 ; + RECT 19.685 246.575 19.735 246.705 ; + RECT 14.965 244.155 15.015 244.285 ; + RECT 14.965 246.575 15.015 246.705 ; + RECT 19.485 244.155 19.535 244.285 ; + RECT 19.485 246.575 19.535 246.705 ; + RECT 14.565 373.985 14.615 374.115 ; + RECT 19.885 373.985 19.935 374.115 ; + RECT 14.765 373.755 14.815 373.885 ; + RECT 14.765 376.175 14.815 376.305 ; + RECT 19.685 373.755 19.735 373.885 ; + RECT 19.685 376.175 19.735 376.305 ; + RECT 14.965 373.755 15.015 373.885 ; + RECT 14.965 376.175 15.015 376.305 ; + RECT 19.485 373.755 19.535 373.885 ; + RECT 19.485 376.175 19.535 376.305 ; + RECT 14.565 376.865 14.615 376.995 ; + RECT 19.885 376.865 19.935 376.995 ; + RECT 14.765 376.635 14.815 376.765 ; + RECT 14.765 379.055 14.815 379.185 ; + RECT 19.685 376.635 19.735 376.765 ; + RECT 19.685 379.055 19.735 379.185 ; + RECT 14.965 376.635 15.015 376.765 ; + RECT 14.965 379.055 15.015 379.185 ; + RECT 19.485 376.635 19.535 376.765 ; + RECT 19.485 379.055 19.535 379.185 ; + RECT 14.565 379.745 14.615 379.875 ; + RECT 19.885 379.745 19.935 379.875 ; + RECT 14.765 379.515 14.815 379.645 ; + RECT 14.765 381.935 14.815 382.065 ; + RECT 19.685 379.515 19.735 379.645 ; + RECT 19.685 381.935 19.735 382.065 ; + RECT 14.965 379.515 15.015 379.645 ; + RECT 14.965 381.935 15.015 382.065 ; + RECT 19.485 379.515 19.535 379.645 ; + RECT 19.485 381.935 19.535 382.065 ; + RECT 14.565 382.625 14.615 382.755 ; + RECT 19.885 382.625 19.935 382.755 ; + RECT 14.765 382.395 14.815 382.525 ; + RECT 14.765 384.815 14.815 384.945 ; + RECT 19.685 382.395 19.735 382.525 ; + RECT 19.685 384.815 19.735 384.945 ; + RECT 14.965 382.395 15.015 382.525 ; + RECT 14.965 384.815 15.015 384.945 ; + RECT 19.485 382.395 19.535 382.525 ; + RECT 19.485 384.815 19.535 384.945 ; + RECT 14.565 385.505 14.615 385.635 ; + RECT 19.885 385.505 19.935 385.635 ; + RECT 14.765 385.275 14.815 385.405 ; + RECT 14.765 387.695 14.815 387.825 ; + RECT 19.685 385.275 19.735 385.405 ; + RECT 19.685 387.695 19.735 387.825 ; + RECT 14.965 385.275 15.015 385.405 ; + RECT 14.965 387.695 15.015 387.825 ; + RECT 19.485 385.275 19.535 385.405 ; + RECT 19.485 387.695 19.535 387.825 ; + RECT 14.565 388.385 14.615 388.515 ; + RECT 19.885 388.385 19.935 388.515 ; + RECT 14.765 388.155 14.815 388.285 ; + RECT 14.765 390.575 14.815 390.705 ; + RECT 19.685 388.155 19.735 388.285 ; + RECT 19.685 390.575 19.735 390.705 ; + RECT 14.965 388.155 15.015 388.285 ; + RECT 14.965 390.575 15.015 390.705 ; + RECT 19.485 388.155 19.535 388.285 ; + RECT 19.485 390.575 19.535 390.705 ; + RECT 14.565 391.265 14.615 391.395 ; + RECT 19.885 391.265 19.935 391.395 ; + RECT 14.765 391.035 14.815 391.165 ; + RECT 14.765 393.455 14.815 393.585 ; + RECT 19.685 391.035 19.735 391.165 ; + RECT 19.685 393.455 19.735 393.585 ; + RECT 14.965 391.035 15.015 391.165 ; + RECT 14.965 393.455 15.015 393.585 ; + RECT 19.485 391.035 19.535 391.165 ; + RECT 19.485 393.455 19.535 393.585 ; + RECT 14.565 394.145 14.615 394.275 ; + RECT 19.885 394.145 19.935 394.275 ; + RECT 14.765 393.915 14.815 394.045 ; + RECT 14.765 396.335 14.815 396.465 ; + RECT 19.685 393.915 19.735 394.045 ; + RECT 19.685 396.335 19.735 396.465 ; + RECT 14.965 393.915 15.015 394.045 ; + RECT 14.965 396.335 15.015 396.465 ; + RECT 19.485 393.915 19.535 394.045 ; + RECT 19.485 396.335 19.535 396.465 ; + RECT 14.565 397.025 14.615 397.155 ; + RECT 19.885 397.025 19.935 397.155 ; + RECT 14.765 396.795 14.815 396.925 ; + RECT 14.765 399.215 14.815 399.345 ; + RECT 19.685 396.795 19.735 396.925 ; + RECT 19.685 399.215 19.735 399.345 ; + RECT 14.965 396.795 15.015 396.925 ; + RECT 14.965 399.215 15.015 399.345 ; + RECT 19.485 396.795 19.535 396.925 ; + RECT 19.485 399.215 19.535 399.345 ; + RECT 14.565 399.905 14.615 400.035 ; + RECT 19.885 399.905 19.935 400.035 ; + RECT 14.765 399.675 14.815 399.805 ; + RECT 14.765 402.095 14.815 402.225 ; + RECT 19.685 399.675 19.735 399.805 ; + RECT 19.685 402.095 19.735 402.225 ; + RECT 14.965 399.675 15.015 399.805 ; + RECT 14.965 402.095 15.015 402.225 ; + RECT 19.485 399.675 19.535 399.805 ; + RECT 19.485 402.095 19.535 402.225 ; + RECT 14.565 247.265 14.615 247.395 ; + RECT 19.885 247.265 19.935 247.395 ; + RECT 14.765 247.035 14.815 247.165 ; + RECT 14.765 249.455 14.815 249.585 ; + RECT 19.685 247.035 19.735 247.165 ; + RECT 19.685 249.455 19.735 249.585 ; + RECT 14.965 247.035 15.015 247.165 ; + RECT 14.965 249.455 15.015 249.585 ; + RECT 19.485 247.035 19.535 247.165 ; + RECT 19.485 249.455 19.535 249.585 ; + RECT 14.565 402.785 14.615 402.915 ; + RECT 19.885 402.785 19.935 402.915 ; + RECT 14.765 402.555 14.815 402.685 ; + RECT 14.765 404.975 14.815 405.105 ; + RECT 19.685 402.555 19.735 402.685 ; + RECT 19.685 404.975 19.735 405.105 ; + RECT 14.965 402.555 15.015 402.685 ; + RECT 14.965 404.975 15.015 405.105 ; + RECT 19.485 402.555 19.535 402.685 ; + RECT 19.485 404.975 19.535 405.105 ; + RECT 14.565 405.665 14.615 405.795 ; + RECT 19.885 405.665 19.935 405.795 ; + RECT 14.765 405.435 14.815 405.565 ; + RECT 14.765 407.855 14.815 407.985 ; + RECT 19.685 405.435 19.735 405.565 ; + RECT 19.685 407.855 19.735 407.985 ; + RECT 14.965 405.435 15.015 405.565 ; + RECT 14.965 407.855 15.015 407.985 ; + RECT 19.485 405.435 19.535 405.565 ; + RECT 19.485 407.855 19.535 407.985 ; + RECT 14.565 408.545 14.615 408.675 ; + RECT 19.885 408.545 19.935 408.675 ; + RECT 14.765 408.315 14.815 408.445 ; + RECT 14.765 410.735 14.815 410.865 ; + RECT 19.685 408.315 19.735 408.445 ; + RECT 19.685 410.735 19.735 410.865 ; + RECT 14.965 408.315 15.015 408.445 ; + RECT 14.965 410.735 15.015 410.865 ; + RECT 19.485 408.315 19.535 408.445 ; + RECT 19.485 410.735 19.535 410.865 ; + RECT 14.565 250.145 14.615 250.275 ; + RECT 19.885 250.145 19.935 250.275 ; + RECT 14.765 249.915 14.815 250.045 ; + RECT 14.765 252.335 14.815 252.465 ; + RECT 19.685 249.915 19.735 250.045 ; + RECT 19.685 252.335 19.735 252.465 ; + RECT 14.965 249.915 15.015 250.045 ; + RECT 14.965 252.335 15.015 252.465 ; + RECT 19.485 249.915 19.535 250.045 ; + RECT 19.485 252.335 19.535 252.465 ; + RECT 14.565 253.025 14.615 253.155 ; + RECT 19.885 253.025 19.935 253.155 ; + RECT 14.765 252.795 14.815 252.925 ; + RECT 14.765 255.215 14.815 255.345 ; + RECT 19.685 252.795 19.735 252.925 ; + RECT 19.685 255.215 19.735 255.345 ; + RECT 14.965 252.795 15.015 252.925 ; + RECT 14.965 255.215 15.015 255.345 ; + RECT 19.485 252.795 19.535 252.925 ; + RECT 19.485 255.215 19.535 255.345 ; + RECT 14.565 255.905 14.615 256.035 ; + RECT 19.885 255.905 19.935 256.035 ; + RECT 14.765 255.675 14.815 255.805 ; + RECT 14.765 258.095 14.815 258.225 ; + RECT 19.685 255.675 19.735 255.805 ; + RECT 19.685 258.095 19.735 258.225 ; + RECT 14.965 255.675 15.015 255.805 ; + RECT 14.965 258.095 15.015 258.225 ; + RECT 19.485 255.675 19.535 255.805 ; + RECT 19.485 258.095 19.535 258.225 ; + RECT 20.085 232.635 20.265 232.765 ; + RECT 20.875 232.865 21.055 232.995 ; + RECT 20.085 235.055 20.265 235.185 ; + RECT 20.43 235.285 20.48 235.415 ; + RECT 20.085 258.555 20.265 258.685 ; + RECT 20.875 258.785 21.055 258.915 ; + RECT 20.085 260.975 20.265 261.105 ; + RECT 20.43 261.205 20.48 261.335 ; + RECT 20.085 261.435 20.265 261.565 ; + RECT 20.875 261.665 21.055 261.795 ; + RECT 20.085 263.855 20.265 263.985 ; + RECT 20.43 264.085 20.48 264.215 ; + RECT 20.085 264.315 20.265 264.445 ; + RECT 20.875 264.545 21.055 264.675 ; + RECT 20.085 266.735 20.265 266.865 ; + RECT 20.43 266.965 20.48 267.095 ; + RECT 20.085 267.195 20.265 267.325 ; + RECT 20.875 267.425 21.055 267.555 ; + RECT 20.085 269.615 20.265 269.745 ; + RECT 20.43 269.845 20.48 269.975 ; + RECT 20.085 270.075 20.265 270.205 ; + RECT 20.875 270.305 21.055 270.435 ; + RECT 20.085 272.495 20.265 272.625 ; + RECT 20.43 272.725 20.48 272.855 ; + RECT 20.085 272.955 20.265 273.085 ; + RECT 20.875 273.185 21.055 273.315 ; + RECT 20.085 275.375 20.265 275.505 ; + RECT 20.43 275.605 20.48 275.735 ; + RECT 20.085 275.835 20.265 275.965 ; + RECT 20.875 276.065 21.055 276.195 ; + RECT 20.085 278.255 20.265 278.385 ; + RECT 20.43 278.485 20.48 278.615 ; + RECT 20.085 278.715 20.265 278.845 ; + RECT 20.875 278.945 21.055 279.075 ; + RECT 20.085 281.135 20.265 281.265 ; + RECT 20.43 281.365 20.48 281.495 ; + RECT 20.085 281.595 20.265 281.725 ; + RECT 20.875 281.825 21.055 281.955 ; + RECT 20.085 284.015 20.265 284.145 ; + RECT 20.43 284.245 20.48 284.375 ; + RECT 20.085 284.475 20.265 284.605 ; + RECT 20.875 284.705 21.055 284.835 ; + RECT 20.085 286.895 20.265 287.025 ; + RECT 20.43 287.125 20.48 287.255 ; + RECT 20.085 235.515 20.265 235.645 ; + RECT 20.875 235.745 21.055 235.875 ; + RECT 20.085 237.935 20.265 238.065 ; + RECT 20.43 238.165 20.48 238.295 ; + RECT 20.085 287.355 20.265 287.485 ; + RECT 20.875 287.585 21.055 287.715 ; + RECT 20.085 289.775 20.265 289.905 ; + RECT 20.43 290.005 20.48 290.135 ; + RECT 20.085 290.235 20.265 290.365 ; + RECT 20.875 290.465 21.055 290.595 ; + RECT 20.085 292.655 20.265 292.785 ; + RECT 20.43 292.885 20.48 293.015 ; + RECT 20.085 293.115 20.265 293.245 ; + RECT 20.875 293.345 21.055 293.475 ; + RECT 20.085 295.535 20.265 295.665 ; + RECT 20.43 295.765 20.48 295.895 ; + RECT 20.085 295.995 20.265 296.125 ; + RECT 20.875 296.225 21.055 296.355 ; + RECT 20.085 298.415 20.265 298.545 ; + RECT 20.43 298.645 20.48 298.775 ; + RECT 20.085 298.875 20.265 299.005 ; + RECT 20.875 299.105 21.055 299.235 ; + RECT 20.085 301.295 20.265 301.425 ; + RECT 20.43 301.525 20.48 301.655 ; + RECT 20.085 301.755 20.265 301.885 ; + RECT 20.875 301.985 21.055 302.115 ; + RECT 20.085 304.175 20.265 304.305 ; + RECT 20.43 304.405 20.48 304.535 ; + RECT 20.085 304.635 20.265 304.765 ; + RECT 20.875 304.865 21.055 304.995 ; + RECT 20.085 307.055 20.265 307.185 ; + RECT 20.43 307.285 20.48 307.415 ; + RECT 20.085 307.515 20.265 307.645 ; + RECT 20.875 307.745 21.055 307.875 ; + RECT 20.085 309.935 20.265 310.065 ; + RECT 20.43 310.165 20.48 310.295 ; + RECT 20.085 310.395 20.265 310.525 ; + RECT 20.875 310.625 21.055 310.755 ; + RECT 20.085 312.815 20.265 312.945 ; + RECT 20.43 313.045 20.48 313.175 ; + RECT 20.085 313.275 20.265 313.405 ; + RECT 20.875 313.505 21.055 313.635 ; + RECT 20.085 315.695 20.265 315.825 ; + RECT 20.43 315.925 20.48 316.055 ; + RECT 20.085 238.395 20.265 238.525 ; + RECT 20.875 238.625 21.055 238.755 ; + RECT 20.085 240.815 20.265 240.945 ; + RECT 20.43 241.045 20.48 241.175 ; + RECT 20.085 316.155 20.265 316.285 ; + RECT 20.875 316.385 21.055 316.515 ; + RECT 20.085 318.575 20.265 318.705 ; + RECT 20.43 318.805 20.48 318.935 ; + RECT 20.085 319.035 20.265 319.165 ; + RECT 20.875 319.265 21.055 319.395 ; + RECT 20.085 321.455 20.265 321.585 ; + RECT 20.43 321.685 20.48 321.815 ; + RECT 20.085 321.915 20.265 322.045 ; + RECT 20.875 322.145 21.055 322.275 ; + RECT 20.085 324.335 20.265 324.465 ; + RECT 20.43 324.565 20.48 324.695 ; + RECT 20.085 324.795 20.265 324.925 ; + RECT 20.875 325.025 21.055 325.155 ; + RECT 20.085 327.215 20.265 327.345 ; + RECT 20.43 327.445 20.48 327.575 ; + RECT 20.085 327.675 20.265 327.805 ; + RECT 20.875 327.905 21.055 328.035 ; + RECT 20.085 330.095 20.265 330.225 ; + RECT 20.43 330.325 20.48 330.455 ; + RECT 20.085 330.555 20.265 330.685 ; + RECT 20.875 330.785 21.055 330.915 ; + RECT 20.085 332.975 20.265 333.105 ; + RECT 20.43 333.205 20.48 333.335 ; + RECT 20.085 333.435 20.265 333.565 ; + RECT 20.875 333.665 21.055 333.795 ; + RECT 20.085 335.855 20.265 335.985 ; + RECT 20.43 336.085 20.48 336.215 ; + RECT 20.085 336.315 20.265 336.445 ; + RECT 20.875 336.545 21.055 336.675 ; + RECT 20.085 338.735 20.265 338.865 ; + RECT 20.43 338.965 20.48 339.095 ; + RECT 20.085 339.195 20.265 339.325 ; + RECT 20.875 339.425 21.055 339.555 ; + RECT 20.085 341.615 20.265 341.745 ; + RECT 20.43 341.845 20.48 341.975 ; + RECT 20.085 342.075 20.265 342.205 ; + RECT 20.875 342.305 21.055 342.435 ; + RECT 20.085 344.495 20.265 344.625 ; + RECT 20.43 344.725 20.48 344.855 ; + RECT 20.085 241.275 20.265 241.405 ; + RECT 20.875 241.505 21.055 241.635 ; + RECT 20.085 243.695 20.265 243.825 ; + RECT 20.43 243.925 20.48 244.055 ; + RECT 20.085 344.955 20.265 345.085 ; + RECT 20.875 345.185 21.055 345.315 ; + RECT 20.085 347.375 20.265 347.505 ; + RECT 20.43 347.605 20.48 347.735 ; + RECT 20.085 347.835 20.265 347.965 ; + RECT 20.875 348.065 21.055 348.195 ; + RECT 20.085 350.255 20.265 350.385 ; + RECT 20.43 350.485 20.48 350.615 ; + RECT 20.085 350.715 20.265 350.845 ; + RECT 20.875 350.945 21.055 351.075 ; + RECT 20.085 353.135 20.265 353.265 ; + RECT 20.43 353.365 20.48 353.495 ; + RECT 20.085 353.595 20.265 353.725 ; + RECT 20.875 353.825 21.055 353.955 ; + RECT 20.085 356.015 20.265 356.145 ; + RECT 20.43 356.245 20.48 356.375 ; + RECT 20.085 356.475 20.265 356.605 ; + RECT 20.875 356.705 21.055 356.835 ; + RECT 20.085 358.895 20.265 359.025 ; + RECT 20.43 359.125 20.48 359.255 ; + RECT 20.085 359.355 20.265 359.485 ; + RECT 20.875 359.585 21.055 359.715 ; + RECT 20.085 361.775 20.265 361.905 ; + RECT 20.43 362.005 20.48 362.135 ; + RECT 20.085 362.235 20.265 362.365 ; + RECT 20.875 362.465 21.055 362.595 ; + RECT 20.085 364.655 20.265 364.785 ; + RECT 20.43 364.885 20.48 365.015 ; + RECT 20.085 365.115 20.265 365.245 ; + RECT 20.875 365.345 21.055 365.475 ; + RECT 20.085 367.535 20.265 367.665 ; + RECT 20.43 367.765 20.48 367.895 ; + RECT 20.085 367.995 20.265 368.125 ; + RECT 20.875 368.225 21.055 368.355 ; + RECT 20.085 370.415 20.265 370.545 ; + RECT 20.43 370.645 20.48 370.775 ; + RECT 20.085 370.875 20.265 371.005 ; + RECT 20.875 371.105 21.055 371.235 ; + RECT 20.085 373.295 20.265 373.425 ; + RECT 20.43 373.525 20.48 373.655 ; + RECT 20.085 244.155 20.265 244.285 ; + RECT 20.875 244.385 21.055 244.515 ; + RECT 20.085 246.575 20.265 246.705 ; + RECT 20.43 246.805 20.48 246.935 ; + RECT 20.085 373.755 20.265 373.885 ; + RECT 20.875 373.985 21.055 374.115 ; + RECT 20.085 376.175 20.265 376.305 ; + RECT 20.43 376.405 20.48 376.535 ; + RECT 20.085 376.635 20.265 376.765 ; + RECT 20.875 376.865 21.055 376.995 ; + RECT 20.085 379.055 20.265 379.185 ; + RECT 20.43 379.285 20.48 379.415 ; + RECT 20.085 379.515 20.265 379.645 ; + RECT 20.875 379.745 21.055 379.875 ; + RECT 20.085 381.935 20.265 382.065 ; + RECT 20.43 382.165 20.48 382.295 ; + RECT 20.085 382.395 20.265 382.525 ; + RECT 20.875 382.625 21.055 382.755 ; + RECT 20.085 384.815 20.265 384.945 ; + RECT 20.43 385.045 20.48 385.175 ; + RECT 20.085 385.275 20.265 385.405 ; + RECT 20.875 385.505 21.055 385.635 ; + RECT 20.085 387.695 20.265 387.825 ; + RECT 20.43 387.925 20.48 388.055 ; + RECT 20.085 388.155 20.265 388.285 ; + RECT 20.875 388.385 21.055 388.515 ; + RECT 20.085 390.575 20.265 390.705 ; + RECT 20.43 390.805 20.48 390.935 ; + RECT 20.085 391.035 20.265 391.165 ; + RECT 20.875 391.265 21.055 391.395 ; + RECT 20.085 393.455 20.265 393.585 ; + RECT 20.43 393.685 20.48 393.815 ; + RECT 20.085 393.915 20.265 394.045 ; + RECT 20.875 394.145 21.055 394.275 ; + RECT 20.085 396.335 20.265 396.465 ; + RECT 20.43 396.565 20.48 396.695 ; + RECT 20.085 396.795 20.265 396.925 ; + RECT 20.875 397.025 21.055 397.155 ; + RECT 20.085 399.215 20.265 399.345 ; + RECT 20.43 399.445 20.48 399.575 ; + RECT 20.085 399.675 20.265 399.805 ; + RECT 20.875 399.905 21.055 400.035 ; + RECT 20.085 402.095 20.265 402.225 ; + RECT 20.43 402.325 20.48 402.455 ; + RECT 20.085 247.035 20.265 247.165 ; + RECT 20.875 247.265 21.055 247.395 ; + RECT 20.085 249.455 20.265 249.585 ; + RECT 20.43 249.685 20.48 249.815 ; + RECT 20.085 402.555 20.265 402.685 ; + RECT 20.875 402.785 21.055 402.915 ; + RECT 20.085 404.975 20.265 405.105 ; + RECT 20.43 405.205 20.48 405.335 ; + RECT 20.085 405.435 20.265 405.565 ; + RECT 20.875 405.665 21.055 405.795 ; + RECT 20.085 407.855 20.265 407.985 ; + RECT 20.43 408.085 20.48 408.215 ; + RECT 20.085 408.315 20.265 408.445 ; + RECT 20.875 408.545 21.055 408.675 ; + RECT 20.085 410.735 20.265 410.865 ; + RECT 20.43 410.965 20.48 411.095 ; + RECT 20.085 249.915 20.265 250.045 ; + RECT 20.875 250.145 21.055 250.275 ; + RECT 20.085 252.335 20.265 252.465 ; + RECT 20.43 252.565 20.48 252.695 ; + RECT 20.085 252.795 20.265 252.925 ; + RECT 20.875 253.025 21.055 253.155 ; + RECT 20.085 255.215 20.265 255.345 ; + RECT 20.43 255.445 20.48 255.575 ; + RECT 20.085 255.675 20.265 255.805 ; + RECT 20.875 255.905 21.055 256.035 ; + RECT 20.085 258.095 20.265 258.225 ; + RECT 20.43 258.325 20.48 258.455 ; + RECT 20.085 411.195 20.265 411.325 ; + RECT 20.875 411.425 21.055 411.555 ; + RECT 20.085 413.615 20.265 413.745 ; + RECT 20.43 413.845 20.48 413.975 ; + RECT 20.085 229.755 20.265 229.885 ; + RECT 20.875 229.985 21.055 230.115 ; + RECT 20.085 232.175 20.265 232.305 ; + RECT 20.43 232.405 20.48 232.535 ; + RECT 6.225 124.955 6.275 125.085 ; + RECT 7.5 124.955 7.55 125.085 ; + RECT 9.04 124.955 9.09 125.085 ; + RECT 9.315 124.955 9.365 125.085 ; + RECT 11.025 124.955 11.075 125.085 ; + RECT 12.79 124.955 12.84 125.085 ; + RECT 7.18 124.725 7.23 124.855 ; + RECT 14.14 124.725 14.19 124.855 ; + RECT 8.56 127.375 8.61 127.505 ; + RECT 10.27 127.375 10.32 127.505 ; + RECT 8.56 124.955 8.61 125.085 ; + RECT 10.27 124.955 10.32 125.085 ; + RECT 6.22 124.495 6.27 124.625 ; + RECT 7.5 124.495 7.55 124.625 ; + RECT 9.04 124.495 9.09 124.625 ; + RECT 9.315 124.495 9.365 124.625 ; + RECT 9.72 124.495 9.77 124.625 ; + RECT 11.025 124.495 11.075 124.625 ; + RECT 12.79 124.495 12.84 124.625 ; + RECT 6.225 122.075 6.275 122.205 ; + RECT 7.5 122.075 7.55 122.205 ; + RECT 9.04 122.075 9.09 122.205 ; + RECT 9.315 122.075 9.365 122.205 ; + RECT 11.025 122.075 11.075 122.205 ; + RECT 12.79 122.075 12.84 122.205 ; + RECT 7.18 121.845 7.23 121.975 ; + RECT 14.14 121.845 14.19 121.975 ; + RECT 8.56 124.495 8.61 124.625 ; + RECT 10.27 124.495 10.32 124.625 ; + RECT 8.56 122.075 8.61 122.205 ; + RECT 10.27 122.075 10.32 122.205 ; + RECT 6.22 121.615 6.27 121.745 ; + RECT 7.5 121.615 7.55 121.745 ; + RECT 9.04 121.615 9.09 121.745 ; + RECT 9.315 121.615 9.365 121.745 ; + RECT 9.72 121.615 9.77 121.745 ; + RECT 11.025 121.615 11.075 121.745 ; + RECT 12.79 121.615 12.84 121.745 ; + RECT 6.225 119.195 6.275 119.325 ; + RECT 7.5 119.195 7.55 119.325 ; + RECT 9.04 119.195 9.09 119.325 ; + RECT 9.315 119.195 9.365 119.325 ; + RECT 11.025 119.195 11.075 119.325 ; + RECT 12.79 119.195 12.84 119.325 ; + RECT 7.18 118.965 7.23 119.095 ; + RECT 14.14 118.965 14.19 119.095 ; + RECT 8.56 121.615 8.61 121.745 ; + RECT 10.27 121.615 10.32 121.745 ; + RECT 8.56 119.195 8.61 119.325 ; + RECT 10.27 119.195 10.32 119.325 ; + RECT 6.22 118.735 6.27 118.865 ; + RECT 7.5 118.735 7.55 118.865 ; + RECT 9.04 118.735 9.09 118.865 ; + RECT 9.315 118.735 9.365 118.865 ; + RECT 9.72 118.735 9.77 118.865 ; + RECT 11.025 118.735 11.075 118.865 ; + RECT 12.79 118.735 12.84 118.865 ; + RECT 6.225 116.315 6.275 116.445 ; + RECT 7.5 116.315 7.55 116.445 ; + RECT 9.04 116.315 9.09 116.445 ; + RECT 9.315 116.315 9.365 116.445 ; + RECT 11.025 116.315 11.075 116.445 ; + RECT 12.79 116.315 12.84 116.445 ; + RECT 7.18 116.085 7.23 116.215 ; + RECT 14.14 116.085 14.19 116.215 ; + RECT 8.56 118.735 8.61 118.865 ; + RECT 10.27 118.735 10.32 118.865 ; + RECT 8.56 116.315 8.61 116.445 ; + RECT 10.27 116.315 10.32 116.445 ; + RECT 6.22 115.855 6.27 115.985 ; + RECT 7.5 115.855 7.55 115.985 ; + RECT 9.04 115.855 9.09 115.985 ; + RECT 9.315 115.855 9.365 115.985 ; + RECT 9.72 115.855 9.77 115.985 ; + RECT 11.025 115.855 11.075 115.985 ; + RECT 12.79 115.855 12.84 115.985 ; + RECT 6.225 113.435 6.275 113.565 ; + RECT 7.5 113.435 7.55 113.565 ; + RECT 9.04 113.435 9.09 113.565 ; + RECT 9.315 113.435 9.365 113.565 ; + RECT 11.025 113.435 11.075 113.565 ; + RECT 12.79 113.435 12.84 113.565 ; + RECT 7.18 113.205 7.23 113.335 ; + RECT 14.14 113.205 14.19 113.335 ; + RECT 8.56 115.855 8.61 115.985 ; + RECT 10.27 115.855 10.32 115.985 ; + RECT 8.56 113.435 8.61 113.565 ; + RECT 10.27 113.435 10.32 113.565 ; + RECT 6.22 112.975 6.27 113.105 ; + RECT 7.5 112.975 7.55 113.105 ; + RECT 9.04 112.975 9.09 113.105 ; + RECT 9.315 112.975 9.365 113.105 ; + RECT 9.72 112.975 9.77 113.105 ; + RECT 11.025 112.975 11.075 113.105 ; + RECT 12.79 112.975 12.84 113.105 ; + RECT 6.225 110.555 6.275 110.685 ; + RECT 7.5 110.555 7.55 110.685 ; + RECT 9.04 110.555 9.09 110.685 ; + RECT 9.315 110.555 9.365 110.685 ; + RECT 11.025 110.555 11.075 110.685 ; + RECT 12.79 110.555 12.84 110.685 ; + RECT 7.18 110.325 7.23 110.455 ; + RECT 14.14 110.325 14.19 110.455 ; + RECT 8.56 112.975 8.61 113.105 ; + RECT 10.27 112.975 10.32 113.105 ; + RECT 8.56 110.555 8.61 110.685 ; + RECT 10.27 110.555 10.32 110.685 ; + RECT 6.22 110.095 6.27 110.225 ; + RECT 7.5 110.095 7.55 110.225 ; + RECT 9.04 110.095 9.09 110.225 ; + RECT 9.315 110.095 9.365 110.225 ; + RECT 9.72 110.095 9.77 110.225 ; + RECT 11.025 110.095 11.075 110.225 ; + RECT 12.79 110.095 12.84 110.225 ; + RECT 6.225 107.675 6.275 107.805 ; + RECT 7.5 107.675 7.55 107.805 ; + RECT 9.04 107.675 9.09 107.805 ; + RECT 9.315 107.675 9.365 107.805 ; + RECT 11.025 107.675 11.075 107.805 ; + RECT 12.79 107.675 12.84 107.805 ; + RECT 7.18 107.445 7.23 107.575 ; + RECT 14.14 107.445 14.19 107.575 ; + RECT 8.56 110.095 8.61 110.225 ; + RECT 10.27 110.095 10.32 110.225 ; + RECT 8.56 107.675 8.61 107.805 ; + RECT 10.27 107.675 10.32 107.805 ; + RECT 6.22 107.215 6.27 107.345 ; + RECT 7.5 107.215 7.55 107.345 ; + RECT 9.04 107.215 9.09 107.345 ; + RECT 9.315 107.215 9.365 107.345 ; + RECT 9.72 107.215 9.77 107.345 ; + RECT 11.025 107.215 11.075 107.345 ; + RECT 12.79 107.215 12.84 107.345 ; + RECT 6.225 104.795 6.275 104.925 ; + RECT 7.5 104.795 7.55 104.925 ; + RECT 9.04 104.795 9.09 104.925 ; + RECT 9.315 104.795 9.365 104.925 ; + RECT 11.025 104.795 11.075 104.925 ; + RECT 12.79 104.795 12.84 104.925 ; + RECT 7.18 104.565 7.23 104.695 ; + RECT 14.14 104.565 14.19 104.695 ; + RECT 8.56 107.215 8.61 107.345 ; + RECT 10.27 107.215 10.32 107.345 ; + RECT 8.56 104.795 8.61 104.925 ; + RECT 10.27 104.795 10.32 104.925 ; + RECT 6.22 104.335 6.27 104.465 ; + RECT 7.5 104.335 7.55 104.465 ; + RECT 9.04 104.335 9.09 104.465 ; + RECT 9.315 104.335 9.365 104.465 ; + RECT 9.72 104.335 9.77 104.465 ; + RECT 11.025 104.335 11.075 104.465 ; + RECT 12.79 104.335 12.84 104.465 ; + RECT 6.225 101.915 6.275 102.045 ; + RECT 7.5 101.915 7.55 102.045 ; + RECT 9.04 101.915 9.09 102.045 ; + RECT 9.315 101.915 9.365 102.045 ; + RECT 11.025 101.915 11.075 102.045 ; + RECT 12.79 101.915 12.84 102.045 ; + RECT 7.18 101.685 7.23 101.815 ; + RECT 14.14 101.685 14.19 101.815 ; + RECT 8.56 104.335 8.61 104.465 ; + RECT 10.27 104.335 10.32 104.465 ; + RECT 8.56 101.915 8.61 102.045 ; + RECT 10.27 101.915 10.32 102.045 ; + RECT 6.22 101.455 6.27 101.585 ; + RECT 7.5 101.455 7.55 101.585 ; + RECT 9.04 101.455 9.09 101.585 ; + RECT 9.315 101.455 9.365 101.585 ; + RECT 9.72 101.455 9.77 101.585 ; + RECT 11.025 101.455 11.075 101.585 ; + RECT 12.79 101.455 12.84 101.585 ; + RECT 6.225 99.035 6.275 99.165 ; + RECT 7.5 99.035 7.55 99.165 ; + RECT 9.04 99.035 9.09 99.165 ; + RECT 9.315 99.035 9.365 99.165 ; + RECT 11.025 99.035 11.075 99.165 ; + RECT 12.79 99.035 12.84 99.165 ; + RECT 7.18 98.805 7.23 98.935 ; + RECT 14.14 98.805 14.19 98.935 ; + RECT 8.56 101.455 8.61 101.585 ; + RECT 10.27 101.455 10.32 101.585 ; + RECT 8.56 99.035 8.61 99.165 ; + RECT 10.27 99.035 10.32 99.165 ; + RECT 6.22 98.575 6.27 98.705 ; + RECT 7.5 98.575 7.55 98.705 ; + RECT 9.04 98.575 9.09 98.705 ; + RECT 9.315 98.575 9.365 98.705 ; + RECT 9.72 98.575 9.77 98.705 ; + RECT 11.025 98.575 11.075 98.705 ; + RECT 12.79 98.575 12.84 98.705 ; + RECT 6.225 96.155 6.275 96.285 ; + RECT 7.5 96.155 7.55 96.285 ; + RECT 9.04 96.155 9.09 96.285 ; + RECT 9.315 96.155 9.365 96.285 ; + RECT 11.025 96.155 11.075 96.285 ; + RECT 12.79 96.155 12.84 96.285 ; + RECT 7.18 95.925 7.23 96.055 ; + RECT 14.14 95.925 14.19 96.055 ; + RECT 8.56 98.575 8.61 98.705 ; + RECT 10.27 98.575 10.32 98.705 ; + RECT 8.56 96.155 8.61 96.285 ; + RECT 10.27 96.155 10.32 96.285 ; + RECT 6.22 95.695 6.27 95.825 ; + RECT 7.5 95.695 7.55 95.825 ; + RECT 9.04 95.695 9.09 95.825 ; + RECT 9.315 95.695 9.365 95.825 ; + RECT 9.72 95.695 9.77 95.825 ; + RECT 11.025 95.695 11.075 95.825 ; + RECT 12.79 95.695 12.84 95.825 ; + RECT 6.225 93.275 6.275 93.405 ; + RECT 7.5 93.275 7.55 93.405 ; + RECT 9.04 93.275 9.09 93.405 ; + RECT 9.315 93.275 9.365 93.405 ; + RECT 11.025 93.275 11.075 93.405 ; + RECT 12.79 93.275 12.84 93.405 ; + RECT 7.18 93.045 7.23 93.175 ; + RECT 14.14 93.045 14.19 93.175 ; + RECT 8.56 95.695 8.61 95.825 ; + RECT 10.27 95.695 10.32 95.825 ; + RECT 8.56 93.275 8.61 93.405 ; + RECT 10.27 93.275 10.32 93.405 ; + RECT 6.22 92.815 6.27 92.945 ; + RECT 7.5 92.815 7.55 92.945 ; + RECT 9.04 92.815 9.09 92.945 ; + RECT 9.315 92.815 9.365 92.945 ; + RECT 9.72 92.815 9.77 92.945 ; + RECT 11.025 92.815 11.075 92.945 ; + RECT 12.79 92.815 12.84 92.945 ; + RECT 6.225 90.395 6.275 90.525 ; + RECT 7.5 90.395 7.55 90.525 ; + RECT 9.04 90.395 9.09 90.525 ; + RECT 9.315 90.395 9.365 90.525 ; + RECT 11.025 90.395 11.075 90.525 ; + RECT 12.79 90.395 12.84 90.525 ; + RECT 7.18 90.165 7.23 90.295 ; + RECT 14.14 90.165 14.19 90.295 ; + RECT 8.56 92.815 8.61 92.945 ; + RECT 10.27 92.815 10.32 92.945 ; + RECT 8.56 90.395 8.61 90.525 ; + RECT 10.27 90.395 10.32 90.525 ; + RECT 6.22 89.935 6.27 90.065 ; + RECT 7.5 89.935 7.55 90.065 ; + RECT 9.04 89.935 9.09 90.065 ; + RECT 9.315 89.935 9.365 90.065 ; + RECT 9.72 89.935 9.77 90.065 ; + RECT 11.025 89.935 11.075 90.065 ; + RECT 12.79 89.935 12.84 90.065 ; + RECT 6.225 87.515 6.275 87.645 ; + RECT 7.5 87.515 7.55 87.645 ; + RECT 9.04 87.515 9.09 87.645 ; + RECT 9.315 87.515 9.365 87.645 ; + RECT 11.025 87.515 11.075 87.645 ; + RECT 12.79 87.515 12.84 87.645 ; + RECT 7.18 87.285 7.23 87.415 ; + RECT 14.14 87.285 14.19 87.415 ; + RECT 8.56 89.935 8.61 90.065 ; + RECT 10.27 89.935 10.32 90.065 ; + RECT 8.56 87.515 8.61 87.645 ; + RECT 10.27 87.515 10.32 87.645 ; + RECT 6.22 87.055 6.27 87.185 ; + RECT 7.5 87.055 7.55 87.185 ; + RECT 9.04 87.055 9.09 87.185 ; + RECT 9.315 87.055 9.365 87.185 ; + RECT 9.72 87.055 9.77 87.185 ; + RECT 11.025 87.055 11.075 87.185 ; + RECT 12.79 87.055 12.84 87.185 ; + RECT 6.225 84.635 6.275 84.765 ; + RECT 7.5 84.635 7.55 84.765 ; + RECT 9.04 84.635 9.09 84.765 ; + RECT 9.315 84.635 9.365 84.765 ; + RECT 11.025 84.635 11.075 84.765 ; + RECT 12.79 84.635 12.84 84.765 ; + RECT 7.18 84.405 7.23 84.535 ; + RECT 14.14 84.405 14.19 84.535 ; + RECT 8.56 87.055 8.61 87.185 ; + RECT 10.27 87.055 10.32 87.185 ; + RECT 8.56 84.635 8.61 84.765 ; + RECT 10.27 84.635 10.32 84.765 ; + RECT 6.22 84.175 6.27 84.305 ; + RECT 7.5 84.175 7.55 84.305 ; + RECT 9.04 84.175 9.09 84.305 ; + RECT 9.315 84.175 9.365 84.305 ; + RECT 9.72 84.175 9.77 84.305 ; + RECT 11.025 84.175 11.075 84.305 ; + RECT 12.79 84.175 12.84 84.305 ; + RECT 6.225 81.755 6.275 81.885 ; + RECT 7.5 81.755 7.55 81.885 ; + RECT 9.04 81.755 9.09 81.885 ; + RECT 9.315 81.755 9.365 81.885 ; + RECT 11.025 81.755 11.075 81.885 ; + RECT 12.79 81.755 12.84 81.885 ; + RECT 7.18 81.525 7.23 81.655 ; + RECT 14.14 81.525 14.19 81.655 ; + RECT 8.56 84.175 8.61 84.305 ; + RECT 10.27 84.175 10.32 84.305 ; + RECT 8.56 81.755 8.61 81.885 ; + RECT 10.27 81.755 10.32 81.885 ; + RECT 6.22 81.295 6.27 81.425 ; + RECT 7.5 81.295 7.55 81.425 ; + RECT 9.04 81.295 9.09 81.425 ; + RECT 9.315 81.295 9.365 81.425 ; + RECT 9.72 81.295 9.77 81.425 ; + RECT 11.025 81.295 11.075 81.425 ; + RECT 12.79 81.295 12.84 81.425 ; + RECT 6.225 78.875 6.275 79.005 ; + RECT 7.5 78.875 7.55 79.005 ; + RECT 9.04 78.875 9.09 79.005 ; + RECT 9.315 78.875 9.365 79.005 ; + RECT 11.025 78.875 11.075 79.005 ; + RECT 12.79 78.875 12.84 79.005 ; + RECT 7.18 78.645 7.23 78.775 ; + RECT 14.14 78.645 14.19 78.775 ; + RECT 8.56 81.295 8.61 81.425 ; + RECT 10.27 81.295 10.32 81.425 ; + RECT 8.56 78.875 8.61 79.005 ; + RECT 10.27 78.875 10.32 79.005 ; + RECT 6.22 78.415 6.27 78.545 ; + RECT 7.5 78.415 7.55 78.545 ; + RECT 9.04 78.415 9.09 78.545 ; + RECT 9.315 78.415 9.365 78.545 ; + RECT 9.72 78.415 9.77 78.545 ; + RECT 11.025 78.415 11.075 78.545 ; + RECT 12.79 78.415 12.84 78.545 ; + RECT 6.225 75.995 6.275 76.125 ; + RECT 7.5 75.995 7.55 76.125 ; + RECT 9.04 75.995 9.09 76.125 ; + RECT 9.315 75.995 9.365 76.125 ; + RECT 11.025 75.995 11.075 76.125 ; + RECT 12.79 75.995 12.84 76.125 ; + RECT 7.18 75.765 7.23 75.895 ; + RECT 14.14 75.765 14.19 75.895 ; + RECT 8.56 78.415 8.61 78.545 ; + RECT 10.27 78.415 10.32 78.545 ; + RECT 8.56 75.995 8.61 76.125 ; + RECT 10.27 75.995 10.32 76.125 ; + RECT 6.22 75.535 6.27 75.665 ; + RECT 7.5 75.535 7.55 75.665 ; + RECT 9.04 75.535 9.09 75.665 ; + RECT 9.315 75.535 9.365 75.665 ; + RECT 9.72 75.535 9.77 75.665 ; + RECT 11.025 75.535 11.075 75.665 ; + RECT 12.79 75.535 12.84 75.665 ; + RECT 6.225 73.115 6.275 73.245 ; + RECT 7.5 73.115 7.55 73.245 ; + RECT 9.04 73.115 9.09 73.245 ; + RECT 9.315 73.115 9.365 73.245 ; + RECT 11.025 73.115 11.075 73.245 ; + RECT 12.79 73.115 12.84 73.245 ; + RECT 7.18 72.885 7.23 73.015 ; + RECT 14.14 72.885 14.19 73.015 ; + RECT 8.56 75.535 8.61 75.665 ; + RECT 10.27 75.535 10.32 75.665 ; + RECT 8.56 73.115 8.61 73.245 ; + RECT 10.27 73.115 10.32 73.245 ; + RECT 6.22 72.655 6.27 72.785 ; + RECT 7.5 72.655 7.55 72.785 ; + RECT 9.04 72.655 9.09 72.785 ; + RECT 9.315 72.655 9.365 72.785 ; + RECT 9.72 72.655 9.77 72.785 ; + RECT 11.025 72.655 11.075 72.785 ; + RECT 12.79 72.655 12.84 72.785 ; + RECT 6.225 70.235 6.275 70.365 ; + RECT 7.5 70.235 7.55 70.365 ; + RECT 9.04 70.235 9.09 70.365 ; + RECT 9.315 70.235 9.365 70.365 ; + RECT 11.025 70.235 11.075 70.365 ; + RECT 12.79 70.235 12.84 70.365 ; + RECT 7.18 70.005 7.23 70.135 ; + RECT 14.14 70.005 14.19 70.135 ; + RECT 8.56 72.655 8.61 72.785 ; + RECT 10.27 72.655 10.32 72.785 ; + RECT 8.56 70.235 8.61 70.365 ; + RECT 10.27 70.235 10.32 70.365 ; + RECT 6.22 69.775 6.27 69.905 ; + RECT 7.5 69.775 7.55 69.905 ; + RECT 9.04 69.775 9.09 69.905 ; + RECT 9.315 69.775 9.365 69.905 ; + RECT 9.72 69.775 9.77 69.905 ; + RECT 11.025 69.775 11.075 69.905 ; + RECT 12.79 69.775 12.84 69.905 ; + RECT 6.225 67.355 6.275 67.485 ; + RECT 7.5 67.355 7.55 67.485 ; + RECT 9.04 67.355 9.09 67.485 ; + RECT 9.315 67.355 9.365 67.485 ; + RECT 11.025 67.355 11.075 67.485 ; + RECT 12.79 67.355 12.84 67.485 ; + RECT 7.18 67.125 7.23 67.255 ; + RECT 14.14 67.125 14.19 67.255 ; + RECT 8.56 69.775 8.61 69.905 ; + RECT 10.27 69.775 10.32 69.905 ; + RECT 8.56 67.355 8.61 67.485 ; + RECT 10.27 67.355 10.32 67.485 ; + RECT 6.22 66.895 6.27 67.025 ; + RECT 7.5 66.895 7.55 67.025 ; + RECT 9.04 66.895 9.09 67.025 ; + RECT 9.315 66.895 9.365 67.025 ; + RECT 9.72 66.895 9.77 67.025 ; + RECT 11.025 66.895 11.075 67.025 ; + RECT 12.79 66.895 12.84 67.025 ; + RECT 6.225 64.475 6.275 64.605 ; + RECT 7.5 64.475 7.55 64.605 ; + RECT 9.04 64.475 9.09 64.605 ; + RECT 9.315 64.475 9.365 64.605 ; + RECT 11.025 64.475 11.075 64.605 ; + RECT 12.79 64.475 12.84 64.605 ; + RECT 7.18 64.245 7.23 64.375 ; + RECT 14.14 64.245 14.19 64.375 ; + RECT 8.56 66.895 8.61 67.025 ; + RECT 10.27 66.895 10.32 67.025 ; + RECT 8.56 64.475 8.61 64.605 ; + RECT 10.27 64.475 10.32 64.605 ; + RECT 6.22 64.015 6.27 64.145 ; + RECT 7.5 64.015 7.55 64.145 ; + RECT 9.04 64.015 9.09 64.145 ; + RECT 9.315 64.015 9.365 64.145 ; + RECT 9.72 64.015 9.77 64.145 ; + RECT 11.025 64.015 11.075 64.145 ; + RECT 12.79 64.015 12.84 64.145 ; + RECT 6.225 61.595 6.275 61.725 ; + RECT 7.5 61.595 7.55 61.725 ; + RECT 9.04 61.595 9.09 61.725 ; + RECT 9.315 61.595 9.365 61.725 ; + RECT 11.025 61.595 11.075 61.725 ; + RECT 12.79 61.595 12.84 61.725 ; + RECT 7.18 61.365 7.23 61.495 ; + RECT 14.14 61.365 14.19 61.495 ; + RECT 8.56 64.015 8.61 64.145 ; + RECT 10.27 64.015 10.32 64.145 ; + RECT 8.56 61.595 8.61 61.725 ; + RECT 10.27 61.595 10.32 61.725 ; + RECT 6.22 61.135 6.27 61.265 ; + RECT 7.5 61.135 7.55 61.265 ; + RECT 9.04 61.135 9.09 61.265 ; + RECT 9.315 61.135 9.365 61.265 ; + RECT 9.72 61.135 9.77 61.265 ; + RECT 11.025 61.135 11.075 61.265 ; + RECT 12.79 61.135 12.84 61.265 ; + RECT 6.225 58.715 6.275 58.845 ; + RECT 7.5 58.715 7.55 58.845 ; + RECT 9.04 58.715 9.09 58.845 ; + RECT 9.315 58.715 9.365 58.845 ; + RECT 11.025 58.715 11.075 58.845 ; + RECT 12.79 58.715 12.84 58.845 ; + RECT 7.18 58.485 7.23 58.615 ; + RECT 14.14 58.485 14.19 58.615 ; + RECT 8.56 61.135 8.61 61.265 ; + RECT 10.27 61.135 10.32 61.265 ; + RECT 8.56 58.715 8.61 58.845 ; + RECT 10.27 58.715 10.32 58.845 ; + RECT 6.22 58.255 6.27 58.385 ; + RECT 7.5 58.255 7.55 58.385 ; + RECT 9.04 58.255 9.09 58.385 ; + RECT 9.315 58.255 9.365 58.385 ; + RECT 9.72 58.255 9.77 58.385 ; + RECT 11.025 58.255 11.075 58.385 ; + RECT 12.79 58.255 12.84 58.385 ; + RECT 6.225 55.835 6.275 55.965 ; + RECT 7.5 55.835 7.55 55.965 ; + RECT 9.04 55.835 9.09 55.965 ; + RECT 9.315 55.835 9.365 55.965 ; + RECT 11.025 55.835 11.075 55.965 ; + RECT 12.79 55.835 12.84 55.965 ; + RECT 7.18 55.605 7.23 55.735 ; + RECT 14.14 55.605 14.19 55.735 ; + RECT 8.56 58.255 8.61 58.385 ; + RECT 10.27 58.255 10.32 58.385 ; + RECT 8.56 55.835 8.61 55.965 ; + RECT 10.27 55.835 10.32 55.965 ; + RECT 6.22 55.375 6.27 55.505 ; + RECT 7.5 55.375 7.55 55.505 ; + RECT 9.04 55.375 9.09 55.505 ; + RECT 9.315 55.375 9.365 55.505 ; + RECT 9.72 55.375 9.77 55.505 ; + RECT 11.025 55.375 11.075 55.505 ; + RECT 12.79 55.375 12.84 55.505 ; + RECT 6.225 52.955 6.275 53.085 ; + RECT 7.5 52.955 7.55 53.085 ; + RECT 9.04 52.955 9.09 53.085 ; + RECT 9.315 52.955 9.365 53.085 ; + RECT 11.025 52.955 11.075 53.085 ; + RECT 12.79 52.955 12.84 53.085 ; + RECT 7.18 52.725 7.23 52.855 ; + RECT 14.14 52.725 14.19 52.855 ; + RECT 8.56 55.375 8.61 55.505 ; + RECT 10.27 55.375 10.32 55.505 ; + RECT 8.56 52.955 8.61 53.085 ; + RECT 10.27 52.955 10.32 53.085 ; + RECT 6.22 52.495 6.27 52.625 ; + RECT 7.5 52.495 7.55 52.625 ; + RECT 9.04 52.495 9.09 52.625 ; + RECT 9.315 52.495 9.365 52.625 ; + RECT 9.72 52.495 9.77 52.625 ; + RECT 11.025 52.495 11.075 52.625 ; + RECT 12.79 52.495 12.84 52.625 ; + RECT 6.225 50.075 6.275 50.205 ; + RECT 7.5 50.075 7.55 50.205 ; + RECT 9.04 50.075 9.09 50.205 ; + RECT 9.315 50.075 9.365 50.205 ; + RECT 11.025 50.075 11.075 50.205 ; + RECT 12.79 50.075 12.84 50.205 ; + RECT 7.18 49.845 7.23 49.975 ; + RECT 14.14 49.845 14.19 49.975 ; + RECT 8.56 52.495 8.61 52.625 ; + RECT 10.27 52.495 10.32 52.625 ; + RECT 8.56 50.075 8.61 50.205 ; + RECT 10.27 50.075 10.32 50.205 ; + RECT 6.22 49.615 6.27 49.745 ; + RECT 7.5 49.615 7.55 49.745 ; + RECT 9.04 49.615 9.09 49.745 ; + RECT 9.315 49.615 9.365 49.745 ; + RECT 9.72 49.615 9.77 49.745 ; + RECT 11.025 49.615 11.075 49.745 ; + RECT 12.79 49.615 12.84 49.745 ; + RECT 6.225 47.195 6.275 47.325 ; + RECT 7.5 47.195 7.55 47.325 ; + RECT 9.04 47.195 9.09 47.325 ; + RECT 9.315 47.195 9.365 47.325 ; + RECT 11.025 47.195 11.075 47.325 ; + RECT 12.79 47.195 12.84 47.325 ; + RECT 7.18 46.965 7.23 47.095 ; + RECT 14.14 46.965 14.19 47.095 ; + RECT 8.56 49.615 8.61 49.745 ; + RECT 10.27 49.615 10.32 49.745 ; + RECT 8.56 47.195 8.61 47.325 ; + RECT 10.27 47.195 10.32 47.325 ; + RECT 6.22 46.735 6.27 46.865 ; + RECT 7.5 46.735 7.55 46.865 ; + RECT 9.04 46.735 9.09 46.865 ; + RECT 9.315 46.735 9.365 46.865 ; + RECT 9.72 46.735 9.77 46.865 ; + RECT 11.025 46.735 11.075 46.865 ; + RECT 12.79 46.735 12.84 46.865 ; + RECT 6.225 44.315 6.275 44.445 ; + RECT 7.5 44.315 7.55 44.445 ; + RECT 9.04 44.315 9.09 44.445 ; + RECT 9.315 44.315 9.365 44.445 ; + RECT 11.025 44.315 11.075 44.445 ; + RECT 12.79 44.315 12.84 44.445 ; + RECT 7.18 44.085 7.23 44.215 ; + RECT 14.14 44.085 14.19 44.215 ; + RECT 8.56 46.735 8.61 46.865 ; + RECT 10.27 46.735 10.32 46.865 ; + RECT 8.56 44.315 8.61 44.445 ; + RECT 10.27 44.315 10.32 44.445 ; + RECT 6.22 43.855 6.27 43.985 ; + RECT 7.5 43.855 7.55 43.985 ; + RECT 9.04 43.855 9.09 43.985 ; + RECT 9.315 43.855 9.365 43.985 ; + RECT 9.72 43.855 9.77 43.985 ; + RECT 11.025 43.855 11.075 43.985 ; + RECT 12.79 43.855 12.84 43.985 ; + RECT 6.225 41.435 6.275 41.565 ; + RECT 7.5 41.435 7.55 41.565 ; + RECT 9.04 41.435 9.09 41.565 ; + RECT 9.315 41.435 9.365 41.565 ; + RECT 11.025 41.435 11.075 41.565 ; + RECT 12.79 41.435 12.84 41.565 ; + RECT 7.18 41.205 7.23 41.335 ; + RECT 14.14 41.205 14.19 41.335 ; + RECT 8.56 43.855 8.61 43.985 ; + RECT 10.27 43.855 10.32 43.985 ; + RECT 8.56 41.435 8.61 41.565 ; + RECT 10.27 41.435 10.32 41.565 ; + RECT 6.22 40.975 6.27 41.105 ; + RECT 7.5 40.975 7.55 41.105 ; + RECT 9.04 40.975 9.09 41.105 ; + RECT 9.315 40.975 9.365 41.105 ; + RECT 9.72 40.975 9.77 41.105 ; + RECT 11.025 40.975 11.075 41.105 ; + RECT 12.79 40.975 12.84 41.105 ; + RECT 6.225 38.555 6.275 38.685 ; + RECT 7.5 38.555 7.55 38.685 ; + RECT 9.04 38.555 9.09 38.685 ; + RECT 9.315 38.555 9.365 38.685 ; + RECT 11.025 38.555 11.075 38.685 ; + RECT 12.79 38.555 12.84 38.685 ; + RECT 7.18 38.325 7.23 38.455 ; + RECT 14.14 38.325 14.19 38.455 ; + RECT 8.56 40.975 8.61 41.105 ; + RECT 10.27 40.975 10.32 41.105 ; + RECT 8.56 38.555 8.61 38.685 ; + RECT 10.27 38.555 10.32 38.685 ; + RECT 6.22 38.095 6.27 38.225 ; + RECT 7.5 38.095 7.55 38.225 ; + RECT 9.04 38.095 9.09 38.225 ; + RECT 9.315 38.095 9.365 38.225 ; + RECT 9.72 38.095 9.77 38.225 ; + RECT 11.025 38.095 11.075 38.225 ; + RECT 12.79 38.095 12.84 38.225 ; + RECT 6.225 35.675 6.275 35.805 ; + RECT 7.5 35.675 7.55 35.805 ; + RECT 9.04 35.675 9.09 35.805 ; + RECT 9.315 35.675 9.365 35.805 ; + RECT 11.025 35.675 11.075 35.805 ; + RECT 12.79 35.675 12.84 35.805 ; + RECT 7.18 35.445 7.23 35.575 ; + RECT 14.14 35.445 14.19 35.575 ; + RECT 8.56 38.095 8.61 38.225 ; + RECT 10.27 38.095 10.32 38.225 ; + RECT 8.56 35.675 8.61 35.805 ; + RECT 10.27 35.675 10.32 35.805 ; + RECT 6.22 35.215 6.27 35.345 ; + RECT 7.5 35.215 7.55 35.345 ; + RECT 9.04 35.215 9.09 35.345 ; + RECT 9.315 35.215 9.365 35.345 ; + RECT 9.72 35.215 9.77 35.345 ; + RECT 11.025 35.215 11.075 35.345 ; + RECT 12.79 35.215 12.84 35.345 ; + RECT 6.225 32.795 6.275 32.925 ; + RECT 7.5 32.795 7.55 32.925 ; + RECT 9.04 32.795 9.09 32.925 ; + RECT 9.315 32.795 9.365 32.925 ; + RECT 11.025 32.795 11.075 32.925 ; + RECT 12.79 32.795 12.84 32.925 ; + RECT 7.18 32.565 7.23 32.695 ; + RECT 14.14 32.565 14.19 32.695 ; + RECT 8.56 35.215 8.61 35.345 ; + RECT 10.27 35.215 10.32 35.345 ; + RECT 8.56 32.795 8.61 32.925 ; + RECT 10.27 32.795 10.32 32.925 ; + RECT 6.22 32.335 6.27 32.465 ; + RECT 7.5 32.335 7.55 32.465 ; + RECT 9.04 32.335 9.09 32.465 ; + RECT 9.315 32.335 9.365 32.465 ; + RECT 9.72 32.335 9.77 32.465 ; + RECT 11.025 32.335 11.075 32.465 ; + RECT 12.79 32.335 12.84 32.465 ; + RECT 6.225 29.915 6.275 30.045 ; + RECT 7.5 29.915 7.55 30.045 ; + RECT 9.04 29.915 9.09 30.045 ; + RECT 9.315 29.915 9.365 30.045 ; + RECT 11.025 29.915 11.075 30.045 ; + RECT 12.79 29.915 12.84 30.045 ; + RECT 7.18 29.685 7.23 29.815 ; + RECT 14.14 29.685 14.19 29.815 ; + RECT 8.56 32.335 8.61 32.465 ; + RECT 10.27 32.335 10.32 32.465 ; + RECT 8.56 29.915 8.61 30.045 ; + RECT 10.27 29.915 10.32 30.045 ; + RECT 6.22 29.455 6.27 29.585 ; + RECT 7.5 29.455 7.55 29.585 ; + RECT 9.04 29.455 9.09 29.585 ; + RECT 9.315 29.455 9.365 29.585 ; + RECT 9.72 29.455 9.77 29.585 ; + RECT 11.025 29.455 11.075 29.585 ; + RECT 12.79 29.455 12.84 29.585 ; + RECT 6.225 27.035 6.275 27.165 ; + RECT 7.5 27.035 7.55 27.165 ; + RECT 9.04 27.035 9.09 27.165 ; + RECT 9.315 27.035 9.365 27.165 ; + RECT 11.025 27.035 11.075 27.165 ; + RECT 12.79 27.035 12.84 27.165 ; + RECT 7.18 26.805 7.23 26.935 ; + RECT 14.14 26.805 14.19 26.935 ; + RECT 8.56 29.455 8.61 29.585 ; + RECT 10.27 29.455 10.32 29.585 ; + RECT 8.56 27.035 8.61 27.165 ; + RECT 10.27 27.035 10.32 27.165 ; + RECT 6.22 26.575 6.27 26.705 ; + RECT 7.5 26.575 7.55 26.705 ; + RECT 9.04 26.575 9.09 26.705 ; + RECT 9.315 26.575 9.365 26.705 ; + RECT 9.72 26.575 9.77 26.705 ; + RECT 11.025 26.575 11.075 26.705 ; + RECT 12.79 26.575 12.84 26.705 ; + RECT 6.225 24.155 6.275 24.285 ; + RECT 7.5 24.155 7.55 24.285 ; + RECT 9.04 24.155 9.09 24.285 ; + RECT 9.315 24.155 9.365 24.285 ; + RECT 11.025 24.155 11.075 24.285 ; + RECT 12.79 24.155 12.84 24.285 ; + RECT 7.18 23.925 7.23 24.055 ; + RECT 14.14 23.925 14.19 24.055 ; + RECT 8.56 26.575 8.61 26.705 ; + RECT 10.27 26.575 10.32 26.705 ; + RECT 8.56 24.155 8.61 24.285 ; + RECT 10.27 24.155 10.32 24.285 ; + RECT 6.22 23.695 6.27 23.825 ; + RECT 7.5 23.695 7.55 23.825 ; + RECT 9.04 23.695 9.09 23.825 ; + RECT 9.315 23.695 9.365 23.825 ; + RECT 9.72 23.695 9.77 23.825 ; + RECT 11.025 23.695 11.075 23.825 ; + RECT 12.79 23.695 12.84 23.825 ; + RECT 6.225 21.275 6.275 21.405 ; + RECT 7.5 21.275 7.55 21.405 ; + RECT 9.04 21.275 9.09 21.405 ; + RECT 9.315 21.275 9.365 21.405 ; + RECT 11.025 21.275 11.075 21.405 ; + RECT 12.79 21.275 12.84 21.405 ; + RECT 7.18 21.045 7.23 21.175 ; + RECT 14.14 21.045 14.19 21.175 ; + RECT 8.56 23.695 8.61 23.825 ; + RECT 10.27 23.695 10.32 23.825 ; + RECT 8.56 21.275 8.61 21.405 ; + RECT 10.27 21.275 10.32 21.405 ; + RECT 6.22 20.815 6.27 20.945 ; + RECT 7.5 20.815 7.55 20.945 ; + RECT 9.04 20.815 9.09 20.945 ; + RECT 9.315 20.815 9.365 20.945 ; + RECT 9.72 20.815 9.77 20.945 ; + RECT 11.025 20.815 11.075 20.945 ; + RECT 12.79 20.815 12.84 20.945 ; + RECT 6.225 18.395 6.275 18.525 ; + RECT 7.5 18.395 7.55 18.525 ; + RECT 9.04 18.395 9.09 18.525 ; + RECT 9.315 18.395 9.365 18.525 ; + RECT 11.025 18.395 11.075 18.525 ; + RECT 12.79 18.395 12.84 18.525 ; + RECT 7.18 18.165 7.23 18.295 ; + RECT 14.14 18.165 14.19 18.295 ; + RECT 8.56 20.815 8.61 20.945 ; + RECT 10.27 20.815 10.32 20.945 ; + RECT 8.56 18.395 8.61 18.525 ; + RECT 10.27 18.395 10.32 18.525 ; + RECT 6.22 17.935 6.27 18.065 ; + RECT 7.5 17.935 7.55 18.065 ; + RECT 9.04 17.935 9.09 18.065 ; + RECT 9.315 17.935 9.365 18.065 ; + RECT 9.72 17.935 9.77 18.065 ; + RECT 11.025 17.935 11.075 18.065 ; + RECT 12.79 17.935 12.84 18.065 ; + RECT 6.225 15.515 6.275 15.645 ; + RECT 7.5 15.515 7.55 15.645 ; + RECT 9.04 15.515 9.09 15.645 ; + RECT 9.315 15.515 9.365 15.645 ; + RECT 11.025 15.515 11.075 15.645 ; + RECT 12.79 15.515 12.84 15.645 ; + RECT 7.18 15.285 7.23 15.415 ; + RECT 14.14 15.285 14.19 15.415 ; + RECT 8.56 17.935 8.61 18.065 ; + RECT 10.27 17.935 10.32 18.065 ; + RECT 8.56 15.515 8.61 15.645 ; + RECT 10.27 15.515 10.32 15.645 ; + RECT 6.22 15.055 6.27 15.185 ; + RECT 7.5 15.055 7.55 15.185 ; + RECT 9.04 15.055 9.09 15.185 ; + RECT 9.315 15.055 9.365 15.185 ; + RECT 9.72 15.055 9.77 15.185 ; + RECT 11.025 15.055 11.075 15.185 ; + RECT 12.79 15.055 12.84 15.185 ; + RECT 6.225 12.635 6.275 12.765 ; + RECT 7.5 12.635 7.55 12.765 ; + RECT 9.04 12.635 9.09 12.765 ; + RECT 9.315 12.635 9.365 12.765 ; + RECT 11.025 12.635 11.075 12.765 ; + RECT 12.79 12.635 12.84 12.765 ; + RECT 7.18 12.405 7.23 12.535 ; + RECT 14.14 12.405 14.19 12.535 ; + RECT 8.56 15.055 8.61 15.185 ; + RECT 10.27 15.055 10.32 15.185 ; + RECT 8.56 12.635 8.61 12.765 ; + RECT 10.27 12.635 10.32 12.765 ; + RECT 6.22 12.175 6.27 12.305 ; + RECT 7.5 12.175 7.55 12.305 ; + RECT 9.04 12.175 9.09 12.305 ; + RECT 9.315 12.175 9.365 12.305 ; + RECT 9.72 12.175 9.77 12.305 ; + RECT 11.025 12.175 11.075 12.305 ; + RECT 12.79 12.175 12.84 12.305 ; + RECT 6.225 9.755 6.275 9.885 ; + RECT 7.5 9.755 7.55 9.885 ; + RECT 9.04 9.755 9.09 9.885 ; + RECT 9.315 9.755 9.365 9.885 ; + RECT 11.025 9.755 11.075 9.885 ; + RECT 12.79 9.755 12.84 9.885 ; + RECT 7.18 9.525 7.23 9.655 ; + RECT 14.14 9.525 14.19 9.655 ; + RECT 8.56 12.175 8.61 12.305 ; + RECT 10.27 12.175 10.32 12.305 ; + RECT 8.56 9.755 8.61 9.885 ; + RECT 10.27 9.755 10.32 9.885 ; + RECT 6.22 9.295 6.27 9.425 ; + RECT 7.5 9.295 7.55 9.425 ; + RECT 9.04 9.295 9.09 9.425 ; + RECT 9.315 9.295 9.365 9.425 ; + RECT 9.72 9.295 9.77 9.425 ; + RECT 11.025 9.295 11.075 9.425 ; + RECT 12.79 9.295 12.84 9.425 ; + RECT 6.225 6.875 6.275 7.005 ; + RECT 7.5 6.875 7.55 7.005 ; + RECT 9.04 6.875 9.09 7.005 ; + RECT 9.315 6.875 9.365 7.005 ; + RECT 11.025 6.875 11.075 7.005 ; + RECT 12.79 6.875 12.84 7.005 ; + RECT 7.18 6.645 7.23 6.775 ; + RECT 14.14 6.645 14.19 6.775 ; + RECT 8.56 9.295 8.61 9.425 ; + RECT 10.27 9.295 10.32 9.425 ; + RECT 8.56 6.875 8.61 7.005 ; + RECT 10.27 6.875 10.32 7.005 ; + RECT 6.22 6.415 6.27 6.545 ; + RECT 7.5 6.415 7.55 6.545 ; + RECT 9.04 6.415 9.09 6.545 ; + RECT 9.315 6.415 9.365 6.545 ; + RECT 9.72 6.415 9.77 6.545 ; + RECT 11.025 6.415 11.075 6.545 ; + RECT 12.79 6.415 12.84 6.545 ; + RECT 6.225 3.995 6.275 4.125 ; + RECT 7.5 3.995 7.55 4.125 ; + RECT 9.04 3.995 9.09 4.125 ; + RECT 9.315 3.995 9.365 4.125 ; + RECT 11.025 3.995 11.075 4.125 ; + RECT 12.79 3.995 12.84 4.125 ; + RECT 7.18 3.765 7.23 3.895 ; + RECT 14.14 3.765 14.19 3.895 ; + RECT 8.56 6.415 8.61 6.545 ; + RECT 10.27 6.415 10.32 6.545 ; + RECT 8.56 3.995 8.61 4.125 ; + RECT 10.27 3.995 10.32 4.125 ; + RECT 6.22 3.535 6.27 3.665 ; + RECT 7.5 3.535 7.55 3.665 ; + RECT 9.04 3.535 9.09 3.665 ; + RECT 9.315 3.535 9.365 3.665 ; + RECT 9.72 3.535 9.77 3.665 ; + RECT 11.025 3.535 11.075 3.665 ; + RECT 12.79 3.535 12.84 3.665 ; + RECT 6.225 1.115 6.275 1.245 ; + RECT 7.5 1.115 7.55 1.245 ; + RECT 9.04 1.115 9.09 1.245 ; + RECT 9.315 1.115 9.365 1.245 ; + RECT 11.025 1.115 11.075 1.245 ; + RECT 12.79 1.115 12.84 1.245 ; + RECT 7.18 0.885 7.23 1.015 ; + RECT 14.14 0.885 14.19 1.015 ; + RECT 8.56 3.535 8.61 3.665 ; + RECT 10.27 3.535 10.32 3.665 ; + RECT 8.56 1.115 8.61 1.245 ; + RECT 10.27 1.115 10.32 1.245 ; + RECT 6.22 184.975 6.27 185.105 ; + RECT 7.5 184.975 7.55 185.105 ; + RECT 9.04 184.975 9.09 185.105 ; + RECT 9.315 184.975 9.365 185.105 ; + RECT 9.72 184.975 9.77 185.105 ; + RECT 11.025 184.975 11.075 185.105 ; + RECT 12.79 184.975 12.84 185.105 ; + RECT 6.225 182.555 6.275 182.685 ; + RECT 7.5 182.555 7.55 182.685 ; + RECT 9.04 182.555 9.09 182.685 ; + RECT 9.315 182.555 9.365 182.685 ; + RECT 11.025 182.555 11.075 182.685 ; + RECT 12.79 182.555 12.84 182.685 ; + RECT 7.18 182.325 7.23 182.455 ; + RECT 14.14 182.325 14.19 182.455 ; + RECT 8.56 184.975 8.61 185.105 ; + RECT 10.27 184.975 10.32 185.105 ; + RECT 8.56 182.555 8.61 182.685 ; + RECT 10.27 182.555 10.32 182.685 ; + RECT 6.22 182.095 6.27 182.225 ; + RECT 7.5 182.095 7.55 182.225 ; + RECT 9.04 182.095 9.09 182.225 ; + RECT 9.315 182.095 9.365 182.225 ; + RECT 9.72 182.095 9.77 182.225 ; + RECT 11.025 182.095 11.075 182.225 ; + RECT 12.79 182.095 12.84 182.225 ; + RECT 6.225 179.675 6.275 179.805 ; + RECT 7.5 179.675 7.55 179.805 ; + RECT 9.04 179.675 9.09 179.805 ; + RECT 9.315 179.675 9.365 179.805 ; + RECT 11.025 179.675 11.075 179.805 ; + RECT 12.79 179.675 12.84 179.805 ; + RECT 7.18 179.445 7.23 179.575 ; + RECT 14.14 179.445 14.19 179.575 ; + RECT 8.56 182.095 8.61 182.225 ; + RECT 10.27 182.095 10.32 182.225 ; + RECT 8.56 179.675 8.61 179.805 ; + RECT 10.27 179.675 10.32 179.805 ; + RECT 6.22 179.215 6.27 179.345 ; + RECT 7.5 179.215 7.55 179.345 ; + RECT 9.04 179.215 9.09 179.345 ; + RECT 9.315 179.215 9.365 179.345 ; + RECT 9.72 179.215 9.77 179.345 ; + RECT 11.025 179.215 11.075 179.345 ; + RECT 12.79 179.215 12.84 179.345 ; + RECT 6.225 176.795 6.275 176.925 ; + RECT 7.5 176.795 7.55 176.925 ; + RECT 9.04 176.795 9.09 176.925 ; + RECT 9.315 176.795 9.365 176.925 ; + RECT 11.025 176.795 11.075 176.925 ; + RECT 12.79 176.795 12.84 176.925 ; + RECT 7.18 176.565 7.23 176.695 ; + RECT 14.14 176.565 14.19 176.695 ; + RECT 8.56 179.215 8.61 179.345 ; + RECT 10.27 179.215 10.32 179.345 ; + RECT 8.56 176.795 8.61 176.925 ; + RECT 10.27 176.795 10.32 176.925 ; + RECT 6.22 176.335 6.27 176.465 ; + RECT 7.5 176.335 7.55 176.465 ; + RECT 9.04 176.335 9.09 176.465 ; + RECT 9.315 176.335 9.365 176.465 ; + RECT 9.72 176.335 9.77 176.465 ; + RECT 11.025 176.335 11.075 176.465 ; + RECT 12.79 176.335 12.84 176.465 ; + RECT 6.225 173.915 6.275 174.045 ; + RECT 7.5 173.915 7.55 174.045 ; + RECT 9.04 173.915 9.09 174.045 ; + RECT 9.315 173.915 9.365 174.045 ; + RECT 11.025 173.915 11.075 174.045 ; + RECT 12.79 173.915 12.84 174.045 ; + RECT 7.18 173.685 7.23 173.815 ; + RECT 14.14 173.685 14.19 173.815 ; + RECT 8.56 176.335 8.61 176.465 ; + RECT 10.27 176.335 10.32 176.465 ; + RECT 8.56 173.915 8.61 174.045 ; + RECT 10.27 173.915 10.32 174.045 ; + RECT 6.22 173.455 6.27 173.585 ; + RECT 7.5 173.455 7.55 173.585 ; + RECT 9.04 173.455 9.09 173.585 ; + RECT 9.315 173.455 9.365 173.585 ; + RECT 9.72 173.455 9.77 173.585 ; + RECT 11.025 173.455 11.075 173.585 ; + RECT 12.79 173.455 12.84 173.585 ; + RECT 6.225 171.035 6.275 171.165 ; + RECT 7.5 171.035 7.55 171.165 ; + RECT 9.04 171.035 9.09 171.165 ; + RECT 9.315 171.035 9.365 171.165 ; + RECT 11.025 171.035 11.075 171.165 ; + RECT 12.79 171.035 12.84 171.165 ; + RECT 7.18 170.805 7.23 170.935 ; + RECT 14.14 170.805 14.19 170.935 ; + RECT 8.56 173.455 8.61 173.585 ; + RECT 10.27 173.455 10.32 173.585 ; + RECT 8.56 171.035 8.61 171.165 ; + RECT 10.27 171.035 10.32 171.165 ; + RECT 6.22 170.575 6.27 170.705 ; + RECT 7.5 170.575 7.55 170.705 ; + RECT 9.04 170.575 9.09 170.705 ; + RECT 9.315 170.575 9.365 170.705 ; + RECT 9.72 170.575 9.77 170.705 ; + RECT 11.025 170.575 11.075 170.705 ; + RECT 12.79 170.575 12.84 170.705 ; + RECT 6.225 168.155 6.275 168.285 ; + RECT 7.5 168.155 7.55 168.285 ; + RECT 9.04 168.155 9.09 168.285 ; + RECT 9.315 168.155 9.365 168.285 ; + RECT 11.025 168.155 11.075 168.285 ; + RECT 12.79 168.155 12.84 168.285 ; + RECT 7.18 167.925 7.23 168.055 ; + RECT 14.14 167.925 14.19 168.055 ; + RECT 8.56 170.575 8.61 170.705 ; + RECT 10.27 170.575 10.32 170.705 ; + RECT 8.56 168.155 8.61 168.285 ; + RECT 10.27 168.155 10.32 168.285 ; + RECT 6.22 167.695 6.27 167.825 ; + RECT 7.5 167.695 7.55 167.825 ; + RECT 9.04 167.695 9.09 167.825 ; + RECT 9.315 167.695 9.365 167.825 ; + RECT 9.72 167.695 9.77 167.825 ; + RECT 11.025 167.695 11.075 167.825 ; + RECT 12.79 167.695 12.84 167.825 ; + RECT 6.225 165.275 6.275 165.405 ; + RECT 7.5 165.275 7.55 165.405 ; + RECT 9.04 165.275 9.09 165.405 ; + RECT 9.315 165.275 9.365 165.405 ; + RECT 11.025 165.275 11.075 165.405 ; + RECT 12.79 165.275 12.84 165.405 ; + RECT 7.18 165.045 7.23 165.175 ; + RECT 14.14 165.045 14.19 165.175 ; + RECT 8.56 167.695 8.61 167.825 ; + RECT 10.27 167.695 10.32 167.825 ; + RECT 8.56 165.275 8.61 165.405 ; + RECT 10.27 165.275 10.32 165.405 ; + RECT 6.22 164.815 6.27 164.945 ; + RECT 7.5 164.815 7.55 164.945 ; + RECT 9.04 164.815 9.09 164.945 ; + RECT 9.315 164.815 9.365 164.945 ; + RECT 9.72 164.815 9.77 164.945 ; + RECT 11.025 164.815 11.075 164.945 ; + RECT 12.79 164.815 12.84 164.945 ; + RECT 6.225 162.395 6.275 162.525 ; + RECT 7.5 162.395 7.55 162.525 ; + RECT 9.04 162.395 9.09 162.525 ; + RECT 9.315 162.395 9.365 162.525 ; + RECT 11.025 162.395 11.075 162.525 ; + RECT 12.79 162.395 12.84 162.525 ; + RECT 7.18 162.165 7.23 162.295 ; + RECT 14.14 162.165 14.19 162.295 ; + RECT 8.56 164.815 8.61 164.945 ; + RECT 10.27 164.815 10.32 164.945 ; + RECT 8.56 162.395 8.61 162.525 ; + RECT 10.27 162.395 10.32 162.525 ; + RECT 6.22 161.935 6.27 162.065 ; + RECT 7.5 161.935 7.55 162.065 ; + RECT 9.04 161.935 9.09 162.065 ; + RECT 9.315 161.935 9.365 162.065 ; + RECT 9.72 161.935 9.77 162.065 ; + RECT 11.025 161.935 11.075 162.065 ; + RECT 12.79 161.935 12.84 162.065 ; + RECT 6.225 159.515 6.275 159.645 ; + RECT 7.5 159.515 7.55 159.645 ; + RECT 9.04 159.515 9.09 159.645 ; + RECT 9.315 159.515 9.365 159.645 ; + RECT 11.025 159.515 11.075 159.645 ; + RECT 12.79 159.515 12.84 159.645 ; + RECT 7.18 159.285 7.23 159.415 ; + RECT 14.14 159.285 14.19 159.415 ; + RECT 8.56 161.935 8.61 162.065 ; + RECT 10.27 161.935 10.32 162.065 ; + RECT 8.56 159.515 8.61 159.645 ; + RECT 10.27 159.515 10.32 159.645 ; + RECT 6.22 159.055 6.27 159.185 ; + RECT 7.5 159.055 7.55 159.185 ; + RECT 9.04 159.055 9.09 159.185 ; + RECT 9.315 159.055 9.365 159.185 ; + RECT 9.72 159.055 9.77 159.185 ; + RECT 11.025 159.055 11.075 159.185 ; + RECT 12.79 159.055 12.84 159.185 ; + RECT 6.225 156.635 6.275 156.765 ; + RECT 7.5 156.635 7.55 156.765 ; + RECT 9.04 156.635 9.09 156.765 ; + RECT 9.315 156.635 9.365 156.765 ; + RECT 11.025 156.635 11.075 156.765 ; + RECT 12.79 156.635 12.84 156.765 ; + RECT 7.18 156.405 7.23 156.535 ; + RECT 14.14 156.405 14.19 156.535 ; + RECT 8.56 159.055 8.61 159.185 ; + RECT 10.27 159.055 10.32 159.185 ; + RECT 8.56 156.635 8.61 156.765 ; + RECT 10.27 156.635 10.32 156.765 ; + RECT 6.22 156.175 6.27 156.305 ; + RECT 7.5 156.175 7.55 156.305 ; + RECT 9.04 156.175 9.09 156.305 ; + RECT 9.315 156.175 9.365 156.305 ; + RECT 9.72 156.175 9.77 156.305 ; + RECT 11.025 156.175 11.075 156.305 ; + RECT 12.79 156.175 12.84 156.305 ; + RECT 6.225 153.755 6.275 153.885 ; + RECT 7.5 153.755 7.55 153.885 ; + RECT 9.04 153.755 9.09 153.885 ; + RECT 9.315 153.755 9.365 153.885 ; + RECT 11.025 153.755 11.075 153.885 ; + RECT 12.79 153.755 12.84 153.885 ; + RECT 7.18 153.525 7.23 153.655 ; + RECT 14.14 153.525 14.19 153.655 ; + RECT 8.56 156.175 8.61 156.305 ; + RECT 10.27 156.175 10.32 156.305 ; + RECT 8.56 153.755 8.61 153.885 ; + RECT 10.27 153.755 10.32 153.885 ; + RECT 6.22 153.295 6.27 153.425 ; + RECT 7.5 153.295 7.55 153.425 ; + RECT 9.04 153.295 9.09 153.425 ; + RECT 9.315 153.295 9.365 153.425 ; + RECT 9.72 153.295 9.77 153.425 ; + RECT 11.025 153.295 11.075 153.425 ; + RECT 12.79 153.295 12.84 153.425 ; + RECT 6.225 150.875 6.275 151.005 ; + RECT 7.5 150.875 7.55 151.005 ; + RECT 9.04 150.875 9.09 151.005 ; + RECT 9.315 150.875 9.365 151.005 ; + RECT 11.025 150.875 11.075 151.005 ; + RECT 12.79 150.875 12.84 151.005 ; + RECT 7.18 150.645 7.23 150.775 ; + RECT 14.14 150.645 14.19 150.775 ; + RECT 8.56 153.295 8.61 153.425 ; + RECT 10.27 153.295 10.32 153.425 ; + RECT 8.56 150.875 8.61 151.005 ; + RECT 10.27 150.875 10.32 151.005 ; + RECT 6.22 150.415 6.27 150.545 ; + RECT 7.5 150.415 7.55 150.545 ; + RECT 9.04 150.415 9.09 150.545 ; + RECT 9.315 150.415 9.365 150.545 ; + RECT 9.72 150.415 9.77 150.545 ; + RECT 11.025 150.415 11.075 150.545 ; + RECT 12.79 150.415 12.84 150.545 ; + RECT 6.225 147.995 6.275 148.125 ; + RECT 7.5 147.995 7.55 148.125 ; + RECT 9.04 147.995 9.09 148.125 ; + RECT 9.315 147.995 9.365 148.125 ; + RECT 11.025 147.995 11.075 148.125 ; + RECT 12.79 147.995 12.84 148.125 ; + RECT 7.18 147.765 7.23 147.895 ; + RECT 14.14 147.765 14.19 147.895 ; + RECT 8.56 150.415 8.61 150.545 ; + RECT 10.27 150.415 10.32 150.545 ; + RECT 8.56 147.995 8.61 148.125 ; + RECT 10.27 147.995 10.32 148.125 ; + RECT 6.22 147.535 6.27 147.665 ; + RECT 7.5 147.535 7.55 147.665 ; + RECT 9.04 147.535 9.09 147.665 ; + RECT 9.315 147.535 9.365 147.665 ; + RECT 9.72 147.535 9.77 147.665 ; + RECT 11.025 147.535 11.075 147.665 ; + RECT 12.79 147.535 12.84 147.665 ; + RECT 6.225 145.115 6.275 145.245 ; + RECT 7.5 145.115 7.55 145.245 ; + RECT 9.04 145.115 9.09 145.245 ; + RECT 9.315 145.115 9.365 145.245 ; + RECT 11.025 145.115 11.075 145.245 ; + RECT 12.79 145.115 12.84 145.245 ; + RECT 7.18 144.885 7.23 145.015 ; + RECT 14.14 144.885 14.19 145.015 ; + RECT 8.56 147.535 8.61 147.665 ; + RECT 10.27 147.535 10.32 147.665 ; + RECT 8.56 145.115 8.61 145.245 ; + RECT 10.27 145.115 10.32 145.245 ; + RECT 6.22 144.655 6.27 144.785 ; + RECT 7.5 144.655 7.55 144.785 ; + RECT 9.04 144.655 9.09 144.785 ; + RECT 9.315 144.655 9.365 144.785 ; + RECT 9.72 144.655 9.77 144.785 ; + RECT 11.025 144.655 11.075 144.785 ; + RECT 12.79 144.655 12.84 144.785 ; + RECT 6.225 142.235 6.275 142.365 ; + RECT 7.5 142.235 7.55 142.365 ; + RECT 9.04 142.235 9.09 142.365 ; + RECT 9.315 142.235 9.365 142.365 ; + RECT 11.025 142.235 11.075 142.365 ; + RECT 12.79 142.235 12.84 142.365 ; + RECT 7.18 142.005 7.23 142.135 ; + RECT 14.14 142.005 14.19 142.135 ; + RECT 8.56 144.655 8.61 144.785 ; + RECT 10.27 144.655 10.32 144.785 ; + RECT 8.56 142.235 8.61 142.365 ; + RECT 10.27 142.235 10.32 142.365 ; + RECT 6.22 141.775 6.27 141.905 ; + RECT 7.5 141.775 7.55 141.905 ; + RECT 9.04 141.775 9.09 141.905 ; + RECT 9.315 141.775 9.365 141.905 ; + RECT 9.72 141.775 9.77 141.905 ; + RECT 11.025 141.775 11.075 141.905 ; + RECT 12.79 141.775 12.84 141.905 ; + RECT 6.225 139.355 6.275 139.485 ; + RECT 7.5 139.355 7.55 139.485 ; + RECT 9.04 139.355 9.09 139.485 ; + RECT 9.315 139.355 9.365 139.485 ; + RECT 11.025 139.355 11.075 139.485 ; + RECT 12.79 139.355 12.84 139.485 ; + RECT 7.18 139.125 7.23 139.255 ; + RECT 14.14 139.125 14.19 139.255 ; + RECT 8.56 141.775 8.61 141.905 ; + RECT 10.27 141.775 10.32 141.905 ; + RECT 8.56 139.355 8.61 139.485 ; + RECT 10.27 139.355 10.32 139.485 ; + RECT 6.22 138.895 6.27 139.025 ; + RECT 7.5 138.895 7.55 139.025 ; + RECT 9.04 138.895 9.09 139.025 ; + RECT 9.315 138.895 9.365 139.025 ; + RECT 9.72 138.895 9.77 139.025 ; + RECT 11.025 138.895 11.075 139.025 ; + RECT 12.79 138.895 12.84 139.025 ; + RECT 6.225 136.475 6.275 136.605 ; + RECT 7.5 136.475 7.55 136.605 ; + RECT 9.04 136.475 9.09 136.605 ; + RECT 9.315 136.475 9.365 136.605 ; + RECT 11.025 136.475 11.075 136.605 ; + RECT 12.79 136.475 12.84 136.605 ; + RECT 7.18 136.245 7.23 136.375 ; + RECT 14.14 136.245 14.19 136.375 ; + RECT 8.56 138.895 8.61 139.025 ; + RECT 10.27 138.895 10.32 139.025 ; + RECT 8.56 136.475 8.61 136.605 ; + RECT 10.27 136.475 10.32 136.605 ; + RECT 6.22 136.015 6.27 136.145 ; + RECT 7.5 136.015 7.55 136.145 ; + RECT 9.04 136.015 9.09 136.145 ; + RECT 9.315 136.015 9.365 136.145 ; + RECT 9.72 136.015 9.77 136.145 ; + RECT 11.025 136.015 11.075 136.145 ; + RECT 12.79 136.015 12.84 136.145 ; + RECT 6.225 133.595 6.275 133.725 ; + RECT 7.5 133.595 7.55 133.725 ; + RECT 9.04 133.595 9.09 133.725 ; + RECT 9.315 133.595 9.365 133.725 ; + RECT 11.025 133.595 11.075 133.725 ; + RECT 12.79 133.595 12.84 133.725 ; + RECT 7.18 133.365 7.23 133.495 ; + RECT 14.14 133.365 14.19 133.495 ; + RECT 8.56 136.015 8.61 136.145 ; + RECT 10.27 136.015 10.32 136.145 ; + RECT 8.56 133.595 8.61 133.725 ; + RECT 10.27 133.595 10.32 133.725 ; + RECT 6.22 133.135 6.27 133.265 ; + RECT 7.5 133.135 7.55 133.265 ; + RECT 9.04 133.135 9.09 133.265 ; + RECT 9.315 133.135 9.365 133.265 ; + RECT 9.72 133.135 9.77 133.265 ; + RECT 11.025 133.135 11.075 133.265 ; + RECT 12.79 133.135 12.84 133.265 ; + RECT 6.225 130.715 6.275 130.845 ; + RECT 7.5 130.715 7.55 130.845 ; + RECT 9.04 130.715 9.09 130.845 ; + RECT 9.315 130.715 9.365 130.845 ; + RECT 11.025 130.715 11.075 130.845 ; + RECT 12.79 130.715 12.84 130.845 ; + RECT 7.18 130.485 7.23 130.615 ; + RECT 14.14 130.485 14.19 130.615 ; + RECT 8.56 133.135 8.61 133.265 ; + RECT 10.27 133.135 10.32 133.265 ; + RECT 8.56 130.715 8.61 130.845 ; + RECT 10.27 130.715 10.32 130.845 ; + RECT 6.22 130.255 6.27 130.385 ; + RECT 7.5 130.255 7.55 130.385 ; + RECT 9.04 130.255 9.09 130.385 ; + RECT 9.315 130.255 9.365 130.385 ; + RECT 9.72 130.255 9.77 130.385 ; + RECT 11.025 130.255 11.075 130.385 ; + RECT 12.79 130.255 12.84 130.385 ; + RECT 6.225 127.835 6.275 127.965 ; + RECT 7.5 127.835 7.55 127.965 ; + RECT 9.04 127.835 9.09 127.965 ; + RECT 9.315 127.835 9.365 127.965 ; + RECT 11.025 127.835 11.075 127.965 ; + RECT 12.79 127.835 12.84 127.965 ; + RECT 7.18 127.605 7.23 127.735 ; + RECT 14.14 127.605 14.19 127.735 ; + RECT 8.56 130.255 8.61 130.385 ; + RECT 10.27 130.255 10.32 130.385 ; + RECT 8.56 127.835 8.61 127.965 ; + RECT 10.27 127.835 10.32 127.965 ; + RECT 6.22 127.375 6.27 127.505 ; + RECT 7.5 127.375 7.55 127.505 ; + RECT 9.04 127.375 9.09 127.505 ; + RECT 9.315 127.375 9.365 127.505 ; + RECT 9.72 127.375 9.77 127.505 ; + RECT 11.025 127.375 11.075 127.505 ; + RECT 12.79 127.375 12.84 127.505 ; + RECT 14.33 182.095 14.38 182.225 ; + RECT 6.22 181.635 6.27 181.765 ; + RECT 7.5 181.635 7.55 181.765 ; + RECT 9.04 181.635 9.09 181.765 ; + RECT 9.315 181.635 9.365 181.765 ; + RECT 9.72 181.635 9.77 181.765 ; + RECT 11.025 181.635 11.075 181.765 ; + RECT 12.79 181.635 12.84 181.765 ; + RECT 14.33 179.675 14.38 179.805 ; + RECT 5.675 179.445 5.725 179.575 ; + RECT 6.065 179.445 6.115 179.575 ; + RECT 6.725 179.445 6.775 179.575 ; + RECT 8.42 179.445 8.47 179.575 ; + RECT 8.77 179.445 8.82 179.575 ; + RECT 11.555 179.445 11.605 179.575 ; + RECT 11.815 179.445 11.865 179.575 ; + RECT 12.52 179.445 12.57 179.575 ; + RECT 13.98 179.445 14.03 179.575 ; + RECT 14.33 156.175 14.38 156.305 ; + RECT 6.22 155.715 6.27 155.845 ; + RECT 7.5 155.715 7.55 155.845 ; + RECT 9.04 155.715 9.09 155.845 ; + RECT 9.315 155.715 9.365 155.845 ; + RECT 9.72 155.715 9.77 155.845 ; + RECT 11.025 155.715 11.075 155.845 ; + RECT 12.79 155.715 12.84 155.845 ; + RECT 14.33 153.755 14.38 153.885 ; + RECT 5.675 153.525 5.725 153.655 ; + RECT 6.065 153.525 6.115 153.655 ; + RECT 6.725 153.525 6.775 153.655 ; + RECT 8.42 153.525 8.47 153.655 ; + RECT 8.77 153.525 8.82 153.655 ; + RECT 11.555 153.525 11.605 153.655 ; + RECT 11.815 153.525 11.865 153.655 ; + RECT 12.52 153.525 12.57 153.655 ; + RECT 13.98 153.525 14.03 153.655 ; + RECT 14.33 153.295 14.38 153.425 ; + RECT 6.22 152.835 6.27 152.965 ; + RECT 7.5 152.835 7.55 152.965 ; + RECT 9.04 152.835 9.09 152.965 ; + RECT 9.315 152.835 9.365 152.965 ; + RECT 9.72 152.835 9.77 152.965 ; + RECT 11.025 152.835 11.075 152.965 ; + RECT 12.79 152.835 12.84 152.965 ; + RECT 14.33 150.875 14.38 151.005 ; + RECT 5.675 150.645 5.725 150.775 ; + RECT 6.065 150.645 6.115 150.775 ; + RECT 6.725 150.645 6.775 150.775 ; + RECT 8.42 150.645 8.47 150.775 ; + RECT 8.77 150.645 8.82 150.775 ; + RECT 11.555 150.645 11.605 150.775 ; + RECT 11.815 150.645 11.865 150.775 ; + RECT 12.52 150.645 12.57 150.775 ; + RECT 13.98 150.645 14.03 150.775 ; + RECT 14.33 150.415 14.38 150.545 ; + RECT 6.22 149.955 6.27 150.085 ; + RECT 7.5 149.955 7.55 150.085 ; + RECT 9.04 149.955 9.09 150.085 ; + RECT 9.315 149.955 9.365 150.085 ; + RECT 9.72 149.955 9.77 150.085 ; + RECT 11.025 149.955 11.075 150.085 ; + RECT 12.79 149.955 12.84 150.085 ; + RECT 14.33 147.995 14.38 148.125 ; + RECT 5.675 147.765 5.725 147.895 ; + RECT 6.065 147.765 6.115 147.895 ; + RECT 6.725 147.765 6.775 147.895 ; + RECT 8.42 147.765 8.47 147.895 ; + RECT 8.77 147.765 8.82 147.895 ; + RECT 11.555 147.765 11.605 147.895 ; + RECT 11.815 147.765 11.865 147.895 ; + RECT 12.52 147.765 12.57 147.895 ; + RECT 13.98 147.765 14.03 147.895 ; + RECT 14.33 147.535 14.38 147.665 ; + RECT 6.22 147.075 6.27 147.205 ; + RECT 7.5 147.075 7.55 147.205 ; + RECT 9.04 147.075 9.09 147.205 ; + RECT 9.315 147.075 9.365 147.205 ; + RECT 9.72 147.075 9.77 147.205 ; + RECT 11.025 147.075 11.075 147.205 ; + RECT 12.79 147.075 12.84 147.205 ; + RECT 14.33 145.115 14.38 145.245 ; + RECT 5.675 144.885 5.725 145.015 ; + RECT 6.065 144.885 6.115 145.015 ; + RECT 6.725 144.885 6.775 145.015 ; + RECT 8.42 144.885 8.47 145.015 ; + RECT 8.77 144.885 8.82 145.015 ; + RECT 11.555 144.885 11.605 145.015 ; + RECT 11.815 144.885 11.865 145.015 ; + RECT 12.52 144.885 12.57 145.015 ; + RECT 13.98 144.885 14.03 145.015 ; + RECT 14.33 144.655 14.38 144.785 ; + RECT 6.22 144.195 6.27 144.325 ; + RECT 7.5 144.195 7.55 144.325 ; + RECT 9.04 144.195 9.09 144.325 ; + RECT 9.315 144.195 9.365 144.325 ; + RECT 9.72 144.195 9.77 144.325 ; + RECT 11.025 144.195 11.075 144.325 ; + RECT 12.79 144.195 12.84 144.325 ; + RECT 14.33 142.235 14.38 142.365 ; + RECT 5.675 142.005 5.725 142.135 ; + RECT 6.065 142.005 6.115 142.135 ; + RECT 6.725 142.005 6.775 142.135 ; + RECT 8.42 142.005 8.47 142.135 ; + RECT 8.77 142.005 8.82 142.135 ; + RECT 11.555 142.005 11.605 142.135 ; + RECT 11.815 142.005 11.865 142.135 ; + RECT 12.52 142.005 12.57 142.135 ; + RECT 13.98 142.005 14.03 142.135 ; + RECT 14.33 141.775 14.38 141.905 ; + RECT 6.22 141.315 6.27 141.445 ; + RECT 7.5 141.315 7.55 141.445 ; + RECT 9.04 141.315 9.09 141.445 ; + RECT 9.315 141.315 9.365 141.445 ; + RECT 9.72 141.315 9.77 141.445 ; + RECT 11.025 141.315 11.075 141.445 ; + RECT 12.79 141.315 12.84 141.445 ; + RECT 14.33 139.355 14.38 139.485 ; + RECT 5.675 139.125 5.725 139.255 ; + RECT 6.065 139.125 6.115 139.255 ; + RECT 6.725 139.125 6.775 139.255 ; + RECT 8.42 139.125 8.47 139.255 ; + RECT 8.77 139.125 8.82 139.255 ; + RECT 11.555 139.125 11.605 139.255 ; + RECT 11.815 139.125 11.865 139.255 ; + RECT 12.52 139.125 12.57 139.255 ; + RECT 13.98 139.125 14.03 139.255 ; + RECT 14.33 138.895 14.38 139.025 ; + RECT 6.22 138.435 6.27 138.565 ; + RECT 7.5 138.435 7.55 138.565 ; + RECT 9.04 138.435 9.09 138.565 ; + RECT 9.315 138.435 9.365 138.565 ; + RECT 9.72 138.435 9.77 138.565 ; + RECT 11.025 138.435 11.075 138.565 ; + RECT 12.79 138.435 12.84 138.565 ; + RECT 14.33 136.475 14.38 136.605 ; + RECT 5.675 136.245 5.725 136.375 ; + RECT 6.065 136.245 6.115 136.375 ; + RECT 6.725 136.245 6.775 136.375 ; + RECT 8.42 136.245 8.47 136.375 ; + RECT 8.77 136.245 8.82 136.375 ; + RECT 11.555 136.245 11.605 136.375 ; + RECT 11.815 136.245 11.865 136.375 ; + RECT 12.52 136.245 12.57 136.375 ; + RECT 13.98 136.245 14.03 136.375 ; + RECT 14.33 136.015 14.38 136.145 ; + RECT 6.22 135.555 6.27 135.685 ; + RECT 7.5 135.555 7.55 135.685 ; + RECT 9.04 135.555 9.09 135.685 ; + RECT 9.315 135.555 9.365 135.685 ; + RECT 9.72 135.555 9.77 135.685 ; + RECT 11.025 135.555 11.075 135.685 ; + RECT 12.79 135.555 12.84 135.685 ; + RECT 14.33 133.595 14.38 133.725 ; + RECT 5.675 133.365 5.725 133.495 ; + RECT 6.065 133.365 6.115 133.495 ; + RECT 6.725 133.365 6.775 133.495 ; + RECT 8.42 133.365 8.47 133.495 ; + RECT 8.77 133.365 8.82 133.495 ; + RECT 11.555 133.365 11.605 133.495 ; + RECT 11.815 133.365 11.865 133.495 ; + RECT 12.52 133.365 12.57 133.495 ; + RECT 13.98 133.365 14.03 133.495 ; + RECT 14.33 133.135 14.38 133.265 ; + RECT 6.22 132.675 6.27 132.805 ; + RECT 7.5 132.675 7.55 132.805 ; + RECT 9.04 132.675 9.09 132.805 ; + RECT 9.315 132.675 9.365 132.805 ; + RECT 9.72 132.675 9.77 132.805 ; + RECT 11.025 132.675 11.075 132.805 ; + RECT 12.79 132.675 12.84 132.805 ; + RECT 14.33 130.715 14.38 130.845 ; + RECT 5.675 130.485 5.725 130.615 ; + RECT 6.065 130.485 6.115 130.615 ; + RECT 6.725 130.485 6.775 130.615 ; + RECT 8.42 130.485 8.47 130.615 ; + RECT 8.77 130.485 8.82 130.615 ; + RECT 11.555 130.485 11.605 130.615 ; + RECT 11.815 130.485 11.865 130.615 ; + RECT 12.52 130.485 12.57 130.615 ; + RECT 13.98 130.485 14.03 130.615 ; + RECT 14.33 130.255 14.38 130.385 ; + RECT 6.22 129.795 6.27 129.925 ; + RECT 7.5 129.795 7.55 129.925 ; + RECT 9.04 129.795 9.09 129.925 ; + RECT 9.315 129.795 9.365 129.925 ; + RECT 9.72 129.795 9.77 129.925 ; + RECT 11.025 129.795 11.075 129.925 ; + RECT 12.79 129.795 12.84 129.925 ; + RECT 14.33 127.835 14.38 127.965 ; + RECT 5.675 127.605 5.725 127.735 ; + RECT 6.065 127.605 6.115 127.735 ; + RECT 6.725 127.605 6.775 127.735 ; + RECT 8.42 127.605 8.47 127.735 ; + RECT 8.77 127.605 8.82 127.735 ; + RECT 11.555 127.605 11.605 127.735 ; + RECT 11.815 127.605 11.865 127.735 ; + RECT 12.52 127.605 12.57 127.735 ; + RECT 13.98 127.605 14.03 127.735 ; + RECT 14.33 179.215 14.38 179.345 ; + RECT 6.22 178.755 6.27 178.885 ; + RECT 7.5 178.755 7.55 178.885 ; + RECT 9.04 178.755 9.09 178.885 ; + RECT 9.315 178.755 9.365 178.885 ; + RECT 9.72 178.755 9.77 178.885 ; + RECT 11.025 178.755 11.075 178.885 ; + RECT 12.79 178.755 12.84 178.885 ; + RECT 14.33 176.795 14.38 176.925 ; + RECT 5.675 176.565 5.725 176.695 ; + RECT 6.065 176.565 6.115 176.695 ; + RECT 6.725 176.565 6.775 176.695 ; + RECT 8.42 176.565 8.47 176.695 ; + RECT 8.77 176.565 8.82 176.695 ; + RECT 11.555 176.565 11.605 176.695 ; + RECT 11.815 176.565 11.865 176.695 ; + RECT 12.52 176.565 12.57 176.695 ; + RECT 13.98 176.565 14.03 176.695 ; + RECT 14.33 127.375 14.38 127.505 ; + RECT 6.22 126.915 6.27 127.045 ; + RECT 7.5 126.915 7.55 127.045 ; + RECT 9.04 126.915 9.09 127.045 ; + RECT 9.315 126.915 9.365 127.045 ; + RECT 9.72 126.915 9.77 127.045 ; + RECT 11.025 126.915 11.075 127.045 ; + RECT 12.79 126.915 12.84 127.045 ; + RECT 14.33 124.955 14.38 125.085 ; + RECT 5.675 124.725 5.725 124.855 ; + RECT 6.065 124.725 6.115 124.855 ; + RECT 6.725 124.725 6.775 124.855 ; + RECT 8.42 124.725 8.47 124.855 ; + RECT 8.77 124.725 8.82 124.855 ; + RECT 11.555 124.725 11.605 124.855 ; + RECT 11.815 124.725 11.865 124.855 ; + RECT 12.52 124.725 12.57 124.855 ; + RECT 13.98 124.725 14.03 124.855 ; + RECT 14.33 124.495 14.38 124.625 ; + RECT 6.22 124.035 6.27 124.165 ; + RECT 7.5 124.035 7.55 124.165 ; + RECT 9.04 124.035 9.09 124.165 ; + RECT 9.315 124.035 9.365 124.165 ; + RECT 9.72 124.035 9.77 124.165 ; + RECT 11.025 124.035 11.075 124.165 ; + RECT 12.79 124.035 12.84 124.165 ; + RECT 14.33 122.075 14.38 122.205 ; + RECT 5.675 121.845 5.725 121.975 ; + RECT 6.065 121.845 6.115 121.975 ; + RECT 6.725 121.845 6.775 121.975 ; + RECT 8.42 121.845 8.47 121.975 ; + RECT 8.77 121.845 8.82 121.975 ; + RECT 11.555 121.845 11.605 121.975 ; + RECT 11.815 121.845 11.865 121.975 ; + RECT 12.52 121.845 12.57 121.975 ; + RECT 13.98 121.845 14.03 121.975 ; + RECT 14.33 121.615 14.38 121.745 ; + RECT 6.22 121.155 6.27 121.285 ; + RECT 7.5 121.155 7.55 121.285 ; + RECT 9.04 121.155 9.09 121.285 ; + RECT 9.315 121.155 9.365 121.285 ; + RECT 9.72 121.155 9.77 121.285 ; + RECT 11.025 121.155 11.075 121.285 ; + RECT 12.79 121.155 12.84 121.285 ; + RECT 14.33 119.195 14.38 119.325 ; + RECT 5.675 118.965 5.725 119.095 ; + RECT 6.065 118.965 6.115 119.095 ; + RECT 6.725 118.965 6.775 119.095 ; + RECT 8.42 118.965 8.47 119.095 ; + RECT 8.77 118.965 8.82 119.095 ; + RECT 11.555 118.965 11.605 119.095 ; + RECT 11.815 118.965 11.865 119.095 ; + RECT 12.52 118.965 12.57 119.095 ; + RECT 13.98 118.965 14.03 119.095 ; + RECT 14.33 118.735 14.38 118.865 ; + RECT 6.22 118.275 6.27 118.405 ; + RECT 7.5 118.275 7.55 118.405 ; + RECT 9.04 118.275 9.09 118.405 ; + RECT 9.315 118.275 9.365 118.405 ; + RECT 9.72 118.275 9.77 118.405 ; + RECT 11.025 118.275 11.075 118.405 ; + RECT 12.79 118.275 12.84 118.405 ; + RECT 14.33 116.315 14.38 116.445 ; + RECT 5.675 116.085 5.725 116.215 ; + RECT 6.065 116.085 6.115 116.215 ; + RECT 6.725 116.085 6.775 116.215 ; + RECT 8.42 116.085 8.47 116.215 ; + RECT 8.77 116.085 8.82 116.215 ; + RECT 11.555 116.085 11.605 116.215 ; + RECT 11.815 116.085 11.865 116.215 ; + RECT 12.52 116.085 12.57 116.215 ; + RECT 13.98 116.085 14.03 116.215 ; + RECT 14.33 115.855 14.38 115.985 ; + RECT 6.22 115.395 6.27 115.525 ; + RECT 7.5 115.395 7.55 115.525 ; + RECT 9.04 115.395 9.09 115.525 ; + RECT 9.315 115.395 9.365 115.525 ; + RECT 9.72 115.395 9.77 115.525 ; + RECT 11.025 115.395 11.075 115.525 ; + RECT 12.79 115.395 12.84 115.525 ; + RECT 14.33 113.435 14.38 113.565 ; + RECT 5.675 113.205 5.725 113.335 ; + RECT 6.065 113.205 6.115 113.335 ; + RECT 6.725 113.205 6.775 113.335 ; + RECT 8.42 113.205 8.47 113.335 ; + RECT 8.77 113.205 8.82 113.335 ; + RECT 11.555 113.205 11.605 113.335 ; + RECT 11.815 113.205 11.865 113.335 ; + RECT 12.52 113.205 12.57 113.335 ; + RECT 13.98 113.205 14.03 113.335 ; + RECT 14.33 112.975 14.38 113.105 ; + RECT 6.22 112.515 6.27 112.645 ; + RECT 7.5 112.515 7.55 112.645 ; + RECT 9.04 112.515 9.09 112.645 ; + RECT 9.315 112.515 9.365 112.645 ; + RECT 9.72 112.515 9.77 112.645 ; + RECT 11.025 112.515 11.075 112.645 ; + RECT 12.79 112.515 12.84 112.645 ; + RECT 14.33 110.555 14.38 110.685 ; + RECT 5.675 110.325 5.725 110.455 ; + RECT 6.065 110.325 6.115 110.455 ; + RECT 6.725 110.325 6.775 110.455 ; + RECT 8.42 110.325 8.47 110.455 ; + RECT 8.77 110.325 8.82 110.455 ; + RECT 11.555 110.325 11.605 110.455 ; + RECT 11.815 110.325 11.865 110.455 ; + RECT 12.52 110.325 12.57 110.455 ; + RECT 13.98 110.325 14.03 110.455 ; + RECT 14.33 110.095 14.38 110.225 ; + RECT 6.22 109.635 6.27 109.765 ; + RECT 7.5 109.635 7.55 109.765 ; + RECT 9.04 109.635 9.09 109.765 ; + RECT 9.315 109.635 9.365 109.765 ; + RECT 9.72 109.635 9.77 109.765 ; + RECT 11.025 109.635 11.075 109.765 ; + RECT 12.79 109.635 12.84 109.765 ; + RECT 14.33 107.675 14.38 107.805 ; + RECT 5.675 107.445 5.725 107.575 ; + RECT 6.065 107.445 6.115 107.575 ; + RECT 6.725 107.445 6.775 107.575 ; + RECT 8.42 107.445 8.47 107.575 ; + RECT 8.77 107.445 8.82 107.575 ; + RECT 11.555 107.445 11.605 107.575 ; + RECT 11.815 107.445 11.865 107.575 ; + RECT 12.52 107.445 12.57 107.575 ; + RECT 13.98 107.445 14.03 107.575 ; + RECT 14.33 107.215 14.38 107.345 ; + RECT 6.22 106.755 6.27 106.885 ; + RECT 7.5 106.755 7.55 106.885 ; + RECT 9.04 106.755 9.09 106.885 ; + RECT 9.315 106.755 9.365 106.885 ; + RECT 9.72 106.755 9.77 106.885 ; + RECT 11.025 106.755 11.075 106.885 ; + RECT 12.79 106.755 12.84 106.885 ; + RECT 14.33 104.795 14.38 104.925 ; + RECT 5.675 104.565 5.725 104.695 ; + RECT 6.065 104.565 6.115 104.695 ; + RECT 6.725 104.565 6.775 104.695 ; + RECT 8.42 104.565 8.47 104.695 ; + RECT 8.77 104.565 8.82 104.695 ; + RECT 11.555 104.565 11.605 104.695 ; + RECT 11.815 104.565 11.865 104.695 ; + RECT 12.52 104.565 12.57 104.695 ; + RECT 13.98 104.565 14.03 104.695 ; + RECT 14.33 104.335 14.38 104.465 ; + RECT 6.22 103.875 6.27 104.005 ; + RECT 7.5 103.875 7.55 104.005 ; + RECT 9.04 103.875 9.09 104.005 ; + RECT 9.315 103.875 9.365 104.005 ; + RECT 9.72 103.875 9.77 104.005 ; + RECT 11.025 103.875 11.075 104.005 ; + RECT 12.79 103.875 12.84 104.005 ; + RECT 14.33 101.915 14.38 102.045 ; + RECT 5.675 101.685 5.725 101.815 ; + RECT 6.065 101.685 6.115 101.815 ; + RECT 6.725 101.685 6.775 101.815 ; + RECT 8.42 101.685 8.47 101.815 ; + RECT 8.77 101.685 8.82 101.815 ; + RECT 11.555 101.685 11.605 101.815 ; + RECT 11.815 101.685 11.865 101.815 ; + RECT 12.52 101.685 12.57 101.815 ; + RECT 13.98 101.685 14.03 101.815 ; + RECT 14.33 101.455 14.38 101.585 ; + RECT 6.22 100.995 6.27 101.125 ; + RECT 7.5 100.995 7.55 101.125 ; + RECT 9.04 100.995 9.09 101.125 ; + RECT 9.315 100.995 9.365 101.125 ; + RECT 9.72 100.995 9.77 101.125 ; + RECT 11.025 100.995 11.075 101.125 ; + RECT 12.79 100.995 12.84 101.125 ; + RECT 14.33 99.035 14.38 99.165 ; + RECT 5.675 98.805 5.725 98.935 ; + RECT 6.065 98.805 6.115 98.935 ; + RECT 6.725 98.805 6.775 98.935 ; + RECT 8.42 98.805 8.47 98.935 ; + RECT 8.77 98.805 8.82 98.935 ; + RECT 11.555 98.805 11.605 98.935 ; + RECT 11.815 98.805 11.865 98.935 ; + RECT 12.52 98.805 12.57 98.935 ; + RECT 13.98 98.805 14.03 98.935 ; + RECT 14.33 176.335 14.38 176.465 ; + RECT 6.22 175.875 6.27 176.005 ; + RECT 7.5 175.875 7.55 176.005 ; + RECT 9.04 175.875 9.09 176.005 ; + RECT 9.315 175.875 9.365 176.005 ; + RECT 9.72 175.875 9.77 176.005 ; + RECT 11.025 175.875 11.075 176.005 ; + RECT 12.79 175.875 12.84 176.005 ; + RECT 14.33 173.915 14.38 174.045 ; + RECT 5.675 173.685 5.725 173.815 ; + RECT 6.065 173.685 6.115 173.815 ; + RECT 6.725 173.685 6.775 173.815 ; + RECT 8.42 173.685 8.47 173.815 ; + RECT 8.77 173.685 8.82 173.815 ; + RECT 11.555 173.685 11.605 173.815 ; + RECT 11.815 173.685 11.865 173.815 ; + RECT 12.52 173.685 12.57 173.815 ; + RECT 13.98 173.685 14.03 173.815 ; + RECT 14.33 98.575 14.38 98.705 ; + RECT 6.22 98.115 6.27 98.245 ; + RECT 7.5 98.115 7.55 98.245 ; + RECT 9.04 98.115 9.09 98.245 ; + RECT 9.315 98.115 9.365 98.245 ; + RECT 9.72 98.115 9.77 98.245 ; + RECT 11.025 98.115 11.075 98.245 ; + RECT 12.79 98.115 12.84 98.245 ; + RECT 14.33 96.155 14.38 96.285 ; + RECT 5.675 95.925 5.725 96.055 ; + RECT 6.065 95.925 6.115 96.055 ; + RECT 6.725 95.925 6.775 96.055 ; + RECT 8.42 95.925 8.47 96.055 ; + RECT 8.77 95.925 8.82 96.055 ; + RECT 11.555 95.925 11.605 96.055 ; + RECT 11.815 95.925 11.865 96.055 ; + RECT 12.52 95.925 12.57 96.055 ; + RECT 13.98 95.925 14.03 96.055 ; + RECT 14.33 95.695 14.38 95.825 ; + RECT 6.22 95.235 6.27 95.365 ; + RECT 7.5 95.235 7.55 95.365 ; + RECT 9.04 95.235 9.09 95.365 ; + RECT 9.315 95.235 9.365 95.365 ; + RECT 9.72 95.235 9.77 95.365 ; + RECT 11.025 95.235 11.075 95.365 ; + RECT 12.79 95.235 12.84 95.365 ; + RECT 14.33 93.275 14.38 93.405 ; + RECT 5.675 93.045 5.725 93.175 ; + RECT 6.065 93.045 6.115 93.175 ; + RECT 6.725 93.045 6.775 93.175 ; + RECT 8.42 93.045 8.47 93.175 ; + RECT 8.77 93.045 8.82 93.175 ; + RECT 11.555 93.045 11.605 93.175 ; + RECT 11.815 93.045 11.865 93.175 ; + RECT 12.52 93.045 12.57 93.175 ; + RECT 13.98 93.045 14.03 93.175 ; + RECT 14.33 92.815 14.38 92.945 ; + RECT 6.22 92.355 6.27 92.485 ; + RECT 7.5 92.355 7.55 92.485 ; + RECT 9.04 92.355 9.09 92.485 ; + RECT 9.315 92.355 9.365 92.485 ; + RECT 9.72 92.355 9.77 92.485 ; + RECT 11.025 92.355 11.075 92.485 ; + RECT 12.79 92.355 12.84 92.485 ; + RECT 14.33 90.395 14.38 90.525 ; + RECT 5.675 90.165 5.725 90.295 ; + RECT 6.065 90.165 6.115 90.295 ; + RECT 6.725 90.165 6.775 90.295 ; + RECT 8.42 90.165 8.47 90.295 ; + RECT 8.77 90.165 8.82 90.295 ; + RECT 11.555 90.165 11.605 90.295 ; + RECT 11.815 90.165 11.865 90.295 ; + RECT 12.52 90.165 12.57 90.295 ; + RECT 13.98 90.165 14.03 90.295 ; + RECT 14.33 89.935 14.38 90.065 ; + RECT 6.22 89.475 6.27 89.605 ; + RECT 7.5 89.475 7.55 89.605 ; + RECT 9.04 89.475 9.09 89.605 ; + RECT 9.315 89.475 9.365 89.605 ; + RECT 9.72 89.475 9.77 89.605 ; + RECT 11.025 89.475 11.075 89.605 ; + RECT 12.79 89.475 12.84 89.605 ; + RECT 14.33 87.515 14.38 87.645 ; + RECT 5.675 87.285 5.725 87.415 ; + RECT 6.065 87.285 6.115 87.415 ; + RECT 6.725 87.285 6.775 87.415 ; + RECT 8.42 87.285 8.47 87.415 ; + RECT 8.77 87.285 8.82 87.415 ; + RECT 11.555 87.285 11.605 87.415 ; + RECT 11.815 87.285 11.865 87.415 ; + RECT 12.52 87.285 12.57 87.415 ; + RECT 13.98 87.285 14.03 87.415 ; + RECT 14.33 87.055 14.38 87.185 ; + RECT 6.22 86.595 6.27 86.725 ; + RECT 7.5 86.595 7.55 86.725 ; + RECT 9.04 86.595 9.09 86.725 ; + RECT 9.315 86.595 9.365 86.725 ; + RECT 9.72 86.595 9.77 86.725 ; + RECT 11.025 86.595 11.075 86.725 ; + RECT 12.79 86.595 12.84 86.725 ; + RECT 14.33 84.635 14.38 84.765 ; + RECT 5.675 84.405 5.725 84.535 ; + RECT 6.065 84.405 6.115 84.535 ; + RECT 6.725 84.405 6.775 84.535 ; + RECT 8.42 84.405 8.47 84.535 ; + RECT 8.77 84.405 8.82 84.535 ; + RECT 11.555 84.405 11.605 84.535 ; + RECT 11.815 84.405 11.865 84.535 ; + RECT 12.52 84.405 12.57 84.535 ; + RECT 13.98 84.405 14.03 84.535 ; + RECT 14.33 84.175 14.38 84.305 ; + RECT 6.22 83.715 6.27 83.845 ; + RECT 7.5 83.715 7.55 83.845 ; + RECT 9.04 83.715 9.09 83.845 ; + RECT 9.315 83.715 9.365 83.845 ; + RECT 9.72 83.715 9.77 83.845 ; + RECT 11.025 83.715 11.075 83.845 ; + RECT 12.79 83.715 12.84 83.845 ; + RECT 14.33 81.755 14.38 81.885 ; + RECT 5.675 81.525 5.725 81.655 ; + RECT 6.065 81.525 6.115 81.655 ; + RECT 6.725 81.525 6.775 81.655 ; + RECT 8.42 81.525 8.47 81.655 ; + RECT 8.77 81.525 8.82 81.655 ; + RECT 11.555 81.525 11.605 81.655 ; + RECT 11.815 81.525 11.865 81.655 ; + RECT 12.52 81.525 12.57 81.655 ; + RECT 13.98 81.525 14.03 81.655 ; + RECT 14.33 81.295 14.38 81.425 ; + RECT 6.22 80.835 6.27 80.965 ; + RECT 7.5 80.835 7.55 80.965 ; + RECT 9.04 80.835 9.09 80.965 ; + RECT 9.315 80.835 9.365 80.965 ; + RECT 9.72 80.835 9.77 80.965 ; + RECT 11.025 80.835 11.075 80.965 ; + RECT 12.79 80.835 12.84 80.965 ; + RECT 14.33 78.875 14.38 79.005 ; + RECT 5.675 78.645 5.725 78.775 ; + RECT 6.065 78.645 6.115 78.775 ; + RECT 6.725 78.645 6.775 78.775 ; + RECT 8.42 78.645 8.47 78.775 ; + RECT 8.77 78.645 8.82 78.775 ; + RECT 11.555 78.645 11.605 78.775 ; + RECT 11.815 78.645 11.865 78.775 ; + RECT 12.52 78.645 12.57 78.775 ; + RECT 13.98 78.645 14.03 78.775 ; + RECT 14.33 78.415 14.38 78.545 ; + RECT 6.22 77.955 6.27 78.085 ; + RECT 7.5 77.955 7.55 78.085 ; + RECT 9.04 77.955 9.09 78.085 ; + RECT 9.315 77.955 9.365 78.085 ; + RECT 9.72 77.955 9.77 78.085 ; + RECT 11.025 77.955 11.075 78.085 ; + RECT 12.79 77.955 12.84 78.085 ; + RECT 14.33 75.995 14.38 76.125 ; + RECT 5.675 75.765 5.725 75.895 ; + RECT 6.065 75.765 6.115 75.895 ; + RECT 6.725 75.765 6.775 75.895 ; + RECT 8.42 75.765 8.47 75.895 ; + RECT 8.77 75.765 8.82 75.895 ; + RECT 11.555 75.765 11.605 75.895 ; + RECT 11.815 75.765 11.865 75.895 ; + RECT 12.52 75.765 12.57 75.895 ; + RECT 13.98 75.765 14.03 75.895 ; + RECT 14.33 75.535 14.38 75.665 ; + RECT 6.22 75.075 6.27 75.205 ; + RECT 7.5 75.075 7.55 75.205 ; + RECT 9.04 75.075 9.09 75.205 ; + RECT 9.315 75.075 9.365 75.205 ; + RECT 9.72 75.075 9.77 75.205 ; + RECT 11.025 75.075 11.075 75.205 ; + RECT 12.79 75.075 12.84 75.205 ; + RECT 14.33 73.115 14.38 73.245 ; + RECT 5.675 72.885 5.725 73.015 ; + RECT 6.065 72.885 6.115 73.015 ; + RECT 6.725 72.885 6.775 73.015 ; + RECT 8.42 72.885 8.47 73.015 ; + RECT 8.77 72.885 8.82 73.015 ; + RECT 11.555 72.885 11.605 73.015 ; + RECT 11.815 72.885 11.865 73.015 ; + RECT 12.52 72.885 12.57 73.015 ; + RECT 13.98 72.885 14.03 73.015 ; + RECT 14.33 72.655 14.38 72.785 ; + RECT 6.22 72.195 6.27 72.325 ; + RECT 7.5 72.195 7.55 72.325 ; + RECT 9.04 72.195 9.09 72.325 ; + RECT 9.315 72.195 9.365 72.325 ; + RECT 9.72 72.195 9.77 72.325 ; + RECT 11.025 72.195 11.075 72.325 ; + RECT 12.79 72.195 12.84 72.325 ; + RECT 14.33 70.235 14.38 70.365 ; + RECT 5.675 70.005 5.725 70.135 ; + RECT 6.065 70.005 6.115 70.135 ; + RECT 6.725 70.005 6.775 70.135 ; + RECT 8.42 70.005 8.47 70.135 ; + RECT 8.77 70.005 8.82 70.135 ; + RECT 11.555 70.005 11.605 70.135 ; + RECT 11.815 70.005 11.865 70.135 ; + RECT 12.52 70.005 12.57 70.135 ; + RECT 13.98 70.005 14.03 70.135 ; + RECT 14.33 173.455 14.38 173.585 ; + RECT 6.22 172.995 6.27 173.125 ; + RECT 7.5 172.995 7.55 173.125 ; + RECT 9.04 172.995 9.09 173.125 ; + RECT 9.315 172.995 9.365 173.125 ; + RECT 9.72 172.995 9.77 173.125 ; + RECT 11.025 172.995 11.075 173.125 ; + RECT 12.79 172.995 12.84 173.125 ; + RECT 14.33 171.035 14.38 171.165 ; + RECT 5.675 170.805 5.725 170.935 ; + RECT 6.065 170.805 6.115 170.935 ; + RECT 6.725 170.805 6.775 170.935 ; + RECT 8.42 170.805 8.47 170.935 ; + RECT 8.77 170.805 8.82 170.935 ; + RECT 11.555 170.805 11.605 170.935 ; + RECT 11.815 170.805 11.865 170.935 ; + RECT 12.52 170.805 12.57 170.935 ; + RECT 13.98 170.805 14.03 170.935 ; + RECT 14.33 69.775 14.38 69.905 ; + RECT 6.22 69.315 6.27 69.445 ; + RECT 7.5 69.315 7.55 69.445 ; + RECT 9.04 69.315 9.09 69.445 ; + RECT 9.315 69.315 9.365 69.445 ; + RECT 9.72 69.315 9.77 69.445 ; + RECT 11.025 69.315 11.075 69.445 ; + RECT 12.79 69.315 12.84 69.445 ; + RECT 14.33 67.355 14.38 67.485 ; + RECT 5.675 67.125 5.725 67.255 ; + RECT 6.065 67.125 6.115 67.255 ; + RECT 6.725 67.125 6.775 67.255 ; + RECT 8.42 67.125 8.47 67.255 ; + RECT 8.77 67.125 8.82 67.255 ; + RECT 11.555 67.125 11.605 67.255 ; + RECT 11.815 67.125 11.865 67.255 ; + RECT 12.52 67.125 12.57 67.255 ; + RECT 13.98 67.125 14.03 67.255 ; + RECT 14.33 66.895 14.38 67.025 ; + RECT 6.22 66.435 6.27 66.565 ; + RECT 7.5 66.435 7.55 66.565 ; + RECT 9.04 66.435 9.09 66.565 ; + RECT 9.315 66.435 9.365 66.565 ; + RECT 9.72 66.435 9.77 66.565 ; + RECT 11.025 66.435 11.075 66.565 ; + RECT 12.79 66.435 12.84 66.565 ; + RECT 14.33 64.475 14.38 64.605 ; + RECT 5.675 64.245 5.725 64.375 ; + RECT 6.065 64.245 6.115 64.375 ; + RECT 6.725 64.245 6.775 64.375 ; + RECT 8.42 64.245 8.47 64.375 ; + RECT 8.77 64.245 8.82 64.375 ; + RECT 11.555 64.245 11.605 64.375 ; + RECT 11.815 64.245 11.865 64.375 ; + RECT 12.52 64.245 12.57 64.375 ; + RECT 13.98 64.245 14.03 64.375 ; + RECT 14.33 64.015 14.38 64.145 ; + RECT 6.22 63.555 6.27 63.685 ; + RECT 7.5 63.555 7.55 63.685 ; + RECT 9.04 63.555 9.09 63.685 ; + RECT 9.315 63.555 9.365 63.685 ; + RECT 9.72 63.555 9.77 63.685 ; + RECT 11.025 63.555 11.075 63.685 ; + RECT 12.79 63.555 12.84 63.685 ; + RECT 14.33 61.595 14.38 61.725 ; + RECT 5.675 61.365 5.725 61.495 ; + RECT 6.065 61.365 6.115 61.495 ; + RECT 6.725 61.365 6.775 61.495 ; + RECT 8.42 61.365 8.47 61.495 ; + RECT 8.77 61.365 8.82 61.495 ; + RECT 11.555 61.365 11.605 61.495 ; + RECT 11.815 61.365 11.865 61.495 ; + RECT 12.52 61.365 12.57 61.495 ; + RECT 13.98 61.365 14.03 61.495 ; + RECT 14.33 61.135 14.38 61.265 ; + RECT 6.22 60.675 6.27 60.805 ; + RECT 7.5 60.675 7.55 60.805 ; + RECT 9.04 60.675 9.09 60.805 ; + RECT 9.315 60.675 9.365 60.805 ; + RECT 9.72 60.675 9.77 60.805 ; + RECT 11.025 60.675 11.075 60.805 ; + RECT 12.79 60.675 12.84 60.805 ; + RECT 14.33 58.715 14.38 58.845 ; + RECT 5.675 58.485 5.725 58.615 ; + RECT 6.065 58.485 6.115 58.615 ; + RECT 6.725 58.485 6.775 58.615 ; + RECT 8.42 58.485 8.47 58.615 ; + RECT 8.77 58.485 8.82 58.615 ; + RECT 11.555 58.485 11.605 58.615 ; + RECT 11.815 58.485 11.865 58.615 ; + RECT 12.52 58.485 12.57 58.615 ; + RECT 13.98 58.485 14.03 58.615 ; + RECT 14.33 58.255 14.38 58.385 ; + RECT 6.22 57.795 6.27 57.925 ; + RECT 7.5 57.795 7.55 57.925 ; + RECT 9.04 57.795 9.09 57.925 ; + RECT 9.315 57.795 9.365 57.925 ; + RECT 9.72 57.795 9.77 57.925 ; + RECT 11.025 57.795 11.075 57.925 ; + RECT 12.79 57.795 12.84 57.925 ; + RECT 14.33 55.835 14.38 55.965 ; + RECT 5.675 55.605 5.725 55.735 ; + RECT 6.065 55.605 6.115 55.735 ; + RECT 6.725 55.605 6.775 55.735 ; + RECT 8.42 55.605 8.47 55.735 ; + RECT 8.77 55.605 8.82 55.735 ; + RECT 11.555 55.605 11.605 55.735 ; + RECT 11.815 55.605 11.865 55.735 ; + RECT 12.52 55.605 12.57 55.735 ; + RECT 13.98 55.605 14.03 55.735 ; + RECT 14.33 55.375 14.38 55.505 ; + RECT 6.22 54.915 6.27 55.045 ; + RECT 7.5 54.915 7.55 55.045 ; + RECT 9.04 54.915 9.09 55.045 ; + RECT 9.315 54.915 9.365 55.045 ; + RECT 9.72 54.915 9.77 55.045 ; + RECT 11.025 54.915 11.075 55.045 ; + RECT 12.79 54.915 12.84 55.045 ; + RECT 14.33 52.955 14.38 53.085 ; + RECT 5.675 52.725 5.725 52.855 ; + RECT 6.065 52.725 6.115 52.855 ; + RECT 6.725 52.725 6.775 52.855 ; + RECT 8.42 52.725 8.47 52.855 ; + RECT 8.77 52.725 8.82 52.855 ; + RECT 11.555 52.725 11.605 52.855 ; + RECT 11.815 52.725 11.865 52.855 ; + RECT 12.52 52.725 12.57 52.855 ; + RECT 13.98 52.725 14.03 52.855 ; + RECT 14.33 52.495 14.38 52.625 ; + RECT 6.22 52.035 6.27 52.165 ; + RECT 7.5 52.035 7.55 52.165 ; + RECT 9.04 52.035 9.09 52.165 ; + RECT 9.315 52.035 9.365 52.165 ; + RECT 9.72 52.035 9.77 52.165 ; + RECT 11.025 52.035 11.075 52.165 ; + RECT 12.79 52.035 12.84 52.165 ; + RECT 14.33 50.075 14.38 50.205 ; + RECT 5.675 49.845 5.725 49.975 ; + RECT 6.065 49.845 6.115 49.975 ; + RECT 6.725 49.845 6.775 49.975 ; + RECT 8.42 49.845 8.47 49.975 ; + RECT 8.77 49.845 8.82 49.975 ; + RECT 11.555 49.845 11.605 49.975 ; + RECT 11.815 49.845 11.865 49.975 ; + RECT 12.52 49.845 12.57 49.975 ; + RECT 13.98 49.845 14.03 49.975 ; + RECT 14.33 49.615 14.38 49.745 ; + RECT 6.22 49.155 6.27 49.285 ; + RECT 7.5 49.155 7.55 49.285 ; + RECT 9.04 49.155 9.09 49.285 ; + RECT 9.315 49.155 9.365 49.285 ; + RECT 9.72 49.155 9.77 49.285 ; + RECT 11.025 49.155 11.075 49.285 ; + RECT 12.79 49.155 12.84 49.285 ; + RECT 14.33 47.195 14.38 47.325 ; + RECT 5.675 46.965 5.725 47.095 ; + RECT 6.065 46.965 6.115 47.095 ; + RECT 6.725 46.965 6.775 47.095 ; + RECT 8.42 46.965 8.47 47.095 ; + RECT 8.77 46.965 8.82 47.095 ; + RECT 11.555 46.965 11.605 47.095 ; + RECT 11.815 46.965 11.865 47.095 ; + RECT 12.52 46.965 12.57 47.095 ; + RECT 13.98 46.965 14.03 47.095 ; + RECT 14.33 46.735 14.38 46.865 ; + RECT 6.22 46.275 6.27 46.405 ; + RECT 7.5 46.275 7.55 46.405 ; + RECT 9.04 46.275 9.09 46.405 ; + RECT 9.315 46.275 9.365 46.405 ; + RECT 9.72 46.275 9.77 46.405 ; + RECT 11.025 46.275 11.075 46.405 ; + RECT 12.79 46.275 12.84 46.405 ; + RECT 14.33 44.315 14.38 44.445 ; + RECT 5.675 44.085 5.725 44.215 ; + RECT 6.065 44.085 6.115 44.215 ; + RECT 6.725 44.085 6.775 44.215 ; + RECT 8.42 44.085 8.47 44.215 ; + RECT 8.77 44.085 8.82 44.215 ; + RECT 11.555 44.085 11.605 44.215 ; + RECT 11.815 44.085 11.865 44.215 ; + RECT 12.52 44.085 12.57 44.215 ; + RECT 13.98 44.085 14.03 44.215 ; + RECT 14.33 43.855 14.38 43.985 ; + RECT 6.22 43.395 6.27 43.525 ; + RECT 7.5 43.395 7.55 43.525 ; + RECT 9.04 43.395 9.09 43.525 ; + RECT 9.315 43.395 9.365 43.525 ; + RECT 9.72 43.395 9.77 43.525 ; + RECT 11.025 43.395 11.075 43.525 ; + RECT 12.79 43.395 12.84 43.525 ; + RECT 14.33 41.435 14.38 41.565 ; + RECT 5.675 41.205 5.725 41.335 ; + RECT 6.065 41.205 6.115 41.335 ; + RECT 6.725 41.205 6.775 41.335 ; + RECT 8.42 41.205 8.47 41.335 ; + RECT 8.77 41.205 8.82 41.335 ; + RECT 11.555 41.205 11.605 41.335 ; + RECT 11.815 41.205 11.865 41.335 ; + RECT 12.52 41.205 12.57 41.335 ; + RECT 13.98 41.205 14.03 41.335 ; + RECT 14.33 170.575 14.38 170.705 ; + RECT 6.22 170.115 6.27 170.245 ; + RECT 7.5 170.115 7.55 170.245 ; + RECT 9.04 170.115 9.09 170.245 ; + RECT 9.315 170.115 9.365 170.245 ; + RECT 9.72 170.115 9.77 170.245 ; + RECT 11.025 170.115 11.075 170.245 ; + RECT 12.79 170.115 12.84 170.245 ; + RECT 14.33 168.155 14.38 168.285 ; + RECT 5.675 167.925 5.725 168.055 ; + RECT 6.065 167.925 6.115 168.055 ; + RECT 6.725 167.925 6.775 168.055 ; + RECT 8.42 167.925 8.47 168.055 ; + RECT 8.77 167.925 8.82 168.055 ; + RECT 11.555 167.925 11.605 168.055 ; + RECT 11.815 167.925 11.865 168.055 ; + RECT 12.52 167.925 12.57 168.055 ; + RECT 13.98 167.925 14.03 168.055 ; + RECT 14.33 40.975 14.38 41.105 ; + RECT 6.22 40.515 6.27 40.645 ; + RECT 7.5 40.515 7.55 40.645 ; + RECT 9.04 40.515 9.09 40.645 ; + RECT 9.315 40.515 9.365 40.645 ; + RECT 9.72 40.515 9.77 40.645 ; + RECT 11.025 40.515 11.075 40.645 ; + RECT 12.79 40.515 12.84 40.645 ; + RECT 14.33 38.555 14.38 38.685 ; + RECT 5.675 38.325 5.725 38.455 ; + RECT 6.065 38.325 6.115 38.455 ; + RECT 6.725 38.325 6.775 38.455 ; + RECT 8.42 38.325 8.47 38.455 ; + RECT 8.77 38.325 8.82 38.455 ; + RECT 11.555 38.325 11.605 38.455 ; + RECT 11.815 38.325 11.865 38.455 ; + RECT 12.52 38.325 12.57 38.455 ; + RECT 13.98 38.325 14.03 38.455 ; + RECT 14.33 38.095 14.38 38.225 ; + RECT 6.22 37.635 6.27 37.765 ; + RECT 7.5 37.635 7.55 37.765 ; + RECT 9.04 37.635 9.09 37.765 ; + RECT 9.315 37.635 9.365 37.765 ; + RECT 9.72 37.635 9.77 37.765 ; + RECT 11.025 37.635 11.075 37.765 ; + RECT 12.79 37.635 12.84 37.765 ; + RECT 14.33 35.675 14.38 35.805 ; + RECT 5.675 35.445 5.725 35.575 ; + RECT 6.065 35.445 6.115 35.575 ; + RECT 6.725 35.445 6.775 35.575 ; + RECT 8.42 35.445 8.47 35.575 ; + RECT 8.77 35.445 8.82 35.575 ; + RECT 11.555 35.445 11.605 35.575 ; + RECT 11.815 35.445 11.865 35.575 ; + RECT 12.52 35.445 12.57 35.575 ; + RECT 13.98 35.445 14.03 35.575 ; + RECT 14.33 35.215 14.38 35.345 ; + RECT 6.22 34.755 6.27 34.885 ; + RECT 7.5 34.755 7.55 34.885 ; + RECT 9.04 34.755 9.09 34.885 ; + RECT 9.315 34.755 9.365 34.885 ; + RECT 9.72 34.755 9.77 34.885 ; + RECT 11.025 34.755 11.075 34.885 ; + RECT 12.79 34.755 12.84 34.885 ; + RECT 14.33 32.795 14.38 32.925 ; + RECT 5.675 32.565 5.725 32.695 ; + RECT 6.065 32.565 6.115 32.695 ; + RECT 6.725 32.565 6.775 32.695 ; + RECT 8.42 32.565 8.47 32.695 ; + RECT 8.77 32.565 8.82 32.695 ; + RECT 11.555 32.565 11.605 32.695 ; + RECT 11.815 32.565 11.865 32.695 ; + RECT 12.52 32.565 12.57 32.695 ; + RECT 13.98 32.565 14.03 32.695 ; + RECT 14.33 32.335 14.38 32.465 ; + RECT 6.22 31.875 6.27 32.005 ; + RECT 7.5 31.875 7.55 32.005 ; + RECT 9.04 31.875 9.09 32.005 ; + RECT 9.315 31.875 9.365 32.005 ; + RECT 9.72 31.875 9.77 32.005 ; + RECT 11.025 31.875 11.075 32.005 ; + RECT 12.79 31.875 12.84 32.005 ; + RECT 14.33 29.915 14.38 30.045 ; + RECT 5.675 29.685 5.725 29.815 ; + RECT 6.065 29.685 6.115 29.815 ; + RECT 6.725 29.685 6.775 29.815 ; + RECT 8.42 29.685 8.47 29.815 ; + RECT 8.77 29.685 8.82 29.815 ; + RECT 11.555 29.685 11.605 29.815 ; + RECT 11.815 29.685 11.865 29.815 ; + RECT 12.52 29.685 12.57 29.815 ; + RECT 13.98 29.685 14.03 29.815 ; + RECT 14.33 29.455 14.38 29.585 ; + RECT 6.22 28.995 6.27 29.125 ; + RECT 7.5 28.995 7.55 29.125 ; + RECT 9.04 28.995 9.09 29.125 ; + RECT 9.315 28.995 9.365 29.125 ; + RECT 9.72 28.995 9.77 29.125 ; + RECT 11.025 28.995 11.075 29.125 ; + RECT 12.79 28.995 12.84 29.125 ; + RECT 14.33 27.035 14.38 27.165 ; + RECT 5.675 26.805 5.725 26.935 ; + RECT 6.065 26.805 6.115 26.935 ; + RECT 6.725 26.805 6.775 26.935 ; + RECT 8.42 26.805 8.47 26.935 ; + RECT 8.77 26.805 8.82 26.935 ; + RECT 11.555 26.805 11.605 26.935 ; + RECT 11.815 26.805 11.865 26.935 ; + RECT 12.52 26.805 12.57 26.935 ; + RECT 13.98 26.805 14.03 26.935 ; + RECT 14.33 26.575 14.38 26.705 ; + RECT 6.22 26.115 6.27 26.245 ; + RECT 7.5 26.115 7.55 26.245 ; + RECT 9.04 26.115 9.09 26.245 ; + RECT 9.315 26.115 9.365 26.245 ; + RECT 9.72 26.115 9.77 26.245 ; + RECT 11.025 26.115 11.075 26.245 ; + RECT 12.79 26.115 12.84 26.245 ; + RECT 14.33 24.155 14.38 24.285 ; + RECT 5.675 23.925 5.725 24.055 ; + RECT 6.065 23.925 6.115 24.055 ; + RECT 6.725 23.925 6.775 24.055 ; + RECT 8.42 23.925 8.47 24.055 ; + RECT 8.77 23.925 8.82 24.055 ; + RECT 11.555 23.925 11.605 24.055 ; + RECT 11.815 23.925 11.865 24.055 ; + RECT 12.52 23.925 12.57 24.055 ; + RECT 13.98 23.925 14.03 24.055 ; + RECT 14.33 23.695 14.38 23.825 ; + RECT 6.22 23.235 6.27 23.365 ; + RECT 7.5 23.235 7.55 23.365 ; + RECT 9.04 23.235 9.09 23.365 ; + RECT 9.315 23.235 9.365 23.365 ; + RECT 9.72 23.235 9.77 23.365 ; + RECT 11.025 23.235 11.075 23.365 ; + RECT 12.79 23.235 12.84 23.365 ; + RECT 14.33 21.275 14.38 21.405 ; + RECT 5.675 21.045 5.725 21.175 ; + RECT 6.065 21.045 6.115 21.175 ; + RECT 6.725 21.045 6.775 21.175 ; + RECT 8.42 21.045 8.47 21.175 ; + RECT 8.77 21.045 8.82 21.175 ; + RECT 11.555 21.045 11.605 21.175 ; + RECT 11.815 21.045 11.865 21.175 ; + RECT 12.52 21.045 12.57 21.175 ; + RECT 13.98 21.045 14.03 21.175 ; + RECT 14.33 20.815 14.38 20.945 ; + RECT 6.22 20.355 6.27 20.485 ; + RECT 7.5 20.355 7.55 20.485 ; + RECT 9.04 20.355 9.09 20.485 ; + RECT 9.315 20.355 9.365 20.485 ; + RECT 9.72 20.355 9.77 20.485 ; + RECT 11.025 20.355 11.075 20.485 ; + RECT 12.79 20.355 12.84 20.485 ; + RECT 14.33 18.395 14.38 18.525 ; + RECT 5.675 18.165 5.725 18.295 ; + RECT 6.065 18.165 6.115 18.295 ; + RECT 6.725 18.165 6.775 18.295 ; + RECT 8.42 18.165 8.47 18.295 ; + RECT 8.77 18.165 8.82 18.295 ; + RECT 11.555 18.165 11.605 18.295 ; + RECT 11.815 18.165 11.865 18.295 ; + RECT 12.52 18.165 12.57 18.295 ; + RECT 13.98 18.165 14.03 18.295 ; + RECT 14.33 17.935 14.38 18.065 ; + RECT 6.22 17.475 6.27 17.605 ; + RECT 7.5 17.475 7.55 17.605 ; + RECT 9.04 17.475 9.09 17.605 ; + RECT 9.315 17.475 9.365 17.605 ; + RECT 9.72 17.475 9.77 17.605 ; + RECT 11.025 17.475 11.075 17.605 ; + RECT 12.79 17.475 12.84 17.605 ; + RECT 14.33 15.515 14.38 15.645 ; + RECT 5.675 15.285 5.725 15.415 ; + RECT 6.065 15.285 6.115 15.415 ; + RECT 6.725 15.285 6.775 15.415 ; + RECT 8.42 15.285 8.47 15.415 ; + RECT 8.77 15.285 8.82 15.415 ; + RECT 11.555 15.285 11.605 15.415 ; + RECT 11.815 15.285 11.865 15.415 ; + RECT 12.52 15.285 12.57 15.415 ; + RECT 13.98 15.285 14.03 15.415 ; + RECT 14.33 15.055 14.38 15.185 ; + RECT 6.22 14.595 6.27 14.725 ; + RECT 7.5 14.595 7.55 14.725 ; + RECT 9.04 14.595 9.09 14.725 ; + RECT 9.315 14.595 9.365 14.725 ; + RECT 9.72 14.595 9.77 14.725 ; + RECT 11.025 14.595 11.075 14.725 ; + RECT 12.79 14.595 12.84 14.725 ; + RECT 14.33 12.635 14.38 12.765 ; + RECT 5.675 12.405 5.725 12.535 ; + RECT 6.065 12.405 6.115 12.535 ; + RECT 6.725 12.405 6.775 12.535 ; + RECT 8.42 12.405 8.47 12.535 ; + RECT 8.77 12.405 8.82 12.535 ; + RECT 11.555 12.405 11.605 12.535 ; + RECT 11.815 12.405 11.865 12.535 ; + RECT 12.52 12.405 12.57 12.535 ; + RECT 13.98 12.405 14.03 12.535 ; + RECT 14.33 167.695 14.38 167.825 ; + RECT 6.22 167.235 6.27 167.365 ; + RECT 7.5 167.235 7.55 167.365 ; + RECT 9.04 167.235 9.09 167.365 ; + RECT 9.315 167.235 9.365 167.365 ; + RECT 9.72 167.235 9.77 167.365 ; + RECT 11.025 167.235 11.075 167.365 ; + RECT 12.79 167.235 12.84 167.365 ; + RECT 14.33 165.275 14.38 165.405 ; + RECT 5.675 165.045 5.725 165.175 ; + RECT 6.065 165.045 6.115 165.175 ; + RECT 6.725 165.045 6.775 165.175 ; + RECT 8.42 165.045 8.47 165.175 ; + RECT 8.77 165.045 8.82 165.175 ; + RECT 11.555 165.045 11.605 165.175 ; + RECT 11.815 165.045 11.865 165.175 ; + RECT 12.52 165.045 12.57 165.175 ; + RECT 13.98 165.045 14.03 165.175 ; + RECT 14.33 12.175 14.38 12.305 ; + RECT 6.22 11.715 6.27 11.845 ; + RECT 7.5 11.715 7.55 11.845 ; + RECT 9.04 11.715 9.09 11.845 ; + RECT 9.315 11.715 9.365 11.845 ; + RECT 9.72 11.715 9.77 11.845 ; + RECT 11.025 11.715 11.075 11.845 ; + RECT 12.79 11.715 12.84 11.845 ; + RECT 14.33 9.755 14.38 9.885 ; + RECT 5.675 9.525 5.725 9.655 ; + RECT 6.065 9.525 6.115 9.655 ; + RECT 6.725 9.525 6.775 9.655 ; + RECT 8.42 9.525 8.47 9.655 ; + RECT 8.77 9.525 8.82 9.655 ; + RECT 11.555 9.525 11.605 9.655 ; + RECT 11.815 9.525 11.865 9.655 ; + RECT 12.52 9.525 12.57 9.655 ; + RECT 13.98 9.525 14.03 9.655 ; + RECT 14.33 9.295 14.38 9.425 ; + RECT 6.22 8.835 6.27 8.965 ; + RECT 7.5 8.835 7.55 8.965 ; + RECT 9.04 8.835 9.09 8.965 ; + RECT 9.315 8.835 9.365 8.965 ; + RECT 9.72 8.835 9.77 8.965 ; + RECT 11.025 8.835 11.075 8.965 ; + RECT 12.79 8.835 12.84 8.965 ; + RECT 14.33 6.875 14.38 7.005 ; + RECT 5.675 6.645 5.725 6.775 ; + RECT 6.065 6.645 6.115 6.775 ; + RECT 6.725 6.645 6.775 6.775 ; + RECT 8.42 6.645 8.47 6.775 ; + RECT 8.77 6.645 8.82 6.775 ; + RECT 11.555 6.645 11.605 6.775 ; + RECT 11.815 6.645 11.865 6.775 ; + RECT 12.52 6.645 12.57 6.775 ; + RECT 13.98 6.645 14.03 6.775 ; + RECT 14.33 6.415 14.38 6.545 ; + RECT 6.22 5.955 6.27 6.085 ; + RECT 7.5 5.955 7.55 6.085 ; + RECT 9.04 5.955 9.09 6.085 ; + RECT 9.315 5.955 9.365 6.085 ; + RECT 9.72 5.955 9.77 6.085 ; + RECT 11.025 5.955 11.075 6.085 ; + RECT 12.79 5.955 12.84 6.085 ; + RECT 14.33 3.995 14.38 4.125 ; + RECT 5.675 3.765 5.725 3.895 ; + RECT 6.065 3.765 6.115 3.895 ; + RECT 6.725 3.765 6.775 3.895 ; + RECT 8.42 3.765 8.47 3.895 ; + RECT 8.77 3.765 8.82 3.895 ; + RECT 11.555 3.765 11.605 3.895 ; + RECT 11.815 3.765 11.865 3.895 ; + RECT 12.52 3.765 12.57 3.895 ; + RECT 13.98 3.765 14.03 3.895 ; + RECT 14.33 164.815 14.38 164.945 ; + RECT 6.22 164.355 6.27 164.485 ; + RECT 7.5 164.355 7.55 164.485 ; + RECT 9.04 164.355 9.09 164.485 ; + RECT 9.315 164.355 9.365 164.485 ; + RECT 9.72 164.355 9.77 164.485 ; + RECT 11.025 164.355 11.075 164.485 ; + RECT 12.79 164.355 12.84 164.485 ; + RECT 14.33 162.395 14.38 162.525 ; + RECT 5.675 162.165 5.725 162.295 ; + RECT 6.065 162.165 6.115 162.295 ; + RECT 6.725 162.165 6.775 162.295 ; + RECT 8.42 162.165 8.47 162.295 ; + RECT 8.77 162.165 8.82 162.295 ; + RECT 11.555 162.165 11.605 162.295 ; + RECT 11.815 162.165 11.865 162.295 ; + RECT 12.52 162.165 12.57 162.295 ; + RECT 13.98 162.165 14.03 162.295 ; + RECT 14.33 161.935 14.38 162.065 ; + RECT 6.22 161.475 6.27 161.605 ; + RECT 7.5 161.475 7.55 161.605 ; + RECT 9.04 161.475 9.09 161.605 ; + RECT 9.315 161.475 9.365 161.605 ; + RECT 9.72 161.475 9.77 161.605 ; + RECT 11.025 161.475 11.075 161.605 ; + RECT 12.79 161.475 12.84 161.605 ; + RECT 14.33 159.515 14.38 159.645 ; + RECT 5.675 159.285 5.725 159.415 ; + RECT 6.065 159.285 6.115 159.415 ; + RECT 6.725 159.285 6.775 159.415 ; + RECT 8.42 159.285 8.47 159.415 ; + RECT 8.77 159.285 8.82 159.415 ; + RECT 11.555 159.285 11.605 159.415 ; + RECT 11.815 159.285 11.865 159.415 ; + RECT 12.52 159.285 12.57 159.415 ; + RECT 13.98 159.285 14.03 159.415 ; + RECT 14.33 159.055 14.38 159.185 ; + RECT 6.22 158.595 6.27 158.725 ; + RECT 7.5 158.595 7.55 158.725 ; + RECT 9.04 158.595 9.09 158.725 ; + RECT 9.315 158.595 9.365 158.725 ; + RECT 9.72 158.595 9.77 158.725 ; + RECT 11.025 158.595 11.075 158.725 ; + RECT 12.79 158.595 12.84 158.725 ; + RECT 14.33 156.635 14.38 156.765 ; + RECT 5.675 156.405 5.725 156.535 ; + RECT 6.065 156.405 6.115 156.535 ; + RECT 6.725 156.405 6.775 156.535 ; + RECT 8.42 156.405 8.47 156.535 ; + RECT 8.77 156.405 8.82 156.535 ; + RECT 11.555 156.405 11.605 156.535 ; + RECT 11.815 156.405 11.865 156.535 ; + RECT 12.52 156.405 12.57 156.535 ; + RECT 13.98 156.405 14.03 156.535 ; + RECT 14.33 3.535 14.38 3.665 ; + RECT 6.22 3.075 6.27 3.205 ; + RECT 7.5 3.075 7.55 3.205 ; + RECT 9.04 3.075 9.09 3.205 ; + RECT 9.315 3.075 9.365 3.205 ; + RECT 9.72 3.075 9.77 3.205 ; + RECT 11.025 3.075 11.075 3.205 ; + RECT 12.79 3.075 12.84 3.205 ; + RECT 14.33 1.115 14.38 1.245 ; + RECT 5.675 0.885 5.725 1.015 ; + RECT 6.065 0.885 6.115 1.015 ; + RECT 6.725 0.885 6.775 1.015 ; + RECT 8.42 0.885 8.47 1.015 ; + RECT 8.77 0.885 8.82 1.015 ; + RECT 11.555 0.885 11.605 1.015 ; + RECT 11.815 0.885 11.865 1.015 ; + RECT 12.52 0.885 12.57 1.015 ; + RECT 13.98 0.885 14.03 1.015 ; + RECT 14.33 184.975 14.38 185.105 ; + RECT 6.22 184.515 6.27 184.645 ; + RECT 7.5 184.515 7.55 184.645 ; + RECT 9.04 184.515 9.09 184.645 ; + RECT 9.315 184.515 9.365 184.645 ; + RECT 9.72 184.515 9.77 184.645 ; + RECT 11.025 184.515 11.075 184.645 ; + RECT 12.79 184.515 12.84 184.645 ; + RECT 14.33 182.555 14.38 182.685 ; + RECT 5.675 182.325 5.725 182.455 ; + RECT 6.065 182.325 6.115 182.455 ; + RECT 6.725 182.325 6.775 182.455 ; + RECT 8.42 182.325 8.47 182.455 ; + RECT 8.77 182.325 8.82 182.455 ; + RECT 11.555 182.325 11.605 182.455 ; + RECT 11.815 182.325 11.865 182.455 ; + RECT 12.52 182.325 12.57 182.455 ; + RECT 13.98 182.325 14.03 182.455 ; + RECT 13.98 0.195 14.03 0.325 ; + RECT 3.06 0.655 3.11 0.785 ; + RECT 1.57 0.195 1.62 0.325 ; + RECT 2.485 0.195 2.665 0.325 ; + RECT 3.84 0.195 3.89 0.325 ; + RECT 7.19 0.195 7.24 0.325 ; + RECT 14.14 0.195 14.19 0.325 ; + RECT 13.8 0.425 13.85 0.555 ; + RECT 8.56 0.655 8.61 0.785 ; + RECT 10.27 0.655 10.32 0.785 ; + RECT 0.435 0.655 0.485 0.785 ; + RECT 0.62 0.195 0.67 0.325 ; + RECT 3.65 0.195 3.7 0.325 ; + RECT 2.18 0.655 2.23 0.785 ; + RECT 0.9 179.445 0.95 179.575 ; + RECT 0.9 153.525 0.95 153.655 ; + RECT 0.9 150.645 0.95 150.775 ; + RECT 0.9 147.765 0.95 147.895 ; + RECT 0.9 144.885 0.95 145.015 ; + RECT 0.9 142.005 0.95 142.135 ; + RECT 0.9 139.125 0.95 139.255 ; + RECT 0.9 136.245 0.95 136.375 ; + RECT 0.9 133.365 0.95 133.495 ; + RECT 0.9 130.485 0.95 130.615 ; + RECT 0.9 127.605 0.95 127.735 ; + RECT 0.9 176.565 0.95 176.695 ; + RECT 0.9 124.725 0.95 124.855 ; + RECT 0.9 121.845 0.95 121.975 ; + RECT 0.9 118.965 0.95 119.095 ; + RECT 0.9 116.085 0.95 116.215 ; + RECT 0.9 113.205 0.95 113.335 ; + RECT 0.9 110.325 0.95 110.455 ; + RECT 0.9 107.445 0.95 107.575 ; + RECT 0.9 104.565 0.95 104.695 ; + RECT 0.9 101.685 0.95 101.815 ; + RECT 0.9 98.805 0.95 98.935 ; + RECT 0.9 173.685 0.95 173.815 ; + RECT 0.9 95.925 0.95 96.055 ; + RECT 0.9 93.045 0.95 93.175 ; + RECT 0.9 90.165 0.95 90.295 ; + RECT 0.9 87.285 0.95 87.415 ; + RECT 0.9 84.405 0.95 84.535 ; + RECT 0.9 81.525 0.95 81.655 ; + RECT 0.9 78.645 0.95 78.775 ; + RECT 0.9 75.765 0.95 75.895 ; + RECT 0.9 72.885 0.95 73.015 ; + RECT 0.9 70.005 0.95 70.135 ; + RECT 0.9 170.805 0.95 170.935 ; + RECT 0.9 67.125 0.95 67.255 ; + RECT 0.9 64.245 0.95 64.375 ; + RECT 0.9 61.365 0.95 61.495 ; + RECT 0.9 58.485 0.95 58.615 ; + RECT 0.9 55.605 0.95 55.735 ; + RECT 0.9 52.725 0.95 52.855 ; + RECT 0.9 49.845 0.95 49.975 ; + RECT 0.9 46.965 0.95 47.095 ; + RECT 0.9 44.085 0.95 44.215 ; + RECT 0.9 41.205 0.95 41.335 ; + RECT 0.9 167.925 0.95 168.055 ; + RECT 0.9 38.325 0.95 38.455 ; + RECT 0.9 35.445 0.95 35.575 ; + RECT 0.9 32.565 0.95 32.695 ; + RECT 0.9 29.685 0.95 29.815 ; + RECT 0.9 26.805 0.95 26.935 ; + RECT 0.9 23.925 0.95 24.055 ; + RECT 0.9 21.045 0.95 21.175 ; + RECT 0.9 18.165 0.95 18.295 ; + RECT 0.9 15.285 0.95 15.415 ; + RECT 0.9 12.405 0.95 12.535 ; + RECT 0.9 165.045 0.95 165.175 ; + RECT 0.9 9.525 0.95 9.655 ; + RECT 0.9 6.645 0.95 6.775 ; + RECT 0.9 3.765 0.95 3.895 ; + RECT 0.9 162.165 0.95 162.295 ; + RECT 0.9 159.285 0.95 159.415 ; + RECT 0.9 156.405 0.95 156.535 ; + RECT 0.9 0.885 0.95 1.015 ; + RECT 0.9 182.325 0.95 182.455 ; + RECT 2.18 184.975 2.23 185.105 ; + RECT 2.18 182.555 2.23 182.685 ; + RECT 2.18 156.175 2.23 156.305 ; + RECT 2.18 153.755 2.23 153.885 ; + RECT 2.18 153.295 2.23 153.425 ; + RECT 2.18 150.875 2.23 151.005 ; + RECT 2.18 150.415 2.23 150.545 ; + RECT 2.18 147.995 2.23 148.125 ; + RECT 2.18 147.535 2.23 147.665 ; + RECT 2.18 145.115 2.23 145.245 ; + RECT 2.18 144.655 2.23 144.785 ; + RECT 2.18 142.235 2.23 142.365 ; + RECT 2.18 141.775 2.23 141.905 ; + RECT 2.18 139.355 2.23 139.485 ; + RECT 2.18 138.895 2.23 139.025 ; + RECT 2.18 136.475 2.23 136.605 ; + RECT 2.18 136.015 2.23 136.145 ; + RECT 2.18 133.595 2.23 133.725 ; + RECT 2.18 133.135 2.23 133.265 ; + RECT 2.18 130.715 2.23 130.845 ; + RECT 2.18 130.255 2.23 130.385 ; + RECT 2.18 127.835 2.23 127.965 ; + RECT 2.18 182.095 2.23 182.225 ; + RECT 2.18 179.675 2.23 179.805 ; + RECT 2.18 127.375 2.23 127.505 ; + RECT 2.18 124.955 2.23 125.085 ; + RECT 2.18 124.495 2.23 124.625 ; + RECT 2.18 122.075 2.23 122.205 ; + RECT 2.18 121.615 2.23 121.745 ; + RECT 2.18 119.195 2.23 119.325 ; + RECT 2.18 118.735 2.23 118.865 ; + RECT 2.18 116.315 2.23 116.445 ; + RECT 2.18 115.855 2.23 115.985 ; + RECT 2.18 113.435 2.23 113.565 ; + RECT 2.18 112.975 2.23 113.105 ; + RECT 2.18 110.555 2.23 110.685 ; + RECT 2.18 110.095 2.23 110.225 ; + RECT 2.18 107.675 2.23 107.805 ; + RECT 2.18 107.215 2.23 107.345 ; + RECT 2.18 104.795 2.23 104.925 ; + RECT 2.18 104.335 2.23 104.465 ; + RECT 2.18 101.915 2.23 102.045 ; + RECT 2.18 101.455 2.23 101.585 ; + RECT 2.18 99.035 2.23 99.165 ; + RECT 2.18 179.215 2.23 179.345 ; + RECT 2.18 176.795 2.23 176.925 ; + RECT 2.18 98.575 2.23 98.705 ; + RECT 2.18 96.155 2.23 96.285 ; + RECT 2.18 95.695 2.23 95.825 ; + RECT 2.18 93.275 2.23 93.405 ; + RECT 2.18 92.815 2.23 92.945 ; + RECT 2.18 90.395 2.23 90.525 ; + RECT 2.18 89.935 2.23 90.065 ; + RECT 2.18 87.515 2.23 87.645 ; + RECT 2.18 87.055 2.23 87.185 ; + RECT 2.18 84.635 2.23 84.765 ; + RECT 2.18 84.175 2.23 84.305 ; + RECT 2.18 81.755 2.23 81.885 ; + RECT 2.18 81.295 2.23 81.425 ; + RECT 2.18 78.875 2.23 79.005 ; + RECT 2.18 78.415 2.23 78.545 ; + RECT 2.18 75.995 2.23 76.125 ; + RECT 2.18 75.535 2.23 75.665 ; + RECT 2.18 73.115 2.23 73.245 ; + RECT 2.18 72.655 2.23 72.785 ; + RECT 2.18 70.235 2.23 70.365 ; + RECT 2.18 176.335 2.23 176.465 ; + RECT 2.18 173.915 2.23 174.045 ; + RECT 2.18 69.775 2.23 69.905 ; + RECT 2.18 67.355 2.23 67.485 ; + RECT 2.18 66.895 2.23 67.025 ; + RECT 2.18 64.475 2.23 64.605 ; + RECT 2.18 64.015 2.23 64.145 ; + RECT 2.18 61.595 2.23 61.725 ; + RECT 2.18 61.135 2.23 61.265 ; + RECT 2.18 58.715 2.23 58.845 ; + RECT 2.18 58.255 2.23 58.385 ; + RECT 2.18 55.835 2.23 55.965 ; + RECT 2.18 55.375 2.23 55.505 ; + RECT 2.18 52.955 2.23 53.085 ; + RECT 2.18 52.495 2.23 52.625 ; + RECT 2.18 50.075 2.23 50.205 ; + RECT 2.18 49.615 2.23 49.745 ; + RECT 2.18 47.195 2.23 47.325 ; + RECT 2.18 46.735 2.23 46.865 ; + RECT 2.18 44.315 2.23 44.445 ; + RECT 2.18 43.855 2.23 43.985 ; + RECT 2.18 41.435 2.23 41.565 ; + RECT 2.18 173.455 2.23 173.585 ; + RECT 2.18 171.035 2.23 171.165 ; + RECT 2.18 40.975 2.23 41.105 ; + RECT 2.18 38.555 2.23 38.685 ; + RECT 2.18 38.095 2.23 38.225 ; + RECT 2.18 35.675 2.23 35.805 ; + RECT 2.18 35.215 2.23 35.345 ; + RECT 2.18 32.795 2.23 32.925 ; + RECT 2.18 32.335 2.23 32.465 ; + RECT 2.18 29.915 2.23 30.045 ; + RECT 2.18 29.455 2.23 29.585 ; + RECT 2.18 27.035 2.23 27.165 ; + RECT 2.18 26.575 2.23 26.705 ; + RECT 2.18 24.155 2.23 24.285 ; + RECT 2.18 23.695 2.23 23.825 ; + RECT 2.18 21.275 2.23 21.405 ; + RECT 2.18 20.815 2.23 20.945 ; + RECT 2.18 18.395 2.23 18.525 ; + RECT 2.18 17.935 2.23 18.065 ; + RECT 2.18 15.515 2.23 15.645 ; + RECT 2.18 15.055 2.23 15.185 ; + RECT 2.18 12.635 2.23 12.765 ; + RECT 2.18 170.575 2.23 170.705 ; + RECT 2.18 168.155 2.23 168.285 ; + RECT 2.18 12.175 2.23 12.305 ; + RECT 2.18 9.755 2.23 9.885 ; + RECT 2.18 9.295 2.23 9.425 ; + RECT 2.18 6.875 2.23 7.005 ; + RECT 2.18 6.415 2.23 6.545 ; + RECT 2.18 3.995 2.23 4.125 ; + RECT 2.18 3.535 2.23 3.665 ; + RECT 2.18 1.115 2.23 1.245 ; + RECT 2.18 167.695 2.23 167.825 ; + RECT 2.18 165.275 2.23 165.405 ; + RECT 2.18 164.815 2.23 164.945 ; + RECT 2.18 162.395 2.23 162.525 ; + RECT 2.18 161.935 2.23 162.065 ; + RECT 2.18 159.515 2.23 159.645 ; + RECT 2.18 159.055 2.23 159.185 ; + RECT 2.18 156.635 2.23 156.765 ; + RECT 1.38 184.975 1.43 185.105 ; + RECT 4.51 184.975 4.56 185.105 ; + RECT 3.06 184.515 3.11 184.645 ; + RECT 1.405 182.555 1.455 182.685 ; + RECT 4.51 182.555 4.56 182.685 ; + RECT 1.38 156.175 1.43 156.305 ; + RECT 4.51 156.175 4.56 156.305 ; + RECT 3.06 155.715 3.11 155.845 ; + RECT 1.405 153.755 1.455 153.885 ; + RECT 4.51 153.755 4.56 153.885 ; + RECT 1.38 153.295 1.43 153.425 ; + RECT 4.51 153.295 4.56 153.425 ; + RECT 3.06 152.835 3.11 152.965 ; + RECT 1.405 150.875 1.455 151.005 ; + RECT 4.51 150.875 4.56 151.005 ; + RECT 1.38 150.415 1.43 150.545 ; + RECT 4.51 150.415 4.56 150.545 ; + RECT 3.06 149.955 3.11 150.085 ; + RECT 1.405 147.995 1.455 148.125 ; + RECT 4.51 147.995 4.56 148.125 ; + RECT 1.38 147.535 1.43 147.665 ; + RECT 4.51 147.535 4.56 147.665 ; + RECT 3.06 147.075 3.11 147.205 ; + RECT 1.405 145.115 1.455 145.245 ; + RECT 4.51 145.115 4.56 145.245 ; + RECT 1.38 144.655 1.43 144.785 ; + RECT 4.51 144.655 4.56 144.785 ; + RECT 3.06 144.195 3.11 144.325 ; + RECT 1.405 142.235 1.455 142.365 ; + RECT 4.51 142.235 4.56 142.365 ; + RECT 1.38 141.775 1.43 141.905 ; + RECT 4.51 141.775 4.56 141.905 ; + RECT 3.06 141.315 3.11 141.445 ; + RECT 1.405 139.355 1.455 139.485 ; + RECT 4.51 139.355 4.56 139.485 ; + RECT 1.38 138.895 1.43 139.025 ; + RECT 4.51 138.895 4.56 139.025 ; + RECT 3.06 138.435 3.11 138.565 ; + RECT 1.405 136.475 1.455 136.605 ; + RECT 4.51 136.475 4.56 136.605 ; + RECT 1.38 136.015 1.43 136.145 ; + RECT 4.51 136.015 4.56 136.145 ; + RECT 3.06 135.555 3.11 135.685 ; + RECT 1.405 133.595 1.455 133.725 ; + RECT 4.51 133.595 4.56 133.725 ; + RECT 1.38 133.135 1.43 133.265 ; + RECT 4.51 133.135 4.56 133.265 ; + RECT 3.06 132.675 3.11 132.805 ; + RECT 1.405 130.715 1.455 130.845 ; + RECT 4.51 130.715 4.56 130.845 ; + RECT 1.38 130.255 1.43 130.385 ; + RECT 4.51 130.255 4.56 130.385 ; + RECT 3.06 129.795 3.11 129.925 ; + RECT 1.405 127.835 1.455 127.965 ; + RECT 4.51 127.835 4.56 127.965 ; + RECT 1.38 182.095 1.43 182.225 ; + RECT 4.51 182.095 4.56 182.225 ; + RECT 3.06 181.635 3.11 181.765 ; + RECT 1.405 179.675 1.455 179.805 ; + RECT 4.51 179.675 4.56 179.805 ; + RECT 1.38 127.375 1.43 127.505 ; + RECT 4.51 127.375 4.56 127.505 ; + RECT 3.06 126.915 3.11 127.045 ; + RECT 1.405 124.955 1.455 125.085 ; + RECT 4.51 124.955 4.56 125.085 ; + RECT 1.38 124.495 1.43 124.625 ; + RECT 4.51 124.495 4.56 124.625 ; + RECT 3.06 124.035 3.11 124.165 ; + RECT 1.405 122.075 1.455 122.205 ; + RECT 4.51 122.075 4.56 122.205 ; + RECT 1.38 121.615 1.43 121.745 ; + RECT 4.51 121.615 4.56 121.745 ; + RECT 3.06 121.155 3.11 121.285 ; + RECT 1.405 119.195 1.455 119.325 ; + RECT 4.51 119.195 4.56 119.325 ; + RECT 1.38 118.735 1.43 118.865 ; + RECT 4.51 118.735 4.56 118.865 ; + RECT 3.06 118.275 3.11 118.405 ; + RECT 1.405 116.315 1.455 116.445 ; + RECT 4.51 116.315 4.56 116.445 ; + RECT 1.38 115.855 1.43 115.985 ; + RECT 4.51 115.855 4.56 115.985 ; + RECT 3.06 115.395 3.11 115.525 ; + RECT 1.405 113.435 1.455 113.565 ; + RECT 4.51 113.435 4.56 113.565 ; + RECT 1.38 112.975 1.43 113.105 ; + RECT 4.51 112.975 4.56 113.105 ; + RECT 3.06 112.515 3.11 112.645 ; + RECT 1.405 110.555 1.455 110.685 ; + RECT 4.51 110.555 4.56 110.685 ; + RECT 1.38 110.095 1.43 110.225 ; + RECT 4.51 110.095 4.56 110.225 ; + RECT 3.06 109.635 3.11 109.765 ; + RECT 1.405 107.675 1.455 107.805 ; + RECT 4.51 107.675 4.56 107.805 ; + RECT 1.38 107.215 1.43 107.345 ; + RECT 4.51 107.215 4.56 107.345 ; + RECT 3.06 106.755 3.11 106.885 ; + RECT 1.405 104.795 1.455 104.925 ; + RECT 4.51 104.795 4.56 104.925 ; + RECT 1.38 104.335 1.43 104.465 ; + RECT 4.51 104.335 4.56 104.465 ; + RECT 3.06 103.875 3.11 104.005 ; + RECT 1.405 101.915 1.455 102.045 ; + RECT 4.51 101.915 4.56 102.045 ; + RECT 1.38 101.455 1.43 101.585 ; + RECT 4.51 101.455 4.56 101.585 ; + RECT 3.06 100.995 3.11 101.125 ; + RECT 1.405 99.035 1.455 99.165 ; + RECT 4.51 99.035 4.56 99.165 ; + RECT 1.38 179.215 1.43 179.345 ; + RECT 4.51 179.215 4.56 179.345 ; + RECT 3.06 178.755 3.11 178.885 ; + RECT 1.405 176.795 1.455 176.925 ; + RECT 4.51 176.795 4.56 176.925 ; + RECT 1.38 98.575 1.43 98.705 ; + RECT 4.51 98.575 4.56 98.705 ; + RECT 3.06 98.115 3.11 98.245 ; + RECT 1.405 96.155 1.455 96.285 ; + RECT 4.51 96.155 4.56 96.285 ; + RECT 1.38 95.695 1.43 95.825 ; + RECT 4.51 95.695 4.56 95.825 ; + RECT 3.06 95.235 3.11 95.365 ; + RECT 1.405 93.275 1.455 93.405 ; + RECT 4.51 93.275 4.56 93.405 ; + RECT 1.38 92.815 1.43 92.945 ; + RECT 4.51 92.815 4.56 92.945 ; + RECT 3.06 92.355 3.11 92.485 ; + RECT 1.405 90.395 1.455 90.525 ; + RECT 4.51 90.395 4.56 90.525 ; + RECT 1.38 89.935 1.43 90.065 ; + RECT 4.51 89.935 4.56 90.065 ; + RECT 3.06 89.475 3.11 89.605 ; + RECT 1.405 87.515 1.455 87.645 ; + RECT 4.51 87.515 4.56 87.645 ; + RECT 1.38 87.055 1.43 87.185 ; + RECT 4.51 87.055 4.56 87.185 ; + RECT 3.06 86.595 3.11 86.725 ; + RECT 1.405 84.635 1.455 84.765 ; + RECT 4.51 84.635 4.56 84.765 ; + RECT 1.38 84.175 1.43 84.305 ; + RECT 4.51 84.175 4.56 84.305 ; + RECT 3.06 83.715 3.11 83.845 ; + RECT 1.405 81.755 1.455 81.885 ; + RECT 4.51 81.755 4.56 81.885 ; + RECT 1.38 81.295 1.43 81.425 ; + RECT 4.51 81.295 4.56 81.425 ; + RECT 3.06 80.835 3.11 80.965 ; + RECT 1.405 78.875 1.455 79.005 ; + RECT 4.51 78.875 4.56 79.005 ; + RECT 1.38 78.415 1.43 78.545 ; + RECT 4.51 78.415 4.56 78.545 ; + RECT 3.06 77.955 3.11 78.085 ; + RECT 1.405 75.995 1.455 76.125 ; + RECT 4.51 75.995 4.56 76.125 ; + RECT 1.38 75.535 1.43 75.665 ; + RECT 4.51 75.535 4.56 75.665 ; + RECT 3.06 75.075 3.11 75.205 ; + RECT 1.405 73.115 1.455 73.245 ; + RECT 4.51 73.115 4.56 73.245 ; + RECT 1.38 72.655 1.43 72.785 ; + RECT 4.51 72.655 4.56 72.785 ; + RECT 3.06 72.195 3.11 72.325 ; + RECT 1.405 70.235 1.455 70.365 ; + RECT 4.51 70.235 4.56 70.365 ; + RECT 1.38 176.335 1.43 176.465 ; + RECT 4.51 176.335 4.56 176.465 ; + RECT 3.06 175.875 3.11 176.005 ; + RECT 1.405 173.915 1.455 174.045 ; + RECT 4.51 173.915 4.56 174.045 ; + RECT 1.38 69.775 1.43 69.905 ; + RECT 4.51 69.775 4.56 69.905 ; + RECT 3.06 69.315 3.11 69.445 ; + RECT 1.405 67.355 1.455 67.485 ; + RECT 4.51 67.355 4.56 67.485 ; + RECT 1.38 66.895 1.43 67.025 ; + RECT 4.51 66.895 4.56 67.025 ; + RECT 3.06 66.435 3.11 66.565 ; + RECT 1.405 64.475 1.455 64.605 ; + RECT 4.51 64.475 4.56 64.605 ; + RECT 1.38 64.015 1.43 64.145 ; + RECT 4.51 64.015 4.56 64.145 ; + RECT 3.06 63.555 3.11 63.685 ; + RECT 1.405 61.595 1.455 61.725 ; + RECT 4.51 61.595 4.56 61.725 ; + RECT 1.38 61.135 1.43 61.265 ; + RECT 4.51 61.135 4.56 61.265 ; + RECT 3.06 60.675 3.11 60.805 ; + RECT 1.405 58.715 1.455 58.845 ; + RECT 4.51 58.715 4.56 58.845 ; + RECT 1.38 58.255 1.43 58.385 ; + RECT 4.51 58.255 4.56 58.385 ; + RECT 3.06 57.795 3.11 57.925 ; + RECT 1.405 55.835 1.455 55.965 ; + RECT 4.51 55.835 4.56 55.965 ; + RECT 1.38 55.375 1.43 55.505 ; + RECT 4.51 55.375 4.56 55.505 ; + RECT 3.06 54.915 3.11 55.045 ; + RECT 1.405 52.955 1.455 53.085 ; + RECT 4.51 52.955 4.56 53.085 ; + RECT 1.38 52.495 1.43 52.625 ; + RECT 4.51 52.495 4.56 52.625 ; + RECT 3.06 52.035 3.11 52.165 ; + RECT 1.405 50.075 1.455 50.205 ; + RECT 4.51 50.075 4.56 50.205 ; + RECT 1.38 49.615 1.43 49.745 ; + RECT 4.51 49.615 4.56 49.745 ; + RECT 3.06 49.155 3.11 49.285 ; + RECT 1.405 47.195 1.455 47.325 ; + RECT 4.51 47.195 4.56 47.325 ; + RECT 1.38 46.735 1.43 46.865 ; + RECT 4.51 46.735 4.56 46.865 ; + RECT 3.06 46.275 3.11 46.405 ; + RECT 1.405 44.315 1.455 44.445 ; + RECT 4.51 44.315 4.56 44.445 ; + RECT 1.38 43.855 1.43 43.985 ; + RECT 4.51 43.855 4.56 43.985 ; + RECT 3.06 43.395 3.11 43.525 ; + RECT 1.405 41.435 1.455 41.565 ; + RECT 4.51 41.435 4.56 41.565 ; + RECT 1.38 173.455 1.43 173.585 ; + RECT 4.51 173.455 4.56 173.585 ; + RECT 3.06 172.995 3.11 173.125 ; + RECT 1.405 171.035 1.455 171.165 ; + RECT 4.51 171.035 4.56 171.165 ; + RECT 1.38 40.975 1.43 41.105 ; + RECT 4.51 40.975 4.56 41.105 ; + RECT 3.06 40.515 3.11 40.645 ; + RECT 1.405 38.555 1.455 38.685 ; + RECT 4.51 38.555 4.56 38.685 ; + RECT 1.38 38.095 1.43 38.225 ; + RECT 4.51 38.095 4.56 38.225 ; + RECT 3.06 37.635 3.11 37.765 ; + RECT 1.405 35.675 1.455 35.805 ; + RECT 4.51 35.675 4.56 35.805 ; + RECT 1.38 35.215 1.43 35.345 ; + RECT 4.51 35.215 4.56 35.345 ; + RECT 3.06 34.755 3.11 34.885 ; + RECT 1.405 32.795 1.455 32.925 ; + RECT 4.51 32.795 4.56 32.925 ; + RECT 1.38 32.335 1.43 32.465 ; + RECT 4.51 32.335 4.56 32.465 ; + RECT 3.06 31.875 3.11 32.005 ; + RECT 1.405 29.915 1.455 30.045 ; + RECT 4.51 29.915 4.56 30.045 ; + RECT 1.38 29.455 1.43 29.585 ; + RECT 4.51 29.455 4.56 29.585 ; + RECT 3.06 28.995 3.11 29.125 ; + RECT 1.405 27.035 1.455 27.165 ; + RECT 4.51 27.035 4.56 27.165 ; + RECT 1.38 26.575 1.43 26.705 ; + RECT 4.51 26.575 4.56 26.705 ; + RECT 3.06 26.115 3.11 26.245 ; + RECT 1.405 24.155 1.455 24.285 ; + RECT 4.51 24.155 4.56 24.285 ; + RECT 1.38 23.695 1.43 23.825 ; + RECT 4.51 23.695 4.56 23.825 ; + RECT 3.06 23.235 3.11 23.365 ; + RECT 1.405 21.275 1.455 21.405 ; + RECT 4.51 21.275 4.56 21.405 ; + RECT 1.38 20.815 1.43 20.945 ; + RECT 4.51 20.815 4.56 20.945 ; + RECT 3.06 20.355 3.11 20.485 ; + RECT 1.405 18.395 1.455 18.525 ; + RECT 4.51 18.395 4.56 18.525 ; + RECT 1.38 17.935 1.43 18.065 ; + RECT 4.51 17.935 4.56 18.065 ; + RECT 3.06 17.475 3.11 17.605 ; + RECT 1.405 15.515 1.455 15.645 ; + RECT 4.51 15.515 4.56 15.645 ; + RECT 1.38 15.055 1.43 15.185 ; + RECT 4.51 15.055 4.56 15.185 ; + RECT 3.06 14.595 3.11 14.725 ; + RECT 1.405 12.635 1.455 12.765 ; + RECT 4.51 12.635 4.56 12.765 ; + RECT 1.38 170.575 1.43 170.705 ; + RECT 4.51 170.575 4.56 170.705 ; + RECT 3.06 170.115 3.11 170.245 ; + RECT 1.405 168.155 1.455 168.285 ; + RECT 4.51 168.155 4.56 168.285 ; + RECT 1.38 12.175 1.43 12.305 ; + RECT 4.51 12.175 4.56 12.305 ; + RECT 3.06 11.715 3.11 11.845 ; + RECT 1.405 9.755 1.455 9.885 ; + RECT 4.51 9.755 4.56 9.885 ; + RECT 1.38 9.295 1.43 9.425 ; + RECT 4.51 9.295 4.56 9.425 ; + RECT 3.06 8.835 3.11 8.965 ; + RECT 1.405 6.875 1.455 7.005 ; + RECT 4.51 6.875 4.56 7.005 ; + RECT 1.38 6.415 1.43 6.545 ; + RECT 4.51 6.415 4.56 6.545 ; + RECT 3.06 5.955 3.11 6.085 ; + RECT 1.405 3.995 1.455 4.125 ; + RECT 4.51 3.995 4.56 4.125 ; + RECT 1.38 3.535 1.43 3.665 ; + RECT 4.51 3.535 4.56 3.665 ; + RECT 3.06 3.075 3.11 3.205 ; + RECT 1.405 1.115 1.455 1.245 ; + RECT 4.51 1.115 4.56 1.245 ; + RECT 1.38 167.695 1.43 167.825 ; + RECT 4.51 167.695 4.56 167.825 ; + RECT 3.06 167.235 3.11 167.365 ; + RECT 1.405 165.275 1.455 165.405 ; + RECT 4.51 165.275 4.56 165.405 ; + RECT 1.38 164.815 1.43 164.945 ; + RECT 4.51 164.815 4.56 164.945 ; + RECT 3.06 164.355 3.11 164.485 ; + RECT 1.405 162.395 1.455 162.525 ; + RECT 4.51 162.395 4.56 162.525 ; + RECT 1.38 161.935 1.43 162.065 ; + RECT 4.51 161.935 4.56 162.065 ; + RECT 3.06 161.475 3.11 161.605 ; + RECT 1.405 159.515 1.455 159.645 ; + RECT 4.51 159.515 4.56 159.645 ; + RECT 1.38 159.055 1.43 159.185 ; + RECT 4.51 159.055 4.56 159.185 ; + RECT 3.06 158.595 3.11 158.725 ; + RECT 1.405 156.635 1.455 156.765 ; + RECT 4.51 156.635 4.56 156.765 ; + RECT 3.06 182.095 3.11 182.225 ; + RECT 1.085 181.635 1.135 181.765 ; + RECT 1.405 181.675 1.455 181.725 ; + RECT 4.47 181.675 4.6 181.725 ; + RECT 3.06 179.675 3.11 179.805 ; + RECT 1.57 179.445 1.62 179.575 ; + RECT 2.58 179.445 2.63 179.575 ; + RECT 3.84 179.445 3.89 179.575 ; + RECT 5.675 179.445 5.725 179.575 ; + RECT 3.06 156.175 3.11 156.305 ; + RECT 1.085 155.715 1.135 155.845 ; + RECT 1.405 155.755 1.455 155.805 ; + RECT 4.47 155.755 4.6 155.805 ; + RECT 3.06 153.755 3.11 153.885 ; + RECT 1.57 153.525 1.62 153.655 ; + RECT 2.58 153.525 2.63 153.655 ; + RECT 3.84 153.525 3.89 153.655 ; + RECT 5.675 153.525 5.725 153.655 ; + RECT 3.06 153.295 3.11 153.425 ; + RECT 1.085 152.835 1.135 152.965 ; + RECT 1.405 152.875 1.455 152.925 ; + RECT 4.47 152.875 4.6 152.925 ; + RECT 3.06 150.875 3.11 151.005 ; + RECT 1.57 150.645 1.62 150.775 ; + RECT 2.58 150.645 2.63 150.775 ; + RECT 3.84 150.645 3.89 150.775 ; + RECT 5.675 150.645 5.725 150.775 ; + RECT 3.06 150.415 3.11 150.545 ; + RECT 1.085 149.955 1.135 150.085 ; + RECT 1.405 149.995 1.455 150.045 ; + RECT 4.47 149.995 4.6 150.045 ; + RECT 3.06 147.995 3.11 148.125 ; + RECT 1.57 147.765 1.62 147.895 ; + RECT 2.58 147.765 2.63 147.895 ; + RECT 3.84 147.765 3.89 147.895 ; + RECT 5.675 147.765 5.725 147.895 ; + RECT 3.06 147.535 3.11 147.665 ; + RECT 1.085 147.075 1.135 147.205 ; + RECT 1.405 147.115 1.455 147.165 ; + RECT 4.47 147.115 4.6 147.165 ; + RECT 3.06 145.115 3.11 145.245 ; + RECT 1.57 144.885 1.62 145.015 ; + RECT 2.58 144.885 2.63 145.015 ; + RECT 3.84 144.885 3.89 145.015 ; + RECT 5.675 144.885 5.725 145.015 ; + RECT 3.06 144.655 3.11 144.785 ; + RECT 1.085 144.195 1.135 144.325 ; + RECT 1.405 144.235 1.455 144.285 ; + RECT 4.47 144.235 4.6 144.285 ; + RECT 3.06 142.235 3.11 142.365 ; + RECT 1.57 142.005 1.62 142.135 ; + RECT 2.58 142.005 2.63 142.135 ; + RECT 3.84 142.005 3.89 142.135 ; + RECT 5.675 142.005 5.725 142.135 ; + RECT 3.06 141.775 3.11 141.905 ; + RECT 1.085 141.315 1.135 141.445 ; + RECT 1.405 141.355 1.455 141.405 ; + RECT 4.47 141.355 4.6 141.405 ; + RECT 3.06 139.355 3.11 139.485 ; + RECT 1.57 139.125 1.62 139.255 ; + RECT 2.58 139.125 2.63 139.255 ; + RECT 3.84 139.125 3.89 139.255 ; + RECT 5.675 139.125 5.725 139.255 ; + RECT 3.06 138.895 3.11 139.025 ; + RECT 1.085 138.435 1.135 138.565 ; + RECT 1.405 138.475 1.455 138.525 ; + RECT 4.47 138.475 4.6 138.525 ; + RECT 3.06 136.475 3.11 136.605 ; + RECT 1.57 136.245 1.62 136.375 ; + RECT 2.58 136.245 2.63 136.375 ; + RECT 3.84 136.245 3.89 136.375 ; + RECT 5.675 136.245 5.725 136.375 ; + RECT 3.06 136.015 3.11 136.145 ; + RECT 1.085 135.555 1.135 135.685 ; + RECT 1.405 135.595 1.455 135.645 ; + RECT 4.47 135.595 4.6 135.645 ; + RECT 3.06 133.595 3.11 133.725 ; + RECT 1.57 133.365 1.62 133.495 ; + RECT 2.58 133.365 2.63 133.495 ; + RECT 3.84 133.365 3.89 133.495 ; + RECT 5.675 133.365 5.725 133.495 ; + RECT 3.06 133.135 3.11 133.265 ; + RECT 1.085 132.675 1.135 132.805 ; + RECT 1.405 132.715 1.455 132.765 ; + RECT 4.47 132.715 4.6 132.765 ; + RECT 3.06 130.715 3.11 130.845 ; + RECT 1.57 130.485 1.62 130.615 ; + RECT 2.58 130.485 2.63 130.615 ; + RECT 3.84 130.485 3.89 130.615 ; + RECT 5.675 130.485 5.725 130.615 ; + RECT 3.06 130.255 3.11 130.385 ; + RECT 1.085 129.795 1.135 129.925 ; + RECT 1.405 129.835 1.455 129.885 ; + RECT 4.47 129.835 4.6 129.885 ; + RECT 3.06 127.835 3.11 127.965 ; + RECT 1.57 127.605 1.62 127.735 ; + RECT 2.58 127.605 2.63 127.735 ; + RECT 3.84 127.605 3.89 127.735 ; + RECT 5.675 127.605 5.725 127.735 ; + RECT 3.06 179.215 3.11 179.345 ; + RECT 1.085 178.755 1.135 178.885 ; + RECT 1.405 178.795 1.455 178.845 ; + RECT 4.47 178.795 4.6 178.845 ; + RECT 3.06 176.795 3.11 176.925 ; + RECT 1.57 176.565 1.62 176.695 ; + RECT 2.58 176.565 2.63 176.695 ; + RECT 3.84 176.565 3.89 176.695 ; + RECT 5.675 176.565 5.725 176.695 ; + RECT 3.06 127.375 3.11 127.505 ; + RECT 1.085 126.915 1.135 127.045 ; + RECT 1.405 126.955 1.455 127.005 ; + RECT 4.47 126.955 4.6 127.005 ; + RECT 3.06 124.955 3.11 125.085 ; + RECT 1.57 124.725 1.62 124.855 ; + RECT 2.58 124.725 2.63 124.855 ; + RECT 3.84 124.725 3.89 124.855 ; + RECT 5.675 124.725 5.725 124.855 ; + RECT 3.06 124.495 3.11 124.625 ; + RECT 1.085 124.035 1.135 124.165 ; + RECT 1.405 124.075 1.455 124.125 ; + RECT 4.47 124.075 4.6 124.125 ; + RECT 3.06 122.075 3.11 122.205 ; + RECT 1.57 121.845 1.62 121.975 ; + RECT 2.58 121.845 2.63 121.975 ; + RECT 3.84 121.845 3.89 121.975 ; + RECT 5.675 121.845 5.725 121.975 ; + RECT 3.06 121.615 3.11 121.745 ; + RECT 1.085 121.155 1.135 121.285 ; + RECT 1.405 121.195 1.455 121.245 ; + RECT 4.47 121.195 4.6 121.245 ; + RECT 3.06 119.195 3.11 119.325 ; + RECT 1.57 118.965 1.62 119.095 ; + RECT 2.58 118.965 2.63 119.095 ; + RECT 3.84 118.965 3.89 119.095 ; + RECT 5.675 118.965 5.725 119.095 ; + RECT 3.06 118.735 3.11 118.865 ; + RECT 1.085 118.275 1.135 118.405 ; + RECT 1.405 118.315 1.455 118.365 ; + RECT 4.47 118.315 4.6 118.365 ; + RECT 3.06 116.315 3.11 116.445 ; + RECT 1.57 116.085 1.62 116.215 ; + RECT 2.58 116.085 2.63 116.215 ; + RECT 3.84 116.085 3.89 116.215 ; + RECT 5.675 116.085 5.725 116.215 ; + RECT 3.06 115.855 3.11 115.985 ; + RECT 1.085 115.395 1.135 115.525 ; + RECT 1.405 115.435 1.455 115.485 ; + RECT 4.47 115.435 4.6 115.485 ; + RECT 3.06 113.435 3.11 113.565 ; + RECT 1.57 113.205 1.62 113.335 ; + RECT 2.58 113.205 2.63 113.335 ; + RECT 3.84 113.205 3.89 113.335 ; + RECT 5.675 113.205 5.725 113.335 ; + RECT 3.06 112.975 3.11 113.105 ; + RECT 1.085 112.515 1.135 112.645 ; + RECT 1.405 112.555 1.455 112.605 ; + RECT 4.47 112.555 4.6 112.605 ; + RECT 3.06 110.555 3.11 110.685 ; + RECT 1.57 110.325 1.62 110.455 ; + RECT 2.58 110.325 2.63 110.455 ; + RECT 3.84 110.325 3.89 110.455 ; + RECT 5.675 110.325 5.725 110.455 ; + RECT 3.06 110.095 3.11 110.225 ; + RECT 1.085 109.635 1.135 109.765 ; + RECT 1.405 109.675 1.455 109.725 ; + RECT 4.47 109.675 4.6 109.725 ; + RECT 3.06 107.675 3.11 107.805 ; + RECT 1.57 107.445 1.62 107.575 ; + RECT 2.58 107.445 2.63 107.575 ; + RECT 3.84 107.445 3.89 107.575 ; + RECT 5.675 107.445 5.725 107.575 ; + RECT 3.06 107.215 3.11 107.345 ; + RECT 1.085 106.755 1.135 106.885 ; + RECT 1.405 106.795 1.455 106.845 ; + RECT 4.47 106.795 4.6 106.845 ; + RECT 3.06 104.795 3.11 104.925 ; + RECT 1.57 104.565 1.62 104.695 ; + RECT 2.58 104.565 2.63 104.695 ; + RECT 3.84 104.565 3.89 104.695 ; + RECT 5.675 104.565 5.725 104.695 ; + RECT 3.06 104.335 3.11 104.465 ; + RECT 1.085 103.875 1.135 104.005 ; + RECT 1.405 103.915 1.455 103.965 ; + RECT 4.47 103.915 4.6 103.965 ; + RECT 3.06 101.915 3.11 102.045 ; + RECT 1.57 101.685 1.62 101.815 ; + RECT 2.58 101.685 2.63 101.815 ; + RECT 3.84 101.685 3.89 101.815 ; + RECT 5.675 101.685 5.725 101.815 ; + RECT 3.06 101.455 3.11 101.585 ; + RECT 1.085 100.995 1.135 101.125 ; + RECT 1.405 101.035 1.455 101.085 ; + RECT 4.47 101.035 4.6 101.085 ; + RECT 3.06 99.035 3.11 99.165 ; + RECT 1.57 98.805 1.62 98.935 ; + RECT 2.58 98.805 2.63 98.935 ; + RECT 3.84 98.805 3.89 98.935 ; + RECT 5.675 98.805 5.725 98.935 ; + RECT 3.06 176.335 3.11 176.465 ; + RECT 1.085 175.875 1.135 176.005 ; + RECT 1.405 175.915 1.455 175.965 ; + RECT 4.47 175.915 4.6 175.965 ; + RECT 3.06 173.915 3.11 174.045 ; + RECT 1.57 173.685 1.62 173.815 ; + RECT 2.58 173.685 2.63 173.815 ; + RECT 3.84 173.685 3.89 173.815 ; + RECT 5.675 173.685 5.725 173.815 ; + RECT 3.06 98.575 3.11 98.705 ; + RECT 1.085 98.115 1.135 98.245 ; + RECT 1.405 98.155 1.455 98.205 ; + RECT 4.47 98.155 4.6 98.205 ; + RECT 3.06 96.155 3.11 96.285 ; + RECT 1.57 95.925 1.62 96.055 ; + RECT 2.58 95.925 2.63 96.055 ; + RECT 3.84 95.925 3.89 96.055 ; + RECT 5.675 95.925 5.725 96.055 ; + RECT 3.06 95.695 3.11 95.825 ; + RECT 1.085 95.235 1.135 95.365 ; + RECT 1.405 95.275 1.455 95.325 ; + RECT 4.47 95.275 4.6 95.325 ; + RECT 3.06 93.275 3.11 93.405 ; + RECT 1.57 93.045 1.62 93.175 ; + RECT 2.58 93.045 2.63 93.175 ; + RECT 3.84 93.045 3.89 93.175 ; + RECT 5.675 93.045 5.725 93.175 ; + RECT 3.06 92.815 3.11 92.945 ; + RECT 1.085 92.355 1.135 92.485 ; + RECT 1.405 92.395 1.455 92.445 ; + RECT 4.47 92.395 4.6 92.445 ; + RECT 3.06 90.395 3.11 90.525 ; + RECT 1.57 90.165 1.62 90.295 ; + RECT 2.58 90.165 2.63 90.295 ; + RECT 3.84 90.165 3.89 90.295 ; + RECT 5.675 90.165 5.725 90.295 ; + RECT 3.06 89.935 3.11 90.065 ; + RECT 1.085 89.475 1.135 89.605 ; + RECT 1.405 89.515 1.455 89.565 ; + RECT 4.47 89.515 4.6 89.565 ; + RECT 3.06 87.515 3.11 87.645 ; + RECT 1.57 87.285 1.62 87.415 ; + RECT 2.58 87.285 2.63 87.415 ; + RECT 3.84 87.285 3.89 87.415 ; + RECT 5.675 87.285 5.725 87.415 ; + RECT 3.06 87.055 3.11 87.185 ; + RECT 1.085 86.595 1.135 86.725 ; + RECT 1.405 86.635 1.455 86.685 ; + RECT 4.47 86.635 4.6 86.685 ; + RECT 3.06 84.635 3.11 84.765 ; + RECT 1.57 84.405 1.62 84.535 ; + RECT 2.58 84.405 2.63 84.535 ; + RECT 3.84 84.405 3.89 84.535 ; + RECT 5.675 84.405 5.725 84.535 ; + RECT 3.06 84.175 3.11 84.305 ; + RECT 1.085 83.715 1.135 83.845 ; + RECT 1.405 83.755 1.455 83.805 ; + RECT 4.47 83.755 4.6 83.805 ; + RECT 3.06 81.755 3.11 81.885 ; + RECT 1.57 81.525 1.62 81.655 ; + RECT 2.58 81.525 2.63 81.655 ; + RECT 3.84 81.525 3.89 81.655 ; + RECT 5.675 81.525 5.725 81.655 ; + RECT 3.06 81.295 3.11 81.425 ; + RECT 1.085 80.835 1.135 80.965 ; + RECT 1.405 80.875 1.455 80.925 ; + RECT 4.47 80.875 4.6 80.925 ; + RECT 3.06 78.875 3.11 79.005 ; + RECT 1.57 78.645 1.62 78.775 ; + RECT 2.58 78.645 2.63 78.775 ; + RECT 3.84 78.645 3.89 78.775 ; + RECT 5.675 78.645 5.725 78.775 ; + RECT 3.06 78.415 3.11 78.545 ; + RECT 1.085 77.955 1.135 78.085 ; + RECT 1.405 77.995 1.455 78.045 ; + RECT 4.47 77.995 4.6 78.045 ; + RECT 3.06 75.995 3.11 76.125 ; + RECT 1.57 75.765 1.62 75.895 ; + RECT 2.58 75.765 2.63 75.895 ; + RECT 3.84 75.765 3.89 75.895 ; + RECT 5.675 75.765 5.725 75.895 ; + RECT 3.06 75.535 3.11 75.665 ; + RECT 1.085 75.075 1.135 75.205 ; + RECT 1.405 75.115 1.455 75.165 ; + RECT 4.47 75.115 4.6 75.165 ; + RECT 3.06 73.115 3.11 73.245 ; + RECT 1.57 72.885 1.62 73.015 ; + RECT 2.58 72.885 2.63 73.015 ; + RECT 3.84 72.885 3.89 73.015 ; + RECT 5.675 72.885 5.725 73.015 ; + RECT 3.06 72.655 3.11 72.785 ; + RECT 1.085 72.195 1.135 72.325 ; + RECT 1.405 72.235 1.455 72.285 ; + RECT 4.47 72.235 4.6 72.285 ; + RECT 3.06 70.235 3.11 70.365 ; + RECT 1.57 70.005 1.62 70.135 ; + RECT 2.58 70.005 2.63 70.135 ; + RECT 3.84 70.005 3.89 70.135 ; + RECT 5.675 70.005 5.725 70.135 ; + RECT 3.06 173.455 3.11 173.585 ; + RECT 1.085 172.995 1.135 173.125 ; + RECT 1.405 173.035 1.455 173.085 ; + RECT 4.47 173.035 4.6 173.085 ; + RECT 3.06 171.035 3.11 171.165 ; + RECT 1.57 170.805 1.62 170.935 ; + RECT 2.58 170.805 2.63 170.935 ; + RECT 3.84 170.805 3.89 170.935 ; + RECT 5.675 170.805 5.725 170.935 ; + RECT 3.06 69.775 3.11 69.905 ; + RECT 1.085 69.315 1.135 69.445 ; + RECT 1.405 69.355 1.455 69.405 ; + RECT 4.47 69.355 4.6 69.405 ; + RECT 3.06 67.355 3.11 67.485 ; + RECT 1.57 67.125 1.62 67.255 ; + RECT 2.58 67.125 2.63 67.255 ; + RECT 3.84 67.125 3.89 67.255 ; + RECT 5.675 67.125 5.725 67.255 ; + RECT 3.06 66.895 3.11 67.025 ; + RECT 1.085 66.435 1.135 66.565 ; + RECT 1.405 66.475 1.455 66.525 ; + RECT 4.47 66.475 4.6 66.525 ; + RECT 3.06 64.475 3.11 64.605 ; + RECT 1.57 64.245 1.62 64.375 ; + RECT 2.58 64.245 2.63 64.375 ; + RECT 3.84 64.245 3.89 64.375 ; + RECT 5.675 64.245 5.725 64.375 ; + RECT 3.06 64.015 3.11 64.145 ; + RECT 1.085 63.555 1.135 63.685 ; + RECT 1.405 63.595 1.455 63.645 ; + RECT 4.47 63.595 4.6 63.645 ; + RECT 3.06 61.595 3.11 61.725 ; + RECT 1.57 61.365 1.62 61.495 ; + RECT 2.58 61.365 2.63 61.495 ; + RECT 3.84 61.365 3.89 61.495 ; + RECT 5.675 61.365 5.725 61.495 ; + RECT 3.06 61.135 3.11 61.265 ; + RECT 1.085 60.675 1.135 60.805 ; + RECT 1.405 60.715 1.455 60.765 ; + RECT 4.47 60.715 4.6 60.765 ; + RECT 3.06 58.715 3.11 58.845 ; + RECT 1.57 58.485 1.62 58.615 ; + RECT 2.58 58.485 2.63 58.615 ; + RECT 3.84 58.485 3.89 58.615 ; + RECT 5.675 58.485 5.725 58.615 ; + RECT 3.06 58.255 3.11 58.385 ; + RECT 1.085 57.795 1.135 57.925 ; + RECT 1.405 57.835 1.455 57.885 ; + RECT 4.47 57.835 4.6 57.885 ; + RECT 3.06 55.835 3.11 55.965 ; + RECT 1.57 55.605 1.62 55.735 ; + RECT 2.58 55.605 2.63 55.735 ; + RECT 3.84 55.605 3.89 55.735 ; + RECT 5.675 55.605 5.725 55.735 ; + RECT 3.06 55.375 3.11 55.505 ; + RECT 1.085 54.915 1.135 55.045 ; + RECT 1.405 54.955 1.455 55.005 ; + RECT 4.47 54.955 4.6 55.005 ; + RECT 3.06 52.955 3.11 53.085 ; + RECT 1.57 52.725 1.62 52.855 ; + RECT 2.58 52.725 2.63 52.855 ; + RECT 3.84 52.725 3.89 52.855 ; + RECT 5.675 52.725 5.725 52.855 ; + RECT 3.06 52.495 3.11 52.625 ; + RECT 1.085 52.035 1.135 52.165 ; + RECT 1.405 52.075 1.455 52.125 ; + RECT 4.47 52.075 4.6 52.125 ; + RECT 3.06 50.075 3.11 50.205 ; + RECT 1.57 49.845 1.62 49.975 ; + RECT 2.58 49.845 2.63 49.975 ; + RECT 3.84 49.845 3.89 49.975 ; + RECT 5.675 49.845 5.725 49.975 ; + RECT 3.06 49.615 3.11 49.745 ; + RECT 1.085 49.155 1.135 49.285 ; + RECT 1.405 49.195 1.455 49.245 ; + RECT 4.47 49.195 4.6 49.245 ; + RECT 3.06 47.195 3.11 47.325 ; + RECT 1.57 46.965 1.62 47.095 ; + RECT 2.58 46.965 2.63 47.095 ; + RECT 3.84 46.965 3.89 47.095 ; + RECT 5.675 46.965 5.725 47.095 ; + RECT 3.06 46.735 3.11 46.865 ; + RECT 1.085 46.275 1.135 46.405 ; + RECT 1.405 46.315 1.455 46.365 ; + RECT 4.47 46.315 4.6 46.365 ; + RECT 3.06 44.315 3.11 44.445 ; + RECT 1.57 44.085 1.62 44.215 ; + RECT 2.58 44.085 2.63 44.215 ; + RECT 3.84 44.085 3.89 44.215 ; + RECT 5.675 44.085 5.725 44.215 ; + RECT 3.06 43.855 3.11 43.985 ; + RECT 1.085 43.395 1.135 43.525 ; + RECT 1.405 43.435 1.455 43.485 ; + RECT 4.47 43.435 4.6 43.485 ; + RECT 3.06 41.435 3.11 41.565 ; + RECT 1.57 41.205 1.62 41.335 ; + RECT 2.58 41.205 2.63 41.335 ; + RECT 3.84 41.205 3.89 41.335 ; + RECT 5.675 41.205 5.725 41.335 ; + RECT 3.06 170.575 3.11 170.705 ; + RECT 1.085 170.115 1.135 170.245 ; + RECT 1.405 170.155 1.455 170.205 ; + RECT 4.47 170.155 4.6 170.205 ; + RECT 3.06 168.155 3.11 168.285 ; + RECT 1.57 167.925 1.62 168.055 ; + RECT 2.58 167.925 2.63 168.055 ; + RECT 3.84 167.925 3.89 168.055 ; + RECT 5.675 167.925 5.725 168.055 ; + RECT 3.06 40.975 3.11 41.105 ; + RECT 1.085 40.515 1.135 40.645 ; + RECT 1.405 40.555 1.455 40.605 ; + RECT 4.47 40.555 4.6 40.605 ; + RECT 3.06 38.555 3.11 38.685 ; + RECT 1.57 38.325 1.62 38.455 ; + RECT 2.58 38.325 2.63 38.455 ; + RECT 3.84 38.325 3.89 38.455 ; + RECT 5.675 38.325 5.725 38.455 ; + RECT 3.06 38.095 3.11 38.225 ; + RECT 1.085 37.635 1.135 37.765 ; + RECT 1.405 37.675 1.455 37.725 ; + RECT 4.47 37.675 4.6 37.725 ; + RECT 3.06 35.675 3.11 35.805 ; + RECT 1.57 35.445 1.62 35.575 ; + RECT 2.58 35.445 2.63 35.575 ; + RECT 3.84 35.445 3.89 35.575 ; + RECT 5.675 35.445 5.725 35.575 ; + RECT 3.06 35.215 3.11 35.345 ; + RECT 1.085 34.755 1.135 34.885 ; + RECT 1.405 34.795 1.455 34.845 ; + RECT 4.47 34.795 4.6 34.845 ; + RECT 3.06 32.795 3.11 32.925 ; + RECT 1.57 32.565 1.62 32.695 ; + RECT 2.58 32.565 2.63 32.695 ; + RECT 3.84 32.565 3.89 32.695 ; + RECT 5.675 32.565 5.725 32.695 ; + RECT 3.06 32.335 3.11 32.465 ; + RECT 1.085 31.875 1.135 32.005 ; + RECT 1.405 31.915 1.455 31.965 ; + RECT 4.47 31.915 4.6 31.965 ; + RECT 3.06 29.915 3.11 30.045 ; + RECT 1.57 29.685 1.62 29.815 ; + RECT 2.58 29.685 2.63 29.815 ; + RECT 3.84 29.685 3.89 29.815 ; + RECT 5.675 29.685 5.725 29.815 ; + RECT 3.06 29.455 3.11 29.585 ; + RECT 1.085 28.995 1.135 29.125 ; + RECT 1.405 29.035 1.455 29.085 ; + RECT 4.47 29.035 4.6 29.085 ; + RECT 3.06 27.035 3.11 27.165 ; + RECT 1.57 26.805 1.62 26.935 ; + RECT 2.58 26.805 2.63 26.935 ; + RECT 3.84 26.805 3.89 26.935 ; + RECT 5.675 26.805 5.725 26.935 ; + RECT 3.06 26.575 3.11 26.705 ; + RECT 1.085 26.115 1.135 26.245 ; + RECT 1.405 26.155 1.455 26.205 ; + RECT 4.47 26.155 4.6 26.205 ; + RECT 3.06 24.155 3.11 24.285 ; + RECT 1.57 23.925 1.62 24.055 ; + RECT 2.58 23.925 2.63 24.055 ; + RECT 3.84 23.925 3.89 24.055 ; + RECT 5.675 23.925 5.725 24.055 ; + RECT 3.06 23.695 3.11 23.825 ; + RECT 1.085 23.235 1.135 23.365 ; + RECT 1.405 23.275 1.455 23.325 ; + RECT 4.47 23.275 4.6 23.325 ; + RECT 3.06 21.275 3.11 21.405 ; + RECT 1.57 21.045 1.62 21.175 ; + RECT 2.58 21.045 2.63 21.175 ; + RECT 3.84 21.045 3.89 21.175 ; + RECT 5.675 21.045 5.725 21.175 ; + RECT 3.06 20.815 3.11 20.945 ; + RECT 1.085 20.355 1.135 20.485 ; + RECT 1.405 20.395 1.455 20.445 ; + RECT 4.47 20.395 4.6 20.445 ; + RECT 3.06 18.395 3.11 18.525 ; + RECT 1.57 18.165 1.62 18.295 ; + RECT 2.58 18.165 2.63 18.295 ; + RECT 3.84 18.165 3.89 18.295 ; + RECT 5.675 18.165 5.725 18.295 ; + RECT 3.06 17.935 3.11 18.065 ; + RECT 1.085 17.475 1.135 17.605 ; + RECT 1.405 17.515 1.455 17.565 ; + RECT 4.47 17.515 4.6 17.565 ; + RECT 3.06 15.515 3.11 15.645 ; + RECT 1.57 15.285 1.62 15.415 ; + RECT 2.58 15.285 2.63 15.415 ; + RECT 3.84 15.285 3.89 15.415 ; + RECT 5.675 15.285 5.725 15.415 ; + RECT 3.06 15.055 3.11 15.185 ; + RECT 1.085 14.595 1.135 14.725 ; + RECT 1.405 14.635 1.455 14.685 ; + RECT 4.47 14.635 4.6 14.685 ; + RECT 3.06 12.635 3.11 12.765 ; + RECT 1.57 12.405 1.62 12.535 ; + RECT 2.58 12.405 2.63 12.535 ; + RECT 3.84 12.405 3.89 12.535 ; + RECT 5.675 12.405 5.725 12.535 ; + RECT 3.06 167.695 3.11 167.825 ; + RECT 1.085 167.235 1.135 167.365 ; + RECT 1.405 167.275 1.455 167.325 ; + RECT 4.47 167.275 4.6 167.325 ; + RECT 3.06 165.275 3.11 165.405 ; + RECT 1.57 165.045 1.62 165.175 ; + RECT 2.58 165.045 2.63 165.175 ; + RECT 3.84 165.045 3.89 165.175 ; + RECT 5.675 165.045 5.725 165.175 ; + RECT 3.06 12.175 3.11 12.305 ; + RECT 1.085 11.715 1.135 11.845 ; + RECT 1.405 11.755 1.455 11.805 ; + RECT 4.47 11.755 4.6 11.805 ; + RECT 3.06 9.755 3.11 9.885 ; + RECT 1.57 9.525 1.62 9.655 ; + RECT 2.58 9.525 2.63 9.655 ; + RECT 3.84 9.525 3.89 9.655 ; + RECT 5.675 9.525 5.725 9.655 ; + RECT 3.06 9.295 3.11 9.425 ; + RECT 1.085 8.835 1.135 8.965 ; + RECT 1.405 8.875 1.455 8.925 ; + RECT 4.47 8.875 4.6 8.925 ; + RECT 3.06 6.875 3.11 7.005 ; + RECT 1.57 6.645 1.62 6.775 ; + RECT 2.58 6.645 2.63 6.775 ; + RECT 3.84 6.645 3.89 6.775 ; + RECT 5.675 6.645 5.725 6.775 ; + RECT 3.06 6.415 3.11 6.545 ; + RECT 1.085 5.955 1.135 6.085 ; + RECT 1.405 5.995 1.455 6.045 ; + RECT 4.47 5.995 4.6 6.045 ; + RECT 3.06 3.995 3.11 4.125 ; + RECT 1.57 3.765 1.62 3.895 ; + RECT 2.58 3.765 2.63 3.895 ; + RECT 3.84 3.765 3.89 3.895 ; + RECT 5.675 3.765 5.725 3.895 ; + RECT 3.06 164.815 3.11 164.945 ; + RECT 1.085 164.355 1.135 164.485 ; + RECT 1.405 164.395 1.455 164.445 ; + RECT 4.47 164.395 4.6 164.445 ; + RECT 3.06 162.395 3.11 162.525 ; + RECT 1.57 162.165 1.62 162.295 ; + RECT 2.58 162.165 2.63 162.295 ; + RECT 3.84 162.165 3.89 162.295 ; + RECT 5.675 162.165 5.725 162.295 ; + RECT 3.06 161.935 3.11 162.065 ; + RECT 1.085 161.475 1.135 161.605 ; + RECT 1.405 161.515 1.455 161.565 ; + RECT 4.47 161.515 4.6 161.565 ; + RECT 3.06 159.515 3.11 159.645 ; + RECT 1.57 159.285 1.62 159.415 ; + RECT 2.58 159.285 2.63 159.415 ; + RECT 3.84 159.285 3.89 159.415 ; + RECT 5.675 159.285 5.725 159.415 ; + RECT 3.06 159.055 3.11 159.185 ; + RECT 1.085 158.595 1.135 158.725 ; + RECT 1.405 158.635 1.455 158.685 ; + RECT 4.47 158.635 4.6 158.685 ; + RECT 3.06 156.635 3.11 156.765 ; + RECT 1.57 156.405 1.62 156.535 ; + RECT 2.58 156.405 2.63 156.535 ; + RECT 3.84 156.405 3.89 156.535 ; + RECT 5.675 156.405 5.725 156.535 ; + RECT 3.06 3.535 3.11 3.665 ; + RECT 1.085 3.075 1.135 3.205 ; + RECT 1.405 3.115 1.455 3.165 ; + RECT 4.47 3.115 4.6 3.165 ; + RECT 3.06 1.115 3.11 1.245 ; + RECT 1.57 0.885 1.62 1.015 ; + RECT 2.58 0.885 2.63 1.015 ; + RECT 3.84 0.885 3.89 1.015 ; + RECT 5.675 0.885 5.725 1.015 ; + RECT 3.06 184.975 3.11 185.105 ; + RECT 1.085 184.515 1.135 184.645 ; + RECT 1.405 184.555 1.455 184.605 ; + RECT 4.47 184.555 4.6 184.605 ; + RECT 3.06 182.555 3.11 182.685 ; + RECT 1.57 182.325 1.62 182.455 ; + RECT 2.58 182.325 2.63 182.455 ; + RECT 3.84 182.325 3.89 182.455 ; + RECT 5.675 182.325 5.725 182.455 ; + RECT 0.435 184.515 0.485 184.645 ; + RECT 0.435 184.975 0.485 185.105 ; + RECT 0.435 182.555 0.485 182.685 ; + RECT 0.435 181.635 0.485 181.765 ; + RECT 0.435 182.095 0.485 182.225 ; + RECT 0.435 179.675 0.485 179.805 ; + RECT 0.435 155.715 0.485 155.845 ; + RECT 0.435 156.175 0.485 156.305 ; + RECT 0.435 153.755 0.485 153.885 ; + RECT 0.435 152.835 0.485 152.965 ; + RECT 0.435 153.295 0.485 153.425 ; + RECT 0.435 150.875 0.485 151.005 ; + RECT 0.435 149.955 0.485 150.085 ; + RECT 0.435 150.415 0.485 150.545 ; + RECT 0.435 147.995 0.485 148.125 ; + RECT 0.435 147.075 0.485 147.205 ; + RECT 0.435 147.535 0.485 147.665 ; + RECT 0.435 145.115 0.485 145.245 ; + RECT 0.435 144.195 0.485 144.325 ; + RECT 0.435 144.655 0.485 144.785 ; + RECT 0.435 142.235 0.485 142.365 ; + RECT 0.435 141.315 0.485 141.445 ; + RECT 0.435 141.775 0.485 141.905 ; + RECT 0.435 139.355 0.485 139.485 ; + RECT 0.435 138.435 0.485 138.565 ; + RECT 0.435 138.895 0.485 139.025 ; + RECT 0.435 136.475 0.485 136.605 ; + RECT 0.435 135.555 0.485 135.685 ; + RECT 0.435 136.015 0.485 136.145 ; + RECT 0.435 133.595 0.485 133.725 ; + RECT 0.435 132.675 0.485 132.805 ; + RECT 0.435 133.135 0.485 133.265 ; + RECT 0.435 130.715 0.485 130.845 ; + RECT 0.435 129.795 0.485 129.925 ; + RECT 0.435 130.255 0.485 130.385 ; + RECT 0.435 127.835 0.485 127.965 ; + RECT 0.435 178.755 0.485 178.885 ; + RECT 0.435 179.215 0.485 179.345 ; + RECT 0.435 176.795 0.485 176.925 ; + RECT 0.435 126.915 0.485 127.045 ; + RECT 0.435 127.375 0.485 127.505 ; + RECT 0.435 124.955 0.485 125.085 ; + RECT 0.435 124.035 0.485 124.165 ; + RECT 0.435 124.495 0.485 124.625 ; + RECT 0.435 122.075 0.485 122.205 ; + RECT 0.435 121.155 0.485 121.285 ; + RECT 0.435 121.615 0.485 121.745 ; + RECT 0.435 119.195 0.485 119.325 ; + RECT 0.435 118.275 0.485 118.405 ; + RECT 0.435 118.735 0.485 118.865 ; + RECT 0.435 116.315 0.485 116.445 ; + RECT 0.435 115.395 0.485 115.525 ; + RECT 0.435 115.855 0.485 115.985 ; + RECT 0.435 113.435 0.485 113.565 ; + RECT 0.435 112.515 0.485 112.645 ; + RECT 0.435 112.975 0.485 113.105 ; + RECT 0.435 110.555 0.485 110.685 ; + RECT 0.435 109.635 0.485 109.765 ; + RECT 0.435 110.095 0.485 110.225 ; + RECT 0.435 107.675 0.485 107.805 ; + RECT 0.435 106.755 0.485 106.885 ; + RECT 0.435 107.215 0.485 107.345 ; + RECT 0.435 104.795 0.485 104.925 ; + RECT 0.435 103.875 0.485 104.005 ; + RECT 0.435 104.335 0.485 104.465 ; + RECT 0.435 101.915 0.485 102.045 ; + RECT 0.435 100.995 0.485 101.125 ; + RECT 0.435 101.455 0.485 101.585 ; + RECT 0.435 99.035 0.485 99.165 ; + RECT 0.435 175.875 0.485 176.005 ; + RECT 0.435 176.335 0.485 176.465 ; + RECT 0.435 173.915 0.485 174.045 ; + RECT 0.435 98.115 0.485 98.245 ; + RECT 0.435 98.575 0.485 98.705 ; + RECT 0.435 96.155 0.485 96.285 ; + RECT 0.435 95.235 0.485 95.365 ; + RECT 0.435 95.695 0.485 95.825 ; + RECT 0.435 93.275 0.485 93.405 ; + RECT 0.435 92.355 0.485 92.485 ; + RECT 0.435 92.815 0.485 92.945 ; + RECT 0.435 90.395 0.485 90.525 ; + RECT 0.435 89.475 0.485 89.605 ; + RECT 0.435 89.935 0.485 90.065 ; + RECT 0.435 87.515 0.485 87.645 ; + RECT 0.435 86.595 0.485 86.725 ; + RECT 0.435 87.055 0.485 87.185 ; + RECT 0.435 84.635 0.485 84.765 ; + RECT 0.435 83.715 0.485 83.845 ; + RECT 0.435 84.175 0.485 84.305 ; + RECT 0.435 81.755 0.485 81.885 ; + RECT 0.435 80.835 0.485 80.965 ; + RECT 0.435 81.295 0.485 81.425 ; + RECT 0.435 78.875 0.485 79.005 ; + RECT 0.435 77.955 0.485 78.085 ; + RECT 0.435 78.415 0.485 78.545 ; + RECT 0.435 75.995 0.485 76.125 ; + RECT 0.435 75.075 0.485 75.205 ; + RECT 0.435 75.535 0.485 75.665 ; + RECT 0.435 73.115 0.485 73.245 ; + RECT 0.435 72.195 0.485 72.325 ; + RECT 0.435 72.655 0.485 72.785 ; + RECT 0.435 70.235 0.485 70.365 ; + RECT 0.435 172.995 0.485 173.125 ; + RECT 0.435 173.455 0.485 173.585 ; + RECT 0.435 171.035 0.485 171.165 ; + RECT 0.435 69.315 0.485 69.445 ; + RECT 0.435 69.775 0.485 69.905 ; + RECT 0.435 67.355 0.485 67.485 ; + RECT 0.435 66.435 0.485 66.565 ; + RECT 0.435 66.895 0.485 67.025 ; + RECT 0.435 64.475 0.485 64.605 ; + RECT 0.435 63.555 0.485 63.685 ; + RECT 0.435 64.015 0.485 64.145 ; + RECT 0.435 61.595 0.485 61.725 ; + RECT 0.435 60.675 0.485 60.805 ; + RECT 0.435 61.135 0.485 61.265 ; + RECT 0.435 58.715 0.485 58.845 ; + RECT 0.435 57.795 0.485 57.925 ; + RECT 0.435 58.255 0.485 58.385 ; + RECT 0.435 55.835 0.485 55.965 ; + RECT 0.435 54.915 0.485 55.045 ; + RECT 0.435 55.375 0.485 55.505 ; + RECT 0.435 52.955 0.485 53.085 ; + RECT 0.435 52.035 0.485 52.165 ; + RECT 0.435 52.495 0.485 52.625 ; + RECT 0.435 50.075 0.485 50.205 ; + RECT 0.435 49.155 0.485 49.285 ; + RECT 0.435 49.615 0.485 49.745 ; + RECT 0.435 47.195 0.485 47.325 ; + RECT 0.435 46.275 0.485 46.405 ; + RECT 0.435 46.735 0.485 46.865 ; + RECT 0.435 44.315 0.485 44.445 ; + RECT 0.435 43.395 0.485 43.525 ; + RECT 0.435 43.855 0.485 43.985 ; + RECT 0.435 41.435 0.485 41.565 ; + RECT 0.435 170.115 0.485 170.245 ; + RECT 0.435 170.575 0.485 170.705 ; + RECT 0.435 168.155 0.485 168.285 ; + RECT 0.435 40.515 0.485 40.645 ; + RECT 0.435 40.975 0.485 41.105 ; + RECT 0.435 38.555 0.485 38.685 ; + RECT 0.435 37.635 0.485 37.765 ; + RECT 0.435 38.095 0.485 38.225 ; + RECT 0.435 35.675 0.485 35.805 ; + RECT 0.435 34.755 0.485 34.885 ; + RECT 0.435 35.215 0.485 35.345 ; + RECT 0.435 32.795 0.485 32.925 ; + RECT 0.435 31.875 0.485 32.005 ; + RECT 0.435 32.335 0.485 32.465 ; + RECT 0.435 29.915 0.485 30.045 ; + RECT 0.435 28.995 0.485 29.125 ; + RECT 0.435 29.455 0.485 29.585 ; + RECT 0.435 27.035 0.485 27.165 ; + RECT 0.435 26.115 0.485 26.245 ; + RECT 0.435 26.575 0.485 26.705 ; + RECT 0.435 24.155 0.485 24.285 ; + RECT 0.435 23.235 0.485 23.365 ; + RECT 0.435 23.695 0.485 23.825 ; + RECT 0.435 21.275 0.485 21.405 ; + RECT 0.435 20.355 0.485 20.485 ; + RECT 0.435 20.815 0.485 20.945 ; + RECT 0.435 18.395 0.485 18.525 ; + RECT 0.435 17.475 0.485 17.605 ; + RECT 0.435 17.935 0.485 18.065 ; + RECT 0.435 15.515 0.485 15.645 ; + RECT 0.435 14.595 0.485 14.725 ; + RECT 0.435 15.055 0.485 15.185 ; + RECT 0.435 12.635 0.485 12.765 ; + RECT 0.435 167.235 0.485 167.365 ; + RECT 0.435 167.695 0.485 167.825 ; + RECT 0.435 165.275 0.485 165.405 ; + RECT 0.435 11.715 0.485 11.845 ; + RECT 0.435 12.175 0.485 12.305 ; + RECT 0.435 9.755 0.485 9.885 ; + RECT 0.435 8.835 0.485 8.965 ; + RECT 0.435 9.295 0.485 9.425 ; + RECT 0.435 6.875 0.485 7.005 ; + RECT 0.435 5.955 0.485 6.085 ; + RECT 0.435 6.415 0.485 6.545 ; + RECT 0.435 3.995 0.485 4.125 ; + RECT 0.435 3.075 0.485 3.205 ; + RECT 0.435 3.535 0.485 3.665 ; + RECT 0.435 1.115 0.485 1.245 ; + RECT 0.435 164.355 0.485 164.485 ; + RECT 0.435 164.815 0.485 164.945 ; + RECT 0.435 162.395 0.485 162.525 ; + RECT 0.435 161.475 0.485 161.605 ; + RECT 0.435 161.935 0.485 162.065 ; + RECT 0.435 159.515 0.485 159.645 ; + RECT 0.435 158.595 0.485 158.725 ; + RECT 0.435 159.055 0.485 159.185 ; + RECT 0.435 156.635 0.485 156.765 ; + RECT 6.22 229.755 6.27 229.885 ; + RECT 7.5 229.755 7.55 229.885 ; + RECT 9.04 229.755 9.09 229.885 ; + RECT 9.315 229.755 9.365 229.885 ; + RECT 9.72 229.755 9.77 229.885 ; + RECT 11.025 229.755 11.075 229.885 ; + RECT 12.79 229.755 12.84 229.885 ; + RECT 6.225 232.175 6.275 232.305 ; + RECT 7.5 232.175 7.55 232.305 ; + RECT 9.04 232.175 9.09 232.305 ; + RECT 9.315 232.175 9.365 232.305 ; + RECT 11.025 232.175 11.075 232.305 ; + RECT 12.79 232.175 12.84 232.305 ; + RECT 7.18 232.405 7.23 232.535 ; + RECT 14.14 232.405 14.19 232.535 ; + RECT 8.56 229.755 8.61 229.885 ; + RECT 10.27 229.755 10.32 229.885 ; + RECT 8.56 232.175 8.61 232.305 ; + RECT 10.27 232.175 10.32 232.305 ; + RECT 6.22 232.635 6.27 232.765 ; + RECT 7.5 232.635 7.55 232.765 ; + RECT 9.04 232.635 9.09 232.765 ; + RECT 9.315 232.635 9.365 232.765 ; + RECT 9.72 232.635 9.77 232.765 ; + RECT 11.025 232.635 11.075 232.765 ; + RECT 12.79 232.635 12.84 232.765 ; + RECT 6.225 235.055 6.275 235.185 ; + RECT 7.5 235.055 7.55 235.185 ; + RECT 9.04 235.055 9.09 235.185 ; + RECT 9.315 235.055 9.365 235.185 ; + RECT 11.025 235.055 11.075 235.185 ; + RECT 12.79 235.055 12.84 235.185 ; + RECT 7.18 235.285 7.23 235.415 ; + RECT 14.14 235.285 14.19 235.415 ; + RECT 8.56 232.635 8.61 232.765 ; + RECT 10.27 232.635 10.32 232.765 ; + RECT 8.56 235.055 8.61 235.185 ; + RECT 10.27 235.055 10.32 235.185 ; + RECT 6.22 235.515 6.27 235.645 ; + RECT 7.5 235.515 7.55 235.645 ; + RECT 9.04 235.515 9.09 235.645 ; + RECT 9.315 235.515 9.365 235.645 ; + RECT 9.72 235.515 9.77 235.645 ; + RECT 11.025 235.515 11.075 235.645 ; + RECT 12.79 235.515 12.84 235.645 ; + RECT 6.225 237.935 6.275 238.065 ; + RECT 7.5 237.935 7.55 238.065 ; + RECT 9.04 237.935 9.09 238.065 ; + RECT 9.315 237.935 9.365 238.065 ; + RECT 11.025 237.935 11.075 238.065 ; + RECT 12.79 237.935 12.84 238.065 ; + RECT 7.18 238.165 7.23 238.295 ; + RECT 14.14 238.165 14.19 238.295 ; + RECT 8.56 235.515 8.61 235.645 ; + RECT 10.27 235.515 10.32 235.645 ; + RECT 8.56 237.935 8.61 238.065 ; + RECT 10.27 237.935 10.32 238.065 ; + RECT 6.22 238.395 6.27 238.525 ; + RECT 7.5 238.395 7.55 238.525 ; + RECT 9.04 238.395 9.09 238.525 ; + RECT 9.315 238.395 9.365 238.525 ; + RECT 9.72 238.395 9.77 238.525 ; + RECT 11.025 238.395 11.075 238.525 ; + RECT 12.79 238.395 12.84 238.525 ; + RECT 6.225 240.815 6.275 240.945 ; + RECT 7.5 240.815 7.55 240.945 ; + RECT 9.04 240.815 9.09 240.945 ; + RECT 9.315 240.815 9.365 240.945 ; + RECT 11.025 240.815 11.075 240.945 ; + RECT 12.79 240.815 12.84 240.945 ; + RECT 7.18 241.045 7.23 241.175 ; + RECT 14.14 241.045 14.19 241.175 ; + RECT 8.56 238.395 8.61 238.525 ; + RECT 10.27 238.395 10.32 238.525 ; + RECT 8.56 240.815 8.61 240.945 ; + RECT 10.27 240.815 10.32 240.945 ; + RECT 6.22 241.275 6.27 241.405 ; + RECT 7.5 241.275 7.55 241.405 ; + RECT 9.04 241.275 9.09 241.405 ; + RECT 9.315 241.275 9.365 241.405 ; + RECT 9.72 241.275 9.77 241.405 ; + RECT 11.025 241.275 11.075 241.405 ; + RECT 12.79 241.275 12.84 241.405 ; + RECT 6.225 243.695 6.275 243.825 ; + RECT 7.5 243.695 7.55 243.825 ; + RECT 9.04 243.695 9.09 243.825 ; + RECT 9.315 243.695 9.365 243.825 ; + RECT 11.025 243.695 11.075 243.825 ; + RECT 12.79 243.695 12.84 243.825 ; + RECT 7.18 243.925 7.23 244.055 ; + RECT 14.14 243.925 14.19 244.055 ; + RECT 8.56 241.275 8.61 241.405 ; + RECT 10.27 241.275 10.32 241.405 ; + RECT 8.56 243.695 8.61 243.825 ; + RECT 10.27 243.695 10.32 243.825 ; + RECT 6.22 244.155 6.27 244.285 ; + RECT 7.5 244.155 7.55 244.285 ; + RECT 9.04 244.155 9.09 244.285 ; + RECT 9.315 244.155 9.365 244.285 ; + RECT 9.72 244.155 9.77 244.285 ; + RECT 11.025 244.155 11.075 244.285 ; + RECT 12.79 244.155 12.84 244.285 ; + RECT 6.225 246.575 6.275 246.705 ; + RECT 7.5 246.575 7.55 246.705 ; + RECT 9.04 246.575 9.09 246.705 ; + RECT 9.315 246.575 9.365 246.705 ; + RECT 11.025 246.575 11.075 246.705 ; + RECT 12.79 246.575 12.84 246.705 ; + RECT 7.18 246.805 7.23 246.935 ; + RECT 14.14 246.805 14.19 246.935 ; + RECT 8.56 244.155 8.61 244.285 ; + RECT 10.27 244.155 10.32 244.285 ; + RECT 8.56 246.575 8.61 246.705 ; + RECT 10.27 246.575 10.32 246.705 ; + RECT 6.22 247.035 6.27 247.165 ; + RECT 7.5 247.035 7.55 247.165 ; + RECT 9.04 247.035 9.09 247.165 ; + RECT 9.315 247.035 9.365 247.165 ; + RECT 9.72 247.035 9.77 247.165 ; + RECT 11.025 247.035 11.075 247.165 ; + RECT 12.79 247.035 12.84 247.165 ; + RECT 6.225 249.455 6.275 249.585 ; + RECT 7.5 249.455 7.55 249.585 ; + RECT 9.04 249.455 9.09 249.585 ; + RECT 9.315 249.455 9.365 249.585 ; + RECT 11.025 249.455 11.075 249.585 ; + RECT 12.79 249.455 12.84 249.585 ; + RECT 7.18 249.685 7.23 249.815 ; + RECT 14.14 249.685 14.19 249.815 ; + RECT 8.56 247.035 8.61 247.165 ; + RECT 10.27 247.035 10.32 247.165 ; + RECT 8.56 249.455 8.61 249.585 ; + RECT 10.27 249.455 10.32 249.585 ; + RECT 6.22 249.915 6.27 250.045 ; + RECT 7.5 249.915 7.55 250.045 ; + RECT 9.04 249.915 9.09 250.045 ; + RECT 9.315 249.915 9.365 250.045 ; + RECT 9.72 249.915 9.77 250.045 ; + RECT 11.025 249.915 11.075 250.045 ; + RECT 12.79 249.915 12.84 250.045 ; + RECT 6.225 252.335 6.275 252.465 ; + RECT 7.5 252.335 7.55 252.465 ; + RECT 9.04 252.335 9.09 252.465 ; + RECT 9.315 252.335 9.365 252.465 ; + RECT 11.025 252.335 11.075 252.465 ; + RECT 12.79 252.335 12.84 252.465 ; + RECT 7.18 252.565 7.23 252.695 ; + RECT 14.14 252.565 14.19 252.695 ; + RECT 8.56 249.915 8.61 250.045 ; + RECT 10.27 249.915 10.32 250.045 ; + RECT 8.56 252.335 8.61 252.465 ; + RECT 10.27 252.335 10.32 252.465 ; + RECT 6.22 252.795 6.27 252.925 ; + RECT 7.5 252.795 7.55 252.925 ; + RECT 9.04 252.795 9.09 252.925 ; + RECT 9.315 252.795 9.365 252.925 ; + RECT 9.72 252.795 9.77 252.925 ; + RECT 11.025 252.795 11.075 252.925 ; + RECT 12.79 252.795 12.84 252.925 ; + RECT 6.225 255.215 6.275 255.345 ; + RECT 7.5 255.215 7.55 255.345 ; + RECT 9.04 255.215 9.09 255.345 ; + RECT 9.315 255.215 9.365 255.345 ; + RECT 11.025 255.215 11.075 255.345 ; + RECT 12.79 255.215 12.84 255.345 ; + RECT 7.18 255.445 7.23 255.575 ; + RECT 14.14 255.445 14.19 255.575 ; + RECT 8.56 252.795 8.61 252.925 ; + RECT 10.27 252.795 10.32 252.925 ; + RECT 8.56 255.215 8.61 255.345 ; + RECT 10.27 255.215 10.32 255.345 ; + RECT 6.22 255.675 6.27 255.805 ; + RECT 7.5 255.675 7.55 255.805 ; + RECT 9.04 255.675 9.09 255.805 ; + RECT 9.315 255.675 9.365 255.805 ; + RECT 9.72 255.675 9.77 255.805 ; + RECT 11.025 255.675 11.075 255.805 ; + RECT 12.79 255.675 12.84 255.805 ; + RECT 6.225 258.095 6.275 258.225 ; + RECT 7.5 258.095 7.55 258.225 ; + RECT 9.04 258.095 9.09 258.225 ; + RECT 9.315 258.095 9.365 258.225 ; + RECT 11.025 258.095 11.075 258.225 ; + RECT 12.79 258.095 12.84 258.225 ; + RECT 7.18 258.325 7.23 258.455 ; + RECT 14.14 258.325 14.19 258.455 ; + RECT 8.56 255.675 8.61 255.805 ; + RECT 10.27 255.675 10.32 255.805 ; + RECT 8.56 258.095 8.61 258.225 ; + RECT 10.27 258.095 10.32 258.225 ; + RECT 6.22 258.555 6.27 258.685 ; + RECT 7.5 258.555 7.55 258.685 ; + RECT 9.04 258.555 9.09 258.685 ; + RECT 9.315 258.555 9.365 258.685 ; + RECT 9.72 258.555 9.77 258.685 ; + RECT 11.025 258.555 11.075 258.685 ; + RECT 12.79 258.555 12.84 258.685 ; + RECT 6.225 260.975 6.275 261.105 ; + RECT 7.5 260.975 7.55 261.105 ; + RECT 9.04 260.975 9.09 261.105 ; + RECT 9.315 260.975 9.365 261.105 ; + RECT 11.025 260.975 11.075 261.105 ; + RECT 12.79 260.975 12.84 261.105 ; + RECT 7.18 261.205 7.23 261.335 ; + RECT 14.14 261.205 14.19 261.335 ; + RECT 8.56 258.555 8.61 258.685 ; + RECT 10.27 258.555 10.32 258.685 ; + RECT 8.56 260.975 8.61 261.105 ; + RECT 10.27 260.975 10.32 261.105 ; + RECT 6.22 261.435 6.27 261.565 ; + RECT 7.5 261.435 7.55 261.565 ; + RECT 9.04 261.435 9.09 261.565 ; + RECT 9.315 261.435 9.365 261.565 ; + RECT 9.72 261.435 9.77 261.565 ; + RECT 11.025 261.435 11.075 261.565 ; + RECT 12.79 261.435 12.84 261.565 ; + RECT 6.225 263.855 6.275 263.985 ; + RECT 7.5 263.855 7.55 263.985 ; + RECT 9.04 263.855 9.09 263.985 ; + RECT 9.315 263.855 9.365 263.985 ; + RECT 11.025 263.855 11.075 263.985 ; + RECT 12.79 263.855 12.84 263.985 ; + RECT 7.18 264.085 7.23 264.215 ; + RECT 14.14 264.085 14.19 264.215 ; + RECT 8.56 261.435 8.61 261.565 ; + RECT 10.27 261.435 10.32 261.565 ; + RECT 8.56 263.855 8.61 263.985 ; + RECT 10.27 263.855 10.32 263.985 ; + RECT 6.22 264.315 6.27 264.445 ; + RECT 7.5 264.315 7.55 264.445 ; + RECT 9.04 264.315 9.09 264.445 ; + RECT 9.315 264.315 9.365 264.445 ; + RECT 9.72 264.315 9.77 264.445 ; + RECT 11.025 264.315 11.075 264.445 ; + RECT 12.79 264.315 12.84 264.445 ; + RECT 6.225 266.735 6.275 266.865 ; + RECT 7.5 266.735 7.55 266.865 ; + RECT 9.04 266.735 9.09 266.865 ; + RECT 9.315 266.735 9.365 266.865 ; + RECT 11.025 266.735 11.075 266.865 ; + RECT 12.79 266.735 12.84 266.865 ; + RECT 7.18 266.965 7.23 267.095 ; + RECT 14.14 266.965 14.19 267.095 ; + RECT 8.56 264.315 8.61 264.445 ; + RECT 10.27 264.315 10.32 264.445 ; + RECT 8.56 266.735 8.61 266.865 ; + RECT 10.27 266.735 10.32 266.865 ; + RECT 6.22 267.195 6.27 267.325 ; + RECT 7.5 267.195 7.55 267.325 ; + RECT 9.04 267.195 9.09 267.325 ; + RECT 9.315 267.195 9.365 267.325 ; + RECT 9.72 267.195 9.77 267.325 ; + RECT 11.025 267.195 11.075 267.325 ; + RECT 12.79 267.195 12.84 267.325 ; + RECT 6.225 269.615 6.275 269.745 ; + RECT 7.5 269.615 7.55 269.745 ; + RECT 9.04 269.615 9.09 269.745 ; + RECT 9.315 269.615 9.365 269.745 ; + RECT 11.025 269.615 11.075 269.745 ; + RECT 12.79 269.615 12.84 269.745 ; + RECT 7.18 269.845 7.23 269.975 ; + RECT 14.14 269.845 14.19 269.975 ; + RECT 8.56 267.195 8.61 267.325 ; + RECT 10.27 267.195 10.32 267.325 ; + RECT 8.56 269.615 8.61 269.745 ; + RECT 10.27 269.615 10.32 269.745 ; + RECT 6.22 270.075 6.27 270.205 ; + RECT 7.5 270.075 7.55 270.205 ; + RECT 9.04 270.075 9.09 270.205 ; + RECT 9.315 270.075 9.365 270.205 ; + RECT 9.72 270.075 9.77 270.205 ; + RECT 11.025 270.075 11.075 270.205 ; + RECT 12.79 270.075 12.84 270.205 ; + RECT 6.225 272.495 6.275 272.625 ; + RECT 7.5 272.495 7.55 272.625 ; + RECT 9.04 272.495 9.09 272.625 ; + RECT 9.315 272.495 9.365 272.625 ; + RECT 11.025 272.495 11.075 272.625 ; + RECT 12.79 272.495 12.84 272.625 ; + RECT 7.18 272.725 7.23 272.855 ; + RECT 14.14 272.725 14.19 272.855 ; + RECT 8.56 270.075 8.61 270.205 ; + RECT 10.27 270.075 10.32 270.205 ; + RECT 8.56 272.495 8.61 272.625 ; + RECT 10.27 272.495 10.32 272.625 ; + RECT 6.22 272.955 6.27 273.085 ; + RECT 7.5 272.955 7.55 273.085 ; + RECT 9.04 272.955 9.09 273.085 ; + RECT 9.315 272.955 9.365 273.085 ; + RECT 9.72 272.955 9.77 273.085 ; + RECT 11.025 272.955 11.075 273.085 ; + RECT 12.79 272.955 12.84 273.085 ; + RECT 6.225 275.375 6.275 275.505 ; + RECT 7.5 275.375 7.55 275.505 ; + RECT 9.04 275.375 9.09 275.505 ; + RECT 9.315 275.375 9.365 275.505 ; + RECT 11.025 275.375 11.075 275.505 ; + RECT 12.79 275.375 12.84 275.505 ; + RECT 7.18 275.605 7.23 275.735 ; + RECT 14.14 275.605 14.19 275.735 ; + RECT 8.56 272.955 8.61 273.085 ; + RECT 10.27 272.955 10.32 273.085 ; + RECT 8.56 275.375 8.61 275.505 ; + RECT 10.27 275.375 10.32 275.505 ; + RECT 6.22 275.835 6.27 275.965 ; + RECT 7.5 275.835 7.55 275.965 ; + RECT 9.04 275.835 9.09 275.965 ; + RECT 9.315 275.835 9.365 275.965 ; + RECT 9.72 275.835 9.77 275.965 ; + RECT 11.025 275.835 11.075 275.965 ; + RECT 12.79 275.835 12.84 275.965 ; + RECT 6.225 278.255 6.275 278.385 ; + RECT 7.5 278.255 7.55 278.385 ; + RECT 9.04 278.255 9.09 278.385 ; + RECT 9.315 278.255 9.365 278.385 ; + RECT 11.025 278.255 11.075 278.385 ; + RECT 12.79 278.255 12.84 278.385 ; + RECT 7.18 278.485 7.23 278.615 ; + RECT 14.14 278.485 14.19 278.615 ; + RECT 8.56 275.835 8.61 275.965 ; + RECT 10.27 275.835 10.32 275.965 ; + RECT 8.56 278.255 8.61 278.385 ; + RECT 10.27 278.255 10.32 278.385 ; + RECT 6.22 278.715 6.27 278.845 ; + RECT 7.5 278.715 7.55 278.845 ; + RECT 9.04 278.715 9.09 278.845 ; + RECT 9.315 278.715 9.365 278.845 ; + RECT 9.72 278.715 9.77 278.845 ; + RECT 11.025 278.715 11.075 278.845 ; + RECT 12.79 278.715 12.84 278.845 ; + RECT 6.225 281.135 6.275 281.265 ; + RECT 7.5 281.135 7.55 281.265 ; + RECT 9.04 281.135 9.09 281.265 ; + RECT 9.315 281.135 9.365 281.265 ; + RECT 11.025 281.135 11.075 281.265 ; + RECT 12.79 281.135 12.84 281.265 ; + RECT 7.18 281.365 7.23 281.495 ; + RECT 14.14 281.365 14.19 281.495 ; + RECT 8.56 278.715 8.61 278.845 ; + RECT 10.27 278.715 10.32 278.845 ; + RECT 8.56 281.135 8.61 281.265 ; + RECT 10.27 281.135 10.32 281.265 ; + RECT 6.22 281.595 6.27 281.725 ; + RECT 7.5 281.595 7.55 281.725 ; + RECT 9.04 281.595 9.09 281.725 ; + RECT 9.315 281.595 9.365 281.725 ; + RECT 9.72 281.595 9.77 281.725 ; + RECT 11.025 281.595 11.075 281.725 ; + RECT 12.79 281.595 12.84 281.725 ; + RECT 6.225 284.015 6.275 284.145 ; + RECT 7.5 284.015 7.55 284.145 ; + RECT 9.04 284.015 9.09 284.145 ; + RECT 9.315 284.015 9.365 284.145 ; + RECT 11.025 284.015 11.075 284.145 ; + RECT 12.79 284.015 12.84 284.145 ; + RECT 7.18 284.245 7.23 284.375 ; + RECT 14.14 284.245 14.19 284.375 ; + RECT 8.56 281.595 8.61 281.725 ; + RECT 10.27 281.595 10.32 281.725 ; + RECT 8.56 284.015 8.61 284.145 ; + RECT 10.27 284.015 10.32 284.145 ; + RECT 6.22 284.475 6.27 284.605 ; + RECT 7.5 284.475 7.55 284.605 ; + RECT 9.04 284.475 9.09 284.605 ; + RECT 9.315 284.475 9.365 284.605 ; + RECT 9.72 284.475 9.77 284.605 ; + RECT 11.025 284.475 11.075 284.605 ; + RECT 12.79 284.475 12.84 284.605 ; + RECT 6.225 286.895 6.275 287.025 ; + RECT 7.5 286.895 7.55 287.025 ; + RECT 9.04 286.895 9.09 287.025 ; + RECT 9.315 286.895 9.365 287.025 ; + RECT 11.025 286.895 11.075 287.025 ; + RECT 12.79 286.895 12.84 287.025 ; + RECT 7.18 287.125 7.23 287.255 ; + RECT 14.14 287.125 14.19 287.255 ; + RECT 8.56 284.475 8.61 284.605 ; + RECT 10.27 284.475 10.32 284.605 ; + RECT 8.56 286.895 8.61 287.025 ; + RECT 10.27 286.895 10.32 287.025 ; + RECT 6.22 287.355 6.27 287.485 ; + RECT 7.5 287.355 7.55 287.485 ; + RECT 9.04 287.355 9.09 287.485 ; + RECT 9.315 287.355 9.365 287.485 ; + RECT 9.72 287.355 9.77 287.485 ; + RECT 11.025 287.355 11.075 287.485 ; + RECT 12.79 287.355 12.84 287.485 ; + RECT 6.225 289.775 6.275 289.905 ; + RECT 7.5 289.775 7.55 289.905 ; + RECT 9.04 289.775 9.09 289.905 ; + RECT 9.315 289.775 9.365 289.905 ; + RECT 11.025 289.775 11.075 289.905 ; + RECT 12.79 289.775 12.84 289.905 ; + RECT 7.18 290.005 7.23 290.135 ; + RECT 14.14 290.005 14.19 290.135 ; + RECT 8.56 287.355 8.61 287.485 ; + RECT 10.27 287.355 10.32 287.485 ; + RECT 8.56 289.775 8.61 289.905 ; + RECT 10.27 289.775 10.32 289.905 ; + RECT 6.22 290.235 6.27 290.365 ; + RECT 7.5 290.235 7.55 290.365 ; + RECT 9.04 290.235 9.09 290.365 ; + RECT 9.315 290.235 9.365 290.365 ; + RECT 9.72 290.235 9.77 290.365 ; + RECT 11.025 290.235 11.075 290.365 ; + RECT 12.79 290.235 12.84 290.365 ; + RECT 6.225 292.655 6.275 292.785 ; + RECT 7.5 292.655 7.55 292.785 ; + RECT 9.04 292.655 9.09 292.785 ; + RECT 9.315 292.655 9.365 292.785 ; + RECT 11.025 292.655 11.075 292.785 ; + RECT 12.79 292.655 12.84 292.785 ; + RECT 7.18 292.885 7.23 293.015 ; + RECT 14.14 292.885 14.19 293.015 ; + RECT 8.56 290.235 8.61 290.365 ; + RECT 10.27 290.235 10.32 290.365 ; + RECT 8.56 292.655 8.61 292.785 ; + RECT 10.27 292.655 10.32 292.785 ; + RECT 6.22 293.115 6.27 293.245 ; + RECT 7.5 293.115 7.55 293.245 ; + RECT 9.04 293.115 9.09 293.245 ; + RECT 9.315 293.115 9.365 293.245 ; + RECT 9.72 293.115 9.77 293.245 ; + RECT 11.025 293.115 11.075 293.245 ; + RECT 12.79 293.115 12.84 293.245 ; + RECT 6.225 295.535 6.275 295.665 ; + RECT 7.5 295.535 7.55 295.665 ; + RECT 9.04 295.535 9.09 295.665 ; + RECT 9.315 295.535 9.365 295.665 ; + RECT 11.025 295.535 11.075 295.665 ; + RECT 12.79 295.535 12.84 295.665 ; + RECT 7.18 295.765 7.23 295.895 ; + RECT 14.14 295.765 14.19 295.895 ; + RECT 8.56 293.115 8.61 293.245 ; + RECT 10.27 293.115 10.32 293.245 ; + RECT 8.56 295.535 8.61 295.665 ; + RECT 10.27 295.535 10.32 295.665 ; + RECT 6.22 295.995 6.27 296.125 ; + RECT 7.5 295.995 7.55 296.125 ; + RECT 9.04 295.995 9.09 296.125 ; + RECT 9.315 295.995 9.365 296.125 ; + RECT 9.72 295.995 9.77 296.125 ; + RECT 11.025 295.995 11.075 296.125 ; + RECT 12.79 295.995 12.84 296.125 ; + RECT 6.225 298.415 6.275 298.545 ; + RECT 7.5 298.415 7.55 298.545 ; + RECT 9.04 298.415 9.09 298.545 ; + RECT 9.315 298.415 9.365 298.545 ; + RECT 11.025 298.415 11.075 298.545 ; + RECT 12.79 298.415 12.84 298.545 ; + RECT 7.18 298.645 7.23 298.775 ; + RECT 14.14 298.645 14.19 298.775 ; + RECT 8.56 295.995 8.61 296.125 ; + RECT 10.27 295.995 10.32 296.125 ; + RECT 8.56 298.415 8.61 298.545 ; + RECT 10.27 298.415 10.32 298.545 ; + RECT 6.22 298.875 6.27 299.005 ; + RECT 7.5 298.875 7.55 299.005 ; + RECT 9.04 298.875 9.09 299.005 ; + RECT 9.315 298.875 9.365 299.005 ; + RECT 9.72 298.875 9.77 299.005 ; + RECT 11.025 298.875 11.075 299.005 ; + RECT 12.79 298.875 12.84 299.005 ; + RECT 6.225 301.295 6.275 301.425 ; + RECT 7.5 301.295 7.55 301.425 ; + RECT 9.04 301.295 9.09 301.425 ; + RECT 9.315 301.295 9.365 301.425 ; + RECT 11.025 301.295 11.075 301.425 ; + RECT 12.79 301.295 12.84 301.425 ; + RECT 7.18 301.525 7.23 301.655 ; + RECT 14.14 301.525 14.19 301.655 ; + RECT 8.56 298.875 8.61 299.005 ; + RECT 10.27 298.875 10.32 299.005 ; + RECT 8.56 301.295 8.61 301.425 ; + RECT 10.27 301.295 10.32 301.425 ; + RECT 6.22 301.755 6.27 301.885 ; + RECT 7.5 301.755 7.55 301.885 ; + RECT 9.04 301.755 9.09 301.885 ; + RECT 9.315 301.755 9.365 301.885 ; + RECT 9.72 301.755 9.77 301.885 ; + RECT 11.025 301.755 11.075 301.885 ; + RECT 12.79 301.755 12.84 301.885 ; + RECT 6.225 304.175 6.275 304.305 ; + RECT 7.5 304.175 7.55 304.305 ; + RECT 9.04 304.175 9.09 304.305 ; + RECT 9.315 304.175 9.365 304.305 ; + RECT 11.025 304.175 11.075 304.305 ; + RECT 12.79 304.175 12.84 304.305 ; + RECT 7.18 304.405 7.23 304.535 ; + RECT 14.14 304.405 14.19 304.535 ; + RECT 8.56 301.755 8.61 301.885 ; + RECT 10.27 301.755 10.32 301.885 ; + RECT 8.56 304.175 8.61 304.305 ; + RECT 10.27 304.175 10.32 304.305 ; + RECT 6.22 304.635 6.27 304.765 ; + RECT 7.5 304.635 7.55 304.765 ; + RECT 9.04 304.635 9.09 304.765 ; + RECT 9.315 304.635 9.365 304.765 ; + RECT 9.72 304.635 9.77 304.765 ; + RECT 11.025 304.635 11.075 304.765 ; + RECT 12.79 304.635 12.84 304.765 ; + RECT 6.225 307.055 6.275 307.185 ; + RECT 7.5 307.055 7.55 307.185 ; + RECT 9.04 307.055 9.09 307.185 ; + RECT 9.315 307.055 9.365 307.185 ; + RECT 11.025 307.055 11.075 307.185 ; + RECT 12.79 307.055 12.84 307.185 ; + RECT 7.18 307.285 7.23 307.415 ; + RECT 14.14 307.285 14.19 307.415 ; + RECT 8.56 304.635 8.61 304.765 ; + RECT 10.27 304.635 10.32 304.765 ; + RECT 8.56 307.055 8.61 307.185 ; + RECT 10.27 307.055 10.32 307.185 ; + RECT 6.22 307.515 6.27 307.645 ; + RECT 7.5 307.515 7.55 307.645 ; + RECT 9.04 307.515 9.09 307.645 ; + RECT 9.315 307.515 9.365 307.645 ; + RECT 9.72 307.515 9.77 307.645 ; + RECT 11.025 307.515 11.075 307.645 ; + RECT 12.79 307.515 12.84 307.645 ; + RECT 6.225 309.935 6.275 310.065 ; + RECT 7.5 309.935 7.55 310.065 ; + RECT 9.04 309.935 9.09 310.065 ; + RECT 9.315 309.935 9.365 310.065 ; + RECT 11.025 309.935 11.075 310.065 ; + RECT 12.79 309.935 12.84 310.065 ; + RECT 7.18 310.165 7.23 310.295 ; + RECT 14.14 310.165 14.19 310.295 ; + RECT 8.56 307.515 8.61 307.645 ; + RECT 10.27 307.515 10.32 307.645 ; + RECT 8.56 309.935 8.61 310.065 ; + RECT 10.27 309.935 10.32 310.065 ; + RECT 6.22 310.395 6.27 310.525 ; + RECT 7.5 310.395 7.55 310.525 ; + RECT 9.04 310.395 9.09 310.525 ; + RECT 9.315 310.395 9.365 310.525 ; + RECT 9.72 310.395 9.77 310.525 ; + RECT 11.025 310.395 11.075 310.525 ; + RECT 12.79 310.395 12.84 310.525 ; + RECT 6.225 312.815 6.275 312.945 ; + RECT 7.5 312.815 7.55 312.945 ; + RECT 9.04 312.815 9.09 312.945 ; + RECT 9.315 312.815 9.365 312.945 ; + RECT 11.025 312.815 11.075 312.945 ; + RECT 12.79 312.815 12.84 312.945 ; + RECT 7.18 313.045 7.23 313.175 ; + RECT 14.14 313.045 14.19 313.175 ; + RECT 8.56 310.395 8.61 310.525 ; + RECT 10.27 310.395 10.32 310.525 ; + RECT 8.56 312.815 8.61 312.945 ; + RECT 10.27 312.815 10.32 312.945 ; + RECT 6.22 313.275 6.27 313.405 ; + RECT 7.5 313.275 7.55 313.405 ; + RECT 9.04 313.275 9.09 313.405 ; + RECT 9.315 313.275 9.365 313.405 ; + RECT 9.72 313.275 9.77 313.405 ; + RECT 11.025 313.275 11.075 313.405 ; + RECT 12.79 313.275 12.84 313.405 ; + RECT 6.225 315.695 6.275 315.825 ; + RECT 7.5 315.695 7.55 315.825 ; + RECT 9.04 315.695 9.09 315.825 ; + RECT 9.315 315.695 9.365 315.825 ; + RECT 11.025 315.695 11.075 315.825 ; + RECT 12.79 315.695 12.84 315.825 ; + RECT 7.18 315.925 7.23 316.055 ; + RECT 14.14 315.925 14.19 316.055 ; + RECT 8.56 313.275 8.61 313.405 ; + RECT 10.27 313.275 10.32 313.405 ; + RECT 8.56 315.695 8.61 315.825 ; + RECT 10.27 315.695 10.32 315.825 ; + RECT 6.22 316.155 6.27 316.285 ; + RECT 7.5 316.155 7.55 316.285 ; + RECT 9.04 316.155 9.09 316.285 ; + RECT 9.315 316.155 9.365 316.285 ; + RECT 9.72 316.155 9.77 316.285 ; + RECT 11.025 316.155 11.075 316.285 ; + RECT 12.79 316.155 12.84 316.285 ; + RECT 6.225 318.575 6.275 318.705 ; + RECT 7.5 318.575 7.55 318.705 ; + RECT 9.04 318.575 9.09 318.705 ; + RECT 9.315 318.575 9.365 318.705 ; + RECT 11.025 318.575 11.075 318.705 ; + RECT 12.79 318.575 12.84 318.705 ; + RECT 7.18 318.805 7.23 318.935 ; + RECT 14.14 318.805 14.19 318.935 ; + RECT 8.56 316.155 8.61 316.285 ; + RECT 10.27 316.155 10.32 316.285 ; + RECT 8.56 318.575 8.61 318.705 ; + RECT 10.27 318.575 10.32 318.705 ; + RECT 6.22 319.035 6.27 319.165 ; + RECT 7.5 319.035 7.55 319.165 ; + RECT 9.04 319.035 9.09 319.165 ; + RECT 9.315 319.035 9.365 319.165 ; + RECT 9.72 319.035 9.77 319.165 ; + RECT 11.025 319.035 11.075 319.165 ; + RECT 12.79 319.035 12.84 319.165 ; + RECT 6.225 321.455 6.275 321.585 ; + RECT 7.5 321.455 7.55 321.585 ; + RECT 9.04 321.455 9.09 321.585 ; + RECT 9.315 321.455 9.365 321.585 ; + RECT 11.025 321.455 11.075 321.585 ; + RECT 12.79 321.455 12.84 321.585 ; + RECT 7.18 321.685 7.23 321.815 ; + RECT 14.14 321.685 14.19 321.815 ; + RECT 8.56 319.035 8.61 319.165 ; + RECT 10.27 319.035 10.32 319.165 ; + RECT 8.56 321.455 8.61 321.585 ; + RECT 10.27 321.455 10.32 321.585 ; + RECT 6.22 321.915 6.27 322.045 ; + RECT 7.5 321.915 7.55 322.045 ; + RECT 9.04 321.915 9.09 322.045 ; + RECT 9.315 321.915 9.365 322.045 ; + RECT 9.72 321.915 9.77 322.045 ; + RECT 11.025 321.915 11.075 322.045 ; + RECT 12.79 321.915 12.84 322.045 ; + RECT 6.225 324.335 6.275 324.465 ; + RECT 7.5 324.335 7.55 324.465 ; + RECT 9.04 324.335 9.09 324.465 ; + RECT 9.315 324.335 9.365 324.465 ; + RECT 11.025 324.335 11.075 324.465 ; + RECT 12.79 324.335 12.84 324.465 ; + RECT 7.18 324.565 7.23 324.695 ; + RECT 14.14 324.565 14.19 324.695 ; + RECT 8.56 321.915 8.61 322.045 ; + RECT 10.27 321.915 10.32 322.045 ; + RECT 8.56 324.335 8.61 324.465 ; + RECT 10.27 324.335 10.32 324.465 ; + RECT 6.22 324.795 6.27 324.925 ; + RECT 7.5 324.795 7.55 324.925 ; + RECT 9.04 324.795 9.09 324.925 ; + RECT 9.315 324.795 9.365 324.925 ; + RECT 9.72 324.795 9.77 324.925 ; + RECT 11.025 324.795 11.075 324.925 ; + RECT 12.79 324.795 12.84 324.925 ; + RECT 6.225 327.215 6.275 327.345 ; + RECT 7.5 327.215 7.55 327.345 ; + RECT 9.04 327.215 9.09 327.345 ; + RECT 9.315 327.215 9.365 327.345 ; + RECT 11.025 327.215 11.075 327.345 ; + RECT 12.79 327.215 12.84 327.345 ; + RECT 7.18 327.445 7.23 327.575 ; + RECT 14.14 327.445 14.19 327.575 ; + RECT 8.56 324.795 8.61 324.925 ; + RECT 10.27 324.795 10.32 324.925 ; + RECT 8.56 327.215 8.61 327.345 ; + RECT 10.27 327.215 10.32 327.345 ; + RECT 6.22 327.675 6.27 327.805 ; + RECT 7.5 327.675 7.55 327.805 ; + RECT 9.04 327.675 9.09 327.805 ; + RECT 9.315 327.675 9.365 327.805 ; + RECT 9.72 327.675 9.77 327.805 ; + RECT 11.025 327.675 11.075 327.805 ; + RECT 12.79 327.675 12.84 327.805 ; + RECT 6.225 330.095 6.275 330.225 ; + RECT 7.5 330.095 7.55 330.225 ; + RECT 9.04 330.095 9.09 330.225 ; + RECT 9.315 330.095 9.365 330.225 ; + RECT 11.025 330.095 11.075 330.225 ; + RECT 12.79 330.095 12.84 330.225 ; + RECT 7.18 330.325 7.23 330.455 ; + RECT 14.14 330.325 14.19 330.455 ; + RECT 8.56 327.675 8.61 327.805 ; + RECT 10.27 327.675 10.32 327.805 ; + RECT 8.56 330.095 8.61 330.225 ; + RECT 10.27 330.095 10.32 330.225 ; + RECT 6.22 330.555 6.27 330.685 ; + RECT 7.5 330.555 7.55 330.685 ; + RECT 9.04 330.555 9.09 330.685 ; + RECT 9.315 330.555 9.365 330.685 ; + RECT 9.72 330.555 9.77 330.685 ; + RECT 11.025 330.555 11.075 330.685 ; + RECT 12.79 330.555 12.84 330.685 ; + RECT 6.225 332.975 6.275 333.105 ; + RECT 7.5 332.975 7.55 333.105 ; + RECT 9.04 332.975 9.09 333.105 ; + RECT 9.315 332.975 9.365 333.105 ; + RECT 11.025 332.975 11.075 333.105 ; + RECT 12.79 332.975 12.84 333.105 ; + RECT 7.18 333.205 7.23 333.335 ; + RECT 14.14 333.205 14.19 333.335 ; + RECT 8.56 330.555 8.61 330.685 ; + RECT 10.27 330.555 10.32 330.685 ; + RECT 8.56 332.975 8.61 333.105 ; + RECT 10.27 332.975 10.32 333.105 ; + RECT 6.22 333.435 6.27 333.565 ; + RECT 7.5 333.435 7.55 333.565 ; + RECT 9.04 333.435 9.09 333.565 ; + RECT 9.315 333.435 9.365 333.565 ; + RECT 9.72 333.435 9.77 333.565 ; + RECT 11.025 333.435 11.075 333.565 ; + RECT 12.79 333.435 12.84 333.565 ; + RECT 6.225 335.855 6.275 335.985 ; + RECT 7.5 335.855 7.55 335.985 ; + RECT 9.04 335.855 9.09 335.985 ; + RECT 9.315 335.855 9.365 335.985 ; + RECT 11.025 335.855 11.075 335.985 ; + RECT 12.79 335.855 12.84 335.985 ; + RECT 7.18 336.085 7.23 336.215 ; + RECT 14.14 336.085 14.19 336.215 ; + RECT 8.56 333.435 8.61 333.565 ; + RECT 10.27 333.435 10.32 333.565 ; + RECT 8.56 335.855 8.61 335.985 ; + RECT 10.27 335.855 10.32 335.985 ; + RECT 6.22 336.315 6.27 336.445 ; + RECT 7.5 336.315 7.55 336.445 ; + RECT 9.04 336.315 9.09 336.445 ; + RECT 9.315 336.315 9.365 336.445 ; + RECT 9.72 336.315 9.77 336.445 ; + RECT 11.025 336.315 11.075 336.445 ; + RECT 12.79 336.315 12.84 336.445 ; + RECT 6.225 338.735 6.275 338.865 ; + RECT 7.5 338.735 7.55 338.865 ; + RECT 9.04 338.735 9.09 338.865 ; + RECT 9.315 338.735 9.365 338.865 ; + RECT 11.025 338.735 11.075 338.865 ; + RECT 12.79 338.735 12.84 338.865 ; + RECT 7.18 338.965 7.23 339.095 ; + RECT 14.14 338.965 14.19 339.095 ; + RECT 8.56 336.315 8.61 336.445 ; + RECT 10.27 336.315 10.32 336.445 ; + RECT 8.56 338.735 8.61 338.865 ; + RECT 10.27 338.735 10.32 338.865 ; + RECT 6.22 339.195 6.27 339.325 ; + RECT 7.5 339.195 7.55 339.325 ; + RECT 9.04 339.195 9.09 339.325 ; + RECT 9.315 339.195 9.365 339.325 ; + RECT 9.72 339.195 9.77 339.325 ; + RECT 11.025 339.195 11.075 339.325 ; + RECT 12.79 339.195 12.84 339.325 ; + RECT 6.225 341.615 6.275 341.745 ; + RECT 7.5 341.615 7.55 341.745 ; + RECT 9.04 341.615 9.09 341.745 ; + RECT 9.315 341.615 9.365 341.745 ; + RECT 11.025 341.615 11.075 341.745 ; + RECT 12.79 341.615 12.84 341.745 ; + RECT 7.18 341.845 7.23 341.975 ; + RECT 14.14 341.845 14.19 341.975 ; + RECT 8.56 339.195 8.61 339.325 ; + RECT 10.27 339.195 10.32 339.325 ; + RECT 8.56 341.615 8.61 341.745 ; + RECT 10.27 341.615 10.32 341.745 ; + RECT 6.22 342.075 6.27 342.205 ; + RECT 7.5 342.075 7.55 342.205 ; + RECT 9.04 342.075 9.09 342.205 ; + RECT 9.315 342.075 9.365 342.205 ; + RECT 9.72 342.075 9.77 342.205 ; + RECT 11.025 342.075 11.075 342.205 ; + RECT 12.79 342.075 12.84 342.205 ; + RECT 6.225 344.495 6.275 344.625 ; + RECT 7.5 344.495 7.55 344.625 ; + RECT 9.04 344.495 9.09 344.625 ; + RECT 9.315 344.495 9.365 344.625 ; + RECT 11.025 344.495 11.075 344.625 ; + RECT 12.79 344.495 12.84 344.625 ; + RECT 7.18 344.725 7.23 344.855 ; + RECT 14.14 344.725 14.19 344.855 ; + RECT 8.56 342.075 8.61 342.205 ; + RECT 10.27 342.075 10.32 342.205 ; + RECT 8.56 344.495 8.61 344.625 ; + RECT 10.27 344.495 10.32 344.625 ; + RECT 6.22 344.955 6.27 345.085 ; + RECT 7.5 344.955 7.55 345.085 ; + RECT 9.04 344.955 9.09 345.085 ; + RECT 9.315 344.955 9.365 345.085 ; + RECT 9.72 344.955 9.77 345.085 ; + RECT 11.025 344.955 11.075 345.085 ; + RECT 12.79 344.955 12.84 345.085 ; + RECT 6.225 347.375 6.275 347.505 ; + RECT 7.5 347.375 7.55 347.505 ; + RECT 9.04 347.375 9.09 347.505 ; + RECT 9.315 347.375 9.365 347.505 ; + RECT 11.025 347.375 11.075 347.505 ; + RECT 12.79 347.375 12.84 347.505 ; + RECT 7.18 347.605 7.23 347.735 ; + RECT 14.14 347.605 14.19 347.735 ; + RECT 8.56 344.955 8.61 345.085 ; + RECT 10.27 344.955 10.32 345.085 ; + RECT 8.56 347.375 8.61 347.505 ; + RECT 10.27 347.375 10.32 347.505 ; + RECT 6.22 347.835 6.27 347.965 ; + RECT 7.5 347.835 7.55 347.965 ; + RECT 9.04 347.835 9.09 347.965 ; + RECT 9.315 347.835 9.365 347.965 ; + RECT 9.72 347.835 9.77 347.965 ; + RECT 11.025 347.835 11.075 347.965 ; + RECT 12.79 347.835 12.84 347.965 ; + RECT 6.225 350.255 6.275 350.385 ; + RECT 7.5 350.255 7.55 350.385 ; + RECT 9.04 350.255 9.09 350.385 ; + RECT 9.315 350.255 9.365 350.385 ; + RECT 11.025 350.255 11.075 350.385 ; + RECT 12.79 350.255 12.84 350.385 ; + RECT 7.18 350.485 7.23 350.615 ; + RECT 14.14 350.485 14.19 350.615 ; + RECT 8.56 347.835 8.61 347.965 ; + RECT 10.27 347.835 10.32 347.965 ; + RECT 8.56 350.255 8.61 350.385 ; + RECT 10.27 350.255 10.32 350.385 ; + RECT 6.22 350.715 6.27 350.845 ; + RECT 7.5 350.715 7.55 350.845 ; + RECT 9.04 350.715 9.09 350.845 ; + RECT 9.315 350.715 9.365 350.845 ; + RECT 9.72 350.715 9.77 350.845 ; + RECT 11.025 350.715 11.075 350.845 ; + RECT 12.79 350.715 12.84 350.845 ; + RECT 6.225 353.135 6.275 353.265 ; + RECT 7.5 353.135 7.55 353.265 ; + RECT 9.04 353.135 9.09 353.265 ; + RECT 9.315 353.135 9.365 353.265 ; + RECT 11.025 353.135 11.075 353.265 ; + RECT 12.79 353.135 12.84 353.265 ; + RECT 7.18 353.365 7.23 353.495 ; + RECT 14.14 353.365 14.19 353.495 ; + RECT 8.56 350.715 8.61 350.845 ; + RECT 10.27 350.715 10.32 350.845 ; + RECT 8.56 353.135 8.61 353.265 ; + RECT 10.27 353.135 10.32 353.265 ; + RECT 6.22 353.595 6.27 353.725 ; + RECT 7.5 353.595 7.55 353.725 ; + RECT 9.04 353.595 9.09 353.725 ; + RECT 9.315 353.595 9.365 353.725 ; + RECT 9.72 353.595 9.77 353.725 ; + RECT 11.025 353.595 11.075 353.725 ; + RECT 12.79 353.595 12.84 353.725 ; + RECT 6.225 356.015 6.275 356.145 ; + RECT 7.5 356.015 7.55 356.145 ; + RECT 9.04 356.015 9.09 356.145 ; + RECT 9.315 356.015 9.365 356.145 ; + RECT 11.025 356.015 11.075 356.145 ; + RECT 12.79 356.015 12.84 356.145 ; + RECT 7.18 356.245 7.23 356.375 ; + RECT 14.14 356.245 14.19 356.375 ; + RECT 8.56 353.595 8.61 353.725 ; + RECT 10.27 353.595 10.32 353.725 ; + RECT 8.56 356.015 8.61 356.145 ; + RECT 10.27 356.015 10.32 356.145 ; + RECT 6.22 356.475 6.27 356.605 ; + RECT 7.5 356.475 7.55 356.605 ; + RECT 9.04 356.475 9.09 356.605 ; + RECT 9.315 356.475 9.365 356.605 ; + RECT 9.72 356.475 9.77 356.605 ; + RECT 11.025 356.475 11.075 356.605 ; + RECT 12.79 356.475 12.84 356.605 ; + RECT 6.225 358.895 6.275 359.025 ; + RECT 7.5 358.895 7.55 359.025 ; + RECT 9.04 358.895 9.09 359.025 ; + RECT 9.315 358.895 9.365 359.025 ; + RECT 11.025 358.895 11.075 359.025 ; + RECT 12.79 358.895 12.84 359.025 ; + RECT 7.18 359.125 7.23 359.255 ; + RECT 14.14 359.125 14.19 359.255 ; + RECT 8.56 356.475 8.61 356.605 ; + RECT 10.27 356.475 10.32 356.605 ; + RECT 8.56 358.895 8.61 359.025 ; + RECT 10.27 358.895 10.32 359.025 ; + RECT 6.22 359.355 6.27 359.485 ; + RECT 7.5 359.355 7.55 359.485 ; + RECT 9.04 359.355 9.09 359.485 ; + RECT 9.315 359.355 9.365 359.485 ; + RECT 9.72 359.355 9.77 359.485 ; + RECT 11.025 359.355 11.075 359.485 ; + RECT 12.79 359.355 12.84 359.485 ; + RECT 6.225 361.775 6.275 361.905 ; + RECT 7.5 361.775 7.55 361.905 ; + RECT 9.04 361.775 9.09 361.905 ; + RECT 9.315 361.775 9.365 361.905 ; + RECT 11.025 361.775 11.075 361.905 ; + RECT 12.79 361.775 12.84 361.905 ; + RECT 7.18 362.005 7.23 362.135 ; + RECT 14.14 362.005 14.19 362.135 ; + RECT 8.56 359.355 8.61 359.485 ; + RECT 10.27 359.355 10.32 359.485 ; + RECT 8.56 361.775 8.61 361.905 ; + RECT 10.27 361.775 10.32 361.905 ; + RECT 6.22 362.235 6.27 362.365 ; + RECT 7.5 362.235 7.55 362.365 ; + RECT 9.04 362.235 9.09 362.365 ; + RECT 9.315 362.235 9.365 362.365 ; + RECT 9.72 362.235 9.77 362.365 ; + RECT 11.025 362.235 11.075 362.365 ; + RECT 12.79 362.235 12.84 362.365 ; + RECT 6.225 364.655 6.275 364.785 ; + RECT 7.5 364.655 7.55 364.785 ; + RECT 9.04 364.655 9.09 364.785 ; + RECT 9.315 364.655 9.365 364.785 ; + RECT 11.025 364.655 11.075 364.785 ; + RECT 12.79 364.655 12.84 364.785 ; + RECT 7.18 364.885 7.23 365.015 ; + RECT 14.14 364.885 14.19 365.015 ; + RECT 8.56 362.235 8.61 362.365 ; + RECT 10.27 362.235 10.32 362.365 ; + RECT 8.56 364.655 8.61 364.785 ; + RECT 10.27 364.655 10.32 364.785 ; + RECT 6.22 365.115 6.27 365.245 ; + RECT 7.5 365.115 7.55 365.245 ; + RECT 9.04 365.115 9.09 365.245 ; + RECT 9.315 365.115 9.365 365.245 ; + RECT 9.72 365.115 9.77 365.245 ; + RECT 11.025 365.115 11.075 365.245 ; + RECT 12.79 365.115 12.84 365.245 ; + RECT 6.225 367.535 6.275 367.665 ; + RECT 7.5 367.535 7.55 367.665 ; + RECT 9.04 367.535 9.09 367.665 ; + RECT 9.315 367.535 9.365 367.665 ; + RECT 11.025 367.535 11.075 367.665 ; + RECT 12.79 367.535 12.84 367.665 ; + RECT 7.18 367.765 7.23 367.895 ; + RECT 14.14 367.765 14.19 367.895 ; + RECT 8.56 365.115 8.61 365.245 ; + RECT 10.27 365.115 10.32 365.245 ; + RECT 8.56 367.535 8.61 367.665 ; + RECT 10.27 367.535 10.32 367.665 ; + RECT 6.22 367.995 6.27 368.125 ; + RECT 7.5 367.995 7.55 368.125 ; + RECT 9.04 367.995 9.09 368.125 ; + RECT 9.315 367.995 9.365 368.125 ; + RECT 9.72 367.995 9.77 368.125 ; + RECT 11.025 367.995 11.075 368.125 ; + RECT 12.79 367.995 12.84 368.125 ; + RECT 6.225 370.415 6.275 370.545 ; + RECT 7.5 370.415 7.55 370.545 ; + RECT 9.04 370.415 9.09 370.545 ; + RECT 9.315 370.415 9.365 370.545 ; + RECT 11.025 370.415 11.075 370.545 ; + RECT 12.79 370.415 12.84 370.545 ; + RECT 7.18 370.645 7.23 370.775 ; + RECT 14.14 370.645 14.19 370.775 ; + RECT 8.56 367.995 8.61 368.125 ; + RECT 10.27 367.995 10.32 368.125 ; + RECT 8.56 370.415 8.61 370.545 ; + RECT 10.27 370.415 10.32 370.545 ; + RECT 6.22 370.875 6.27 371.005 ; + RECT 7.5 370.875 7.55 371.005 ; + RECT 9.04 370.875 9.09 371.005 ; + RECT 9.315 370.875 9.365 371.005 ; + RECT 9.72 370.875 9.77 371.005 ; + RECT 11.025 370.875 11.075 371.005 ; + RECT 12.79 370.875 12.84 371.005 ; + RECT 6.225 373.295 6.275 373.425 ; + RECT 7.5 373.295 7.55 373.425 ; + RECT 9.04 373.295 9.09 373.425 ; + RECT 9.315 373.295 9.365 373.425 ; + RECT 11.025 373.295 11.075 373.425 ; + RECT 12.79 373.295 12.84 373.425 ; + RECT 7.18 373.525 7.23 373.655 ; + RECT 14.14 373.525 14.19 373.655 ; + RECT 8.56 370.875 8.61 371.005 ; + RECT 10.27 370.875 10.32 371.005 ; + RECT 8.56 373.295 8.61 373.425 ; + RECT 10.27 373.295 10.32 373.425 ; + RECT 6.22 373.755 6.27 373.885 ; + RECT 7.5 373.755 7.55 373.885 ; + RECT 9.04 373.755 9.09 373.885 ; + RECT 9.315 373.755 9.365 373.885 ; + RECT 9.72 373.755 9.77 373.885 ; + RECT 11.025 373.755 11.075 373.885 ; + RECT 12.79 373.755 12.84 373.885 ; + RECT 6.225 376.175 6.275 376.305 ; + RECT 7.5 376.175 7.55 376.305 ; + RECT 9.04 376.175 9.09 376.305 ; + RECT 9.315 376.175 9.365 376.305 ; + RECT 11.025 376.175 11.075 376.305 ; + RECT 12.79 376.175 12.84 376.305 ; + RECT 7.18 376.405 7.23 376.535 ; + RECT 14.14 376.405 14.19 376.535 ; + RECT 8.56 373.755 8.61 373.885 ; + RECT 10.27 373.755 10.32 373.885 ; + RECT 8.56 376.175 8.61 376.305 ; + RECT 10.27 376.175 10.32 376.305 ; + RECT 6.22 376.635 6.27 376.765 ; + RECT 7.5 376.635 7.55 376.765 ; + RECT 9.04 376.635 9.09 376.765 ; + RECT 9.315 376.635 9.365 376.765 ; + RECT 9.72 376.635 9.77 376.765 ; + RECT 11.025 376.635 11.075 376.765 ; + RECT 12.79 376.635 12.84 376.765 ; + RECT 6.225 379.055 6.275 379.185 ; + RECT 7.5 379.055 7.55 379.185 ; + RECT 9.04 379.055 9.09 379.185 ; + RECT 9.315 379.055 9.365 379.185 ; + RECT 11.025 379.055 11.075 379.185 ; + RECT 12.79 379.055 12.84 379.185 ; + RECT 7.18 379.285 7.23 379.415 ; + RECT 14.14 379.285 14.19 379.415 ; + RECT 8.56 376.635 8.61 376.765 ; + RECT 10.27 376.635 10.32 376.765 ; + RECT 8.56 379.055 8.61 379.185 ; + RECT 10.27 379.055 10.32 379.185 ; + RECT 6.22 379.515 6.27 379.645 ; + RECT 7.5 379.515 7.55 379.645 ; + RECT 9.04 379.515 9.09 379.645 ; + RECT 9.315 379.515 9.365 379.645 ; + RECT 9.72 379.515 9.77 379.645 ; + RECT 11.025 379.515 11.075 379.645 ; + RECT 12.79 379.515 12.84 379.645 ; + RECT 6.225 381.935 6.275 382.065 ; + RECT 7.5 381.935 7.55 382.065 ; + RECT 9.04 381.935 9.09 382.065 ; + RECT 9.315 381.935 9.365 382.065 ; + RECT 11.025 381.935 11.075 382.065 ; + RECT 12.79 381.935 12.84 382.065 ; + RECT 7.18 382.165 7.23 382.295 ; + RECT 14.14 382.165 14.19 382.295 ; + RECT 8.56 379.515 8.61 379.645 ; + RECT 10.27 379.515 10.32 379.645 ; + RECT 8.56 381.935 8.61 382.065 ; + RECT 10.27 381.935 10.32 382.065 ; + RECT 6.22 382.395 6.27 382.525 ; + RECT 7.5 382.395 7.55 382.525 ; + RECT 9.04 382.395 9.09 382.525 ; + RECT 9.315 382.395 9.365 382.525 ; + RECT 9.72 382.395 9.77 382.525 ; + RECT 11.025 382.395 11.075 382.525 ; + RECT 12.79 382.395 12.84 382.525 ; + RECT 6.225 384.815 6.275 384.945 ; + RECT 7.5 384.815 7.55 384.945 ; + RECT 9.04 384.815 9.09 384.945 ; + RECT 9.315 384.815 9.365 384.945 ; + RECT 11.025 384.815 11.075 384.945 ; + RECT 12.79 384.815 12.84 384.945 ; + RECT 7.18 385.045 7.23 385.175 ; + RECT 14.14 385.045 14.19 385.175 ; + RECT 8.56 382.395 8.61 382.525 ; + RECT 10.27 382.395 10.32 382.525 ; + RECT 8.56 384.815 8.61 384.945 ; + RECT 10.27 384.815 10.32 384.945 ; + RECT 6.22 385.275 6.27 385.405 ; + RECT 7.5 385.275 7.55 385.405 ; + RECT 9.04 385.275 9.09 385.405 ; + RECT 9.315 385.275 9.365 385.405 ; + RECT 9.72 385.275 9.77 385.405 ; + RECT 11.025 385.275 11.075 385.405 ; + RECT 12.79 385.275 12.84 385.405 ; + RECT 6.225 387.695 6.275 387.825 ; + RECT 7.5 387.695 7.55 387.825 ; + RECT 9.04 387.695 9.09 387.825 ; + RECT 9.315 387.695 9.365 387.825 ; + RECT 11.025 387.695 11.075 387.825 ; + RECT 12.79 387.695 12.84 387.825 ; + RECT 7.18 387.925 7.23 388.055 ; + RECT 14.14 387.925 14.19 388.055 ; + RECT 8.56 385.275 8.61 385.405 ; + RECT 10.27 385.275 10.32 385.405 ; + RECT 8.56 387.695 8.61 387.825 ; + RECT 10.27 387.695 10.32 387.825 ; + RECT 6.22 388.155 6.27 388.285 ; + RECT 7.5 388.155 7.55 388.285 ; + RECT 9.04 388.155 9.09 388.285 ; + RECT 9.315 388.155 9.365 388.285 ; + RECT 9.72 388.155 9.77 388.285 ; + RECT 11.025 388.155 11.075 388.285 ; + RECT 12.79 388.155 12.84 388.285 ; + RECT 6.225 390.575 6.275 390.705 ; + RECT 7.5 390.575 7.55 390.705 ; + RECT 9.04 390.575 9.09 390.705 ; + RECT 9.315 390.575 9.365 390.705 ; + RECT 11.025 390.575 11.075 390.705 ; + RECT 12.79 390.575 12.84 390.705 ; + RECT 7.18 390.805 7.23 390.935 ; + RECT 14.14 390.805 14.19 390.935 ; + RECT 8.56 388.155 8.61 388.285 ; + RECT 10.27 388.155 10.32 388.285 ; + RECT 8.56 390.575 8.61 390.705 ; + RECT 10.27 390.575 10.32 390.705 ; + RECT 6.22 391.035 6.27 391.165 ; + RECT 7.5 391.035 7.55 391.165 ; + RECT 9.04 391.035 9.09 391.165 ; + RECT 9.315 391.035 9.365 391.165 ; + RECT 9.72 391.035 9.77 391.165 ; + RECT 11.025 391.035 11.075 391.165 ; + RECT 12.79 391.035 12.84 391.165 ; + RECT 6.225 393.455 6.275 393.585 ; + RECT 7.5 393.455 7.55 393.585 ; + RECT 9.04 393.455 9.09 393.585 ; + RECT 9.315 393.455 9.365 393.585 ; + RECT 11.025 393.455 11.075 393.585 ; + RECT 12.79 393.455 12.84 393.585 ; + RECT 7.18 393.685 7.23 393.815 ; + RECT 14.14 393.685 14.19 393.815 ; + RECT 8.56 391.035 8.61 391.165 ; + RECT 10.27 391.035 10.32 391.165 ; + RECT 8.56 393.455 8.61 393.585 ; + RECT 10.27 393.455 10.32 393.585 ; + RECT 6.22 393.915 6.27 394.045 ; + RECT 7.5 393.915 7.55 394.045 ; + RECT 9.04 393.915 9.09 394.045 ; + RECT 9.315 393.915 9.365 394.045 ; + RECT 9.72 393.915 9.77 394.045 ; + RECT 11.025 393.915 11.075 394.045 ; + RECT 12.79 393.915 12.84 394.045 ; + RECT 6.225 396.335 6.275 396.465 ; + RECT 7.5 396.335 7.55 396.465 ; + RECT 9.04 396.335 9.09 396.465 ; + RECT 9.315 396.335 9.365 396.465 ; + RECT 11.025 396.335 11.075 396.465 ; + RECT 12.79 396.335 12.84 396.465 ; + RECT 7.18 396.565 7.23 396.695 ; + RECT 14.14 396.565 14.19 396.695 ; + RECT 8.56 393.915 8.61 394.045 ; + RECT 10.27 393.915 10.32 394.045 ; + RECT 8.56 396.335 8.61 396.465 ; + RECT 10.27 396.335 10.32 396.465 ; + RECT 6.22 396.795 6.27 396.925 ; + RECT 7.5 396.795 7.55 396.925 ; + RECT 9.04 396.795 9.09 396.925 ; + RECT 9.315 396.795 9.365 396.925 ; + RECT 9.72 396.795 9.77 396.925 ; + RECT 11.025 396.795 11.075 396.925 ; + RECT 12.79 396.795 12.84 396.925 ; + RECT 6.225 399.215 6.275 399.345 ; + RECT 7.5 399.215 7.55 399.345 ; + RECT 9.04 399.215 9.09 399.345 ; + RECT 9.315 399.215 9.365 399.345 ; + RECT 11.025 399.215 11.075 399.345 ; + RECT 12.79 399.215 12.84 399.345 ; + RECT 7.18 399.445 7.23 399.575 ; + RECT 14.14 399.445 14.19 399.575 ; + RECT 8.56 396.795 8.61 396.925 ; + RECT 10.27 396.795 10.32 396.925 ; + RECT 8.56 399.215 8.61 399.345 ; + RECT 10.27 399.215 10.32 399.345 ; + RECT 6.22 399.675 6.27 399.805 ; + RECT 7.5 399.675 7.55 399.805 ; + RECT 9.04 399.675 9.09 399.805 ; + RECT 9.315 399.675 9.365 399.805 ; + RECT 9.72 399.675 9.77 399.805 ; + RECT 11.025 399.675 11.075 399.805 ; + RECT 12.79 399.675 12.84 399.805 ; + RECT 6.225 402.095 6.275 402.225 ; + RECT 7.5 402.095 7.55 402.225 ; + RECT 9.04 402.095 9.09 402.225 ; + RECT 9.315 402.095 9.365 402.225 ; + RECT 11.025 402.095 11.075 402.225 ; + RECT 12.79 402.095 12.84 402.225 ; + RECT 7.18 402.325 7.23 402.455 ; + RECT 14.14 402.325 14.19 402.455 ; + RECT 8.56 399.675 8.61 399.805 ; + RECT 10.27 399.675 10.32 399.805 ; + RECT 8.56 402.095 8.61 402.225 ; + RECT 10.27 402.095 10.32 402.225 ; + RECT 6.22 402.555 6.27 402.685 ; + RECT 7.5 402.555 7.55 402.685 ; + RECT 9.04 402.555 9.09 402.685 ; + RECT 9.315 402.555 9.365 402.685 ; + RECT 9.72 402.555 9.77 402.685 ; + RECT 11.025 402.555 11.075 402.685 ; + RECT 12.79 402.555 12.84 402.685 ; + RECT 6.225 404.975 6.275 405.105 ; + RECT 7.5 404.975 7.55 405.105 ; + RECT 9.04 404.975 9.09 405.105 ; + RECT 9.315 404.975 9.365 405.105 ; + RECT 11.025 404.975 11.075 405.105 ; + RECT 12.79 404.975 12.84 405.105 ; + RECT 7.18 405.205 7.23 405.335 ; + RECT 14.14 405.205 14.19 405.335 ; + RECT 8.56 402.555 8.61 402.685 ; + RECT 10.27 402.555 10.32 402.685 ; + RECT 8.56 404.975 8.61 405.105 ; + RECT 10.27 404.975 10.32 405.105 ; + RECT 6.22 405.435 6.27 405.565 ; + RECT 7.5 405.435 7.55 405.565 ; + RECT 9.04 405.435 9.09 405.565 ; + RECT 9.315 405.435 9.365 405.565 ; + RECT 9.72 405.435 9.77 405.565 ; + RECT 11.025 405.435 11.075 405.565 ; + RECT 12.79 405.435 12.84 405.565 ; + RECT 6.225 407.855 6.275 407.985 ; + RECT 7.5 407.855 7.55 407.985 ; + RECT 9.04 407.855 9.09 407.985 ; + RECT 9.315 407.855 9.365 407.985 ; + RECT 11.025 407.855 11.075 407.985 ; + RECT 12.79 407.855 12.84 407.985 ; + RECT 7.18 408.085 7.23 408.215 ; + RECT 14.14 408.085 14.19 408.215 ; + RECT 8.56 405.435 8.61 405.565 ; + RECT 10.27 405.435 10.32 405.565 ; + RECT 8.56 407.855 8.61 407.985 ; + RECT 10.27 407.855 10.32 407.985 ; + RECT 6.22 408.315 6.27 408.445 ; + RECT 7.5 408.315 7.55 408.445 ; + RECT 9.04 408.315 9.09 408.445 ; + RECT 9.315 408.315 9.365 408.445 ; + RECT 9.72 408.315 9.77 408.445 ; + RECT 11.025 408.315 11.075 408.445 ; + RECT 12.79 408.315 12.84 408.445 ; + RECT 6.225 410.735 6.275 410.865 ; + RECT 7.5 410.735 7.55 410.865 ; + RECT 9.04 410.735 9.09 410.865 ; + RECT 9.315 410.735 9.365 410.865 ; + RECT 11.025 410.735 11.075 410.865 ; + RECT 12.79 410.735 12.84 410.865 ; + RECT 7.18 410.965 7.23 411.095 ; + RECT 14.14 410.965 14.19 411.095 ; + RECT 8.56 408.315 8.61 408.445 ; + RECT 10.27 408.315 10.32 408.445 ; + RECT 8.56 410.735 8.61 410.865 ; + RECT 10.27 410.735 10.32 410.865 ; + RECT 6.22 411.195 6.27 411.325 ; + RECT 7.5 411.195 7.55 411.325 ; + RECT 9.04 411.195 9.09 411.325 ; + RECT 9.315 411.195 9.365 411.325 ; + RECT 9.72 411.195 9.77 411.325 ; + RECT 11.025 411.195 11.075 411.325 ; + RECT 12.79 411.195 12.84 411.325 ; + RECT 6.225 413.615 6.275 413.745 ; + RECT 7.5 413.615 7.55 413.745 ; + RECT 9.04 413.615 9.09 413.745 ; + RECT 9.315 413.615 9.365 413.745 ; + RECT 11.025 413.615 11.075 413.745 ; + RECT 12.79 413.615 12.84 413.745 ; + RECT 7.18 413.845 7.23 413.975 ; + RECT 14.14 413.845 14.19 413.975 ; + RECT 8.56 411.195 8.61 411.325 ; + RECT 10.27 411.195 10.32 411.325 ; + RECT 8.56 413.615 8.61 413.745 ; + RECT 10.27 413.615 10.32 413.745 ; + RECT 14.33 232.635 14.38 232.765 ; + RECT 6.22 233.095 6.27 233.225 ; + RECT 7.5 233.095 7.55 233.225 ; + RECT 9.04 233.095 9.09 233.225 ; + RECT 9.315 233.095 9.365 233.225 ; + RECT 9.72 233.095 9.77 233.225 ; + RECT 11.025 233.095 11.075 233.225 ; + RECT 12.79 233.095 12.84 233.225 ; + RECT 14.33 235.055 14.38 235.185 ; + RECT 5.675 235.285 5.725 235.415 ; + RECT 6.065 235.285 6.115 235.415 ; + RECT 6.725 235.285 6.775 235.415 ; + RECT 8.42 235.285 8.47 235.415 ; + RECT 8.77 235.285 8.82 235.415 ; + RECT 11.555 235.285 11.605 235.415 ; + RECT 11.815 235.285 11.865 235.415 ; + RECT 12.52 235.285 12.57 235.415 ; + RECT 13.98 235.285 14.03 235.415 ; + RECT 14.33 258.555 14.38 258.685 ; + RECT 6.22 259.015 6.27 259.145 ; + RECT 7.5 259.015 7.55 259.145 ; + RECT 9.04 259.015 9.09 259.145 ; + RECT 9.315 259.015 9.365 259.145 ; + RECT 9.72 259.015 9.77 259.145 ; + RECT 11.025 259.015 11.075 259.145 ; + RECT 12.79 259.015 12.84 259.145 ; + RECT 14.33 260.975 14.38 261.105 ; + RECT 5.675 261.205 5.725 261.335 ; + RECT 6.065 261.205 6.115 261.335 ; + RECT 6.725 261.205 6.775 261.335 ; + RECT 8.42 261.205 8.47 261.335 ; + RECT 8.77 261.205 8.82 261.335 ; + RECT 11.555 261.205 11.605 261.335 ; + RECT 11.815 261.205 11.865 261.335 ; + RECT 12.52 261.205 12.57 261.335 ; + RECT 13.98 261.205 14.03 261.335 ; + RECT 14.33 261.435 14.38 261.565 ; + RECT 6.22 261.895 6.27 262.025 ; + RECT 7.5 261.895 7.55 262.025 ; + RECT 9.04 261.895 9.09 262.025 ; + RECT 9.315 261.895 9.365 262.025 ; + RECT 9.72 261.895 9.77 262.025 ; + RECT 11.025 261.895 11.075 262.025 ; + RECT 12.79 261.895 12.84 262.025 ; + RECT 14.33 263.855 14.38 263.985 ; + RECT 5.675 264.085 5.725 264.215 ; + RECT 6.065 264.085 6.115 264.215 ; + RECT 6.725 264.085 6.775 264.215 ; + RECT 8.42 264.085 8.47 264.215 ; + RECT 8.77 264.085 8.82 264.215 ; + RECT 11.555 264.085 11.605 264.215 ; + RECT 11.815 264.085 11.865 264.215 ; + RECT 12.52 264.085 12.57 264.215 ; + RECT 13.98 264.085 14.03 264.215 ; + RECT 14.33 264.315 14.38 264.445 ; + RECT 6.22 264.775 6.27 264.905 ; + RECT 7.5 264.775 7.55 264.905 ; + RECT 9.04 264.775 9.09 264.905 ; + RECT 9.315 264.775 9.365 264.905 ; + RECT 9.72 264.775 9.77 264.905 ; + RECT 11.025 264.775 11.075 264.905 ; + RECT 12.79 264.775 12.84 264.905 ; + RECT 14.33 266.735 14.38 266.865 ; + RECT 5.675 266.965 5.725 267.095 ; + RECT 6.065 266.965 6.115 267.095 ; + RECT 6.725 266.965 6.775 267.095 ; + RECT 8.42 266.965 8.47 267.095 ; + RECT 8.77 266.965 8.82 267.095 ; + RECT 11.555 266.965 11.605 267.095 ; + RECT 11.815 266.965 11.865 267.095 ; + RECT 12.52 266.965 12.57 267.095 ; + RECT 13.98 266.965 14.03 267.095 ; + RECT 14.33 267.195 14.38 267.325 ; + RECT 6.22 267.655 6.27 267.785 ; + RECT 7.5 267.655 7.55 267.785 ; + RECT 9.04 267.655 9.09 267.785 ; + RECT 9.315 267.655 9.365 267.785 ; + RECT 9.72 267.655 9.77 267.785 ; + RECT 11.025 267.655 11.075 267.785 ; + RECT 12.79 267.655 12.84 267.785 ; + RECT 14.33 269.615 14.38 269.745 ; + RECT 5.675 269.845 5.725 269.975 ; + RECT 6.065 269.845 6.115 269.975 ; + RECT 6.725 269.845 6.775 269.975 ; + RECT 8.42 269.845 8.47 269.975 ; + RECT 8.77 269.845 8.82 269.975 ; + RECT 11.555 269.845 11.605 269.975 ; + RECT 11.815 269.845 11.865 269.975 ; + RECT 12.52 269.845 12.57 269.975 ; + RECT 13.98 269.845 14.03 269.975 ; + RECT 14.33 270.075 14.38 270.205 ; + RECT 6.22 270.535 6.27 270.665 ; + RECT 7.5 270.535 7.55 270.665 ; + RECT 9.04 270.535 9.09 270.665 ; + RECT 9.315 270.535 9.365 270.665 ; + RECT 9.72 270.535 9.77 270.665 ; + RECT 11.025 270.535 11.075 270.665 ; + RECT 12.79 270.535 12.84 270.665 ; + RECT 14.33 272.495 14.38 272.625 ; + RECT 5.675 272.725 5.725 272.855 ; + RECT 6.065 272.725 6.115 272.855 ; + RECT 6.725 272.725 6.775 272.855 ; + RECT 8.42 272.725 8.47 272.855 ; + RECT 8.77 272.725 8.82 272.855 ; + RECT 11.555 272.725 11.605 272.855 ; + RECT 11.815 272.725 11.865 272.855 ; + RECT 12.52 272.725 12.57 272.855 ; + RECT 13.98 272.725 14.03 272.855 ; + RECT 14.33 272.955 14.38 273.085 ; + RECT 6.22 273.415 6.27 273.545 ; + RECT 7.5 273.415 7.55 273.545 ; + RECT 9.04 273.415 9.09 273.545 ; + RECT 9.315 273.415 9.365 273.545 ; + RECT 9.72 273.415 9.77 273.545 ; + RECT 11.025 273.415 11.075 273.545 ; + RECT 12.79 273.415 12.84 273.545 ; + RECT 14.33 275.375 14.38 275.505 ; + RECT 5.675 275.605 5.725 275.735 ; + RECT 6.065 275.605 6.115 275.735 ; + RECT 6.725 275.605 6.775 275.735 ; + RECT 8.42 275.605 8.47 275.735 ; + RECT 8.77 275.605 8.82 275.735 ; + RECT 11.555 275.605 11.605 275.735 ; + RECT 11.815 275.605 11.865 275.735 ; + RECT 12.52 275.605 12.57 275.735 ; + RECT 13.98 275.605 14.03 275.735 ; + RECT 14.33 275.835 14.38 275.965 ; + RECT 6.22 276.295 6.27 276.425 ; + RECT 7.5 276.295 7.55 276.425 ; + RECT 9.04 276.295 9.09 276.425 ; + RECT 9.315 276.295 9.365 276.425 ; + RECT 9.72 276.295 9.77 276.425 ; + RECT 11.025 276.295 11.075 276.425 ; + RECT 12.79 276.295 12.84 276.425 ; + RECT 14.33 278.255 14.38 278.385 ; + RECT 5.675 278.485 5.725 278.615 ; + RECT 6.065 278.485 6.115 278.615 ; + RECT 6.725 278.485 6.775 278.615 ; + RECT 8.42 278.485 8.47 278.615 ; + RECT 8.77 278.485 8.82 278.615 ; + RECT 11.555 278.485 11.605 278.615 ; + RECT 11.815 278.485 11.865 278.615 ; + RECT 12.52 278.485 12.57 278.615 ; + RECT 13.98 278.485 14.03 278.615 ; + RECT 14.33 278.715 14.38 278.845 ; + RECT 6.22 279.175 6.27 279.305 ; + RECT 7.5 279.175 7.55 279.305 ; + RECT 9.04 279.175 9.09 279.305 ; + RECT 9.315 279.175 9.365 279.305 ; + RECT 9.72 279.175 9.77 279.305 ; + RECT 11.025 279.175 11.075 279.305 ; + RECT 12.79 279.175 12.84 279.305 ; + RECT 14.33 281.135 14.38 281.265 ; + RECT 5.675 281.365 5.725 281.495 ; + RECT 6.065 281.365 6.115 281.495 ; + RECT 6.725 281.365 6.775 281.495 ; + RECT 8.42 281.365 8.47 281.495 ; + RECT 8.77 281.365 8.82 281.495 ; + RECT 11.555 281.365 11.605 281.495 ; + RECT 11.815 281.365 11.865 281.495 ; + RECT 12.52 281.365 12.57 281.495 ; + RECT 13.98 281.365 14.03 281.495 ; + RECT 14.33 281.595 14.38 281.725 ; + RECT 6.22 282.055 6.27 282.185 ; + RECT 7.5 282.055 7.55 282.185 ; + RECT 9.04 282.055 9.09 282.185 ; + RECT 9.315 282.055 9.365 282.185 ; + RECT 9.72 282.055 9.77 282.185 ; + RECT 11.025 282.055 11.075 282.185 ; + RECT 12.79 282.055 12.84 282.185 ; + RECT 14.33 284.015 14.38 284.145 ; + RECT 5.675 284.245 5.725 284.375 ; + RECT 6.065 284.245 6.115 284.375 ; + RECT 6.725 284.245 6.775 284.375 ; + RECT 8.42 284.245 8.47 284.375 ; + RECT 8.77 284.245 8.82 284.375 ; + RECT 11.555 284.245 11.605 284.375 ; + RECT 11.815 284.245 11.865 284.375 ; + RECT 12.52 284.245 12.57 284.375 ; + RECT 13.98 284.245 14.03 284.375 ; + RECT 14.33 284.475 14.38 284.605 ; + RECT 6.22 284.935 6.27 285.065 ; + RECT 7.5 284.935 7.55 285.065 ; + RECT 9.04 284.935 9.09 285.065 ; + RECT 9.315 284.935 9.365 285.065 ; + RECT 9.72 284.935 9.77 285.065 ; + RECT 11.025 284.935 11.075 285.065 ; + RECT 12.79 284.935 12.84 285.065 ; + RECT 14.33 286.895 14.38 287.025 ; + RECT 5.675 287.125 5.725 287.255 ; + RECT 6.065 287.125 6.115 287.255 ; + RECT 6.725 287.125 6.775 287.255 ; + RECT 8.42 287.125 8.47 287.255 ; + RECT 8.77 287.125 8.82 287.255 ; + RECT 11.555 287.125 11.605 287.255 ; + RECT 11.815 287.125 11.865 287.255 ; + RECT 12.52 287.125 12.57 287.255 ; + RECT 13.98 287.125 14.03 287.255 ; + RECT 14.33 235.515 14.38 235.645 ; + RECT 6.22 235.975 6.27 236.105 ; + RECT 7.5 235.975 7.55 236.105 ; + RECT 9.04 235.975 9.09 236.105 ; + RECT 9.315 235.975 9.365 236.105 ; + RECT 9.72 235.975 9.77 236.105 ; + RECT 11.025 235.975 11.075 236.105 ; + RECT 12.79 235.975 12.84 236.105 ; + RECT 14.33 237.935 14.38 238.065 ; + RECT 5.675 238.165 5.725 238.295 ; + RECT 6.065 238.165 6.115 238.295 ; + RECT 6.725 238.165 6.775 238.295 ; + RECT 8.42 238.165 8.47 238.295 ; + RECT 8.77 238.165 8.82 238.295 ; + RECT 11.555 238.165 11.605 238.295 ; + RECT 11.815 238.165 11.865 238.295 ; + RECT 12.52 238.165 12.57 238.295 ; + RECT 13.98 238.165 14.03 238.295 ; + RECT 14.33 287.355 14.38 287.485 ; + RECT 6.22 287.815 6.27 287.945 ; + RECT 7.5 287.815 7.55 287.945 ; + RECT 9.04 287.815 9.09 287.945 ; + RECT 9.315 287.815 9.365 287.945 ; + RECT 9.72 287.815 9.77 287.945 ; + RECT 11.025 287.815 11.075 287.945 ; + RECT 12.79 287.815 12.84 287.945 ; + RECT 14.33 289.775 14.38 289.905 ; + RECT 5.675 290.005 5.725 290.135 ; + RECT 6.065 290.005 6.115 290.135 ; + RECT 6.725 290.005 6.775 290.135 ; + RECT 8.42 290.005 8.47 290.135 ; + RECT 8.77 290.005 8.82 290.135 ; + RECT 11.555 290.005 11.605 290.135 ; + RECT 11.815 290.005 11.865 290.135 ; + RECT 12.52 290.005 12.57 290.135 ; + RECT 13.98 290.005 14.03 290.135 ; + RECT 14.33 290.235 14.38 290.365 ; + RECT 6.22 290.695 6.27 290.825 ; + RECT 7.5 290.695 7.55 290.825 ; + RECT 9.04 290.695 9.09 290.825 ; + RECT 9.315 290.695 9.365 290.825 ; + RECT 9.72 290.695 9.77 290.825 ; + RECT 11.025 290.695 11.075 290.825 ; + RECT 12.79 290.695 12.84 290.825 ; + RECT 14.33 292.655 14.38 292.785 ; + RECT 5.675 292.885 5.725 293.015 ; + RECT 6.065 292.885 6.115 293.015 ; + RECT 6.725 292.885 6.775 293.015 ; + RECT 8.42 292.885 8.47 293.015 ; + RECT 8.77 292.885 8.82 293.015 ; + RECT 11.555 292.885 11.605 293.015 ; + RECT 11.815 292.885 11.865 293.015 ; + RECT 12.52 292.885 12.57 293.015 ; + RECT 13.98 292.885 14.03 293.015 ; + RECT 14.33 293.115 14.38 293.245 ; + RECT 6.22 293.575 6.27 293.705 ; + RECT 7.5 293.575 7.55 293.705 ; + RECT 9.04 293.575 9.09 293.705 ; + RECT 9.315 293.575 9.365 293.705 ; + RECT 9.72 293.575 9.77 293.705 ; + RECT 11.025 293.575 11.075 293.705 ; + RECT 12.79 293.575 12.84 293.705 ; + RECT 14.33 295.535 14.38 295.665 ; + RECT 5.675 295.765 5.725 295.895 ; + RECT 6.065 295.765 6.115 295.895 ; + RECT 6.725 295.765 6.775 295.895 ; + RECT 8.42 295.765 8.47 295.895 ; + RECT 8.77 295.765 8.82 295.895 ; + RECT 11.555 295.765 11.605 295.895 ; + RECT 11.815 295.765 11.865 295.895 ; + RECT 12.52 295.765 12.57 295.895 ; + RECT 13.98 295.765 14.03 295.895 ; + RECT 14.33 295.995 14.38 296.125 ; + RECT 6.22 296.455 6.27 296.585 ; + RECT 7.5 296.455 7.55 296.585 ; + RECT 9.04 296.455 9.09 296.585 ; + RECT 9.315 296.455 9.365 296.585 ; + RECT 9.72 296.455 9.77 296.585 ; + RECT 11.025 296.455 11.075 296.585 ; + RECT 12.79 296.455 12.84 296.585 ; + RECT 14.33 298.415 14.38 298.545 ; + RECT 5.675 298.645 5.725 298.775 ; + RECT 6.065 298.645 6.115 298.775 ; + RECT 6.725 298.645 6.775 298.775 ; + RECT 8.42 298.645 8.47 298.775 ; + RECT 8.77 298.645 8.82 298.775 ; + RECT 11.555 298.645 11.605 298.775 ; + RECT 11.815 298.645 11.865 298.775 ; + RECT 12.52 298.645 12.57 298.775 ; + RECT 13.98 298.645 14.03 298.775 ; + RECT 14.33 298.875 14.38 299.005 ; + RECT 6.22 299.335 6.27 299.465 ; + RECT 7.5 299.335 7.55 299.465 ; + RECT 9.04 299.335 9.09 299.465 ; + RECT 9.315 299.335 9.365 299.465 ; + RECT 9.72 299.335 9.77 299.465 ; + RECT 11.025 299.335 11.075 299.465 ; + RECT 12.79 299.335 12.84 299.465 ; + RECT 14.33 301.295 14.38 301.425 ; + RECT 5.675 301.525 5.725 301.655 ; + RECT 6.065 301.525 6.115 301.655 ; + RECT 6.725 301.525 6.775 301.655 ; + RECT 8.42 301.525 8.47 301.655 ; + RECT 8.77 301.525 8.82 301.655 ; + RECT 11.555 301.525 11.605 301.655 ; + RECT 11.815 301.525 11.865 301.655 ; + RECT 12.52 301.525 12.57 301.655 ; + RECT 13.98 301.525 14.03 301.655 ; + RECT 14.33 301.755 14.38 301.885 ; + RECT 6.22 302.215 6.27 302.345 ; + RECT 7.5 302.215 7.55 302.345 ; + RECT 9.04 302.215 9.09 302.345 ; + RECT 9.315 302.215 9.365 302.345 ; + RECT 9.72 302.215 9.77 302.345 ; + RECT 11.025 302.215 11.075 302.345 ; + RECT 12.79 302.215 12.84 302.345 ; + RECT 14.33 304.175 14.38 304.305 ; + RECT 5.675 304.405 5.725 304.535 ; + RECT 6.065 304.405 6.115 304.535 ; + RECT 6.725 304.405 6.775 304.535 ; + RECT 8.42 304.405 8.47 304.535 ; + RECT 8.77 304.405 8.82 304.535 ; + RECT 11.555 304.405 11.605 304.535 ; + RECT 11.815 304.405 11.865 304.535 ; + RECT 12.52 304.405 12.57 304.535 ; + RECT 13.98 304.405 14.03 304.535 ; + RECT 14.33 304.635 14.38 304.765 ; + RECT 6.22 305.095 6.27 305.225 ; + RECT 7.5 305.095 7.55 305.225 ; + RECT 9.04 305.095 9.09 305.225 ; + RECT 9.315 305.095 9.365 305.225 ; + RECT 9.72 305.095 9.77 305.225 ; + RECT 11.025 305.095 11.075 305.225 ; + RECT 12.79 305.095 12.84 305.225 ; + RECT 14.33 307.055 14.38 307.185 ; + RECT 5.675 307.285 5.725 307.415 ; + RECT 6.065 307.285 6.115 307.415 ; + RECT 6.725 307.285 6.775 307.415 ; + RECT 8.42 307.285 8.47 307.415 ; + RECT 8.77 307.285 8.82 307.415 ; + RECT 11.555 307.285 11.605 307.415 ; + RECT 11.815 307.285 11.865 307.415 ; + RECT 12.52 307.285 12.57 307.415 ; + RECT 13.98 307.285 14.03 307.415 ; + RECT 14.33 307.515 14.38 307.645 ; + RECT 6.22 307.975 6.27 308.105 ; + RECT 7.5 307.975 7.55 308.105 ; + RECT 9.04 307.975 9.09 308.105 ; + RECT 9.315 307.975 9.365 308.105 ; + RECT 9.72 307.975 9.77 308.105 ; + RECT 11.025 307.975 11.075 308.105 ; + RECT 12.79 307.975 12.84 308.105 ; + RECT 14.33 309.935 14.38 310.065 ; + RECT 5.675 310.165 5.725 310.295 ; + RECT 6.065 310.165 6.115 310.295 ; + RECT 6.725 310.165 6.775 310.295 ; + RECT 8.42 310.165 8.47 310.295 ; + RECT 8.77 310.165 8.82 310.295 ; + RECT 11.555 310.165 11.605 310.295 ; + RECT 11.815 310.165 11.865 310.295 ; + RECT 12.52 310.165 12.57 310.295 ; + RECT 13.98 310.165 14.03 310.295 ; + RECT 14.33 310.395 14.38 310.525 ; + RECT 6.22 310.855 6.27 310.985 ; + RECT 7.5 310.855 7.55 310.985 ; + RECT 9.04 310.855 9.09 310.985 ; + RECT 9.315 310.855 9.365 310.985 ; + RECT 9.72 310.855 9.77 310.985 ; + RECT 11.025 310.855 11.075 310.985 ; + RECT 12.79 310.855 12.84 310.985 ; + RECT 14.33 312.815 14.38 312.945 ; + RECT 5.675 313.045 5.725 313.175 ; + RECT 6.065 313.045 6.115 313.175 ; + RECT 6.725 313.045 6.775 313.175 ; + RECT 8.42 313.045 8.47 313.175 ; + RECT 8.77 313.045 8.82 313.175 ; + RECT 11.555 313.045 11.605 313.175 ; + RECT 11.815 313.045 11.865 313.175 ; + RECT 12.52 313.045 12.57 313.175 ; + RECT 13.98 313.045 14.03 313.175 ; + RECT 14.33 313.275 14.38 313.405 ; + RECT 6.22 313.735 6.27 313.865 ; + RECT 7.5 313.735 7.55 313.865 ; + RECT 9.04 313.735 9.09 313.865 ; + RECT 9.315 313.735 9.365 313.865 ; + RECT 9.72 313.735 9.77 313.865 ; + RECT 11.025 313.735 11.075 313.865 ; + RECT 12.79 313.735 12.84 313.865 ; + RECT 14.33 315.695 14.38 315.825 ; + RECT 5.675 315.925 5.725 316.055 ; + RECT 6.065 315.925 6.115 316.055 ; + RECT 6.725 315.925 6.775 316.055 ; + RECT 8.42 315.925 8.47 316.055 ; + RECT 8.77 315.925 8.82 316.055 ; + RECT 11.555 315.925 11.605 316.055 ; + RECT 11.815 315.925 11.865 316.055 ; + RECT 12.52 315.925 12.57 316.055 ; + RECT 13.98 315.925 14.03 316.055 ; + RECT 14.33 238.395 14.38 238.525 ; + RECT 6.22 238.855 6.27 238.985 ; + RECT 7.5 238.855 7.55 238.985 ; + RECT 9.04 238.855 9.09 238.985 ; + RECT 9.315 238.855 9.365 238.985 ; + RECT 9.72 238.855 9.77 238.985 ; + RECT 11.025 238.855 11.075 238.985 ; + RECT 12.79 238.855 12.84 238.985 ; + RECT 14.33 240.815 14.38 240.945 ; + RECT 5.675 241.045 5.725 241.175 ; + RECT 6.065 241.045 6.115 241.175 ; + RECT 6.725 241.045 6.775 241.175 ; + RECT 8.42 241.045 8.47 241.175 ; + RECT 8.77 241.045 8.82 241.175 ; + RECT 11.555 241.045 11.605 241.175 ; + RECT 11.815 241.045 11.865 241.175 ; + RECT 12.52 241.045 12.57 241.175 ; + RECT 13.98 241.045 14.03 241.175 ; + RECT 14.33 316.155 14.38 316.285 ; + RECT 6.22 316.615 6.27 316.745 ; + RECT 7.5 316.615 7.55 316.745 ; + RECT 9.04 316.615 9.09 316.745 ; + RECT 9.315 316.615 9.365 316.745 ; + RECT 9.72 316.615 9.77 316.745 ; + RECT 11.025 316.615 11.075 316.745 ; + RECT 12.79 316.615 12.84 316.745 ; + RECT 14.33 318.575 14.38 318.705 ; + RECT 5.675 318.805 5.725 318.935 ; + RECT 6.065 318.805 6.115 318.935 ; + RECT 6.725 318.805 6.775 318.935 ; + RECT 8.42 318.805 8.47 318.935 ; + RECT 8.77 318.805 8.82 318.935 ; + RECT 11.555 318.805 11.605 318.935 ; + RECT 11.815 318.805 11.865 318.935 ; + RECT 12.52 318.805 12.57 318.935 ; + RECT 13.98 318.805 14.03 318.935 ; + RECT 14.33 319.035 14.38 319.165 ; + RECT 6.22 319.495 6.27 319.625 ; + RECT 7.5 319.495 7.55 319.625 ; + RECT 9.04 319.495 9.09 319.625 ; + RECT 9.315 319.495 9.365 319.625 ; + RECT 9.72 319.495 9.77 319.625 ; + RECT 11.025 319.495 11.075 319.625 ; + RECT 12.79 319.495 12.84 319.625 ; + RECT 14.33 321.455 14.38 321.585 ; + RECT 5.675 321.685 5.725 321.815 ; + RECT 6.065 321.685 6.115 321.815 ; + RECT 6.725 321.685 6.775 321.815 ; + RECT 8.42 321.685 8.47 321.815 ; + RECT 8.77 321.685 8.82 321.815 ; + RECT 11.555 321.685 11.605 321.815 ; + RECT 11.815 321.685 11.865 321.815 ; + RECT 12.52 321.685 12.57 321.815 ; + RECT 13.98 321.685 14.03 321.815 ; + RECT 14.33 321.915 14.38 322.045 ; + RECT 6.22 322.375 6.27 322.505 ; + RECT 7.5 322.375 7.55 322.505 ; + RECT 9.04 322.375 9.09 322.505 ; + RECT 9.315 322.375 9.365 322.505 ; + RECT 9.72 322.375 9.77 322.505 ; + RECT 11.025 322.375 11.075 322.505 ; + RECT 12.79 322.375 12.84 322.505 ; + RECT 14.33 324.335 14.38 324.465 ; + RECT 5.675 324.565 5.725 324.695 ; + RECT 6.065 324.565 6.115 324.695 ; + RECT 6.725 324.565 6.775 324.695 ; + RECT 8.42 324.565 8.47 324.695 ; + RECT 8.77 324.565 8.82 324.695 ; + RECT 11.555 324.565 11.605 324.695 ; + RECT 11.815 324.565 11.865 324.695 ; + RECT 12.52 324.565 12.57 324.695 ; + RECT 13.98 324.565 14.03 324.695 ; + RECT 14.33 324.795 14.38 324.925 ; + RECT 6.22 325.255 6.27 325.385 ; + RECT 7.5 325.255 7.55 325.385 ; + RECT 9.04 325.255 9.09 325.385 ; + RECT 9.315 325.255 9.365 325.385 ; + RECT 9.72 325.255 9.77 325.385 ; + RECT 11.025 325.255 11.075 325.385 ; + RECT 12.79 325.255 12.84 325.385 ; + RECT 14.33 327.215 14.38 327.345 ; + RECT 5.675 327.445 5.725 327.575 ; + RECT 6.065 327.445 6.115 327.575 ; + RECT 6.725 327.445 6.775 327.575 ; + RECT 8.42 327.445 8.47 327.575 ; + RECT 8.77 327.445 8.82 327.575 ; + RECT 11.555 327.445 11.605 327.575 ; + RECT 11.815 327.445 11.865 327.575 ; + RECT 12.52 327.445 12.57 327.575 ; + RECT 13.98 327.445 14.03 327.575 ; + RECT 14.33 327.675 14.38 327.805 ; + RECT 6.22 328.135 6.27 328.265 ; + RECT 7.5 328.135 7.55 328.265 ; + RECT 9.04 328.135 9.09 328.265 ; + RECT 9.315 328.135 9.365 328.265 ; + RECT 9.72 328.135 9.77 328.265 ; + RECT 11.025 328.135 11.075 328.265 ; + RECT 12.79 328.135 12.84 328.265 ; + RECT 14.33 330.095 14.38 330.225 ; + RECT 5.675 330.325 5.725 330.455 ; + RECT 6.065 330.325 6.115 330.455 ; + RECT 6.725 330.325 6.775 330.455 ; + RECT 8.42 330.325 8.47 330.455 ; + RECT 8.77 330.325 8.82 330.455 ; + RECT 11.555 330.325 11.605 330.455 ; + RECT 11.815 330.325 11.865 330.455 ; + RECT 12.52 330.325 12.57 330.455 ; + RECT 13.98 330.325 14.03 330.455 ; + RECT 14.33 330.555 14.38 330.685 ; + RECT 6.22 331.015 6.27 331.145 ; + RECT 7.5 331.015 7.55 331.145 ; + RECT 9.04 331.015 9.09 331.145 ; + RECT 9.315 331.015 9.365 331.145 ; + RECT 9.72 331.015 9.77 331.145 ; + RECT 11.025 331.015 11.075 331.145 ; + RECT 12.79 331.015 12.84 331.145 ; + RECT 14.33 332.975 14.38 333.105 ; + RECT 5.675 333.205 5.725 333.335 ; + RECT 6.065 333.205 6.115 333.335 ; + RECT 6.725 333.205 6.775 333.335 ; + RECT 8.42 333.205 8.47 333.335 ; + RECT 8.77 333.205 8.82 333.335 ; + RECT 11.555 333.205 11.605 333.335 ; + RECT 11.815 333.205 11.865 333.335 ; + RECT 12.52 333.205 12.57 333.335 ; + RECT 13.98 333.205 14.03 333.335 ; + RECT 14.33 333.435 14.38 333.565 ; + RECT 6.22 333.895 6.27 334.025 ; + RECT 7.5 333.895 7.55 334.025 ; + RECT 9.04 333.895 9.09 334.025 ; + RECT 9.315 333.895 9.365 334.025 ; + RECT 9.72 333.895 9.77 334.025 ; + RECT 11.025 333.895 11.075 334.025 ; + RECT 12.79 333.895 12.84 334.025 ; + RECT 14.33 335.855 14.38 335.985 ; + RECT 5.675 336.085 5.725 336.215 ; + RECT 6.065 336.085 6.115 336.215 ; + RECT 6.725 336.085 6.775 336.215 ; + RECT 8.42 336.085 8.47 336.215 ; + RECT 8.77 336.085 8.82 336.215 ; + RECT 11.555 336.085 11.605 336.215 ; + RECT 11.815 336.085 11.865 336.215 ; + RECT 12.52 336.085 12.57 336.215 ; + RECT 13.98 336.085 14.03 336.215 ; + RECT 14.33 336.315 14.38 336.445 ; + RECT 6.22 336.775 6.27 336.905 ; + RECT 7.5 336.775 7.55 336.905 ; + RECT 9.04 336.775 9.09 336.905 ; + RECT 9.315 336.775 9.365 336.905 ; + RECT 9.72 336.775 9.77 336.905 ; + RECT 11.025 336.775 11.075 336.905 ; + RECT 12.79 336.775 12.84 336.905 ; + RECT 14.33 338.735 14.38 338.865 ; + RECT 5.675 338.965 5.725 339.095 ; + RECT 6.065 338.965 6.115 339.095 ; + RECT 6.725 338.965 6.775 339.095 ; + RECT 8.42 338.965 8.47 339.095 ; + RECT 8.77 338.965 8.82 339.095 ; + RECT 11.555 338.965 11.605 339.095 ; + RECT 11.815 338.965 11.865 339.095 ; + RECT 12.52 338.965 12.57 339.095 ; + RECT 13.98 338.965 14.03 339.095 ; + RECT 14.33 339.195 14.38 339.325 ; + RECT 6.22 339.655 6.27 339.785 ; + RECT 7.5 339.655 7.55 339.785 ; + RECT 9.04 339.655 9.09 339.785 ; + RECT 9.315 339.655 9.365 339.785 ; + RECT 9.72 339.655 9.77 339.785 ; + RECT 11.025 339.655 11.075 339.785 ; + RECT 12.79 339.655 12.84 339.785 ; + RECT 14.33 341.615 14.38 341.745 ; + RECT 5.675 341.845 5.725 341.975 ; + RECT 6.065 341.845 6.115 341.975 ; + RECT 6.725 341.845 6.775 341.975 ; + RECT 8.42 341.845 8.47 341.975 ; + RECT 8.77 341.845 8.82 341.975 ; + RECT 11.555 341.845 11.605 341.975 ; + RECT 11.815 341.845 11.865 341.975 ; + RECT 12.52 341.845 12.57 341.975 ; + RECT 13.98 341.845 14.03 341.975 ; + RECT 14.33 342.075 14.38 342.205 ; + RECT 6.22 342.535 6.27 342.665 ; + RECT 7.5 342.535 7.55 342.665 ; + RECT 9.04 342.535 9.09 342.665 ; + RECT 9.315 342.535 9.365 342.665 ; + RECT 9.72 342.535 9.77 342.665 ; + RECT 11.025 342.535 11.075 342.665 ; + RECT 12.79 342.535 12.84 342.665 ; + RECT 14.33 344.495 14.38 344.625 ; + RECT 5.675 344.725 5.725 344.855 ; + RECT 6.065 344.725 6.115 344.855 ; + RECT 6.725 344.725 6.775 344.855 ; + RECT 8.42 344.725 8.47 344.855 ; + RECT 8.77 344.725 8.82 344.855 ; + RECT 11.555 344.725 11.605 344.855 ; + RECT 11.815 344.725 11.865 344.855 ; + RECT 12.52 344.725 12.57 344.855 ; + RECT 13.98 344.725 14.03 344.855 ; + RECT 14.33 241.275 14.38 241.405 ; + RECT 6.22 241.735 6.27 241.865 ; + RECT 7.5 241.735 7.55 241.865 ; + RECT 9.04 241.735 9.09 241.865 ; + RECT 9.315 241.735 9.365 241.865 ; + RECT 9.72 241.735 9.77 241.865 ; + RECT 11.025 241.735 11.075 241.865 ; + RECT 12.79 241.735 12.84 241.865 ; + RECT 14.33 243.695 14.38 243.825 ; + RECT 5.675 243.925 5.725 244.055 ; + RECT 6.065 243.925 6.115 244.055 ; + RECT 6.725 243.925 6.775 244.055 ; + RECT 8.42 243.925 8.47 244.055 ; + RECT 8.77 243.925 8.82 244.055 ; + RECT 11.555 243.925 11.605 244.055 ; + RECT 11.815 243.925 11.865 244.055 ; + RECT 12.52 243.925 12.57 244.055 ; + RECT 13.98 243.925 14.03 244.055 ; + RECT 14.33 344.955 14.38 345.085 ; + RECT 6.22 345.415 6.27 345.545 ; + RECT 7.5 345.415 7.55 345.545 ; + RECT 9.04 345.415 9.09 345.545 ; + RECT 9.315 345.415 9.365 345.545 ; + RECT 9.72 345.415 9.77 345.545 ; + RECT 11.025 345.415 11.075 345.545 ; + RECT 12.79 345.415 12.84 345.545 ; + RECT 14.33 347.375 14.38 347.505 ; + RECT 5.675 347.605 5.725 347.735 ; + RECT 6.065 347.605 6.115 347.735 ; + RECT 6.725 347.605 6.775 347.735 ; + RECT 8.42 347.605 8.47 347.735 ; + RECT 8.77 347.605 8.82 347.735 ; + RECT 11.555 347.605 11.605 347.735 ; + RECT 11.815 347.605 11.865 347.735 ; + RECT 12.52 347.605 12.57 347.735 ; + RECT 13.98 347.605 14.03 347.735 ; + RECT 14.33 347.835 14.38 347.965 ; + RECT 6.22 348.295 6.27 348.425 ; + RECT 7.5 348.295 7.55 348.425 ; + RECT 9.04 348.295 9.09 348.425 ; + RECT 9.315 348.295 9.365 348.425 ; + RECT 9.72 348.295 9.77 348.425 ; + RECT 11.025 348.295 11.075 348.425 ; + RECT 12.79 348.295 12.84 348.425 ; + RECT 14.33 350.255 14.38 350.385 ; + RECT 5.675 350.485 5.725 350.615 ; + RECT 6.065 350.485 6.115 350.615 ; + RECT 6.725 350.485 6.775 350.615 ; + RECT 8.42 350.485 8.47 350.615 ; + RECT 8.77 350.485 8.82 350.615 ; + RECT 11.555 350.485 11.605 350.615 ; + RECT 11.815 350.485 11.865 350.615 ; + RECT 12.52 350.485 12.57 350.615 ; + RECT 13.98 350.485 14.03 350.615 ; + RECT 14.33 350.715 14.38 350.845 ; + RECT 6.22 351.175 6.27 351.305 ; + RECT 7.5 351.175 7.55 351.305 ; + RECT 9.04 351.175 9.09 351.305 ; + RECT 9.315 351.175 9.365 351.305 ; + RECT 9.72 351.175 9.77 351.305 ; + RECT 11.025 351.175 11.075 351.305 ; + RECT 12.79 351.175 12.84 351.305 ; + RECT 14.33 353.135 14.38 353.265 ; + RECT 5.675 353.365 5.725 353.495 ; + RECT 6.065 353.365 6.115 353.495 ; + RECT 6.725 353.365 6.775 353.495 ; + RECT 8.42 353.365 8.47 353.495 ; + RECT 8.77 353.365 8.82 353.495 ; + RECT 11.555 353.365 11.605 353.495 ; + RECT 11.815 353.365 11.865 353.495 ; + RECT 12.52 353.365 12.57 353.495 ; + RECT 13.98 353.365 14.03 353.495 ; + RECT 14.33 353.595 14.38 353.725 ; + RECT 6.22 354.055 6.27 354.185 ; + RECT 7.5 354.055 7.55 354.185 ; + RECT 9.04 354.055 9.09 354.185 ; + RECT 9.315 354.055 9.365 354.185 ; + RECT 9.72 354.055 9.77 354.185 ; + RECT 11.025 354.055 11.075 354.185 ; + RECT 12.79 354.055 12.84 354.185 ; + RECT 14.33 356.015 14.38 356.145 ; + RECT 5.675 356.245 5.725 356.375 ; + RECT 6.065 356.245 6.115 356.375 ; + RECT 6.725 356.245 6.775 356.375 ; + RECT 8.42 356.245 8.47 356.375 ; + RECT 8.77 356.245 8.82 356.375 ; + RECT 11.555 356.245 11.605 356.375 ; + RECT 11.815 356.245 11.865 356.375 ; + RECT 12.52 356.245 12.57 356.375 ; + RECT 13.98 356.245 14.03 356.375 ; + RECT 14.33 356.475 14.38 356.605 ; + RECT 6.22 356.935 6.27 357.065 ; + RECT 7.5 356.935 7.55 357.065 ; + RECT 9.04 356.935 9.09 357.065 ; + RECT 9.315 356.935 9.365 357.065 ; + RECT 9.72 356.935 9.77 357.065 ; + RECT 11.025 356.935 11.075 357.065 ; + RECT 12.79 356.935 12.84 357.065 ; + RECT 14.33 358.895 14.38 359.025 ; + RECT 5.675 359.125 5.725 359.255 ; + RECT 6.065 359.125 6.115 359.255 ; + RECT 6.725 359.125 6.775 359.255 ; + RECT 8.42 359.125 8.47 359.255 ; + RECT 8.77 359.125 8.82 359.255 ; + RECT 11.555 359.125 11.605 359.255 ; + RECT 11.815 359.125 11.865 359.255 ; + RECT 12.52 359.125 12.57 359.255 ; + RECT 13.98 359.125 14.03 359.255 ; + RECT 14.33 359.355 14.38 359.485 ; + RECT 6.22 359.815 6.27 359.945 ; + RECT 7.5 359.815 7.55 359.945 ; + RECT 9.04 359.815 9.09 359.945 ; + RECT 9.315 359.815 9.365 359.945 ; + RECT 9.72 359.815 9.77 359.945 ; + RECT 11.025 359.815 11.075 359.945 ; + RECT 12.79 359.815 12.84 359.945 ; + RECT 14.33 361.775 14.38 361.905 ; + RECT 5.675 362.005 5.725 362.135 ; + RECT 6.065 362.005 6.115 362.135 ; + RECT 6.725 362.005 6.775 362.135 ; + RECT 8.42 362.005 8.47 362.135 ; + RECT 8.77 362.005 8.82 362.135 ; + RECT 11.555 362.005 11.605 362.135 ; + RECT 11.815 362.005 11.865 362.135 ; + RECT 12.52 362.005 12.57 362.135 ; + RECT 13.98 362.005 14.03 362.135 ; + RECT 14.33 362.235 14.38 362.365 ; + RECT 6.22 362.695 6.27 362.825 ; + RECT 7.5 362.695 7.55 362.825 ; + RECT 9.04 362.695 9.09 362.825 ; + RECT 9.315 362.695 9.365 362.825 ; + RECT 9.72 362.695 9.77 362.825 ; + RECT 11.025 362.695 11.075 362.825 ; + RECT 12.79 362.695 12.84 362.825 ; + RECT 14.33 364.655 14.38 364.785 ; + RECT 5.675 364.885 5.725 365.015 ; + RECT 6.065 364.885 6.115 365.015 ; + RECT 6.725 364.885 6.775 365.015 ; + RECT 8.42 364.885 8.47 365.015 ; + RECT 8.77 364.885 8.82 365.015 ; + RECT 11.555 364.885 11.605 365.015 ; + RECT 11.815 364.885 11.865 365.015 ; + RECT 12.52 364.885 12.57 365.015 ; + RECT 13.98 364.885 14.03 365.015 ; + RECT 14.33 365.115 14.38 365.245 ; + RECT 6.22 365.575 6.27 365.705 ; + RECT 7.5 365.575 7.55 365.705 ; + RECT 9.04 365.575 9.09 365.705 ; + RECT 9.315 365.575 9.365 365.705 ; + RECT 9.72 365.575 9.77 365.705 ; + RECT 11.025 365.575 11.075 365.705 ; + RECT 12.79 365.575 12.84 365.705 ; + RECT 14.33 367.535 14.38 367.665 ; + RECT 5.675 367.765 5.725 367.895 ; + RECT 6.065 367.765 6.115 367.895 ; + RECT 6.725 367.765 6.775 367.895 ; + RECT 8.42 367.765 8.47 367.895 ; + RECT 8.77 367.765 8.82 367.895 ; + RECT 11.555 367.765 11.605 367.895 ; + RECT 11.815 367.765 11.865 367.895 ; + RECT 12.52 367.765 12.57 367.895 ; + RECT 13.98 367.765 14.03 367.895 ; + RECT 14.33 367.995 14.38 368.125 ; + RECT 6.22 368.455 6.27 368.585 ; + RECT 7.5 368.455 7.55 368.585 ; + RECT 9.04 368.455 9.09 368.585 ; + RECT 9.315 368.455 9.365 368.585 ; + RECT 9.72 368.455 9.77 368.585 ; + RECT 11.025 368.455 11.075 368.585 ; + RECT 12.79 368.455 12.84 368.585 ; + RECT 14.33 370.415 14.38 370.545 ; + RECT 5.675 370.645 5.725 370.775 ; + RECT 6.065 370.645 6.115 370.775 ; + RECT 6.725 370.645 6.775 370.775 ; + RECT 8.42 370.645 8.47 370.775 ; + RECT 8.77 370.645 8.82 370.775 ; + RECT 11.555 370.645 11.605 370.775 ; + RECT 11.815 370.645 11.865 370.775 ; + RECT 12.52 370.645 12.57 370.775 ; + RECT 13.98 370.645 14.03 370.775 ; + RECT 14.33 370.875 14.38 371.005 ; + RECT 6.22 371.335 6.27 371.465 ; + RECT 7.5 371.335 7.55 371.465 ; + RECT 9.04 371.335 9.09 371.465 ; + RECT 9.315 371.335 9.365 371.465 ; + RECT 9.72 371.335 9.77 371.465 ; + RECT 11.025 371.335 11.075 371.465 ; + RECT 12.79 371.335 12.84 371.465 ; + RECT 14.33 373.295 14.38 373.425 ; + RECT 5.675 373.525 5.725 373.655 ; + RECT 6.065 373.525 6.115 373.655 ; + RECT 6.725 373.525 6.775 373.655 ; + RECT 8.42 373.525 8.47 373.655 ; + RECT 8.77 373.525 8.82 373.655 ; + RECT 11.555 373.525 11.605 373.655 ; + RECT 11.815 373.525 11.865 373.655 ; + RECT 12.52 373.525 12.57 373.655 ; + RECT 13.98 373.525 14.03 373.655 ; + RECT 14.33 244.155 14.38 244.285 ; + RECT 6.22 244.615 6.27 244.745 ; + RECT 7.5 244.615 7.55 244.745 ; + RECT 9.04 244.615 9.09 244.745 ; + RECT 9.315 244.615 9.365 244.745 ; + RECT 9.72 244.615 9.77 244.745 ; + RECT 11.025 244.615 11.075 244.745 ; + RECT 12.79 244.615 12.84 244.745 ; + RECT 14.33 246.575 14.38 246.705 ; + RECT 5.675 246.805 5.725 246.935 ; + RECT 6.065 246.805 6.115 246.935 ; + RECT 6.725 246.805 6.775 246.935 ; + RECT 8.42 246.805 8.47 246.935 ; + RECT 8.77 246.805 8.82 246.935 ; + RECT 11.555 246.805 11.605 246.935 ; + RECT 11.815 246.805 11.865 246.935 ; + RECT 12.52 246.805 12.57 246.935 ; + RECT 13.98 246.805 14.03 246.935 ; + RECT 14.33 373.755 14.38 373.885 ; + RECT 6.22 374.215 6.27 374.345 ; + RECT 7.5 374.215 7.55 374.345 ; + RECT 9.04 374.215 9.09 374.345 ; + RECT 9.315 374.215 9.365 374.345 ; + RECT 9.72 374.215 9.77 374.345 ; + RECT 11.025 374.215 11.075 374.345 ; + RECT 12.79 374.215 12.84 374.345 ; + RECT 14.33 376.175 14.38 376.305 ; + RECT 5.675 376.405 5.725 376.535 ; + RECT 6.065 376.405 6.115 376.535 ; + RECT 6.725 376.405 6.775 376.535 ; + RECT 8.42 376.405 8.47 376.535 ; + RECT 8.77 376.405 8.82 376.535 ; + RECT 11.555 376.405 11.605 376.535 ; + RECT 11.815 376.405 11.865 376.535 ; + RECT 12.52 376.405 12.57 376.535 ; + RECT 13.98 376.405 14.03 376.535 ; + RECT 14.33 376.635 14.38 376.765 ; + RECT 6.22 377.095 6.27 377.225 ; + RECT 7.5 377.095 7.55 377.225 ; + RECT 9.04 377.095 9.09 377.225 ; + RECT 9.315 377.095 9.365 377.225 ; + RECT 9.72 377.095 9.77 377.225 ; + RECT 11.025 377.095 11.075 377.225 ; + RECT 12.79 377.095 12.84 377.225 ; + RECT 14.33 379.055 14.38 379.185 ; + RECT 5.675 379.285 5.725 379.415 ; + RECT 6.065 379.285 6.115 379.415 ; + RECT 6.725 379.285 6.775 379.415 ; + RECT 8.42 379.285 8.47 379.415 ; + RECT 8.77 379.285 8.82 379.415 ; + RECT 11.555 379.285 11.605 379.415 ; + RECT 11.815 379.285 11.865 379.415 ; + RECT 12.52 379.285 12.57 379.415 ; + RECT 13.98 379.285 14.03 379.415 ; + RECT 14.33 379.515 14.38 379.645 ; + RECT 6.22 379.975 6.27 380.105 ; + RECT 7.5 379.975 7.55 380.105 ; + RECT 9.04 379.975 9.09 380.105 ; + RECT 9.315 379.975 9.365 380.105 ; + RECT 9.72 379.975 9.77 380.105 ; + RECT 11.025 379.975 11.075 380.105 ; + RECT 12.79 379.975 12.84 380.105 ; + RECT 14.33 381.935 14.38 382.065 ; + RECT 5.675 382.165 5.725 382.295 ; + RECT 6.065 382.165 6.115 382.295 ; + RECT 6.725 382.165 6.775 382.295 ; + RECT 8.42 382.165 8.47 382.295 ; + RECT 8.77 382.165 8.82 382.295 ; + RECT 11.555 382.165 11.605 382.295 ; + RECT 11.815 382.165 11.865 382.295 ; + RECT 12.52 382.165 12.57 382.295 ; + RECT 13.98 382.165 14.03 382.295 ; + RECT 14.33 382.395 14.38 382.525 ; + RECT 6.22 382.855 6.27 382.985 ; + RECT 7.5 382.855 7.55 382.985 ; + RECT 9.04 382.855 9.09 382.985 ; + RECT 9.315 382.855 9.365 382.985 ; + RECT 9.72 382.855 9.77 382.985 ; + RECT 11.025 382.855 11.075 382.985 ; + RECT 12.79 382.855 12.84 382.985 ; + RECT 14.33 384.815 14.38 384.945 ; + RECT 5.675 385.045 5.725 385.175 ; + RECT 6.065 385.045 6.115 385.175 ; + RECT 6.725 385.045 6.775 385.175 ; + RECT 8.42 385.045 8.47 385.175 ; + RECT 8.77 385.045 8.82 385.175 ; + RECT 11.555 385.045 11.605 385.175 ; + RECT 11.815 385.045 11.865 385.175 ; + RECT 12.52 385.045 12.57 385.175 ; + RECT 13.98 385.045 14.03 385.175 ; + RECT 14.33 385.275 14.38 385.405 ; + RECT 6.22 385.735 6.27 385.865 ; + RECT 7.5 385.735 7.55 385.865 ; + RECT 9.04 385.735 9.09 385.865 ; + RECT 9.315 385.735 9.365 385.865 ; + RECT 9.72 385.735 9.77 385.865 ; + RECT 11.025 385.735 11.075 385.865 ; + RECT 12.79 385.735 12.84 385.865 ; + RECT 14.33 387.695 14.38 387.825 ; + RECT 5.675 387.925 5.725 388.055 ; + RECT 6.065 387.925 6.115 388.055 ; + RECT 6.725 387.925 6.775 388.055 ; + RECT 8.42 387.925 8.47 388.055 ; + RECT 8.77 387.925 8.82 388.055 ; + RECT 11.555 387.925 11.605 388.055 ; + RECT 11.815 387.925 11.865 388.055 ; + RECT 12.52 387.925 12.57 388.055 ; + RECT 13.98 387.925 14.03 388.055 ; + RECT 14.33 388.155 14.38 388.285 ; + RECT 6.22 388.615 6.27 388.745 ; + RECT 7.5 388.615 7.55 388.745 ; + RECT 9.04 388.615 9.09 388.745 ; + RECT 9.315 388.615 9.365 388.745 ; + RECT 9.72 388.615 9.77 388.745 ; + RECT 11.025 388.615 11.075 388.745 ; + RECT 12.79 388.615 12.84 388.745 ; + RECT 14.33 390.575 14.38 390.705 ; + RECT 5.675 390.805 5.725 390.935 ; + RECT 6.065 390.805 6.115 390.935 ; + RECT 6.725 390.805 6.775 390.935 ; + RECT 8.42 390.805 8.47 390.935 ; + RECT 8.77 390.805 8.82 390.935 ; + RECT 11.555 390.805 11.605 390.935 ; + RECT 11.815 390.805 11.865 390.935 ; + RECT 12.52 390.805 12.57 390.935 ; + RECT 13.98 390.805 14.03 390.935 ; + RECT 14.33 391.035 14.38 391.165 ; + RECT 6.22 391.495 6.27 391.625 ; + RECT 7.5 391.495 7.55 391.625 ; + RECT 9.04 391.495 9.09 391.625 ; + RECT 9.315 391.495 9.365 391.625 ; + RECT 9.72 391.495 9.77 391.625 ; + RECT 11.025 391.495 11.075 391.625 ; + RECT 12.79 391.495 12.84 391.625 ; + RECT 14.33 393.455 14.38 393.585 ; + RECT 5.675 393.685 5.725 393.815 ; + RECT 6.065 393.685 6.115 393.815 ; + RECT 6.725 393.685 6.775 393.815 ; + RECT 8.42 393.685 8.47 393.815 ; + RECT 8.77 393.685 8.82 393.815 ; + RECT 11.555 393.685 11.605 393.815 ; + RECT 11.815 393.685 11.865 393.815 ; + RECT 12.52 393.685 12.57 393.815 ; + RECT 13.98 393.685 14.03 393.815 ; + RECT 14.33 393.915 14.38 394.045 ; + RECT 6.22 394.375 6.27 394.505 ; + RECT 7.5 394.375 7.55 394.505 ; + RECT 9.04 394.375 9.09 394.505 ; + RECT 9.315 394.375 9.365 394.505 ; + RECT 9.72 394.375 9.77 394.505 ; + RECT 11.025 394.375 11.075 394.505 ; + RECT 12.79 394.375 12.84 394.505 ; + RECT 14.33 396.335 14.38 396.465 ; + RECT 5.675 396.565 5.725 396.695 ; + RECT 6.065 396.565 6.115 396.695 ; + RECT 6.725 396.565 6.775 396.695 ; + RECT 8.42 396.565 8.47 396.695 ; + RECT 8.77 396.565 8.82 396.695 ; + RECT 11.555 396.565 11.605 396.695 ; + RECT 11.815 396.565 11.865 396.695 ; + RECT 12.52 396.565 12.57 396.695 ; + RECT 13.98 396.565 14.03 396.695 ; + RECT 14.33 396.795 14.38 396.925 ; + RECT 6.22 397.255 6.27 397.385 ; + RECT 7.5 397.255 7.55 397.385 ; + RECT 9.04 397.255 9.09 397.385 ; + RECT 9.315 397.255 9.365 397.385 ; + RECT 9.72 397.255 9.77 397.385 ; + RECT 11.025 397.255 11.075 397.385 ; + RECT 12.79 397.255 12.84 397.385 ; + RECT 14.33 399.215 14.38 399.345 ; + RECT 5.675 399.445 5.725 399.575 ; + RECT 6.065 399.445 6.115 399.575 ; + RECT 6.725 399.445 6.775 399.575 ; + RECT 8.42 399.445 8.47 399.575 ; + RECT 8.77 399.445 8.82 399.575 ; + RECT 11.555 399.445 11.605 399.575 ; + RECT 11.815 399.445 11.865 399.575 ; + RECT 12.52 399.445 12.57 399.575 ; + RECT 13.98 399.445 14.03 399.575 ; + RECT 14.33 399.675 14.38 399.805 ; + RECT 6.22 400.135 6.27 400.265 ; + RECT 7.5 400.135 7.55 400.265 ; + RECT 9.04 400.135 9.09 400.265 ; + RECT 9.315 400.135 9.365 400.265 ; + RECT 9.72 400.135 9.77 400.265 ; + RECT 11.025 400.135 11.075 400.265 ; + RECT 12.79 400.135 12.84 400.265 ; + RECT 14.33 402.095 14.38 402.225 ; + RECT 5.675 402.325 5.725 402.455 ; + RECT 6.065 402.325 6.115 402.455 ; + RECT 6.725 402.325 6.775 402.455 ; + RECT 8.42 402.325 8.47 402.455 ; + RECT 8.77 402.325 8.82 402.455 ; + RECT 11.555 402.325 11.605 402.455 ; + RECT 11.815 402.325 11.865 402.455 ; + RECT 12.52 402.325 12.57 402.455 ; + RECT 13.98 402.325 14.03 402.455 ; + RECT 14.33 247.035 14.38 247.165 ; + RECT 6.22 247.495 6.27 247.625 ; + RECT 7.5 247.495 7.55 247.625 ; + RECT 9.04 247.495 9.09 247.625 ; + RECT 9.315 247.495 9.365 247.625 ; + RECT 9.72 247.495 9.77 247.625 ; + RECT 11.025 247.495 11.075 247.625 ; + RECT 12.79 247.495 12.84 247.625 ; + RECT 14.33 249.455 14.38 249.585 ; + RECT 5.675 249.685 5.725 249.815 ; + RECT 6.065 249.685 6.115 249.815 ; + RECT 6.725 249.685 6.775 249.815 ; + RECT 8.42 249.685 8.47 249.815 ; + RECT 8.77 249.685 8.82 249.815 ; + RECT 11.555 249.685 11.605 249.815 ; + RECT 11.815 249.685 11.865 249.815 ; + RECT 12.52 249.685 12.57 249.815 ; + RECT 13.98 249.685 14.03 249.815 ; + RECT 14.33 402.555 14.38 402.685 ; + RECT 6.22 403.015 6.27 403.145 ; + RECT 7.5 403.015 7.55 403.145 ; + RECT 9.04 403.015 9.09 403.145 ; + RECT 9.315 403.015 9.365 403.145 ; + RECT 9.72 403.015 9.77 403.145 ; + RECT 11.025 403.015 11.075 403.145 ; + RECT 12.79 403.015 12.84 403.145 ; + RECT 14.33 404.975 14.38 405.105 ; + RECT 5.675 405.205 5.725 405.335 ; + RECT 6.065 405.205 6.115 405.335 ; + RECT 6.725 405.205 6.775 405.335 ; + RECT 8.42 405.205 8.47 405.335 ; + RECT 8.77 405.205 8.82 405.335 ; + RECT 11.555 405.205 11.605 405.335 ; + RECT 11.815 405.205 11.865 405.335 ; + RECT 12.52 405.205 12.57 405.335 ; + RECT 13.98 405.205 14.03 405.335 ; + RECT 14.33 405.435 14.38 405.565 ; + RECT 6.22 405.895 6.27 406.025 ; + RECT 7.5 405.895 7.55 406.025 ; + RECT 9.04 405.895 9.09 406.025 ; + RECT 9.315 405.895 9.365 406.025 ; + RECT 9.72 405.895 9.77 406.025 ; + RECT 11.025 405.895 11.075 406.025 ; + RECT 12.79 405.895 12.84 406.025 ; + RECT 14.33 407.855 14.38 407.985 ; + RECT 5.675 408.085 5.725 408.215 ; + RECT 6.065 408.085 6.115 408.215 ; + RECT 6.725 408.085 6.775 408.215 ; + RECT 8.42 408.085 8.47 408.215 ; + RECT 8.77 408.085 8.82 408.215 ; + RECT 11.555 408.085 11.605 408.215 ; + RECT 11.815 408.085 11.865 408.215 ; + RECT 12.52 408.085 12.57 408.215 ; + RECT 13.98 408.085 14.03 408.215 ; + RECT 14.33 408.315 14.38 408.445 ; + RECT 6.22 408.775 6.27 408.905 ; + RECT 7.5 408.775 7.55 408.905 ; + RECT 9.04 408.775 9.09 408.905 ; + RECT 9.315 408.775 9.365 408.905 ; + RECT 9.72 408.775 9.77 408.905 ; + RECT 11.025 408.775 11.075 408.905 ; + RECT 12.79 408.775 12.84 408.905 ; + RECT 14.33 410.735 14.38 410.865 ; + RECT 5.675 410.965 5.725 411.095 ; + RECT 6.065 410.965 6.115 411.095 ; + RECT 6.725 410.965 6.775 411.095 ; + RECT 8.42 410.965 8.47 411.095 ; + RECT 8.77 410.965 8.82 411.095 ; + RECT 11.555 410.965 11.605 411.095 ; + RECT 11.815 410.965 11.865 411.095 ; + RECT 12.52 410.965 12.57 411.095 ; + RECT 13.98 410.965 14.03 411.095 ; + RECT 14.33 249.915 14.38 250.045 ; + RECT 6.22 250.375 6.27 250.505 ; + RECT 7.5 250.375 7.55 250.505 ; + RECT 9.04 250.375 9.09 250.505 ; + RECT 9.315 250.375 9.365 250.505 ; + RECT 9.72 250.375 9.77 250.505 ; + RECT 11.025 250.375 11.075 250.505 ; + RECT 12.79 250.375 12.84 250.505 ; + RECT 14.33 252.335 14.38 252.465 ; + RECT 5.675 252.565 5.725 252.695 ; + RECT 6.065 252.565 6.115 252.695 ; + RECT 6.725 252.565 6.775 252.695 ; + RECT 8.42 252.565 8.47 252.695 ; + RECT 8.77 252.565 8.82 252.695 ; + RECT 11.555 252.565 11.605 252.695 ; + RECT 11.815 252.565 11.865 252.695 ; + RECT 12.52 252.565 12.57 252.695 ; + RECT 13.98 252.565 14.03 252.695 ; + RECT 14.33 252.795 14.38 252.925 ; + RECT 6.22 253.255 6.27 253.385 ; + RECT 7.5 253.255 7.55 253.385 ; + RECT 9.04 253.255 9.09 253.385 ; + RECT 9.315 253.255 9.365 253.385 ; + RECT 9.72 253.255 9.77 253.385 ; + RECT 11.025 253.255 11.075 253.385 ; + RECT 12.79 253.255 12.84 253.385 ; + RECT 14.33 255.215 14.38 255.345 ; + RECT 5.675 255.445 5.725 255.575 ; + RECT 6.065 255.445 6.115 255.575 ; + RECT 6.725 255.445 6.775 255.575 ; + RECT 8.42 255.445 8.47 255.575 ; + RECT 8.77 255.445 8.82 255.575 ; + RECT 11.555 255.445 11.605 255.575 ; + RECT 11.815 255.445 11.865 255.575 ; + RECT 12.52 255.445 12.57 255.575 ; + RECT 13.98 255.445 14.03 255.575 ; + RECT 14.33 255.675 14.38 255.805 ; + RECT 6.22 256.135 6.27 256.265 ; + RECT 7.5 256.135 7.55 256.265 ; + RECT 9.04 256.135 9.09 256.265 ; + RECT 9.315 256.135 9.365 256.265 ; + RECT 9.72 256.135 9.77 256.265 ; + RECT 11.025 256.135 11.075 256.265 ; + RECT 12.79 256.135 12.84 256.265 ; + RECT 14.33 258.095 14.38 258.225 ; + RECT 5.675 258.325 5.725 258.455 ; + RECT 6.065 258.325 6.115 258.455 ; + RECT 6.725 258.325 6.775 258.455 ; + RECT 8.42 258.325 8.47 258.455 ; + RECT 8.77 258.325 8.82 258.455 ; + RECT 11.555 258.325 11.605 258.455 ; + RECT 11.815 258.325 11.865 258.455 ; + RECT 12.52 258.325 12.57 258.455 ; + RECT 13.98 258.325 14.03 258.455 ; + RECT 14.33 411.195 14.38 411.325 ; + RECT 6.22 411.655 6.27 411.785 ; + RECT 7.5 411.655 7.55 411.785 ; + RECT 9.04 411.655 9.09 411.785 ; + RECT 9.315 411.655 9.365 411.785 ; + RECT 9.72 411.655 9.77 411.785 ; + RECT 11.025 411.655 11.075 411.785 ; + RECT 12.79 411.655 12.84 411.785 ; + RECT 14.33 413.615 14.38 413.745 ; + RECT 5.675 413.845 5.725 413.975 ; + RECT 6.065 413.845 6.115 413.975 ; + RECT 6.725 413.845 6.775 413.975 ; + RECT 8.42 413.845 8.47 413.975 ; + RECT 8.77 413.845 8.82 413.975 ; + RECT 11.555 413.845 11.605 413.975 ; + RECT 11.815 413.845 11.865 413.975 ; + RECT 12.52 413.845 12.57 413.975 ; + RECT 13.98 413.845 14.03 413.975 ; + RECT 14.33 229.755 14.38 229.885 ; + RECT 6.22 230.215 6.27 230.345 ; + RECT 7.5 230.215 7.55 230.345 ; + RECT 9.04 230.215 9.09 230.345 ; + RECT 9.315 230.215 9.365 230.345 ; + RECT 9.72 230.215 9.77 230.345 ; + RECT 11.025 230.215 11.075 230.345 ; + RECT 12.79 230.215 12.84 230.345 ; + RECT 14.33 232.175 14.38 232.305 ; + RECT 5.675 232.405 5.725 232.535 ; + RECT 6.065 232.405 6.115 232.535 ; + RECT 6.725 232.405 6.775 232.535 ; + RECT 8.42 232.405 8.47 232.535 ; + RECT 8.77 232.405 8.82 232.535 ; + RECT 11.555 232.405 11.605 232.535 ; + RECT 11.815 232.405 11.865 232.535 ; + RECT 12.52 232.405 12.57 232.535 ; + RECT 13.98 232.405 14.03 232.535 ; + RECT 13.98 414.535 14.03 414.665 ; + RECT 3.06 414.075 3.11 414.205 ; + RECT 1.57 414.535 1.62 414.665 ; + RECT 2.485 414.535 2.665 414.665 ; + RECT 3.84 414.535 3.89 414.665 ; + RECT 7.19 414.535 7.24 414.665 ; + RECT 14.14 414.535 14.19 414.665 ; + RECT 13.8 414.305 13.85 414.435 ; + RECT 8.56 414.075 8.61 414.205 ; + RECT 10.27 414.075 10.32 414.205 ; + RECT 0.435 414.075 0.485 414.205 ; + RECT 0.62 414.535 0.67 414.665 ; + RECT 3.65 414.535 3.7 414.665 ; + RECT 2.18 414.075 2.23 414.205 ; + RECT 0.9 235.285 0.95 235.415 ; + RECT 0.9 261.205 0.95 261.335 ; + RECT 0.9 264.085 0.95 264.215 ; + RECT 0.9 266.965 0.95 267.095 ; + RECT 0.9 269.845 0.95 269.975 ; + RECT 0.9 272.725 0.95 272.855 ; + RECT 0.9 275.605 0.95 275.735 ; + RECT 0.9 278.485 0.95 278.615 ; + RECT 0.9 281.365 0.95 281.495 ; + RECT 0.9 284.245 0.95 284.375 ; + RECT 0.9 287.125 0.95 287.255 ; + RECT 0.9 238.165 0.95 238.295 ; + RECT 0.9 290.005 0.95 290.135 ; + RECT 0.9 292.885 0.95 293.015 ; + RECT 0.9 295.765 0.95 295.895 ; + RECT 0.9 298.645 0.95 298.775 ; + RECT 0.9 301.525 0.95 301.655 ; + RECT 0.9 304.405 0.95 304.535 ; + RECT 0.9 307.285 0.95 307.415 ; + RECT 0.9 310.165 0.95 310.295 ; + RECT 0.9 313.045 0.95 313.175 ; + RECT 0.9 315.925 0.95 316.055 ; + RECT 0.9 241.045 0.95 241.175 ; + RECT 0.9 318.805 0.95 318.935 ; + RECT 0.9 321.685 0.95 321.815 ; + RECT 0.9 324.565 0.95 324.695 ; + RECT 0.9 327.445 0.95 327.575 ; + RECT 0.9 330.325 0.95 330.455 ; + RECT 0.9 333.205 0.95 333.335 ; + RECT 0.9 336.085 0.95 336.215 ; + RECT 0.9 338.965 0.95 339.095 ; + RECT 0.9 341.845 0.95 341.975 ; + RECT 0.9 344.725 0.95 344.855 ; + RECT 0.9 243.925 0.95 244.055 ; + RECT 0.9 347.605 0.95 347.735 ; + RECT 0.9 350.485 0.95 350.615 ; + RECT 0.9 353.365 0.95 353.495 ; + RECT 0.9 356.245 0.95 356.375 ; + RECT 0.9 359.125 0.95 359.255 ; + RECT 0.9 362.005 0.95 362.135 ; + RECT 0.9 364.885 0.95 365.015 ; + RECT 0.9 367.765 0.95 367.895 ; + RECT 0.9 370.645 0.95 370.775 ; + RECT 0.9 373.525 0.95 373.655 ; + RECT 0.9 246.805 0.95 246.935 ; + RECT 0.9 376.405 0.95 376.535 ; + RECT 0.9 379.285 0.95 379.415 ; + RECT 0.9 382.165 0.95 382.295 ; + RECT 0.9 385.045 0.95 385.175 ; + RECT 0.9 387.925 0.95 388.055 ; + RECT 0.9 390.805 0.95 390.935 ; + RECT 0.9 393.685 0.95 393.815 ; + RECT 0.9 396.565 0.95 396.695 ; + RECT 0.9 399.445 0.95 399.575 ; + RECT 0.9 402.325 0.95 402.455 ; + RECT 0.9 249.685 0.95 249.815 ; + RECT 0.9 405.205 0.95 405.335 ; + RECT 0.9 408.085 0.95 408.215 ; + RECT 0.9 410.965 0.95 411.095 ; + RECT 0.9 252.565 0.95 252.695 ; + RECT 0.9 255.445 0.95 255.575 ; + RECT 0.9 258.325 0.95 258.455 ; + RECT 0.9 413.845 0.95 413.975 ; + RECT 0.9 232.405 0.95 232.535 ; + RECT 2.18 229.755 2.23 229.885 ; + RECT 2.18 232.175 2.23 232.305 ; + RECT 2.18 258.555 2.23 258.685 ; + RECT 2.18 260.975 2.23 261.105 ; + RECT 2.18 261.435 2.23 261.565 ; + RECT 2.18 263.855 2.23 263.985 ; + RECT 2.18 264.315 2.23 264.445 ; + RECT 2.18 266.735 2.23 266.865 ; + RECT 2.18 267.195 2.23 267.325 ; + RECT 2.18 269.615 2.23 269.745 ; + RECT 2.18 270.075 2.23 270.205 ; + RECT 2.18 272.495 2.23 272.625 ; + RECT 2.18 272.955 2.23 273.085 ; + RECT 2.18 275.375 2.23 275.505 ; + RECT 2.18 275.835 2.23 275.965 ; + RECT 2.18 278.255 2.23 278.385 ; + RECT 2.18 278.715 2.23 278.845 ; + RECT 2.18 281.135 2.23 281.265 ; + RECT 2.18 281.595 2.23 281.725 ; + RECT 2.18 284.015 2.23 284.145 ; + RECT 2.18 284.475 2.23 284.605 ; + RECT 2.18 286.895 2.23 287.025 ; + RECT 2.18 232.635 2.23 232.765 ; + RECT 2.18 235.055 2.23 235.185 ; + RECT 2.18 287.355 2.23 287.485 ; + RECT 2.18 289.775 2.23 289.905 ; + RECT 2.18 290.235 2.23 290.365 ; + RECT 2.18 292.655 2.23 292.785 ; + RECT 2.18 293.115 2.23 293.245 ; + RECT 2.18 295.535 2.23 295.665 ; + RECT 2.18 295.995 2.23 296.125 ; + RECT 2.18 298.415 2.23 298.545 ; + RECT 2.18 298.875 2.23 299.005 ; + RECT 2.18 301.295 2.23 301.425 ; + RECT 2.18 301.755 2.23 301.885 ; + RECT 2.18 304.175 2.23 304.305 ; + RECT 2.18 304.635 2.23 304.765 ; + RECT 2.18 307.055 2.23 307.185 ; + RECT 2.18 307.515 2.23 307.645 ; + RECT 2.18 309.935 2.23 310.065 ; + RECT 2.18 310.395 2.23 310.525 ; + RECT 2.18 312.815 2.23 312.945 ; + RECT 2.18 313.275 2.23 313.405 ; + RECT 2.18 315.695 2.23 315.825 ; + RECT 2.18 235.515 2.23 235.645 ; + RECT 2.18 237.935 2.23 238.065 ; + RECT 2.18 316.155 2.23 316.285 ; + RECT 2.18 318.575 2.23 318.705 ; + RECT 2.18 319.035 2.23 319.165 ; + RECT 2.18 321.455 2.23 321.585 ; + RECT 2.18 321.915 2.23 322.045 ; + RECT 2.18 324.335 2.23 324.465 ; + RECT 2.18 324.795 2.23 324.925 ; + RECT 2.18 327.215 2.23 327.345 ; + RECT 2.18 327.675 2.23 327.805 ; + RECT 2.18 330.095 2.23 330.225 ; + RECT 2.18 330.555 2.23 330.685 ; + RECT 2.18 332.975 2.23 333.105 ; + RECT 2.18 333.435 2.23 333.565 ; + RECT 2.18 335.855 2.23 335.985 ; + RECT 2.18 336.315 2.23 336.445 ; + RECT 2.18 338.735 2.23 338.865 ; + RECT 2.18 339.195 2.23 339.325 ; + RECT 2.18 341.615 2.23 341.745 ; + RECT 2.18 342.075 2.23 342.205 ; + RECT 2.18 344.495 2.23 344.625 ; + RECT 2.18 238.395 2.23 238.525 ; + RECT 2.18 240.815 2.23 240.945 ; + RECT 2.18 344.955 2.23 345.085 ; + RECT 2.18 347.375 2.23 347.505 ; + RECT 2.18 347.835 2.23 347.965 ; + RECT 2.18 350.255 2.23 350.385 ; + RECT 2.18 350.715 2.23 350.845 ; + RECT 2.18 353.135 2.23 353.265 ; + RECT 2.18 353.595 2.23 353.725 ; + RECT 2.18 356.015 2.23 356.145 ; + RECT 2.18 356.475 2.23 356.605 ; + RECT 2.18 358.895 2.23 359.025 ; + RECT 2.18 359.355 2.23 359.485 ; + RECT 2.18 361.775 2.23 361.905 ; + RECT 2.18 362.235 2.23 362.365 ; + RECT 2.18 364.655 2.23 364.785 ; + RECT 2.18 365.115 2.23 365.245 ; + RECT 2.18 367.535 2.23 367.665 ; + RECT 2.18 367.995 2.23 368.125 ; + RECT 2.18 370.415 2.23 370.545 ; + RECT 2.18 370.875 2.23 371.005 ; + RECT 2.18 373.295 2.23 373.425 ; + RECT 2.18 241.275 2.23 241.405 ; + RECT 2.18 243.695 2.23 243.825 ; + RECT 2.18 373.755 2.23 373.885 ; + RECT 2.18 376.175 2.23 376.305 ; + RECT 2.18 376.635 2.23 376.765 ; + RECT 2.18 379.055 2.23 379.185 ; + RECT 2.18 379.515 2.23 379.645 ; + RECT 2.18 381.935 2.23 382.065 ; + RECT 2.18 382.395 2.23 382.525 ; + RECT 2.18 384.815 2.23 384.945 ; + RECT 2.18 385.275 2.23 385.405 ; + RECT 2.18 387.695 2.23 387.825 ; + RECT 2.18 388.155 2.23 388.285 ; + RECT 2.18 390.575 2.23 390.705 ; + RECT 2.18 391.035 2.23 391.165 ; + RECT 2.18 393.455 2.23 393.585 ; + RECT 2.18 393.915 2.23 394.045 ; + RECT 2.18 396.335 2.23 396.465 ; + RECT 2.18 396.795 2.23 396.925 ; + RECT 2.18 399.215 2.23 399.345 ; + RECT 2.18 399.675 2.23 399.805 ; + RECT 2.18 402.095 2.23 402.225 ; + RECT 2.18 244.155 2.23 244.285 ; + RECT 2.18 246.575 2.23 246.705 ; + RECT 2.18 402.555 2.23 402.685 ; + RECT 2.18 404.975 2.23 405.105 ; + RECT 2.18 405.435 2.23 405.565 ; + RECT 2.18 407.855 2.23 407.985 ; + RECT 2.18 408.315 2.23 408.445 ; + RECT 2.18 410.735 2.23 410.865 ; + RECT 2.18 411.195 2.23 411.325 ; + RECT 2.18 413.615 2.23 413.745 ; + RECT 2.18 247.035 2.23 247.165 ; + RECT 2.18 249.455 2.23 249.585 ; + RECT 2.18 249.915 2.23 250.045 ; + RECT 2.18 252.335 2.23 252.465 ; + RECT 2.18 252.795 2.23 252.925 ; + RECT 2.18 255.215 2.23 255.345 ; + RECT 2.18 255.675 2.23 255.805 ; + RECT 2.18 258.095 2.23 258.225 ; + RECT 1.38 229.755 1.43 229.885 ; + RECT 4.51 229.755 4.56 229.885 ; + RECT 3.06 230.215 3.11 230.345 ; + RECT 1.405 232.175 1.455 232.305 ; + RECT 4.51 232.175 4.56 232.305 ; + RECT 1.38 258.555 1.43 258.685 ; + RECT 4.51 258.555 4.56 258.685 ; + RECT 3.06 259.015 3.11 259.145 ; + RECT 1.405 260.975 1.455 261.105 ; + RECT 4.51 260.975 4.56 261.105 ; + RECT 1.38 261.435 1.43 261.565 ; + RECT 4.51 261.435 4.56 261.565 ; + RECT 3.06 261.895 3.11 262.025 ; + RECT 1.405 263.855 1.455 263.985 ; + RECT 4.51 263.855 4.56 263.985 ; + RECT 1.38 264.315 1.43 264.445 ; + RECT 4.51 264.315 4.56 264.445 ; + RECT 3.06 264.775 3.11 264.905 ; + RECT 1.405 266.735 1.455 266.865 ; + RECT 4.51 266.735 4.56 266.865 ; + RECT 1.38 267.195 1.43 267.325 ; + RECT 4.51 267.195 4.56 267.325 ; + RECT 3.06 267.655 3.11 267.785 ; + RECT 1.405 269.615 1.455 269.745 ; + RECT 4.51 269.615 4.56 269.745 ; + RECT 1.38 270.075 1.43 270.205 ; + RECT 4.51 270.075 4.56 270.205 ; + RECT 3.06 270.535 3.11 270.665 ; + RECT 1.405 272.495 1.455 272.625 ; + RECT 4.51 272.495 4.56 272.625 ; + RECT 1.38 272.955 1.43 273.085 ; + RECT 4.51 272.955 4.56 273.085 ; + RECT 3.06 273.415 3.11 273.545 ; + RECT 1.405 275.375 1.455 275.505 ; + RECT 4.51 275.375 4.56 275.505 ; + RECT 1.38 275.835 1.43 275.965 ; + RECT 4.51 275.835 4.56 275.965 ; + RECT 3.06 276.295 3.11 276.425 ; + RECT 1.405 278.255 1.455 278.385 ; + RECT 4.51 278.255 4.56 278.385 ; + RECT 1.38 278.715 1.43 278.845 ; + RECT 4.51 278.715 4.56 278.845 ; + RECT 3.06 279.175 3.11 279.305 ; + RECT 1.405 281.135 1.455 281.265 ; + RECT 4.51 281.135 4.56 281.265 ; + RECT 1.38 281.595 1.43 281.725 ; + RECT 4.51 281.595 4.56 281.725 ; + RECT 3.06 282.055 3.11 282.185 ; + RECT 1.405 284.015 1.455 284.145 ; + RECT 4.51 284.015 4.56 284.145 ; + RECT 1.38 284.475 1.43 284.605 ; + RECT 4.51 284.475 4.56 284.605 ; + RECT 3.06 284.935 3.11 285.065 ; + RECT 1.405 286.895 1.455 287.025 ; + RECT 4.51 286.895 4.56 287.025 ; + RECT 1.38 232.635 1.43 232.765 ; + RECT 4.51 232.635 4.56 232.765 ; + RECT 3.06 233.095 3.11 233.225 ; + RECT 1.405 235.055 1.455 235.185 ; + RECT 4.51 235.055 4.56 235.185 ; + RECT 1.38 287.355 1.43 287.485 ; + RECT 4.51 287.355 4.56 287.485 ; + RECT 3.06 287.815 3.11 287.945 ; + RECT 1.405 289.775 1.455 289.905 ; + RECT 4.51 289.775 4.56 289.905 ; + RECT 1.38 290.235 1.43 290.365 ; + RECT 4.51 290.235 4.56 290.365 ; + RECT 3.06 290.695 3.11 290.825 ; + RECT 1.405 292.655 1.455 292.785 ; + RECT 4.51 292.655 4.56 292.785 ; + RECT 1.38 293.115 1.43 293.245 ; + RECT 4.51 293.115 4.56 293.245 ; + RECT 3.06 293.575 3.11 293.705 ; + RECT 1.405 295.535 1.455 295.665 ; + RECT 4.51 295.535 4.56 295.665 ; + RECT 1.38 295.995 1.43 296.125 ; + RECT 4.51 295.995 4.56 296.125 ; + RECT 3.06 296.455 3.11 296.585 ; + RECT 1.405 298.415 1.455 298.545 ; + RECT 4.51 298.415 4.56 298.545 ; + RECT 1.38 298.875 1.43 299.005 ; + RECT 4.51 298.875 4.56 299.005 ; + RECT 3.06 299.335 3.11 299.465 ; + RECT 1.405 301.295 1.455 301.425 ; + RECT 4.51 301.295 4.56 301.425 ; + RECT 1.38 301.755 1.43 301.885 ; + RECT 4.51 301.755 4.56 301.885 ; + RECT 3.06 302.215 3.11 302.345 ; + RECT 1.405 304.175 1.455 304.305 ; + RECT 4.51 304.175 4.56 304.305 ; + RECT 1.38 304.635 1.43 304.765 ; + RECT 4.51 304.635 4.56 304.765 ; + RECT 3.06 305.095 3.11 305.225 ; + RECT 1.405 307.055 1.455 307.185 ; + RECT 4.51 307.055 4.56 307.185 ; + RECT 1.38 307.515 1.43 307.645 ; + RECT 4.51 307.515 4.56 307.645 ; + RECT 3.06 307.975 3.11 308.105 ; + RECT 1.405 309.935 1.455 310.065 ; + RECT 4.51 309.935 4.56 310.065 ; + RECT 1.38 310.395 1.43 310.525 ; + RECT 4.51 310.395 4.56 310.525 ; + RECT 3.06 310.855 3.11 310.985 ; + RECT 1.405 312.815 1.455 312.945 ; + RECT 4.51 312.815 4.56 312.945 ; + RECT 1.38 313.275 1.43 313.405 ; + RECT 4.51 313.275 4.56 313.405 ; + RECT 3.06 313.735 3.11 313.865 ; + RECT 1.405 315.695 1.455 315.825 ; + RECT 4.51 315.695 4.56 315.825 ; + RECT 1.38 235.515 1.43 235.645 ; + RECT 4.51 235.515 4.56 235.645 ; + RECT 3.06 235.975 3.11 236.105 ; + RECT 1.405 237.935 1.455 238.065 ; + RECT 4.51 237.935 4.56 238.065 ; + RECT 1.38 316.155 1.43 316.285 ; + RECT 4.51 316.155 4.56 316.285 ; + RECT 3.06 316.615 3.11 316.745 ; + RECT 1.405 318.575 1.455 318.705 ; + RECT 4.51 318.575 4.56 318.705 ; + RECT 1.38 319.035 1.43 319.165 ; + RECT 4.51 319.035 4.56 319.165 ; + RECT 3.06 319.495 3.11 319.625 ; + RECT 1.405 321.455 1.455 321.585 ; + RECT 4.51 321.455 4.56 321.585 ; + RECT 1.38 321.915 1.43 322.045 ; + RECT 4.51 321.915 4.56 322.045 ; + RECT 3.06 322.375 3.11 322.505 ; + RECT 1.405 324.335 1.455 324.465 ; + RECT 4.51 324.335 4.56 324.465 ; + RECT 1.38 324.795 1.43 324.925 ; + RECT 4.51 324.795 4.56 324.925 ; + RECT 3.06 325.255 3.11 325.385 ; + RECT 1.405 327.215 1.455 327.345 ; + RECT 4.51 327.215 4.56 327.345 ; + RECT 1.38 327.675 1.43 327.805 ; + RECT 4.51 327.675 4.56 327.805 ; + RECT 3.06 328.135 3.11 328.265 ; + RECT 1.405 330.095 1.455 330.225 ; + RECT 4.51 330.095 4.56 330.225 ; + RECT 1.38 330.555 1.43 330.685 ; + RECT 4.51 330.555 4.56 330.685 ; + RECT 3.06 331.015 3.11 331.145 ; + RECT 1.405 332.975 1.455 333.105 ; + RECT 4.51 332.975 4.56 333.105 ; + RECT 1.38 333.435 1.43 333.565 ; + RECT 4.51 333.435 4.56 333.565 ; + RECT 3.06 333.895 3.11 334.025 ; + RECT 1.405 335.855 1.455 335.985 ; + RECT 4.51 335.855 4.56 335.985 ; + RECT 1.38 336.315 1.43 336.445 ; + RECT 4.51 336.315 4.56 336.445 ; + RECT 3.06 336.775 3.11 336.905 ; + RECT 1.405 338.735 1.455 338.865 ; + RECT 4.51 338.735 4.56 338.865 ; + RECT 1.38 339.195 1.43 339.325 ; + RECT 4.51 339.195 4.56 339.325 ; + RECT 3.06 339.655 3.11 339.785 ; + RECT 1.405 341.615 1.455 341.745 ; + RECT 4.51 341.615 4.56 341.745 ; + RECT 1.38 342.075 1.43 342.205 ; + RECT 4.51 342.075 4.56 342.205 ; + RECT 3.06 342.535 3.11 342.665 ; + RECT 1.405 344.495 1.455 344.625 ; + RECT 4.51 344.495 4.56 344.625 ; + RECT 1.38 238.395 1.43 238.525 ; + RECT 4.51 238.395 4.56 238.525 ; + RECT 3.06 238.855 3.11 238.985 ; + RECT 1.405 240.815 1.455 240.945 ; + RECT 4.51 240.815 4.56 240.945 ; + RECT 1.38 344.955 1.43 345.085 ; + RECT 4.51 344.955 4.56 345.085 ; + RECT 3.06 345.415 3.11 345.545 ; + RECT 1.405 347.375 1.455 347.505 ; + RECT 4.51 347.375 4.56 347.505 ; + RECT 1.38 347.835 1.43 347.965 ; + RECT 4.51 347.835 4.56 347.965 ; + RECT 3.06 348.295 3.11 348.425 ; + RECT 1.405 350.255 1.455 350.385 ; + RECT 4.51 350.255 4.56 350.385 ; + RECT 1.38 350.715 1.43 350.845 ; + RECT 4.51 350.715 4.56 350.845 ; + RECT 3.06 351.175 3.11 351.305 ; + RECT 1.405 353.135 1.455 353.265 ; + RECT 4.51 353.135 4.56 353.265 ; + RECT 1.38 353.595 1.43 353.725 ; + RECT 4.51 353.595 4.56 353.725 ; + RECT 3.06 354.055 3.11 354.185 ; + RECT 1.405 356.015 1.455 356.145 ; + RECT 4.51 356.015 4.56 356.145 ; + RECT 1.38 356.475 1.43 356.605 ; + RECT 4.51 356.475 4.56 356.605 ; + RECT 3.06 356.935 3.11 357.065 ; + RECT 1.405 358.895 1.455 359.025 ; + RECT 4.51 358.895 4.56 359.025 ; + RECT 1.38 359.355 1.43 359.485 ; + RECT 4.51 359.355 4.56 359.485 ; + RECT 3.06 359.815 3.11 359.945 ; + RECT 1.405 361.775 1.455 361.905 ; + RECT 4.51 361.775 4.56 361.905 ; + RECT 1.38 362.235 1.43 362.365 ; + RECT 4.51 362.235 4.56 362.365 ; + RECT 3.06 362.695 3.11 362.825 ; + RECT 1.405 364.655 1.455 364.785 ; + RECT 4.51 364.655 4.56 364.785 ; + RECT 1.38 365.115 1.43 365.245 ; + RECT 4.51 365.115 4.56 365.245 ; + RECT 3.06 365.575 3.11 365.705 ; + RECT 1.405 367.535 1.455 367.665 ; + RECT 4.51 367.535 4.56 367.665 ; + RECT 1.38 367.995 1.43 368.125 ; + RECT 4.51 367.995 4.56 368.125 ; + RECT 3.06 368.455 3.11 368.585 ; + RECT 1.405 370.415 1.455 370.545 ; + RECT 4.51 370.415 4.56 370.545 ; + RECT 1.38 370.875 1.43 371.005 ; + RECT 4.51 370.875 4.56 371.005 ; + RECT 3.06 371.335 3.11 371.465 ; + RECT 1.405 373.295 1.455 373.425 ; + RECT 4.51 373.295 4.56 373.425 ; + RECT 1.38 241.275 1.43 241.405 ; + RECT 4.51 241.275 4.56 241.405 ; + RECT 3.06 241.735 3.11 241.865 ; + RECT 1.405 243.695 1.455 243.825 ; + RECT 4.51 243.695 4.56 243.825 ; + RECT 1.38 373.755 1.43 373.885 ; + RECT 4.51 373.755 4.56 373.885 ; + RECT 3.06 374.215 3.11 374.345 ; + RECT 1.405 376.175 1.455 376.305 ; + RECT 4.51 376.175 4.56 376.305 ; + RECT 1.38 376.635 1.43 376.765 ; + RECT 4.51 376.635 4.56 376.765 ; + RECT 3.06 377.095 3.11 377.225 ; + RECT 1.405 379.055 1.455 379.185 ; + RECT 4.51 379.055 4.56 379.185 ; + RECT 1.38 379.515 1.43 379.645 ; + RECT 4.51 379.515 4.56 379.645 ; + RECT 3.06 379.975 3.11 380.105 ; + RECT 1.405 381.935 1.455 382.065 ; + RECT 4.51 381.935 4.56 382.065 ; + RECT 1.38 382.395 1.43 382.525 ; + RECT 4.51 382.395 4.56 382.525 ; + RECT 3.06 382.855 3.11 382.985 ; + RECT 1.405 384.815 1.455 384.945 ; + RECT 4.51 384.815 4.56 384.945 ; + RECT 1.38 385.275 1.43 385.405 ; + RECT 4.51 385.275 4.56 385.405 ; + RECT 3.06 385.735 3.11 385.865 ; + RECT 1.405 387.695 1.455 387.825 ; + RECT 4.51 387.695 4.56 387.825 ; + RECT 1.38 388.155 1.43 388.285 ; + RECT 4.51 388.155 4.56 388.285 ; + RECT 3.06 388.615 3.11 388.745 ; + RECT 1.405 390.575 1.455 390.705 ; + RECT 4.51 390.575 4.56 390.705 ; + RECT 1.38 391.035 1.43 391.165 ; + RECT 4.51 391.035 4.56 391.165 ; + RECT 3.06 391.495 3.11 391.625 ; + RECT 1.405 393.455 1.455 393.585 ; + RECT 4.51 393.455 4.56 393.585 ; + RECT 1.38 393.915 1.43 394.045 ; + RECT 4.51 393.915 4.56 394.045 ; + RECT 3.06 394.375 3.11 394.505 ; + RECT 1.405 396.335 1.455 396.465 ; + RECT 4.51 396.335 4.56 396.465 ; + RECT 1.38 396.795 1.43 396.925 ; + RECT 4.51 396.795 4.56 396.925 ; + RECT 3.06 397.255 3.11 397.385 ; + RECT 1.405 399.215 1.455 399.345 ; + RECT 4.51 399.215 4.56 399.345 ; + RECT 1.38 399.675 1.43 399.805 ; + RECT 4.51 399.675 4.56 399.805 ; + RECT 3.06 400.135 3.11 400.265 ; + RECT 1.405 402.095 1.455 402.225 ; + RECT 4.51 402.095 4.56 402.225 ; + RECT 1.38 244.155 1.43 244.285 ; + RECT 4.51 244.155 4.56 244.285 ; + RECT 3.06 244.615 3.11 244.745 ; + RECT 1.405 246.575 1.455 246.705 ; + RECT 4.51 246.575 4.56 246.705 ; + RECT 1.38 402.555 1.43 402.685 ; + RECT 4.51 402.555 4.56 402.685 ; + RECT 3.06 403.015 3.11 403.145 ; + RECT 1.405 404.975 1.455 405.105 ; + RECT 4.51 404.975 4.56 405.105 ; + RECT 1.38 405.435 1.43 405.565 ; + RECT 4.51 405.435 4.56 405.565 ; + RECT 3.06 405.895 3.11 406.025 ; + RECT 1.405 407.855 1.455 407.985 ; + RECT 4.51 407.855 4.56 407.985 ; + RECT 1.38 408.315 1.43 408.445 ; + RECT 4.51 408.315 4.56 408.445 ; + RECT 3.06 408.775 3.11 408.905 ; + RECT 1.405 410.735 1.455 410.865 ; + RECT 4.51 410.735 4.56 410.865 ; + RECT 1.38 411.195 1.43 411.325 ; + RECT 4.51 411.195 4.56 411.325 ; + RECT 3.06 411.655 3.11 411.785 ; + RECT 1.405 413.615 1.455 413.745 ; + RECT 4.51 413.615 4.56 413.745 ; + RECT 1.38 247.035 1.43 247.165 ; + RECT 4.51 247.035 4.56 247.165 ; + RECT 3.06 247.495 3.11 247.625 ; + RECT 1.405 249.455 1.455 249.585 ; + RECT 4.51 249.455 4.56 249.585 ; + RECT 1.38 249.915 1.43 250.045 ; + RECT 4.51 249.915 4.56 250.045 ; + RECT 3.06 250.375 3.11 250.505 ; + RECT 1.405 252.335 1.455 252.465 ; + RECT 4.51 252.335 4.56 252.465 ; + RECT 1.38 252.795 1.43 252.925 ; + RECT 4.51 252.795 4.56 252.925 ; + RECT 3.06 253.255 3.11 253.385 ; + RECT 1.405 255.215 1.455 255.345 ; + RECT 4.51 255.215 4.56 255.345 ; + RECT 1.38 255.675 1.43 255.805 ; + RECT 4.51 255.675 4.56 255.805 ; + RECT 3.06 256.135 3.11 256.265 ; + RECT 1.405 258.095 1.455 258.225 ; + RECT 4.51 258.095 4.56 258.225 ; + RECT 3.06 232.635 3.11 232.765 ; + RECT 1.085 233.095 1.135 233.225 ; + RECT 1.405 233.135 1.455 233.185 ; + RECT 4.47 233.135 4.6 233.185 ; + RECT 3.06 235.055 3.11 235.185 ; + RECT 1.57 235.285 1.62 235.415 ; + RECT 2.58 235.285 2.63 235.415 ; + RECT 3.84 235.285 3.89 235.415 ; + RECT 5.675 235.285 5.725 235.415 ; + RECT 3.06 258.555 3.11 258.685 ; + RECT 1.085 259.015 1.135 259.145 ; + RECT 1.405 259.055 1.455 259.105 ; + RECT 4.47 259.055 4.6 259.105 ; + RECT 3.06 260.975 3.11 261.105 ; + RECT 1.57 261.205 1.62 261.335 ; + RECT 2.58 261.205 2.63 261.335 ; + RECT 3.84 261.205 3.89 261.335 ; + RECT 5.675 261.205 5.725 261.335 ; + RECT 3.06 261.435 3.11 261.565 ; + RECT 1.085 261.895 1.135 262.025 ; + RECT 1.405 261.935 1.455 261.985 ; + RECT 4.47 261.935 4.6 261.985 ; + RECT 3.06 263.855 3.11 263.985 ; + RECT 1.57 264.085 1.62 264.215 ; + RECT 2.58 264.085 2.63 264.215 ; + RECT 3.84 264.085 3.89 264.215 ; + RECT 5.675 264.085 5.725 264.215 ; + RECT 3.06 264.315 3.11 264.445 ; + RECT 1.085 264.775 1.135 264.905 ; + RECT 1.405 264.815 1.455 264.865 ; + RECT 4.47 264.815 4.6 264.865 ; + RECT 3.06 266.735 3.11 266.865 ; + RECT 1.57 266.965 1.62 267.095 ; + RECT 2.58 266.965 2.63 267.095 ; + RECT 3.84 266.965 3.89 267.095 ; + RECT 5.675 266.965 5.725 267.095 ; + RECT 3.06 267.195 3.11 267.325 ; + RECT 1.085 267.655 1.135 267.785 ; + RECT 1.405 267.695 1.455 267.745 ; + RECT 4.47 267.695 4.6 267.745 ; + RECT 3.06 269.615 3.11 269.745 ; + RECT 1.57 269.845 1.62 269.975 ; + RECT 2.58 269.845 2.63 269.975 ; + RECT 3.84 269.845 3.89 269.975 ; + RECT 5.675 269.845 5.725 269.975 ; + RECT 3.06 270.075 3.11 270.205 ; + RECT 1.085 270.535 1.135 270.665 ; + RECT 1.405 270.575 1.455 270.625 ; + RECT 4.47 270.575 4.6 270.625 ; + RECT 3.06 272.495 3.11 272.625 ; + RECT 1.57 272.725 1.62 272.855 ; + RECT 2.58 272.725 2.63 272.855 ; + RECT 3.84 272.725 3.89 272.855 ; + RECT 5.675 272.725 5.725 272.855 ; + RECT 3.06 272.955 3.11 273.085 ; + RECT 1.085 273.415 1.135 273.545 ; + RECT 1.405 273.455 1.455 273.505 ; + RECT 4.47 273.455 4.6 273.505 ; + RECT 3.06 275.375 3.11 275.505 ; + RECT 1.57 275.605 1.62 275.735 ; + RECT 2.58 275.605 2.63 275.735 ; + RECT 3.84 275.605 3.89 275.735 ; + RECT 5.675 275.605 5.725 275.735 ; + RECT 3.06 275.835 3.11 275.965 ; + RECT 1.085 276.295 1.135 276.425 ; + RECT 1.405 276.335 1.455 276.385 ; + RECT 4.47 276.335 4.6 276.385 ; + RECT 3.06 278.255 3.11 278.385 ; + RECT 1.57 278.485 1.62 278.615 ; + RECT 2.58 278.485 2.63 278.615 ; + RECT 3.84 278.485 3.89 278.615 ; + RECT 5.675 278.485 5.725 278.615 ; + RECT 3.06 278.715 3.11 278.845 ; + RECT 1.085 279.175 1.135 279.305 ; + RECT 1.405 279.215 1.455 279.265 ; + RECT 4.47 279.215 4.6 279.265 ; + RECT 3.06 281.135 3.11 281.265 ; + RECT 1.57 281.365 1.62 281.495 ; + RECT 2.58 281.365 2.63 281.495 ; + RECT 3.84 281.365 3.89 281.495 ; + RECT 5.675 281.365 5.725 281.495 ; + RECT 3.06 281.595 3.11 281.725 ; + RECT 1.085 282.055 1.135 282.185 ; + RECT 1.405 282.095 1.455 282.145 ; + RECT 4.47 282.095 4.6 282.145 ; + RECT 3.06 284.015 3.11 284.145 ; + RECT 1.57 284.245 1.62 284.375 ; + RECT 2.58 284.245 2.63 284.375 ; + RECT 3.84 284.245 3.89 284.375 ; + RECT 5.675 284.245 5.725 284.375 ; + RECT 3.06 284.475 3.11 284.605 ; + RECT 1.085 284.935 1.135 285.065 ; + RECT 1.405 284.975 1.455 285.025 ; + RECT 4.47 284.975 4.6 285.025 ; + RECT 3.06 286.895 3.11 287.025 ; + RECT 1.57 287.125 1.62 287.255 ; + RECT 2.58 287.125 2.63 287.255 ; + RECT 3.84 287.125 3.89 287.255 ; + RECT 5.675 287.125 5.725 287.255 ; + RECT 3.06 235.515 3.11 235.645 ; + RECT 1.085 235.975 1.135 236.105 ; + RECT 1.405 236.015 1.455 236.065 ; + RECT 4.47 236.015 4.6 236.065 ; + RECT 3.06 237.935 3.11 238.065 ; + RECT 1.57 238.165 1.62 238.295 ; + RECT 2.58 238.165 2.63 238.295 ; + RECT 3.84 238.165 3.89 238.295 ; + RECT 5.675 238.165 5.725 238.295 ; + RECT 3.06 287.355 3.11 287.485 ; + RECT 1.085 287.815 1.135 287.945 ; + RECT 1.405 287.855 1.455 287.905 ; + RECT 4.47 287.855 4.6 287.905 ; + RECT 3.06 289.775 3.11 289.905 ; + RECT 1.57 290.005 1.62 290.135 ; + RECT 2.58 290.005 2.63 290.135 ; + RECT 3.84 290.005 3.89 290.135 ; + RECT 5.675 290.005 5.725 290.135 ; + RECT 3.06 290.235 3.11 290.365 ; + RECT 1.085 290.695 1.135 290.825 ; + RECT 1.405 290.735 1.455 290.785 ; + RECT 4.47 290.735 4.6 290.785 ; + RECT 3.06 292.655 3.11 292.785 ; + RECT 1.57 292.885 1.62 293.015 ; + RECT 2.58 292.885 2.63 293.015 ; + RECT 3.84 292.885 3.89 293.015 ; + RECT 5.675 292.885 5.725 293.015 ; + RECT 3.06 293.115 3.11 293.245 ; + RECT 1.085 293.575 1.135 293.705 ; + RECT 1.405 293.615 1.455 293.665 ; + RECT 4.47 293.615 4.6 293.665 ; + RECT 3.06 295.535 3.11 295.665 ; + RECT 1.57 295.765 1.62 295.895 ; + RECT 2.58 295.765 2.63 295.895 ; + RECT 3.84 295.765 3.89 295.895 ; + RECT 5.675 295.765 5.725 295.895 ; + RECT 3.06 295.995 3.11 296.125 ; + RECT 1.085 296.455 1.135 296.585 ; + RECT 1.405 296.495 1.455 296.545 ; + RECT 4.47 296.495 4.6 296.545 ; + RECT 3.06 298.415 3.11 298.545 ; + RECT 1.57 298.645 1.62 298.775 ; + RECT 2.58 298.645 2.63 298.775 ; + RECT 3.84 298.645 3.89 298.775 ; + RECT 5.675 298.645 5.725 298.775 ; + RECT 3.06 298.875 3.11 299.005 ; + RECT 1.085 299.335 1.135 299.465 ; + RECT 1.405 299.375 1.455 299.425 ; + RECT 4.47 299.375 4.6 299.425 ; + RECT 3.06 301.295 3.11 301.425 ; + RECT 1.57 301.525 1.62 301.655 ; + RECT 2.58 301.525 2.63 301.655 ; + RECT 3.84 301.525 3.89 301.655 ; + RECT 5.675 301.525 5.725 301.655 ; + RECT 3.06 301.755 3.11 301.885 ; + RECT 1.085 302.215 1.135 302.345 ; + RECT 1.405 302.255 1.455 302.305 ; + RECT 4.47 302.255 4.6 302.305 ; + RECT 3.06 304.175 3.11 304.305 ; + RECT 1.57 304.405 1.62 304.535 ; + RECT 2.58 304.405 2.63 304.535 ; + RECT 3.84 304.405 3.89 304.535 ; + RECT 5.675 304.405 5.725 304.535 ; + RECT 3.06 304.635 3.11 304.765 ; + RECT 1.085 305.095 1.135 305.225 ; + RECT 1.405 305.135 1.455 305.185 ; + RECT 4.47 305.135 4.6 305.185 ; + RECT 3.06 307.055 3.11 307.185 ; + RECT 1.57 307.285 1.62 307.415 ; + RECT 2.58 307.285 2.63 307.415 ; + RECT 3.84 307.285 3.89 307.415 ; + RECT 5.675 307.285 5.725 307.415 ; + RECT 3.06 307.515 3.11 307.645 ; + RECT 1.085 307.975 1.135 308.105 ; + RECT 1.405 308.015 1.455 308.065 ; + RECT 4.47 308.015 4.6 308.065 ; + RECT 3.06 309.935 3.11 310.065 ; + RECT 1.57 310.165 1.62 310.295 ; + RECT 2.58 310.165 2.63 310.295 ; + RECT 3.84 310.165 3.89 310.295 ; + RECT 5.675 310.165 5.725 310.295 ; + RECT 3.06 310.395 3.11 310.525 ; + RECT 1.085 310.855 1.135 310.985 ; + RECT 1.405 310.895 1.455 310.945 ; + RECT 4.47 310.895 4.6 310.945 ; + RECT 3.06 312.815 3.11 312.945 ; + RECT 1.57 313.045 1.62 313.175 ; + RECT 2.58 313.045 2.63 313.175 ; + RECT 3.84 313.045 3.89 313.175 ; + RECT 5.675 313.045 5.725 313.175 ; + RECT 3.06 313.275 3.11 313.405 ; + RECT 1.085 313.735 1.135 313.865 ; + RECT 1.405 313.775 1.455 313.825 ; + RECT 4.47 313.775 4.6 313.825 ; + RECT 3.06 315.695 3.11 315.825 ; + RECT 1.57 315.925 1.62 316.055 ; + RECT 2.58 315.925 2.63 316.055 ; + RECT 3.84 315.925 3.89 316.055 ; + RECT 5.675 315.925 5.725 316.055 ; + RECT 3.06 238.395 3.11 238.525 ; + RECT 1.085 238.855 1.135 238.985 ; + RECT 1.405 238.895 1.455 238.945 ; + RECT 4.47 238.895 4.6 238.945 ; + RECT 3.06 240.815 3.11 240.945 ; + RECT 1.57 241.045 1.62 241.175 ; + RECT 2.58 241.045 2.63 241.175 ; + RECT 3.84 241.045 3.89 241.175 ; + RECT 5.675 241.045 5.725 241.175 ; + RECT 3.06 316.155 3.11 316.285 ; + RECT 1.085 316.615 1.135 316.745 ; + RECT 1.405 316.655 1.455 316.705 ; + RECT 4.47 316.655 4.6 316.705 ; + RECT 3.06 318.575 3.11 318.705 ; + RECT 1.57 318.805 1.62 318.935 ; + RECT 2.58 318.805 2.63 318.935 ; + RECT 3.84 318.805 3.89 318.935 ; + RECT 5.675 318.805 5.725 318.935 ; + RECT 3.06 319.035 3.11 319.165 ; + RECT 1.085 319.495 1.135 319.625 ; + RECT 1.405 319.535 1.455 319.585 ; + RECT 4.47 319.535 4.6 319.585 ; + RECT 3.06 321.455 3.11 321.585 ; + RECT 1.57 321.685 1.62 321.815 ; + RECT 2.58 321.685 2.63 321.815 ; + RECT 3.84 321.685 3.89 321.815 ; + RECT 5.675 321.685 5.725 321.815 ; + RECT 3.06 321.915 3.11 322.045 ; + RECT 1.085 322.375 1.135 322.505 ; + RECT 1.405 322.415 1.455 322.465 ; + RECT 4.47 322.415 4.6 322.465 ; + RECT 3.06 324.335 3.11 324.465 ; + RECT 1.57 324.565 1.62 324.695 ; + RECT 2.58 324.565 2.63 324.695 ; + RECT 3.84 324.565 3.89 324.695 ; + RECT 5.675 324.565 5.725 324.695 ; + RECT 3.06 324.795 3.11 324.925 ; + RECT 1.085 325.255 1.135 325.385 ; + RECT 1.405 325.295 1.455 325.345 ; + RECT 4.47 325.295 4.6 325.345 ; + RECT 3.06 327.215 3.11 327.345 ; + RECT 1.57 327.445 1.62 327.575 ; + RECT 2.58 327.445 2.63 327.575 ; + RECT 3.84 327.445 3.89 327.575 ; + RECT 5.675 327.445 5.725 327.575 ; + RECT 3.06 327.675 3.11 327.805 ; + RECT 1.085 328.135 1.135 328.265 ; + RECT 1.405 328.175 1.455 328.225 ; + RECT 4.47 328.175 4.6 328.225 ; + RECT 3.06 330.095 3.11 330.225 ; + RECT 1.57 330.325 1.62 330.455 ; + RECT 2.58 330.325 2.63 330.455 ; + RECT 3.84 330.325 3.89 330.455 ; + RECT 5.675 330.325 5.725 330.455 ; + RECT 3.06 330.555 3.11 330.685 ; + RECT 1.085 331.015 1.135 331.145 ; + RECT 1.405 331.055 1.455 331.105 ; + RECT 4.47 331.055 4.6 331.105 ; + RECT 3.06 332.975 3.11 333.105 ; + RECT 1.57 333.205 1.62 333.335 ; + RECT 2.58 333.205 2.63 333.335 ; + RECT 3.84 333.205 3.89 333.335 ; + RECT 5.675 333.205 5.725 333.335 ; + RECT 3.06 333.435 3.11 333.565 ; + RECT 1.085 333.895 1.135 334.025 ; + RECT 1.405 333.935 1.455 333.985 ; + RECT 4.47 333.935 4.6 333.985 ; + RECT 3.06 335.855 3.11 335.985 ; + RECT 1.57 336.085 1.62 336.215 ; + RECT 2.58 336.085 2.63 336.215 ; + RECT 3.84 336.085 3.89 336.215 ; + RECT 5.675 336.085 5.725 336.215 ; + RECT 3.06 336.315 3.11 336.445 ; + RECT 1.085 336.775 1.135 336.905 ; + RECT 1.405 336.815 1.455 336.865 ; + RECT 4.47 336.815 4.6 336.865 ; + RECT 3.06 338.735 3.11 338.865 ; + RECT 1.57 338.965 1.62 339.095 ; + RECT 2.58 338.965 2.63 339.095 ; + RECT 3.84 338.965 3.89 339.095 ; + RECT 5.675 338.965 5.725 339.095 ; + RECT 3.06 339.195 3.11 339.325 ; + RECT 1.085 339.655 1.135 339.785 ; + RECT 1.405 339.695 1.455 339.745 ; + RECT 4.47 339.695 4.6 339.745 ; + RECT 3.06 341.615 3.11 341.745 ; + RECT 1.57 341.845 1.62 341.975 ; + RECT 2.58 341.845 2.63 341.975 ; + RECT 3.84 341.845 3.89 341.975 ; + RECT 5.675 341.845 5.725 341.975 ; + RECT 3.06 342.075 3.11 342.205 ; + RECT 1.085 342.535 1.135 342.665 ; + RECT 1.405 342.575 1.455 342.625 ; + RECT 4.47 342.575 4.6 342.625 ; + RECT 3.06 344.495 3.11 344.625 ; + RECT 1.57 344.725 1.62 344.855 ; + RECT 2.58 344.725 2.63 344.855 ; + RECT 3.84 344.725 3.89 344.855 ; + RECT 5.675 344.725 5.725 344.855 ; + RECT 3.06 241.275 3.11 241.405 ; + RECT 1.085 241.735 1.135 241.865 ; + RECT 1.405 241.775 1.455 241.825 ; + RECT 4.47 241.775 4.6 241.825 ; + RECT 3.06 243.695 3.11 243.825 ; + RECT 1.57 243.925 1.62 244.055 ; + RECT 2.58 243.925 2.63 244.055 ; + RECT 3.84 243.925 3.89 244.055 ; + RECT 5.675 243.925 5.725 244.055 ; + RECT 3.06 344.955 3.11 345.085 ; + RECT 1.085 345.415 1.135 345.545 ; + RECT 1.405 345.455 1.455 345.505 ; + RECT 4.47 345.455 4.6 345.505 ; + RECT 3.06 347.375 3.11 347.505 ; + RECT 1.57 347.605 1.62 347.735 ; + RECT 2.58 347.605 2.63 347.735 ; + RECT 3.84 347.605 3.89 347.735 ; + RECT 5.675 347.605 5.725 347.735 ; + RECT 3.06 347.835 3.11 347.965 ; + RECT 1.085 348.295 1.135 348.425 ; + RECT 1.405 348.335 1.455 348.385 ; + RECT 4.47 348.335 4.6 348.385 ; + RECT 3.06 350.255 3.11 350.385 ; + RECT 1.57 350.485 1.62 350.615 ; + RECT 2.58 350.485 2.63 350.615 ; + RECT 3.84 350.485 3.89 350.615 ; + RECT 5.675 350.485 5.725 350.615 ; + RECT 3.06 350.715 3.11 350.845 ; + RECT 1.085 351.175 1.135 351.305 ; + RECT 1.405 351.215 1.455 351.265 ; + RECT 4.47 351.215 4.6 351.265 ; + RECT 3.06 353.135 3.11 353.265 ; + RECT 1.57 353.365 1.62 353.495 ; + RECT 2.58 353.365 2.63 353.495 ; + RECT 3.84 353.365 3.89 353.495 ; + RECT 5.675 353.365 5.725 353.495 ; + RECT 3.06 353.595 3.11 353.725 ; + RECT 1.085 354.055 1.135 354.185 ; + RECT 1.405 354.095 1.455 354.145 ; + RECT 4.47 354.095 4.6 354.145 ; + RECT 3.06 356.015 3.11 356.145 ; + RECT 1.57 356.245 1.62 356.375 ; + RECT 2.58 356.245 2.63 356.375 ; + RECT 3.84 356.245 3.89 356.375 ; + RECT 5.675 356.245 5.725 356.375 ; + RECT 3.06 356.475 3.11 356.605 ; + RECT 1.085 356.935 1.135 357.065 ; + RECT 1.405 356.975 1.455 357.025 ; + RECT 4.47 356.975 4.6 357.025 ; + RECT 3.06 358.895 3.11 359.025 ; + RECT 1.57 359.125 1.62 359.255 ; + RECT 2.58 359.125 2.63 359.255 ; + RECT 3.84 359.125 3.89 359.255 ; + RECT 5.675 359.125 5.725 359.255 ; + RECT 3.06 359.355 3.11 359.485 ; + RECT 1.085 359.815 1.135 359.945 ; + RECT 1.405 359.855 1.455 359.905 ; + RECT 4.47 359.855 4.6 359.905 ; + RECT 3.06 361.775 3.11 361.905 ; + RECT 1.57 362.005 1.62 362.135 ; + RECT 2.58 362.005 2.63 362.135 ; + RECT 3.84 362.005 3.89 362.135 ; + RECT 5.675 362.005 5.725 362.135 ; + RECT 3.06 362.235 3.11 362.365 ; + RECT 1.085 362.695 1.135 362.825 ; + RECT 1.405 362.735 1.455 362.785 ; + RECT 4.47 362.735 4.6 362.785 ; + RECT 3.06 364.655 3.11 364.785 ; + RECT 1.57 364.885 1.62 365.015 ; + RECT 2.58 364.885 2.63 365.015 ; + RECT 3.84 364.885 3.89 365.015 ; + RECT 5.675 364.885 5.725 365.015 ; + RECT 3.06 365.115 3.11 365.245 ; + RECT 1.085 365.575 1.135 365.705 ; + RECT 1.405 365.615 1.455 365.665 ; + RECT 4.47 365.615 4.6 365.665 ; + RECT 3.06 367.535 3.11 367.665 ; + RECT 1.57 367.765 1.62 367.895 ; + RECT 2.58 367.765 2.63 367.895 ; + RECT 3.84 367.765 3.89 367.895 ; + RECT 5.675 367.765 5.725 367.895 ; + RECT 3.06 367.995 3.11 368.125 ; + RECT 1.085 368.455 1.135 368.585 ; + RECT 1.405 368.495 1.455 368.545 ; + RECT 4.47 368.495 4.6 368.545 ; + RECT 3.06 370.415 3.11 370.545 ; + RECT 1.57 370.645 1.62 370.775 ; + RECT 2.58 370.645 2.63 370.775 ; + RECT 3.84 370.645 3.89 370.775 ; + RECT 5.675 370.645 5.725 370.775 ; + RECT 3.06 370.875 3.11 371.005 ; + RECT 1.085 371.335 1.135 371.465 ; + RECT 1.405 371.375 1.455 371.425 ; + RECT 4.47 371.375 4.6 371.425 ; + RECT 3.06 373.295 3.11 373.425 ; + RECT 1.57 373.525 1.62 373.655 ; + RECT 2.58 373.525 2.63 373.655 ; + RECT 3.84 373.525 3.89 373.655 ; + RECT 5.675 373.525 5.725 373.655 ; + RECT 3.06 244.155 3.11 244.285 ; + RECT 1.085 244.615 1.135 244.745 ; + RECT 1.405 244.655 1.455 244.705 ; + RECT 4.47 244.655 4.6 244.705 ; + RECT 3.06 246.575 3.11 246.705 ; + RECT 1.57 246.805 1.62 246.935 ; + RECT 2.58 246.805 2.63 246.935 ; + RECT 3.84 246.805 3.89 246.935 ; + RECT 5.675 246.805 5.725 246.935 ; + RECT 3.06 373.755 3.11 373.885 ; + RECT 1.085 374.215 1.135 374.345 ; + RECT 1.405 374.255 1.455 374.305 ; + RECT 4.47 374.255 4.6 374.305 ; + RECT 3.06 376.175 3.11 376.305 ; + RECT 1.57 376.405 1.62 376.535 ; + RECT 2.58 376.405 2.63 376.535 ; + RECT 3.84 376.405 3.89 376.535 ; + RECT 5.675 376.405 5.725 376.535 ; + RECT 3.06 376.635 3.11 376.765 ; + RECT 1.085 377.095 1.135 377.225 ; + RECT 1.405 377.135 1.455 377.185 ; + RECT 4.47 377.135 4.6 377.185 ; + RECT 3.06 379.055 3.11 379.185 ; + RECT 1.57 379.285 1.62 379.415 ; + RECT 2.58 379.285 2.63 379.415 ; + RECT 3.84 379.285 3.89 379.415 ; + RECT 5.675 379.285 5.725 379.415 ; + RECT 3.06 379.515 3.11 379.645 ; + RECT 1.085 379.975 1.135 380.105 ; + RECT 1.405 380.015 1.455 380.065 ; + RECT 4.47 380.015 4.6 380.065 ; + RECT 3.06 381.935 3.11 382.065 ; + RECT 1.57 382.165 1.62 382.295 ; + RECT 2.58 382.165 2.63 382.295 ; + RECT 3.84 382.165 3.89 382.295 ; + RECT 5.675 382.165 5.725 382.295 ; + RECT 3.06 382.395 3.11 382.525 ; + RECT 1.085 382.855 1.135 382.985 ; + RECT 1.405 382.895 1.455 382.945 ; + RECT 4.47 382.895 4.6 382.945 ; + RECT 3.06 384.815 3.11 384.945 ; + RECT 1.57 385.045 1.62 385.175 ; + RECT 2.58 385.045 2.63 385.175 ; + RECT 3.84 385.045 3.89 385.175 ; + RECT 5.675 385.045 5.725 385.175 ; + RECT 3.06 385.275 3.11 385.405 ; + RECT 1.085 385.735 1.135 385.865 ; + RECT 1.405 385.775 1.455 385.825 ; + RECT 4.47 385.775 4.6 385.825 ; + RECT 3.06 387.695 3.11 387.825 ; + RECT 1.57 387.925 1.62 388.055 ; + RECT 2.58 387.925 2.63 388.055 ; + RECT 3.84 387.925 3.89 388.055 ; + RECT 5.675 387.925 5.725 388.055 ; + RECT 3.06 388.155 3.11 388.285 ; + RECT 1.085 388.615 1.135 388.745 ; + RECT 1.405 388.655 1.455 388.705 ; + RECT 4.47 388.655 4.6 388.705 ; + RECT 3.06 390.575 3.11 390.705 ; + RECT 1.57 390.805 1.62 390.935 ; + RECT 2.58 390.805 2.63 390.935 ; + RECT 3.84 390.805 3.89 390.935 ; + RECT 5.675 390.805 5.725 390.935 ; + RECT 3.06 391.035 3.11 391.165 ; + RECT 1.085 391.495 1.135 391.625 ; + RECT 1.405 391.535 1.455 391.585 ; + RECT 4.47 391.535 4.6 391.585 ; + RECT 3.06 393.455 3.11 393.585 ; + RECT 1.57 393.685 1.62 393.815 ; + RECT 2.58 393.685 2.63 393.815 ; + RECT 3.84 393.685 3.89 393.815 ; + RECT 5.675 393.685 5.725 393.815 ; + RECT 3.06 393.915 3.11 394.045 ; + RECT 1.085 394.375 1.135 394.505 ; + RECT 1.405 394.415 1.455 394.465 ; + RECT 4.47 394.415 4.6 394.465 ; + RECT 3.06 396.335 3.11 396.465 ; + RECT 1.57 396.565 1.62 396.695 ; + RECT 2.58 396.565 2.63 396.695 ; + RECT 3.84 396.565 3.89 396.695 ; + RECT 5.675 396.565 5.725 396.695 ; + RECT 3.06 396.795 3.11 396.925 ; + RECT 1.085 397.255 1.135 397.385 ; + RECT 1.405 397.295 1.455 397.345 ; + RECT 4.47 397.295 4.6 397.345 ; + RECT 3.06 399.215 3.11 399.345 ; + RECT 1.57 399.445 1.62 399.575 ; + RECT 2.58 399.445 2.63 399.575 ; + RECT 3.84 399.445 3.89 399.575 ; + RECT 5.675 399.445 5.725 399.575 ; + RECT 3.06 399.675 3.11 399.805 ; + RECT 1.085 400.135 1.135 400.265 ; + RECT 1.405 400.175 1.455 400.225 ; + RECT 4.47 400.175 4.6 400.225 ; + RECT 3.06 402.095 3.11 402.225 ; + RECT 1.57 402.325 1.62 402.455 ; + RECT 2.58 402.325 2.63 402.455 ; + RECT 3.84 402.325 3.89 402.455 ; + RECT 5.675 402.325 5.725 402.455 ; + RECT 3.06 247.035 3.11 247.165 ; + RECT 1.085 247.495 1.135 247.625 ; + RECT 1.405 247.535 1.455 247.585 ; + RECT 4.47 247.535 4.6 247.585 ; + RECT 3.06 249.455 3.11 249.585 ; + RECT 1.57 249.685 1.62 249.815 ; + RECT 2.58 249.685 2.63 249.815 ; + RECT 3.84 249.685 3.89 249.815 ; + RECT 5.675 249.685 5.725 249.815 ; + RECT 3.06 402.555 3.11 402.685 ; + RECT 1.085 403.015 1.135 403.145 ; + RECT 1.405 403.055 1.455 403.105 ; + RECT 4.47 403.055 4.6 403.105 ; + RECT 3.06 404.975 3.11 405.105 ; + RECT 1.57 405.205 1.62 405.335 ; + RECT 2.58 405.205 2.63 405.335 ; + RECT 3.84 405.205 3.89 405.335 ; + RECT 5.675 405.205 5.725 405.335 ; + RECT 3.06 405.435 3.11 405.565 ; + RECT 1.085 405.895 1.135 406.025 ; + RECT 1.405 405.935 1.455 405.985 ; + RECT 4.47 405.935 4.6 405.985 ; + RECT 3.06 407.855 3.11 407.985 ; + RECT 1.57 408.085 1.62 408.215 ; + RECT 2.58 408.085 2.63 408.215 ; + RECT 3.84 408.085 3.89 408.215 ; + RECT 5.675 408.085 5.725 408.215 ; + RECT 3.06 408.315 3.11 408.445 ; + RECT 1.085 408.775 1.135 408.905 ; + RECT 1.405 408.815 1.455 408.865 ; + RECT 4.47 408.815 4.6 408.865 ; + RECT 3.06 410.735 3.11 410.865 ; + RECT 1.57 410.965 1.62 411.095 ; + RECT 2.58 410.965 2.63 411.095 ; + RECT 3.84 410.965 3.89 411.095 ; + RECT 5.675 410.965 5.725 411.095 ; + RECT 3.06 249.915 3.11 250.045 ; + RECT 1.085 250.375 1.135 250.505 ; + RECT 1.405 250.415 1.455 250.465 ; + RECT 4.47 250.415 4.6 250.465 ; + RECT 3.06 252.335 3.11 252.465 ; + RECT 1.57 252.565 1.62 252.695 ; + RECT 2.58 252.565 2.63 252.695 ; + RECT 3.84 252.565 3.89 252.695 ; + RECT 5.675 252.565 5.725 252.695 ; + RECT 3.06 252.795 3.11 252.925 ; + RECT 1.085 253.255 1.135 253.385 ; + RECT 1.405 253.295 1.455 253.345 ; + RECT 4.47 253.295 4.6 253.345 ; + RECT 3.06 255.215 3.11 255.345 ; + RECT 1.57 255.445 1.62 255.575 ; + RECT 2.58 255.445 2.63 255.575 ; + RECT 3.84 255.445 3.89 255.575 ; + RECT 5.675 255.445 5.725 255.575 ; + RECT 3.06 255.675 3.11 255.805 ; + RECT 1.085 256.135 1.135 256.265 ; + RECT 1.405 256.175 1.455 256.225 ; + RECT 4.47 256.175 4.6 256.225 ; + RECT 3.06 258.095 3.11 258.225 ; + RECT 1.57 258.325 1.62 258.455 ; + RECT 2.58 258.325 2.63 258.455 ; + RECT 3.84 258.325 3.89 258.455 ; + RECT 5.675 258.325 5.725 258.455 ; + RECT 3.06 411.195 3.11 411.325 ; + RECT 1.085 411.655 1.135 411.785 ; + RECT 1.405 411.695 1.455 411.745 ; + RECT 4.47 411.695 4.6 411.745 ; + RECT 3.06 413.615 3.11 413.745 ; + RECT 1.57 413.845 1.62 413.975 ; + RECT 2.58 413.845 2.63 413.975 ; + RECT 3.84 413.845 3.89 413.975 ; + RECT 5.675 413.845 5.725 413.975 ; + RECT 3.06 229.755 3.11 229.885 ; + RECT 1.085 230.215 1.135 230.345 ; + RECT 1.405 230.255 1.455 230.305 ; + RECT 4.47 230.255 4.6 230.305 ; + RECT 3.06 232.175 3.11 232.305 ; + RECT 1.57 232.405 1.62 232.535 ; + RECT 2.58 232.405 2.63 232.535 ; + RECT 3.84 232.405 3.89 232.535 ; + RECT 5.675 232.405 5.725 232.535 ; + RECT 0.435 230.215 0.485 230.345 ; + RECT 0.435 229.755 0.485 229.885 ; + RECT 0.435 232.175 0.485 232.305 ; + RECT 0.435 233.095 0.485 233.225 ; + RECT 0.435 232.635 0.485 232.765 ; + RECT 0.435 235.055 0.485 235.185 ; + RECT 0.435 259.015 0.485 259.145 ; + RECT 0.435 258.555 0.485 258.685 ; + RECT 0.435 260.975 0.485 261.105 ; + RECT 0.435 261.895 0.485 262.025 ; + RECT 0.435 261.435 0.485 261.565 ; + RECT 0.435 263.855 0.485 263.985 ; + RECT 0.435 264.775 0.485 264.905 ; + RECT 0.435 264.315 0.485 264.445 ; + RECT 0.435 266.735 0.485 266.865 ; + RECT 0.435 267.655 0.485 267.785 ; + RECT 0.435 267.195 0.485 267.325 ; + RECT 0.435 269.615 0.485 269.745 ; + RECT 0.435 270.535 0.485 270.665 ; + RECT 0.435 270.075 0.485 270.205 ; + RECT 0.435 272.495 0.485 272.625 ; + RECT 0.435 273.415 0.485 273.545 ; + RECT 0.435 272.955 0.485 273.085 ; + RECT 0.435 275.375 0.485 275.505 ; + RECT 0.435 276.295 0.485 276.425 ; + RECT 0.435 275.835 0.485 275.965 ; + RECT 0.435 278.255 0.485 278.385 ; + RECT 0.435 279.175 0.485 279.305 ; + RECT 0.435 278.715 0.485 278.845 ; + RECT 0.435 281.135 0.485 281.265 ; + RECT 0.435 282.055 0.485 282.185 ; + RECT 0.435 281.595 0.485 281.725 ; + RECT 0.435 284.015 0.485 284.145 ; + RECT 0.435 284.935 0.485 285.065 ; + RECT 0.435 284.475 0.485 284.605 ; + RECT 0.435 286.895 0.485 287.025 ; + RECT 0.435 235.975 0.485 236.105 ; + RECT 0.435 235.515 0.485 235.645 ; + RECT 0.435 237.935 0.485 238.065 ; + RECT 0.435 287.815 0.485 287.945 ; + RECT 0.435 287.355 0.485 287.485 ; + RECT 0.435 289.775 0.485 289.905 ; + RECT 0.435 290.695 0.485 290.825 ; + RECT 0.435 290.235 0.485 290.365 ; + RECT 0.435 292.655 0.485 292.785 ; + RECT 0.435 293.575 0.485 293.705 ; + RECT 0.435 293.115 0.485 293.245 ; + RECT 0.435 295.535 0.485 295.665 ; + RECT 0.435 296.455 0.485 296.585 ; + RECT 0.435 295.995 0.485 296.125 ; + RECT 0.435 298.415 0.485 298.545 ; + RECT 0.435 299.335 0.485 299.465 ; + RECT 0.435 298.875 0.485 299.005 ; + RECT 0.435 301.295 0.485 301.425 ; + RECT 0.435 302.215 0.485 302.345 ; + RECT 0.435 301.755 0.485 301.885 ; + RECT 0.435 304.175 0.485 304.305 ; + RECT 0.435 305.095 0.485 305.225 ; + RECT 0.435 304.635 0.485 304.765 ; + RECT 0.435 307.055 0.485 307.185 ; + RECT 0.435 307.975 0.485 308.105 ; + RECT 0.435 307.515 0.485 307.645 ; + RECT 0.435 309.935 0.485 310.065 ; + RECT 0.435 310.855 0.485 310.985 ; + RECT 0.435 310.395 0.485 310.525 ; + RECT 0.435 312.815 0.485 312.945 ; + RECT 0.435 313.735 0.485 313.865 ; + RECT 0.435 313.275 0.485 313.405 ; + RECT 0.435 315.695 0.485 315.825 ; + RECT 0.435 238.855 0.485 238.985 ; + RECT 0.435 238.395 0.485 238.525 ; + RECT 0.435 240.815 0.485 240.945 ; + RECT 0.435 316.615 0.485 316.745 ; + RECT 0.435 316.155 0.485 316.285 ; + RECT 0.435 318.575 0.485 318.705 ; + RECT 0.435 319.495 0.485 319.625 ; + RECT 0.435 319.035 0.485 319.165 ; + RECT 0.435 321.455 0.485 321.585 ; + RECT 0.435 322.375 0.485 322.505 ; + RECT 0.435 321.915 0.485 322.045 ; + RECT 0.435 324.335 0.485 324.465 ; + RECT 0.435 325.255 0.485 325.385 ; + RECT 0.435 324.795 0.485 324.925 ; + RECT 0.435 327.215 0.485 327.345 ; + RECT 0.435 328.135 0.485 328.265 ; + RECT 0.435 327.675 0.485 327.805 ; + RECT 0.435 330.095 0.485 330.225 ; + RECT 0.435 331.015 0.485 331.145 ; + RECT 0.435 330.555 0.485 330.685 ; + RECT 0.435 332.975 0.485 333.105 ; + RECT 0.435 333.895 0.485 334.025 ; + RECT 0.435 333.435 0.485 333.565 ; + RECT 0.435 335.855 0.485 335.985 ; + RECT 0.435 336.775 0.485 336.905 ; + RECT 0.435 336.315 0.485 336.445 ; + RECT 0.435 338.735 0.485 338.865 ; + RECT 0.435 339.655 0.485 339.785 ; + RECT 0.435 339.195 0.485 339.325 ; + RECT 0.435 341.615 0.485 341.745 ; + RECT 0.435 342.535 0.485 342.665 ; + RECT 0.435 342.075 0.485 342.205 ; + RECT 0.435 344.495 0.485 344.625 ; + RECT 0.435 241.735 0.485 241.865 ; + RECT 0.435 241.275 0.485 241.405 ; + RECT 0.435 243.695 0.485 243.825 ; + RECT 0.435 345.415 0.485 345.545 ; + RECT 0.435 344.955 0.485 345.085 ; + RECT 0.435 347.375 0.485 347.505 ; + RECT 0.435 348.295 0.485 348.425 ; + RECT 0.435 347.835 0.485 347.965 ; + RECT 0.435 350.255 0.485 350.385 ; + RECT 0.435 351.175 0.485 351.305 ; + RECT 0.435 350.715 0.485 350.845 ; + RECT 0.435 353.135 0.485 353.265 ; + RECT 0.435 354.055 0.485 354.185 ; + RECT 0.435 353.595 0.485 353.725 ; + RECT 0.435 356.015 0.485 356.145 ; + RECT 0.435 356.935 0.485 357.065 ; + RECT 0.435 356.475 0.485 356.605 ; + RECT 0.435 358.895 0.485 359.025 ; + RECT 0.435 359.815 0.485 359.945 ; + RECT 0.435 359.355 0.485 359.485 ; + RECT 0.435 361.775 0.485 361.905 ; + RECT 0.435 362.695 0.485 362.825 ; + RECT 0.435 362.235 0.485 362.365 ; + RECT 0.435 364.655 0.485 364.785 ; + RECT 0.435 365.575 0.485 365.705 ; + RECT 0.435 365.115 0.485 365.245 ; + RECT 0.435 367.535 0.485 367.665 ; + RECT 0.435 368.455 0.485 368.585 ; + RECT 0.435 367.995 0.485 368.125 ; + RECT 0.435 370.415 0.485 370.545 ; + RECT 0.435 371.335 0.485 371.465 ; + RECT 0.435 370.875 0.485 371.005 ; + RECT 0.435 373.295 0.485 373.425 ; + RECT 0.435 244.615 0.485 244.745 ; + RECT 0.435 244.155 0.485 244.285 ; + RECT 0.435 246.575 0.485 246.705 ; + RECT 0.435 374.215 0.485 374.345 ; + RECT 0.435 373.755 0.485 373.885 ; + RECT 0.435 376.175 0.485 376.305 ; + RECT 0.435 377.095 0.485 377.225 ; + RECT 0.435 376.635 0.485 376.765 ; + RECT 0.435 379.055 0.485 379.185 ; + RECT 0.435 379.975 0.485 380.105 ; + RECT 0.435 379.515 0.485 379.645 ; + RECT 0.435 381.935 0.485 382.065 ; + RECT 0.435 382.855 0.485 382.985 ; + RECT 0.435 382.395 0.485 382.525 ; + RECT 0.435 384.815 0.485 384.945 ; + RECT 0.435 385.735 0.485 385.865 ; + RECT 0.435 385.275 0.485 385.405 ; + RECT 0.435 387.695 0.485 387.825 ; + RECT 0.435 388.615 0.485 388.745 ; + RECT 0.435 388.155 0.485 388.285 ; + RECT 0.435 390.575 0.485 390.705 ; + RECT 0.435 391.495 0.485 391.625 ; + RECT 0.435 391.035 0.485 391.165 ; + RECT 0.435 393.455 0.485 393.585 ; + RECT 0.435 394.375 0.485 394.505 ; + RECT 0.435 393.915 0.485 394.045 ; + RECT 0.435 396.335 0.485 396.465 ; + RECT 0.435 397.255 0.485 397.385 ; + RECT 0.435 396.795 0.485 396.925 ; + RECT 0.435 399.215 0.485 399.345 ; + RECT 0.435 400.135 0.485 400.265 ; + RECT 0.435 399.675 0.485 399.805 ; + RECT 0.435 402.095 0.485 402.225 ; + RECT 0.435 247.495 0.485 247.625 ; + RECT 0.435 247.035 0.485 247.165 ; + RECT 0.435 249.455 0.485 249.585 ; + RECT 0.435 403.015 0.485 403.145 ; + RECT 0.435 402.555 0.485 402.685 ; + RECT 0.435 404.975 0.485 405.105 ; + RECT 0.435 405.895 0.485 406.025 ; + RECT 0.435 405.435 0.485 405.565 ; + RECT 0.435 407.855 0.485 407.985 ; + RECT 0.435 408.775 0.485 408.905 ; + RECT 0.435 408.315 0.485 408.445 ; + RECT 0.435 410.735 0.485 410.865 ; + RECT 0.435 411.655 0.485 411.785 ; + RECT 0.435 411.195 0.485 411.325 ; + RECT 0.435 413.615 0.485 413.745 ; + RECT 0.435 250.375 0.485 250.505 ; + RECT 0.435 249.915 0.485 250.045 ; + RECT 0.435 252.335 0.485 252.465 ; + RECT 0.435 253.255 0.485 253.385 ; + RECT 0.435 252.795 0.485 252.925 ; + RECT 0.435 255.215 0.485 255.345 ; + RECT 0.435 256.135 0.485 256.265 ; + RECT 0.435 255.675 0.485 255.805 ; + RECT 0.435 258.095 0.485 258.225 ; + RECT 20.085 186.875 20.265 187.005 ; + RECT 20.08 192.86 20.21 193.04 ; + RECT 20.08 221.89 20.21 222.07 ; + RECT 20.085 227.855 20.265 227.985 ; + RECT 20.395 188.455 20.575 188.585 ; + RECT 20.53 190.46 20.58 190.59 ; + RECT 20.53 193.375 20.58 193.505 ; + RECT 20.53 194.36 20.58 194.49 ; + RECT 20.53 196.33 20.58 196.46 ; + RECT 20.53 197.31 20.58 197.44 ; + RECT 20.53 198.295 20.58 198.425 ; + RECT 20.53 201.25 20.58 201.38 ; + RECT 20.53 208.63 20.58 208.76 ; + RECT 20.53 209.61 20.58 209.74 ; + RECT 20.53 213.55 20.58 213.68 ; + RECT 20.53 216.5 20.58 216.63 ; + RECT 20.53 217.485 20.58 217.615 ; + RECT 20.53 218.47 20.58 218.6 ; + RECT 20.53 220.435 20.58 220.565 ; + RECT 20.53 221.42 20.58 221.55 ; + RECT 20.53 224.34 20.58 224.47 ; + RECT 20.395 226.34 20.575 226.47 ; + RECT 20.875 187.105 21.055 187.235 ; + RECT 20.875 227.625 21.055 227.755 ; + RECT 20.085 187.58 20.265 187.71 ; + RECT 20.11 227.12 20.24 227.3 ; + RECT 20.12 189.915 20.17 190.045 ; + RECT 20.12 193.87 20.17 194 ; + RECT 20.12 197.805 20.17 197.935 ; + RECT 20.12 201.74 20.17 201.87 ; + RECT 20.12 205.675 20.17 205.805 ; + RECT 20.12 209.12 20.17 209.25 ; + RECT 20.12 213.055 20.17 213.185 ; + RECT 20.12 216.995 20.17 217.125 ; + RECT 20.12 220.93 20.17 221.06 ; + RECT 20.12 224.88 20.17 225.01 ; + RECT 14.965 186.875 15.015 187.005 ; + RECT 19.485 186.875 19.535 187.005 ; + RECT 14.765 186.875 14.815 187.005 ; + RECT 19.685 186.875 19.735 187.005 ; + RECT 14.965 227.855 15.015 227.985 ; + RECT 19.485 227.855 19.535 227.985 ; + RECT 14.765 227.855 14.815 227.985 ; + RECT 19.685 227.855 19.735 227.985 ; + RECT 20.395 186.645 20.575 186.775 ; + RECT 20.7 187.105 20.75 187.235 ; + RECT 20.085 187.965 20.265 188.095 ; + RECT 20.9 188.74 21.03 188.79 ; + RECT 20.085 188.945 20.265 189.075 ; + RECT 20.39 189.44 20.44 189.57 ; + RECT 20.9 189.72 21.03 189.77 ; + RECT 20.685 190.19 20.735 190.32 ; + RECT 20.335 190.19 20.385 190.32 ; + RECT 20.12 190.915 20.17 191.045 ; + RECT 20.875 191.41 21.055 191.54 ; + RECT 20.12 191.9 20.17 192.03 ; + RECT 20.08 192.185 20.21 192.235 ; + RECT 20.875 192.39 21.055 192.52 ; + RECT 20.12 194.855 20.17 194.985 ; + RECT 20.875 195.345 21.055 195.475 ; + RECT 20.12 195.835 20.17 195.965 ; + RECT 20.12 196.82 20.17 196.95 ; + RECT 20.12 198.79 20.17 198.92 ; + RECT 20.875 199.28 21.055 199.41 ; + RECT 20.12 199.77 20.17 199.9 ; + RECT 20.875 200.265 21.055 200.395 ; + RECT 20.12 200.755 20.17 200.885 ; + RECT 20.53 202.235 20.58 202.365 ; + RECT 20.12 202.73 20.17 202.86 ; + RECT 20.875 203.215 21.055 203.345 ; + RECT 20.12 203.71 20.17 203.84 ; + RECT 20.505 204.185 20.555 204.315 ; + RECT 20.685 204.495 20.735 204.625 ; + RECT 20.335 204.495 20.385 204.625 ; + RECT 20.345 204.81 20.395 204.94 ; + RECT 20.9 205.47 21.03 205.52 ; + RECT 20.9 205.965 21.03 206.015 ; + RECT 20.12 206.66 20.17 206.79 ; + RECT 20.875 207.15 21.055 207.28 ; + RECT 20.875 207.645 21.055 207.775 ; + RECT 20.12 208.135 20.17 208.265 ; + RECT 20.9 208.915 21.03 208.965 ; + RECT 20.9 209.405 21.03 209.455 ; + RECT 20.345 209.925 20.395 210.055 ; + RECT 20.685 210.27 20.735 210.4 ; + RECT 20.335 210.27 20.385 210.4 ; + RECT 20.12 211.085 20.17 211.215 ; + RECT 20.875 211.58 21.055 211.71 ; + RECT 20.12 212.075 20.17 212.205 ; + RECT 20.53 212.565 20.58 212.695 ; + RECT 20.12 214.04 20.17 214.17 ; + RECT 20.875 214.535 21.055 214.665 ; + RECT 20.12 215.025 20.17 215.155 ; + RECT 20.875 215.515 21.055 215.645 ; + RECT 20.12 216.01 20.17 216.14 ; + RECT 20.12 217.975 20.17 218.105 ; + RECT 20.12 218.96 20.17 219.09 ; + RECT 20.875 219.455 21.055 219.585 ; + RECT 20.12 219.945 20.17 220.075 ; + RECT 20.08 220.72 20.21 220.77 ; + RECT 20.08 222.2 20.21 222.25 ; + RECT 20.875 222.405 21.055 222.535 ; + RECT 20.08 222.69 20.21 222.74 ; + RECT 20.12 222.895 20.17 223.025 ; + RECT 20.875 223.355 21.055 223.485 ; + RECT 20.12 223.88 20.17 224.01 ; + RECT 20.685 224.61 20.735 224.74 ; + RECT 20.335 224.61 20.385 224.74 ; + RECT 20.9 225.155 21.03 225.205 ; + RECT 20.39 225.355 20.44 225.485 ; + RECT 20.085 225.85 20.265 225.98 ; + RECT 20.9 226.135 21.03 226.185 ; + RECT 20.085 226.835 20.265 226.965 ; + RECT 20.7 227.625 20.75 227.755 ; + RECT 20.395 228.085 20.575 228.215 ; + RECT 14.965 187.58 15.015 187.71 ; + RECT 14.99 190.915 15.04 191.045 ; + RECT 14.99 191.9 15.04 192.03 ; + RECT 14.99 192.185 15.04 192.235 ; + RECT 14.99 194.855 15.04 194.985 ; + RECT 14.99 195.835 15.04 195.965 ; + RECT 14.99 196.82 15.04 196.95 ; + RECT 14.99 198.79 15.04 198.92 ; + RECT 14.99 199.77 15.04 199.9 ; + RECT 14.99 200.755 15.04 200.885 ; + RECT 14.99 202.73 15.04 202.86 ; + RECT 14.99 203.71 15.04 203.84 ; + RECT 14.965 206.66 15.015 206.79 ; + RECT 14.965 208.135 15.015 208.265 ; + RECT 14.99 211.085 15.04 211.215 ; + RECT 14.99 212.075 15.04 212.205 ; + RECT 14.99 214.04 15.04 214.17 ; + RECT 14.99 215.025 15.04 215.155 ; + RECT 14.99 216.01 15.04 216.14 ; + RECT 14.99 217.975 15.04 218.105 ; + RECT 14.99 218.96 15.04 219.09 ; + RECT 14.99 219.945 15.04 220.075 ; + RECT 14.99 220.72 15.04 220.77 ; + RECT 14.99 222.895 15.04 223.025 ; + RECT 14.99 223.88 15.04 224.01 ; + RECT 14.965 227.145 15.015 227.275 ; + RECT 19.485 187.58 19.535 187.71 ; + RECT 19.465 201.715 19.595 201.895 ; + RECT 19.465 213.03 19.595 213.21 ; + RECT 19.465 220.905 19.595 221.085 ; + RECT 19.485 227.145 19.535 227.275 ; + RECT 19.875 204.185 19.925 204.315 ; + RECT 19.875 210.61 19.925 210.74 ; + RECT 19.7 187.965 19.75 188.095 ; + RECT 19.7 188.945 19.75 189.075 ; + RECT 19.7 190.915 19.75 191.045 ; + RECT 19.7 191.9 19.75 192.03 ; + RECT 19.7 192.185 19.75 192.235 ; + RECT 19.7 194.855 19.75 194.985 ; + RECT 19.7 195.835 19.75 195.965 ; + RECT 19.7 196.82 19.75 196.95 ; + RECT 19.7 198.79 19.75 198.92 ; + RECT 19.7 199.77 19.75 199.9 ; + RECT 19.7 200.755 19.75 200.885 ; + RECT 19.7 202.73 19.75 202.86 ; + RECT 19.7 203.71 19.75 203.84 ; + RECT 19.7 206.66 19.75 206.79 ; + RECT 19.7 208.135 19.75 208.265 ; + RECT 19.7 211.085 19.75 211.215 ; + RECT 19.7 212.075 19.75 212.205 ; + RECT 19.7 214.04 19.75 214.17 ; + RECT 19.7 215.025 19.75 215.155 ; + RECT 19.7 216.01 19.75 216.14 ; + RECT 19.7 217.975 19.75 218.105 ; + RECT 19.7 218.96 19.75 219.09 ; + RECT 19.7 219.945 19.75 220.075 ; + RECT 19.7 220.72 19.75 220.77 ; + RECT 19.465 221.89 19.595 222.07 ; + RECT 19.7 222.895 19.75 223.025 ; + RECT 19.7 223.88 19.75 224.01 ; + RECT 19.7 225.85 19.75 225.98 ; + RECT 19.7 226.835 19.75 226.965 ; + RECT 14.765 187.965 14.815 188.095 ; + RECT 14.765 188.945 14.815 189.075 ; + RECT 14.74 190.915 14.79 191.045 ; + RECT 14.74 191.9 14.79 192.03 ; + RECT 14.74 192.185 14.79 192.235 ; + RECT 14.74 194.855 14.79 194.985 ; + RECT 14.74 195.835 14.79 195.965 ; + RECT 14.74 196.82 14.79 196.95 ; + RECT 14.74 198.79 14.79 198.92 ; + RECT 14.74 199.77 14.79 199.9 ; + RECT 14.74 200.755 14.79 200.885 ; + RECT 14.74 202.73 14.79 202.86 ; + RECT 14.74 203.71 14.79 203.84 ; + RECT 14.765 206.66 14.815 206.79 ; + RECT 14.765 208.135 14.815 208.265 ; + RECT 14.74 211.085 14.79 211.215 ; + RECT 14.74 212.075 14.79 212.205 ; + RECT 14.74 214.04 14.79 214.17 ; + RECT 14.74 215.025 14.79 215.155 ; + RECT 14.74 216.01 14.79 216.14 ; + RECT 14.74 217.975 14.79 218.105 ; + RECT 14.74 218.96 14.79 219.09 ; + RECT 14.74 219.945 14.79 220.075 ; + RECT 14.74 220.72 14.79 220.77 ; + RECT 14.74 222.895 14.79 223.025 ; + RECT 14.74 223.88 14.79 224.01 ; + RECT 14.765 225.85 14.815 225.98 ; + RECT 14.765 226.835 14.815 226.965 ; + RECT 14.565 204.185 14.615 204.315 ; + RECT 14.565 210.61 14.615 210.74 ; + RECT 14.965 187.965 15.015 188.095 ; + RECT 15.335 187.965 15.385 188.095 ; + RECT 15.875 187.965 15.925 188.095 ; + RECT 16.415 187.965 16.465 188.095 ; + RECT 16.955 187.965 17.005 188.095 ; + RECT 17.495 187.965 17.545 188.095 ; + RECT 18.035 187.965 18.085 188.095 ; + RECT 18.575 187.965 18.625 188.095 ; + RECT 19.115 187.965 19.165 188.095 ; + RECT 14.565 188.74 14.615 188.79 ; + RECT 14.965 188.945 15.015 189.075 ; + RECT 15.335 189.44 15.385 189.57 ; + RECT 15.875 189.44 15.925 189.57 ; + RECT 16.415 189.44 16.465 189.57 ; + RECT 16.955 189.44 17.005 189.57 ; + RECT 17.495 189.44 17.545 189.57 ; + RECT 18.035 189.44 18.085 189.57 ; + RECT 18.575 189.44 18.625 189.57 ; + RECT 19.115 189.44 19.165 189.57 ; + RECT 14.565 189.72 14.615 189.77 ; + RECT 14.99 189.915 15.04 190.045 ; + RECT 14.865 190.19 14.915 190.32 ; + RECT 15.335 190.19 15.385 190.32 ; + RECT 15.875 190.19 15.925 190.32 ; + RECT 16.415 190.19 16.465 190.32 ; + RECT 16.955 190.19 17.005 190.32 ; + RECT 17.495 190.19 17.545 190.32 ; + RECT 18.035 190.19 18.085 190.32 ; + RECT 18.575 190.19 18.625 190.32 ; + RECT 19.115 190.19 19.165 190.32 ; + RECT 14.565 191.41 14.615 191.54 ; + RECT 14.565 192.39 14.615 192.52 ; + RECT 14.745 192.885 14.795 193.015 ; + RECT 14.99 193.87 15.04 194 ; + RECT 14.565 195.345 14.615 195.475 ; + RECT 14.99 197.805 15.04 197.935 ; + RECT 14.565 199.255 14.615 199.435 ; + RECT 14.565 200.24 14.615 200.425 ; + RECT 14.99 201.715 15.04 201.895 ; + RECT 14.565 203.19 14.615 203.37 ; + RECT 13.8 204.185 13.85 204.315 ; + RECT 14.865 204.495 14.915 204.625 ; + RECT 15.335 204.495 15.385 204.625 ; + RECT 15.875 204.495 15.925 204.625 ; + RECT 16.415 204.495 16.465 204.625 ; + RECT 16.955 204.495 17.005 204.625 ; + RECT 17.495 204.495 17.545 204.625 ; + RECT 18.035 204.495 18.085 204.625 ; + RECT 18.575 204.495 18.625 204.625 ; + RECT 19.115 204.495 19.165 204.625 ; + RECT 15.335 204.81 15.385 204.94 ; + RECT 15.875 204.81 15.925 204.94 ; + RECT 16.415 204.81 16.465 204.94 ; + RECT 16.955 204.81 17.005 204.94 ; + RECT 17.495 204.81 17.545 204.94 ; + RECT 18.035 204.81 18.085 204.94 ; + RECT 18.575 204.81 18.625 204.94 ; + RECT 19.115 204.81 19.165 204.94 ; + RECT 14.565 205.47 14.615 205.52 ; + RECT 14.965 205.675 15.015 205.805 ; + RECT 14.565 205.965 14.615 206.015 ; + RECT 15.335 206.66 15.385 206.79 ; + RECT 15.875 206.66 15.925 206.79 ; + RECT 16.415 206.66 16.465 206.79 ; + RECT 16.955 206.66 17.005 206.79 ; + RECT 17.495 206.66 17.545 206.79 ; + RECT 18.035 206.66 18.085 206.79 ; + RECT 18.575 206.66 18.625 206.79 ; + RECT 19.115 206.66 19.165 206.79 ; + RECT 14.565 207.12 14.615 207.31 ; + RECT 14.565 207.615 14.615 207.805 ; + RECT 15.335 208.135 15.385 208.265 ; + RECT 15.875 208.135 15.925 208.265 ; + RECT 16.415 208.135 16.465 208.265 ; + RECT 16.955 208.135 17.005 208.265 ; + RECT 17.495 208.135 17.545 208.265 ; + RECT 18.035 208.135 18.085 208.265 ; + RECT 18.575 208.135 18.625 208.265 ; + RECT 19.115 208.135 19.165 208.265 ; + RECT 14.565 208.915 14.615 208.965 ; + RECT 14.965 209.12 15.015 209.25 ; + RECT 14.565 209.405 14.615 209.455 ; + RECT 15.335 209.925 15.385 210.055 ; + RECT 15.875 209.925 15.925 210.055 ; + RECT 16.415 209.925 16.465 210.055 ; + RECT 16.955 209.925 17.005 210.055 ; + RECT 17.495 209.925 17.545 210.055 ; + RECT 18.035 209.925 18.085 210.055 ; + RECT 18.575 209.925 18.625 210.055 ; + RECT 19.115 209.925 19.165 210.055 ; + RECT 14.865 210.27 14.915 210.4 ; + RECT 15.335 210.27 15.385 210.4 ; + RECT 15.875 210.27 15.925 210.4 ; + RECT 16.415 210.27 16.465 210.4 ; + RECT 16.955 210.27 17.005 210.4 ; + RECT 17.495 210.27 17.545 210.4 ; + RECT 18.035 210.27 18.085 210.4 ; + RECT 18.575 210.27 18.625 210.4 ; + RECT 19.115 210.27 19.165 210.4 ; + RECT 13.8 210.61 13.85 210.74 ; + RECT 14.565 211.555 14.615 211.735 ; + RECT 14.99 213.03 15.04 213.21 ; + RECT 14.565 214.505 14.615 214.69 ; + RECT 14.565 215.49 14.615 215.67 ; + RECT 14.99 216.97 15.04 217.15 ; + RECT 14.565 219.43 14.615 219.61 ; + RECT 14.99 220.93 15.04 221.06 ; + RECT 14.745 221.915 14.795 222.045 ; + RECT 14.565 222.405 14.615 222.535 ; + RECT 14.565 223.33 14.615 223.51 ; + RECT 14.865 224.61 14.915 224.74 ; + RECT 15.335 224.61 15.385 224.74 ; + RECT 15.875 224.61 15.925 224.74 ; + RECT 16.415 224.61 16.465 224.74 ; + RECT 16.955 224.61 17.005 224.74 ; + RECT 17.495 224.61 17.545 224.74 ; + RECT 18.035 224.61 18.085 224.74 ; + RECT 18.575 224.61 18.625 224.74 ; + RECT 19.115 224.61 19.165 224.74 ; + RECT 14.99 224.88 15.04 225.01 ; + RECT 14.565 225.155 14.615 225.205 ; + RECT 15.335 225.355 15.385 225.485 ; + RECT 15.875 225.355 15.925 225.485 ; + RECT 16.415 225.355 16.465 225.485 ; + RECT 16.955 225.355 17.005 225.485 ; + RECT 17.495 225.355 17.545 225.485 ; + RECT 18.035 225.355 18.085 225.485 ; + RECT 18.575 225.355 18.625 225.485 ; + RECT 19.115 225.355 19.165 225.485 ; + RECT 14.965 225.85 15.015 225.98 ; + RECT 14.565 226.135 14.615 226.185 ; + RECT 14.965 226.835 15.015 226.965 ; + RECT 15.335 226.835 15.385 226.965 ; + RECT 15.875 226.835 15.925 226.965 ; + RECT 16.415 226.835 16.465 226.965 ; + RECT 16.955 226.835 17.005 226.965 ; + RECT 17.495 226.835 17.545 226.965 ; + RECT 18.035 226.835 18.085 226.965 ; + RECT 18.575 226.835 18.625 226.965 ; + RECT 19.115 226.835 19.165 226.965 ; + RECT 19.465 187.94 19.595 188.12 ; + RECT 19.85 188.74 19.98 188.79 ; + RECT 19.465 188.985 19.595 189.035 ; + RECT 19.85 189.72 19.98 189.77 ; + RECT 19.465 190.89 19.595 191.07 ; + RECT 19.885 191.41 19.935 191.54 ; + RECT 19.465 191.94 19.595 191.99 ; + RECT 19.465 192.185 19.595 192.235 ; + RECT 19.885 192.39 19.935 192.52 ; + RECT 19.7 192.885 19.75 193.015 ; + RECT 19.465 194.83 19.595 195.01 ; + RECT 19.885 195.345 19.935 195.475 ; + RECT 19.465 195.81 19.595 195.99 ; + RECT 19.465 196.795 19.595 196.975 ; + RECT 19.465 198.765 19.595 198.945 ; + RECT 19.885 199.28 19.935 199.41 ; + RECT 19.465 199.745 19.595 199.925 ; + RECT 19.885 200.265 19.935 200.395 ; + RECT 19.465 200.73 19.595 200.91 ; + RECT 19.465 202.705 19.595 202.885 ; + RECT 19.885 203.215 19.935 203.345 ; + RECT 19.465 203.685 19.595 203.865 ; + RECT 19.85 205.47 19.98 205.52 ; + RECT 19.85 205.965 19.98 206.015 ; + RECT 19.465 206.635 19.595 206.815 ; + RECT 19.885 207.15 19.935 207.28 ; + RECT 19.885 207.645 19.935 207.775 ; + RECT 19.465 208.11 19.595 208.29 ; + RECT 19.85 208.915 19.98 208.965 ; + RECT 19.85 209.405 19.98 209.455 ; + RECT 19.465 211.06 19.595 211.24 ; + RECT 19.885 211.58 19.935 211.71 ; + RECT 19.465 212.05 19.595 212.23 ; + RECT 19.465 214.015 19.595 214.195 ; + RECT 19.885 214.535 19.935 214.665 ; + RECT 19.465 215 19.595 215.18 ; + RECT 19.885 215.515 19.935 215.645 ; + RECT 19.465 215.985 19.595 216.165 ; + RECT 19.465 217.95 19.595 218.13 ; + RECT 19.465 218.935 19.595 219.115 ; + RECT 19.885 219.455 19.935 219.585 ; + RECT 19.465 219.92 19.595 220.1 ; + RECT 19.465 220.72 19.595 220.77 ; + RECT 19.7 221.915 19.75 222.045 ; + RECT 19.885 222.405 19.935 222.535 ; + RECT 19.465 222.87 19.595 223.05 ; + RECT 19.885 223.355 19.935 223.485 ; + RECT 19.465 223.855 19.595 224.035 ; + RECT 19.85 225.155 19.98 225.205 ; + RECT 19.465 225.89 19.595 225.94 ; + RECT 19.885 226.135 19.935 226.185 ; + RECT 19.465 226.875 19.595 226.925 ; + END + +END rf2_32x128_wm1 + +END LIBRARY + diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.mdt b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.mdt new file mode 100644 index 00000000..766ac757 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.mdt @@ -0,0 +1,2704 @@ +// fastscan_memcomp Version: 4.0.5-EAC10 +// common_memcomp Version: 4.0.5.2-amci +// lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// Fastscan model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x128_wm1 +// Words: 32 +// Bits: 128 +// Mux: 2 +// Drive: 6 +// Write Mask: On +// Write Thru: Off +// Extra Margin Adjustment: On +// Redundant Columns: 2 +// Test Muxes On +// Power Gating: Off +// Retention: On +// Pipeline: Off +// Read Disturb Test: Off +// +// Creation Date: Thu Oct 17 15:30:00 2019 +// Version: r4p0 +// Modeling Assumptions: This is Sequential Synchronous Mentor model +// with Mentor ATPG primitives used to test UTI and generate test +// vectors. +// +// Modeling Limitations: None. +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// +model rf2_32x128_wm1_scanflop (Q, SI, D, SE, CLK, Xout) ( + input (SI) () + input (D) () + input (SE) () + input (CLK) () + input (Xout) () + output (Q) ( + primitive = _tiex mx_tiex (mx); + primitive = _tie0 m0_tie0 (m0_0); + primitive = _tie0 m1_tie0 (m0_1); + primitive = _mux m1 (D, SI, SE, n1); + primitive = _mux m2 (n1, mx, Xout, n2); + primitive = _dff r1 ( m0_0, m0_1, CLK, n2, Q, ); + ) +) +model rf2_32x128_wm1_bitcell (CLK, WRITE, READ, WA, RA, D, Xout, Q) ( + intern (WA_ram, RA_ram) (array = 4:0;) + input (CLK) () + intern (READ_ram) () + input (WRITE) () + input (READ) () + input (D) () + input (WA, RA) (array = 4:0;) + input (Xout) () + output (Q) ( + + + primitive = _tiex mx_tiex ( mx ); + primitive = _mux WRITE_MUX ( WRITE, mx, Xout, WRITE_ram ); + primitive = _mux D_mux ( D, mx, Xout, D_ram ); + primitive = _mux AA0_mux ( WA[0], mx, Xout, WA_ram[0] ); + primitive = _mux AA1_mux ( WA[1], mx, Xout, WA_ram[1] ); + primitive = _mux AA2_mux ( WA[2], mx, Xout, WA_ram[2] ); + primitive = _mux AA3_mux ( WA[3], mx, Xout, WA_ram[3] ); + primitive = _mux AA4_mux ( WA[4], mx, Xout, WA_ram[4] ); + primitive = _mux READ_MUX ( READ, mx, Xout, READ_ram ); + primitive = _mux RA0_mux ( RA[0], mx, Xout, RA_ram[0] ); + primitive = _mux RA1_mux ( RA[1], mx, Xout, RA_ram[1] ); + primitive = _mux RA2_mux ( RA[2], mx, Xout, RA_ram[2] ); + primitive = _mux RA3_mux ( RA[3], mx, Xout, RA_ram[3] ); + primitive = _mux RA4_mux ( RA[4], mx, Xout, RA_ram[4] ); + data_size = 1; + address_size = 5; + min_address = 0; + max_address = 31; + edge_trigger = w; + read_write_conflict = XW; + // Verilog RAM has no Set or Reset pin : + primitive = _cram mem ( , , + // Following write port will Hold in-memory data when not writing. + _write { , , } (CLK, WRITE_ram, WA_ram, D_ram), + // Following read port will Hold output data after reading. + _read { , , ,} ( , READ_ram, , RA_ram, Q) + ); + ) +) +model rf2_32x128_wm1 (CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, + CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TWENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN) ( + input (CLKA) () + input (CENA) () + input (AA) (array = 4 : 0; ) + input (CLKB) () + input (CENB) () + input (WENB) (array = 127 : 0; ) + input (AB) (array = 4 : 0; ) + input (DB) (array = 127 : 0; ) + input (EMAA) (array = 2 : 0; used=false;fault=none;) + input (EMASA) (used=false;fault=none;) + input (EMAB) (array = 2 : 0; used=false;fault=none;) + input (TENA) () + input (TCENA) () + input (TAA) (array = 4 : 0; ) + input (TENB) () + input (TCENB) () + input (TWENB) (array = 127 : 0; ) + input (TAB) (array = 4 : 0; ) + input (TDB) (array = 127 : 0; ) + input (RET1N) (used=false;fault=none;) + input (SIA) (array = 1 : 0; ) + input (SEA) () + input (DFTRAMBYP) () + input (SIB) (array = 1 : 0; ) + input (SEB) () + input (COLLDISN) (used=false;fault=none;) + intern (mtie_sel0) (primitive = _tie0 m0_sel0 ( mtie_sel0 );) + intern (tiex_readq) (primitive = _tiex mtiex_readq(tiex_readq);) + intern (mlc_bmuxsel) (primitive = _tie0 m0_bmuxsel ( mlc_bmuxsel );) + intern (BUS_SIA) (array = 1 : 0; + primitive = _buf wbSIA0 (SIA[0], BUS_SIA[0]); + primitive = _buf wbSIA1 (SIA[1], BUS_SIA[1]); + ) + intern (BUS_AA) (array = 4 : 0; + primitive = _buf bBUS_AA0 ( AA[0], BUS_AA[0]); + primitive = _buf bBUS_AA1 ( AA[1], BUS_AA[1]); + primitive = _buf bBUS_AA2 ( AA[2], BUS_AA[2]); + primitive = _buf bBUS_AA3 ( AA[3], BUS_AA[3]); + primitive = _buf bBUS_AA4 ( AA[4], BUS_AA[4]); + ) + intern (BMUX_AA) ( array = 4 : 0; + primitive = _mux maA0(TAA[0], BUS_AA[0], TENA, BMUX_AA[0]); + primitive = _mux maA1(TAA[1], BUS_AA[1], TENA, BMUX_AA[1]); + primitive = _mux maA2(TAA[2], BUS_AA[2], TENA, BMUX_AA[2]); + primitive = _mux maA3(TAA[3], BUS_AA[3], TENA, BMUX_AA[3]); + primitive = _mux maA4(TAA[4], BUS_AA[4], TENA, BMUX_AA[4]); + ) + intern (BMUXSEL_AA) ( array = 4 : 0; + primitive = _mux mBMUXSEL_AA0(mlc_bmuxsel, BMUX_AA[0], DFTRAMBYP, BMUXSEL_AA[0]); + primitive = _mux mBMUXSEL_AA1(mlc_bmuxsel, BMUX_AA[1], DFTRAMBYP, BMUXSEL_AA[1]); + primitive = _mux mBMUXSEL_AA2(mlc_bmuxsel, BMUX_AA[2], DFTRAMBYP, BMUXSEL_AA[2]); + primitive = _mux mBMUXSEL_AA3(mlc_bmuxsel, BMUX_AA[3], DFTRAMBYP, BMUXSEL_AA[3]); + primitive = _mux mBMUXSEL_AA4(mlc_bmuxsel, BMUX_AA[4], DFTRAMBYP, BMUXSEL_AA[4]); + ) + output (AYA) ( array = 4 : 0; + primitive = _buf bAYA0(BMUXSEL_AA[0], AYA[0]); + primitive = _buf bAYA1(BMUXSEL_AA[1], AYA[1]); + primitive = _buf bAYA2(BMUXSEL_AA[2], AYA[2]); + primitive = _buf bAYA3(BMUXSEL_AA[3], AYA[3]); + primitive = _buf bAYA4(BMUXSEL_AA[4], AYA[4]); + ) + + intern (BMUX_CENA) (primitive = _mux mBMUX_CENA(TCENA, CENA, TENA, BMUX_CENA);) + intern (BMUXSEL_CENA) (primitive = _mux mBMUXSEL_CENA(mlc_bmuxsel, BMUX_CENA, DFTRAMBYP, BMUXSEL_CENA);) + output (CENYA) (primitive = _buf bCENYA(BMUXSEL_CENA, CENYA);) + intern (BMUX_AA_n) (array = 4 : 1; + primitive = _inv iBMUX_AA_n1 ( BMUX_AA[1], BMUX_AA_n[1] ); + primitive = _inv iBMUX_AA_n2 ( BMUX_AA[2], BMUX_AA_n[2] ); + primitive = _inv iBMUX_AA_n3 ( BMUX_AA[3], BMUX_AA_n[3] ); + primitive = _inv iBMUX_AA_n4 ( BMUX_AA[4], BMUX_AA_n[4] ); + ) + + intern (A_max) (array = 4 : 0; + primitive = _tie1 bA_max0 ( A_max[0] ); + primitive = _tie1 bA_max1 ( A_max[1] ); + primitive = _tie1 bA_max2 ( A_max[2] ); + primitive = _tie1 bA_max3 ( A_max[3] ); + primitive = _tie1 bA_max4 ( A_max[4] ); + ) + + intern (A_max_n) (array = 4 : 0; + primitive = _inv bA_max_n0( A_max[0], A_max_n[0] ); + primitive = _inv bA_max_n1( A_max[1], A_max_n[1] ); + primitive = _inv bA_max_n2( A_max[2], A_max_n[2] ); + primitive = _inv bA_max_n3( A_max[3], A_max_n[3] ); + primitive = _inv bA_max_n4( A_max[4], A_max_n[4] ); + ) + + intern (AA_m) (array = 4 : 0; + primitive = _and aAA_m0(BMUX_AA[0], A_max_n[0], AA_m[0] ); + primitive = _and aAA_m1(BMUX_AA[1], A_max_n[1], AA_m[1] ); + primitive = _and aAA_m2(BMUX_AA[2], A_max_n[2], AA_m[2] ); + primitive = _and aAA_m3(BMUX_AA[3], A_max_n[3], AA_m[3] ); + primitive = _and aAA_m4(BMUX_AA[4], A_max_n[4], AA_m[4] ); + ) + + intern (m_AA) (array = 4 : 1; + primitive = _and am_AA1(BMUX_AA_n[1], A_max[1], m_AA[1] ); + primitive = _and am_AA2(BMUX_AA_n[2], A_max[2], m_AA[2] ); + primitive = _and am_AA3(BMUX_AA_n[3], A_max[3], m_AA[3] ); + primitive = _and am_AA4(BMUX_AA_n[4], A_max[4], m_AA[4] ); + ) + + intern (EQ_A) (array = 4 : 1; + primitive = _nor nEQ_A1(m_AA[1], AA_m[1], EQ_A[1] ); + primitive = _nor nEQ_A2(m_AA[2], AA_m[2], EQ_A[2] ); + primitive = _nor nEQ_A3(m_AA[3], AA_m[3], EQ_A[3] ); + primitive = _nor nEQ_A4(m_AA[4], AA_m[4], EQ_A[4] ); + ) + + intern (XoutAi) (array = 3 : 0; + primitive = _and aXoutAi0(AA_m[0], EQ_A[4], EQ_A[3], EQ_A[2], EQ_A[1], XoutAi[0]); + primitive = _and aXoutAi1(AA_m[1], EQ_A[4], EQ_A[3], EQ_A[2], XoutAi[1]); + primitive = _and aXoutAi2(AA_m[2], EQ_A[4], EQ_A[3], XoutAi[2]); + primitive = _and aXoutAi3(AA_m[3], EQ_A[4], XoutAi[3]); + ) + intern (XoutAifTemp) (primitive = _or oXoutAifTemp (AA_m[4], XoutAi[0], XoutAi[1], XoutAi[2], XoutAi[3], XoutAifTemp);) + intern (XoutAif) (primitive = _and oXoutAif (XoutAifTemp, NOT_CENA, XoutAif);) + + intern (nscanshiftA) ( + primitive = _nor nnscanshiftA (DFTRAMBYP, SEA, nscanshiftA);) + intern (XoutaddrA) ( + primitive = _and aXoutaddrA (nscanshiftA, XoutAif, XoutaddrA);) + intern (XoutAiff) ( + primitive = _or oXoutAiff (XoutaddrA, XoutA, XoutAiff);) + + intern (NOT_CENA) (primitive = _inv iNOT_CENA(BMUX_CENA, NOT_CENA);) + intern (NOT_DFTRAMBYP) (primitive = _inv iNOT_DFTRAMBYP(DFTRAMBYP, NOT_DFTRAMBYP);) + intern (READA) (array = 127:0; + primitive = _buf bREADA0(NOT_CENA, READA[0]); + primitive = _buf bREADA1(NOT_CENA, READA[1]); + primitive = _buf bREADA2(NOT_CENA, READA[2]); + primitive = _buf bREADA3(NOT_CENA, READA[3]); + primitive = _buf bREADA4(NOT_CENA, READA[4]); + primitive = _buf bREADA5(NOT_CENA, READA[5]); + primitive = _buf bREADA6(NOT_CENA, READA[6]); + primitive = _buf bREADA7(NOT_CENA, READA[7]); + primitive = _buf bREADA8(NOT_CENA, READA[8]); + primitive = _buf bREADA9(NOT_CENA, READA[9]); + primitive = _buf bREADA10(NOT_CENA, READA[10]); + primitive = _buf bREADA11(NOT_CENA, READA[11]); + primitive = _buf bREADA12(NOT_CENA, READA[12]); + primitive = _buf bREADA13(NOT_CENA, READA[13]); + primitive = _buf bREADA14(NOT_CENA, READA[14]); + primitive = _buf bREADA15(NOT_CENA, READA[15]); + primitive = _buf bREADA16(NOT_CENA, READA[16]); + primitive = _buf bREADA17(NOT_CENA, READA[17]); + primitive = _buf bREADA18(NOT_CENA, READA[18]); + primitive = _buf bREADA19(NOT_CENA, READA[19]); + primitive = _buf bREADA20(NOT_CENA, READA[20]); + primitive = _buf bREADA21(NOT_CENA, READA[21]); + primitive = _buf bREADA22(NOT_CENA, READA[22]); + primitive = _buf bREADA23(NOT_CENA, READA[23]); + primitive = _buf bREADA24(NOT_CENA, READA[24]); + primitive = _buf bREADA25(NOT_CENA, READA[25]); + primitive = _buf bREADA26(NOT_CENA, READA[26]); + primitive = _buf bREADA27(NOT_CENA, READA[27]); + primitive = _buf bREADA28(NOT_CENA, READA[28]); + primitive = _buf bREADA29(NOT_CENA, READA[29]); + primitive = _buf bREADA30(NOT_CENA, READA[30]); + primitive = _buf bREADA31(NOT_CENA, READA[31]); + primitive = _buf bREADA32(NOT_CENA, READA[32]); + primitive = _buf bREADA33(NOT_CENA, READA[33]); + primitive = _buf bREADA34(NOT_CENA, READA[34]); + primitive = _buf bREADA35(NOT_CENA, READA[35]); + primitive = _buf bREADA36(NOT_CENA, READA[36]); + primitive = _buf bREADA37(NOT_CENA, READA[37]); + primitive = _buf bREADA38(NOT_CENA, READA[38]); + primitive = _buf bREADA39(NOT_CENA, READA[39]); + primitive = _buf bREADA40(NOT_CENA, READA[40]); + primitive = _buf bREADA41(NOT_CENA, READA[41]); + primitive = _buf bREADA42(NOT_CENA, READA[42]); + primitive = _buf bREADA43(NOT_CENA, READA[43]); + primitive = _buf bREADA44(NOT_CENA, READA[44]); + primitive = _buf bREADA45(NOT_CENA, READA[45]); + primitive = _buf bREADA46(NOT_CENA, READA[46]); + primitive = _buf bREADA47(NOT_CENA, READA[47]); + primitive = _buf bREADA48(NOT_CENA, READA[48]); + primitive = _buf bREADA49(NOT_CENA, READA[49]); + primitive = _buf bREADA50(NOT_CENA, READA[50]); + primitive = _buf bREADA51(NOT_CENA, READA[51]); + primitive = _buf bREADA52(NOT_CENA, READA[52]); + primitive = _buf bREADA53(NOT_CENA, READA[53]); + primitive = _buf bREADA54(NOT_CENA, READA[54]); + primitive = _buf bREADA55(NOT_CENA, READA[55]); + primitive = _buf bREADA56(NOT_CENA, READA[56]); + primitive = _buf bREADA57(NOT_CENA, READA[57]); + primitive = _buf bREADA58(NOT_CENA, READA[58]); + primitive = _buf bREADA59(NOT_CENA, READA[59]); + primitive = _buf bREADA60(NOT_CENA, READA[60]); + primitive = _buf bREADA61(NOT_CENA, READA[61]); + primitive = _buf bREADA62(NOT_CENA, READA[62]); + primitive = _buf bREADA63(NOT_CENA, READA[63]); + primitive = _buf bREADA64(NOT_CENA, READA[64]); + primitive = _buf bREADA65(NOT_CENA, READA[65]); + primitive = _buf bREADA66(NOT_CENA, READA[66]); + primitive = _buf bREADA67(NOT_CENA, READA[67]); + primitive = _buf bREADA68(NOT_CENA, READA[68]); + primitive = _buf bREADA69(NOT_CENA, READA[69]); + primitive = _buf bREADA70(NOT_CENA, READA[70]); + primitive = _buf bREADA71(NOT_CENA, READA[71]); + primitive = _buf bREADA72(NOT_CENA, READA[72]); + primitive = _buf bREADA73(NOT_CENA, READA[73]); + primitive = _buf bREADA74(NOT_CENA, READA[74]); + primitive = _buf bREADA75(NOT_CENA, READA[75]); + primitive = _buf bREADA76(NOT_CENA, READA[76]); + primitive = _buf bREADA77(NOT_CENA, READA[77]); + primitive = _buf bREADA78(NOT_CENA, READA[78]); + primitive = _buf bREADA79(NOT_CENA, READA[79]); + primitive = _buf bREADA80(NOT_CENA, READA[80]); + primitive = _buf bREADA81(NOT_CENA, READA[81]); + primitive = _buf bREADA82(NOT_CENA, READA[82]); + primitive = _buf bREADA83(NOT_CENA, READA[83]); + primitive = _buf bREADA84(NOT_CENA, READA[84]); + primitive = _buf bREADA85(NOT_CENA, READA[85]); + primitive = _buf bREADA86(NOT_CENA, READA[86]); + primitive = _buf bREADA87(NOT_CENA, READA[87]); + primitive = _buf bREADA88(NOT_CENA, READA[88]); + primitive = _buf bREADA89(NOT_CENA, READA[89]); + primitive = _buf bREADA90(NOT_CENA, READA[90]); + primitive = _buf bREADA91(NOT_CENA, READA[91]); + primitive = _buf bREADA92(NOT_CENA, READA[92]); + primitive = _buf bREADA93(NOT_CENA, READA[93]); + primitive = _buf bREADA94(NOT_CENA, READA[94]); + primitive = _buf bREADA95(NOT_CENA, READA[95]); + primitive = _buf bREADA96(NOT_CENA, READA[96]); + primitive = _buf bREADA97(NOT_CENA, READA[97]); + primitive = _buf bREADA98(NOT_CENA, READA[98]); + primitive = _buf bREADA99(NOT_CENA, READA[99]); + primitive = _buf bREADA100(NOT_CENA, READA[100]); + primitive = _buf bREADA101(NOT_CENA, READA[101]); + primitive = _buf bREADA102(NOT_CENA, READA[102]); + primitive = _buf bREADA103(NOT_CENA, READA[103]); + primitive = _buf bREADA104(NOT_CENA, READA[104]); + primitive = _buf bREADA105(NOT_CENA, READA[105]); + primitive = _buf bREADA106(NOT_CENA, READA[106]); + primitive = _buf bREADA107(NOT_CENA, READA[107]); + primitive = _buf bREADA108(NOT_CENA, READA[108]); + primitive = _buf bREADA109(NOT_CENA, READA[109]); + primitive = _buf bREADA110(NOT_CENA, READA[110]); + primitive = _buf bREADA111(NOT_CENA, READA[111]); + primitive = _buf bREADA112(NOT_CENA, READA[112]); + primitive = _buf bREADA113(NOT_CENA, READA[113]); + primitive = _buf bREADA114(NOT_CENA, READA[114]); + primitive = _buf bREADA115(NOT_CENA, READA[115]); + primitive = _buf bREADA116(NOT_CENA, READA[116]); + primitive = _buf bREADA117(NOT_CENA, READA[117]); + primitive = _buf bREADA118(NOT_CENA, READA[118]); + primitive = _buf bREADA119(NOT_CENA, READA[119]); + primitive = _buf bREADA120(NOT_CENA, READA[120]); + primitive = _buf bREADA121(NOT_CENA, READA[121]); + primitive = _buf bREADA122(NOT_CENA, READA[122]); + primitive = _buf bREADA123(NOT_CENA, READA[123]); + primitive = _buf bREADA124(NOT_CENA, READA[124]); + primitive = _buf bREADA125(NOT_CENA, READA[125]); + primitive = _buf bREADA126(NOT_CENA, READA[126]); + primitive = _buf bREADA127(NOT_CENA, READA[127]); + ) + intern (x_detection_CENA) (primitive = _xor xx_detection_CENA(BMUX_CENA, BMUX_CENA, x_detection_CENA);) + intern (x_detection_CLKA) (primitive = _xor xx_detection_CLKA(CLKA, CLKA, x_detection_CLKA);) + intern (aSEA) (primitive = _and a1SEA ( SEA, DFTRAMBYPinv, aSEA );) + intern (acendftA) (primitive = _and a1cendft[A] (x_detection_CENA, DFTRAMBYPinv, acendftA );) + intern (acendftCA) (primitive = _and a1cendftCA ( x_detection_CLKA, DFTRAMBYPinv, acendftCA );) + intern (XoutA) (primitive = _or oXoutA ( aSEA, acendftA, XoutA );) + intern (READ_QA) (array = 127:0; + primitive = _mux mREAD_QA0(QA[0], INT_QA[0], READA[0], READ_QA[0]); + primitive = _mux mREAD_QA1(QA[1], INT_QA[1], READA[1], READ_QA[1]); + primitive = _mux mREAD_QA2(QA[2], INT_QA[2], READA[2], READ_QA[2]); + primitive = _mux mREAD_QA3(QA[3], INT_QA[3], READA[3], READ_QA[3]); + primitive = _mux mREAD_QA4(QA[4], INT_QA[4], READA[4], READ_QA[4]); + primitive = _mux mREAD_QA5(QA[5], INT_QA[5], READA[5], READ_QA[5]); + primitive = _mux mREAD_QA6(QA[6], INT_QA[6], READA[6], READ_QA[6]); + primitive = _mux mREAD_QA7(QA[7], INT_QA[7], READA[7], READ_QA[7]); + primitive = _mux mREAD_QA8(QA[8], INT_QA[8], READA[8], READ_QA[8]); + primitive = _mux mREAD_QA9(QA[9], INT_QA[9], READA[9], READ_QA[9]); + primitive = _mux mREAD_QA10(QA[10], INT_QA[10], READA[10], READ_QA[10]); + primitive = _mux mREAD_QA11(QA[11], INT_QA[11], READA[11], READ_QA[11]); + primitive = _mux mREAD_QA12(QA[12], INT_QA[12], READA[12], READ_QA[12]); + primitive = _mux mREAD_QA13(QA[13], INT_QA[13], READA[13], READ_QA[13]); + primitive = _mux mREAD_QA14(QA[14], INT_QA[14], READA[14], READ_QA[14]); + primitive = _mux mREAD_QA15(QA[15], INT_QA[15], READA[15], READ_QA[15]); + primitive = _mux mREAD_QA16(QA[16], INT_QA[16], READA[16], READ_QA[16]); + primitive = _mux mREAD_QA17(QA[17], INT_QA[17], READA[17], READ_QA[17]); + primitive = _mux mREAD_QA18(QA[18], INT_QA[18], READA[18], READ_QA[18]); + primitive = _mux mREAD_QA19(QA[19], INT_QA[19], READA[19], READ_QA[19]); + primitive = _mux mREAD_QA20(QA[20], INT_QA[20], READA[20], READ_QA[20]); + primitive = _mux mREAD_QA21(QA[21], INT_QA[21], READA[21], READ_QA[21]); + primitive = _mux mREAD_QA22(QA[22], INT_QA[22], READA[22], READ_QA[22]); + primitive = _mux mREAD_QA23(QA[23], INT_QA[23], READA[23], READ_QA[23]); + primitive = _mux mREAD_QA24(QA[24], INT_QA[24], READA[24], READ_QA[24]); + primitive = _mux mREAD_QA25(QA[25], INT_QA[25], READA[25], READ_QA[25]); + primitive = _mux mREAD_QA26(QA[26], INT_QA[26], READA[26], READ_QA[26]); + primitive = _mux mREAD_QA27(QA[27], INT_QA[27], READA[27], READ_QA[27]); + primitive = _mux mREAD_QA28(QA[28], INT_QA[28], READA[28], READ_QA[28]); + primitive = _mux mREAD_QA29(QA[29], INT_QA[29], READA[29], READ_QA[29]); + primitive = _mux mREAD_QA30(QA[30], INT_QA[30], READA[30], READ_QA[30]); + primitive = _mux mREAD_QA31(QA[31], INT_QA[31], READA[31], READ_QA[31]); + primitive = _mux mREAD_QA32(QA[32], INT_QA[32], READA[32], READ_QA[32]); + primitive = _mux mREAD_QA33(QA[33], INT_QA[33], READA[33], READ_QA[33]); + primitive = _mux mREAD_QA34(QA[34], INT_QA[34], READA[34], READ_QA[34]); + primitive = _mux mREAD_QA35(QA[35], INT_QA[35], READA[35], READ_QA[35]); + primitive = _mux mREAD_QA36(QA[36], INT_QA[36], READA[36], READ_QA[36]); + primitive = _mux mREAD_QA37(QA[37], INT_QA[37], READA[37], READ_QA[37]); + primitive = _mux mREAD_QA38(QA[38], INT_QA[38], READA[38], READ_QA[38]); + primitive = _mux mREAD_QA39(QA[39], INT_QA[39], READA[39], READ_QA[39]); + primitive = _mux mREAD_QA40(QA[40], INT_QA[40], READA[40], READ_QA[40]); + primitive = _mux mREAD_QA41(QA[41], INT_QA[41], READA[41], READ_QA[41]); + primitive = _mux mREAD_QA42(QA[42], INT_QA[42], READA[42], READ_QA[42]); + primitive = _mux mREAD_QA43(QA[43], INT_QA[43], READA[43], READ_QA[43]); + primitive = _mux mREAD_QA44(QA[44], INT_QA[44], READA[44], READ_QA[44]); + primitive = _mux mREAD_QA45(QA[45], INT_QA[45], READA[45], READ_QA[45]); + primitive = _mux mREAD_QA46(QA[46], INT_QA[46], READA[46], READ_QA[46]); + primitive = _mux mREAD_QA47(QA[47], INT_QA[47], READA[47], READ_QA[47]); + primitive = _mux mREAD_QA48(QA[48], INT_QA[48], READA[48], READ_QA[48]); + primitive = _mux mREAD_QA49(QA[49], INT_QA[49], READA[49], READ_QA[49]); + primitive = _mux mREAD_QA50(QA[50], INT_QA[50], READA[50], READ_QA[50]); + primitive = _mux mREAD_QA51(QA[51], INT_QA[51], READA[51], READ_QA[51]); + primitive = _mux mREAD_QA52(QA[52], INT_QA[52], READA[52], READ_QA[52]); + primitive = _mux mREAD_QA53(QA[53], INT_QA[53], READA[53], READ_QA[53]); + primitive = _mux mREAD_QA54(QA[54], INT_QA[54], READA[54], READ_QA[54]); + primitive = _mux mREAD_QA55(QA[55], INT_QA[55], READA[55], READ_QA[55]); + primitive = _mux mREAD_QA56(QA[56], INT_QA[56], READA[56], READ_QA[56]); + primitive = _mux mREAD_QA57(QA[57], INT_QA[57], READA[57], READ_QA[57]); + primitive = _mux mREAD_QA58(QA[58], INT_QA[58], READA[58], READ_QA[58]); + primitive = _mux mREAD_QA59(QA[59], INT_QA[59], READA[59], READ_QA[59]); + primitive = _mux mREAD_QA60(QA[60], INT_QA[60], READA[60], READ_QA[60]); + primitive = _mux mREAD_QA61(QA[61], INT_QA[61], READA[61], READ_QA[61]); + primitive = _mux mREAD_QA62(QA[62], INT_QA[62], READA[62], READ_QA[62]); + primitive = _mux mREAD_QA63(QA[63], INT_QA[63], READA[63], READ_QA[63]); + primitive = _mux mREAD_QA64(QA[64], INT_QA[64], READA[64], READ_QA[64]); + primitive = _mux mREAD_QA65(QA[65], INT_QA[65], READA[65], READ_QA[65]); + primitive = _mux mREAD_QA66(QA[66], INT_QA[66], READA[66], READ_QA[66]); + primitive = _mux mREAD_QA67(QA[67], INT_QA[67], READA[67], READ_QA[67]); + primitive = _mux mREAD_QA68(QA[68], INT_QA[68], READA[68], READ_QA[68]); + primitive = _mux mREAD_QA69(QA[69], INT_QA[69], READA[69], READ_QA[69]); + primitive = _mux mREAD_QA70(QA[70], INT_QA[70], READA[70], READ_QA[70]); + primitive = _mux mREAD_QA71(QA[71], INT_QA[71], READA[71], READ_QA[71]); + primitive = _mux mREAD_QA72(QA[72], INT_QA[72], READA[72], READ_QA[72]); + primitive = _mux mREAD_QA73(QA[73], INT_QA[73], READA[73], READ_QA[73]); + primitive = _mux mREAD_QA74(QA[74], INT_QA[74], READA[74], READ_QA[74]); + primitive = _mux mREAD_QA75(QA[75], INT_QA[75], READA[75], READ_QA[75]); + primitive = _mux mREAD_QA76(QA[76], INT_QA[76], READA[76], READ_QA[76]); + primitive = _mux mREAD_QA77(QA[77], INT_QA[77], READA[77], READ_QA[77]); + primitive = _mux mREAD_QA78(QA[78], INT_QA[78], READA[78], READ_QA[78]); + primitive = _mux mREAD_QA79(QA[79], INT_QA[79], READA[79], READ_QA[79]); + primitive = _mux mREAD_QA80(QA[80], INT_QA[80], READA[80], READ_QA[80]); + primitive = _mux mREAD_QA81(QA[81], INT_QA[81], READA[81], READ_QA[81]); + primitive = _mux mREAD_QA82(QA[82], INT_QA[82], READA[82], READ_QA[82]); + primitive = _mux mREAD_QA83(QA[83], INT_QA[83], READA[83], READ_QA[83]); + primitive = _mux mREAD_QA84(QA[84], INT_QA[84], READA[84], READ_QA[84]); + primitive = _mux mREAD_QA85(QA[85], INT_QA[85], READA[85], READ_QA[85]); + primitive = _mux mREAD_QA86(QA[86], INT_QA[86], READA[86], READ_QA[86]); + primitive = _mux mREAD_QA87(QA[87], INT_QA[87], READA[87], READ_QA[87]); + primitive = _mux mREAD_QA88(QA[88], INT_QA[88], READA[88], READ_QA[88]); + primitive = _mux mREAD_QA89(QA[89], INT_QA[89], READA[89], READ_QA[89]); + primitive = _mux mREAD_QA90(QA[90], INT_QA[90], READA[90], READ_QA[90]); + primitive = _mux mREAD_QA91(QA[91], INT_QA[91], READA[91], READ_QA[91]); + primitive = _mux mREAD_QA92(QA[92], INT_QA[92], READA[92], READ_QA[92]); + primitive = _mux mREAD_QA93(QA[93], INT_QA[93], READA[93], READ_QA[93]); + primitive = _mux mREAD_QA94(QA[94], INT_QA[94], READA[94], READ_QA[94]); + primitive = _mux mREAD_QA95(QA[95], INT_QA[95], READA[95], READ_QA[95]); + primitive = _mux mREAD_QA96(QA[96], INT_QA[96], READA[96], READ_QA[96]); + primitive = _mux mREAD_QA97(QA[97], INT_QA[97], READA[97], READ_QA[97]); + primitive = _mux mREAD_QA98(QA[98], INT_QA[98], READA[98], READ_QA[98]); + primitive = _mux mREAD_QA99(QA[99], INT_QA[99], READA[99], READ_QA[99]); + primitive = _mux mREAD_QA100(QA[100], INT_QA[100], READA[100], READ_QA[100]); + primitive = _mux mREAD_QA101(QA[101], INT_QA[101], READA[101], READ_QA[101]); + primitive = _mux mREAD_QA102(QA[102], INT_QA[102], READA[102], READ_QA[102]); + primitive = _mux mREAD_QA103(QA[103], INT_QA[103], READA[103], READ_QA[103]); + primitive = _mux mREAD_QA104(QA[104], INT_QA[104], READA[104], READ_QA[104]); + primitive = _mux mREAD_QA105(QA[105], INT_QA[105], READA[105], READ_QA[105]); + primitive = _mux mREAD_QA106(QA[106], INT_QA[106], READA[106], READ_QA[106]); + primitive = _mux mREAD_QA107(QA[107], INT_QA[107], READA[107], READ_QA[107]); + primitive = _mux mREAD_QA108(QA[108], INT_QA[108], READA[108], READ_QA[108]); + primitive = _mux mREAD_QA109(QA[109], INT_QA[109], READA[109], READ_QA[109]); + primitive = _mux mREAD_QA110(QA[110], INT_QA[110], READA[110], READ_QA[110]); + primitive = _mux mREAD_QA111(QA[111], INT_QA[111], READA[111], READ_QA[111]); + primitive = _mux mREAD_QA112(QA[112], INT_QA[112], READA[112], READ_QA[112]); + primitive = _mux mREAD_QA113(QA[113], INT_QA[113], READA[113], READ_QA[113]); + primitive = _mux mREAD_QA114(QA[114], INT_QA[114], READA[114], READ_QA[114]); + primitive = _mux mREAD_QA115(QA[115], INT_QA[115], READA[115], READ_QA[115]); + primitive = _mux mREAD_QA116(QA[116], INT_QA[116], READA[116], READ_QA[116]); + primitive = _mux mREAD_QA117(QA[117], INT_QA[117], READA[117], READ_QA[117]); + primitive = _mux mREAD_QA118(QA[118], INT_QA[118], READA[118], READ_QA[118]); + primitive = _mux mREAD_QA119(QA[119], INT_QA[119], READA[119], READ_QA[119]); + primitive = _mux mREAD_QA120(QA[120], INT_QA[120], READA[120], READ_QA[120]); + primitive = _mux mREAD_QA121(QA[121], INT_QA[121], READA[121], READ_QA[121]); + primitive = _mux mREAD_QA122(QA[122], INT_QA[122], READA[122], READ_QA[122]); + primitive = _mux mREAD_QA123(QA[123], INT_QA[123], READA[123], READ_QA[123]); + primitive = _mux mREAD_QA124(QA[124], INT_QA[124], READA[124], READ_QA[124]); + primitive = _mux mREAD_QA125(QA[125], INT_QA[125], READA[125], READ_QA[125]); + primitive = _mux mREAD_QA126(QA[126], INT_QA[126], READA[126], READ_QA[126]); + primitive = _mux mREAD_QA127(QA[127], INT_QA[127], READA[127], READ_QA[127]); + ) + intern (AAXOR) (array = 4 : 0; + primitive = _xor xAAXOR0(BMUX_AA[0], BMUX_AA[0], AAXOR[0]); + primitive = _xor xAAXOR1(BMUX_AA[1], BMUX_AA[1], AAXOR[1]); + primitive = _xor xAAXOR2(BMUX_AA[2], BMUX_AA[2], AAXOR[2]); + primitive = _xor xAAXOR3(BMUX_AA[3], BMUX_AA[3], AAXOR[3]); + primitive = _xor xAAXOR4(BMUX_AA[4], BMUX_AA[4], AAXOR[4]); + ) + intern (xA_addr_temp) (primitive = _or oxA_addr_temp( AAXOR[0], AAXOR[1], AAXOR[2], AAXOR[3], AAXOR[4], xA_addr_temp);) + intern (xA_addr) (primitive = _and oxA_addr(NOT_CENA,xA_addr_temp,xA_addr);) + intern (READ_QAX) (array = 127 : 0; + primitive = _mux mREAD_QAX0 (READ_QA[0], tiex_readq, xA_addr, READ_QAX[0]); + primitive = _mux mREAD_QAX1 (READ_QA[1], tiex_readq, xA_addr, READ_QAX[1]); + primitive = _mux mREAD_QAX2 (READ_QA[2], tiex_readq, xA_addr, READ_QAX[2]); + primitive = _mux mREAD_QAX3 (READ_QA[3], tiex_readq, xA_addr, READ_QAX[3]); + primitive = _mux mREAD_QAX4 (READ_QA[4], tiex_readq, xA_addr, READ_QAX[4]); + primitive = _mux mREAD_QAX5 (READ_QA[5], tiex_readq, xA_addr, READ_QAX[5]); + primitive = _mux mREAD_QAX6 (READ_QA[6], tiex_readq, xA_addr, READ_QAX[6]); + primitive = _mux mREAD_QAX7 (READ_QA[7], tiex_readq, xA_addr, READ_QAX[7]); + primitive = _mux mREAD_QAX8 (READ_QA[8], tiex_readq, xA_addr, READ_QAX[8]); + primitive = _mux mREAD_QAX9 (READ_QA[9], tiex_readq, xA_addr, READ_QAX[9]); + primitive = _mux mREAD_QAX10 (READ_QA[10], tiex_readq, xA_addr, READ_QAX[10]); + primitive = _mux mREAD_QAX11 (READ_QA[11], tiex_readq, xA_addr, READ_QAX[11]); + primitive = _mux mREAD_QAX12 (READ_QA[12], tiex_readq, xA_addr, READ_QAX[12]); + primitive = _mux mREAD_QAX13 (READ_QA[13], tiex_readq, xA_addr, READ_QAX[13]); + primitive = _mux mREAD_QAX14 (READ_QA[14], tiex_readq, xA_addr, READ_QAX[14]); + primitive = _mux mREAD_QAX15 (READ_QA[15], tiex_readq, xA_addr, READ_QAX[15]); + primitive = _mux mREAD_QAX16 (READ_QA[16], tiex_readq, xA_addr, READ_QAX[16]); + primitive = _mux mREAD_QAX17 (READ_QA[17], tiex_readq, xA_addr, READ_QAX[17]); + primitive = _mux mREAD_QAX18 (READ_QA[18], tiex_readq, xA_addr, READ_QAX[18]); + primitive = _mux mREAD_QAX19 (READ_QA[19], tiex_readq, xA_addr, READ_QAX[19]); + primitive = _mux mREAD_QAX20 (READ_QA[20], tiex_readq, xA_addr, READ_QAX[20]); + primitive = _mux mREAD_QAX21 (READ_QA[21], tiex_readq, xA_addr, READ_QAX[21]); + primitive = _mux mREAD_QAX22 (READ_QA[22], tiex_readq, xA_addr, READ_QAX[22]); + primitive = _mux mREAD_QAX23 (READ_QA[23], tiex_readq, xA_addr, READ_QAX[23]); + primitive = _mux mREAD_QAX24 (READ_QA[24], tiex_readq, xA_addr, READ_QAX[24]); + primitive = _mux mREAD_QAX25 (READ_QA[25], tiex_readq, xA_addr, READ_QAX[25]); + primitive = _mux mREAD_QAX26 (READ_QA[26], tiex_readq, xA_addr, READ_QAX[26]); + primitive = _mux mREAD_QAX27 (READ_QA[27], tiex_readq, xA_addr, READ_QAX[27]); + primitive = _mux mREAD_QAX28 (READ_QA[28], tiex_readq, xA_addr, READ_QAX[28]); + primitive = _mux mREAD_QAX29 (READ_QA[29], tiex_readq, xA_addr, READ_QAX[29]); + primitive = _mux mREAD_QAX30 (READ_QA[30], tiex_readq, xA_addr, READ_QAX[30]); + primitive = _mux mREAD_QAX31 (READ_QA[31], tiex_readq, xA_addr, READ_QAX[31]); + primitive = _mux mREAD_QAX32 (READ_QA[32], tiex_readq, xA_addr, READ_QAX[32]); + primitive = _mux mREAD_QAX33 (READ_QA[33], tiex_readq, xA_addr, READ_QAX[33]); + primitive = _mux mREAD_QAX34 (READ_QA[34], tiex_readq, xA_addr, READ_QAX[34]); + primitive = _mux mREAD_QAX35 (READ_QA[35], tiex_readq, xA_addr, READ_QAX[35]); + primitive = _mux mREAD_QAX36 (READ_QA[36], tiex_readq, xA_addr, READ_QAX[36]); + primitive = _mux mREAD_QAX37 (READ_QA[37], tiex_readq, xA_addr, READ_QAX[37]); + primitive = _mux mREAD_QAX38 (READ_QA[38], tiex_readq, xA_addr, READ_QAX[38]); + primitive = _mux mREAD_QAX39 (READ_QA[39], tiex_readq, xA_addr, READ_QAX[39]); + primitive = _mux mREAD_QAX40 (READ_QA[40], tiex_readq, xA_addr, READ_QAX[40]); + primitive = _mux mREAD_QAX41 (READ_QA[41], tiex_readq, xA_addr, READ_QAX[41]); + primitive = _mux mREAD_QAX42 (READ_QA[42], tiex_readq, xA_addr, READ_QAX[42]); + primitive = _mux mREAD_QAX43 (READ_QA[43], tiex_readq, xA_addr, READ_QAX[43]); + primitive = _mux mREAD_QAX44 (READ_QA[44], tiex_readq, xA_addr, READ_QAX[44]); + primitive = _mux mREAD_QAX45 (READ_QA[45], tiex_readq, xA_addr, READ_QAX[45]); + primitive = _mux mREAD_QAX46 (READ_QA[46], tiex_readq, xA_addr, READ_QAX[46]); + primitive = _mux mREAD_QAX47 (READ_QA[47], tiex_readq, xA_addr, READ_QAX[47]); + primitive = _mux mREAD_QAX48 (READ_QA[48], tiex_readq, xA_addr, READ_QAX[48]); + primitive = _mux mREAD_QAX49 (READ_QA[49], tiex_readq, xA_addr, READ_QAX[49]); + primitive = _mux mREAD_QAX50 (READ_QA[50], tiex_readq, xA_addr, READ_QAX[50]); + primitive = _mux mREAD_QAX51 (READ_QA[51], tiex_readq, xA_addr, READ_QAX[51]); + primitive = _mux mREAD_QAX52 (READ_QA[52], tiex_readq, xA_addr, READ_QAX[52]); + primitive = _mux mREAD_QAX53 (READ_QA[53], tiex_readq, xA_addr, READ_QAX[53]); + primitive = _mux mREAD_QAX54 (READ_QA[54], tiex_readq, xA_addr, READ_QAX[54]); + primitive = _mux mREAD_QAX55 (READ_QA[55], tiex_readq, xA_addr, READ_QAX[55]); + primitive = _mux mREAD_QAX56 (READ_QA[56], tiex_readq, xA_addr, READ_QAX[56]); + primitive = _mux mREAD_QAX57 (READ_QA[57], tiex_readq, xA_addr, READ_QAX[57]); + primitive = _mux mREAD_QAX58 (READ_QA[58], tiex_readq, xA_addr, READ_QAX[58]); + primitive = _mux mREAD_QAX59 (READ_QA[59], tiex_readq, xA_addr, READ_QAX[59]); + primitive = _mux mREAD_QAX60 (READ_QA[60], tiex_readq, xA_addr, READ_QAX[60]); + primitive = _mux mREAD_QAX61 (READ_QA[61], tiex_readq, xA_addr, READ_QAX[61]); + primitive = _mux mREAD_QAX62 (READ_QA[62], tiex_readq, xA_addr, READ_QAX[62]); + primitive = _mux mREAD_QAX63 (READ_QA[63], tiex_readq, xA_addr, READ_QAX[63]); + primitive = _mux mREAD_QAX64 (READ_QA[64], tiex_readq, xA_addr, READ_QAX[64]); + primitive = _mux mREAD_QAX65 (READ_QA[65], tiex_readq, xA_addr, READ_QAX[65]); + primitive = _mux mREAD_QAX66 (READ_QA[66], tiex_readq, xA_addr, READ_QAX[66]); + primitive = _mux mREAD_QAX67 (READ_QA[67], tiex_readq, xA_addr, READ_QAX[67]); + primitive = _mux mREAD_QAX68 (READ_QA[68], tiex_readq, xA_addr, READ_QAX[68]); + primitive = _mux mREAD_QAX69 (READ_QA[69], tiex_readq, xA_addr, READ_QAX[69]); + primitive = _mux mREAD_QAX70 (READ_QA[70], tiex_readq, xA_addr, READ_QAX[70]); + primitive = _mux mREAD_QAX71 (READ_QA[71], tiex_readq, xA_addr, READ_QAX[71]); + primitive = _mux mREAD_QAX72 (READ_QA[72], tiex_readq, xA_addr, READ_QAX[72]); + primitive = _mux mREAD_QAX73 (READ_QA[73], tiex_readq, xA_addr, READ_QAX[73]); + primitive = _mux mREAD_QAX74 (READ_QA[74], tiex_readq, xA_addr, READ_QAX[74]); + primitive = _mux mREAD_QAX75 (READ_QA[75], tiex_readq, xA_addr, READ_QAX[75]); + primitive = _mux mREAD_QAX76 (READ_QA[76], tiex_readq, xA_addr, READ_QAX[76]); + primitive = _mux mREAD_QAX77 (READ_QA[77], tiex_readq, xA_addr, READ_QAX[77]); + primitive = _mux mREAD_QAX78 (READ_QA[78], tiex_readq, xA_addr, READ_QAX[78]); + primitive = _mux mREAD_QAX79 (READ_QA[79], tiex_readq, xA_addr, READ_QAX[79]); + primitive = _mux mREAD_QAX80 (READ_QA[80], tiex_readq, xA_addr, READ_QAX[80]); + primitive = _mux mREAD_QAX81 (READ_QA[81], tiex_readq, xA_addr, READ_QAX[81]); + primitive = _mux mREAD_QAX82 (READ_QA[82], tiex_readq, xA_addr, READ_QAX[82]); + primitive = _mux mREAD_QAX83 (READ_QA[83], tiex_readq, xA_addr, READ_QAX[83]); + primitive = _mux mREAD_QAX84 (READ_QA[84], tiex_readq, xA_addr, READ_QAX[84]); + primitive = _mux mREAD_QAX85 (READ_QA[85], tiex_readq, xA_addr, READ_QAX[85]); + primitive = _mux mREAD_QAX86 (READ_QA[86], tiex_readq, xA_addr, READ_QAX[86]); + primitive = _mux mREAD_QAX87 (READ_QA[87], tiex_readq, xA_addr, READ_QAX[87]); + primitive = _mux mREAD_QAX88 (READ_QA[88], tiex_readq, xA_addr, READ_QAX[88]); + primitive = _mux mREAD_QAX89 (READ_QA[89], tiex_readq, xA_addr, READ_QAX[89]); + primitive = _mux mREAD_QAX90 (READ_QA[90], tiex_readq, xA_addr, READ_QAX[90]); + primitive = _mux mREAD_QAX91 (READ_QA[91], tiex_readq, xA_addr, READ_QAX[91]); + primitive = _mux mREAD_QAX92 (READ_QA[92], tiex_readq, xA_addr, READ_QAX[92]); + primitive = _mux mREAD_QAX93 (READ_QA[93], tiex_readq, xA_addr, READ_QAX[93]); + primitive = _mux mREAD_QAX94 (READ_QA[94], tiex_readq, xA_addr, READ_QAX[94]); + primitive = _mux mREAD_QAX95 (READ_QA[95], tiex_readq, xA_addr, READ_QAX[95]); + primitive = _mux mREAD_QAX96 (READ_QA[96], tiex_readq, xA_addr, READ_QAX[96]); + primitive = _mux mREAD_QAX97 (READ_QA[97], tiex_readq, xA_addr, READ_QAX[97]); + primitive = _mux mREAD_QAX98 (READ_QA[98], tiex_readq, xA_addr, READ_QAX[98]); + primitive = _mux mREAD_QAX99 (READ_QA[99], tiex_readq, xA_addr, READ_QAX[99]); + primitive = _mux mREAD_QAX100 (READ_QA[100], tiex_readq, xA_addr, READ_QAX[100]); + primitive = _mux mREAD_QAX101 (READ_QA[101], tiex_readq, xA_addr, READ_QAX[101]); + primitive = _mux mREAD_QAX102 (READ_QA[102], tiex_readq, xA_addr, READ_QAX[102]); + primitive = _mux mREAD_QAX103 (READ_QA[103], tiex_readq, xA_addr, READ_QAX[103]); + primitive = _mux mREAD_QAX104 (READ_QA[104], tiex_readq, xA_addr, READ_QAX[104]); + primitive = _mux mREAD_QAX105 (READ_QA[105], tiex_readq, xA_addr, READ_QAX[105]); + primitive = _mux mREAD_QAX106 (READ_QA[106], tiex_readq, xA_addr, READ_QAX[106]); + primitive = _mux mREAD_QAX107 (READ_QA[107], tiex_readq, xA_addr, READ_QAX[107]); + primitive = _mux mREAD_QAX108 (READ_QA[108], tiex_readq, xA_addr, READ_QAX[108]); + primitive = _mux mREAD_QAX109 (READ_QA[109], tiex_readq, xA_addr, READ_QAX[109]); + primitive = _mux mREAD_QAX110 (READ_QA[110], tiex_readq, xA_addr, READ_QAX[110]); + primitive = _mux mREAD_QAX111 (READ_QA[111], tiex_readq, xA_addr, READ_QAX[111]); + primitive = _mux mREAD_QAX112 (READ_QA[112], tiex_readq, xA_addr, READ_QAX[112]); + primitive = _mux mREAD_QAX113 (READ_QA[113], tiex_readq, xA_addr, READ_QAX[113]); + primitive = _mux mREAD_QAX114 (READ_QA[114], tiex_readq, xA_addr, READ_QAX[114]); + primitive = _mux mREAD_QAX115 (READ_QA[115], tiex_readq, xA_addr, READ_QAX[115]); + primitive = _mux mREAD_QAX116 (READ_QA[116], tiex_readq, xA_addr, READ_QAX[116]); + primitive = _mux mREAD_QAX117 (READ_QA[117], tiex_readq, xA_addr, READ_QAX[117]); + primitive = _mux mREAD_QAX118 (READ_QA[118], tiex_readq, xA_addr, READ_QAX[118]); + primitive = _mux mREAD_QAX119 (READ_QA[119], tiex_readq, xA_addr, READ_QAX[119]); + primitive = _mux mREAD_QAX120 (READ_QA[120], tiex_readq, xA_addr, READ_QAX[120]); + primitive = _mux mREAD_QAX121 (READ_QA[121], tiex_readq, xA_addr, READ_QAX[121]); + primitive = _mux mREAD_QAX122 (READ_QA[122], tiex_readq, xA_addr, READ_QAX[122]); + primitive = _mux mREAD_QAX123 (READ_QA[123], tiex_readq, xA_addr, READ_QAX[123]); + primitive = _mux mREAD_QAX124 (READ_QA[124], tiex_readq, xA_addr, READ_QAX[124]); + primitive = _mux mREAD_QAX125 (READ_QA[125], tiex_readq, xA_addr, READ_QAX[125]); + primitive = _mux mREAD_QAX126 (READ_QA[126], tiex_readq, xA_addr, READ_QAX[126]); + primitive = _mux mREAD_QAX127 (READ_QA[127], tiex_readq, xA_addr, READ_QAX[127]); + ) + intern (DA_scan) (array = 127 : 0; + primitive = _mux mDA_scan0(READ_QAX[0], QA[1], DFTRAMBYP, DA_scan[0]); + primitive = _mux mDA_scan1(READ_QAX[1], QA[2], DFTRAMBYP, DA_scan[1]); + primitive = _mux mDA_scan2(READ_QAX[2], QA[3], DFTRAMBYP, DA_scan[2]); + primitive = _mux mDA_scan3(READ_QAX[3], QA[4], DFTRAMBYP, DA_scan[3]); + primitive = _mux mDA_scan4(READ_QAX[4], QA[5], DFTRAMBYP, DA_scan[4]); + primitive = _mux mDA_scan5(READ_QAX[5], QA[6], DFTRAMBYP, DA_scan[5]); + primitive = _mux mDA_scan6(READ_QAX[6], QA[7], DFTRAMBYP, DA_scan[6]); + primitive = _mux mDA_scan7(READ_QAX[7], QA[8], DFTRAMBYP, DA_scan[7]); + primitive = _mux mDA_scan8(READ_QAX[8], QA[9], DFTRAMBYP, DA_scan[8]); + primitive = _mux mDA_scan9(READ_QAX[9], QA[10], DFTRAMBYP, DA_scan[9]); + primitive = _mux mDA_scan10(READ_QAX[10], QA[11], DFTRAMBYP, DA_scan[10]); + primitive = _mux mDA_scan11(READ_QAX[11], QA[12], DFTRAMBYP, DA_scan[11]); + primitive = _mux mDA_scan12(READ_QAX[12], QA[13], DFTRAMBYP, DA_scan[12]); + primitive = _mux mDA_scan13(READ_QAX[13], QA[14], DFTRAMBYP, DA_scan[13]); + primitive = _mux mDA_scan14(READ_QAX[14], QA[15], DFTRAMBYP, DA_scan[14]); + primitive = _mux mDA_scan15(READ_QAX[15], QA[16], DFTRAMBYP, DA_scan[15]); + primitive = _mux mDA_scan16(READ_QAX[16], QA[17], DFTRAMBYP, DA_scan[16]); + primitive = _mux mDA_scan17(READ_QAX[17], QA[18], DFTRAMBYP, DA_scan[17]); + primitive = _mux mDA_scan18(READ_QAX[18], QA[19], DFTRAMBYP, DA_scan[18]); + primitive = _mux mDA_scan19(READ_QAX[19], QA[20], DFTRAMBYP, DA_scan[19]); + primitive = _mux mDA_scan20(READ_QAX[20], QA[21], DFTRAMBYP, DA_scan[20]); + primitive = _mux mDA_scan21(READ_QAX[21], QA[22], DFTRAMBYP, DA_scan[21]); + primitive = _mux mDA_scan22(READ_QAX[22], QA[23], DFTRAMBYP, DA_scan[22]); + primitive = _mux mDA_scan23(READ_QAX[23], QA[24], DFTRAMBYP, DA_scan[23]); + primitive = _mux mDA_scan24(READ_QAX[24], QA[25], DFTRAMBYP, DA_scan[24]); + primitive = _mux mDA_scan25(READ_QAX[25], QA[26], DFTRAMBYP, DA_scan[25]); + primitive = _mux mDA_scan26(READ_QAX[26], QA[27], DFTRAMBYP, DA_scan[26]); + primitive = _mux mDA_scan27(READ_QAX[27], QA[28], DFTRAMBYP, DA_scan[27]); + primitive = _mux mDA_scan28(READ_QAX[28], QA[29], DFTRAMBYP, DA_scan[28]); + primitive = _mux mDA_scan29(READ_QAX[29], QA[30], DFTRAMBYP, DA_scan[29]); + primitive = _mux mDA_scan30(READ_QAX[30], QA[31], DFTRAMBYP, DA_scan[30]); + primitive = _mux mDA_scan31(READ_QAX[31], QA[32], DFTRAMBYP, DA_scan[31]); + primitive = _mux mDA_scan32(READ_QAX[32], QA[33], DFTRAMBYP, DA_scan[32]); + primitive = _mux mDA_scan33(READ_QAX[33], QA[34], DFTRAMBYP, DA_scan[33]); + primitive = _mux mDA_scan34(READ_QAX[34], QA[35], DFTRAMBYP, DA_scan[34]); + primitive = _mux mDA_scan35(READ_QAX[35], QA[36], DFTRAMBYP, DA_scan[35]); + primitive = _mux mDA_scan36(READ_QAX[36], QA[37], DFTRAMBYP, DA_scan[36]); + primitive = _mux mDA_scan37(READ_QAX[37], QA[38], DFTRAMBYP, DA_scan[37]); + primitive = _mux mDA_scan38(READ_QAX[38], QA[39], DFTRAMBYP, DA_scan[38]); + primitive = _mux mDA_scan39(READ_QAX[39], QA[40], DFTRAMBYP, DA_scan[39]); + primitive = _mux mDA_scan40(READ_QAX[40], QA[41], DFTRAMBYP, DA_scan[40]); + primitive = _mux mDA_scan41(READ_QAX[41], QA[42], DFTRAMBYP, DA_scan[41]); + primitive = _mux mDA_scan42(READ_QAX[42], QA[43], DFTRAMBYP, DA_scan[42]); + primitive = _mux mDA_scan43(READ_QAX[43], QA[44], DFTRAMBYP, DA_scan[43]); + primitive = _mux mDA_scan44(READ_QAX[44], QA[45], DFTRAMBYP, DA_scan[44]); + primitive = _mux mDA_scan45(READ_QAX[45], QA[46], DFTRAMBYP, DA_scan[45]); + primitive = _mux mDA_scan46(READ_QAX[46], QA[47], DFTRAMBYP, DA_scan[46]); + primitive = _mux mDA_scan47(READ_QAX[47], QA[48], DFTRAMBYP, DA_scan[47]); + primitive = _mux mDA_scan48(READ_QAX[48], QA[49], DFTRAMBYP, DA_scan[48]); + primitive = _mux mDA_scan49(READ_QAX[49], QA[50], DFTRAMBYP, DA_scan[49]); + primitive = _mux mDA_scan50(READ_QAX[50], QA[51], DFTRAMBYP, DA_scan[50]); + primitive = _mux mDA_scan51(READ_QAX[51], QA[52], DFTRAMBYP, DA_scan[51]); + primitive = _mux mDA_scan52(READ_QAX[52], QA[53], DFTRAMBYP, DA_scan[52]); + primitive = _mux mDA_scan53(READ_QAX[53], QA[54], DFTRAMBYP, DA_scan[53]); + primitive = _mux mDA_scan54(READ_QAX[54], QA[55], DFTRAMBYP, DA_scan[54]); + primitive = _mux mDA_scan55(READ_QAX[55], QA[56], DFTRAMBYP, DA_scan[55]); + primitive = _mux mDA_scan56(READ_QAX[56], QA[57], DFTRAMBYP, DA_scan[56]); + primitive = _mux mDA_scan57(READ_QAX[57], QA[58], DFTRAMBYP, DA_scan[57]); + primitive = _mux mDA_scan58(READ_QAX[58], QA[59], DFTRAMBYP, DA_scan[58]); + primitive = _mux mDA_scan59(READ_QAX[59], QA[60], DFTRAMBYP, DA_scan[59]); + primitive = _mux mDA_scan60(READ_QAX[60], QA[61], DFTRAMBYP, DA_scan[60]); + primitive = _mux mDA_scan61(READ_QAX[61], QA[62], DFTRAMBYP, DA_scan[61]); + primitive = _mux mDA_scan62(READ_QAX[62], QA[63], DFTRAMBYP, DA_scan[62]); + primitive = _mux mDA_scan63(READ_QAX[63], mtie_sel0, DFTRAMBYP, DA_scan[63]); + primitive = _mux mDA_scan64(READ_QAX[64], mtie_sel0, DFTRAMBYP, DA_scan[64]); + primitive = _mux mDA_scan65(READ_QAX[65], QA[64], DFTRAMBYP, DA_scan[65]); + primitive = _mux mDA_scan66(READ_QAX[66], QA[65], DFTRAMBYP, DA_scan[66]); + primitive = _mux mDA_scan67(READ_QAX[67], QA[66], DFTRAMBYP, DA_scan[67]); + primitive = _mux mDA_scan68(READ_QAX[68], QA[67], DFTRAMBYP, DA_scan[68]); + primitive = _mux mDA_scan69(READ_QAX[69], QA[68], DFTRAMBYP, DA_scan[69]); + primitive = _mux mDA_scan70(READ_QAX[70], QA[69], DFTRAMBYP, DA_scan[70]); + primitive = _mux mDA_scan71(READ_QAX[71], QA[70], DFTRAMBYP, DA_scan[71]); + primitive = _mux mDA_scan72(READ_QAX[72], QA[71], DFTRAMBYP, DA_scan[72]); + primitive = _mux mDA_scan73(READ_QAX[73], QA[72], DFTRAMBYP, DA_scan[73]); + primitive = _mux mDA_scan74(READ_QAX[74], QA[73], DFTRAMBYP, DA_scan[74]); + primitive = _mux mDA_scan75(READ_QAX[75], QA[74], DFTRAMBYP, DA_scan[75]); + primitive = _mux mDA_scan76(READ_QAX[76], QA[75], DFTRAMBYP, DA_scan[76]); + primitive = _mux mDA_scan77(READ_QAX[77], QA[76], DFTRAMBYP, DA_scan[77]); + primitive = _mux mDA_scan78(READ_QAX[78], QA[77], DFTRAMBYP, DA_scan[78]); + primitive = _mux mDA_scan79(READ_QAX[79], QA[78], DFTRAMBYP, DA_scan[79]); + primitive = _mux mDA_scan80(READ_QAX[80], QA[79], DFTRAMBYP, DA_scan[80]); + primitive = _mux mDA_scan81(READ_QAX[81], QA[80], DFTRAMBYP, DA_scan[81]); + primitive = _mux mDA_scan82(READ_QAX[82], QA[81], DFTRAMBYP, DA_scan[82]); + primitive = _mux mDA_scan83(READ_QAX[83], QA[82], DFTRAMBYP, DA_scan[83]); + primitive = _mux mDA_scan84(READ_QAX[84], QA[83], DFTRAMBYP, DA_scan[84]); + primitive = _mux mDA_scan85(READ_QAX[85], QA[84], DFTRAMBYP, DA_scan[85]); + primitive = _mux mDA_scan86(READ_QAX[86], QA[85], DFTRAMBYP, DA_scan[86]); + primitive = _mux mDA_scan87(READ_QAX[87], QA[86], DFTRAMBYP, DA_scan[87]); + primitive = _mux mDA_scan88(READ_QAX[88], QA[87], DFTRAMBYP, DA_scan[88]); + primitive = _mux mDA_scan89(READ_QAX[89], QA[88], DFTRAMBYP, DA_scan[89]); + primitive = _mux mDA_scan90(READ_QAX[90], QA[89], DFTRAMBYP, DA_scan[90]); + primitive = _mux mDA_scan91(READ_QAX[91], QA[90], DFTRAMBYP, DA_scan[91]); + primitive = _mux mDA_scan92(READ_QAX[92], QA[91], DFTRAMBYP, DA_scan[92]); + primitive = _mux mDA_scan93(READ_QAX[93], QA[92], DFTRAMBYP, DA_scan[93]); + primitive = _mux mDA_scan94(READ_QAX[94], QA[93], DFTRAMBYP, DA_scan[94]); + primitive = _mux mDA_scan95(READ_QAX[95], QA[94], DFTRAMBYP, DA_scan[95]); + primitive = _mux mDA_scan96(READ_QAX[96], QA[95], DFTRAMBYP, DA_scan[96]); + primitive = _mux mDA_scan97(READ_QAX[97], QA[96], DFTRAMBYP, DA_scan[97]); + primitive = _mux mDA_scan98(READ_QAX[98], QA[97], DFTRAMBYP, DA_scan[98]); + primitive = _mux mDA_scan99(READ_QAX[99], QA[98], DFTRAMBYP, DA_scan[99]); + primitive = _mux mDA_scan100(READ_QAX[100], QA[99], DFTRAMBYP, DA_scan[100]); + primitive = _mux mDA_scan101(READ_QAX[101], QA[100], DFTRAMBYP, DA_scan[101]); + primitive = _mux mDA_scan102(READ_QAX[102], QA[101], DFTRAMBYP, DA_scan[102]); + primitive = _mux mDA_scan103(READ_QAX[103], QA[102], DFTRAMBYP, DA_scan[103]); + primitive = _mux mDA_scan104(READ_QAX[104], QA[103], DFTRAMBYP, DA_scan[104]); + primitive = _mux mDA_scan105(READ_QAX[105], QA[104], DFTRAMBYP, DA_scan[105]); + primitive = _mux mDA_scan106(READ_QAX[106], QA[105], DFTRAMBYP, DA_scan[106]); + primitive = _mux mDA_scan107(READ_QAX[107], QA[106], DFTRAMBYP, DA_scan[107]); + primitive = _mux mDA_scan108(READ_QAX[108], QA[107], DFTRAMBYP, DA_scan[108]); + primitive = _mux mDA_scan109(READ_QAX[109], QA[108], DFTRAMBYP, DA_scan[109]); + primitive = _mux mDA_scan110(READ_QAX[110], QA[109], DFTRAMBYP, DA_scan[110]); + primitive = _mux mDA_scan111(READ_QAX[111], QA[110], DFTRAMBYP, DA_scan[111]); + primitive = _mux mDA_scan112(READ_QAX[112], QA[111], DFTRAMBYP, DA_scan[112]); + primitive = _mux mDA_scan113(READ_QAX[113], QA[112], DFTRAMBYP, DA_scan[113]); + primitive = _mux mDA_scan114(READ_QAX[114], QA[113], DFTRAMBYP, DA_scan[114]); + primitive = _mux mDA_scan115(READ_QAX[115], QA[114], DFTRAMBYP, DA_scan[115]); + primitive = _mux mDA_scan116(READ_QAX[116], QA[115], DFTRAMBYP, DA_scan[116]); + primitive = _mux mDA_scan117(READ_QAX[117], QA[116], DFTRAMBYP, DA_scan[117]); + primitive = _mux mDA_scan118(READ_QAX[118], QA[117], DFTRAMBYP, DA_scan[118]); + primitive = _mux mDA_scan119(READ_QAX[119], QA[118], DFTRAMBYP, DA_scan[119]); + primitive = _mux mDA_scan120(READ_QAX[120], QA[119], DFTRAMBYP, DA_scan[120]); + primitive = _mux mDA_scan121(READ_QAX[121], QA[120], DFTRAMBYP, DA_scan[121]); + primitive = _mux mDA_scan122(READ_QAX[122], QA[121], DFTRAMBYP, DA_scan[122]); + primitive = _mux mDA_scan123(READ_QAX[123], QA[122], DFTRAMBYP, DA_scan[123]); + primitive = _mux mDA_scan124(READ_QAX[124], QA[123], DFTRAMBYP, DA_scan[124]); + primitive = _mux mDA_scan125(READ_QAX[125], QA[124], DFTRAMBYP, DA_scan[125]); + primitive = _mux mDA_scan126(READ_QAX[126], QA[125], DFTRAMBYP, DA_scan[126]); + primitive = _mux mDA_scan127(READ_QAX[127], QA[126], DFTRAMBYP, DA_scan[127]); + ) + output (QA) ( array = 127 : 0; + instance = rf2_32x128_wm1_scanflop uDQA0 (.CLK(CLKA), .SE(SEA), .SI(QA[1]), .D(DA_scan[0]), .Q(QA[0]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA1 (.CLK(CLKA), .SE(SEA), .SI(QA[2]), .D(DA_scan[1]), .Q(QA[1]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA2 (.CLK(CLKA), .SE(SEA), .SI(QA[3]), .D(DA_scan[2]), .Q(QA[2]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA3 (.CLK(CLKA), .SE(SEA), .SI(QA[4]), .D(DA_scan[3]), .Q(QA[3]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA4 (.CLK(CLKA), .SE(SEA), .SI(QA[5]), .D(DA_scan[4]), .Q(QA[4]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA5 (.CLK(CLKA), .SE(SEA), .SI(QA[6]), .D(DA_scan[5]), .Q(QA[5]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA6 (.CLK(CLKA), .SE(SEA), .SI(QA[7]), .D(DA_scan[6]), .Q(QA[6]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA7 (.CLK(CLKA), .SE(SEA), .SI(QA[8]), .D(DA_scan[7]), .Q(QA[7]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA8 (.CLK(CLKA), .SE(SEA), .SI(QA[9]), .D(DA_scan[8]), .Q(QA[8]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA9 (.CLK(CLKA), .SE(SEA), .SI(QA[10]), .D(DA_scan[9]), .Q(QA[9]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA10 (.CLK(CLKA), .SE(SEA), .SI(QA[11]), .D(DA_scan[10]), .Q(QA[10]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA11 (.CLK(CLKA), .SE(SEA), .SI(QA[12]), .D(DA_scan[11]), .Q(QA[11]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA12 (.CLK(CLKA), .SE(SEA), .SI(QA[13]), .D(DA_scan[12]), .Q(QA[12]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA13 (.CLK(CLKA), .SE(SEA), .SI(QA[14]), .D(DA_scan[13]), .Q(QA[13]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA14 (.CLK(CLKA), .SE(SEA), .SI(QA[15]), .D(DA_scan[14]), .Q(QA[14]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA15 (.CLK(CLKA), .SE(SEA), .SI(QA[16]), .D(DA_scan[15]), .Q(QA[15]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA16 (.CLK(CLKA), .SE(SEA), .SI(QA[17]), .D(DA_scan[16]), .Q(QA[16]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA17 (.CLK(CLKA), .SE(SEA), .SI(QA[18]), .D(DA_scan[17]), .Q(QA[17]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA18 (.CLK(CLKA), .SE(SEA), .SI(QA[19]), .D(DA_scan[18]), .Q(QA[18]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA19 (.CLK(CLKA), .SE(SEA), .SI(QA[20]), .D(DA_scan[19]), .Q(QA[19]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA20 (.CLK(CLKA), .SE(SEA), .SI(QA[21]), .D(DA_scan[20]), .Q(QA[20]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA21 (.CLK(CLKA), .SE(SEA), .SI(QA[22]), .D(DA_scan[21]), .Q(QA[21]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA22 (.CLK(CLKA), .SE(SEA), .SI(QA[23]), .D(DA_scan[22]), .Q(QA[22]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA23 (.CLK(CLKA), .SE(SEA), .SI(QA[24]), .D(DA_scan[23]), .Q(QA[23]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA24 (.CLK(CLKA), .SE(SEA), .SI(QA[25]), .D(DA_scan[24]), .Q(QA[24]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA25 (.CLK(CLKA), .SE(SEA), .SI(QA[26]), .D(DA_scan[25]), .Q(QA[25]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA26 (.CLK(CLKA), .SE(SEA), .SI(QA[27]), .D(DA_scan[26]), .Q(QA[26]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA27 (.CLK(CLKA), .SE(SEA), .SI(QA[28]), .D(DA_scan[27]), .Q(QA[27]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA28 (.CLK(CLKA), .SE(SEA), .SI(QA[29]), .D(DA_scan[28]), .Q(QA[28]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA29 (.CLK(CLKA), .SE(SEA), .SI(QA[30]), .D(DA_scan[29]), .Q(QA[29]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA30 (.CLK(CLKA), .SE(SEA), .SI(QA[31]), .D(DA_scan[30]), .Q(QA[30]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA31 (.CLK(CLKA), .SE(SEA), .SI(QA[32]), .D(DA_scan[31]), .Q(QA[31]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA32 (.CLK(CLKA), .SE(SEA), .SI(QA[33]), .D(DA_scan[32]), .Q(QA[32]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA33 (.CLK(CLKA), .SE(SEA), .SI(QA[34]), .D(DA_scan[33]), .Q(QA[33]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA34 (.CLK(CLKA), .SE(SEA), .SI(QA[35]), .D(DA_scan[34]), .Q(QA[34]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA35 (.CLK(CLKA), .SE(SEA), .SI(QA[36]), .D(DA_scan[35]), .Q(QA[35]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA36 (.CLK(CLKA), .SE(SEA), .SI(QA[37]), .D(DA_scan[36]), .Q(QA[36]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA37 (.CLK(CLKA), .SE(SEA), .SI(QA[38]), .D(DA_scan[37]), .Q(QA[37]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA38 (.CLK(CLKA), .SE(SEA), .SI(QA[39]), .D(DA_scan[38]), .Q(QA[38]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA39 (.CLK(CLKA), .SE(SEA), .SI(QA[40]), .D(DA_scan[39]), .Q(QA[39]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA40 (.CLK(CLKA), .SE(SEA), .SI(QA[41]), .D(DA_scan[40]), .Q(QA[40]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA41 (.CLK(CLKA), .SE(SEA), .SI(QA[42]), .D(DA_scan[41]), .Q(QA[41]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA42 (.CLK(CLKA), .SE(SEA), .SI(QA[43]), .D(DA_scan[42]), .Q(QA[42]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA43 (.CLK(CLKA), .SE(SEA), .SI(QA[44]), .D(DA_scan[43]), .Q(QA[43]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA44 (.CLK(CLKA), .SE(SEA), .SI(QA[45]), .D(DA_scan[44]), .Q(QA[44]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA45 (.CLK(CLKA), .SE(SEA), .SI(QA[46]), .D(DA_scan[45]), .Q(QA[45]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA46 (.CLK(CLKA), .SE(SEA), .SI(QA[47]), .D(DA_scan[46]), .Q(QA[46]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA47 (.CLK(CLKA), .SE(SEA), .SI(QA[48]), .D(DA_scan[47]), .Q(QA[47]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA48 (.CLK(CLKA), .SE(SEA), .SI(QA[49]), .D(DA_scan[48]), .Q(QA[48]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA49 (.CLK(CLKA), .SE(SEA), .SI(QA[50]), .D(DA_scan[49]), .Q(QA[49]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA50 (.CLK(CLKA), .SE(SEA), .SI(QA[51]), .D(DA_scan[50]), .Q(QA[50]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA51 (.CLK(CLKA), .SE(SEA), .SI(QA[52]), .D(DA_scan[51]), .Q(QA[51]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA52 (.CLK(CLKA), .SE(SEA), .SI(QA[53]), .D(DA_scan[52]), .Q(QA[52]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA53 (.CLK(CLKA), .SE(SEA), .SI(QA[54]), .D(DA_scan[53]), .Q(QA[53]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA54 (.CLK(CLKA), .SE(SEA), .SI(QA[55]), .D(DA_scan[54]), .Q(QA[54]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA55 (.CLK(CLKA), .SE(SEA), .SI(QA[56]), .D(DA_scan[55]), .Q(QA[55]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA56 (.CLK(CLKA), .SE(SEA), .SI(QA[57]), .D(DA_scan[56]), .Q(QA[56]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA57 (.CLK(CLKA), .SE(SEA), .SI(QA[58]), .D(DA_scan[57]), .Q(QA[57]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA58 (.CLK(CLKA), .SE(SEA), .SI(QA[59]), .D(DA_scan[58]), .Q(QA[58]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA59 (.CLK(CLKA), .SE(SEA), .SI(QA[60]), .D(DA_scan[59]), .Q(QA[59]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA60 (.CLK(CLKA), .SE(SEA), .SI(QA[61]), .D(DA_scan[60]), .Q(QA[60]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA61 (.CLK(CLKA), .SE(SEA), .SI(QA[62]), .D(DA_scan[61]), .Q(QA[61]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA62 (.CLK(CLKA), .SE(SEA), .SI(QA[63]), .D(DA_scan[62]), .Q(QA[62]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA63 (.CLK(CLKA), .SE(SEA), .SI(BUS_SIA[0]), .D(DA_scan[63]), .Q(QA[63]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA64 (.CLK(CLKA), .SE(SEA), .SI(BUS_SIA[1]), .D(DA_scan[64]), .Q(QA[64]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA65 (.CLK(CLKA), .SE(SEA), .SI(QA[64]), .D(DA_scan[65]), .Q(QA[65]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA66 (.CLK(CLKA), .SE(SEA), .SI(QA[65]), .D(DA_scan[66]), .Q(QA[66]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA67 (.CLK(CLKA), .SE(SEA), .SI(QA[66]), .D(DA_scan[67]), .Q(QA[67]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA68 (.CLK(CLKA), .SE(SEA), .SI(QA[67]), .D(DA_scan[68]), .Q(QA[68]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA69 (.CLK(CLKA), .SE(SEA), .SI(QA[68]), .D(DA_scan[69]), .Q(QA[69]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA70 (.CLK(CLKA), .SE(SEA), .SI(QA[69]), .D(DA_scan[70]), .Q(QA[70]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA71 (.CLK(CLKA), .SE(SEA), .SI(QA[70]), .D(DA_scan[71]), .Q(QA[71]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA72 (.CLK(CLKA), .SE(SEA), .SI(QA[71]), .D(DA_scan[72]), .Q(QA[72]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA73 (.CLK(CLKA), .SE(SEA), .SI(QA[72]), .D(DA_scan[73]), .Q(QA[73]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA74 (.CLK(CLKA), .SE(SEA), .SI(QA[73]), .D(DA_scan[74]), .Q(QA[74]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA75 (.CLK(CLKA), .SE(SEA), .SI(QA[74]), .D(DA_scan[75]), .Q(QA[75]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA76 (.CLK(CLKA), .SE(SEA), .SI(QA[75]), .D(DA_scan[76]), .Q(QA[76]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA77 (.CLK(CLKA), .SE(SEA), .SI(QA[76]), .D(DA_scan[77]), .Q(QA[77]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA78 (.CLK(CLKA), .SE(SEA), .SI(QA[77]), .D(DA_scan[78]), .Q(QA[78]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA79 (.CLK(CLKA), .SE(SEA), .SI(QA[78]), .D(DA_scan[79]), .Q(QA[79]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA80 (.CLK(CLKA), .SE(SEA), .SI(QA[79]), .D(DA_scan[80]), .Q(QA[80]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA81 (.CLK(CLKA), .SE(SEA), .SI(QA[80]), .D(DA_scan[81]), .Q(QA[81]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA82 (.CLK(CLKA), .SE(SEA), .SI(QA[81]), .D(DA_scan[82]), .Q(QA[82]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA83 (.CLK(CLKA), .SE(SEA), .SI(QA[82]), .D(DA_scan[83]), .Q(QA[83]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA84 (.CLK(CLKA), .SE(SEA), .SI(QA[83]), .D(DA_scan[84]), .Q(QA[84]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA85 (.CLK(CLKA), .SE(SEA), .SI(QA[84]), .D(DA_scan[85]), .Q(QA[85]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA86 (.CLK(CLKA), .SE(SEA), .SI(QA[85]), .D(DA_scan[86]), .Q(QA[86]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA87 (.CLK(CLKA), .SE(SEA), .SI(QA[86]), .D(DA_scan[87]), .Q(QA[87]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA88 (.CLK(CLKA), .SE(SEA), .SI(QA[87]), .D(DA_scan[88]), .Q(QA[88]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA89 (.CLK(CLKA), .SE(SEA), .SI(QA[88]), .D(DA_scan[89]), .Q(QA[89]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA90 (.CLK(CLKA), .SE(SEA), .SI(QA[89]), .D(DA_scan[90]), .Q(QA[90]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA91 (.CLK(CLKA), .SE(SEA), .SI(QA[90]), .D(DA_scan[91]), .Q(QA[91]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA92 (.CLK(CLKA), .SE(SEA), .SI(QA[91]), .D(DA_scan[92]), .Q(QA[92]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA93 (.CLK(CLKA), .SE(SEA), .SI(QA[92]), .D(DA_scan[93]), .Q(QA[93]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA94 (.CLK(CLKA), .SE(SEA), .SI(QA[93]), .D(DA_scan[94]), .Q(QA[94]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA95 (.CLK(CLKA), .SE(SEA), .SI(QA[94]), .D(DA_scan[95]), .Q(QA[95]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA96 (.CLK(CLKA), .SE(SEA), .SI(QA[95]), .D(DA_scan[96]), .Q(QA[96]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA97 (.CLK(CLKA), .SE(SEA), .SI(QA[96]), .D(DA_scan[97]), .Q(QA[97]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA98 (.CLK(CLKA), .SE(SEA), .SI(QA[97]), .D(DA_scan[98]), .Q(QA[98]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA99 (.CLK(CLKA), .SE(SEA), .SI(QA[98]), .D(DA_scan[99]), .Q(QA[99]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA100 (.CLK(CLKA), .SE(SEA), .SI(QA[99]), .D(DA_scan[100]), .Q(QA[100]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA101 (.CLK(CLKA), .SE(SEA), .SI(QA[100]), .D(DA_scan[101]), .Q(QA[101]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA102 (.CLK(CLKA), .SE(SEA), .SI(QA[101]), .D(DA_scan[102]), .Q(QA[102]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA103 (.CLK(CLKA), .SE(SEA), .SI(QA[102]), .D(DA_scan[103]), .Q(QA[103]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA104 (.CLK(CLKA), .SE(SEA), .SI(QA[103]), .D(DA_scan[104]), .Q(QA[104]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA105 (.CLK(CLKA), .SE(SEA), .SI(QA[104]), .D(DA_scan[105]), .Q(QA[105]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA106 (.CLK(CLKA), .SE(SEA), .SI(QA[105]), .D(DA_scan[106]), .Q(QA[106]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA107 (.CLK(CLKA), .SE(SEA), .SI(QA[106]), .D(DA_scan[107]), .Q(QA[107]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA108 (.CLK(CLKA), .SE(SEA), .SI(QA[107]), .D(DA_scan[108]), .Q(QA[108]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA109 (.CLK(CLKA), .SE(SEA), .SI(QA[108]), .D(DA_scan[109]), .Q(QA[109]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA110 (.CLK(CLKA), .SE(SEA), .SI(QA[109]), .D(DA_scan[110]), .Q(QA[110]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA111 (.CLK(CLKA), .SE(SEA), .SI(QA[110]), .D(DA_scan[111]), .Q(QA[111]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA112 (.CLK(CLKA), .SE(SEA), .SI(QA[111]), .D(DA_scan[112]), .Q(QA[112]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA113 (.CLK(CLKA), .SE(SEA), .SI(QA[112]), .D(DA_scan[113]), .Q(QA[113]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA114 (.CLK(CLKA), .SE(SEA), .SI(QA[113]), .D(DA_scan[114]), .Q(QA[114]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA115 (.CLK(CLKA), .SE(SEA), .SI(QA[114]), .D(DA_scan[115]), .Q(QA[115]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA116 (.CLK(CLKA), .SE(SEA), .SI(QA[115]), .D(DA_scan[116]), .Q(QA[116]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA117 (.CLK(CLKA), .SE(SEA), .SI(QA[116]), .D(DA_scan[117]), .Q(QA[117]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA118 (.CLK(CLKA), .SE(SEA), .SI(QA[117]), .D(DA_scan[118]), .Q(QA[118]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA119 (.CLK(CLKA), .SE(SEA), .SI(QA[118]), .D(DA_scan[119]), .Q(QA[119]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA120 (.CLK(CLKA), .SE(SEA), .SI(QA[119]), .D(DA_scan[120]), .Q(QA[120]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA121 (.CLK(CLKA), .SE(SEA), .SI(QA[120]), .D(DA_scan[121]), .Q(QA[121]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA122 (.CLK(CLKA), .SE(SEA), .SI(QA[121]), .D(DA_scan[122]), .Q(QA[122]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA123 (.CLK(CLKA), .SE(SEA), .SI(QA[122]), .D(DA_scan[123]), .Q(QA[123]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA124 (.CLK(CLKA), .SE(SEA), .SI(QA[123]), .D(DA_scan[124]), .Q(QA[124]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA125 (.CLK(CLKA), .SE(SEA), .SI(QA[124]), .D(DA_scan[125]), .Q(QA[125]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA126 (.CLK(CLKA), .SE(SEA), .SI(QA[125]), .D(DA_scan[126]), .Q(QA[126]), .Xout(XoutAiff)); + instance = rf2_32x128_wm1_scanflop uDQA127 (.CLK(CLKA), .SE(SEA), .SI(QA[126]), .D(DA_scan[127]), .Q(QA[127]), .Xout(XoutAiff)); + ) + output (SOA) ( array = 1 : 0; + primitive = _buf bSOA0 ( QA[0], SOA[0] ); + primitive = _buf bSOA1 ( QA[127], SOA[1] ); + ) + intern (BUS_SIB) (array = 1 : 0; + primitive = _buf wbSIB0 (SIB[0], BUS_SIB[0]); + primitive = _buf wbSIB1 (SIB[1], BUS_SIB[1]); + ) + intern (BUS_AB) (array = 4 : 0; + primitive = _buf bBUS_AB0 ( AB[0], BUS_AB[0]); + primitive = _buf bBUS_AB1 ( AB[1], BUS_AB[1]); + primitive = _buf bBUS_AB2 ( AB[2], BUS_AB[2]); + primitive = _buf bBUS_AB3 ( AB[3], BUS_AB[3]); + primitive = _buf bBUS_AB4 ( AB[4], BUS_AB[4]); + ) + intern (BUS_DB) (array = 127 : 0; + primitive = _buf bBUS_DB0( DB[0], BUS_DB[0] ); + primitive = _buf bBUS_DB1( DB[1], BUS_DB[1] ); + primitive = _buf bBUS_DB2( DB[2], BUS_DB[2] ); + primitive = _buf bBUS_DB3( DB[3], BUS_DB[3] ); + primitive = _buf bBUS_DB4( DB[4], BUS_DB[4] ); + primitive = _buf bBUS_DB5( DB[5], BUS_DB[5] ); + primitive = _buf bBUS_DB6( DB[6], BUS_DB[6] ); + primitive = _buf bBUS_DB7( DB[7], BUS_DB[7] ); + primitive = _buf bBUS_DB8( DB[8], BUS_DB[8] ); + primitive = _buf bBUS_DB9( DB[9], BUS_DB[9] ); + primitive = _buf bBUS_DB10( DB[10], BUS_DB[10] ); + primitive = _buf bBUS_DB11( DB[11], BUS_DB[11] ); + primitive = _buf bBUS_DB12( DB[12], BUS_DB[12] ); + primitive = _buf bBUS_DB13( DB[13], BUS_DB[13] ); + primitive = _buf bBUS_DB14( DB[14], BUS_DB[14] ); + primitive = _buf bBUS_DB15( DB[15], BUS_DB[15] ); + primitive = _buf bBUS_DB16( DB[16], BUS_DB[16] ); + primitive = _buf bBUS_DB17( DB[17], BUS_DB[17] ); + primitive = _buf bBUS_DB18( DB[18], BUS_DB[18] ); + primitive = _buf bBUS_DB19( DB[19], BUS_DB[19] ); + primitive = _buf bBUS_DB20( DB[20], BUS_DB[20] ); + primitive = _buf bBUS_DB21( DB[21], BUS_DB[21] ); + primitive = _buf bBUS_DB22( DB[22], BUS_DB[22] ); + primitive = _buf bBUS_DB23( DB[23], BUS_DB[23] ); + primitive = _buf bBUS_DB24( DB[24], BUS_DB[24] ); + primitive = _buf bBUS_DB25( DB[25], BUS_DB[25] ); + primitive = _buf bBUS_DB26( DB[26], BUS_DB[26] ); + primitive = _buf bBUS_DB27( DB[27], BUS_DB[27] ); + primitive = _buf bBUS_DB28( DB[28], BUS_DB[28] ); + primitive = _buf bBUS_DB29( DB[29], BUS_DB[29] ); + primitive = _buf bBUS_DB30( DB[30], BUS_DB[30] ); + primitive = _buf bBUS_DB31( DB[31], BUS_DB[31] ); + primitive = _buf bBUS_DB32( DB[32], BUS_DB[32] ); + primitive = _buf bBUS_DB33( DB[33], BUS_DB[33] ); + primitive = _buf bBUS_DB34( DB[34], BUS_DB[34] ); + primitive = _buf bBUS_DB35( DB[35], BUS_DB[35] ); + primitive = _buf bBUS_DB36( DB[36], BUS_DB[36] ); + primitive = _buf bBUS_DB37( DB[37], BUS_DB[37] ); + primitive = _buf bBUS_DB38( DB[38], BUS_DB[38] ); + primitive = _buf bBUS_DB39( DB[39], BUS_DB[39] ); + primitive = _buf bBUS_DB40( DB[40], BUS_DB[40] ); + primitive = _buf bBUS_DB41( DB[41], BUS_DB[41] ); + primitive = _buf bBUS_DB42( DB[42], BUS_DB[42] ); + primitive = _buf bBUS_DB43( DB[43], BUS_DB[43] ); + primitive = _buf bBUS_DB44( DB[44], BUS_DB[44] ); + primitive = _buf bBUS_DB45( DB[45], BUS_DB[45] ); + primitive = _buf bBUS_DB46( DB[46], BUS_DB[46] ); + primitive = _buf bBUS_DB47( DB[47], BUS_DB[47] ); + primitive = _buf bBUS_DB48( DB[48], BUS_DB[48] ); + primitive = _buf bBUS_DB49( DB[49], BUS_DB[49] ); + primitive = _buf bBUS_DB50( DB[50], BUS_DB[50] ); + primitive = _buf bBUS_DB51( DB[51], BUS_DB[51] ); + primitive = _buf bBUS_DB52( DB[52], BUS_DB[52] ); + primitive = _buf bBUS_DB53( DB[53], BUS_DB[53] ); + primitive = _buf bBUS_DB54( DB[54], BUS_DB[54] ); + primitive = _buf bBUS_DB55( DB[55], BUS_DB[55] ); + primitive = _buf bBUS_DB56( DB[56], BUS_DB[56] ); + primitive = _buf bBUS_DB57( DB[57], BUS_DB[57] ); + primitive = _buf bBUS_DB58( DB[58], BUS_DB[58] ); + primitive = _buf bBUS_DB59( DB[59], BUS_DB[59] ); + primitive = _buf bBUS_DB60( DB[60], BUS_DB[60] ); + primitive = _buf bBUS_DB61( DB[61], BUS_DB[61] ); + primitive = _buf bBUS_DB62( DB[62], BUS_DB[62] ); + primitive = _buf bBUS_DB63( DB[63], BUS_DB[63] ); + primitive = _buf bBUS_DB64( DB[64], BUS_DB[64] ); + primitive = _buf bBUS_DB65( DB[65], BUS_DB[65] ); + primitive = _buf bBUS_DB66( DB[66], BUS_DB[66] ); + primitive = _buf bBUS_DB67( DB[67], BUS_DB[67] ); + primitive = _buf bBUS_DB68( DB[68], BUS_DB[68] ); + primitive = _buf bBUS_DB69( DB[69], BUS_DB[69] ); + primitive = _buf bBUS_DB70( DB[70], BUS_DB[70] ); + primitive = _buf bBUS_DB71( DB[71], BUS_DB[71] ); + primitive = _buf bBUS_DB72( DB[72], BUS_DB[72] ); + primitive = _buf bBUS_DB73( DB[73], BUS_DB[73] ); + primitive = _buf bBUS_DB74( DB[74], BUS_DB[74] ); + primitive = _buf bBUS_DB75( DB[75], BUS_DB[75] ); + primitive = _buf bBUS_DB76( DB[76], BUS_DB[76] ); + primitive = _buf bBUS_DB77( DB[77], BUS_DB[77] ); + primitive = _buf bBUS_DB78( DB[78], BUS_DB[78] ); + primitive = _buf bBUS_DB79( DB[79], BUS_DB[79] ); + primitive = _buf bBUS_DB80( DB[80], BUS_DB[80] ); + primitive = _buf bBUS_DB81( DB[81], BUS_DB[81] ); + primitive = _buf bBUS_DB82( DB[82], BUS_DB[82] ); + primitive = _buf bBUS_DB83( DB[83], BUS_DB[83] ); + primitive = _buf bBUS_DB84( DB[84], BUS_DB[84] ); + primitive = _buf bBUS_DB85( DB[85], BUS_DB[85] ); + primitive = _buf bBUS_DB86( DB[86], BUS_DB[86] ); + primitive = _buf bBUS_DB87( DB[87], BUS_DB[87] ); + primitive = _buf bBUS_DB88( DB[88], BUS_DB[88] ); + primitive = _buf bBUS_DB89( DB[89], BUS_DB[89] ); + primitive = _buf bBUS_DB90( DB[90], BUS_DB[90] ); + primitive = _buf bBUS_DB91( DB[91], BUS_DB[91] ); + primitive = _buf bBUS_DB92( DB[92], BUS_DB[92] ); + primitive = _buf bBUS_DB93( DB[93], BUS_DB[93] ); + primitive = _buf bBUS_DB94( DB[94], BUS_DB[94] ); + primitive = _buf bBUS_DB95( DB[95], BUS_DB[95] ); + primitive = _buf bBUS_DB96( DB[96], BUS_DB[96] ); + primitive = _buf bBUS_DB97( DB[97], BUS_DB[97] ); + primitive = _buf bBUS_DB98( DB[98], BUS_DB[98] ); + primitive = _buf bBUS_DB99( DB[99], BUS_DB[99] ); + primitive = _buf bBUS_DB100( DB[100], BUS_DB[100] ); + primitive = _buf bBUS_DB101( DB[101], BUS_DB[101] ); + primitive = _buf bBUS_DB102( DB[102], BUS_DB[102] ); + primitive = _buf bBUS_DB103( DB[103], BUS_DB[103] ); + primitive = _buf bBUS_DB104( DB[104], BUS_DB[104] ); + primitive = _buf bBUS_DB105( DB[105], BUS_DB[105] ); + primitive = _buf bBUS_DB106( DB[106], BUS_DB[106] ); + primitive = _buf bBUS_DB107( DB[107], BUS_DB[107] ); + primitive = _buf bBUS_DB108( DB[108], BUS_DB[108] ); + primitive = _buf bBUS_DB109( DB[109], BUS_DB[109] ); + primitive = _buf bBUS_DB110( DB[110], BUS_DB[110] ); + primitive = _buf bBUS_DB111( DB[111], BUS_DB[111] ); + primitive = _buf bBUS_DB112( DB[112], BUS_DB[112] ); + primitive = _buf bBUS_DB113( DB[113], BUS_DB[113] ); + primitive = _buf bBUS_DB114( DB[114], BUS_DB[114] ); + primitive = _buf bBUS_DB115( DB[115], BUS_DB[115] ); + primitive = _buf bBUS_DB116( DB[116], BUS_DB[116] ); + primitive = _buf bBUS_DB117( DB[117], BUS_DB[117] ); + primitive = _buf bBUS_DB118( DB[118], BUS_DB[118] ); + primitive = _buf bBUS_DB119( DB[119], BUS_DB[119] ); + primitive = _buf bBUS_DB120( DB[120], BUS_DB[120] ); + primitive = _buf bBUS_DB121( DB[121], BUS_DB[121] ); + primitive = _buf bBUS_DB122( DB[122], BUS_DB[122] ); + primitive = _buf bBUS_DB123( DB[123], BUS_DB[123] ); + primitive = _buf bBUS_DB124( DB[124], BUS_DB[124] ); + primitive = _buf bBUS_DB125( DB[125], BUS_DB[125] ); + primitive = _buf bBUS_DB126( DB[126], BUS_DB[126] ); + primitive = _buf bBUS_DB127( DB[127], BUS_DB[127] ); + ) + intern (BUS_WENB) (array = 127 : 0; + primitive = _buf bBUS_WENB0( WENB[0], BUS_WENB[0] ); + primitive = _buf bBUS_WENB1( WENB[1], BUS_WENB[1] ); + primitive = _buf bBUS_WENB2( WENB[2], BUS_WENB[2] ); + primitive = _buf bBUS_WENB3( WENB[3], BUS_WENB[3] ); + primitive = _buf bBUS_WENB4( WENB[4], BUS_WENB[4] ); + primitive = _buf bBUS_WENB5( WENB[5], BUS_WENB[5] ); + primitive = _buf bBUS_WENB6( WENB[6], BUS_WENB[6] ); + primitive = _buf bBUS_WENB7( WENB[7], BUS_WENB[7] ); + primitive = _buf bBUS_WENB8( WENB[8], BUS_WENB[8] ); + primitive = _buf bBUS_WENB9( WENB[9], BUS_WENB[9] ); + primitive = _buf bBUS_WENB10( WENB[10], BUS_WENB[10] ); + primitive = _buf bBUS_WENB11( WENB[11], BUS_WENB[11] ); + primitive = _buf bBUS_WENB12( WENB[12], BUS_WENB[12] ); + primitive = _buf bBUS_WENB13( WENB[13], BUS_WENB[13] ); + primitive = _buf bBUS_WENB14( WENB[14], BUS_WENB[14] ); + primitive = _buf bBUS_WENB15( WENB[15], BUS_WENB[15] ); + primitive = _buf bBUS_WENB16( WENB[16], BUS_WENB[16] ); + primitive = _buf bBUS_WENB17( WENB[17], BUS_WENB[17] ); + primitive = _buf bBUS_WENB18( WENB[18], BUS_WENB[18] ); + primitive = _buf bBUS_WENB19( WENB[19], BUS_WENB[19] ); + primitive = _buf bBUS_WENB20( WENB[20], BUS_WENB[20] ); + primitive = _buf bBUS_WENB21( WENB[21], BUS_WENB[21] ); + primitive = _buf bBUS_WENB22( WENB[22], BUS_WENB[22] ); + primitive = _buf bBUS_WENB23( WENB[23], BUS_WENB[23] ); + primitive = _buf bBUS_WENB24( WENB[24], BUS_WENB[24] ); + primitive = _buf bBUS_WENB25( WENB[25], BUS_WENB[25] ); + primitive = _buf bBUS_WENB26( WENB[26], BUS_WENB[26] ); + primitive = _buf bBUS_WENB27( WENB[27], BUS_WENB[27] ); + primitive = _buf bBUS_WENB28( WENB[28], BUS_WENB[28] ); + primitive = _buf bBUS_WENB29( WENB[29], BUS_WENB[29] ); + primitive = _buf bBUS_WENB30( WENB[30], BUS_WENB[30] ); + primitive = _buf bBUS_WENB31( WENB[31], BUS_WENB[31] ); + primitive = _buf bBUS_WENB32( WENB[32], BUS_WENB[32] ); + primitive = _buf bBUS_WENB33( WENB[33], BUS_WENB[33] ); + primitive = _buf bBUS_WENB34( WENB[34], BUS_WENB[34] ); + primitive = _buf bBUS_WENB35( WENB[35], BUS_WENB[35] ); + primitive = _buf bBUS_WENB36( WENB[36], BUS_WENB[36] ); + primitive = _buf bBUS_WENB37( WENB[37], BUS_WENB[37] ); + primitive = _buf bBUS_WENB38( WENB[38], BUS_WENB[38] ); + primitive = _buf bBUS_WENB39( WENB[39], BUS_WENB[39] ); + primitive = _buf bBUS_WENB40( WENB[40], BUS_WENB[40] ); + primitive = _buf bBUS_WENB41( WENB[41], BUS_WENB[41] ); + primitive = _buf bBUS_WENB42( WENB[42], BUS_WENB[42] ); + primitive = _buf bBUS_WENB43( WENB[43], BUS_WENB[43] ); + primitive = _buf bBUS_WENB44( WENB[44], BUS_WENB[44] ); + primitive = _buf bBUS_WENB45( WENB[45], BUS_WENB[45] ); + primitive = _buf bBUS_WENB46( WENB[46], BUS_WENB[46] ); + primitive = _buf bBUS_WENB47( WENB[47], BUS_WENB[47] ); + primitive = _buf bBUS_WENB48( WENB[48], BUS_WENB[48] ); + primitive = _buf bBUS_WENB49( WENB[49], BUS_WENB[49] ); + primitive = _buf bBUS_WENB50( WENB[50], BUS_WENB[50] ); + primitive = _buf bBUS_WENB51( WENB[51], BUS_WENB[51] ); + primitive = _buf bBUS_WENB52( WENB[52], BUS_WENB[52] ); + primitive = _buf bBUS_WENB53( WENB[53], BUS_WENB[53] ); + primitive = _buf bBUS_WENB54( WENB[54], BUS_WENB[54] ); + primitive = _buf bBUS_WENB55( WENB[55], BUS_WENB[55] ); + primitive = _buf bBUS_WENB56( WENB[56], BUS_WENB[56] ); + primitive = _buf bBUS_WENB57( WENB[57], BUS_WENB[57] ); + primitive = _buf bBUS_WENB58( WENB[58], BUS_WENB[58] ); + primitive = _buf bBUS_WENB59( WENB[59], BUS_WENB[59] ); + primitive = _buf bBUS_WENB60( WENB[60], BUS_WENB[60] ); + primitive = _buf bBUS_WENB61( WENB[61], BUS_WENB[61] ); + primitive = _buf bBUS_WENB62( WENB[62], BUS_WENB[62] ); + primitive = _buf bBUS_WENB63( WENB[63], BUS_WENB[63] ); + primitive = _buf bBUS_WENB64( WENB[64], BUS_WENB[64] ); + primitive = _buf bBUS_WENB65( WENB[65], BUS_WENB[65] ); + primitive = _buf bBUS_WENB66( WENB[66], BUS_WENB[66] ); + primitive = _buf bBUS_WENB67( WENB[67], BUS_WENB[67] ); + primitive = _buf bBUS_WENB68( WENB[68], BUS_WENB[68] ); + primitive = _buf bBUS_WENB69( WENB[69], BUS_WENB[69] ); + primitive = _buf bBUS_WENB70( WENB[70], BUS_WENB[70] ); + primitive = _buf bBUS_WENB71( WENB[71], BUS_WENB[71] ); + primitive = _buf bBUS_WENB72( WENB[72], BUS_WENB[72] ); + primitive = _buf bBUS_WENB73( WENB[73], BUS_WENB[73] ); + primitive = _buf bBUS_WENB74( WENB[74], BUS_WENB[74] ); + primitive = _buf bBUS_WENB75( WENB[75], BUS_WENB[75] ); + primitive = _buf bBUS_WENB76( WENB[76], BUS_WENB[76] ); + primitive = _buf bBUS_WENB77( WENB[77], BUS_WENB[77] ); + primitive = _buf bBUS_WENB78( WENB[78], BUS_WENB[78] ); + primitive = _buf bBUS_WENB79( WENB[79], BUS_WENB[79] ); + primitive = _buf bBUS_WENB80( WENB[80], BUS_WENB[80] ); + primitive = _buf bBUS_WENB81( WENB[81], BUS_WENB[81] ); + primitive = _buf bBUS_WENB82( WENB[82], BUS_WENB[82] ); + primitive = _buf bBUS_WENB83( WENB[83], BUS_WENB[83] ); + primitive = _buf bBUS_WENB84( WENB[84], BUS_WENB[84] ); + primitive = _buf bBUS_WENB85( WENB[85], BUS_WENB[85] ); + primitive = _buf bBUS_WENB86( WENB[86], BUS_WENB[86] ); + primitive = _buf bBUS_WENB87( WENB[87], BUS_WENB[87] ); + primitive = _buf bBUS_WENB88( WENB[88], BUS_WENB[88] ); + primitive = _buf bBUS_WENB89( WENB[89], BUS_WENB[89] ); + primitive = _buf bBUS_WENB90( WENB[90], BUS_WENB[90] ); + primitive = _buf bBUS_WENB91( WENB[91], BUS_WENB[91] ); + primitive = _buf bBUS_WENB92( WENB[92], BUS_WENB[92] ); + primitive = _buf bBUS_WENB93( WENB[93], BUS_WENB[93] ); + primitive = _buf bBUS_WENB94( WENB[94], BUS_WENB[94] ); + primitive = _buf bBUS_WENB95( WENB[95], BUS_WENB[95] ); + primitive = _buf bBUS_WENB96( WENB[96], BUS_WENB[96] ); + primitive = _buf bBUS_WENB97( WENB[97], BUS_WENB[97] ); + primitive = _buf bBUS_WENB98( WENB[98], BUS_WENB[98] ); + primitive = _buf bBUS_WENB99( WENB[99], BUS_WENB[99] ); + primitive = _buf bBUS_WENB100( WENB[100], BUS_WENB[100] ); + primitive = _buf bBUS_WENB101( WENB[101], BUS_WENB[101] ); + primitive = _buf bBUS_WENB102( WENB[102], BUS_WENB[102] ); + primitive = _buf bBUS_WENB103( WENB[103], BUS_WENB[103] ); + primitive = _buf bBUS_WENB104( WENB[104], BUS_WENB[104] ); + primitive = _buf bBUS_WENB105( WENB[105], BUS_WENB[105] ); + primitive = _buf bBUS_WENB106( WENB[106], BUS_WENB[106] ); + primitive = _buf bBUS_WENB107( WENB[107], BUS_WENB[107] ); + primitive = _buf bBUS_WENB108( WENB[108], BUS_WENB[108] ); + primitive = _buf bBUS_WENB109( WENB[109], BUS_WENB[109] ); + primitive = _buf bBUS_WENB110( WENB[110], BUS_WENB[110] ); + primitive = _buf bBUS_WENB111( WENB[111], BUS_WENB[111] ); + primitive = _buf bBUS_WENB112( WENB[112], BUS_WENB[112] ); + primitive = _buf bBUS_WENB113( WENB[113], BUS_WENB[113] ); + primitive = _buf bBUS_WENB114( WENB[114], BUS_WENB[114] ); + primitive = _buf bBUS_WENB115( WENB[115], BUS_WENB[115] ); + primitive = _buf bBUS_WENB116( WENB[116], BUS_WENB[116] ); + primitive = _buf bBUS_WENB117( WENB[117], BUS_WENB[117] ); + primitive = _buf bBUS_WENB118( WENB[118], BUS_WENB[118] ); + primitive = _buf bBUS_WENB119( WENB[119], BUS_WENB[119] ); + primitive = _buf bBUS_WENB120( WENB[120], BUS_WENB[120] ); + primitive = _buf bBUS_WENB121( WENB[121], BUS_WENB[121] ); + primitive = _buf bBUS_WENB122( WENB[122], BUS_WENB[122] ); + primitive = _buf bBUS_WENB123( WENB[123], BUS_WENB[123] ); + primitive = _buf bBUS_WENB124( WENB[124], BUS_WENB[124] ); + primitive = _buf bBUS_WENB125( WENB[125], BUS_WENB[125] ); + primitive = _buf bBUS_WENB126( WENB[126], BUS_WENB[126] ); + primitive = _buf bBUS_WENB127( WENB[127], BUS_WENB[127] ); + ) + intern (BMUX_AB) ( array = 4 : 0; + primitive = _mux maB0(TAB[0], BUS_AB[0], TENB, BMUX_AB[0]); + primitive = _mux maB1(TAB[1], BUS_AB[1], TENB, BMUX_AB[1]); + primitive = _mux maB2(TAB[2], BUS_AB[2], TENB, BMUX_AB[2]); + primitive = _mux maB3(TAB[3], BUS_AB[3], TENB, BMUX_AB[3]); + primitive = _mux maB4(TAB[4], BUS_AB[4], TENB, BMUX_AB[4]); + ) + intern (BMUXSEL_AB) ( array = 4 : 0; + primitive = _mux mBMUXSEL_AB0(mlc_bmuxsel, BMUX_AB[0], DFTRAMBYP, BMUXSEL_AB[0]); + primitive = _mux mBMUXSEL_AB1(mlc_bmuxsel, BMUX_AB[1], DFTRAMBYP, BMUXSEL_AB[1]); + primitive = _mux mBMUXSEL_AB2(mlc_bmuxsel, BMUX_AB[2], DFTRAMBYP, BMUXSEL_AB[2]); + primitive = _mux mBMUXSEL_AB3(mlc_bmuxsel, BMUX_AB[3], DFTRAMBYP, BMUXSEL_AB[3]); + primitive = _mux mBMUXSEL_AB4(mlc_bmuxsel, BMUX_AB[4], DFTRAMBYP, BMUXSEL_AB[4]); + ) + output (AYB) ( array = 4 : 0; + primitive = _buf bAYB0(BMUXSEL_AB[0], AYB[0]); + primitive = _buf bAYB1(BMUXSEL_AB[1], AYB[1]); + primitive = _buf bAYB2(BMUXSEL_AB[2], AYB[2]); + primitive = _buf bAYB3(BMUXSEL_AB[3], AYB[3]); + primitive = _buf bAYB4(BMUXSEL_AB[4], AYB[4]); + ) + + intern (BMUX_DB) ( array = 127 : 0; + primitive = _mux mBMUX_DB0(TDB[0], BUS_DB[0], TENB, BMUX_DB[0]); + primitive = _mux mBMUX_DB1(TDB[1], BUS_DB[1], TENB, BMUX_DB[1]); + primitive = _mux mBMUX_DB2(TDB[2], BUS_DB[2], TENB, BMUX_DB[2]); + primitive = _mux mBMUX_DB3(TDB[3], BUS_DB[3], TENB, BMUX_DB[3]); + primitive = _mux mBMUX_DB4(TDB[4], BUS_DB[4], TENB, BMUX_DB[4]); + primitive = _mux mBMUX_DB5(TDB[5], BUS_DB[5], TENB, BMUX_DB[5]); + primitive = _mux mBMUX_DB6(TDB[6], BUS_DB[6], TENB, BMUX_DB[6]); + primitive = _mux mBMUX_DB7(TDB[7], BUS_DB[7], TENB, BMUX_DB[7]); + primitive = _mux mBMUX_DB8(TDB[8], BUS_DB[8], TENB, BMUX_DB[8]); + primitive = _mux mBMUX_DB9(TDB[9], BUS_DB[9], TENB, BMUX_DB[9]); + primitive = _mux mBMUX_DB10(TDB[10], BUS_DB[10], TENB, BMUX_DB[10]); + primitive = _mux mBMUX_DB11(TDB[11], BUS_DB[11], TENB, BMUX_DB[11]); + primitive = _mux mBMUX_DB12(TDB[12], BUS_DB[12], TENB, BMUX_DB[12]); + primitive = _mux mBMUX_DB13(TDB[13], BUS_DB[13], TENB, BMUX_DB[13]); + primitive = _mux mBMUX_DB14(TDB[14], BUS_DB[14], TENB, BMUX_DB[14]); + primitive = _mux mBMUX_DB15(TDB[15], BUS_DB[15], TENB, BMUX_DB[15]); + primitive = _mux mBMUX_DB16(TDB[16], BUS_DB[16], TENB, BMUX_DB[16]); + primitive = _mux mBMUX_DB17(TDB[17], BUS_DB[17], TENB, BMUX_DB[17]); + primitive = _mux mBMUX_DB18(TDB[18], BUS_DB[18], TENB, BMUX_DB[18]); + primitive = _mux mBMUX_DB19(TDB[19], BUS_DB[19], TENB, BMUX_DB[19]); + primitive = _mux mBMUX_DB20(TDB[20], BUS_DB[20], TENB, BMUX_DB[20]); + primitive = _mux mBMUX_DB21(TDB[21], BUS_DB[21], TENB, BMUX_DB[21]); + primitive = _mux mBMUX_DB22(TDB[22], BUS_DB[22], TENB, BMUX_DB[22]); + primitive = _mux mBMUX_DB23(TDB[23], BUS_DB[23], TENB, BMUX_DB[23]); + primitive = _mux mBMUX_DB24(TDB[24], BUS_DB[24], TENB, BMUX_DB[24]); + primitive = _mux mBMUX_DB25(TDB[25], BUS_DB[25], TENB, BMUX_DB[25]); + primitive = _mux mBMUX_DB26(TDB[26], BUS_DB[26], TENB, BMUX_DB[26]); + primitive = _mux mBMUX_DB27(TDB[27], BUS_DB[27], TENB, BMUX_DB[27]); + primitive = _mux mBMUX_DB28(TDB[28], BUS_DB[28], TENB, BMUX_DB[28]); + primitive = _mux mBMUX_DB29(TDB[29], BUS_DB[29], TENB, BMUX_DB[29]); + primitive = _mux mBMUX_DB30(TDB[30], BUS_DB[30], TENB, BMUX_DB[30]); + primitive = _mux mBMUX_DB31(TDB[31], BUS_DB[31], TENB, BMUX_DB[31]); + primitive = _mux mBMUX_DB32(TDB[32], BUS_DB[32], TENB, BMUX_DB[32]); + primitive = _mux mBMUX_DB33(TDB[33], BUS_DB[33], TENB, BMUX_DB[33]); + primitive = _mux mBMUX_DB34(TDB[34], BUS_DB[34], TENB, BMUX_DB[34]); + primitive = _mux mBMUX_DB35(TDB[35], BUS_DB[35], TENB, BMUX_DB[35]); + primitive = _mux mBMUX_DB36(TDB[36], BUS_DB[36], TENB, BMUX_DB[36]); + primitive = _mux mBMUX_DB37(TDB[37], BUS_DB[37], TENB, BMUX_DB[37]); + primitive = _mux mBMUX_DB38(TDB[38], BUS_DB[38], TENB, BMUX_DB[38]); + primitive = _mux mBMUX_DB39(TDB[39], BUS_DB[39], TENB, BMUX_DB[39]); + primitive = _mux mBMUX_DB40(TDB[40], BUS_DB[40], TENB, BMUX_DB[40]); + primitive = _mux mBMUX_DB41(TDB[41], BUS_DB[41], TENB, BMUX_DB[41]); + primitive = _mux mBMUX_DB42(TDB[42], BUS_DB[42], TENB, BMUX_DB[42]); + primitive = _mux mBMUX_DB43(TDB[43], BUS_DB[43], TENB, BMUX_DB[43]); + primitive = _mux mBMUX_DB44(TDB[44], BUS_DB[44], TENB, BMUX_DB[44]); + primitive = _mux mBMUX_DB45(TDB[45], BUS_DB[45], TENB, BMUX_DB[45]); + primitive = _mux mBMUX_DB46(TDB[46], BUS_DB[46], TENB, BMUX_DB[46]); + primitive = _mux mBMUX_DB47(TDB[47], BUS_DB[47], TENB, BMUX_DB[47]); + primitive = _mux mBMUX_DB48(TDB[48], BUS_DB[48], TENB, BMUX_DB[48]); + primitive = _mux mBMUX_DB49(TDB[49], BUS_DB[49], TENB, BMUX_DB[49]); + primitive = _mux mBMUX_DB50(TDB[50], BUS_DB[50], TENB, BMUX_DB[50]); + primitive = _mux mBMUX_DB51(TDB[51], BUS_DB[51], TENB, BMUX_DB[51]); + primitive = _mux mBMUX_DB52(TDB[52], BUS_DB[52], TENB, BMUX_DB[52]); + primitive = _mux mBMUX_DB53(TDB[53], BUS_DB[53], TENB, BMUX_DB[53]); + primitive = _mux mBMUX_DB54(TDB[54], BUS_DB[54], TENB, BMUX_DB[54]); + primitive = _mux mBMUX_DB55(TDB[55], BUS_DB[55], TENB, BMUX_DB[55]); + primitive = _mux mBMUX_DB56(TDB[56], BUS_DB[56], TENB, BMUX_DB[56]); + primitive = _mux mBMUX_DB57(TDB[57], BUS_DB[57], TENB, BMUX_DB[57]); + primitive = _mux mBMUX_DB58(TDB[58], BUS_DB[58], TENB, BMUX_DB[58]); + primitive = _mux mBMUX_DB59(TDB[59], BUS_DB[59], TENB, BMUX_DB[59]); + primitive = _mux mBMUX_DB60(TDB[60], BUS_DB[60], TENB, BMUX_DB[60]); + primitive = _mux mBMUX_DB61(TDB[61], BUS_DB[61], TENB, BMUX_DB[61]); + primitive = _mux mBMUX_DB62(TDB[62], BUS_DB[62], TENB, BMUX_DB[62]); + primitive = _mux mBMUX_DB63(TDB[63], BUS_DB[63], TENB, BMUX_DB[63]); + primitive = _mux mBMUX_DB64(TDB[64], BUS_DB[64], TENB, BMUX_DB[64]); + primitive = _mux mBMUX_DB65(TDB[65], BUS_DB[65], TENB, BMUX_DB[65]); + primitive = _mux mBMUX_DB66(TDB[66], BUS_DB[66], TENB, BMUX_DB[66]); + primitive = _mux mBMUX_DB67(TDB[67], BUS_DB[67], TENB, BMUX_DB[67]); + primitive = _mux mBMUX_DB68(TDB[68], BUS_DB[68], TENB, BMUX_DB[68]); + primitive = _mux mBMUX_DB69(TDB[69], BUS_DB[69], TENB, BMUX_DB[69]); + primitive = _mux mBMUX_DB70(TDB[70], BUS_DB[70], TENB, BMUX_DB[70]); + primitive = _mux mBMUX_DB71(TDB[71], BUS_DB[71], TENB, BMUX_DB[71]); + primitive = _mux mBMUX_DB72(TDB[72], BUS_DB[72], TENB, BMUX_DB[72]); + primitive = _mux mBMUX_DB73(TDB[73], BUS_DB[73], TENB, BMUX_DB[73]); + primitive = _mux mBMUX_DB74(TDB[74], BUS_DB[74], TENB, BMUX_DB[74]); + primitive = _mux mBMUX_DB75(TDB[75], BUS_DB[75], TENB, BMUX_DB[75]); + primitive = _mux mBMUX_DB76(TDB[76], BUS_DB[76], TENB, BMUX_DB[76]); + primitive = _mux mBMUX_DB77(TDB[77], BUS_DB[77], TENB, BMUX_DB[77]); + primitive = _mux mBMUX_DB78(TDB[78], BUS_DB[78], TENB, BMUX_DB[78]); + primitive = _mux mBMUX_DB79(TDB[79], BUS_DB[79], TENB, BMUX_DB[79]); + primitive = _mux mBMUX_DB80(TDB[80], BUS_DB[80], TENB, BMUX_DB[80]); + primitive = _mux mBMUX_DB81(TDB[81], BUS_DB[81], TENB, BMUX_DB[81]); + primitive = _mux mBMUX_DB82(TDB[82], BUS_DB[82], TENB, BMUX_DB[82]); + primitive = _mux mBMUX_DB83(TDB[83], BUS_DB[83], TENB, BMUX_DB[83]); + primitive = _mux mBMUX_DB84(TDB[84], BUS_DB[84], TENB, BMUX_DB[84]); + primitive = _mux mBMUX_DB85(TDB[85], BUS_DB[85], TENB, BMUX_DB[85]); + primitive = _mux mBMUX_DB86(TDB[86], BUS_DB[86], TENB, BMUX_DB[86]); + primitive = _mux mBMUX_DB87(TDB[87], BUS_DB[87], TENB, BMUX_DB[87]); + primitive = _mux mBMUX_DB88(TDB[88], BUS_DB[88], TENB, BMUX_DB[88]); + primitive = _mux mBMUX_DB89(TDB[89], BUS_DB[89], TENB, BMUX_DB[89]); + primitive = _mux mBMUX_DB90(TDB[90], BUS_DB[90], TENB, BMUX_DB[90]); + primitive = _mux mBMUX_DB91(TDB[91], BUS_DB[91], TENB, BMUX_DB[91]); + primitive = _mux mBMUX_DB92(TDB[92], BUS_DB[92], TENB, BMUX_DB[92]); + primitive = _mux mBMUX_DB93(TDB[93], BUS_DB[93], TENB, BMUX_DB[93]); + primitive = _mux mBMUX_DB94(TDB[94], BUS_DB[94], TENB, BMUX_DB[94]); + primitive = _mux mBMUX_DB95(TDB[95], BUS_DB[95], TENB, BMUX_DB[95]); + primitive = _mux mBMUX_DB96(TDB[96], BUS_DB[96], TENB, BMUX_DB[96]); + primitive = _mux mBMUX_DB97(TDB[97], BUS_DB[97], TENB, BMUX_DB[97]); + primitive = _mux mBMUX_DB98(TDB[98], BUS_DB[98], TENB, BMUX_DB[98]); + primitive = _mux mBMUX_DB99(TDB[99], BUS_DB[99], TENB, BMUX_DB[99]); + primitive = _mux mBMUX_DB100(TDB[100], BUS_DB[100], TENB, BMUX_DB[100]); + primitive = _mux mBMUX_DB101(TDB[101], BUS_DB[101], TENB, BMUX_DB[101]); + primitive = _mux mBMUX_DB102(TDB[102], BUS_DB[102], TENB, BMUX_DB[102]); + primitive = _mux mBMUX_DB103(TDB[103], BUS_DB[103], TENB, BMUX_DB[103]); + primitive = _mux mBMUX_DB104(TDB[104], BUS_DB[104], TENB, BMUX_DB[104]); + primitive = _mux mBMUX_DB105(TDB[105], BUS_DB[105], TENB, BMUX_DB[105]); + primitive = _mux mBMUX_DB106(TDB[106], BUS_DB[106], TENB, BMUX_DB[106]); + primitive = _mux mBMUX_DB107(TDB[107], BUS_DB[107], TENB, BMUX_DB[107]); + primitive = _mux mBMUX_DB108(TDB[108], BUS_DB[108], TENB, BMUX_DB[108]); + primitive = _mux mBMUX_DB109(TDB[109], BUS_DB[109], TENB, BMUX_DB[109]); + primitive = _mux mBMUX_DB110(TDB[110], BUS_DB[110], TENB, BMUX_DB[110]); + primitive = _mux mBMUX_DB111(TDB[111], BUS_DB[111], TENB, BMUX_DB[111]); + primitive = _mux mBMUX_DB112(TDB[112], BUS_DB[112], TENB, BMUX_DB[112]); + primitive = _mux mBMUX_DB113(TDB[113], BUS_DB[113], TENB, BMUX_DB[113]); + primitive = _mux mBMUX_DB114(TDB[114], BUS_DB[114], TENB, BMUX_DB[114]); + primitive = _mux mBMUX_DB115(TDB[115], BUS_DB[115], TENB, BMUX_DB[115]); + primitive = _mux mBMUX_DB116(TDB[116], BUS_DB[116], TENB, BMUX_DB[116]); + primitive = _mux mBMUX_DB117(TDB[117], BUS_DB[117], TENB, BMUX_DB[117]); + primitive = _mux mBMUX_DB118(TDB[118], BUS_DB[118], TENB, BMUX_DB[118]); + primitive = _mux mBMUX_DB119(TDB[119], BUS_DB[119], TENB, BMUX_DB[119]); + primitive = _mux mBMUX_DB120(TDB[120], BUS_DB[120], TENB, BMUX_DB[120]); + primitive = _mux mBMUX_DB121(TDB[121], BUS_DB[121], TENB, BMUX_DB[121]); + primitive = _mux mBMUX_DB122(TDB[122], BUS_DB[122], TENB, BMUX_DB[122]); + primitive = _mux mBMUX_DB123(TDB[123], BUS_DB[123], TENB, BMUX_DB[123]); + primitive = _mux mBMUX_DB124(TDB[124], BUS_DB[124], TENB, BMUX_DB[124]); + primitive = _mux mBMUX_DB125(TDB[125], BUS_DB[125], TENB, BMUX_DB[125]); + primitive = _mux mBMUX_DB126(TDB[126], BUS_DB[126], TENB, BMUX_DB[126]); + primitive = _mux mBMUX_DB127(TDB[127], BUS_DB[127], TENB, BMUX_DB[127]); + ) + + intern (BMUX_WENB) (array = 127 : 0; + primitive = _mux mBMUX_WENB0(TWENB[0], BUS_WENB[0], TENB, BMUX_WENB[0]); + primitive = _mux mBMUX_WENB1(TWENB[1], BUS_WENB[1], TENB, BMUX_WENB[1]); + primitive = _mux mBMUX_WENB2(TWENB[2], BUS_WENB[2], TENB, BMUX_WENB[2]); + primitive = _mux mBMUX_WENB3(TWENB[3], BUS_WENB[3], TENB, BMUX_WENB[3]); + primitive = _mux mBMUX_WENB4(TWENB[4], BUS_WENB[4], TENB, BMUX_WENB[4]); + primitive = _mux mBMUX_WENB5(TWENB[5], BUS_WENB[5], TENB, BMUX_WENB[5]); + primitive = _mux mBMUX_WENB6(TWENB[6], BUS_WENB[6], TENB, BMUX_WENB[6]); + primitive = _mux mBMUX_WENB7(TWENB[7], BUS_WENB[7], TENB, BMUX_WENB[7]); + primitive = _mux mBMUX_WENB8(TWENB[8], BUS_WENB[8], TENB, BMUX_WENB[8]); + primitive = _mux mBMUX_WENB9(TWENB[9], BUS_WENB[9], TENB, BMUX_WENB[9]); + primitive = _mux mBMUX_WENB10(TWENB[10], BUS_WENB[10], TENB, BMUX_WENB[10]); + primitive = _mux mBMUX_WENB11(TWENB[11], BUS_WENB[11], TENB, BMUX_WENB[11]); + primitive = _mux mBMUX_WENB12(TWENB[12], BUS_WENB[12], TENB, BMUX_WENB[12]); + primitive = _mux mBMUX_WENB13(TWENB[13], BUS_WENB[13], TENB, BMUX_WENB[13]); + primitive = _mux mBMUX_WENB14(TWENB[14], BUS_WENB[14], TENB, BMUX_WENB[14]); + primitive = _mux mBMUX_WENB15(TWENB[15], BUS_WENB[15], TENB, BMUX_WENB[15]); + primitive = _mux mBMUX_WENB16(TWENB[16], BUS_WENB[16], TENB, BMUX_WENB[16]); + primitive = _mux mBMUX_WENB17(TWENB[17], BUS_WENB[17], TENB, BMUX_WENB[17]); + primitive = _mux mBMUX_WENB18(TWENB[18], BUS_WENB[18], TENB, BMUX_WENB[18]); + primitive = _mux mBMUX_WENB19(TWENB[19], BUS_WENB[19], TENB, BMUX_WENB[19]); + primitive = _mux mBMUX_WENB20(TWENB[20], BUS_WENB[20], TENB, BMUX_WENB[20]); + primitive = _mux mBMUX_WENB21(TWENB[21], BUS_WENB[21], TENB, BMUX_WENB[21]); + primitive = _mux mBMUX_WENB22(TWENB[22], BUS_WENB[22], TENB, BMUX_WENB[22]); + primitive = _mux mBMUX_WENB23(TWENB[23], BUS_WENB[23], TENB, BMUX_WENB[23]); + primitive = _mux mBMUX_WENB24(TWENB[24], BUS_WENB[24], TENB, BMUX_WENB[24]); + primitive = _mux mBMUX_WENB25(TWENB[25], BUS_WENB[25], TENB, BMUX_WENB[25]); + primitive = _mux mBMUX_WENB26(TWENB[26], BUS_WENB[26], TENB, BMUX_WENB[26]); + primitive = _mux mBMUX_WENB27(TWENB[27], BUS_WENB[27], TENB, BMUX_WENB[27]); + primitive = _mux mBMUX_WENB28(TWENB[28], BUS_WENB[28], TENB, BMUX_WENB[28]); + primitive = _mux mBMUX_WENB29(TWENB[29], BUS_WENB[29], TENB, BMUX_WENB[29]); + primitive = _mux mBMUX_WENB30(TWENB[30], BUS_WENB[30], TENB, BMUX_WENB[30]); + primitive = _mux mBMUX_WENB31(TWENB[31], BUS_WENB[31], TENB, BMUX_WENB[31]); + primitive = _mux mBMUX_WENB32(TWENB[32], BUS_WENB[32], TENB, BMUX_WENB[32]); + primitive = _mux mBMUX_WENB33(TWENB[33], BUS_WENB[33], TENB, BMUX_WENB[33]); + primitive = _mux mBMUX_WENB34(TWENB[34], BUS_WENB[34], TENB, BMUX_WENB[34]); + primitive = _mux mBMUX_WENB35(TWENB[35], BUS_WENB[35], TENB, BMUX_WENB[35]); + primitive = _mux mBMUX_WENB36(TWENB[36], BUS_WENB[36], TENB, BMUX_WENB[36]); + primitive = _mux mBMUX_WENB37(TWENB[37], BUS_WENB[37], TENB, BMUX_WENB[37]); + primitive = _mux mBMUX_WENB38(TWENB[38], BUS_WENB[38], TENB, BMUX_WENB[38]); + primitive = _mux mBMUX_WENB39(TWENB[39], BUS_WENB[39], TENB, BMUX_WENB[39]); + primitive = _mux mBMUX_WENB40(TWENB[40], BUS_WENB[40], TENB, BMUX_WENB[40]); + primitive = _mux mBMUX_WENB41(TWENB[41], BUS_WENB[41], TENB, BMUX_WENB[41]); + primitive = _mux mBMUX_WENB42(TWENB[42], BUS_WENB[42], TENB, BMUX_WENB[42]); + primitive = _mux mBMUX_WENB43(TWENB[43], BUS_WENB[43], TENB, BMUX_WENB[43]); + primitive = _mux mBMUX_WENB44(TWENB[44], BUS_WENB[44], TENB, BMUX_WENB[44]); + primitive = _mux mBMUX_WENB45(TWENB[45], BUS_WENB[45], TENB, BMUX_WENB[45]); + primitive = _mux mBMUX_WENB46(TWENB[46], BUS_WENB[46], TENB, BMUX_WENB[46]); + primitive = _mux mBMUX_WENB47(TWENB[47], BUS_WENB[47], TENB, BMUX_WENB[47]); + primitive = _mux mBMUX_WENB48(TWENB[48], BUS_WENB[48], TENB, BMUX_WENB[48]); + primitive = _mux mBMUX_WENB49(TWENB[49], BUS_WENB[49], TENB, BMUX_WENB[49]); + primitive = _mux mBMUX_WENB50(TWENB[50], BUS_WENB[50], TENB, BMUX_WENB[50]); + primitive = _mux mBMUX_WENB51(TWENB[51], BUS_WENB[51], TENB, BMUX_WENB[51]); + primitive = _mux mBMUX_WENB52(TWENB[52], BUS_WENB[52], TENB, BMUX_WENB[52]); + primitive = _mux mBMUX_WENB53(TWENB[53], BUS_WENB[53], TENB, BMUX_WENB[53]); + primitive = _mux mBMUX_WENB54(TWENB[54], BUS_WENB[54], TENB, BMUX_WENB[54]); + primitive = _mux mBMUX_WENB55(TWENB[55], BUS_WENB[55], TENB, BMUX_WENB[55]); + primitive = _mux mBMUX_WENB56(TWENB[56], BUS_WENB[56], TENB, BMUX_WENB[56]); + primitive = _mux mBMUX_WENB57(TWENB[57], BUS_WENB[57], TENB, BMUX_WENB[57]); + primitive = _mux mBMUX_WENB58(TWENB[58], BUS_WENB[58], TENB, BMUX_WENB[58]); + primitive = _mux mBMUX_WENB59(TWENB[59], BUS_WENB[59], TENB, BMUX_WENB[59]); + primitive = _mux mBMUX_WENB60(TWENB[60], BUS_WENB[60], TENB, BMUX_WENB[60]); + primitive = _mux mBMUX_WENB61(TWENB[61], BUS_WENB[61], TENB, BMUX_WENB[61]); + primitive = _mux mBMUX_WENB62(TWENB[62], BUS_WENB[62], TENB, BMUX_WENB[62]); + primitive = _mux mBMUX_WENB63(TWENB[63], BUS_WENB[63], TENB, BMUX_WENB[63]); + primitive = _mux mBMUX_WENB64(TWENB[64], BUS_WENB[64], TENB, BMUX_WENB[64]); + primitive = _mux mBMUX_WENB65(TWENB[65], BUS_WENB[65], TENB, BMUX_WENB[65]); + primitive = _mux mBMUX_WENB66(TWENB[66], BUS_WENB[66], TENB, BMUX_WENB[66]); + primitive = _mux mBMUX_WENB67(TWENB[67], BUS_WENB[67], TENB, BMUX_WENB[67]); + primitive = _mux mBMUX_WENB68(TWENB[68], BUS_WENB[68], TENB, BMUX_WENB[68]); + primitive = _mux mBMUX_WENB69(TWENB[69], BUS_WENB[69], TENB, BMUX_WENB[69]); + primitive = _mux mBMUX_WENB70(TWENB[70], BUS_WENB[70], TENB, BMUX_WENB[70]); + primitive = _mux mBMUX_WENB71(TWENB[71], BUS_WENB[71], TENB, BMUX_WENB[71]); + primitive = _mux mBMUX_WENB72(TWENB[72], BUS_WENB[72], TENB, BMUX_WENB[72]); + primitive = _mux mBMUX_WENB73(TWENB[73], BUS_WENB[73], TENB, BMUX_WENB[73]); + primitive = _mux mBMUX_WENB74(TWENB[74], BUS_WENB[74], TENB, BMUX_WENB[74]); + primitive = _mux mBMUX_WENB75(TWENB[75], BUS_WENB[75], TENB, BMUX_WENB[75]); + primitive = _mux mBMUX_WENB76(TWENB[76], BUS_WENB[76], TENB, BMUX_WENB[76]); + primitive = _mux mBMUX_WENB77(TWENB[77], BUS_WENB[77], TENB, BMUX_WENB[77]); + primitive = _mux mBMUX_WENB78(TWENB[78], BUS_WENB[78], TENB, BMUX_WENB[78]); + primitive = _mux mBMUX_WENB79(TWENB[79], BUS_WENB[79], TENB, BMUX_WENB[79]); + primitive = _mux mBMUX_WENB80(TWENB[80], BUS_WENB[80], TENB, BMUX_WENB[80]); + primitive = _mux mBMUX_WENB81(TWENB[81], BUS_WENB[81], TENB, BMUX_WENB[81]); + primitive = _mux mBMUX_WENB82(TWENB[82], BUS_WENB[82], TENB, BMUX_WENB[82]); + primitive = _mux mBMUX_WENB83(TWENB[83], BUS_WENB[83], TENB, BMUX_WENB[83]); + primitive = _mux mBMUX_WENB84(TWENB[84], BUS_WENB[84], TENB, BMUX_WENB[84]); + primitive = _mux mBMUX_WENB85(TWENB[85], BUS_WENB[85], TENB, BMUX_WENB[85]); + primitive = _mux mBMUX_WENB86(TWENB[86], BUS_WENB[86], TENB, BMUX_WENB[86]); + primitive = _mux mBMUX_WENB87(TWENB[87], BUS_WENB[87], TENB, BMUX_WENB[87]); + primitive = _mux mBMUX_WENB88(TWENB[88], BUS_WENB[88], TENB, BMUX_WENB[88]); + primitive = _mux mBMUX_WENB89(TWENB[89], BUS_WENB[89], TENB, BMUX_WENB[89]); + primitive = _mux mBMUX_WENB90(TWENB[90], BUS_WENB[90], TENB, BMUX_WENB[90]); + primitive = _mux mBMUX_WENB91(TWENB[91], BUS_WENB[91], TENB, BMUX_WENB[91]); + primitive = _mux mBMUX_WENB92(TWENB[92], BUS_WENB[92], TENB, BMUX_WENB[92]); + primitive = _mux mBMUX_WENB93(TWENB[93], BUS_WENB[93], TENB, BMUX_WENB[93]); + primitive = _mux mBMUX_WENB94(TWENB[94], BUS_WENB[94], TENB, BMUX_WENB[94]); + primitive = _mux mBMUX_WENB95(TWENB[95], BUS_WENB[95], TENB, BMUX_WENB[95]); + primitive = _mux mBMUX_WENB96(TWENB[96], BUS_WENB[96], TENB, BMUX_WENB[96]); + primitive = _mux mBMUX_WENB97(TWENB[97], BUS_WENB[97], TENB, BMUX_WENB[97]); + primitive = _mux mBMUX_WENB98(TWENB[98], BUS_WENB[98], TENB, BMUX_WENB[98]); + primitive = _mux mBMUX_WENB99(TWENB[99], BUS_WENB[99], TENB, BMUX_WENB[99]); + primitive = _mux mBMUX_WENB100(TWENB[100], BUS_WENB[100], TENB, BMUX_WENB[100]); + primitive = _mux mBMUX_WENB101(TWENB[101], BUS_WENB[101], TENB, BMUX_WENB[101]); + primitive = _mux mBMUX_WENB102(TWENB[102], BUS_WENB[102], TENB, BMUX_WENB[102]); + primitive = _mux mBMUX_WENB103(TWENB[103], BUS_WENB[103], TENB, BMUX_WENB[103]); + primitive = _mux mBMUX_WENB104(TWENB[104], BUS_WENB[104], TENB, BMUX_WENB[104]); + primitive = _mux mBMUX_WENB105(TWENB[105], BUS_WENB[105], TENB, BMUX_WENB[105]); + primitive = _mux mBMUX_WENB106(TWENB[106], BUS_WENB[106], TENB, BMUX_WENB[106]); + primitive = _mux mBMUX_WENB107(TWENB[107], BUS_WENB[107], TENB, BMUX_WENB[107]); + primitive = _mux mBMUX_WENB108(TWENB[108], BUS_WENB[108], TENB, BMUX_WENB[108]); + primitive = _mux mBMUX_WENB109(TWENB[109], BUS_WENB[109], TENB, BMUX_WENB[109]); + primitive = _mux mBMUX_WENB110(TWENB[110], BUS_WENB[110], TENB, BMUX_WENB[110]); + primitive = _mux mBMUX_WENB111(TWENB[111], BUS_WENB[111], TENB, BMUX_WENB[111]); + primitive = _mux mBMUX_WENB112(TWENB[112], BUS_WENB[112], TENB, BMUX_WENB[112]); + primitive = _mux mBMUX_WENB113(TWENB[113], BUS_WENB[113], TENB, BMUX_WENB[113]); + primitive = _mux mBMUX_WENB114(TWENB[114], BUS_WENB[114], TENB, BMUX_WENB[114]); + primitive = _mux mBMUX_WENB115(TWENB[115], BUS_WENB[115], TENB, BMUX_WENB[115]); + primitive = _mux mBMUX_WENB116(TWENB[116], BUS_WENB[116], TENB, BMUX_WENB[116]); + primitive = _mux mBMUX_WENB117(TWENB[117], BUS_WENB[117], TENB, BMUX_WENB[117]); + primitive = _mux mBMUX_WENB118(TWENB[118], BUS_WENB[118], TENB, BMUX_WENB[118]); + primitive = _mux mBMUX_WENB119(TWENB[119], BUS_WENB[119], TENB, BMUX_WENB[119]); + primitive = _mux mBMUX_WENB120(TWENB[120], BUS_WENB[120], TENB, BMUX_WENB[120]); + primitive = _mux mBMUX_WENB121(TWENB[121], BUS_WENB[121], TENB, BMUX_WENB[121]); + primitive = _mux mBMUX_WENB122(TWENB[122], BUS_WENB[122], TENB, BMUX_WENB[122]); + primitive = _mux mBMUX_WENB123(TWENB[123], BUS_WENB[123], TENB, BMUX_WENB[123]); + primitive = _mux mBMUX_WENB124(TWENB[124], BUS_WENB[124], TENB, BMUX_WENB[124]); + primitive = _mux mBMUX_WENB125(TWENB[125], BUS_WENB[125], TENB, BMUX_WENB[125]); + primitive = _mux mBMUX_WENB126(TWENB[126], BUS_WENB[126], TENB, BMUX_WENB[126]); + primitive = _mux mBMUX_WENB127(TWENB[127], BUS_WENB[127], TENB, BMUX_WENB[127]); + ) + intern (BMUXSEL_WENB) (array = 127 : 0; + primitive = _mux mBMUXSEL_WENB0(mlc_bmuxsel, BMUX_WENB[0], DFTRAMBYP, BMUXSEL_WENB[0]); + primitive = _mux mBMUXSEL_WENB1(mlc_bmuxsel, BMUX_WENB[1], DFTRAMBYP, BMUXSEL_WENB[1]); + primitive = _mux mBMUXSEL_WENB2(mlc_bmuxsel, BMUX_WENB[2], DFTRAMBYP, BMUXSEL_WENB[2]); + primitive = _mux mBMUXSEL_WENB3(mlc_bmuxsel, BMUX_WENB[3], DFTRAMBYP, BMUXSEL_WENB[3]); + primitive = _mux mBMUXSEL_WENB4(mlc_bmuxsel, BMUX_WENB[4], DFTRAMBYP, BMUXSEL_WENB[4]); + primitive = _mux mBMUXSEL_WENB5(mlc_bmuxsel, BMUX_WENB[5], DFTRAMBYP, BMUXSEL_WENB[5]); + primitive = _mux mBMUXSEL_WENB6(mlc_bmuxsel, BMUX_WENB[6], DFTRAMBYP, BMUXSEL_WENB[6]); + primitive = _mux mBMUXSEL_WENB7(mlc_bmuxsel, BMUX_WENB[7], DFTRAMBYP, BMUXSEL_WENB[7]); + primitive = _mux mBMUXSEL_WENB8(mlc_bmuxsel, BMUX_WENB[8], DFTRAMBYP, BMUXSEL_WENB[8]); + primitive = _mux mBMUXSEL_WENB9(mlc_bmuxsel, BMUX_WENB[9], DFTRAMBYP, BMUXSEL_WENB[9]); + primitive = _mux mBMUXSEL_WENB10(mlc_bmuxsel, BMUX_WENB[10], DFTRAMBYP, BMUXSEL_WENB[10]); + primitive = _mux mBMUXSEL_WENB11(mlc_bmuxsel, BMUX_WENB[11], DFTRAMBYP, BMUXSEL_WENB[11]); + primitive = _mux mBMUXSEL_WENB12(mlc_bmuxsel, BMUX_WENB[12], DFTRAMBYP, BMUXSEL_WENB[12]); + primitive = _mux mBMUXSEL_WENB13(mlc_bmuxsel, BMUX_WENB[13], DFTRAMBYP, BMUXSEL_WENB[13]); + primitive = _mux mBMUXSEL_WENB14(mlc_bmuxsel, BMUX_WENB[14], DFTRAMBYP, BMUXSEL_WENB[14]); + primitive = _mux mBMUXSEL_WENB15(mlc_bmuxsel, BMUX_WENB[15], DFTRAMBYP, BMUXSEL_WENB[15]); + primitive = _mux mBMUXSEL_WENB16(mlc_bmuxsel, BMUX_WENB[16], DFTRAMBYP, BMUXSEL_WENB[16]); + primitive = _mux mBMUXSEL_WENB17(mlc_bmuxsel, BMUX_WENB[17], DFTRAMBYP, BMUXSEL_WENB[17]); + primitive = _mux mBMUXSEL_WENB18(mlc_bmuxsel, BMUX_WENB[18], DFTRAMBYP, BMUXSEL_WENB[18]); + primitive = _mux mBMUXSEL_WENB19(mlc_bmuxsel, BMUX_WENB[19], DFTRAMBYP, BMUXSEL_WENB[19]); + primitive = _mux mBMUXSEL_WENB20(mlc_bmuxsel, BMUX_WENB[20], DFTRAMBYP, BMUXSEL_WENB[20]); + primitive = _mux mBMUXSEL_WENB21(mlc_bmuxsel, BMUX_WENB[21], DFTRAMBYP, BMUXSEL_WENB[21]); + primitive = _mux mBMUXSEL_WENB22(mlc_bmuxsel, BMUX_WENB[22], DFTRAMBYP, BMUXSEL_WENB[22]); + primitive = _mux mBMUXSEL_WENB23(mlc_bmuxsel, BMUX_WENB[23], DFTRAMBYP, BMUXSEL_WENB[23]); + primitive = _mux mBMUXSEL_WENB24(mlc_bmuxsel, BMUX_WENB[24], DFTRAMBYP, BMUXSEL_WENB[24]); + primitive = _mux mBMUXSEL_WENB25(mlc_bmuxsel, BMUX_WENB[25], DFTRAMBYP, BMUXSEL_WENB[25]); + primitive = _mux mBMUXSEL_WENB26(mlc_bmuxsel, BMUX_WENB[26], DFTRAMBYP, BMUXSEL_WENB[26]); + primitive = _mux mBMUXSEL_WENB27(mlc_bmuxsel, BMUX_WENB[27], DFTRAMBYP, BMUXSEL_WENB[27]); + primitive = _mux mBMUXSEL_WENB28(mlc_bmuxsel, BMUX_WENB[28], DFTRAMBYP, BMUXSEL_WENB[28]); + primitive = _mux mBMUXSEL_WENB29(mlc_bmuxsel, BMUX_WENB[29], DFTRAMBYP, BMUXSEL_WENB[29]); + primitive = _mux mBMUXSEL_WENB30(mlc_bmuxsel, BMUX_WENB[30], DFTRAMBYP, BMUXSEL_WENB[30]); + primitive = _mux mBMUXSEL_WENB31(mlc_bmuxsel, BMUX_WENB[31], DFTRAMBYP, BMUXSEL_WENB[31]); + primitive = _mux mBMUXSEL_WENB32(mlc_bmuxsel, BMUX_WENB[32], DFTRAMBYP, BMUXSEL_WENB[32]); + primitive = _mux mBMUXSEL_WENB33(mlc_bmuxsel, BMUX_WENB[33], DFTRAMBYP, BMUXSEL_WENB[33]); + primitive = _mux mBMUXSEL_WENB34(mlc_bmuxsel, BMUX_WENB[34], DFTRAMBYP, BMUXSEL_WENB[34]); + primitive = _mux mBMUXSEL_WENB35(mlc_bmuxsel, BMUX_WENB[35], DFTRAMBYP, BMUXSEL_WENB[35]); + primitive = _mux mBMUXSEL_WENB36(mlc_bmuxsel, BMUX_WENB[36], DFTRAMBYP, BMUXSEL_WENB[36]); + primitive = _mux mBMUXSEL_WENB37(mlc_bmuxsel, BMUX_WENB[37], DFTRAMBYP, BMUXSEL_WENB[37]); + primitive = _mux mBMUXSEL_WENB38(mlc_bmuxsel, BMUX_WENB[38], DFTRAMBYP, BMUXSEL_WENB[38]); + primitive = _mux mBMUXSEL_WENB39(mlc_bmuxsel, BMUX_WENB[39], DFTRAMBYP, BMUXSEL_WENB[39]); + primitive = _mux mBMUXSEL_WENB40(mlc_bmuxsel, BMUX_WENB[40], DFTRAMBYP, BMUXSEL_WENB[40]); + primitive = _mux mBMUXSEL_WENB41(mlc_bmuxsel, BMUX_WENB[41], DFTRAMBYP, BMUXSEL_WENB[41]); + primitive = _mux mBMUXSEL_WENB42(mlc_bmuxsel, BMUX_WENB[42], DFTRAMBYP, BMUXSEL_WENB[42]); + primitive = _mux mBMUXSEL_WENB43(mlc_bmuxsel, BMUX_WENB[43], DFTRAMBYP, BMUXSEL_WENB[43]); + primitive = _mux mBMUXSEL_WENB44(mlc_bmuxsel, BMUX_WENB[44], DFTRAMBYP, BMUXSEL_WENB[44]); + primitive = _mux mBMUXSEL_WENB45(mlc_bmuxsel, BMUX_WENB[45], DFTRAMBYP, BMUXSEL_WENB[45]); + primitive = _mux mBMUXSEL_WENB46(mlc_bmuxsel, BMUX_WENB[46], DFTRAMBYP, BMUXSEL_WENB[46]); + primitive = _mux mBMUXSEL_WENB47(mlc_bmuxsel, BMUX_WENB[47], DFTRAMBYP, BMUXSEL_WENB[47]); + primitive = _mux mBMUXSEL_WENB48(mlc_bmuxsel, BMUX_WENB[48], DFTRAMBYP, BMUXSEL_WENB[48]); + primitive = _mux mBMUXSEL_WENB49(mlc_bmuxsel, BMUX_WENB[49], DFTRAMBYP, BMUXSEL_WENB[49]); + primitive = _mux mBMUXSEL_WENB50(mlc_bmuxsel, BMUX_WENB[50], DFTRAMBYP, BMUXSEL_WENB[50]); + primitive = _mux mBMUXSEL_WENB51(mlc_bmuxsel, BMUX_WENB[51], DFTRAMBYP, BMUXSEL_WENB[51]); + primitive = _mux mBMUXSEL_WENB52(mlc_bmuxsel, BMUX_WENB[52], DFTRAMBYP, BMUXSEL_WENB[52]); + primitive = _mux mBMUXSEL_WENB53(mlc_bmuxsel, BMUX_WENB[53], DFTRAMBYP, BMUXSEL_WENB[53]); + primitive = _mux mBMUXSEL_WENB54(mlc_bmuxsel, BMUX_WENB[54], DFTRAMBYP, BMUXSEL_WENB[54]); + primitive = _mux mBMUXSEL_WENB55(mlc_bmuxsel, BMUX_WENB[55], DFTRAMBYP, BMUXSEL_WENB[55]); + primitive = _mux mBMUXSEL_WENB56(mlc_bmuxsel, BMUX_WENB[56], DFTRAMBYP, BMUXSEL_WENB[56]); + primitive = _mux mBMUXSEL_WENB57(mlc_bmuxsel, BMUX_WENB[57], DFTRAMBYP, BMUXSEL_WENB[57]); + primitive = _mux mBMUXSEL_WENB58(mlc_bmuxsel, BMUX_WENB[58], DFTRAMBYP, BMUXSEL_WENB[58]); + primitive = _mux mBMUXSEL_WENB59(mlc_bmuxsel, BMUX_WENB[59], DFTRAMBYP, BMUXSEL_WENB[59]); + primitive = _mux mBMUXSEL_WENB60(mlc_bmuxsel, BMUX_WENB[60], DFTRAMBYP, BMUXSEL_WENB[60]); + primitive = _mux mBMUXSEL_WENB61(mlc_bmuxsel, BMUX_WENB[61], DFTRAMBYP, BMUXSEL_WENB[61]); + primitive = _mux mBMUXSEL_WENB62(mlc_bmuxsel, BMUX_WENB[62], DFTRAMBYP, BMUXSEL_WENB[62]); + primitive = _mux mBMUXSEL_WENB63(mlc_bmuxsel, BMUX_WENB[63], DFTRAMBYP, BMUXSEL_WENB[63]); + primitive = _mux mBMUXSEL_WENB64(mlc_bmuxsel, BMUX_WENB[64], DFTRAMBYP, BMUXSEL_WENB[64]); + primitive = _mux mBMUXSEL_WENB65(mlc_bmuxsel, BMUX_WENB[65], DFTRAMBYP, BMUXSEL_WENB[65]); + primitive = _mux mBMUXSEL_WENB66(mlc_bmuxsel, BMUX_WENB[66], DFTRAMBYP, BMUXSEL_WENB[66]); + primitive = _mux mBMUXSEL_WENB67(mlc_bmuxsel, BMUX_WENB[67], DFTRAMBYP, BMUXSEL_WENB[67]); + primitive = _mux mBMUXSEL_WENB68(mlc_bmuxsel, BMUX_WENB[68], DFTRAMBYP, BMUXSEL_WENB[68]); + primitive = _mux mBMUXSEL_WENB69(mlc_bmuxsel, BMUX_WENB[69], DFTRAMBYP, BMUXSEL_WENB[69]); + primitive = _mux mBMUXSEL_WENB70(mlc_bmuxsel, BMUX_WENB[70], DFTRAMBYP, BMUXSEL_WENB[70]); + primitive = _mux mBMUXSEL_WENB71(mlc_bmuxsel, BMUX_WENB[71], DFTRAMBYP, BMUXSEL_WENB[71]); + primitive = _mux mBMUXSEL_WENB72(mlc_bmuxsel, BMUX_WENB[72], DFTRAMBYP, BMUXSEL_WENB[72]); + primitive = _mux mBMUXSEL_WENB73(mlc_bmuxsel, BMUX_WENB[73], DFTRAMBYP, BMUXSEL_WENB[73]); + primitive = _mux mBMUXSEL_WENB74(mlc_bmuxsel, BMUX_WENB[74], DFTRAMBYP, BMUXSEL_WENB[74]); + primitive = _mux mBMUXSEL_WENB75(mlc_bmuxsel, BMUX_WENB[75], DFTRAMBYP, BMUXSEL_WENB[75]); + primitive = _mux mBMUXSEL_WENB76(mlc_bmuxsel, BMUX_WENB[76], DFTRAMBYP, BMUXSEL_WENB[76]); + primitive = _mux mBMUXSEL_WENB77(mlc_bmuxsel, BMUX_WENB[77], DFTRAMBYP, BMUXSEL_WENB[77]); + primitive = _mux mBMUXSEL_WENB78(mlc_bmuxsel, BMUX_WENB[78], DFTRAMBYP, BMUXSEL_WENB[78]); + primitive = _mux mBMUXSEL_WENB79(mlc_bmuxsel, BMUX_WENB[79], DFTRAMBYP, BMUXSEL_WENB[79]); + primitive = _mux mBMUXSEL_WENB80(mlc_bmuxsel, BMUX_WENB[80], DFTRAMBYP, BMUXSEL_WENB[80]); + primitive = _mux mBMUXSEL_WENB81(mlc_bmuxsel, BMUX_WENB[81], DFTRAMBYP, BMUXSEL_WENB[81]); + primitive = _mux mBMUXSEL_WENB82(mlc_bmuxsel, BMUX_WENB[82], DFTRAMBYP, BMUXSEL_WENB[82]); + primitive = _mux mBMUXSEL_WENB83(mlc_bmuxsel, BMUX_WENB[83], DFTRAMBYP, BMUXSEL_WENB[83]); + primitive = _mux mBMUXSEL_WENB84(mlc_bmuxsel, BMUX_WENB[84], DFTRAMBYP, BMUXSEL_WENB[84]); + primitive = _mux mBMUXSEL_WENB85(mlc_bmuxsel, BMUX_WENB[85], DFTRAMBYP, BMUXSEL_WENB[85]); + primitive = _mux mBMUXSEL_WENB86(mlc_bmuxsel, BMUX_WENB[86], DFTRAMBYP, BMUXSEL_WENB[86]); + primitive = _mux mBMUXSEL_WENB87(mlc_bmuxsel, BMUX_WENB[87], DFTRAMBYP, BMUXSEL_WENB[87]); + primitive = _mux mBMUXSEL_WENB88(mlc_bmuxsel, BMUX_WENB[88], DFTRAMBYP, BMUXSEL_WENB[88]); + primitive = _mux mBMUXSEL_WENB89(mlc_bmuxsel, BMUX_WENB[89], DFTRAMBYP, BMUXSEL_WENB[89]); + primitive = _mux mBMUXSEL_WENB90(mlc_bmuxsel, BMUX_WENB[90], DFTRAMBYP, BMUXSEL_WENB[90]); + primitive = _mux mBMUXSEL_WENB91(mlc_bmuxsel, BMUX_WENB[91], DFTRAMBYP, BMUXSEL_WENB[91]); + primitive = _mux mBMUXSEL_WENB92(mlc_bmuxsel, BMUX_WENB[92], DFTRAMBYP, BMUXSEL_WENB[92]); + primitive = _mux mBMUXSEL_WENB93(mlc_bmuxsel, BMUX_WENB[93], DFTRAMBYP, BMUXSEL_WENB[93]); + primitive = _mux mBMUXSEL_WENB94(mlc_bmuxsel, BMUX_WENB[94], DFTRAMBYP, BMUXSEL_WENB[94]); + primitive = _mux mBMUXSEL_WENB95(mlc_bmuxsel, BMUX_WENB[95], DFTRAMBYP, BMUXSEL_WENB[95]); + primitive = _mux mBMUXSEL_WENB96(mlc_bmuxsel, BMUX_WENB[96], DFTRAMBYP, BMUXSEL_WENB[96]); + primitive = _mux mBMUXSEL_WENB97(mlc_bmuxsel, BMUX_WENB[97], DFTRAMBYP, BMUXSEL_WENB[97]); + primitive = _mux mBMUXSEL_WENB98(mlc_bmuxsel, BMUX_WENB[98], DFTRAMBYP, BMUXSEL_WENB[98]); + primitive = _mux mBMUXSEL_WENB99(mlc_bmuxsel, BMUX_WENB[99], DFTRAMBYP, BMUXSEL_WENB[99]); + primitive = _mux mBMUXSEL_WENB100(mlc_bmuxsel, BMUX_WENB[100], DFTRAMBYP, BMUXSEL_WENB[100]); + primitive = _mux mBMUXSEL_WENB101(mlc_bmuxsel, BMUX_WENB[101], DFTRAMBYP, BMUXSEL_WENB[101]); + primitive = _mux mBMUXSEL_WENB102(mlc_bmuxsel, BMUX_WENB[102], DFTRAMBYP, BMUXSEL_WENB[102]); + primitive = _mux mBMUXSEL_WENB103(mlc_bmuxsel, BMUX_WENB[103], DFTRAMBYP, BMUXSEL_WENB[103]); + primitive = _mux mBMUXSEL_WENB104(mlc_bmuxsel, BMUX_WENB[104], DFTRAMBYP, BMUXSEL_WENB[104]); + primitive = _mux mBMUXSEL_WENB105(mlc_bmuxsel, BMUX_WENB[105], DFTRAMBYP, BMUXSEL_WENB[105]); + primitive = _mux mBMUXSEL_WENB106(mlc_bmuxsel, BMUX_WENB[106], DFTRAMBYP, BMUXSEL_WENB[106]); + primitive = _mux mBMUXSEL_WENB107(mlc_bmuxsel, BMUX_WENB[107], DFTRAMBYP, BMUXSEL_WENB[107]); + primitive = _mux mBMUXSEL_WENB108(mlc_bmuxsel, BMUX_WENB[108], DFTRAMBYP, BMUXSEL_WENB[108]); + primitive = _mux mBMUXSEL_WENB109(mlc_bmuxsel, BMUX_WENB[109], DFTRAMBYP, BMUXSEL_WENB[109]); + primitive = _mux mBMUXSEL_WENB110(mlc_bmuxsel, BMUX_WENB[110], DFTRAMBYP, BMUXSEL_WENB[110]); + primitive = _mux mBMUXSEL_WENB111(mlc_bmuxsel, BMUX_WENB[111], DFTRAMBYP, BMUXSEL_WENB[111]); + primitive = _mux mBMUXSEL_WENB112(mlc_bmuxsel, BMUX_WENB[112], DFTRAMBYP, BMUXSEL_WENB[112]); + primitive = _mux mBMUXSEL_WENB113(mlc_bmuxsel, BMUX_WENB[113], DFTRAMBYP, BMUXSEL_WENB[113]); + primitive = _mux mBMUXSEL_WENB114(mlc_bmuxsel, BMUX_WENB[114], DFTRAMBYP, BMUXSEL_WENB[114]); + primitive = _mux mBMUXSEL_WENB115(mlc_bmuxsel, BMUX_WENB[115], DFTRAMBYP, BMUXSEL_WENB[115]); + primitive = _mux mBMUXSEL_WENB116(mlc_bmuxsel, BMUX_WENB[116], DFTRAMBYP, BMUXSEL_WENB[116]); + primitive = _mux mBMUXSEL_WENB117(mlc_bmuxsel, BMUX_WENB[117], DFTRAMBYP, BMUXSEL_WENB[117]); + primitive = _mux mBMUXSEL_WENB118(mlc_bmuxsel, BMUX_WENB[118], DFTRAMBYP, BMUXSEL_WENB[118]); + primitive = _mux mBMUXSEL_WENB119(mlc_bmuxsel, BMUX_WENB[119], DFTRAMBYP, BMUXSEL_WENB[119]); + primitive = _mux mBMUXSEL_WENB120(mlc_bmuxsel, BMUX_WENB[120], DFTRAMBYP, BMUXSEL_WENB[120]); + primitive = _mux mBMUXSEL_WENB121(mlc_bmuxsel, BMUX_WENB[121], DFTRAMBYP, BMUXSEL_WENB[121]); + primitive = _mux mBMUXSEL_WENB122(mlc_bmuxsel, BMUX_WENB[122], DFTRAMBYP, BMUXSEL_WENB[122]); + primitive = _mux mBMUXSEL_WENB123(mlc_bmuxsel, BMUX_WENB[123], DFTRAMBYP, BMUXSEL_WENB[123]); + primitive = _mux mBMUXSEL_WENB124(mlc_bmuxsel, BMUX_WENB[124], DFTRAMBYP, BMUXSEL_WENB[124]); + primitive = _mux mBMUXSEL_WENB125(mlc_bmuxsel, BMUX_WENB[125], DFTRAMBYP, BMUXSEL_WENB[125]); + primitive = _mux mBMUXSEL_WENB126(mlc_bmuxsel, BMUX_WENB[126], DFTRAMBYP, BMUXSEL_WENB[126]); + primitive = _mux mBMUXSEL_WENB127(mlc_bmuxsel, BMUX_WENB[127], DFTRAMBYP, BMUXSEL_WENB[127]); + ) + + output (WENYB) ( array = 127 : 0; + primitive = _buf bWENYB0(BMUXSEL_WENB[0], WENYB[0]); + primitive = _buf bWENYB1(BMUXSEL_WENB[1], WENYB[1]); + primitive = _buf bWENYB2(BMUXSEL_WENB[2], WENYB[2]); + primitive = _buf bWENYB3(BMUXSEL_WENB[3], WENYB[3]); + primitive = _buf bWENYB4(BMUXSEL_WENB[4], WENYB[4]); + primitive = _buf bWENYB5(BMUXSEL_WENB[5], WENYB[5]); + primitive = _buf bWENYB6(BMUXSEL_WENB[6], WENYB[6]); + primitive = _buf bWENYB7(BMUXSEL_WENB[7], WENYB[7]); + primitive = _buf bWENYB8(BMUXSEL_WENB[8], WENYB[8]); + primitive = _buf bWENYB9(BMUXSEL_WENB[9], WENYB[9]); + primitive = _buf bWENYB10(BMUXSEL_WENB[10], WENYB[10]); + primitive = _buf bWENYB11(BMUXSEL_WENB[11], WENYB[11]); + primitive = _buf bWENYB12(BMUXSEL_WENB[12], WENYB[12]); + primitive = _buf bWENYB13(BMUXSEL_WENB[13], WENYB[13]); + primitive = _buf bWENYB14(BMUXSEL_WENB[14], WENYB[14]); + primitive = _buf bWENYB15(BMUXSEL_WENB[15], WENYB[15]); + primitive = _buf bWENYB16(BMUXSEL_WENB[16], WENYB[16]); + primitive = _buf bWENYB17(BMUXSEL_WENB[17], WENYB[17]); + primitive = _buf bWENYB18(BMUXSEL_WENB[18], WENYB[18]); + primitive = _buf bWENYB19(BMUXSEL_WENB[19], WENYB[19]); + primitive = _buf bWENYB20(BMUXSEL_WENB[20], WENYB[20]); + primitive = _buf bWENYB21(BMUXSEL_WENB[21], WENYB[21]); + primitive = _buf bWENYB22(BMUXSEL_WENB[22], WENYB[22]); + primitive = _buf bWENYB23(BMUXSEL_WENB[23], WENYB[23]); + primitive = _buf bWENYB24(BMUXSEL_WENB[24], WENYB[24]); + primitive = _buf bWENYB25(BMUXSEL_WENB[25], WENYB[25]); + primitive = _buf bWENYB26(BMUXSEL_WENB[26], WENYB[26]); + primitive = _buf bWENYB27(BMUXSEL_WENB[27], WENYB[27]); + primitive = _buf bWENYB28(BMUXSEL_WENB[28], WENYB[28]); + primitive = _buf bWENYB29(BMUXSEL_WENB[29], WENYB[29]); + primitive = _buf bWENYB30(BMUXSEL_WENB[30], WENYB[30]); + primitive = _buf bWENYB31(BMUXSEL_WENB[31], WENYB[31]); + primitive = _buf bWENYB32(BMUXSEL_WENB[32], WENYB[32]); + primitive = _buf bWENYB33(BMUXSEL_WENB[33], WENYB[33]); + primitive = _buf bWENYB34(BMUXSEL_WENB[34], WENYB[34]); + primitive = _buf bWENYB35(BMUXSEL_WENB[35], WENYB[35]); + primitive = _buf bWENYB36(BMUXSEL_WENB[36], WENYB[36]); + primitive = _buf bWENYB37(BMUXSEL_WENB[37], WENYB[37]); + primitive = _buf bWENYB38(BMUXSEL_WENB[38], WENYB[38]); + primitive = _buf bWENYB39(BMUXSEL_WENB[39], WENYB[39]); + primitive = _buf bWENYB40(BMUXSEL_WENB[40], WENYB[40]); + primitive = _buf bWENYB41(BMUXSEL_WENB[41], WENYB[41]); + primitive = _buf bWENYB42(BMUXSEL_WENB[42], WENYB[42]); + primitive = _buf bWENYB43(BMUXSEL_WENB[43], WENYB[43]); + primitive = _buf bWENYB44(BMUXSEL_WENB[44], WENYB[44]); + primitive = _buf bWENYB45(BMUXSEL_WENB[45], WENYB[45]); + primitive = _buf bWENYB46(BMUXSEL_WENB[46], WENYB[46]); + primitive = _buf bWENYB47(BMUXSEL_WENB[47], WENYB[47]); + primitive = _buf bWENYB48(BMUXSEL_WENB[48], WENYB[48]); + primitive = _buf bWENYB49(BMUXSEL_WENB[49], WENYB[49]); + primitive = _buf bWENYB50(BMUXSEL_WENB[50], WENYB[50]); + primitive = _buf bWENYB51(BMUXSEL_WENB[51], WENYB[51]); + primitive = _buf bWENYB52(BMUXSEL_WENB[52], WENYB[52]); + primitive = _buf bWENYB53(BMUXSEL_WENB[53], WENYB[53]); + primitive = _buf bWENYB54(BMUXSEL_WENB[54], WENYB[54]); + primitive = _buf bWENYB55(BMUXSEL_WENB[55], WENYB[55]); + primitive = _buf bWENYB56(BMUXSEL_WENB[56], WENYB[56]); + primitive = _buf bWENYB57(BMUXSEL_WENB[57], WENYB[57]); + primitive = _buf bWENYB58(BMUXSEL_WENB[58], WENYB[58]); + primitive = _buf bWENYB59(BMUXSEL_WENB[59], WENYB[59]); + primitive = _buf bWENYB60(BMUXSEL_WENB[60], WENYB[60]); + primitive = _buf bWENYB61(BMUXSEL_WENB[61], WENYB[61]); + primitive = _buf bWENYB62(BMUXSEL_WENB[62], WENYB[62]); + primitive = _buf bWENYB63(BMUXSEL_WENB[63], WENYB[63]); + primitive = _buf bWENYB64(BMUXSEL_WENB[64], WENYB[64]); + primitive = _buf bWENYB65(BMUXSEL_WENB[65], WENYB[65]); + primitive = _buf bWENYB66(BMUXSEL_WENB[66], WENYB[66]); + primitive = _buf bWENYB67(BMUXSEL_WENB[67], WENYB[67]); + primitive = _buf bWENYB68(BMUXSEL_WENB[68], WENYB[68]); + primitive = _buf bWENYB69(BMUXSEL_WENB[69], WENYB[69]); + primitive = _buf bWENYB70(BMUXSEL_WENB[70], WENYB[70]); + primitive = _buf bWENYB71(BMUXSEL_WENB[71], WENYB[71]); + primitive = _buf bWENYB72(BMUXSEL_WENB[72], WENYB[72]); + primitive = _buf bWENYB73(BMUXSEL_WENB[73], WENYB[73]); + primitive = _buf bWENYB74(BMUXSEL_WENB[74], WENYB[74]); + primitive = _buf bWENYB75(BMUXSEL_WENB[75], WENYB[75]); + primitive = _buf bWENYB76(BMUXSEL_WENB[76], WENYB[76]); + primitive = _buf bWENYB77(BMUXSEL_WENB[77], WENYB[77]); + primitive = _buf bWENYB78(BMUXSEL_WENB[78], WENYB[78]); + primitive = _buf bWENYB79(BMUXSEL_WENB[79], WENYB[79]); + primitive = _buf bWENYB80(BMUXSEL_WENB[80], WENYB[80]); + primitive = _buf bWENYB81(BMUXSEL_WENB[81], WENYB[81]); + primitive = _buf bWENYB82(BMUXSEL_WENB[82], WENYB[82]); + primitive = _buf bWENYB83(BMUXSEL_WENB[83], WENYB[83]); + primitive = _buf bWENYB84(BMUXSEL_WENB[84], WENYB[84]); + primitive = _buf bWENYB85(BMUXSEL_WENB[85], WENYB[85]); + primitive = _buf bWENYB86(BMUXSEL_WENB[86], WENYB[86]); + primitive = _buf bWENYB87(BMUXSEL_WENB[87], WENYB[87]); + primitive = _buf bWENYB88(BMUXSEL_WENB[88], WENYB[88]); + primitive = _buf bWENYB89(BMUXSEL_WENB[89], WENYB[89]); + primitive = _buf bWENYB90(BMUXSEL_WENB[90], WENYB[90]); + primitive = _buf bWENYB91(BMUXSEL_WENB[91], WENYB[91]); + primitive = _buf bWENYB92(BMUXSEL_WENB[92], WENYB[92]); + primitive = _buf bWENYB93(BMUXSEL_WENB[93], WENYB[93]); + primitive = _buf bWENYB94(BMUXSEL_WENB[94], WENYB[94]); + primitive = _buf bWENYB95(BMUXSEL_WENB[95], WENYB[95]); + primitive = _buf bWENYB96(BMUXSEL_WENB[96], WENYB[96]); + primitive = _buf bWENYB97(BMUXSEL_WENB[97], WENYB[97]); + primitive = _buf bWENYB98(BMUXSEL_WENB[98], WENYB[98]); + primitive = _buf bWENYB99(BMUXSEL_WENB[99], WENYB[99]); + primitive = _buf bWENYB100(BMUXSEL_WENB[100], WENYB[100]); + primitive = _buf bWENYB101(BMUXSEL_WENB[101], WENYB[101]); + primitive = _buf bWENYB102(BMUXSEL_WENB[102], WENYB[102]); + primitive = _buf bWENYB103(BMUXSEL_WENB[103], WENYB[103]); + primitive = _buf bWENYB104(BMUXSEL_WENB[104], WENYB[104]); + primitive = _buf bWENYB105(BMUXSEL_WENB[105], WENYB[105]); + primitive = _buf bWENYB106(BMUXSEL_WENB[106], WENYB[106]); + primitive = _buf bWENYB107(BMUXSEL_WENB[107], WENYB[107]); + primitive = _buf bWENYB108(BMUXSEL_WENB[108], WENYB[108]); + primitive = _buf bWENYB109(BMUXSEL_WENB[109], WENYB[109]); + primitive = _buf bWENYB110(BMUXSEL_WENB[110], WENYB[110]); + primitive = _buf bWENYB111(BMUXSEL_WENB[111], WENYB[111]); + primitive = _buf bWENYB112(BMUXSEL_WENB[112], WENYB[112]); + primitive = _buf bWENYB113(BMUXSEL_WENB[113], WENYB[113]); + primitive = _buf bWENYB114(BMUXSEL_WENB[114], WENYB[114]); + primitive = _buf bWENYB115(BMUXSEL_WENB[115], WENYB[115]); + primitive = _buf bWENYB116(BMUXSEL_WENB[116], WENYB[116]); + primitive = _buf bWENYB117(BMUXSEL_WENB[117], WENYB[117]); + primitive = _buf bWENYB118(BMUXSEL_WENB[118], WENYB[118]); + primitive = _buf bWENYB119(BMUXSEL_WENB[119], WENYB[119]); + primitive = _buf bWENYB120(BMUXSEL_WENB[120], WENYB[120]); + primitive = _buf bWENYB121(BMUXSEL_WENB[121], WENYB[121]); + primitive = _buf bWENYB122(BMUXSEL_WENB[122], WENYB[122]); + primitive = _buf bWENYB123(BMUXSEL_WENB[123], WENYB[123]); + primitive = _buf bWENYB124(BMUXSEL_WENB[124], WENYB[124]); + primitive = _buf bWENYB125(BMUXSEL_WENB[125], WENYB[125]); + primitive = _buf bWENYB126(BMUXSEL_WENB[126], WENYB[126]); + primitive = _buf bWENYB127(BMUXSEL_WENB[127], WENYB[127]); + ) + + intern (BMUX_CENB) (primitive = _mux mBMUX_CENB(TCENB, CENB, TENB, BMUX_CENB);) + intern (BMUXSEL_CENB) (primitive = _mux mBMUXSEL_CENB(mlc_bmuxsel, BMUX_CENB, DFTRAMBYP, BMUXSEL_CENB);) + output (CENYB) (primitive = _buf bCENYB(BMUXSEL_CENB, CENYB);) + intern (BMUX_AB_n) (array = 4 : 1; + primitive = _inv iBMUX_AB_n1 ( BMUX_AB[1], BMUX_AB_n[1] ); + primitive = _inv iBMUX_AB_n2 ( BMUX_AB[2], BMUX_AB_n[2] ); + primitive = _inv iBMUX_AB_n3 ( BMUX_AB[3], BMUX_AB_n[3] ); + primitive = _inv iBMUX_AB_n4 ( BMUX_AB[4], BMUX_AB_n[4] ); + ) + + intern (B_max) (array = 4 : 0; + primitive = _tie1 bB_max0 ( B_max[0] ); + primitive = _tie1 bB_max1 ( B_max[1] ); + primitive = _tie1 bB_max2 ( B_max[2] ); + primitive = _tie1 bB_max3 ( B_max[3] ); + primitive = _tie1 bB_max4 ( B_max[4] ); + ) + + intern (B_max_n) (array = 4 : 0; + primitive = _inv bB_max_n0( B_max[0], B_max_n[0] ); + primitive = _inv bB_max_n1( B_max[1], B_max_n[1] ); + primitive = _inv bB_max_n2( B_max[2], B_max_n[2] ); + primitive = _inv bB_max_n3( B_max[3], B_max_n[3] ); + primitive = _inv bB_max_n4( B_max[4], B_max_n[4] ); + ) + + intern (AB_m) (array = 4 : 0; + primitive = _and aAB_m0(BMUX_AB[0], B_max_n[0], AB_m[0] ); + primitive = _and aAB_m1(BMUX_AB[1], B_max_n[1], AB_m[1] ); + primitive = _and aAB_m2(BMUX_AB[2], B_max_n[2], AB_m[2] ); + primitive = _and aAB_m3(BMUX_AB[3], B_max_n[3], AB_m[3] ); + primitive = _and aAB_m4(BMUX_AB[4], B_max_n[4], AB_m[4] ); + ) + + intern (m_AB) (array = 4 : 1; + primitive = _and am_AB1(BMUX_AB_n[1], B_max[1], m_AB[1] ); + primitive = _and am_AB2(BMUX_AB_n[2], B_max[2], m_AB[2] ); + primitive = _and am_AB3(BMUX_AB_n[3], B_max[3], m_AB[3] ); + primitive = _and am_AB4(BMUX_AB_n[4], B_max[4], m_AB[4] ); + ) + + intern (EQ_B) (array = 4 : 1; + primitive = _nor nEQ_B1(m_AB[1], AB_m[1], EQ_B[1] ); + primitive = _nor nEQ_B2(m_AB[2], AB_m[2], EQ_B[2] ); + primitive = _nor nEQ_B3(m_AB[3], AB_m[3], EQ_B[3] ); + primitive = _nor nEQ_B4(m_AB[4], AB_m[4], EQ_B[4] ); + ) + + intern (XoutBi) (array = 3 : 0; + primitive = _and aXoutBi0(AB_m[0], EQ_B[4], EQ_B[3], EQ_B[2], EQ_B[1], XoutBi[0]); + primitive = _and aXoutBi1(AB_m[1], EQ_B[4], EQ_B[3], EQ_B[2], XoutBi[1]); + primitive = _and aXoutBi2(AB_m[2], EQ_B[4], EQ_B[3], XoutBi[2]); + primitive = _and aXoutBi3(AB_m[3], EQ_B[4], XoutBi[3]); + ) + intern (XoutBifTemp) (primitive = _or oXoutBifTemp (AB_m[4], XoutBi[0], XoutBi[1], XoutBi[2], XoutBi[3], XoutBifTemp);) + intern (XoutBif) (primitive = _and oXoutBif (XoutBifTemp, NOT_CENB, XoutBif);) + + intern (nscanshiftB) ( + primitive = _nor nnscanshiftB (DFTRAMBYP, SEB, nscanshiftB);) + intern (XoutaddrB) ( + primitive = _and aXoutaddrB (nscanshiftB, XoutBif, XoutaddrB);) + intern (XoutBiff) ( + primitive = _or oXoutBiff (XoutaddrB, XoutB, XoutBiff);) + + intern (SPLIT_WENB) (array = 127 : 0; + primitive = _buf bSPLIT_WENB0(BMUX_WENB[0], SPLIT_WENB[0]); + primitive = _buf bSPLIT_WENB1(BMUX_WENB[1], SPLIT_WENB[1]); + primitive = _buf bSPLIT_WENB2(BMUX_WENB[2], SPLIT_WENB[2]); + primitive = _buf bSPLIT_WENB3(BMUX_WENB[3], SPLIT_WENB[3]); + primitive = _buf bSPLIT_WENB4(BMUX_WENB[4], SPLIT_WENB[4]); + primitive = _buf bSPLIT_WENB5(BMUX_WENB[5], SPLIT_WENB[5]); + primitive = _buf bSPLIT_WENB6(BMUX_WENB[6], SPLIT_WENB[6]); + primitive = _buf bSPLIT_WENB7(BMUX_WENB[7], SPLIT_WENB[7]); + primitive = _buf bSPLIT_WENB8(BMUX_WENB[8], SPLIT_WENB[8]); + primitive = _buf bSPLIT_WENB9(BMUX_WENB[9], SPLIT_WENB[9]); + primitive = _buf bSPLIT_WENB10(BMUX_WENB[10], SPLIT_WENB[10]); + primitive = _buf bSPLIT_WENB11(BMUX_WENB[11], SPLIT_WENB[11]); + primitive = _buf bSPLIT_WENB12(BMUX_WENB[12], SPLIT_WENB[12]); + primitive = _buf bSPLIT_WENB13(BMUX_WENB[13], SPLIT_WENB[13]); + primitive = _buf bSPLIT_WENB14(BMUX_WENB[14], SPLIT_WENB[14]); + primitive = _buf bSPLIT_WENB15(BMUX_WENB[15], SPLIT_WENB[15]); + primitive = _buf bSPLIT_WENB16(BMUX_WENB[16], SPLIT_WENB[16]); + primitive = _buf bSPLIT_WENB17(BMUX_WENB[17], SPLIT_WENB[17]); + primitive = _buf bSPLIT_WENB18(BMUX_WENB[18], SPLIT_WENB[18]); + primitive = _buf bSPLIT_WENB19(BMUX_WENB[19], SPLIT_WENB[19]); + primitive = _buf bSPLIT_WENB20(BMUX_WENB[20], SPLIT_WENB[20]); + primitive = _buf bSPLIT_WENB21(BMUX_WENB[21], SPLIT_WENB[21]); + primitive = _buf bSPLIT_WENB22(BMUX_WENB[22], SPLIT_WENB[22]); + primitive = _buf bSPLIT_WENB23(BMUX_WENB[23], SPLIT_WENB[23]); + primitive = _buf bSPLIT_WENB24(BMUX_WENB[24], SPLIT_WENB[24]); + primitive = _buf bSPLIT_WENB25(BMUX_WENB[25], SPLIT_WENB[25]); + primitive = _buf bSPLIT_WENB26(BMUX_WENB[26], SPLIT_WENB[26]); + primitive = _buf bSPLIT_WENB27(BMUX_WENB[27], SPLIT_WENB[27]); + primitive = _buf bSPLIT_WENB28(BMUX_WENB[28], SPLIT_WENB[28]); + primitive = _buf bSPLIT_WENB29(BMUX_WENB[29], SPLIT_WENB[29]); + primitive = _buf bSPLIT_WENB30(BMUX_WENB[30], SPLIT_WENB[30]); + primitive = _buf bSPLIT_WENB31(BMUX_WENB[31], SPLIT_WENB[31]); + primitive = _buf bSPLIT_WENB32(BMUX_WENB[32], SPLIT_WENB[32]); + primitive = _buf bSPLIT_WENB33(BMUX_WENB[33], SPLIT_WENB[33]); + primitive = _buf bSPLIT_WENB34(BMUX_WENB[34], SPLIT_WENB[34]); + primitive = _buf bSPLIT_WENB35(BMUX_WENB[35], SPLIT_WENB[35]); + primitive = _buf bSPLIT_WENB36(BMUX_WENB[36], SPLIT_WENB[36]); + primitive = _buf bSPLIT_WENB37(BMUX_WENB[37], SPLIT_WENB[37]); + primitive = _buf bSPLIT_WENB38(BMUX_WENB[38], SPLIT_WENB[38]); + primitive = _buf bSPLIT_WENB39(BMUX_WENB[39], SPLIT_WENB[39]); + primitive = _buf bSPLIT_WENB40(BMUX_WENB[40], SPLIT_WENB[40]); + primitive = _buf bSPLIT_WENB41(BMUX_WENB[41], SPLIT_WENB[41]); + primitive = _buf bSPLIT_WENB42(BMUX_WENB[42], SPLIT_WENB[42]); + primitive = _buf bSPLIT_WENB43(BMUX_WENB[43], SPLIT_WENB[43]); + primitive = _buf bSPLIT_WENB44(BMUX_WENB[44], SPLIT_WENB[44]); + primitive = _buf bSPLIT_WENB45(BMUX_WENB[45], SPLIT_WENB[45]); + primitive = _buf bSPLIT_WENB46(BMUX_WENB[46], SPLIT_WENB[46]); + primitive = _buf bSPLIT_WENB47(BMUX_WENB[47], SPLIT_WENB[47]); + primitive = _buf bSPLIT_WENB48(BMUX_WENB[48], SPLIT_WENB[48]); + primitive = _buf bSPLIT_WENB49(BMUX_WENB[49], SPLIT_WENB[49]); + primitive = _buf bSPLIT_WENB50(BMUX_WENB[50], SPLIT_WENB[50]); + primitive = _buf bSPLIT_WENB51(BMUX_WENB[51], SPLIT_WENB[51]); + primitive = _buf bSPLIT_WENB52(BMUX_WENB[52], SPLIT_WENB[52]); + primitive = _buf bSPLIT_WENB53(BMUX_WENB[53], SPLIT_WENB[53]); + primitive = _buf bSPLIT_WENB54(BMUX_WENB[54], SPLIT_WENB[54]); + primitive = _buf bSPLIT_WENB55(BMUX_WENB[55], SPLIT_WENB[55]); + primitive = _buf bSPLIT_WENB56(BMUX_WENB[56], SPLIT_WENB[56]); + primitive = _buf bSPLIT_WENB57(BMUX_WENB[57], SPLIT_WENB[57]); + primitive = _buf bSPLIT_WENB58(BMUX_WENB[58], SPLIT_WENB[58]); + primitive = _buf bSPLIT_WENB59(BMUX_WENB[59], SPLIT_WENB[59]); + primitive = _buf bSPLIT_WENB60(BMUX_WENB[60], SPLIT_WENB[60]); + primitive = _buf bSPLIT_WENB61(BMUX_WENB[61], SPLIT_WENB[61]); + primitive = _buf bSPLIT_WENB62(BMUX_WENB[62], SPLIT_WENB[62]); + primitive = _buf bSPLIT_WENB63(BMUX_WENB[63], SPLIT_WENB[63]); + primitive = _buf bSPLIT_WENB64(BMUX_WENB[64], SPLIT_WENB[64]); + primitive = _buf bSPLIT_WENB65(BMUX_WENB[65], SPLIT_WENB[65]); + primitive = _buf bSPLIT_WENB66(BMUX_WENB[66], SPLIT_WENB[66]); + primitive = _buf bSPLIT_WENB67(BMUX_WENB[67], SPLIT_WENB[67]); + primitive = _buf bSPLIT_WENB68(BMUX_WENB[68], SPLIT_WENB[68]); + primitive = _buf bSPLIT_WENB69(BMUX_WENB[69], SPLIT_WENB[69]); + primitive = _buf bSPLIT_WENB70(BMUX_WENB[70], SPLIT_WENB[70]); + primitive = _buf bSPLIT_WENB71(BMUX_WENB[71], SPLIT_WENB[71]); + primitive = _buf bSPLIT_WENB72(BMUX_WENB[72], SPLIT_WENB[72]); + primitive = _buf bSPLIT_WENB73(BMUX_WENB[73], SPLIT_WENB[73]); + primitive = _buf bSPLIT_WENB74(BMUX_WENB[74], SPLIT_WENB[74]); + primitive = _buf bSPLIT_WENB75(BMUX_WENB[75], SPLIT_WENB[75]); + primitive = _buf bSPLIT_WENB76(BMUX_WENB[76], SPLIT_WENB[76]); + primitive = _buf bSPLIT_WENB77(BMUX_WENB[77], SPLIT_WENB[77]); + primitive = _buf bSPLIT_WENB78(BMUX_WENB[78], SPLIT_WENB[78]); + primitive = _buf bSPLIT_WENB79(BMUX_WENB[79], SPLIT_WENB[79]); + primitive = _buf bSPLIT_WENB80(BMUX_WENB[80], SPLIT_WENB[80]); + primitive = _buf bSPLIT_WENB81(BMUX_WENB[81], SPLIT_WENB[81]); + primitive = _buf bSPLIT_WENB82(BMUX_WENB[82], SPLIT_WENB[82]); + primitive = _buf bSPLIT_WENB83(BMUX_WENB[83], SPLIT_WENB[83]); + primitive = _buf bSPLIT_WENB84(BMUX_WENB[84], SPLIT_WENB[84]); + primitive = _buf bSPLIT_WENB85(BMUX_WENB[85], SPLIT_WENB[85]); + primitive = _buf bSPLIT_WENB86(BMUX_WENB[86], SPLIT_WENB[86]); + primitive = _buf bSPLIT_WENB87(BMUX_WENB[87], SPLIT_WENB[87]); + primitive = _buf bSPLIT_WENB88(BMUX_WENB[88], SPLIT_WENB[88]); + primitive = _buf bSPLIT_WENB89(BMUX_WENB[89], SPLIT_WENB[89]); + primitive = _buf bSPLIT_WENB90(BMUX_WENB[90], SPLIT_WENB[90]); + primitive = _buf bSPLIT_WENB91(BMUX_WENB[91], SPLIT_WENB[91]); + primitive = _buf bSPLIT_WENB92(BMUX_WENB[92], SPLIT_WENB[92]); + primitive = _buf bSPLIT_WENB93(BMUX_WENB[93], SPLIT_WENB[93]); + primitive = _buf bSPLIT_WENB94(BMUX_WENB[94], SPLIT_WENB[94]); + primitive = _buf bSPLIT_WENB95(BMUX_WENB[95], SPLIT_WENB[95]); + primitive = _buf bSPLIT_WENB96(BMUX_WENB[96], SPLIT_WENB[96]); + primitive = _buf bSPLIT_WENB97(BMUX_WENB[97], SPLIT_WENB[97]); + primitive = _buf bSPLIT_WENB98(BMUX_WENB[98], SPLIT_WENB[98]); + primitive = _buf bSPLIT_WENB99(BMUX_WENB[99], SPLIT_WENB[99]); + primitive = _buf bSPLIT_WENB100(BMUX_WENB[100], SPLIT_WENB[100]); + primitive = _buf bSPLIT_WENB101(BMUX_WENB[101], SPLIT_WENB[101]); + primitive = _buf bSPLIT_WENB102(BMUX_WENB[102], SPLIT_WENB[102]); + primitive = _buf bSPLIT_WENB103(BMUX_WENB[103], SPLIT_WENB[103]); + primitive = _buf bSPLIT_WENB104(BMUX_WENB[104], SPLIT_WENB[104]); + primitive = _buf bSPLIT_WENB105(BMUX_WENB[105], SPLIT_WENB[105]); + primitive = _buf bSPLIT_WENB106(BMUX_WENB[106], SPLIT_WENB[106]); + primitive = _buf bSPLIT_WENB107(BMUX_WENB[107], SPLIT_WENB[107]); + primitive = _buf bSPLIT_WENB108(BMUX_WENB[108], SPLIT_WENB[108]); + primitive = _buf bSPLIT_WENB109(BMUX_WENB[109], SPLIT_WENB[109]); + primitive = _buf bSPLIT_WENB110(BMUX_WENB[110], SPLIT_WENB[110]); + primitive = _buf bSPLIT_WENB111(BMUX_WENB[111], SPLIT_WENB[111]); + primitive = _buf bSPLIT_WENB112(BMUX_WENB[112], SPLIT_WENB[112]); + primitive = _buf bSPLIT_WENB113(BMUX_WENB[113], SPLIT_WENB[113]); + primitive = _buf bSPLIT_WENB114(BMUX_WENB[114], SPLIT_WENB[114]); + primitive = _buf bSPLIT_WENB115(BMUX_WENB[115], SPLIT_WENB[115]); + primitive = _buf bSPLIT_WENB116(BMUX_WENB[116], SPLIT_WENB[116]); + primitive = _buf bSPLIT_WENB117(BMUX_WENB[117], SPLIT_WENB[117]); + primitive = _buf bSPLIT_WENB118(BMUX_WENB[118], SPLIT_WENB[118]); + primitive = _buf bSPLIT_WENB119(BMUX_WENB[119], SPLIT_WENB[119]); + primitive = _buf bSPLIT_WENB120(BMUX_WENB[120], SPLIT_WENB[120]); + primitive = _buf bSPLIT_WENB121(BMUX_WENB[121], SPLIT_WENB[121]); + primitive = _buf bSPLIT_WENB122(BMUX_WENB[122], SPLIT_WENB[122]); + primitive = _buf bSPLIT_WENB123(BMUX_WENB[123], SPLIT_WENB[123]); + primitive = _buf bSPLIT_WENB124(BMUX_WENB[124], SPLIT_WENB[124]); + primitive = _buf bSPLIT_WENB125(BMUX_WENB[125], SPLIT_WENB[125]); + primitive = _buf bSPLIT_WENB126(BMUX_WENB[126], SPLIT_WENB[126]); + primitive = _buf bSPLIT_WENB127(BMUX_WENB[127], SPLIT_WENB[127]); + ) + intern (NOT_CENB) (primitive = _inv iNOT_CENB(BMUX_CENB, NOT_CENB);) + intern (NOT_SPLIT_WENB) (array = 127 : 0; + primitive = _inv iNOT_SPLIT_WENB0(SPLIT_WENB[0], NOT_SPLIT_WENB[0]); + primitive = _inv iNOT_SPLIT_WENB1(SPLIT_WENB[1], NOT_SPLIT_WENB[1]); + primitive = _inv iNOT_SPLIT_WENB2(SPLIT_WENB[2], NOT_SPLIT_WENB[2]); + primitive = _inv iNOT_SPLIT_WENB3(SPLIT_WENB[3], NOT_SPLIT_WENB[3]); + primitive = _inv iNOT_SPLIT_WENB4(SPLIT_WENB[4], NOT_SPLIT_WENB[4]); + primitive = _inv iNOT_SPLIT_WENB5(SPLIT_WENB[5], NOT_SPLIT_WENB[5]); + primitive = _inv iNOT_SPLIT_WENB6(SPLIT_WENB[6], NOT_SPLIT_WENB[6]); + primitive = _inv iNOT_SPLIT_WENB7(SPLIT_WENB[7], NOT_SPLIT_WENB[7]); + primitive = _inv iNOT_SPLIT_WENB8(SPLIT_WENB[8], NOT_SPLIT_WENB[8]); + primitive = _inv iNOT_SPLIT_WENB9(SPLIT_WENB[9], NOT_SPLIT_WENB[9]); + primitive = _inv iNOT_SPLIT_WENB10(SPLIT_WENB[10], NOT_SPLIT_WENB[10]); + primitive = _inv iNOT_SPLIT_WENB11(SPLIT_WENB[11], NOT_SPLIT_WENB[11]); + primitive = _inv iNOT_SPLIT_WENB12(SPLIT_WENB[12], NOT_SPLIT_WENB[12]); + primitive = _inv iNOT_SPLIT_WENB13(SPLIT_WENB[13], NOT_SPLIT_WENB[13]); + primitive = _inv iNOT_SPLIT_WENB14(SPLIT_WENB[14], NOT_SPLIT_WENB[14]); + primitive = _inv iNOT_SPLIT_WENB15(SPLIT_WENB[15], NOT_SPLIT_WENB[15]); + primitive = _inv iNOT_SPLIT_WENB16(SPLIT_WENB[16], NOT_SPLIT_WENB[16]); + primitive = _inv iNOT_SPLIT_WENB17(SPLIT_WENB[17], NOT_SPLIT_WENB[17]); + primitive = _inv iNOT_SPLIT_WENB18(SPLIT_WENB[18], NOT_SPLIT_WENB[18]); + primitive = _inv iNOT_SPLIT_WENB19(SPLIT_WENB[19], NOT_SPLIT_WENB[19]); + primitive = _inv iNOT_SPLIT_WENB20(SPLIT_WENB[20], NOT_SPLIT_WENB[20]); + primitive = _inv iNOT_SPLIT_WENB21(SPLIT_WENB[21], NOT_SPLIT_WENB[21]); + primitive = _inv iNOT_SPLIT_WENB22(SPLIT_WENB[22], NOT_SPLIT_WENB[22]); + primitive = _inv iNOT_SPLIT_WENB23(SPLIT_WENB[23], NOT_SPLIT_WENB[23]); + primitive = _inv iNOT_SPLIT_WENB24(SPLIT_WENB[24], NOT_SPLIT_WENB[24]); + primitive = _inv iNOT_SPLIT_WENB25(SPLIT_WENB[25], NOT_SPLIT_WENB[25]); + primitive = _inv iNOT_SPLIT_WENB26(SPLIT_WENB[26], NOT_SPLIT_WENB[26]); + primitive = _inv iNOT_SPLIT_WENB27(SPLIT_WENB[27], NOT_SPLIT_WENB[27]); + primitive = _inv iNOT_SPLIT_WENB28(SPLIT_WENB[28], NOT_SPLIT_WENB[28]); + primitive = _inv iNOT_SPLIT_WENB29(SPLIT_WENB[29], NOT_SPLIT_WENB[29]); + primitive = _inv iNOT_SPLIT_WENB30(SPLIT_WENB[30], NOT_SPLIT_WENB[30]); + primitive = _inv iNOT_SPLIT_WENB31(SPLIT_WENB[31], NOT_SPLIT_WENB[31]); + primitive = _inv iNOT_SPLIT_WENB32(SPLIT_WENB[32], NOT_SPLIT_WENB[32]); + primitive = _inv iNOT_SPLIT_WENB33(SPLIT_WENB[33], NOT_SPLIT_WENB[33]); + primitive = _inv iNOT_SPLIT_WENB34(SPLIT_WENB[34], NOT_SPLIT_WENB[34]); + primitive = _inv iNOT_SPLIT_WENB35(SPLIT_WENB[35], NOT_SPLIT_WENB[35]); + primitive = _inv iNOT_SPLIT_WENB36(SPLIT_WENB[36], NOT_SPLIT_WENB[36]); + primitive = _inv iNOT_SPLIT_WENB37(SPLIT_WENB[37], NOT_SPLIT_WENB[37]); + primitive = _inv iNOT_SPLIT_WENB38(SPLIT_WENB[38], NOT_SPLIT_WENB[38]); + primitive = _inv iNOT_SPLIT_WENB39(SPLIT_WENB[39], NOT_SPLIT_WENB[39]); + primitive = _inv iNOT_SPLIT_WENB40(SPLIT_WENB[40], NOT_SPLIT_WENB[40]); + primitive = _inv iNOT_SPLIT_WENB41(SPLIT_WENB[41], NOT_SPLIT_WENB[41]); + primitive = _inv iNOT_SPLIT_WENB42(SPLIT_WENB[42], NOT_SPLIT_WENB[42]); + primitive = _inv iNOT_SPLIT_WENB43(SPLIT_WENB[43], NOT_SPLIT_WENB[43]); + primitive = _inv iNOT_SPLIT_WENB44(SPLIT_WENB[44], NOT_SPLIT_WENB[44]); + primitive = _inv iNOT_SPLIT_WENB45(SPLIT_WENB[45], NOT_SPLIT_WENB[45]); + primitive = _inv iNOT_SPLIT_WENB46(SPLIT_WENB[46], NOT_SPLIT_WENB[46]); + primitive = _inv iNOT_SPLIT_WENB47(SPLIT_WENB[47], NOT_SPLIT_WENB[47]); + primitive = _inv iNOT_SPLIT_WENB48(SPLIT_WENB[48], NOT_SPLIT_WENB[48]); + primitive = _inv iNOT_SPLIT_WENB49(SPLIT_WENB[49], NOT_SPLIT_WENB[49]); + primitive = _inv iNOT_SPLIT_WENB50(SPLIT_WENB[50], NOT_SPLIT_WENB[50]); + primitive = _inv iNOT_SPLIT_WENB51(SPLIT_WENB[51], NOT_SPLIT_WENB[51]); + primitive = _inv iNOT_SPLIT_WENB52(SPLIT_WENB[52], NOT_SPLIT_WENB[52]); + primitive = _inv iNOT_SPLIT_WENB53(SPLIT_WENB[53], NOT_SPLIT_WENB[53]); + primitive = _inv iNOT_SPLIT_WENB54(SPLIT_WENB[54], NOT_SPLIT_WENB[54]); + primitive = _inv iNOT_SPLIT_WENB55(SPLIT_WENB[55], NOT_SPLIT_WENB[55]); + primitive = _inv iNOT_SPLIT_WENB56(SPLIT_WENB[56], NOT_SPLIT_WENB[56]); + primitive = _inv iNOT_SPLIT_WENB57(SPLIT_WENB[57], NOT_SPLIT_WENB[57]); + primitive = _inv iNOT_SPLIT_WENB58(SPLIT_WENB[58], NOT_SPLIT_WENB[58]); + primitive = _inv iNOT_SPLIT_WENB59(SPLIT_WENB[59], NOT_SPLIT_WENB[59]); + primitive = _inv iNOT_SPLIT_WENB60(SPLIT_WENB[60], NOT_SPLIT_WENB[60]); + primitive = _inv iNOT_SPLIT_WENB61(SPLIT_WENB[61], NOT_SPLIT_WENB[61]); + primitive = _inv iNOT_SPLIT_WENB62(SPLIT_WENB[62], NOT_SPLIT_WENB[62]); + primitive = _inv iNOT_SPLIT_WENB63(SPLIT_WENB[63], NOT_SPLIT_WENB[63]); + primitive = _inv iNOT_SPLIT_WENB64(SPLIT_WENB[64], NOT_SPLIT_WENB[64]); + primitive = _inv iNOT_SPLIT_WENB65(SPLIT_WENB[65], NOT_SPLIT_WENB[65]); + primitive = _inv iNOT_SPLIT_WENB66(SPLIT_WENB[66], NOT_SPLIT_WENB[66]); + primitive = _inv iNOT_SPLIT_WENB67(SPLIT_WENB[67], NOT_SPLIT_WENB[67]); + primitive = _inv iNOT_SPLIT_WENB68(SPLIT_WENB[68], NOT_SPLIT_WENB[68]); + primitive = _inv iNOT_SPLIT_WENB69(SPLIT_WENB[69], NOT_SPLIT_WENB[69]); + primitive = _inv iNOT_SPLIT_WENB70(SPLIT_WENB[70], NOT_SPLIT_WENB[70]); + primitive = _inv iNOT_SPLIT_WENB71(SPLIT_WENB[71], NOT_SPLIT_WENB[71]); + primitive = _inv iNOT_SPLIT_WENB72(SPLIT_WENB[72], NOT_SPLIT_WENB[72]); + primitive = _inv iNOT_SPLIT_WENB73(SPLIT_WENB[73], NOT_SPLIT_WENB[73]); + primitive = _inv iNOT_SPLIT_WENB74(SPLIT_WENB[74], NOT_SPLIT_WENB[74]); + primitive = _inv iNOT_SPLIT_WENB75(SPLIT_WENB[75], NOT_SPLIT_WENB[75]); + primitive = _inv iNOT_SPLIT_WENB76(SPLIT_WENB[76], NOT_SPLIT_WENB[76]); + primitive = _inv iNOT_SPLIT_WENB77(SPLIT_WENB[77], NOT_SPLIT_WENB[77]); + primitive = _inv iNOT_SPLIT_WENB78(SPLIT_WENB[78], NOT_SPLIT_WENB[78]); + primitive = _inv iNOT_SPLIT_WENB79(SPLIT_WENB[79], NOT_SPLIT_WENB[79]); + primitive = _inv iNOT_SPLIT_WENB80(SPLIT_WENB[80], NOT_SPLIT_WENB[80]); + primitive = _inv iNOT_SPLIT_WENB81(SPLIT_WENB[81], NOT_SPLIT_WENB[81]); + primitive = _inv iNOT_SPLIT_WENB82(SPLIT_WENB[82], NOT_SPLIT_WENB[82]); + primitive = _inv iNOT_SPLIT_WENB83(SPLIT_WENB[83], NOT_SPLIT_WENB[83]); + primitive = _inv iNOT_SPLIT_WENB84(SPLIT_WENB[84], NOT_SPLIT_WENB[84]); + primitive = _inv iNOT_SPLIT_WENB85(SPLIT_WENB[85], NOT_SPLIT_WENB[85]); + primitive = _inv iNOT_SPLIT_WENB86(SPLIT_WENB[86], NOT_SPLIT_WENB[86]); + primitive = _inv iNOT_SPLIT_WENB87(SPLIT_WENB[87], NOT_SPLIT_WENB[87]); + primitive = _inv iNOT_SPLIT_WENB88(SPLIT_WENB[88], NOT_SPLIT_WENB[88]); + primitive = _inv iNOT_SPLIT_WENB89(SPLIT_WENB[89], NOT_SPLIT_WENB[89]); + primitive = _inv iNOT_SPLIT_WENB90(SPLIT_WENB[90], NOT_SPLIT_WENB[90]); + primitive = _inv iNOT_SPLIT_WENB91(SPLIT_WENB[91], NOT_SPLIT_WENB[91]); + primitive = _inv iNOT_SPLIT_WENB92(SPLIT_WENB[92], NOT_SPLIT_WENB[92]); + primitive = _inv iNOT_SPLIT_WENB93(SPLIT_WENB[93], NOT_SPLIT_WENB[93]); + primitive = _inv iNOT_SPLIT_WENB94(SPLIT_WENB[94], NOT_SPLIT_WENB[94]); + primitive = _inv iNOT_SPLIT_WENB95(SPLIT_WENB[95], NOT_SPLIT_WENB[95]); + primitive = _inv iNOT_SPLIT_WENB96(SPLIT_WENB[96], NOT_SPLIT_WENB[96]); + primitive = _inv iNOT_SPLIT_WENB97(SPLIT_WENB[97], NOT_SPLIT_WENB[97]); + primitive = _inv iNOT_SPLIT_WENB98(SPLIT_WENB[98], NOT_SPLIT_WENB[98]); + primitive = _inv iNOT_SPLIT_WENB99(SPLIT_WENB[99], NOT_SPLIT_WENB[99]); + primitive = _inv iNOT_SPLIT_WENB100(SPLIT_WENB[100], NOT_SPLIT_WENB[100]); + primitive = _inv iNOT_SPLIT_WENB101(SPLIT_WENB[101], NOT_SPLIT_WENB[101]); + primitive = _inv iNOT_SPLIT_WENB102(SPLIT_WENB[102], NOT_SPLIT_WENB[102]); + primitive = _inv iNOT_SPLIT_WENB103(SPLIT_WENB[103], NOT_SPLIT_WENB[103]); + primitive = _inv iNOT_SPLIT_WENB104(SPLIT_WENB[104], NOT_SPLIT_WENB[104]); + primitive = _inv iNOT_SPLIT_WENB105(SPLIT_WENB[105], NOT_SPLIT_WENB[105]); + primitive = _inv iNOT_SPLIT_WENB106(SPLIT_WENB[106], NOT_SPLIT_WENB[106]); + primitive = _inv iNOT_SPLIT_WENB107(SPLIT_WENB[107], NOT_SPLIT_WENB[107]); + primitive = _inv iNOT_SPLIT_WENB108(SPLIT_WENB[108], NOT_SPLIT_WENB[108]); + primitive = _inv iNOT_SPLIT_WENB109(SPLIT_WENB[109], NOT_SPLIT_WENB[109]); + primitive = _inv iNOT_SPLIT_WENB110(SPLIT_WENB[110], NOT_SPLIT_WENB[110]); + primitive = _inv iNOT_SPLIT_WENB111(SPLIT_WENB[111], NOT_SPLIT_WENB[111]); + primitive = _inv iNOT_SPLIT_WENB112(SPLIT_WENB[112], NOT_SPLIT_WENB[112]); + primitive = _inv iNOT_SPLIT_WENB113(SPLIT_WENB[113], NOT_SPLIT_WENB[113]); + primitive = _inv iNOT_SPLIT_WENB114(SPLIT_WENB[114], NOT_SPLIT_WENB[114]); + primitive = _inv iNOT_SPLIT_WENB115(SPLIT_WENB[115], NOT_SPLIT_WENB[115]); + primitive = _inv iNOT_SPLIT_WENB116(SPLIT_WENB[116], NOT_SPLIT_WENB[116]); + primitive = _inv iNOT_SPLIT_WENB117(SPLIT_WENB[117], NOT_SPLIT_WENB[117]); + primitive = _inv iNOT_SPLIT_WENB118(SPLIT_WENB[118], NOT_SPLIT_WENB[118]); + primitive = _inv iNOT_SPLIT_WENB119(SPLIT_WENB[119], NOT_SPLIT_WENB[119]); + primitive = _inv iNOT_SPLIT_WENB120(SPLIT_WENB[120], NOT_SPLIT_WENB[120]); + primitive = _inv iNOT_SPLIT_WENB121(SPLIT_WENB[121], NOT_SPLIT_WENB[121]); + primitive = _inv iNOT_SPLIT_WENB122(SPLIT_WENB[122], NOT_SPLIT_WENB[122]); + primitive = _inv iNOT_SPLIT_WENB123(SPLIT_WENB[123], NOT_SPLIT_WENB[123]); + primitive = _inv iNOT_SPLIT_WENB124(SPLIT_WENB[124], NOT_SPLIT_WENB[124]); + primitive = _inv iNOT_SPLIT_WENB125(SPLIT_WENB[125], NOT_SPLIT_WENB[125]); + primitive = _inv iNOT_SPLIT_WENB126(SPLIT_WENB[126], NOT_SPLIT_WENB[126]); + primitive = _inv iNOT_SPLIT_WENB127(SPLIT_WENB[127], NOT_SPLIT_WENB[127]); + ) + intern (WRITEB) (array = 127 : 0; + primitive = _and aWRITEB0(NOT_DFTRAMBYP, NOT_SPLIT_WENB[0], NOT_CENB, WRITEB[0]); + primitive = _and aWRITEB1(NOT_DFTRAMBYP, NOT_SPLIT_WENB[1], NOT_CENB, WRITEB[1]); + primitive = _and aWRITEB2(NOT_DFTRAMBYP, NOT_SPLIT_WENB[2], NOT_CENB, WRITEB[2]); + primitive = _and aWRITEB3(NOT_DFTRAMBYP, NOT_SPLIT_WENB[3], NOT_CENB, WRITEB[3]); + primitive = _and aWRITEB4(NOT_DFTRAMBYP, NOT_SPLIT_WENB[4], NOT_CENB, WRITEB[4]); + primitive = _and aWRITEB5(NOT_DFTRAMBYP, NOT_SPLIT_WENB[5], NOT_CENB, WRITEB[5]); + primitive = _and aWRITEB6(NOT_DFTRAMBYP, NOT_SPLIT_WENB[6], NOT_CENB, WRITEB[6]); + primitive = _and aWRITEB7(NOT_DFTRAMBYP, NOT_SPLIT_WENB[7], NOT_CENB, WRITEB[7]); + primitive = _and aWRITEB8(NOT_DFTRAMBYP, NOT_SPLIT_WENB[8], NOT_CENB, WRITEB[8]); + primitive = _and aWRITEB9(NOT_DFTRAMBYP, NOT_SPLIT_WENB[9], NOT_CENB, WRITEB[9]); + primitive = _and aWRITEB10(NOT_DFTRAMBYP, NOT_SPLIT_WENB[10], NOT_CENB, WRITEB[10]); + primitive = _and aWRITEB11(NOT_DFTRAMBYP, NOT_SPLIT_WENB[11], NOT_CENB, WRITEB[11]); + primitive = _and aWRITEB12(NOT_DFTRAMBYP, NOT_SPLIT_WENB[12], NOT_CENB, WRITEB[12]); + primitive = _and aWRITEB13(NOT_DFTRAMBYP, NOT_SPLIT_WENB[13], NOT_CENB, WRITEB[13]); + primitive = _and aWRITEB14(NOT_DFTRAMBYP, NOT_SPLIT_WENB[14], NOT_CENB, WRITEB[14]); + primitive = _and aWRITEB15(NOT_DFTRAMBYP, NOT_SPLIT_WENB[15], NOT_CENB, WRITEB[15]); + primitive = _and aWRITEB16(NOT_DFTRAMBYP, NOT_SPLIT_WENB[16], NOT_CENB, WRITEB[16]); + primitive = _and aWRITEB17(NOT_DFTRAMBYP, NOT_SPLIT_WENB[17], NOT_CENB, WRITEB[17]); + primitive = _and aWRITEB18(NOT_DFTRAMBYP, NOT_SPLIT_WENB[18], NOT_CENB, WRITEB[18]); + primitive = _and aWRITEB19(NOT_DFTRAMBYP, NOT_SPLIT_WENB[19], NOT_CENB, WRITEB[19]); + primitive = _and aWRITEB20(NOT_DFTRAMBYP, NOT_SPLIT_WENB[20], NOT_CENB, WRITEB[20]); + primitive = _and aWRITEB21(NOT_DFTRAMBYP, NOT_SPLIT_WENB[21], NOT_CENB, WRITEB[21]); + primitive = _and aWRITEB22(NOT_DFTRAMBYP, NOT_SPLIT_WENB[22], NOT_CENB, WRITEB[22]); + primitive = _and aWRITEB23(NOT_DFTRAMBYP, NOT_SPLIT_WENB[23], NOT_CENB, WRITEB[23]); + primitive = _and aWRITEB24(NOT_DFTRAMBYP, NOT_SPLIT_WENB[24], NOT_CENB, WRITEB[24]); + primitive = _and aWRITEB25(NOT_DFTRAMBYP, NOT_SPLIT_WENB[25], NOT_CENB, WRITEB[25]); + primitive = _and aWRITEB26(NOT_DFTRAMBYP, NOT_SPLIT_WENB[26], NOT_CENB, WRITEB[26]); + primitive = _and aWRITEB27(NOT_DFTRAMBYP, NOT_SPLIT_WENB[27], NOT_CENB, WRITEB[27]); + primitive = _and aWRITEB28(NOT_DFTRAMBYP, NOT_SPLIT_WENB[28], NOT_CENB, WRITEB[28]); + primitive = _and aWRITEB29(NOT_DFTRAMBYP, NOT_SPLIT_WENB[29], NOT_CENB, WRITEB[29]); + primitive = _and aWRITEB30(NOT_DFTRAMBYP, NOT_SPLIT_WENB[30], NOT_CENB, WRITEB[30]); + primitive = _and aWRITEB31(NOT_DFTRAMBYP, NOT_SPLIT_WENB[31], NOT_CENB, WRITEB[31]); + primitive = _and aWRITEB32(NOT_DFTRAMBYP, NOT_SPLIT_WENB[32], NOT_CENB, WRITEB[32]); + primitive = _and aWRITEB33(NOT_DFTRAMBYP, NOT_SPLIT_WENB[33], NOT_CENB, WRITEB[33]); + primitive = _and aWRITEB34(NOT_DFTRAMBYP, NOT_SPLIT_WENB[34], NOT_CENB, WRITEB[34]); + primitive = _and aWRITEB35(NOT_DFTRAMBYP, NOT_SPLIT_WENB[35], NOT_CENB, WRITEB[35]); + primitive = _and aWRITEB36(NOT_DFTRAMBYP, NOT_SPLIT_WENB[36], NOT_CENB, WRITEB[36]); + primitive = _and aWRITEB37(NOT_DFTRAMBYP, NOT_SPLIT_WENB[37], NOT_CENB, WRITEB[37]); + primitive = _and aWRITEB38(NOT_DFTRAMBYP, NOT_SPLIT_WENB[38], NOT_CENB, WRITEB[38]); + primitive = _and aWRITEB39(NOT_DFTRAMBYP, NOT_SPLIT_WENB[39], NOT_CENB, WRITEB[39]); + primitive = _and aWRITEB40(NOT_DFTRAMBYP, NOT_SPLIT_WENB[40], NOT_CENB, WRITEB[40]); + primitive = _and aWRITEB41(NOT_DFTRAMBYP, NOT_SPLIT_WENB[41], NOT_CENB, WRITEB[41]); + primitive = _and aWRITEB42(NOT_DFTRAMBYP, NOT_SPLIT_WENB[42], NOT_CENB, WRITEB[42]); + primitive = _and aWRITEB43(NOT_DFTRAMBYP, NOT_SPLIT_WENB[43], NOT_CENB, WRITEB[43]); + primitive = _and aWRITEB44(NOT_DFTRAMBYP, NOT_SPLIT_WENB[44], NOT_CENB, WRITEB[44]); + primitive = _and aWRITEB45(NOT_DFTRAMBYP, NOT_SPLIT_WENB[45], NOT_CENB, WRITEB[45]); + primitive = _and aWRITEB46(NOT_DFTRAMBYP, NOT_SPLIT_WENB[46], NOT_CENB, WRITEB[46]); + primitive = _and aWRITEB47(NOT_DFTRAMBYP, NOT_SPLIT_WENB[47], NOT_CENB, WRITEB[47]); + primitive = _and aWRITEB48(NOT_DFTRAMBYP, NOT_SPLIT_WENB[48], NOT_CENB, WRITEB[48]); + primitive = _and aWRITEB49(NOT_DFTRAMBYP, NOT_SPLIT_WENB[49], NOT_CENB, WRITEB[49]); + primitive = _and aWRITEB50(NOT_DFTRAMBYP, NOT_SPLIT_WENB[50], NOT_CENB, WRITEB[50]); + primitive = _and aWRITEB51(NOT_DFTRAMBYP, NOT_SPLIT_WENB[51], NOT_CENB, WRITEB[51]); + primitive = _and aWRITEB52(NOT_DFTRAMBYP, NOT_SPLIT_WENB[52], NOT_CENB, WRITEB[52]); + primitive = _and aWRITEB53(NOT_DFTRAMBYP, NOT_SPLIT_WENB[53], NOT_CENB, WRITEB[53]); + primitive = _and aWRITEB54(NOT_DFTRAMBYP, NOT_SPLIT_WENB[54], NOT_CENB, WRITEB[54]); + primitive = _and aWRITEB55(NOT_DFTRAMBYP, NOT_SPLIT_WENB[55], NOT_CENB, WRITEB[55]); + primitive = _and aWRITEB56(NOT_DFTRAMBYP, NOT_SPLIT_WENB[56], NOT_CENB, WRITEB[56]); + primitive = _and aWRITEB57(NOT_DFTRAMBYP, NOT_SPLIT_WENB[57], NOT_CENB, WRITEB[57]); + primitive = _and aWRITEB58(NOT_DFTRAMBYP, NOT_SPLIT_WENB[58], NOT_CENB, WRITEB[58]); + primitive = _and aWRITEB59(NOT_DFTRAMBYP, NOT_SPLIT_WENB[59], NOT_CENB, WRITEB[59]); + primitive = _and aWRITEB60(NOT_DFTRAMBYP, NOT_SPLIT_WENB[60], NOT_CENB, WRITEB[60]); + primitive = _and aWRITEB61(NOT_DFTRAMBYP, NOT_SPLIT_WENB[61], NOT_CENB, WRITEB[61]); + primitive = _and aWRITEB62(NOT_DFTRAMBYP, NOT_SPLIT_WENB[62], NOT_CENB, WRITEB[62]); + primitive = _and aWRITEB63(NOT_DFTRAMBYP, NOT_SPLIT_WENB[63], NOT_CENB, WRITEB[63]); + primitive = _and aWRITEB64(NOT_DFTRAMBYP, NOT_SPLIT_WENB[64], NOT_CENB, WRITEB[64]); + primitive = _and aWRITEB65(NOT_DFTRAMBYP, NOT_SPLIT_WENB[65], NOT_CENB, WRITEB[65]); + primitive = _and aWRITEB66(NOT_DFTRAMBYP, NOT_SPLIT_WENB[66], NOT_CENB, WRITEB[66]); + primitive = _and aWRITEB67(NOT_DFTRAMBYP, NOT_SPLIT_WENB[67], NOT_CENB, WRITEB[67]); + primitive = _and aWRITEB68(NOT_DFTRAMBYP, NOT_SPLIT_WENB[68], NOT_CENB, WRITEB[68]); + primitive = _and aWRITEB69(NOT_DFTRAMBYP, NOT_SPLIT_WENB[69], NOT_CENB, WRITEB[69]); + primitive = _and aWRITEB70(NOT_DFTRAMBYP, NOT_SPLIT_WENB[70], NOT_CENB, WRITEB[70]); + primitive = _and aWRITEB71(NOT_DFTRAMBYP, NOT_SPLIT_WENB[71], NOT_CENB, WRITEB[71]); + primitive = _and aWRITEB72(NOT_DFTRAMBYP, NOT_SPLIT_WENB[72], NOT_CENB, WRITEB[72]); + primitive = _and aWRITEB73(NOT_DFTRAMBYP, NOT_SPLIT_WENB[73], NOT_CENB, WRITEB[73]); + primitive = _and aWRITEB74(NOT_DFTRAMBYP, NOT_SPLIT_WENB[74], NOT_CENB, WRITEB[74]); + primitive = _and aWRITEB75(NOT_DFTRAMBYP, NOT_SPLIT_WENB[75], NOT_CENB, WRITEB[75]); + primitive = _and aWRITEB76(NOT_DFTRAMBYP, NOT_SPLIT_WENB[76], NOT_CENB, WRITEB[76]); + primitive = _and aWRITEB77(NOT_DFTRAMBYP, NOT_SPLIT_WENB[77], NOT_CENB, WRITEB[77]); + primitive = _and aWRITEB78(NOT_DFTRAMBYP, NOT_SPLIT_WENB[78], NOT_CENB, WRITEB[78]); + primitive = _and aWRITEB79(NOT_DFTRAMBYP, NOT_SPLIT_WENB[79], NOT_CENB, WRITEB[79]); + primitive = _and aWRITEB80(NOT_DFTRAMBYP, NOT_SPLIT_WENB[80], NOT_CENB, WRITEB[80]); + primitive = _and aWRITEB81(NOT_DFTRAMBYP, NOT_SPLIT_WENB[81], NOT_CENB, WRITEB[81]); + primitive = _and aWRITEB82(NOT_DFTRAMBYP, NOT_SPLIT_WENB[82], NOT_CENB, WRITEB[82]); + primitive = _and aWRITEB83(NOT_DFTRAMBYP, NOT_SPLIT_WENB[83], NOT_CENB, WRITEB[83]); + primitive = _and aWRITEB84(NOT_DFTRAMBYP, NOT_SPLIT_WENB[84], NOT_CENB, WRITEB[84]); + primitive = _and aWRITEB85(NOT_DFTRAMBYP, NOT_SPLIT_WENB[85], NOT_CENB, WRITEB[85]); + primitive = _and aWRITEB86(NOT_DFTRAMBYP, NOT_SPLIT_WENB[86], NOT_CENB, WRITEB[86]); + primitive = _and aWRITEB87(NOT_DFTRAMBYP, NOT_SPLIT_WENB[87], NOT_CENB, WRITEB[87]); + primitive = _and aWRITEB88(NOT_DFTRAMBYP, NOT_SPLIT_WENB[88], NOT_CENB, WRITEB[88]); + primitive = _and aWRITEB89(NOT_DFTRAMBYP, NOT_SPLIT_WENB[89], NOT_CENB, WRITEB[89]); + primitive = _and aWRITEB90(NOT_DFTRAMBYP, NOT_SPLIT_WENB[90], NOT_CENB, WRITEB[90]); + primitive = _and aWRITEB91(NOT_DFTRAMBYP, NOT_SPLIT_WENB[91], NOT_CENB, WRITEB[91]); + primitive = _and aWRITEB92(NOT_DFTRAMBYP, NOT_SPLIT_WENB[92], NOT_CENB, WRITEB[92]); + primitive = _and aWRITEB93(NOT_DFTRAMBYP, NOT_SPLIT_WENB[93], NOT_CENB, WRITEB[93]); + primitive = _and aWRITEB94(NOT_DFTRAMBYP, NOT_SPLIT_WENB[94], NOT_CENB, WRITEB[94]); + primitive = _and aWRITEB95(NOT_DFTRAMBYP, NOT_SPLIT_WENB[95], NOT_CENB, WRITEB[95]); + primitive = _and aWRITEB96(NOT_DFTRAMBYP, NOT_SPLIT_WENB[96], NOT_CENB, WRITEB[96]); + primitive = _and aWRITEB97(NOT_DFTRAMBYP, NOT_SPLIT_WENB[97], NOT_CENB, WRITEB[97]); + primitive = _and aWRITEB98(NOT_DFTRAMBYP, NOT_SPLIT_WENB[98], NOT_CENB, WRITEB[98]); + primitive = _and aWRITEB99(NOT_DFTRAMBYP, NOT_SPLIT_WENB[99], NOT_CENB, WRITEB[99]); + primitive = _and aWRITEB100(NOT_DFTRAMBYP, NOT_SPLIT_WENB[100], NOT_CENB, WRITEB[100]); + primitive = _and aWRITEB101(NOT_DFTRAMBYP, NOT_SPLIT_WENB[101], NOT_CENB, WRITEB[101]); + primitive = _and aWRITEB102(NOT_DFTRAMBYP, NOT_SPLIT_WENB[102], NOT_CENB, WRITEB[102]); + primitive = _and aWRITEB103(NOT_DFTRAMBYP, NOT_SPLIT_WENB[103], NOT_CENB, WRITEB[103]); + primitive = _and aWRITEB104(NOT_DFTRAMBYP, NOT_SPLIT_WENB[104], NOT_CENB, WRITEB[104]); + primitive = _and aWRITEB105(NOT_DFTRAMBYP, NOT_SPLIT_WENB[105], NOT_CENB, WRITEB[105]); + primitive = _and aWRITEB106(NOT_DFTRAMBYP, NOT_SPLIT_WENB[106], NOT_CENB, WRITEB[106]); + primitive = _and aWRITEB107(NOT_DFTRAMBYP, NOT_SPLIT_WENB[107], NOT_CENB, WRITEB[107]); + primitive = _and aWRITEB108(NOT_DFTRAMBYP, NOT_SPLIT_WENB[108], NOT_CENB, WRITEB[108]); + primitive = _and aWRITEB109(NOT_DFTRAMBYP, NOT_SPLIT_WENB[109], NOT_CENB, WRITEB[109]); + primitive = _and aWRITEB110(NOT_DFTRAMBYP, NOT_SPLIT_WENB[110], NOT_CENB, WRITEB[110]); + primitive = _and aWRITEB111(NOT_DFTRAMBYP, NOT_SPLIT_WENB[111], NOT_CENB, WRITEB[111]); + primitive = _and aWRITEB112(NOT_DFTRAMBYP, NOT_SPLIT_WENB[112], NOT_CENB, WRITEB[112]); + primitive = _and aWRITEB113(NOT_DFTRAMBYP, NOT_SPLIT_WENB[113], NOT_CENB, WRITEB[113]); + primitive = _and aWRITEB114(NOT_DFTRAMBYP, NOT_SPLIT_WENB[114], NOT_CENB, WRITEB[114]); + primitive = _and aWRITEB115(NOT_DFTRAMBYP, NOT_SPLIT_WENB[115], NOT_CENB, WRITEB[115]); + primitive = _and aWRITEB116(NOT_DFTRAMBYP, NOT_SPLIT_WENB[116], NOT_CENB, WRITEB[116]); + primitive = _and aWRITEB117(NOT_DFTRAMBYP, NOT_SPLIT_WENB[117], NOT_CENB, WRITEB[117]); + primitive = _and aWRITEB118(NOT_DFTRAMBYP, NOT_SPLIT_WENB[118], NOT_CENB, WRITEB[118]); + primitive = _and aWRITEB119(NOT_DFTRAMBYP, NOT_SPLIT_WENB[119], NOT_CENB, WRITEB[119]); + primitive = _and aWRITEB120(NOT_DFTRAMBYP, NOT_SPLIT_WENB[120], NOT_CENB, WRITEB[120]); + primitive = _and aWRITEB121(NOT_DFTRAMBYP, NOT_SPLIT_WENB[121], NOT_CENB, WRITEB[121]); + primitive = _and aWRITEB122(NOT_DFTRAMBYP, NOT_SPLIT_WENB[122], NOT_CENB, WRITEB[122]); + primitive = _and aWRITEB123(NOT_DFTRAMBYP, NOT_SPLIT_WENB[123], NOT_CENB, WRITEB[123]); + primitive = _and aWRITEB124(NOT_DFTRAMBYP, NOT_SPLIT_WENB[124], NOT_CENB, WRITEB[124]); + primitive = _and aWRITEB125(NOT_DFTRAMBYP, NOT_SPLIT_WENB[125], NOT_CENB, WRITEB[125]); + primitive = _and aWRITEB126(NOT_DFTRAMBYP, NOT_SPLIT_WENB[126], NOT_CENB, WRITEB[126]); + primitive = _and aWRITEB127(NOT_DFTRAMBYP, NOT_SPLIT_WENB[127], NOT_CENB, WRITEB[127]); + ) +intern (INT_QA) (array = 127 : 0; + instance = rf2_32x128_wm1_bitcell memB0 (.CLK(CLKB), .WRITE(WRITEB[0]), .READ(READA[0]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[0]), .Xout(XoutBiff), .Q(INT_QA[0])); + instance = rf2_32x128_wm1_bitcell memB1 (.CLK(CLKB), .WRITE(WRITEB[1]), .READ(READA[1]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[1]), .Xout(XoutBiff), .Q(INT_QA[1])); + instance = rf2_32x128_wm1_bitcell memB2 (.CLK(CLKB), .WRITE(WRITEB[2]), .READ(READA[2]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[2]), .Xout(XoutBiff), .Q(INT_QA[2])); + instance = rf2_32x128_wm1_bitcell memB3 (.CLK(CLKB), .WRITE(WRITEB[3]), .READ(READA[3]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[3]), .Xout(XoutBiff), .Q(INT_QA[3])); + instance = rf2_32x128_wm1_bitcell memB4 (.CLK(CLKB), .WRITE(WRITEB[4]), .READ(READA[4]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[4]), .Xout(XoutBiff), .Q(INT_QA[4])); + instance = rf2_32x128_wm1_bitcell memB5 (.CLK(CLKB), .WRITE(WRITEB[5]), .READ(READA[5]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[5]), .Xout(XoutBiff), .Q(INT_QA[5])); + instance = rf2_32x128_wm1_bitcell memB6 (.CLK(CLKB), .WRITE(WRITEB[6]), .READ(READA[6]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[6]), .Xout(XoutBiff), .Q(INT_QA[6])); + instance = rf2_32x128_wm1_bitcell memB7 (.CLK(CLKB), .WRITE(WRITEB[7]), .READ(READA[7]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[7]), .Xout(XoutBiff), .Q(INT_QA[7])); + instance = rf2_32x128_wm1_bitcell memB8 (.CLK(CLKB), .WRITE(WRITEB[8]), .READ(READA[8]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[8]), .Xout(XoutBiff), .Q(INT_QA[8])); + instance = rf2_32x128_wm1_bitcell memB9 (.CLK(CLKB), .WRITE(WRITEB[9]), .READ(READA[9]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[9]), .Xout(XoutBiff), .Q(INT_QA[9])); + instance = rf2_32x128_wm1_bitcell memB10 (.CLK(CLKB), .WRITE(WRITEB[10]), .READ(READA[10]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[10]), .Xout(XoutBiff), .Q(INT_QA[10])); + instance = rf2_32x128_wm1_bitcell memB11 (.CLK(CLKB), .WRITE(WRITEB[11]), .READ(READA[11]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[11]), .Xout(XoutBiff), .Q(INT_QA[11])); + instance = rf2_32x128_wm1_bitcell memB12 (.CLK(CLKB), .WRITE(WRITEB[12]), .READ(READA[12]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[12]), .Xout(XoutBiff), .Q(INT_QA[12])); + instance = rf2_32x128_wm1_bitcell memB13 (.CLK(CLKB), .WRITE(WRITEB[13]), .READ(READA[13]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[13]), .Xout(XoutBiff), .Q(INT_QA[13])); + instance = rf2_32x128_wm1_bitcell memB14 (.CLK(CLKB), .WRITE(WRITEB[14]), .READ(READA[14]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[14]), .Xout(XoutBiff), .Q(INT_QA[14])); + instance = rf2_32x128_wm1_bitcell memB15 (.CLK(CLKB), .WRITE(WRITEB[15]), .READ(READA[15]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[15]), .Xout(XoutBiff), .Q(INT_QA[15])); + instance = rf2_32x128_wm1_bitcell memB16 (.CLK(CLKB), .WRITE(WRITEB[16]), .READ(READA[16]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[16]), .Xout(XoutBiff), .Q(INT_QA[16])); + instance = rf2_32x128_wm1_bitcell memB17 (.CLK(CLKB), .WRITE(WRITEB[17]), .READ(READA[17]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[17]), .Xout(XoutBiff), .Q(INT_QA[17])); + instance = rf2_32x128_wm1_bitcell memB18 (.CLK(CLKB), .WRITE(WRITEB[18]), .READ(READA[18]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[18]), .Xout(XoutBiff), .Q(INT_QA[18])); + instance = rf2_32x128_wm1_bitcell memB19 (.CLK(CLKB), .WRITE(WRITEB[19]), .READ(READA[19]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[19]), .Xout(XoutBiff), .Q(INT_QA[19])); + instance = rf2_32x128_wm1_bitcell memB20 (.CLK(CLKB), .WRITE(WRITEB[20]), .READ(READA[20]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[20]), .Xout(XoutBiff), .Q(INT_QA[20])); + instance = rf2_32x128_wm1_bitcell memB21 (.CLK(CLKB), .WRITE(WRITEB[21]), .READ(READA[21]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[21]), .Xout(XoutBiff), .Q(INT_QA[21])); + instance = rf2_32x128_wm1_bitcell memB22 (.CLK(CLKB), .WRITE(WRITEB[22]), .READ(READA[22]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[22]), .Xout(XoutBiff), .Q(INT_QA[22])); + instance = rf2_32x128_wm1_bitcell memB23 (.CLK(CLKB), .WRITE(WRITEB[23]), .READ(READA[23]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[23]), .Xout(XoutBiff), .Q(INT_QA[23])); + instance = rf2_32x128_wm1_bitcell memB24 (.CLK(CLKB), .WRITE(WRITEB[24]), .READ(READA[24]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[24]), .Xout(XoutBiff), .Q(INT_QA[24])); + instance = rf2_32x128_wm1_bitcell memB25 (.CLK(CLKB), .WRITE(WRITEB[25]), .READ(READA[25]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[25]), .Xout(XoutBiff), .Q(INT_QA[25])); + instance = rf2_32x128_wm1_bitcell memB26 (.CLK(CLKB), .WRITE(WRITEB[26]), .READ(READA[26]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[26]), .Xout(XoutBiff), .Q(INT_QA[26])); + instance = rf2_32x128_wm1_bitcell memB27 (.CLK(CLKB), .WRITE(WRITEB[27]), .READ(READA[27]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[27]), .Xout(XoutBiff), .Q(INT_QA[27])); + instance = rf2_32x128_wm1_bitcell memB28 (.CLK(CLKB), .WRITE(WRITEB[28]), .READ(READA[28]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[28]), .Xout(XoutBiff), .Q(INT_QA[28])); + instance = rf2_32x128_wm1_bitcell memB29 (.CLK(CLKB), .WRITE(WRITEB[29]), .READ(READA[29]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[29]), .Xout(XoutBiff), .Q(INT_QA[29])); + instance = rf2_32x128_wm1_bitcell memB30 (.CLK(CLKB), .WRITE(WRITEB[30]), .READ(READA[30]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[30]), .Xout(XoutBiff), .Q(INT_QA[30])); + instance = rf2_32x128_wm1_bitcell memB31 (.CLK(CLKB), .WRITE(WRITEB[31]), .READ(READA[31]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[31]), .Xout(XoutBiff), .Q(INT_QA[31])); + instance = rf2_32x128_wm1_bitcell memB32 (.CLK(CLKB), .WRITE(WRITEB[32]), .READ(READA[32]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[32]), .Xout(XoutBiff), .Q(INT_QA[32])); + instance = rf2_32x128_wm1_bitcell memB33 (.CLK(CLKB), .WRITE(WRITEB[33]), .READ(READA[33]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[33]), .Xout(XoutBiff), .Q(INT_QA[33])); + instance = rf2_32x128_wm1_bitcell memB34 (.CLK(CLKB), .WRITE(WRITEB[34]), .READ(READA[34]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[34]), .Xout(XoutBiff), .Q(INT_QA[34])); + instance = rf2_32x128_wm1_bitcell memB35 (.CLK(CLKB), .WRITE(WRITEB[35]), .READ(READA[35]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[35]), .Xout(XoutBiff), .Q(INT_QA[35])); + instance = rf2_32x128_wm1_bitcell memB36 (.CLK(CLKB), .WRITE(WRITEB[36]), .READ(READA[36]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[36]), .Xout(XoutBiff), .Q(INT_QA[36])); + instance = rf2_32x128_wm1_bitcell memB37 (.CLK(CLKB), .WRITE(WRITEB[37]), .READ(READA[37]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[37]), .Xout(XoutBiff), .Q(INT_QA[37])); + instance = rf2_32x128_wm1_bitcell memB38 (.CLK(CLKB), .WRITE(WRITEB[38]), .READ(READA[38]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[38]), .Xout(XoutBiff), .Q(INT_QA[38])); + instance = rf2_32x128_wm1_bitcell memB39 (.CLK(CLKB), .WRITE(WRITEB[39]), .READ(READA[39]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[39]), .Xout(XoutBiff), .Q(INT_QA[39])); + instance = rf2_32x128_wm1_bitcell memB40 (.CLK(CLKB), .WRITE(WRITEB[40]), .READ(READA[40]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[40]), .Xout(XoutBiff), .Q(INT_QA[40])); + instance = rf2_32x128_wm1_bitcell memB41 (.CLK(CLKB), .WRITE(WRITEB[41]), .READ(READA[41]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[41]), .Xout(XoutBiff), .Q(INT_QA[41])); + instance = rf2_32x128_wm1_bitcell memB42 (.CLK(CLKB), .WRITE(WRITEB[42]), .READ(READA[42]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[42]), .Xout(XoutBiff), .Q(INT_QA[42])); + instance = rf2_32x128_wm1_bitcell memB43 (.CLK(CLKB), .WRITE(WRITEB[43]), .READ(READA[43]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[43]), .Xout(XoutBiff), .Q(INT_QA[43])); + instance = rf2_32x128_wm1_bitcell memB44 (.CLK(CLKB), .WRITE(WRITEB[44]), .READ(READA[44]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[44]), .Xout(XoutBiff), .Q(INT_QA[44])); + instance = rf2_32x128_wm1_bitcell memB45 (.CLK(CLKB), .WRITE(WRITEB[45]), .READ(READA[45]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[45]), .Xout(XoutBiff), .Q(INT_QA[45])); + instance = rf2_32x128_wm1_bitcell memB46 (.CLK(CLKB), .WRITE(WRITEB[46]), .READ(READA[46]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[46]), .Xout(XoutBiff), .Q(INT_QA[46])); + instance = rf2_32x128_wm1_bitcell memB47 (.CLK(CLKB), .WRITE(WRITEB[47]), .READ(READA[47]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[47]), .Xout(XoutBiff), .Q(INT_QA[47])); + instance = rf2_32x128_wm1_bitcell memB48 (.CLK(CLKB), .WRITE(WRITEB[48]), .READ(READA[48]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[48]), .Xout(XoutBiff), .Q(INT_QA[48])); + instance = rf2_32x128_wm1_bitcell memB49 (.CLK(CLKB), .WRITE(WRITEB[49]), .READ(READA[49]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[49]), .Xout(XoutBiff), .Q(INT_QA[49])); + instance = rf2_32x128_wm1_bitcell memB50 (.CLK(CLKB), .WRITE(WRITEB[50]), .READ(READA[50]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[50]), .Xout(XoutBiff), .Q(INT_QA[50])); + instance = rf2_32x128_wm1_bitcell memB51 (.CLK(CLKB), .WRITE(WRITEB[51]), .READ(READA[51]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[51]), .Xout(XoutBiff), .Q(INT_QA[51])); + instance = rf2_32x128_wm1_bitcell memB52 (.CLK(CLKB), .WRITE(WRITEB[52]), .READ(READA[52]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[52]), .Xout(XoutBiff), .Q(INT_QA[52])); + instance = rf2_32x128_wm1_bitcell memB53 (.CLK(CLKB), .WRITE(WRITEB[53]), .READ(READA[53]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[53]), .Xout(XoutBiff), .Q(INT_QA[53])); + instance = rf2_32x128_wm1_bitcell memB54 (.CLK(CLKB), .WRITE(WRITEB[54]), .READ(READA[54]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[54]), .Xout(XoutBiff), .Q(INT_QA[54])); + instance = rf2_32x128_wm1_bitcell memB55 (.CLK(CLKB), .WRITE(WRITEB[55]), .READ(READA[55]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[55]), .Xout(XoutBiff), .Q(INT_QA[55])); + instance = rf2_32x128_wm1_bitcell memB56 (.CLK(CLKB), .WRITE(WRITEB[56]), .READ(READA[56]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[56]), .Xout(XoutBiff), .Q(INT_QA[56])); + instance = rf2_32x128_wm1_bitcell memB57 (.CLK(CLKB), .WRITE(WRITEB[57]), .READ(READA[57]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[57]), .Xout(XoutBiff), .Q(INT_QA[57])); + instance = rf2_32x128_wm1_bitcell memB58 (.CLK(CLKB), .WRITE(WRITEB[58]), .READ(READA[58]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[58]), .Xout(XoutBiff), .Q(INT_QA[58])); + instance = rf2_32x128_wm1_bitcell memB59 (.CLK(CLKB), .WRITE(WRITEB[59]), .READ(READA[59]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[59]), .Xout(XoutBiff), .Q(INT_QA[59])); + instance = rf2_32x128_wm1_bitcell memB60 (.CLK(CLKB), .WRITE(WRITEB[60]), .READ(READA[60]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[60]), .Xout(XoutBiff), .Q(INT_QA[60])); + instance = rf2_32x128_wm1_bitcell memB61 (.CLK(CLKB), .WRITE(WRITEB[61]), .READ(READA[61]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[61]), .Xout(XoutBiff), .Q(INT_QA[61])); + instance = rf2_32x128_wm1_bitcell memB62 (.CLK(CLKB), .WRITE(WRITEB[62]), .READ(READA[62]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[62]), .Xout(XoutBiff), .Q(INT_QA[62])); + instance = rf2_32x128_wm1_bitcell memB63 (.CLK(CLKB), .WRITE(WRITEB[63]), .READ(READA[63]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[63]), .Xout(XoutBiff), .Q(INT_QA[63])); + instance = rf2_32x128_wm1_bitcell memB64 (.CLK(CLKB), .WRITE(WRITEB[64]), .READ(READA[64]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[64]), .Xout(XoutBiff), .Q(INT_QA[64])); + instance = rf2_32x128_wm1_bitcell memB65 (.CLK(CLKB), .WRITE(WRITEB[65]), .READ(READA[65]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[65]), .Xout(XoutBiff), .Q(INT_QA[65])); + instance = rf2_32x128_wm1_bitcell memB66 (.CLK(CLKB), .WRITE(WRITEB[66]), .READ(READA[66]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[66]), .Xout(XoutBiff), .Q(INT_QA[66])); + instance = rf2_32x128_wm1_bitcell memB67 (.CLK(CLKB), .WRITE(WRITEB[67]), .READ(READA[67]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[67]), .Xout(XoutBiff), .Q(INT_QA[67])); + instance = rf2_32x128_wm1_bitcell memB68 (.CLK(CLKB), .WRITE(WRITEB[68]), .READ(READA[68]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[68]), .Xout(XoutBiff), .Q(INT_QA[68])); + instance = rf2_32x128_wm1_bitcell memB69 (.CLK(CLKB), .WRITE(WRITEB[69]), .READ(READA[69]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[69]), .Xout(XoutBiff), .Q(INT_QA[69])); + instance = rf2_32x128_wm1_bitcell memB70 (.CLK(CLKB), .WRITE(WRITEB[70]), .READ(READA[70]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[70]), .Xout(XoutBiff), .Q(INT_QA[70])); + instance = rf2_32x128_wm1_bitcell memB71 (.CLK(CLKB), .WRITE(WRITEB[71]), .READ(READA[71]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[71]), .Xout(XoutBiff), .Q(INT_QA[71])); + instance = rf2_32x128_wm1_bitcell memB72 (.CLK(CLKB), .WRITE(WRITEB[72]), .READ(READA[72]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[72]), .Xout(XoutBiff), .Q(INT_QA[72])); + instance = rf2_32x128_wm1_bitcell memB73 (.CLK(CLKB), .WRITE(WRITEB[73]), .READ(READA[73]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[73]), .Xout(XoutBiff), .Q(INT_QA[73])); + instance = rf2_32x128_wm1_bitcell memB74 (.CLK(CLKB), .WRITE(WRITEB[74]), .READ(READA[74]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[74]), .Xout(XoutBiff), .Q(INT_QA[74])); + instance = rf2_32x128_wm1_bitcell memB75 (.CLK(CLKB), .WRITE(WRITEB[75]), .READ(READA[75]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[75]), .Xout(XoutBiff), .Q(INT_QA[75])); + instance = rf2_32x128_wm1_bitcell memB76 (.CLK(CLKB), .WRITE(WRITEB[76]), .READ(READA[76]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[76]), .Xout(XoutBiff), .Q(INT_QA[76])); + instance = rf2_32x128_wm1_bitcell memB77 (.CLK(CLKB), .WRITE(WRITEB[77]), .READ(READA[77]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[77]), .Xout(XoutBiff), .Q(INT_QA[77])); + instance = rf2_32x128_wm1_bitcell memB78 (.CLK(CLKB), .WRITE(WRITEB[78]), .READ(READA[78]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[78]), .Xout(XoutBiff), .Q(INT_QA[78])); + instance = rf2_32x128_wm1_bitcell memB79 (.CLK(CLKB), .WRITE(WRITEB[79]), .READ(READA[79]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[79]), .Xout(XoutBiff), .Q(INT_QA[79])); + instance = rf2_32x128_wm1_bitcell memB80 (.CLK(CLKB), .WRITE(WRITEB[80]), .READ(READA[80]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[80]), .Xout(XoutBiff), .Q(INT_QA[80])); + instance = rf2_32x128_wm1_bitcell memB81 (.CLK(CLKB), .WRITE(WRITEB[81]), .READ(READA[81]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[81]), .Xout(XoutBiff), .Q(INT_QA[81])); + instance = rf2_32x128_wm1_bitcell memB82 (.CLK(CLKB), .WRITE(WRITEB[82]), .READ(READA[82]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[82]), .Xout(XoutBiff), .Q(INT_QA[82])); + instance = rf2_32x128_wm1_bitcell memB83 (.CLK(CLKB), .WRITE(WRITEB[83]), .READ(READA[83]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[83]), .Xout(XoutBiff), .Q(INT_QA[83])); + instance = rf2_32x128_wm1_bitcell memB84 (.CLK(CLKB), .WRITE(WRITEB[84]), .READ(READA[84]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[84]), .Xout(XoutBiff), .Q(INT_QA[84])); + instance = rf2_32x128_wm1_bitcell memB85 (.CLK(CLKB), .WRITE(WRITEB[85]), .READ(READA[85]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[85]), .Xout(XoutBiff), .Q(INT_QA[85])); + instance = rf2_32x128_wm1_bitcell memB86 (.CLK(CLKB), .WRITE(WRITEB[86]), .READ(READA[86]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[86]), .Xout(XoutBiff), .Q(INT_QA[86])); + instance = rf2_32x128_wm1_bitcell memB87 (.CLK(CLKB), .WRITE(WRITEB[87]), .READ(READA[87]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[87]), .Xout(XoutBiff), .Q(INT_QA[87])); + instance = rf2_32x128_wm1_bitcell memB88 (.CLK(CLKB), .WRITE(WRITEB[88]), .READ(READA[88]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[88]), .Xout(XoutBiff), .Q(INT_QA[88])); + instance = rf2_32x128_wm1_bitcell memB89 (.CLK(CLKB), .WRITE(WRITEB[89]), .READ(READA[89]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[89]), .Xout(XoutBiff), .Q(INT_QA[89])); + instance = rf2_32x128_wm1_bitcell memB90 (.CLK(CLKB), .WRITE(WRITEB[90]), .READ(READA[90]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[90]), .Xout(XoutBiff), .Q(INT_QA[90])); + instance = rf2_32x128_wm1_bitcell memB91 (.CLK(CLKB), .WRITE(WRITEB[91]), .READ(READA[91]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[91]), .Xout(XoutBiff), .Q(INT_QA[91])); + instance = rf2_32x128_wm1_bitcell memB92 (.CLK(CLKB), .WRITE(WRITEB[92]), .READ(READA[92]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[92]), .Xout(XoutBiff), .Q(INT_QA[92])); + instance = rf2_32x128_wm1_bitcell memB93 (.CLK(CLKB), .WRITE(WRITEB[93]), .READ(READA[93]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[93]), .Xout(XoutBiff), .Q(INT_QA[93])); + instance = rf2_32x128_wm1_bitcell memB94 (.CLK(CLKB), .WRITE(WRITEB[94]), .READ(READA[94]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[94]), .Xout(XoutBiff), .Q(INT_QA[94])); + instance = rf2_32x128_wm1_bitcell memB95 (.CLK(CLKB), .WRITE(WRITEB[95]), .READ(READA[95]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[95]), .Xout(XoutBiff), .Q(INT_QA[95])); + instance = rf2_32x128_wm1_bitcell memB96 (.CLK(CLKB), .WRITE(WRITEB[96]), .READ(READA[96]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[96]), .Xout(XoutBiff), .Q(INT_QA[96])); + instance = rf2_32x128_wm1_bitcell memB97 (.CLK(CLKB), .WRITE(WRITEB[97]), .READ(READA[97]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[97]), .Xout(XoutBiff), .Q(INT_QA[97])); + instance = rf2_32x128_wm1_bitcell memB98 (.CLK(CLKB), .WRITE(WRITEB[98]), .READ(READA[98]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[98]), .Xout(XoutBiff), .Q(INT_QA[98])); + instance = rf2_32x128_wm1_bitcell memB99 (.CLK(CLKB), .WRITE(WRITEB[99]), .READ(READA[99]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[99]), .Xout(XoutBiff), .Q(INT_QA[99])); + instance = rf2_32x128_wm1_bitcell memB100 (.CLK(CLKB), .WRITE(WRITEB[100]), .READ(READA[100]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[100]), .Xout(XoutBiff), .Q(INT_QA[100])); + instance = rf2_32x128_wm1_bitcell memB101 (.CLK(CLKB), .WRITE(WRITEB[101]), .READ(READA[101]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[101]), .Xout(XoutBiff), .Q(INT_QA[101])); + instance = rf2_32x128_wm1_bitcell memB102 (.CLK(CLKB), .WRITE(WRITEB[102]), .READ(READA[102]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[102]), .Xout(XoutBiff), .Q(INT_QA[102])); + instance = rf2_32x128_wm1_bitcell memB103 (.CLK(CLKB), .WRITE(WRITEB[103]), .READ(READA[103]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[103]), .Xout(XoutBiff), .Q(INT_QA[103])); + instance = rf2_32x128_wm1_bitcell memB104 (.CLK(CLKB), .WRITE(WRITEB[104]), .READ(READA[104]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[104]), .Xout(XoutBiff), .Q(INT_QA[104])); + instance = rf2_32x128_wm1_bitcell memB105 (.CLK(CLKB), .WRITE(WRITEB[105]), .READ(READA[105]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[105]), .Xout(XoutBiff), .Q(INT_QA[105])); + instance = rf2_32x128_wm1_bitcell memB106 (.CLK(CLKB), .WRITE(WRITEB[106]), .READ(READA[106]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[106]), .Xout(XoutBiff), .Q(INT_QA[106])); + instance = rf2_32x128_wm1_bitcell memB107 (.CLK(CLKB), .WRITE(WRITEB[107]), .READ(READA[107]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[107]), .Xout(XoutBiff), .Q(INT_QA[107])); + instance = rf2_32x128_wm1_bitcell memB108 (.CLK(CLKB), .WRITE(WRITEB[108]), .READ(READA[108]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[108]), .Xout(XoutBiff), .Q(INT_QA[108])); + instance = rf2_32x128_wm1_bitcell memB109 (.CLK(CLKB), .WRITE(WRITEB[109]), .READ(READA[109]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[109]), .Xout(XoutBiff), .Q(INT_QA[109])); + instance = rf2_32x128_wm1_bitcell memB110 (.CLK(CLKB), .WRITE(WRITEB[110]), .READ(READA[110]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[110]), .Xout(XoutBiff), .Q(INT_QA[110])); + instance = rf2_32x128_wm1_bitcell memB111 (.CLK(CLKB), .WRITE(WRITEB[111]), .READ(READA[111]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[111]), .Xout(XoutBiff), .Q(INT_QA[111])); + instance = rf2_32x128_wm1_bitcell memB112 (.CLK(CLKB), .WRITE(WRITEB[112]), .READ(READA[112]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[112]), .Xout(XoutBiff), .Q(INT_QA[112])); + instance = rf2_32x128_wm1_bitcell memB113 (.CLK(CLKB), .WRITE(WRITEB[113]), .READ(READA[113]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[113]), .Xout(XoutBiff), .Q(INT_QA[113])); + instance = rf2_32x128_wm1_bitcell memB114 (.CLK(CLKB), .WRITE(WRITEB[114]), .READ(READA[114]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[114]), .Xout(XoutBiff), .Q(INT_QA[114])); + instance = rf2_32x128_wm1_bitcell memB115 (.CLK(CLKB), .WRITE(WRITEB[115]), .READ(READA[115]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[115]), .Xout(XoutBiff), .Q(INT_QA[115])); + instance = rf2_32x128_wm1_bitcell memB116 (.CLK(CLKB), .WRITE(WRITEB[116]), .READ(READA[116]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[116]), .Xout(XoutBiff), .Q(INT_QA[116])); + instance = rf2_32x128_wm1_bitcell memB117 (.CLK(CLKB), .WRITE(WRITEB[117]), .READ(READA[117]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[117]), .Xout(XoutBiff), .Q(INT_QA[117])); + instance = rf2_32x128_wm1_bitcell memB118 (.CLK(CLKB), .WRITE(WRITEB[118]), .READ(READA[118]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[118]), .Xout(XoutBiff), .Q(INT_QA[118])); + instance = rf2_32x128_wm1_bitcell memB119 (.CLK(CLKB), .WRITE(WRITEB[119]), .READ(READA[119]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[119]), .Xout(XoutBiff), .Q(INT_QA[119])); + instance = rf2_32x128_wm1_bitcell memB120 (.CLK(CLKB), .WRITE(WRITEB[120]), .READ(READA[120]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[120]), .Xout(XoutBiff), .Q(INT_QA[120])); + instance = rf2_32x128_wm1_bitcell memB121 (.CLK(CLKB), .WRITE(WRITEB[121]), .READ(READA[121]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[121]), .Xout(XoutBiff), .Q(INT_QA[121])); + instance = rf2_32x128_wm1_bitcell memB122 (.CLK(CLKB), .WRITE(WRITEB[122]), .READ(READA[122]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[122]), .Xout(XoutBiff), .Q(INT_QA[122])); + instance = rf2_32x128_wm1_bitcell memB123 (.CLK(CLKB), .WRITE(WRITEB[123]), .READ(READA[123]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[123]), .Xout(XoutBiff), .Q(INT_QA[123])); + instance = rf2_32x128_wm1_bitcell memB124 (.CLK(CLKB), .WRITE(WRITEB[124]), .READ(READA[124]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[124]), .Xout(XoutBiff), .Q(INT_QA[124])); + instance = rf2_32x128_wm1_bitcell memB125 (.CLK(CLKB), .WRITE(WRITEB[125]), .READ(READA[125]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[125]), .Xout(XoutBiff), .Q(INT_QA[125])); + instance = rf2_32x128_wm1_bitcell memB126 (.CLK(CLKB), .WRITE(WRITEB[126]), .READ(READA[126]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[126]), .Xout(XoutBiff), .Q(INT_QA[126])); + instance = rf2_32x128_wm1_bitcell memB127 (.CLK(CLKB), .WRITE(WRITEB[127]), .READ(READA[127]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[127]), .Xout(XoutBiff), .Q(INT_QA[127])); + ) + intern (x_detection_CENB) (primitive = _xor xx_detection_CENB(BMUX_CENB, BMUX_CENB, x_detection_CENB);) + intern (x_detection_CLKB) (primitive = _xor xx_detection_CLKB(CLKB, CLKB, x_detection_CLKB);) + intern (aSEB) (primitive = _and a1SEB ( SEB, DFTRAMBYPinv, aSEB );) + intern (acendftB) (primitive = _and a1cendft[B] (x_detection_CENB, DFTRAMBYPinv, acendftB );) + intern (acendftCB) (primitive = _and a1cendftCB ( x_detection_CLKB, DFTRAMBYPinv, acendftCB );) + intern (XoutB) (primitive = _or oXoutB ( aSEB, acendftB, acendftCA, acendftCB, XoutB );) + intern (DFTRAMBYPinv) (primitive = _inv imDFTRAMBYP ( DFTRAMBYP, DFTRAMBYPinv );) + intern (DB_hold) (array = 127:0; + primitive = _mux mDB_hold0 (BMUX_DB[0], QB_int[0], BMUX_CENB, DB_hold[0] ); + primitive = _mux mDB_hold1 (BMUX_DB[1], QB_int[1], BMUX_CENB, DB_hold[1] ); + primitive = _mux mDB_hold2 (BMUX_DB[2], QB_int[2], BMUX_CENB, DB_hold[2] ); + primitive = _mux mDB_hold3 (BMUX_DB[3], QB_int[3], BMUX_CENB, DB_hold[3] ); + primitive = _mux mDB_hold4 (BMUX_DB[4], QB_int[4], BMUX_CENB, DB_hold[4] ); + primitive = _mux mDB_hold5 (BMUX_DB[5], QB_int[5], BMUX_CENB, DB_hold[5] ); + primitive = _mux mDB_hold6 (BMUX_DB[6], QB_int[6], BMUX_CENB, DB_hold[6] ); + primitive = _mux mDB_hold7 (BMUX_DB[7], QB_int[7], BMUX_CENB, DB_hold[7] ); + primitive = _mux mDB_hold8 (BMUX_DB[8], QB_int[8], BMUX_CENB, DB_hold[8] ); + primitive = _mux mDB_hold9 (BMUX_DB[9], QB_int[9], BMUX_CENB, DB_hold[9] ); + primitive = _mux mDB_hold10 (BMUX_DB[10], QB_int[10], BMUX_CENB, DB_hold[10] ); + primitive = _mux mDB_hold11 (BMUX_DB[11], QB_int[11], BMUX_CENB, DB_hold[11] ); + primitive = _mux mDB_hold12 (BMUX_DB[12], QB_int[12], BMUX_CENB, DB_hold[12] ); + primitive = _mux mDB_hold13 (BMUX_DB[13], QB_int[13], BMUX_CENB, DB_hold[13] ); + primitive = _mux mDB_hold14 (BMUX_DB[14], QB_int[14], BMUX_CENB, DB_hold[14] ); + primitive = _mux mDB_hold15 (BMUX_DB[15], QB_int[15], BMUX_CENB, DB_hold[15] ); + primitive = _mux mDB_hold16 (BMUX_DB[16], QB_int[16], BMUX_CENB, DB_hold[16] ); + primitive = _mux mDB_hold17 (BMUX_DB[17], QB_int[17], BMUX_CENB, DB_hold[17] ); + primitive = _mux mDB_hold18 (BMUX_DB[18], QB_int[18], BMUX_CENB, DB_hold[18] ); + primitive = _mux mDB_hold19 (BMUX_DB[19], QB_int[19], BMUX_CENB, DB_hold[19] ); + primitive = _mux mDB_hold20 (BMUX_DB[20], QB_int[20], BMUX_CENB, DB_hold[20] ); + primitive = _mux mDB_hold21 (BMUX_DB[21], QB_int[21], BMUX_CENB, DB_hold[21] ); + primitive = _mux mDB_hold22 (BMUX_DB[22], QB_int[22], BMUX_CENB, DB_hold[22] ); + primitive = _mux mDB_hold23 (BMUX_DB[23], QB_int[23], BMUX_CENB, DB_hold[23] ); + primitive = _mux mDB_hold24 (BMUX_DB[24], QB_int[24], BMUX_CENB, DB_hold[24] ); + primitive = _mux mDB_hold25 (BMUX_DB[25], QB_int[25], BMUX_CENB, DB_hold[25] ); + primitive = _mux mDB_hold26 (BMUX_DB[26], QB_int[26], BMUX_CENB, DB_hold[26] ); + primitive = _mux mDB_hold27 (BMUX_DB[27], QB_int[27], BMUX_CENB, DB_hold[27] ); + primitive = _mux mDB_hold28 (BMUX_DB[28], QB_int[28], BMUX_CENB, DB_hold[28] ); + primitive = _mux mDB_hold29 (BMUX_DB[29], QB_int[29], BMUX_CENB, DB_hold[29] ); + primitive = _mux mDB_hold30 (BMUX_DB[30], QB_int[30], BMUX_CENB, DB_hold[30] ); + primitive = _mux mDB_hold31 (BMUX_DB[31], QB_int[31], BMUX_CENB, DB_hold[31] ); + primitive = _mux mDB_hold32 (BMUX_DB[32], QB_int[32], BMUX_CENB, DB_hold[32] ); + primitive = _mux mDB_hold33 (BMUX_DB[33], QB_int[33], BMUX_CENB, DB_hold[33] ); + primitive = _mux mDB_hold34 (BMUX_DB[34], QB_int[34], BMUX_CENB, DB_hold[34] ); + primitive = _mux mDB_hold35 (BMUX_DB[35], QB_int[35], BMUX_CENB, DB_hold[35] ); + primitive = _mux mDB_hold36 (BMUX_DB[36], QB_int[36], BMUX_CENB, DB_hold[36] ); + primitive = _mux mDB_hold37 (BMUX_DB[37], QB_int[37], BMUX_CENB, DB_hold[37] ); + primitive = _mux mDB_hold38 (BMUX_DB[38], QB_int[38], BMUX_CENB, DB_hold[38] ); + primitive = _mux mDB_hold39 (BMUX_DB[39], QB_int[39], BMUX_CENB, DB_hold[39] ); + primitive = _mux mDB_hold40 (BMUX_DB[40], QB_int[40], BMUX_CENB, DB_hold[40] ); + primitive = _mux mDB_hold41 (BMUX_DB[41], QB_int[41], BMUX_CENB, DB_hold[41] ); + primitive = _mux mDB_hold42 (BMUX_DB[42], QB_int[42], BMUX_CENB, DB_hold[42] ); + primitive = _mux mDB_hold43 (BMUX_DB[43], QB_int[43], BMUX_CENB, DB_hold[43] ); + primitive = _mux mDB_hold44 (BMUX_DB[44], QB_int[44], BMUX_CENB, DB_hold[44] ); + primitive = _mux mDB_hold45 (BMUX_DB[45], QB_int[45], BMUX_CENB, DB_hold[45] ); + primitive = _mux mDB_hold46 (BMUX_DB[46], QB_int[46], BMUX_CENB, DB_hold[46] ); + primitive = _mux mDB_hold47 (BMUX_DB[47], QB_int[47], BMUX_CENB, DB_hold[47] ); + primitive = _mux mDB_hold48 (BMUX_DB[48], QB_int[48], BMUX_CENB, DB_hold[48] ); + primitive = _mux mDB_hold49 (BMUX_DB[49], QB_int[49], BMUX_CENB, DB_hold[49] ); + primitive = _mux mDB_hold50 (BMUX_DB[50], QB_int[50], BMUX_CENB, DB_hold[50] ); + primitive = _mux mDB_hold51 (BMUX_DB[51], QB_int[51], BMUX_CENB, DB_hold[51] ); + primitive = _mux mDB_hold52 (BMUX_DB[52], QB_int[52], BMUX_CENB, DB_hold[52] ); + primitive = _mux mDB_hold53 (BMUX_DB[53], QB_int[53], BMUX_CENB, DB_hold[53] ); + primitive = _mux mDB_hold54 (BMUX_DB[54], QB_int[54], BMUX_CENB, DB_hold[54] ); + primitive = _mux mDB_hold55 (BMUX_DB[55], QB_int[55], BMUX_CENB, DB_hold[55] ); + primitive = _mux mDB_hold56 (BMUX_DB[56], QB_int[56], BMUX_CENB, DB_hold[56] ); + primitive = _mux mDB_hold57 (BMUX_DB[57], QB_int[57], BMUX_CENB, DB_hold[57] ); + primitive = _mux mDB_hold58 (BMUX_DB[58], QB_int[58], BMUX_CENB, DB_hold[58] ); + primitive = _mux mDB_hold59 (BMUX_DB[59], QB_int[59], BMUX_CENB, DB_hold[59] ); + primitive = _mux mDB_hold60 (BMUX_DB[60], QB_int[60], BMUX_CENB, DB_hold[60] ); + primitive = _mux mDB_hold61 (BMUX_DB[61], QB_int[61], BMUX_CENB, DB_hold[61] ); + primitive = _mux mDB_hold62 (BMUX_DB[62], QB_int[62], BMUX_CENB, DB_hold[62] ); + primitive = _mux mDB_hold63 (BMUX_DB[63], QB_int[63], BMUX_CENB, DB_hold[63] ); + primitive = _mux mDB_hold64 (BMUX_DB[64], QB_int[64], BMUX_CENB, DB_hold[64] ); + primitive = _mux mDB_hold65 (BMUX_DB[65], QB_int[65], BMUX_CENB, DB_hold[65] ); + primitive = _mux mDB_hold66 (BMUX_DB[66], QB_int[66], BMUX_CENB, DB_hold[66] ); + primitive = _mux mDB_hold67 (BMUX_DB[67], QB_int[67], BMUX_CENB, DB_hold[67] ); + primitive = _mux mDB_hold68 (BMUX_DB[68], QB_int[68], BMUX_CENB, DB_hold[68] ); + primitive = _mux mDB_hold69 (BMUX_DB[69], QB_int[69], BMUX_CENB, DB_hold[69] ); + primitive = _mux mDB_hold70 (BMUX_DB[70], QB_int[70], BMUX_CENB, DB_hold[70] ); + primitive = _mux mDB_hold71 (BMUX_DB[71], QB_int[71], BMUX_CENB, DB_hold[71] ); + primitive = _mux mDB_hold72 (BMUX_DB[72], QB_int[72], BMUX_CENB, DB_hold[72] ); + primitive = _mux mDB_hold73 (BMUX_DB[73], QB_int[73], BMUX_CENB, DB_hold[73] ); + primitive = _mux mDB_hold74 (BMUX_DB[74], QB_int[74], BMUX_CENB, DB_hold[74] ); + primitive = _mux mDB_hold75 (BMUX_DB[75], QB_int[75], BMUX_CENB, DB_hold[75] ); + primitive = _mux mDB_hold76 (BMUX_DB[76], QB_int[76], BMUX_CENB, DB_hold[76] ); + primitive = _mux mDB_hold77 (BMUX_DB[77], QB_int[77], BMUX_CENB, DB_hold[77] ); + primitive = _mux mDB_hold78 (BMUX_DB[78], QB_int[78], BMUX_CENB, DB_hold[78] ); + primitive = _mux mDB_hold79 (BMUX_DB[79], QB_int[79], BMUX_CENB, DB_hold[79] ); + primitive = _mux mDB_hold80 (BMUX_DB[80], QB_int[80], BMUX_CENB, DB_hold[80] ); + primitive = _mux mDB_hold81 (BMUX_DB[81], QB_int[81], BMUX_CENB, DB_hold[81] ); + primitive = _mux mDB_hold82 (BMUX_DB[82], QB_int[82], BMUX_CENB, DB_hold[82] ); + primitive = _mux mDB_hold83 (BMUX_DB[83], QB_int[83], BMUX_CENB, DB_hold[83] ); + primitive = _mux mDB_hold84 (BMUX_DB[84], QB_int[84], BMUX_CENB, DB_hold[84] ); + primitive = _mux mDB_hold85 (BMUX_DB[85], QB_int[85], BMUX_CENB, DB_hold[85] ); + primitive = _mux mDB_hold86 (BMUX_DB[86], QB_int[86], BMUX_CENB, DB_hold[86] ); + primitive = _mux mDB_hold87 (BMUX_DB[87], QB_int[87], BMUX_CENB, DB_hold[87] ); + primitive = _mux mDB_hold88 (BMUX_DB[88], QB_int[88], BMUX_CENB, DB_hold[88] ); + primitive = _mux mDB_hold89 (BMUX_DB[89], QB_int[89], BMUX_CENB, DB_hold[89] ); + primitive = _mux mDB_hold90 (BMUX_DB[90], QB_int[90], BMUX_CENB, DB_hold[90] ); + primitive = _mux mDB_hold91 (BMUX_DB[91], QB_int[91], BMUX_CENB, DB_hold[91] ); + primitive = _mux mDB_hold92 (BMUX_DB[92], QB_int[92], BMUX_CENB, DB_hold[92] ); + primitive = _mux mDB_hold93 (BMUX_DB[93], QB_int[93], BMUX_CENB, DB_hold[93] ); + primitive = _mux mDB_hold94 (BMUX_DB[94], QB_int[94], BMUX_CENB, DB_hold[94] ); + primitive = _mux mDB_hold95 (BMUX_DB[95], QB_int[95], BMUX_CENB, DB_hold[95] ); + primitive = _mux mDB_hold96 (BMUX_DB[96], QB_int[96], BMUX_CENB, DB_hold[96] ); + primitive = _mux mDB_hold97 (BMUX_DB[97], QB_int[97], BMUX_CENB, DB_hold[97] ); + primitive = _mux mDB_hold98 (BMUX_DB[98], QB_int[98], BMUX_CENB, DB_hold[98] ); + primitive = _mux mDB_hold99 (BMUX_DB[99], QB_int[99], BMUX_CENB, DB_hold[99] ); + primitive = _mux mDB_hold100 (BMUX_DB[100], QB_int[100], BMUX_CENB, DB_hold[100] ); + primitive = _mux mDB_hold101 (BMUX_DB[101], QB_int[101], BMUX_CENB, DB_hold[101] ); + primitive = _mux mDB_hold102 (BMUX_DB[102], QB_int[102], BMUX_CENB, DB_hold[102] ); + primitive = _mux mDB_hold103 (BMUX_DB[103], QB_int[103], BMUX_CENB, DB_hold[103] ); + primitive = _mux mDB_hold104 (BMUX_DB[104], QB_int[104], BMUX_CENB, DB_hold[104] ); + primitive = _mux mDB_hold105 (BMUX_DB[105], QB_int[105], BMUX_CENB, DB_hold[105] ); + primitive = _mux mDB_hold106 (BMUX_DB[106], QB_int[106], BMUX_CENB, DB_hold[106] ); + primitive = _mux mDB_hold107 (BMUX_DB[107], QB_int[107], BMUX_CENB, DB_hold[107] ); + primitive = _mux mDB_hold108 (BMUX_DB[108], QB_int[108], BMUX_CENB, DB_hold[108] ); + primitive = _mux mDB_hold109 (BMUX_DB[109], QB_int[109], BMUX_CENB, DB_hold[109] ); + primitive = _mux mDB_hold110 (BMUX_DB[110], QB_int[110], BMUX_CENB, DB_hold[110] ); + primitive = _mux mDB_hold111 (BMUX_DB[111], QB_int[111], BMUX_CENB, DB_hold[111] ); + primitive = _mux mDB_hold112 (BMUX_DB[112], QB_int[112], BMUX_CENB, DB_hold[112] ); + primitive = _mux mDB_hold113 (BMUX_DB[113], QB_int[113], BMUX_CENB, DB_hold[113] ); + primitive = _mux mDB_hold114 (BMUX_DB[114], QB_int[114], BMUX_CENB, DB_hold[114] ); + primitive = _mux mDB_hold115 (BMUX_DB[115], QB_int[115], BMUX_CENB, DB_hold[115] ); + primitive = _mux mDB_hold116 (BMUX_DB[116], QB_int[116], BMUX_CENB, DB_hold[116] ); + primitive = _mux mDB_hold117 (BMUX_DB[117], QB_int[117], BMUX_CENB, DB_hold[117] ); + primitive = _mux mDB_hold118 (BMUX_DB[118], QB_int[118], BMUX_CENB, DB_hold[118] ); + primitive = _mux mDB_hold119 (BMUX_DB[119], QB_int[119], BMUX_CENB, DB_hold[119] ); + primitive = _mux mDB_hold120 (BMUX_DB[120], QB_int[120], BMUX_CENB, DB_hold[120] ); + primitive = _mux mDB_hold121 (BMUX_DB[121], QB_int[121], BMUX_CENB, DB_hold[121] ); + primitive = _mux mDB_hold122 (BMUX_DB[122], QB_int[122], BMUX_CENB, DB_hold[122] ); + primitive = _mux mDB_hold123 (BMUX_DB[123], QB_int[123], BMUX_CENB, DB_hold[123] ); + primitive = _mux mDB_hold124 (BMUX_DB[124], QB_int[124], BMUX_CENB, DB_hold[124] ); + primitive = _mux mDB_hold125 (BMUX_DB[125], QB_int[125], BMUX_CENB, DB_hold[125] ); + primitive = _mux mDB_hold126 (BMUX_DB[126], QB_int[126], BMUX_CENB, DB_hold[126] ); + primitive = _mux mDB_hold127 (BMUX_DB[127], QB_int[127], BMUX_CENB, DB_hold[127] ); + ) + intern (DB_scan) (array = 127:0; + primitive = _mux mDB_scan0 (DB_hold[0], BMUX_DB[0], DFTRAMBYP, DB_scan[0] ); + primitive = _mux mDB_scan1 (DB_hold[1], BMUX_DB[1], DFTRAMBYP, DB_scan[1] ); + primitive = _mux mDB_scan2 (DB_hold[2], BMUX_DB[2], DFTRAMBYP, DB_scan[2] ); + primitive = _mux mDB_scan3 (DB_hold[3], BMUX_DB[3], DFTRAMBYP, DB_scan[3] ); + primitive = _mux mDB_scan4 (DB_hold[4], BMUX_DB[4], DFTRAMBYP, DB_scan[4] ); + primitive = _mux mDB_scan5 (DB_hold[5], BMUX_DB[5], DFTRAMBYP, DB_scan[5] ); + primitive = _mux mDB_scan6 (DB_hold[6], BMUX_DB[6], DFTRAMBYP, DB_scan[6] ); + primitive = _mux mDB_scan7 (DB_hold[7], BMUX_DB[7], DFTRAMBYP, DB_scan[7] ); + primitive = _mux mDB_scan8 (DB_hold[8], BMUX_DB[8], DFTRAMBYP, DB_scan[8] ); + primitive = _mux mDB_scan9 (DB_hold[9], BMUX_DB[9], DFTRAMBYP, DB_scan[9] ); + primitive = _mux mDB_scan10 (DB_hold[10], BMUX_DB[10], DFTRAMBYP, DB_scan[10] ); + primitive = _mux mDB_scan11 (DB_hold[11], BMUX_DB[11], DFTRAMBYP, DB_scan[11] ); + primitive = _mux mDB_scan12 (DB_hold[12], BMUX_DB[12], DFTRAMBYP, DB_scan[12] ); + primitive = _mux mDB_scan13 (DB_hold[13], BMUX_DB[13], DFTRAMBYP, DB_scan[13] ); + primitive = _mux mDB_scan14 (DB_hold[14], BMUX_DB[14], DFTRAMBYP, DB_scan[14] ); + primitive = _mux mDB_scan15 (DB_hold[15], BMUX_DB[15], DFTRAMBYP, DB_scan[15] ); + primitive = _mux mDB_scan16 (DB_hold[16], BMUX_DB[16], DFTRAMBYP, DB_scan[16] ); + primitive = _mux mDB_scan17 (DB_hold[17], BMUX_DB[17], DFTRAMBYP, DB_scan[17] ); + primitive = _mux mDB_scan18 (DB_hold[18], BMUX_DB[18], DFTRAMBYP, DB_scan[18] ); + primitive = _mux mDB_scan19 (DB_hold[19], BMUX_DB[19], DFTRAMBYP, DB_scan[19] ); + primitive = _mux mDB_scan20 (DB_hold[20], BMUX_DB[20], DFTRAMBYP, DB_scan[20] ); + primitive = _mux mDB_scan21 (DB_hold[21], BMUX_DB[21], DFTRAMBYP, DB_scan[21] ); + primitive = _mux mDB_scan22 (DB_hold[22], BMUX_DB[22], DFTRAMBYP, DB_scan[22] ); + primitive = _mux mDB_scan23 (DB_hold[23], BMUX_DB[23], DFTRAMBYP, DB_scan[23] ); + primitive = _mux mDB_scan24 (DB_hold[24], BMUX_DB[24], DFTRAMBYP, DB_scan[24] ); + primitive = _mux mDB_scan25 (DB_hold[25], BMUX_DB[25], DFTRAMBYP, DB_scan[25] ); + primitive = _mux mDB_scan26 (DB_hold[26], BMUX_DB[26], DFTRAMBYP, DB_scan[26] ); + primitive = _mux mDB_scan27 (DB_hold[27], BMUX_DB[27], DFTRAMBYP, DB_scan[27] ); + primitive = _mux mDB_scan28 (DB_hold[28], BMUX_DB[28], DFTRAMBYP, DB_scan[28] ); + primitive = _mux mDB_scan29 (DB_hold[29], BMUX_DB[29], DFTRAMBYP, DB_scan[29] ); + primitive = _mux mDB_scan30 (DB_hold[30], BMUX_DB[30], DFTRAMBYP, DB_scan[30] ); + primitive = _mux mDB_scan31 (DB_hold[31], BMUX_DB[31], DFTRAMBYP, DB_scan[31] ); + primitive = _mux mDB_scan32 (DB_hold[32], BMUX_DB[32], DFTRAMBYP, DB_scan[32] ); + primitive = _mux mDB_scan33 (DB_hold[33], BMUX_DB[33], DFTRAMBYP, DB_scan[33] ); + primitive = _mux mDB_scan34 (DB_hold[34], BMUX_DB[34], DFTRAMBYP, DB_scan[34] ); + primitive = _mux mDB_scan35 (DB_hold[35], BMUX_DB[35], DFTRAMBYP, DB_scan[35] ); + primitive = _mux mDB_scan36 (DB_hold[36], BMUX_DB[36], DFTRAMBYP, DB_scan[36] ); + primitive = _mux mDB_scan37 (DB_hold[37], BMUX_DB[37], DFTRAMBYP, DB_scan[37] ); + primitive = _mux mDB_scan38 (DB_hold[38], BMUX_DB[38], DFTRAMBYP, DB_scan[38] ); + primitive = _mux mDB_scan39 (DB_hold[39], BMUX_DB[39], DFTRAMBYP, DB_scan[39] ); + primitive = _mux mDB_scan40 (DB_hold[40], BMUX_DB[40], DFTRAMBYP, DB_scan[40] ); + primitive = _mux mDB_scan41 (DB_hold[41], BMUX_DB[41], DFTRAMBYP, DB_scan[41] ); + primitive = _mux mDB_scan42 (DB_hold[42], BMUX_DB[42], DFTRAMBYP, DB_scan[42] ); + primitive = _mux mDB_scan43 (DB_hold[43], BMUX_DB[43], DFTRAMBYP, DB_scan[43] ); + primitive = _mux mDB_scan44 (DB_hold[44], BMUX_DB[44], DFTRAMBYP, DB_scan[44] ); + primitive = _mux mDB_scan45 (DB_hold[45], BMUX_DB[45], DFTRAMBYP, DB_scan[45] ); + primitive = _mux mDB_scan46 (DB_hold[46], BMUX_DB[46], DFTRAMBYP, DB_scan[46] ); + primitive = _mux mDB_scan47 (DB_hold[47], BMUX_DB[47], DFTRAMBYP, DB_scan[47] ); + primitive = _mux mDB_scan48 (DB_hold[48], BMUX_DB[48], DFTRAMBYP, DB_scan[48] ); + primitive = _mux mDB_scan49 (DB_hold[49], BMUX_DB[49], DFTRAMBYP, DB_scan[49] ); + primitive = _mux mDB_scan50 (DB_hold[50], BMUX_DB[50], DFTRAMBYP, DB_scan[50] ); + primitive = _mux mDB_scan51 (DB_hold[51], BMUX_DB[51], DFTRAMBYP, DB_scan[51] ); + primitive = _mux mDB_scan52 (DB_hold[52], BMUX_DB[52], DFTRAMBYP, DB_scan[52] ); + primitive = _mux mDB_scan53 (DB_hold[53], BMUX_DB[53], DFTRAMBYP, DB_scan[53] ); + primitive = _mux mDB_scan54 (DB_hold[54], BMUX_DB[54], DFTRAMBYP, DB_scan[54] ); + primitive = _mux mDB_scan55 (DB_hold[55], BMUX_DB[55], DFTRAMBYP, DB_scan[55] ); + primitive = _mux mDB_scan56 (DB_hold[56], BMUX_DB[56], DFTRAMBYP, DB_scan[56] ); + primitive = _mux mDB_scan57 (DB_hold[57], BMUX_DB[57], DFTRAMBYP, DB_scan[57] ); + primitive = _mux mDB_scan58 (DB_hold[58], BMUX_DB[58], DFTRAMBYP, DB_scan[58] ); + primitive = _mux mDB_scan59 (DB_hold[59], BMUX_DB[59], DFTRAMBYP, DB_scan[59] ); + primitive = _mux mDB_scan60 (DB_hold[60], BMUX_DB[60], DFTRAMBYP, DB_scan[60] ); + primitive = _mux mDB_scan61 (DB_hold[61], BMUX_DB[61], DFTRAMBYP, DB_scan[61] ); + primitive = _mux mDB_scan62 (DB_hold[62], BMUX_DB[62], DFTRAMBYP, DB_scan[62] ); + primitive = _mux mDB_scan63 (DB_hold[63], BMUX_DB[63], DFTRAMBYP, DB_scan[63] ); + primitive = _mux mDB_scan64 (DB_hold[64], BMUX_DB[64], DFTRAMBYP, DB_scan[64] ); + primitive = _mux mDB_scan65 (DB_hold[65], BMUX_DB[65], DFTRAMBYP, DB_scan[65] ); + primitive = _mux mDB_scan66 (DB_hold[66], BMUX_DB[66], DFTRAMBYP, DB_scan[66] ); + primitive = _mux mDB_scan67 (DB_hold[67], BMUX_DB[67], DFTRAMBYP, DB_scan[67] ); + primitive = _mux mDB_scan68 (DB_hold[68], BMUX_DB[68], DFTRAMBYP, DB_scan[68] ); + primitive = _mux mDB_scan69 (DB_hold[69], BMUX_DB[69], DFTRAMBYP, DB_scan[69] ); + primitive = _mux mDB_scan70 (DB_hold[70], BMUX_DB[70], DFTRAMBYP, DB_scan[70] ); + primitive = _mux mDB_scan71 (DB_hold[71], BMUX_DB[71], DFTRAMBYP, DB_scan[71] ); + primitive = _mux mDB_scan72 (DB_hold[72], BMUX_DB[72], DFTRAMBYP, DB_scan[72] ); + primitive = _mux mDB_scan73 (DB_hold[73], BMUX_DB[73], DFTRAMBYP, DB_scan[73] ); + primitive = _mux mDB_scan74 (DB_hold[74], BMUX_DB[74], DFTRAMBYP, DB_scan[74] ); + primitive = _mux mDB_scan75 (DB_hold[75], BMUX_DB[75], DFTRAMBYP, DB_scan[75] ); + primitive = _mux mDB_scan76 (DB_hold[76], BMUX_DB[76], DFTRAMBYP, DB_scan[76] ); + primitive = _mux mDB_scan77 (DB_hold[77], BMUX_DB[77], DFTRAMBYP, DB_scan[77] ); + primitive = _mux mDB_scan78 (DB_hold[78], BMUX_DB[78], DFTRAMBYP, DB_scan[78] ); + primitive = _mux mDB_scan79 (DB_hold[79], BMUX_DB[79], DFTRAMBYP, DB_scan[79] ); + primitive = _mux mDB_scan80 (DB_hold[80], BMUX_DB[80], DFTRAMBYP, DB_scan[80] ); + primitive = _mux mDB_scan81 (DB_hold[81], BMUX_DB[81], DFTRAMBYP, DB_scan[81] ); + primitive = _mux mDB_scan82 (DB_hold[82], BMUX_DB[82], DFTRAMBYP, DB_scan[82] ); + primitive = _mux mDB_scan83 (DB_hold[83], BMUX_DB[83], DFTRAMBYP, DB_scan[83] ); + primitive = _mux mDB_scan84 (DB_hold[84], BMUX_DB[84], DFTRAMBYP, DB_scan[84] ); + primitive = _mux mDB_scan85 (DB_hold[85], BMUX_DB[85], DFTRAMBYP, DB_scan[85] ); + primitive = _mux mDB_scan86 (DB_hold[86], BMUX_DB[86], DFTRAMBYP, DB_scan[86] ); + primitive = _mux mDB_scan87 (DB_hold[87], BMUX_DB[87], DFTRAMBYP, DB_scan[87] ); + primitive = _mux mDB_scan88 (DB_hold[88], BMUX_DB[88], DFTRAMBYP, DB_scan[88] ); + primitive = _mux mDB_scan89 (DB_hold[89], BMUX_DB[89], DFTRAMBYP, DB_scan[89] ); + primitive = _mux mDB_scan90 (DB_hold[90], BMUX_DB[90], DFTRAMBYP, DB_scan[90] ); + primitive = _mux mDB_scan91 (DB_hold[91], BMUX_DB[91], DFTRAMBYP, DB_scan[91] ); + primitive = _mux mDB_scan92 (DB_hold[92], BMUX_DB[92], DFTRAMBYP, DB_scan[92] ); + primitive = _mux mDB_scan93 (DB_hold[93], BMUX_DB[93], DFTRAMBYP, DB_scan[93] ); + primitive = _mux mDB_scan94 (DB_hold[94], BMUX_DB[94], DFTRAMBYP, DB_scan[94] ); + primitive = _mux mDB_scan95 (DB_hold[95], BMUX_DB[95], DFTRAMBYP, DB_scan[95] ); + primitive = _mux mDB_scan96 (DB_hold[96], BMUX_DB[96], DFTRAMBYP, DB_scan[96] ); + primitive = _mux mDB_scan97 (DB_hold[97], BMUX_DB[97], DFTRAMBYP, DB_scan[97] ); + primitive = _mux mDB_scan98 (DB_hold[98], BMUX_DB[98], DFTRAMBYP, DB_scan[98] ); + primitive = _mux mDB_scan99 (DB_hold[99], BMUX_DB[99], DFTRAMBYP, DB_scan[99] ); + primitive = _mux mDB_scan100 (DB_hold[100], BMUX_DB[100], DFTRAMBYP, DB_scan[100] ); + primitive = _mux mDB_scan101 (DB_hold[101], BMUX_DB[101], DFTRAMBYP, DB_scan[101] ); + primitive = _mux mDB_scan102 (DB_hold[102], BMUX_DB[102], DFTRAMBYP, DB_scan[102] ); + primitive = _mux mDB_scan103 (DB_hold[103], BMUX_DB[103], DFTRAMBYP, DB_scan[103] ); + primitive = _mux mDB_scan104 (DB_hold[104], BMUX_DB[104], DFTRAMBYP, DB_scan[104] ); + primitive = _mux mDB_scan105 (DB_hold[105], BMUX_DB[105], DFTRAMBYP, DB_scan[105] ); + primitive = _mux mDB_scan106 (DB_hold[106], BMUX_DB[106], DFTRAMBYP, DB_scan[106] ); + primitive = _mux mDB_scan107 (DB_hold[107], BMUX_DB[107], DFTRAMBYP, DB_scan[107] ); + primitive = _mux mDB_scan108 (DB_hold[108], BMUX_DB[108], DFTRAMBYP, DB_scan[108] ); + primitive = _mux mDB_scan109 (DB_hold[109], BMUX_DB[109], DFTRAMBYP, DB_scan[109] ); + primitive = _mux mDB_scan110 (DB_hold[110], BMUX_DB[110], DFTRAMBYP, DB_scan[110] ); + primitive = _mux mDB_scan111 (DB_hold[111], BMUX_DB[111], DFTRAMBYP, DB_scan[111] ); + primitive = _mux mDB_scan112 (DB_hold[112], BMUX_DB[112], DFTRAMBYP, DB_scan[112] ); + primitive = _mux mDB_scan113 (DB_hold[113], BMUX_DB[113], DFTRAMBYP, DB_scan[113] ); + primitive = _mux mDB_scan114 (DB_hold[114], BMUX_DB[114], DFTRAMBYP, DB_scan[114] ); + primitive = _mux mDB_scan115 (DB_hold[115], BMUX_DB[115], DFTRAMBYP, DB_scan[115] ); + primitive = _mux mDB_scan116 (DB_hold[116], BMUX_DB[116], DFTRAMBYP, DB_scan[116] ); + primitive = _mux mDB_scan117 (DB_hold[117], BMUX_DB[117], DFTRAMBYP, DB_scan[117] ); + primitive = _mux mDB_scan118 (DB_hold[118], BMUX_DB[118], DFTRAMBYP, DB_scan[118] ); + primitive = _mux mDB_scan119 (DB_hold[119], BMUX_DB[119], DFTRAMBYP, DB_scan[119] ); + primitive = _mux mDB_scan120 (DB_hold[120], BMUX_DB[120], DFTRAMBYP, DB_scan[120] ); + primitive = _mux mDB_scan121 (DB_hold[121], BMUX_DB[121], DFTRAMBYP, DB_scan[121] ); + primitive = _mux mDB_scan122 (DB_hold[122], BMUX_DB[122], DFTRAMBYP, DB_scan[122] ); + primitive = _mux mDB_scan123 (DB_hold[123], BMUX_DB[123], DFTRAMBYP, DB_scan[123] ); + primitive = _mux mDB_scan124 (DB_hold[124], BMUX_DB[124], DFTRAMBYP, DB_scan[124] ); + primitive = _mux mDB_scan125 (DB_hold[125], BMUX_DB[125], DFTRAMBYP, DB_scan[125] ); + primitive = _mux mDB_scan126 (DB_hold[126], BMUX_DB[126], DFTRAMBYP, DB_scan[126] ); + primitive = _mux mDB_scan127 (DB_hold[127], BMUX_DB[127], DFTRAMBYP, DB_scan[127] ); + ) + intern (QB_int) (array = 127 : 0; + instance = rf2_32x128_wm1_scanflop uDQB0 (.CLK(CLKB), .SE(SEB), .SI(QB_int[1]), .D(DB_scan[0]), .Q(QB_int[0]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB1 (.CLK(CLKB), .SE(SEB), .SI(QB_int[2]), .D(DB_scan[1]), .Q(QB_int[1]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB2 (.CLK(CLKB), .SE(SEB), .SI(QB_int[3]), .D(DB_scan[2]), .Q(QB_int[2]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB3 (.CLK(CLKB), .SE(SEB), .SI(QB_int[4]), .D(DB_scan[3]), .Q(QB_int[3]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB4 (.CLK(CLKB), .SE(SEB), .SI(QB_int[5]), .D(DB_scan[4]), .Q(QB_int[4]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB5 (.CLK(CLKB), .SE(SEB), .SI(QB_int[6]), .D(DB_scan[5]), .Q(QB_int[5]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB6 (.CLK(CLKB), .SE(SEB), .SI(QB_int[7]), .D(DB_scan[6]), .Q(QB_int[6]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB7 (.CLK(CLKB), .SE(SEB), .SI(QB_int[8]), .D(DB_scan[7]), .Q(QB_int[7]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB8 (.CLK(CLKB), .SE(SEB), .SI(QB_int[9]), .D(DB_scan[8]), .Q(QB_int[8]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB9 (.CLK(CLKB), .SE(SEB), .SI(QB_int[10]), .D(DB_scan[9]), .Q(QB_int[9]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB10 (.CLK(CLKB), .SE(SEB), .SI(QB_int[11]), .D(DB_scan[10]), .Q(QB_int[10]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB11 (.CLK(CLKB), .SE(SEB), .SI(QB_int[12]), .D(DB_scan[11]), .Q(QB_int[11]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB12 (.CLK(CLKB), .SE(SEB), .SI(QB_int[13]), .D(DB_scan[12]), .Q(QB_int[12]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB13 (.CLK(CLKB), .SE(SEB), .SI(QB_int[14]), .D(DB_scan[13]), .Q(QB_int[13]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB14 (.CLK(CLKB), .SE(SEB), .SI(QB_int[15]), .D(DB_scan[14]), .Q(QB_int[14]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB15 (.CLK(CLKB), .SE(SEB), .SI(QB_int[16]), .D(DB_scan[15]), .Q(QB_int[15]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB16 (.CLK(CLKB), .SE(SEB), .SI(QB_int[17]), .D(DB_scan[16]), .Q(QB_int[16]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB17 (.CLK(CLKB), .SE(SEB), .SI(QB_int[18]), .D(DB_scan[17]), .Q(QB_int[17]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB18 (.CLK(CLKB), .SE(SEB), .SI(QB_int[19]), .D(DB_scan[18]), .Q(QB_int[18]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB19 (.CLK(CLKB), .SE(SEB), .SI(QB_int[20]), .D(DB_scan[19]), .Q(QB_int[19]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB20 (.CLK(CLKB), .SE(SEB), .SI(QB_int[21]), .D(DB_scan[20]), .Q(QB_int[20]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB21 (.CLK(CLKB), .SE(SEB), .SI(QB_int[22]), .D(DB_scan[21]), .Q(QB_int[21]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB22 (.CLK(CLKB), .SE(SEB), .SI(QB_int[23]), .D(DB_scan[22]), .Q(QB_int[22]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB23 (.CLK(CLKB), .SE(SEB), .SI(QB_int[24]), .D(DB_scan[23]), .Q(QB_int[23]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB24 (.CLK(CLKB), .SE(SEB), .SI(QB_int[25]), .D(DB_scan[24]), .Q(QB_int[24]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB25 (.CLK(CLKB), .SE(SEB), .SI(QB_int[26]), .D(DB_scan[25]), .Q(QB_int[25]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB26 (.CLK(CLKB), .SE(SEB), .SI(QB_int[27]), .D(DB_scan[26]), .Q(QB_int[26]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB27 (.CLK(CLKB), .SE(SEB), .SI(QB_int[28]), .D(DB_scan[27]), .Q(QB_int[27]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB28 (.CLK(CLKB), .SE(SEB), .SI(QB_int[29]), .D(DB_scan[28]), .Q(QB_int[28]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB29 (.CLK(CLKB), .SE(SEB), .SI(QB_int[30]), .D(DB_scan[29]), .Q(QB_int[29]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB30 (.CLK(CLKB), .SE(SEB), .SI(QB_int[31]), .D(DB_scan[30]), .Q(QB_int[30]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB31 (.CLK(CLKB), .SE(SEB), .SI(QB_int[32]), .D(DB_scan[31]), .Q(QB_int[31]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB32 (.CLK(CLKB), .SE(SEB), .SI(QB_int[33]), .D(DB_scan[32]), .Q(QB_int[32]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB33 (.CLK(CLKB), .SE(SEB), .SI(QB_int[34]), .D(DB_scan[33]), .Q(QB_int[33]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB34 (.CLK(CLKB), .SE(SEB), .SI(QB_int[35]), .D(DB_scan[34]), .Q(QB_int[34]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB35 (.CLK(CLKB), .SE(SEB), .SI(QB_int[36]), .D(DB_scan[35]), .Q(QB_int[35]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB36 (.CLK(CLKB), .SE(SEB), .SI(QB_int[37]), .D(DB_scan[36]), .Q(QB_int[36]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB37 (.CLK(CLKB), .SE(SEB), .SI(QB_int[38]), .D(DB_scan[37]), .Q(QB_int[37]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB38 (.CLK(CLKB), .SE(SEB), .SI(QB_int[39]), .D(DB_scan[38]), .Q(QB_int[38]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB39 (.CLK(CLKB), .SE(SEB), .SI(QB_int[40]), .D(DB_scan[39]), .Q(QB_int[39]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB40 (.CLK(CLKB), .SE(SEB), .SI(QB_int[41]), .D(DB_scan[40]), .Q(QB_int[40]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB41 (.CLK(CLKB), .SE(SEB), .SI(QB_int[42]), .D(DB_scan[41]), .Q(QB_int[41]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB42 (.CLK(CLKB), .SE(SEB), .SI(QB_int[43]), .D(DB_scan[42]), .Q(QB_int[42]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB43 (.CLK(CLKB), .SE(SEB), .SI(QB_int[44]), .D(DB_scan[43]), .Q(QB_int[43]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB44 (.CLK(CLKB), .SE(SEB), .SI(QB_int[45]), .D(DB_scan[44]), .Q(QB_int[44]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB45 (.CLK(CLKB), .SE(SEB), .SI(QB_int[46]), .D(DB_scan[45]), .Q(QB_int[45]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB46 (.CLK(CLKB), .SE(SEB), .SI(QB_int[47]), .D(DB_scan[46]), .Q(QB_int[46]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB47 (.CLK(CLKB), .SE(SEB), .SI(QB_int[48]), .D(DB_scan[47]), .Q(QB_int[47]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB48 (.CLK(CLKB), .SE(SEB), .SI(QB_int[49]), .D(DB_scan[48]), .Q(QB_int[48]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB49 (.CLK(CLKB), .SE(SEB), .SI(QB_int[50]), .D(DB_scan[49]), .Q(QB_int[49]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB50 (.CLK(CLKB), .SE(SEB), .SI(QB_int[51]), .D(DB_scan[50]), .Q(QB_int[50]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB51 (.CLK(CLKB), .SE(SEB), .SI(QB_int[52]), .D(DB_scan[51]), .Q(QB_int[51]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB52 (.CLK(CLKB), .SE(SEB), .SI(QB_int[53]), .D(DB_scan[52]), .Q(QB_int[52]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB53 (.CLK(CLKB), .SE(SEB), .SI(QB_int[54]), .D(DB_scan[53]), .Q(QB_int[53]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB54 (.CLK(CLKB), .SE(SEB), .SI(QB_int[55]), .D(DB_scan[54]), .Q(QB_int[54]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB55 (.CLK(CLKB), .SE(SEB), .SI(QB_int[56]), .D(DB_scan[55]), .Q(QB_int[55]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB56 (.CLK(CLKB), .SE(SEB), .SI(QB_int[57]), .D(DB_scan[56]), .Q(QB_int[56]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB57 (.CLK(CLKB), .SE(SEB), .SI(QB_int[58]), .D(DB_scan[57]), .Q(QB_int[57]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB58 (.CLK(CLKB), .SE(SEB), .SI(QB_int[59]), .D(DB_scan[58]), .Q(QB_int[58]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB59 (.CLK(CLKB), .SE(SEB), .SI(QB_int[60]), .D(DB_scan[59]), .Q(QB_int[59]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB60 (.CLK(CLKB), .SE(SEB), .SI(QB_int[61]), .D(DB_scan[60]), .Q(QB_int[60]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB61 (.CLK(CLKB), .SE(SEB), .SI(QB_int[62]), .D(DB_scan[61]), .Q(QB_int[61]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB62 (.CLK(CLKB), .SE(SEB), .SI(QB_int[63]), .D(DB_scan[62]), .Q(QB_int[62]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB63 (.CLK(CLKB), .SE(SEB), .SI(BUS_SIB[0]), .D(DB_scan[63]), .Q(QB_int[63]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB64 (.CLK(CLKB), .SE(SEB), .SI(BUS_SIB[1]), .D(DB_scan[64]), .Q(QB_int[64]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB65 (.CLK(CLKB), .SE(SEB), .SI(QB_int[64]), .D(DB_scan[65]), .Q(QB_int[65]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB66 (.CLK(CLKB), .SE(SEB), .SI(QB_int[65]), .D(DB_scan[66]), .Q(QB_int[66]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB67 (.CLK(CLKB), .SE(SEB), .SI(QB_int[66]), .D(DB_scan[67]), .Q(QB_int[67]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB68 (.CLK(CLKB), .SE(SEB), .SI(QB_int[67]), .D(DB_scan[68]), .Q(QB_int[68]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB69 (.CLK(CLKB), .SE(SEB), .SI(QB_int[68]), .D(DB_scan[69]), .Q(QB_int[69]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB70 (.CLK(CLKB), .SE(SEB), .SI(QB_int[69]), .D(DB_scan[70]), .Q(QB_int[70]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB71 (.CLK(CLKB), .SE(SEB), .SI(QB_int[70]), .D(DB_scan[71]), .Q(QB_int[71]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB72 (.CLK(CLKB), .SE(SEB), .SI(QB_int[71]), .D(DB_scan[72]), .Q(QB_int[72]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB73 (.CLK(CLKB), .SE(SEB), .SI(QB_int[72]), .D(DB_scan[73]), .Q(QB_int[73]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB74 (.CLK(CLKB), .SE(SEB), .SI(QB_int[73]), .D(DB_scan[74]), .Q(QB_int[74]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB75 (.CLK(CLKB), .SE(SEB), .SI(QB_int[74]), .D(DB_scan[75]), .Q(QB_int[75]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB76 (.CLK(CLKB), .SE(SEB), .SI(QB_int[75]), .D(DB_scan[76]), .Q(QB_int[76]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB77 (.CLK(CLKB), .SE(SEB), .SI(QB_int[76]), .D(DB_scan[77]), .Q(QB_int[77]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB78 (.CLK(CLKB), .SE(SEB), .SI(QB_int[77]), .D(DB_scan[78]), .Q(QB_int[78]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB79 (.CLK(CLKB), .SE(SEB), .SI(QB_int[78]), .D(DB_scan[79]), .Q(QB_int[79]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB80 (.CLK(CLKB), .SE(SEB), .SI(QB_int[79]), .D(DB_scan[80]), .Q(QB_int[80]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB81 (.CLK(CLKB), .SE(SEB), .SI(QB_int[80]), .D(DB_scan[81]), .Q(QB_int[81]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB82 (.CLK(CLKB), .SE(SEB), .SI(QB_int[81]), .D(DB_scan[82]), .Q(QB_int[82]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB83 (.CLK(CLKB), .SE(SEB), .SI(QB_int[82]), .D(DB_scan[83]), .Q(QB_int[83]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB84 (.CLK(CLKB), .SE(SEB), .SI(QB_int[83]), .D(DB_scan[84]), .Q(QB_int[84]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB85 (.CLK(CLKB), .SE(SEB), .SI(QB_int[84]), .D(DB_scan[85]), .Q(QB_int[85]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB86 (.CLK(CLKB), .SE(SEB), .SI(QB_int[85]), .D(DB_scan[86]), .Q(QB_int[86]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB87 (.CLK(CLKB), .SE(SEB), .SI(QB_int[86]), .D(DB_scan[87]), .Q(QB_int[87]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB88 (.CLK(CLKB), .SE(SEB), .SI(QB_int[87]), .D(DB_scan[88]), .Q(QB_int[88]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB89 (.CLK(CLKB), .SE(SEB), .SI(QB_int[88]), .D(DB_scan[89]), .Q(QB_int[89]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB90 (.CLK(CLKB), .SE(SEB), .SI(QB_int[89]), .D(DB_scan[90]), .Q(QB_int[90]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB91 (.CLK(CLKB), .SE(SEB), .SI(QB_int[90]), .D(DB_scan[91]), .Q(QB_int[91]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB92 (.CLK(CLKB), .SE(SEB), .SI(QB_int[91]), .D(DB_scan[92]), .Q(QB_int[92]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB93 (.CLK(CLKB), .SE(SEB), .SI(QB_int[92]), .D(DB_scan[93]), .Q(QB_int[93]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB94 (.CLK(CLKB), .SE(SEB), .SI(QB_int[93]), .D(DB_scan[94]), .Q(QB_int[94]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB95 (.CLK(CLKB), .SE(SEB), .SI(QB_int[94]), .D(DB_scan[95]), .Q(QB_int[95]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB96 (.CLK(CLKB), .SE(SEB), .SI(QB_int[95]), .D(DB_scan[96]), .Q(QB_int[96]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB97 (.CLK(CLKB), .SE(SEB), .SI(QB_int[96]), .D(DB_scan[97]), .Q(QB_int[97]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB98 (.CLK(CLKB), .SE(SEB), .SI(QB_int[97]), .D(DB_scan[98]), .Q(QB_int[98]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB99 (.CLK(CLKB), .SE(SEB), .SI(QB_int[98]), .D(DB_scan[99]), .Q(QB_int[99]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB100 (.CLK(CLKB), .SE(SEB), .SI(QB_int[99]), .D(DB_scan[100]), .Q(QB_int[100]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB101 (.CLK(CLKB), .SE(SEB), .SI(QB_int[100]), .D(DB_scan[101]), .Q(QB_int[101]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB102 (.CLK(CLKB), .SE(SEB), .SI(QB_int[101]), .D(DB_scan[102]), .Q(QB_int[102]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB103 (.CLK(CLKB), .SE(SEB), .SI(QB_int[102]), .D(DB_scan[103]), .Q(QB_int[103]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB104 (.CLK(CLKB), .SE(SEB), .SI(QB_int[103]), .D(DB_scan[104]), .Q(QB_int[104]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB105 (.CLK(CLKB), .SE(SEB), .SI(QB_int[104]), .D(DB_scan[105]), .Q(QB_int[105]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB106 (.CLK(CLKB), .SE(SEB), .SI(QB_int[105]), .D(DB_scan[106]), .Q(QB_int[106]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB107 (.CLK(CLKB), .SE(SEB), .SI(QB_int[106]), .D(DB_scan[107]), .Q(QB_int[107]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB108 (.CLK(CLKB), .SE(SEB), .SI(QB_int[107]), .D(DB_scan[108]), .Q(QB_int[108]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB109 (.CLK(CLKB), .SE(SEB), .SI(QB_int[108]), .D(DB_scan[109]), .Q(QB_int[109]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB110 (.CLK(CLKB), .SE(SEB), .SI(QB_int[109]), .D(DB_scan[110]), .Q(QB_int[110]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB111 (.CLK(CLKB), .SE(SEB), .SI(QB_int[110]), .D(DB_scan[111]), .Q(QB_int[111]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB112 (.CLK(CLKB), .SE(SEB), .SI(QB_int[111]), .D(DB_scan[112]), .Q(QB_int[112]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB113 (.CLK(CLKB), .SE(SEB), .SI(QB_int[112]), .D(DB_scan[113]), .Q(QB_int[113]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB114 (.CLK(CLKB), .SE(SEB), .SI(QB_int[113]), .D(DB_scan[114]), .Q(QB_int[114]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB115 (.CLK(CLKB), .SE(SEB), .SI(QB_int[114]), .D(DB_scan[115]), .Q(QB_int[115]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB116 (.CLK(CLKB), .SE(SEB), .SI(QB_int[115]), .D(DB_scan[116]), .Q(QB_int[116]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB117 (.CLK(CLKB), .SE(SEB), .SI(QB_int[116]), .D(DB_scan[117]), .Q(QB_int[117]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB118 (.CLK(CLKB), .SE(SEB), .SI(QB_int[117]), .D(DB_scan[118]), .Q(QB_int[118]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB119 (.CLK(CLKB), .SE(SEB), .SI(QB_int[118]), .D(DB_scan[119]), .Q(QB_int[119]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB120 (.CLK(CLKB), .SE(SEB), .SI(QB_int[119]), .D(DB_scan[120]), .Q(QB_int[120]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB121 (.CLK(CLKB), .SE(SEB), .SI(QB_int[120]), .D(DB_scan[121]), .Q(QB_int[121]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB122 (.CLK(CLKB), .SE(SEB), .SI(QB_int[121]), .D(DB_scan[122]), .Q(QB_int[122]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB123 (.CLK(CLKB), .SE(SEB), .SI(QB_int[122]), .D(DB_scan[123]), .Q(QB_int[123]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB124 (.CLK(CLKB), .SE(SEB), .SI(QB_int[123]), .D(DB_scan[124]), .Q(QB_int[124]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB125 (.CLK(CLKB), .SE(SEB), .SI(QB_int[124]), .D(DB_scan[125]), .Q(QB_int[125]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB126 (.CLK(CLKB), .SE(SEB), .SI(QB_int[125]), .D(DB_scan[126]), .Q(QB_int[126]), .Xout(XoutBiff)); + instance = rf2_32x128_wm1_scanflop uDQB127 (.CLK(CLKB), .SE(SEB), .SI(QB_int[126]), .D(DB_scan[127]), .Q(QB_int[127]), .Xout(XoutBiff)); + ) + output (SOB) ( array = 1 : 0; + primitive = _buf bSOB0 (QB_int[0], SOB[0] ); + primitive = _buf bSOB1 (QB_int[127], SOB[1] ); + ) + ) diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.memlib b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.memlib new file mode 100644 index 00000000..9ac221c2 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.memlib @@ -0,0 +1,357 @@ +/* logicvision_memcomp Version: c0.1.2-beta */ +/* common_memcomp Version: c0.1.0-EAC */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// logicvision model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x128_wm1 +// Words: 32 +// Bits: 128 +// Mux: 2 +// Drive: 6 +// Write Mask: On +// Extra Margin Adjustment: On +// Redundant Rows: 0 +// Redundant Columns: 2 +// Test Muxes On +// +// Creation Date: Thu Oct 17 15:31:40 2019 +// Version: r4p0 +// +// Modeling Assumptions: +// +// Modeling Limitations: None +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// +MemoryTemplate (rf2_32x128_wm1) { + Algorithm : SmarchChkbvcd; + DataOutStage : None; + LogicalPorts : 1R1W; + BitGrouping : 1; + MemoryType : SRAM; + MinHold : 0.5; + OperationSet : SyncWRvcd; + SelectDuringWriteThru : Off; + ShadowRead : On; + ShadowWrite : On; + TransparentMode : None; + ObservationLogic: On; + InternalScanLogic: On; + CellName : rf2_32x128_wm1; + NumberOfWords : 32; + AddressCounter{ + Function (Address) { + LogicalAddressMap{ + ColumnAddress[0] : Address[0]; + RowAddress[3:0] : Address[4:1]; + } + } + Function (ColumnAddress) { + CountRange [0:1]; + } + Function (RowAddress) { + CountRange [0:15]; + } + } + PhysicalAddressMap{ + ColumnAddress[0] : c[0]; + RowAddress[0] : r[0]; + RowAddress[1] : r[1]; + RowAddress[2] : r[2]; + RowAddress[3] : r[3]; + } + PhysicalDataMap{ + Data[0] : NOT d[0]; + Data[1] : NOT d[1]; + Data[2] : NOT d[2]; + Data[3] : NOT d[3]; + Data[4] : NOT d[4]; + Data[5] : NOT d[5]; + Data[6] : NOT d[6]; + Data[7] : NOT d[7]; + Data[8] : NOT d[8]; + Data[9] : NOT d[9]; + Data[10] : NOT d[10]; + Data[11] : NOT d[11]; + Data[12] : NOT d[12]; + Data[13] : NOT d[13]; + Data[14] : NOT d[14]; + Data[15] : NOT d[15]; + Data[16] : NOT d[16]; + Data[17] : NOT d[17]; + Data[18] : NOT d[18]; + Data[19] : NOT d[19]; + Data[20] : NOT d[20]; + Data[21] : NOT d[21]; + Data[22] : NOT d[22]; + Data[23] : NOT d[23]; + Data[24] : NOT d[24]; + Data[25] : NOT d[25]; + Data[26] : NOT d[26]; + Data[27] : NOT d[27]; + Data[28] : NOT d[28]; + Data[29] : NOT d[29]; + Data[30] : NOT d[30]; + Data[31] : NOT d[31]; + Data[32] : NOT d[32]; + Data[33] : NOT d[33]; + Data[34] : NOT d[34]; + Data[35] : NOT d[35]; + Data[36] : NOT d[36]; + Data[37] : NOT d[37]; + Data[38] : NOT d[38]; + Data[39] : NOT d[39]; + Data[40] : NOT d[40]; + Data[41] : NOT d[41]; + Data[42] : NOT d[42]; + Data[43] : NOT d[43]; + Data[44] : NOT d[44]; + Data[45] : NOT d[45]; + Data[46] : NOT d[46]; + Data[47] : NOT d[47]; + Data[48] : NOT d[48]; + Data[49] : NOT d[49]; + Data[50] : NOT d[50]; + Data[51] : NOT d[51]; + Data[52] : NOT d[52]; + Data[53] : NOT d[53]; + Data[54] : NOT d[54]; + Data[55] : NOT d[55]; + Data[56] : NOT d[56]; + Data[57] : NOT d[57]; + Data[58] : NOT d[58]; + Data[59] : NOT d[59]; + Data[60] : NOT d[60]; + Data[61] : NOT d[61]; + Data[62] : NOT d[62]; + Data[63] : NOT d[63]; + Data[64] : d[64]; + Data[65] : d[65]; + Data[66] : d[66]; + Data[67] : d[67]; + Data[68] : d[68]; + Data[69] : d[69]; + Data[70] : d[70]; + Data[71] : d[71]; + Data[72] : d[72]; + Data[73] : d[73]; + Data[74] : d[74]; + Data[75] : d[75]; + Data[76] : d[76]; + Data[77] : d[77]; + Data[78] : d[78]; + Data[79] : d[79]; + Data[80] : d[80]; + Data[81] : d[81]; + Data[82] : d[82]; + Data[83] : d[83]; + Data[84] : d[84]; + Data[85] : d[85]; + Data[86] : d[86]; + Data[87] : d[87]; + Data[88] : d[88]; + Data[89] : d[89]; + Data[90] : d[90]; + Data[91] : d[91]; + Data[92] : d[92]; + Data[93] : d[93]; + Data[94] : d[94]; + Data[95] : d[95]; + Data[96] : d[96]; + Data[97] : d[97]; + Data[98] : d[98]; + Data[99] : d[99]; + Data[100] : d[100]; + Data[101] : d[101]; + Data[102] : d[102]; + Data[103] : d[103]; + Data[104] : d[104]; + Data[105] : d[105]; + Data[106] : d[106]; + Data[107] : d[107]; + Data[108] : d[108]; + Data[109] : d[109]; + Data[110] : d[110]; + Data[111] : d[111]; + Data[112] : d[112]; + Data[113] : d[113]; + Data[114] : d[114]; + Data[115] : d[115]; + Data[116] : d[116]; + Data[117] : d[117]; + Data[118] : d[118]; + Data[119] : d[119]; + Data[120] : d[120]; + Data[121] : d[121]; + Data[122] : d[122]; + Data[123] : d[123]; + Data[124] : d[124]; + Data[125] : d[125]; + Data[126] : d[126]; + Data[127] : d[127]; + } + Port (AA[4:0]) { + Function : Address; + LogicalPort : A; + EmbeddedTestLogic { + TestInput : TAA[4:0]; + TestOutput : AYA[4:0]; + } + } + Port (QA[127:0]) { + Function : Data; + Direction : output; + LogicalPort : A; + } + Port (CENA) { + Function : ReadEnable; + LogicalPort : A; + Polarity : ActiveLow; + EmbeddedTestLogic { + TestInput : TCENA; + TestOutput : CENYA; + } + } + Port (TENA) { + Function : BISTOn; + Direction : Input; + LogicalPort : A; + Polarity : ActiveLow; + } + Port (CLKA) { + Function : Clock; + LogicalPort : A; + Polarity : ActiveHigh; + } + Port (EMAA[2:0]) { + Function : None; + SafeValue : 0; + Direction : Input; + LogicalPort : A; + Polarity : ActiveHigh; + } + Port (EMASA) { + Function : None; + SafeValue : 0; + Direction : Input; + LogicalPort : A; + Polarity : ActiveHigh; + } + port (SEA){ + Function : None; + Direction : Input; + SafeValue : 0; + Polarity : ActiveHigh; + } + port (SIA[1:0]){ + Function : None; + Direction : Input; + SafeValue : 0; + Polarity : ActiveHigh; + } + port (SOA[1:0]){ + Function : None; + Direction : Output; + } + port (DFTRAMBYP){ + Function : ScanTest; + Direction : Input; + Polarity : ActiveHigh; + } + Port (AB[4:0]) { + Function : Address; + LogicalPort : B; + EmbeddedTestLogic { + TestInput : TAB[4:0]; + TestOutput : AYB[4:0]; + } + } + Port (DB[127:0]) { + Function : Data; + Direction : input; + LogicalPort : B; + EmbeddedTestLogic { + TestInput : TDB[127:0]; + } + } + Port (WENB[127:0]) { + Function : GroupWriteEnable; + BitsPerWriteEnable: 1; + LogicalPort : B; + Polarity : ActiveLow; + EmbeddedTestLogic { + TestInput : TWENB[127:0]; + TestOutput : WENYB[127:0]; + } + } + Port (CENB) { + Function : WriteEnable; + LogicalPort : B; + Polarity : ActiveLow; + EmbeddedTestLogic { + TestInput : TCENB; + TestOutput : CENYB; + } + } + Port (TENB) { + Function : BISTOn; + Direction : Input; + LogicalPort : B; + Polarity : ActiveLow; + } + Port (CLKB) { + Function : Clock; + LogicalPort : B; + Polarity : ActiveHigh; + } + Port (EMAB[2:0]) { + Function : None; + SafeValue : 0; + Direction : Input; + LogicalPort : B; + Polarity : ActiveHigh; + } + Port (COLLDISN) { + Function : None; + SafeValue : 1; + Direction : Input; + Polarity : ActiveLow; + } + port (SEB){ + Function : None; + Direction : Input; + SafeValue : 0; + Polarity : ActiveHigh; + } + port (SIB[1:0]){ + Function : None; + Direction : Input; + SafeValue : 0; + Polarity : ActiveHigh; + } + port (SOB[1:0]){ + Function : None; + Direction : Output; + } + port (RET1N){ + Function : None; + Direction : Input; + SafeValue : 1; + Polarity : Activelow; + } +} diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.tv b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.tv new file mode 100644 index 00000000..3a280136 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.tv @@ -0,0 +1,2411 @@ +/* tetramax_memcomp Version: 4.0.5-EAC3 */ +/* common_memcomp Version: 4.0.5.2-amci */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// Tetramax model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x128_wm1 +// Words: 32 +// Bits: 128 +// Mux: 2 +// Drive: 6 +// Write Mask: On +// Write Thru: Off +// Extra Margin Adjustment: On +// Redundant Columns: 2 +// Test Muxes On +// Power Gating: Off +// Retention: On +// Pipeline: Off +// Read Disturb Test: Off +// +// Creation Date: Thu Oct 17 15:32:05 2019 +// Version: r4p0 +// +// Verified +// +// Modeling Assumptions: +// This model is for use by only TetraMax ATPG tool. +// It is not intended to be used by any Verilog Simulator. +// +// Modeling Limitations: These models have limited functionality as +// defined by the TetraMax modelling guidelines. These models are +// developed on Verilog syntax but they don't fully represent the +// functionality of the memory model as they are restricted by +// the ATPG tool. We have used fast sequential ATPG engine for verification +// of all the memories on recommendation from Synopsys Tetramax expert. +// The models have been tested by generating the ATPG vectors and simulating them +// as well as running functional vectors through tetramax logical simulation engine. +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// + + +`timescale 1ns/1ps +`define read_write readx +`celldefine +module rf2_32x128_wm1_scanflop (Q, SI, D, SE, CLK, Xout); + output Q; + input SI, D, SE, CLK, Xout; + _MUX m1 (SE, D, SI, n1); + _MUX m2 (Xout, n1, 1'bX, n2); + _DFF r1 (1'b0, 1'b0, CLK, n2, Q); +endmodule +`endcelldefine +`celldefine +module rf2_32x128_wm1_bitcell (CLK, WRITE, WA, RA, D, Xout, Q); + input CLK, WRITE, D, Xout; + input [4:0] WA, RA; + output Q; + + reg Q; + reg mem [31:0]; + wire WRITE_ram, D_ram; + wire [4:0] WA_ram; + + _MUX WRITE_MUX (Xout, WRITE, 1'bX, WRITE_ram); + _MUX D_mux (Xout, D, 1'bX, D_ram); + _MUX A0_mux (Xout, WA[0], 1'bX, WA_ram[0]); + _MUX A1_mux (Xout, WA[1], 1'bX, WA_ram[1]); + _MUX A2_mux (Xout, WA[2], 1'bX, WA_ram[2]); + _MUX A3_mux (Xout, WA[3], 1'bX, WA_ram[3]); + _MUX A4_mux (Xout, WA[4], 1'bX, WA_ram[4]); + + event WRITE_OP; + always @ (posedge CLK) if(WRITE_ram) begin + mem[WA_ram]=D_ram; + #0; -> WRITE_OP; + end + + wire TIE1; + assign TIE1 = 1'b1; + always @ (TIE1 or RA or WRITE_OP) if(TIE1) Q=mem[RA]; +endmodule +`endcelldefine +`suppress_faults +`enable_portfaults +`ifdef POWER_PINS +module rf2_32x128_wm1 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, + SOB, CLKA, CENA, AA, CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, + TAA, TENB, TCENB, TWENB, TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x128_wm1 (CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, + CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TWENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + output CENYA; + output [4:0] AYA; + output CENYB; + output [127:0] WENYB; + output [4:0] AYB; + output [127:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [127:0] WENB; + input [4:0] AB; + input [127:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [127:0] TWENB; + input [4:0] TAB; + input [127:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + wire [1:0] BUS_SIA; + assign BUS_SIA[0] = SIA[0]; + assign BUS_SIA[1] = SIA[1]; + wire [4:0] BUS_AA; + assign BUS_AA = AA; + wire [4:0] BMUX_AA; + wire [4:0] BMUXSEL_AA; + wire BMUX_CENA; + wire BMUXSEL_CENA; + wire [127:0] INT_QA; + wire [127:0] READ_QA; + _MUX maA0 (TENA, TAA[0], BUS_AA[0], BMUX_AA[0]); + _MUX maselA0 (DFTRAMBYP, 1'b0, BMUX_AA[0], BMUXSEL_AA[0]); + buf bufmaA0(AYA[0],BMUXSEL_AA[0]); + _MUX maA1 (TENA, TAA[1], BUS_AA[1], BMUX_AA[1]); + _MUX maselA1 (DFTRAMBYP, 1'b0, BMUX_AA[1], BMUXSEL_AA[1]); + buf bufmaA1(AYA[1],BMUXSEL_AA[1]); + _MUX maA2 (TENA, TAA[2], BUS_AA[2], BMUX_AA[2]); + _MUX maselA2 (DFTRAMBYP, 1'b0, BMUX_AA[2], BMUXSEL_AA[2]); + buf bufmaA2(AYA[2],BMUXSEL_AA[2]); + _MUX maA3 (TENA, TAA[3], BUS_AA[3], BMUX_AA[3]); + _MUX maselA3 (DFTRAMBYP, 1'b0, BMUX_AA[3], BMUXSEL_AA[3]); + buf bufmaA3(AYA[3],BMUXSEL_AA[3]); + _MUX maA4 (TENA, TAA[4], BUS_AA[4], BMUX_AA[4]); + _MUX maselA4 (DFTRAMBYP, 1'b0, BMUX_AA[4], BMUXSEL_AA[4]); + buf bufmaA4(AYA[4],BMUXSEL_AA[4]); + + _MUX mcenA (TENA, TCENA, CENA, BMUX_CENA); + _MUX mcenselA (DFTRAMBYP, 1'b0,BMUX_CENA, BMUXSEL_CENA); + buf bufmcenA (CENYA, BMUXSEL_CENA); + wire [4:0] A_max, A_max_n, AA_m; + wire XoutAif, XoutAiff; + wire [4:1] BMUX_AA_n, EQ_A, m_AA; + wire [3:0] XoutAi; + not BMUX_AA1_n (BMUX_AA_n[1], BMUX_AA[1]); + not BMUX_AA2_n (BMUX_AA_n[2], BMUX_AA[2]); + not BMUX_AA3_n (BMUX_AA_n[3], BMUX_AA[3]); + not BMUX_AA4_n (BMUX_AA_n[4], BMUX_AA[4]); + + assign A_max[0] = 1; + assign A_max[1] = 1; + assign A_max[2] = 1; + assign A_max[3] = 1; + assign A_max[4] = 1; + + not Amax0_n (A_max_n[0], A_max[0]); + not Amax1_n (A_max_n[1], A_max[1]); + not Amax2_n (A_max_n[2], A_max[2]); + not Amax3_n (A_max_n[3], A_max[3]); + not Amax4_n (A_max_n[4], A_max[4]); + + and andBMUXAAAmax0 (AA_m[0], BMUX_AA[0], A_max_n[0]); + and andBMUXAAAmax1 (AA_m[1], BMUX_AA[1], A_max_n[1]); + and andBMUXAAAmax2 (AA_m[2], BMUX_AA[2], A_max_n[2]); + and andBMUXAAAmax3 (AA_m[3], BMUX_AA[3], A_max_n[3]); + and andBMUXAAAmax4 (AA_m[4], BMUX_AA[4], A_max_n[4]); + + and andBMUXAAAmax1_n (m_AA[1], BMUX_AA_n[1], A_max[1]); + and andBMUXAAAmax2_n (m_AA[2], BMUX_AA_n[2], A_max[2]); + and andBMUXAAAmax3_n (m_AA[3], BMUX_AA_n[3], A_max[3]); + and andBMUXAAAmax4_n (m_AA[4], BMUX_AA_n[4], A_max[4]); + + nor norAAAmax1 (EQ_A[1], m_AA[1], AA_m[1]); + nor norAAAmax2 (EQ_A[2], m_AA[2], AA_m[2]); + nor norAAAmax3 (EQ_A[3], m_AA[3], AA_m[3]); + nor norAAAmax4 (EQ_A[4], m_AA[4], AA_m[4]); + + and XfAAAmax0 (XoutAi[0], AA_m[0], EQ_A[4], EQ_A[3], EQ_A[2], EQ_A[1]); + and XfAAAmax1 (XoutAi[1], AA_m[1], EQ_A[4], EQ_A[3], EQ_A[2]); + and XfAAAmax2 (XoutAi[2], AA_m[2], EQ_A[4], EQ_A[3]); + and XfAAAmax3 (XoutAi[3], AA_m[3], EQ_A[4]); + or orXfAAAmax4 (XoutAif, AA_m[4], XoutAi[0], XoutAi[1], XoutAi[2], XoutAi[3]); + + wire [4:0] xDetectionAddrBusA; + xor addrHandleA0 (xDetectionAddrBusA[0], BMUX_AA[0], BMUX_AA[0]); + xor addrHandleA1 (xDetectionAddrBusA[1], BMUX_AA[1], BMUX_AA[1]); + xor addrHandleA2 (xDetectionAddrBusA[2], BMUX_AA[2], BMUX_AA[2]); + xor addrHandleA3 (xDetectionAddrBusA[3], BMUX_AA[3], BMUX_AA[3]); + xor addrHandleA4 (xDetectionAddrBusA[4], BMUX_AA[4], BMUX_AA[4]); + or addrFinalA (xAddrA,xDetectionAddrBusA[0],xDetectionAddrBusA[1],xDetectionAddrBusA[2],xDetectionAddrBusA[3],xDetectionAddrBusA[4]); + or xBoundA (XoutAFinal, XoutAif, xAddrA); + nor scanshiftA (nscanshiftA, DFTRAMBYP, SEA); + and XoutaddrA (XoutaddrA, nscanshiftA, XoutAFinal); + or XoutAFF0 (XoutAiff, XoutaddrA, XoutA); + + wire NOT_CENA; + not (NOT_CENA, BMUX_CENA); + wire NOT_DFTRAMBYP; + not (NOT_DFTRAMBYP, DFTRAMBYP); + wire [127:0] READA; + buf (READA[0], NOT_CENA); + buf (READA[1], NOT_CENA); + buf (READA[2], NOT_CENA); + buf (READA[3], NOT_CENA); + buf (READA[4], NOT_CENA); + buf (READA[5], NOT_CENA); + buf (READA[6], NOT_CENA); + buf (READA[7], NOT_CENA); + buf (READA[8], NOT_CENA); + buf (READA[9], NOT_CENA); + buf (READA[10], NOT_CENA); + buf (READA[11], NOT_CENA); + buf (READA[12], NOT_CENA); + buf (READA[13], NOT_CENA); + buf (READA[14], NOT_CENA); + buf (READA[15], NOT_CENA); + buf (READA[16], NOT_CENA); + buf (READA[17], NOT_CENA); + buf (READA[18], NOT_CENA); + buf (READA[19], NOT_CENA); + buf (READA[20], NOT_CENA); + buf (READA[21], NOT_CENA); + buf (READA[22], NOT_CENA); + buf (READA[23], NOT_CENA); + buf (READA[24], NOT_CENA); + buf (READA[25], NOT_CENA); + buf (READA[26], NOT_CENA); + buf (READA[27], NOT_CENA); + buf (READA[28], NOT_CENA); + buf (READA[29], NOT_CENA); + buf (READA[30], NOT_CENA); + buf (READA[31], NOT_CENA); + buf (READA[32], NOT_CENA); + buf (READA[33], NOT_CENA); + buf (READA[34], NOT_CENA); + buf (READA[35], NOT_CENA); + buf (READA[36], NOT_CENA); + buf (READA[37], NOT_CENA); + buf (READA[38], NOT_CENA); + buf (READA[39], NOT_CENA); + buf (READA[40], NOT_CENA); + buf (READA[41], NOT_CENA); + buf (READA[42], NOT_CENA); + buf (READA[43], NOT_CENA); + buf (READA[44], NOT_CENA); + buf (READA[45], NOT_CENA); + buf (READA[46], NOT_CENA); + buf (READA[47], NOT_CENA); + buf (READA[48], NOT_CENA); + buf (READA[49], NOT_CENA); + buf (READA[50], NOT_CENA); + buf (READA[51], NOT_CENA); + buf (READA[52], NOT_CENA); + buf (READA[53], NOT_CENA); + buf (READA[54], NOT_CENA); + buf (READA[55], NOT_CENA); + buf (READA[56], NOT_CENA); + buf (READA[57], NOT_CENA); + buf (READA[58], NOT_CENA); + buf (READA[59], NOT_CENA); + buf (READA[60], NOT_CENA); + buf (READA[61], NOT_CENA); + buf (READA[62], NOT_CENA); + buf (READA[63], NOT_CENA); + buf (READA[64], NOT_CENA); + buf (READA[65], NOT_CENA); + buf (READA[66], NOT_CENA); + buf (READA[67], NOT_CENA); + buf (READA[68], NOT_CENA); + buf (READA[69], NOT_CENA); + buf (READA[70], NOT_CENA); + buf (READA[71], NOT_CENA); + buf (READA[72], NOT_CENA); + buf (READA[73], NOT_CENA); + buf (READA[74], NOT_CENA); + buf (READA[75], NOT_CENA); + buf (READA[76], NOT_CENA); + buf (READA[77], NOT_CENA); + buf (READA[78], NOT_CENA); + buf (READA[79], NOT_CENA); + buf (READA[80], NOT_CENA); + buf (READA[81], NOT_CENA); + buf (READA[82], NOT_CENA); + buf (READA[83], NOT_CENA); + buf (READA[84], NOT_CENA); + buf (READA[85], NOT_CENA); + buf (READA[86], NOT_CENA); + buf (READA[87], NOT_CENA); + buf (READA[88], NOT_CENA); + buf (READA[89], NOT_CENA); + buf (READA[90], NOT_CENA); + buf (READA[91], NOT_CENA); + buf (READA[92], NOT_CENA); + buf (READA[93], NOT_CENA); + buf (READA[94], NOT_CENA); + buf (READA[95], NOT_CENA); + buf (READA[96], NOT_CENA); + buf (READA[97], NOT_CENA); + buf (READA[98], NOT_CENA); + buf (READA[99], NOT_CENA); + buf (READA[100], NOT_CENA); + buf (READA[101], NOT_CENA); + buf (READA[102], NOT_CENA); + buf (READA[103], NOT_CENA); + buf (READA[104], NOT_CENA); + buf (READA[105], NOT_CENA); + buf (READA[106], NOT_CENA); + buf (READA[107], NOT_CENA); + buf (READA[108], NOT_CENA); + buf (READA[109], NOT_CENA); + buf (READA[110], NOT_CENA); + buf (READA[111], NOT_CENA); + buf (READA[112], NOT_CENA); + buf (READA[113], NOT_CENA); + buf (READA[114], NOT_CENA); + buf (READA[115], NOT_CENA); + buf (READA[116], NOT_CENA); + buf (READA[117], NOT_CENA); + buf (READA[118], NOT_CENA); + buf (READA[119], NOT_CENA); + buf (READA[120], NOT_CENA); + buf (READA[121], NOT_CENA); + buf (READA[122], NOT_CENA); + buf (READA[123], NOT_CENA); + buf (READA[124], NOT_CENA); + buf (READA[125], NOT_CENA); + buf (READA[126], NOT_CENA); + buf (READA[127], NOT_CENA); + xor (x_detection_CENA, BMUX_CENA, BMUX_CENA); + and (acendftA, x_detection_CENA, NOT_DFTRAMBYP); + assign XoutA = (SEA & ~DFTRAMBYP) | acendftA; + _MUX reA0 (READA[0], QA[0], INT_QA[0], READ_QA[0]); + _MUX reA1 (READA[1], QA[1], INT_QA[1], READ_QA[1]); + _MUX reA2 (READA[2], QA[2], INT_QA[2], READ_QA[2]); + _MUX reA3 (READA[3], QA[3], INT_QA[3], READ_QA[3]); + _MUX reA4 (READA[4], QA[4], INT_QA[4], READ_QA[4]); + _MUX reA5 (READA[5], QA[5], INT_QA[5], READ_QA[5]); + _MUX reA6 (READA[6], QA[6], INT_QA[6], READ_QA[6]); + _MUX reA7 (READA[7], QA[7], INT_QA[7], READ_QA[7]); + _MUX reA8 (READA[8], QA[8], INT_QA[8], READ_QA[8]); + _MUX reA9 (READA[9], QA[9], INT_QA[9], READ_QA[9]); + _MUX reA10 (READA[10], QA[10], INT_QA[10], READ_QA[10]); + _MUX reA11 (READA[11], QA[11], INT_QA[11], READ_QA[11]); + _MUX reA12 (READA[12], QA[12], INT_QA[12], READ_QA[12]); + _MUX reA13 (READA[13], QA[13], INT_QA[13], READ_QA[13]); + _MUX reA14 (READA[14], QA[14], INT_QA[14], READ_QA[14]); + _MUX reA15 (READA[15], QA[15], INT_QA[15], READ_QA[15]); + _MUX reA16 (READA[16], QA[16], INT_QA[16], READ_QA[16]); + _MUX reA17 (READA[17], QA[17], INT_QA[17], READ_QA[17]); + _MUX reA18 (READA[18], QA[18], INT_QA[18], READ_QA[18]); + _MUX reA19 (READA[19], QA[19], INT_QA[19], READ_QA[19]); + _MUX reA20 (READA[20], QA[20], INT_QA[20], READ_QA[20]); + _MUX reA21 (READA[21], QA[21], INT_QA[21], READ_QA[21]); + _MUX reA22 (READA[22], QA[22], INT_QA[22], READ_QA[22]); + _MUX reA23 (READA[23], QA[23], INT_QA[23], READ_QA[23]); + _MUX reA24 (READA[24], QA[24], INT_QA[24], READ_QA[24]); + _MUX reA25 (READA[25], QA[25], INT_QA[25], READ_QA[25]); + _MUX reA26 (READA[26], QA[26], INT_QA[26], READ_QA[26]); + _MUX reA27 (READA[27], QA[27], INT_QA[27], READ_QA[27]); + _MUX reA28 (READA[28], QA[28], INT_QA[28], READ_QA[28]); + _MUX reA29 (READA[29], QA[29], INT_QA[29], READ_QA[29]); + _MUX reA30 (READA[30], QA[30], INT_QA[30], READ_QA[30]); + _MUX reA31 (READA[31], QA[31], INT_QA[31], READ_QA[31]); + _MUX reA32 (READA[32], QA[32], INT_QA[32], READ_QA[32]); + _MUX reA33 (READA[33], QA[33], INT_QA[33], READ_QA[33]); + _MUX reA34 (READA[34], QA[34], INT_QA[34], READ_QA[34]); + _MUX reA35 (READA[35], QA[35], INT_QA[35], READ_QA[35]); + _MUX reA36 (READA[36], QA[36], INT_QA[36], READ_QA[36]); + _MUX reA37 (READA[37], QA[37], INT_QA[37], READ_QA[37]); + _MUX reA38 (READA[38], QA[38], INT_QA[38], READ_QA[38]); + _MUX reA39 (READA[39], QA[39], INT_QA[39], READ_QA[39]); + _MUX reA40 (READA[40], QA[40], INT_QA[40], READ_QA[40]); + _MUX reA41 (READA[41], QA[41], INT_QA[41], READ_QA[41]); + _MUX reA42 (READA[42], QA[42], INT_QA[42], READ_QA[42]); + _MUX reA43 (READA[43], QA[43], INT_QA[43], READ_QA[43]); + _MUX reA44 (READA[44], QA[44], INT_QA[44], READ_QA[44]); + _MUX reA45 (READA[45], QA[45], INT_QA[45], READ_QA[45]); + _MUX reA46 (READA[46], QA[46], INT_QA[46], READ_QA[46]); + _MUX reA47 (READA[47], QA[47], INT_QA[47], READ_QA[47]); + _MUX reA48 (READA[48], QA[48], INT_QA[48], READ_QA[48]); + _MUX reA49 (READA[49], QA[49], INT_QA[49], READ_QA[49]); + _MUX reA50 (READA[50], QA[50], INT_QA[50], READ_QA[50]); + _MUX reA51 (READA[51], QA[51], INT_QA[51], READ_QA[51]); + _MUX reA52 (READA[52], QA[52], INT_QA[52], READ_QA[52]); + _MUX reA53 (READA[53], QA[53], INT_QA[53], READ_QA[53]); + _MUX reA54 (READA[54], QA[54], INT_QA[54], READ_QA[54]); + _MUX reA55 (READA[55], QA[55], INT_QA[55], READ_QA[55]); + _MUX reA56 (READA[56], QA[56], INT_QA[56], READ_QA[56]); + _MUX reA57 (READA[57], QA[57], INT_QA[57], READ_QA[57]); + _MUX reA58 (READA[58], QA[58], INT_QA[58], READ_QA[58]); + _MUX reA59 (READA[59], QA[59], INT_QA[59], READ_QA[59]); + _MUX reA60 (READA[60], QA[60], INT_QA[60], READ_QA[60]); + _MUX reA61 (READA[61], QA[61], INT_QA[61], READ_QA[61]); + _MUX reA62 (READA[62], QA[62], INT_QA[62], READ_QA[62]); + _MUX reA63 (READA[63], QA[63], INT_QA[63], READ_QA[63]); + _MUX reA64 (READA[64], QA[64], INT_QA[64], READ_QA[64]); + _MUX reA65 (READA[65], QA[65], INT_QA[65], READ_QA[65]); + _MUX reA66 (READA[66], QA[66], INT_QA[66], READ_QA[66]); + _MUX reA67 (READA[67], QA[67], INT_QA[67], READ_QA[67]); + _MUX reA68 (READA[68], QA[68], INT_QA[68], READ_QA[68]); + _MUX reA69 (READA[69], QA[69], INT_QA[69], READ_QA[69]); + _MUX reA70 (READA[70], QA[70], INT_QA[70], READ_QA[70]); + _MUX reA71 (READA[71], QA[71], INT_QA[71], READ_QA[71]); + _MUX reA72 (READA[72], QA[72], INT_QA[72], READ_QA[72]); + _MUX reA73 (READA[73], QA[73], INT_QA[73], READ_QA[73]); + _MUX reA74 (READA[74], QA[74], INT_QA[74], READ_QA[74]); + _MUX reA75 (READA[75], QA[75], INT_QA[75], READ_QA[75]); + _MUX reA76 (READA[76], QA[76], INT_QA[76], READ_QA[76]); + _MUX reA77 (READA[77], QA[77], INT_QA[77], READ_QA[77]); + _MUX reA78 (READA[78], QA[78], INT_QA[78], READ_QA[78]); + _MUX reA79 (READA[79], QA[79], INT_QA[79], READ_QA[79]); + _MUX reA80 (READA[80], QA[80], INT_QA[80], READ_QA[80]); + _MUX reA81 (READA[81], QA[81], INT_QA[81], READ_QA[81]); + _MUX reA82 (READA[82], QA[82], INT_QA[82], READ_QA[82]); + _MUX reA83 (READA[83], QA[83], INT_QA[83], READ_QA[83]); + _MUX reA84 (READA[84], QA[84], INT_QA[84], READ_QA[84]); + _MUX reA85 (READA[85], QA[85], INT_QA[85], READ_QA[85]); + _MUX reA86 (READA[86], QA[86], INT_QA[86], READ_QA[86]); + _MUX reA87 (READA[87], QA[87], INT_QA[87], READ_QA[87]); + _MUX reA88 (READA[88], QA[88], INT_QA[88], READ_QA[88]); + _MUX reA89 (READA[89], QA[89], INT_QA[89], READ_QA[89]); + _MUX reA90 (READA[90], QA[90], INT_QA[90], READ_QA[90]); + _MUX reA91 (READA[91], QA[91], INT_QA[91], READ_QA[91]); + _MUX reA92 (READA[92], QA[92], INT_QA[92], READ_QA[92]); + _MUX reA93 (READA[93], QA[93], INT_QA[93], READ_QA[93]); + _MUX reA94 (READA[94], QA[94], INT_QA[94], READ_QA[94]); + _MUX reA95 (READA[95], QA[95], INT_QA[95], READ_QA[95]); + _MUX reA96 (READA[96], QA[96], INT_QA[96], READ_QA[96]); + _MUX reA97 (READA[97], QA[97], INT_QA[97], READ_QA[97]); + _MUX reA98 (READA[98], QA[98], INT_QA[98], READ_QA[98]); + _MUX reA99 (READA[99], QA[99], INT_QA[99], READ_QA[99]); + _MUX reA100 (READA[100], QA[100], INT_QA[100], READ_QA[100]); + _MUX reA101 (READA[101], QA[101], INT_QA[101], READ_QA[101]); + _MUX reA102 (READA[102], QA[102], INT_QA[102], READ_QA[102]); + _MUX reA103 (READA[103], QA[103], INT_QA[103], READ_QA[103]); + _MUX reA104 (READA[104], QA[104], INT_QA[104], READ_QA[104]); + _MUX reA105 (READA[105], QA[105], INT_QA[105], READ_QA[105]); + _MUX reA106 (READA[106], QA[106], INT_QA[106], READ_QA[106]); + _MUX reA107 (READA[107], QA[107], INT_QA[107], READ_QA[107]); + _MUX reA108 (READA[108], QA[108], INT_QA[108], READ_QA[108]); + _MUX reA109 (READA[109], QA[109], INT_QA[109], READ_QA[109]); + _MUX reA110 (READA[110], QA[110], INT_QA[110], READ_QA[110]); + _MUX reA111 (READA[111], QA[111], INT_QA[111], READ_QA[111]); + _MUX reA112 (READA[112], QA[112], INT_QA[112], READ_QA[112]); + _MUX reA113 (READA[113], QA[113], INT_QA[113], READ_QA[113]); + _MUX reA114 (READA[114], QA[114], INT_QA[114], READ_QA[114]); + _MUX reA115 (READA[115], QA[115], INT_QA[115], READ_QA[115]); + _MUX reA116 (READA[116], QA[116], INT_QA[116], READ_QA[116]); + _MUX reA117 (READA[117], QA[117], INT_QA[117], READ_QA[117]); + _MUX reA118 (READA[118], QA[118], INT_QA[118], READ_QA[118]); + _MUX reA119 (READA[119], QA[119], INT_QA[119], READ_QA[119]); + _MUX reA120 (READA[120], QA[120], INT_QA[120], READ_QA[120]); + _MUX reA121 (READA[121], QA[121], INT_QA[121], READ_QA[121]); + _MUX reA122 (READA[122], QA[122], INT_QA[122], READ_QA[122]); + _MUX reA123 (READA[123], QA[123], INT_QA[123], READ_QA[123]); + _MUX reA124 (READA[124], QA[124], INT_QA[124], READ_QA[124]); + _MUX reA125 (READA[125], QA[125], INT_QA[125], READ_QA[125]); + _MUX reA126 (READA[126], QA[126], INT_QA[126], READ_QA[126]); + _MUX reA127 (READA[127], QA[127], INT_QA[127], READ_QA[127]); + wire [4:0] AAXOR; + xor (AAXOR[0], BMUX_AA[0], BMUX_AA[0]); + xor (AAXOR[1], BMUX_AA[1], BMUX_AA[1]); + xor (AAXOR[2], BMUX_AA[2], BMUX_AA[2]); + xor (AAXOR[3], BMUX_AA[3], BMUX_AA[3]); + xor (AAXOR[4], BMUX_AA[4], BMUX_AA[4]); + wire xA_addr; + or (xA_addr, AAXOR[0], AAXOR[1], AAXOR[2], AAXOR[3], AAXOR[4]); + _MUX rxA0 (xA_addr, READ_QA[0], 1'bX, READ_QAX[0]); + _MUX rxA1 (xA_addr, READ_QA[1], 1'bX, READ_QAX[1]); + _MUX rxA2 (xA_addr, READ_QA[2], 1'bX, READ_QAX[2]); + _MUX rxA3 (xA_addr, READ_QA[3], 1'bX, READ_QAX[3]); + _MUX rxA4 (xA_addr, READ_QA[4], 1'bX, READ_QAX[4]); + _MUX rxA5 (xA_addr, READ_QA[5], 1'bX, READ_QAX[5]); + _MUX rxA6 (xA_addr, READ_QA[6], 1'bX, READ_QAX[6]); + _MUX rxA7 (xA_addr, READ_QA[7], 1'bX, READ_QAX[7]); + _MUX rxA8 (xA_addr, READ_QA[8], 1'bX, READ_QAX[8]); + _MUX rxA9 (xA_addr, READ_QA[9], 1'bX, READ_QAX[9]); + _MUX rxA10 (xA_addr, READ_QA[10], 1'bX, READ_QAX[10]); + _MUX rxA11 (xA_addr, READ_QA[11], 1'bX, READ_QAX[11]); + _MUX rxA12 (xA_addr, READ_QA[12], 1'bX, READ_QAX[12]); + _MUX rxA13 (xA_addr, READ_QA[13], 1'bX, READ_QAX[13]); + _MUX rxA14 (xA_addr, READ_QA[14], 1'bX, READ_QAX[14]); + _MUX rxA15 (xA_addr, READ_QA[15], 1'bX, READ_QAX[15]); + _MUX rxA16 (xA_addr, READ_QA[16], 1'bX, READ_QAX[16]); + _MUX rxA17 (xA_addr, READ_QA[17], 1'bX, READ_QAX[17]); + _MUX rxA18 (xA_addr, READ_QA[18], 1'bX, READ_QAX[18]); + _MUX rxA19 (xA_addr, READ_QA[19], 1'bX, READ_QAX[19]); + _MUX rxA20 (xA_addr, READ_QA[20], 1'bX, READ_QAX[20]); + _MUX rxA21 (xA_addr, READ_QA[21], 1'bX, READ_QAX[21]); + _MUX rxA22 (xA_addr, READ_QA[22], 1'bX, READ_QAX[22]); + _MUX rxA23 (xA_addr, READ_QA[23], 1'bX, READ_QAX[23]); + _MUX rxA24 (xA_addr, READ_QA[24], 1'bX, READ_QAX[24]); + _MUX rxA25 (xA_addr, READ_QA[25], 1'bX, READ_QAX[25]); + _MUX rxA26 (xA_addr, READ_QA[26], 1'bX, READ_QAX[26]); + _MUX rxA27 (xA_addr, READ_QA[27], 1'bX, READ_QAX[27]); + _MUX rxA28 (xA_addr, READ_QA[28], 1'bX, READ_QAX[28]); + _MUX rxA29 (xA_addr, READ_QA[29], 1'bX, READ_QAX[29]); + _MUX rxA30 (xA_addr, READ_QA[30], 1'bX, READ_QAX[30]); + _MUX rxA31 (xA_addr, READ_QA[31], 1'bX, READ_QAX[31]); + _MUX rxA32 (xA_addr, READ_QA[32], 1'bX, READ_QAX[32]); + _MUX rxA33 (xA_addr, READ_QA[33], 1'bX, READ_QAX[33]); + _MUX rxA34 (xA_addr, READ_QA[34], 1'bX, READ_QAX[34]); + _MUX rxA35 (xA_addr, READ_QA[35], 1'bX, READ_QAX[35]); + _MUX rxA36 (xA_addr, READ_QA[36], 1'bX, READ_QAX[36]); + _MUX rxA37 (xA_addr, READ_QA[37], 1'bX, READ_QAX[37]); + _MUX rxA38 (xA_addr, READ_QA[38], 1'bX, READ_QAX[38]); + _MUX rxA39 (xA_addr, READ_QA[39], 1'bX, READ_QAX[39]); + _MUX rxA40 (xA_addr, READ_QA[40], 1'bX, READ_QAX[40]); + _MUX rxA41 (xA_addr, READ_QA[41], 1'bX, READ_QAX[41]); + _MUX rxA42 (xA_addr, READ_QA[42], 1'bX, READ_QAX[42]); + _MUX rxA43 (xA_addr, READ_QA[43], 1'bX, READ_QAX[43]); + _MUX rxA44 (xA_addr, READ_QA[44], 1'bX, READ_QAX[44]); + _MUX rxA45 (xA_addr, READ_QA[45], 1'bX, READ_QAX[45]); + _MUX rxA46 (xA_addr, READ_QA[46], 1'bX, READ_QAX[46]); + _MUX rxA47 (xA_addr, READ_QA[47], 1'bX, READ_QAX[47]); + _MUX rxA48 (xA_addr, READ_QA[48], 1'bX, READ_QAX[48]); + _MUX rxA49 (xA_addr, READ_QA[49], 1'bX, READ_QAX[49]); + _MUX rxA50 (xA_addr, READ_QA[50], 1'bX, READ_QAX[50]); + _MUX rxA51 (xA_addr, READ_QA[51], 1'bX, READ_QAX[51]); + _MUX rxA52 (xA_addr, READ_QA[52], 1'bX, READ_QAX[52]); + _MUX rxA53 (xA_addr, READ_QA[53], 1'bX, READ_QAX[53]); + _MUX rxA54 (xA_addr, READ_QA[54], 1'bX, READ_QAX[54]); + _MUX rxA55 (xA_addr, READ_QA[55], 1'bX, READ_QAX[55]); + _MUX rxA56 (xA_addr, READ_QA[56], 1'bX, READ_QAX[56]); + _MUX rxA57 (xA_addr, READ_QA[57], 1'bX, READ_QAX[57]); + _MUX rxA58 (xA_addr, READ_QA[58], 1'bX, READ_QAX[58]); + _MUX rxA59 (xA_addr, READ_QA[59], 1'bX, READ_QAX[59]); + _MUX rxA60 (xA_addr, READ_QA[60], 1'bX, READ_QAX[60]); + _MUX rxA61 (xA_addr, READ_QA[61], 1'bX, READ_QAX[61]); + _MUX rxA62 (xA_addr, READ_QA[62], 1'bX, READ_QAX[62]); + _MUX rxA63 (xA_addr, READ_QA[63], 1'bX, READ_QAX[63]); + _MUX rxA64 (xA_addr, READ_QA[64], 1'bX, READ_QAX[64]); + _MUX rxA65 (xA_addr, READ_QA[65], 1'bX, READ_QAX[65]); + _MUX rxA66 (xA_addr, READ_QA[66], 1'bX, READ_QAX[66]); + _MUX rxA67 (xA_addr, READ_QA[67], 1'bX, READ_QAX[67]); + _MUX rxA68 (xA_addr, READ_QA[68], 1'bX, READ_QAX[68]); + _MUX rxA69 (xA_addr, READ_QA[69], 1'bX, READ_QAX[69]); + _MUX rxA70 (xA_addr, READ_QA[70], 1'bX, READ_QAX[70]); + _MUX rxA71 (xA_addr, READ_QA[71], 1'bX, READ_QAX[71]); + _MUX rxA72 (xA_addr, READ_QA[72], 1'bX, READ_QAX[72]); + _MUX rxA73 (xA_addr, READ_QA[73], 1'bX, READ_QAX[73]); + _MUX rxA74 (xA_addr, READ_QA[74], 1'bX, READ_QAX[74]); + _MUX rxA75 (xA_addr, READ_QA[75], 1'bX, READ_QAX[75]); + _MUX rxA76 (xA_addr, READ_QA[76], 1'bX, READ_QAX[76]); + _MUX rxA77 (xA_addr, READ_QA[77], 1'bX, READ_QAX[77]); + _MUX rxA78 (xA_addr, READ_QA[78], 1'bX, READ_QAX[78]); + _MUX rxA79 (xA_addr, READ_QA[79], 1'bX, READ_QAX[79]); + _MUX rxA80 (xA_addr, READ_QA[80], 1'bX, READ_QAX[80]); + _MUX rxA81 (xA_addr, READ_QA[81], 1'bX, READ_QAX[81]); + _MUX rxA82 (xA_addr, READ_QA[82], 1'bX, READ_QAX[82]); + _MUX rxA83 (xA_addr, READ_QA[83], 1'bX, READ_QAX[83]); + _MUX rxA84 (xA_addr, READ_QA[84], 1'bX, READ_QAX[84]); + _MUX rxA85 (xA_addr, READ_QA[85], 1'bX, READ_QAX[85]); + _MUX rxA86 (xA_addr, READ_QA[86], 1'bX, READ_QAX[86]); + _MUX rxA87 (xA_addr, READ_QA[87], 1'bX, READ_QAX[87]); + _MUX rxA88 (xA_addr, READ_QA[88], 1'bX, READ_QAX[88]); + _MUX rxA89 (xA_addr, READ_QA[89], 1'bX, READ_QAX[89]); + _MUX rxA90 (xA_addr, READ_QA[90], 1'bX, READ_QAX[90]); + _MUX rxA91 (xA_addr, READ_QA[91], 1'bX, READ_QAX[91]); + _MUX rxA92 (xA_addr, READ_QA[92], 1'bX, READ_QAX[92]); + _MUX rxA93 (xA_addr, READ_QA[93], 1'bX, READ_QAX[93]); + _MUX rxA94 (xA_addr, READ_QA[94], 1'bX, READ_QAX[94]); + _MUX rxA95 (xA_addr, READ_QA[95], 1'bX, READ_QAX[95]); + _MUX rxA96 (xA_addr, READ_QA[96], 1'bX, READ_QAX[96]); + _MUX rxA97 (xA_addr, READ_QA[97], 1'bX, READ_QAX[97]); + _MUX rxA98 (xA_addr, READ_QA[98], 1'bX, READ_QAX[98]); + _MUX rxA99 (xA_addr, READ_QA[99], 1'bX, READ_QAX[99]); + _MUX rxA100 (xA_addr, READ_QA[100], 1'bX, READ_QAX[100]); + _MUX rxA101 (xA_addr, READ_QA[101], 1'bX, READ_QAX[101]); + _MUX rxA102 (xA_addr, READ_QA[102], 1'bX, READ_QAX[102]); + _MUX rxA103 (xA_addr, READ_QA[103], 1'bX, READ_QAX[103]); + _MUX rxA104 (xA_addr, READ_QA[104], 1'bX, READ_QAX[104]); + _MUX rxA105 (xA_addr, READ_QA[105], 1'bX, READ_QAX[105]); + _MUX rxA106 (xA_addr, READ_QA[106], 1'bX, READ_QAX[106]); + _MUX rxA107 (xA_addr, READ_QA[107], 1'bX, READ_QAX[107]); + _MUX rxA108 (xA_addr, READ_QA[108], 1'bX, READ_QAX[108]); + _MUX rxA109 (xA_addr, READ_QA[109], 1'bX, READ_QAX[109]); + _MUX rxA110 (xA_addr, READ_QA[110], 1'bX, READ_QAX[110]); + _MUX rxA111 (xA_addr, READ_QA[111], 1'bX, READ_QAX[111]); + _MUX rxA112 (xA_addr, READ_QA[112], 1'bX, READ_QAX[112]); + _MUX rxA113 (xA_addr, READ_QA[113], 1'bX, READ_QAX[113]); + _MUX rxA114 (xA_addr, READ_QA[114], 1'bX, READ_QAX[114]); + _MUX rxA115 (xA_addr, READ_QA[115], 1'bX, READ_QAX[115]); + _MUX rxA116 (xA_addr, READ_QA[116], 1'bX, READ_QAX[116]); + _MUX rxA117 (xA_addr, READ_QA[117], 1'bX, READ_QAX[117]); + _MUX rxA118 (xA_addr, READ_QA[118], 1'bX, READ_QAX[118]); + _MUX rxA119 (xA_addr, READ_QA[119], 1'bX, READ_QAX[119]); + _MUX rxA120 (xA_addr, READ_QA[120], 1'bX, READ_QAX[120]); + _MUX rxA121 (xA_addr, READ_QA[121], 1'bX, READ_QAX[121]); + _MUX rxA122 (xA_addr, READ_QA[122], 1'bX, READ_QAX[122]); + _MUX rxA123 (xA_addr, READ_QA[123], 1'bX, READ_QAX[123]); + _MUX rxA124 (xA_addr, READ_QA[124], 1'bX, READ_QAX[124]); + _MUX rxA125 (xA_addr, READ_QA[125], 1'bX, READ_QAX[125]); + _MUX rxA126 (xA_addr, READ_QA[126], 1'bX, READ_QAX[126]); + _MUX rxA127 (xA_addr, READ_QA[127], 1'bX, READ_QAX[127]); + _MUX mqA0 (DFTRAMBYP, READ_QAX[0], QA[1], DA_scan[0]); + _MUX mqA1 (DFTRAMBYP, READ_QAX[1], QA[2], DA_scan[1]); + _MUX mqA2 (DFTRAMBYP, READ_QAX[2], QA[3], DA_scan[2]); + _MUX mqA3 (DFTRAMBYP, READ_QAX[3], QA[4], DA_scan[3]); + _MUX mqA4 (DFTRAMBYP, READ_QAX[4], QA[5], DA_scan[4]); + _MUX mqA5 (DFTRAMBYP, READ_QAX[5], QA[6], DA_scan[5]); + _MUX mqA6 (DFTRAMBYP, READ_QAX[6], QA[7], DA_scan[6]); + _MUX mqA7 (DFTRAMBYP, READ_QAX[7], QA[8], DA_scan[7]); + _MUX mqA8 (DFTRAMBYP, READ_QAX[8], QA[9], DA_scan[8]); + _MUX mqA9 (DFTRAMBYP, READ_QAX[9], QA[10], DA_scan[9]); + _MUX mqA10 (DFTRAMBYP, READ_QAX[10], QA[11], DA_scan[10]); + _MUX mqA11 (DFTRAMBYP, READ_QAX[11], QA[12], DA_scan[11]); + _MUX mqA12 (DFTRAMBYP, READ_QAX[12], QA[13], DA_scan[12]); + _MUX mqA13 (DFTRAMBYP, READ_QAX[13], QA[14], DA_scan[13]); + _MUX mqA14 (DFTRAMBYP, READ_QAX[14], QA[15], DA_scan[14]); + _MUX mqA15 (DFTRAMBYP, READ_QAX[15], QA[16], DA_scan[15]); + _MUX mqA16 (DFTRAMBYP, READ_QAX[16], QA[17], DA_scan[16]); + _MUX mqA17 (DFTRAMBYP, READ_QAX[17], QA[18], DA_scan[17]); + _MUX mqA18 (DFTRAMBYP, READ_QAX[18], QA[19], DA_scan[18]); + _MUX mqA19 (DFTRAMBYP, READ_QAX[19], QA[20], DA_scan[19]); + _MUX mqA20 (DFTRAMBYP, READ_QAX[20], QA[21], DA_scan[20]); + _MUX mqA21 (DFTRAMBYP, READ_QAX[21], QA[22], DA_scan[21]); + _MUX mqA22 (DFTRAMBYP, READ_QAX[22], QA[23], DA_scan[22]); + _MUX mqA23 (DFTRAMBYP, READ_QAX[23], QA[24], DA_scan[23]); + _MUX mqA24 (DFTRAMBYP, READ_QAX[24], QA[25], DA_scan[24]); + _MUX mqA25 (DFTRAMBYP, READ_QAX[25], QA[26], DA_scan[25]); + _MUX mqA26 (DFTRAMBYP, READ_QAX[26], QA[27], DA_scan[26]); + _MUX mqA27 (DFTRAMBYP, READ_QAX[27], QA[28], DA_scan[27]); + _MUX mqA28 (DFTRAMBYP, READ_QAX[28], QA[29], DA_scan[28]); + _MUX mqA29 (DFTRAMBYP, READ_QAX[29], QA[30], DA_scan[29]); + _MUX mqA30 (DFTRAMBYP, READ_QAX[30], QA[31], DA_scan[30]); + _MUX mqA31 (DFTRAMBYP, READ_QAX[31], QA[32], DA_scan[31]); + _MUX mqA32 (DFTRAMBYP, READ_QAX[32], QA[33], DA_scan[32]); + _MUX mqA33 (DFTRAMBYP, READ_QAX[33], QA[34], DA_scan[33]); + _MUX mqA34 (DFTRAMBYP, READ_QAX[34], QA[35], DA_scan[34]); + _MUX mqA35 (DFTRAMBYP, READ_QAX[35], QA[36], DA_scan[35]); + _MUX mqA36 (DFTRAMBYP, READ_QAX[36], QA[37], DA_scan[36]); + _MUX mqA37 (DFTRAMBYP, READ_QAX[37], QA[38], DA_scan[37]); + _MUX mqA38 (DFTRAMBYP, READ_QAX[38], QA[39], DA_scan[38]); + _MUX mqA39 (DFTRAMBYP, READ_QAX[39], QA[40], DA_scan[39]); + _MUX mqA40 (DFTRAMBYP, READ_QAX[40], QA[41], DA_scan[40]); + _MUX mqA41 (DFTRAMBYP, READ_QAX[41], QA[42], DA_scan[41]); + _MUX mqA42 (DFTRAMBYP, READ_QAX[42], QA[43], DA_scan[42]); + _MUX mqA43 (DFTRAMBYP, READ_QAX[43], QA[44], DA_scan[43]); + _MUX mqA44 (DFTRAMBYP, READ_QAX[44], QA[45], DA_scan[44]); + _MUX mqA45 (DFTRAMBYP, READ_QAX[45], QA[46], DA_scan[45]); + _MUX mqA46 (DFTRAMBYP, READ_QAX[46], QA[47], DA_scan[46]); + _MUX mqA47 (DFTRAMBYP, READ_QAX[47], QA[48], DA_scan[47]); + _MUX mqA48 (DFTRAMBYP, READ_QAX[48], QA[49], DA_scan[48]); + _MUX mqA49 (DFTRAMBYP, READ_QAX[49], QA[50], DA_scan[49]); + _MUX mqA50 (DFTRAMBYP, READ_QAX[50], QA[51], DA_scan[50]); + _MUX mqA51 (DFTRAMBYP, READ_QAX[51], QA[52], DA_scan[51]); + _MUX mqA52 (DFTRAMBYP, READ_QAX[52], QA[53], DA_scan[52]); + _MUX mqA53 (DFTRAMBYP, READ_QAX[53], QA[54], DA_scan[53]); + _MUX mqA54 (DFTRAMBYP, READ_QAX[54], QA[55], DA_scan[54]); + _MUX mqA55 (DFTRAMBYP, READ_QAX[55], QA[56], DA_scan[55]); + _MUX mqA56 (DFTRAMBYP, READ_QAX[56], QA[57], DA_scan[56]); + _MUX mqA57 (DFTRAMBYP, READ_QAX[57], QA[58], DA_scan[57]); + _MUX mqA58 (DFTRAMBYP, READ_QAX[58], QA[59], DA_scan[58]); + _MUX mqA59 (DFTRAMBYP, READ_QAX[59], QA[60], DA_scan[59]); + _MUX mqA60 (DFTRAMBYP, READ_QAX[60], QA[61], DA_scan[60]); + _MUX mqA61 (DFTRAMBYP, READ_QAX[61], QA[62], DA_scan[61]); + _MUX mqA62 (DFTRAMBYP, READ_QAX[62], QA[63], DA_scan[62]); + _MUX mqA63 (DFTRAMBYP, READ_QAX[63], 1'b0, DA_scan[63]); + _MUX mqA64 (DFTRAMBYP, READ_QAX[64], 1'b0, DA_scan[64]); + _MUX mqA65 (DFTRAMBYP, READ_QAX[65], QA[64], DA_scan[65]); + _MUX mqA66 (DFTRAMBYP, READ_QAX[66], QA[65], DA_scan[66]); + _MUX mqA67 (DFTRAMBYP, READ_QAX[67], QA[66], DA_scan[67]); + _MUX mqA68 (DFTRAMBYP, READ_QAX[68], QA[67], DA_scan[68]); + _MUX mqA69 (DFTRAMBYP, READ_QAX[69], QA[68], DA_scan[69]); + _MUX mqA70 (DFTRAMBYP, READ_QAX[70], QA[69], DA_scan[70]); + _MUX mqA71 (DFTRAMBYP, READ_QAX[71], QA[70], DA_scan[71]); + _MUX mqA72 (DFTRAMBYP, READ_QAX[72], QA[71], DA_scan[72]); + _MUX mqA73 (DFTRAMBYP, READ_QAX[73], QA[72], DA_scan[73]); + _MUX mqA74 (DFTRAMBYP, READ_QAX[74], QA[73], DA_scan[74]); + _MUX mqA75 (DFTRAMBYP, READ_QAX[75], QA[74], DA_scan[75]); + _MUX mqA76 (DFTRAMBYP, READ_QAX[76], QA[75], DA_scan[76]); + _MUX mqA77 (DFTRAMBYP, READ_QAX[77], QA[76], DA_scan[77]); + _MUX mqA78 (DFTRAMBYP, READ_QAX[78], QA[77], DA_scan[78]); + _MUX mqA79 (DFTRAMBYP, READ_QAX[79], QA[78], DA_scan[79]); + _MUX mqA80 (DFTRAMBYP, READ_QAX[80], QA[79], DA_scan[80]); + _MUX mqA81 (DFTRAMBYP, READ_QAX[81], QA[80], DA_scan[81]); + _MUX mqA82 (DFTRAMBYP, READ_QAX[82], QA[81], DA_scan[82]); + _MUX mqA83 (DFTRAMBYP, READ_QAX[83], QA[82], DA_scan[83]); + _MUX mqA84 (DFTRAMBYP, READ_QAX[84], QA[83], DA_scan[84]); + _MUX mqA85 (DFTRAMBYP, READ_QAX[85], QA[84], DA_scan[85]); + _MUX mqA86 (DFTRAMBYP, READ_QAX[86], QA[85], DA_scan[86]); + _MUX mqA87 (DFTRAMBYP, READ_QAX[87], QA[86], DA_scan[87]); + _MUX mqA88 (DFTRAMBYP, READ_QAX[88], QA[87], DA_scan[88]); + _MUX mqA89 (DFTRAMBYP, READ_QAX[89], QA[88], DA_scan[89]); + _MUX mqA90 (DFTRAMBYP, READ_QAX[90], QA[89], DA_scan[90]); + _MUX mqA91 (DFTRAMBYP, READ_QAX[91], QA[90], DA_scan[91]); + _MUX mqA92 (DFTRAMBYP, READ_QAX[92], QA[91], DA_scan[92]); + _MUX mqA93 (DFTRAMBYP, READ_QAX[93], QA[92], DA_scan[93]); + _MUX mqA94 (DFTRAMBYP, READ_QAX[94], QA[93], DA_scan[94]); + _MUX mqA95 (DFTRAMBYP, READ_QAX[95], QA[94], DA_scan[95]); + _MUX mqA96 (DFTRAMBYP, READ_QAX[96], QA[95], DA_scan[96]); + _MUX mqA97 (DFTRAMBYP, READ_QAX[97], QA[96], DA_scan[97]); + _MUX mqA98 (DFTRAMBYP, READ_QAX[98], QA[97], DA_scan[98]); + _MUX mqA99 (DFTRAMBYP, READ_QAX[99], QA[98], DA_scan[99]); + _MUX mqA100 (DFTRAMBYP, READ_QAX[100], QA[99], DA_scan[100]); + _MUX mqA101 (DFTRAMBYP, READ_QAX[101], QA[100], DA_scan[101]); + _MUX mqA102 (DFTRAMBYP, READ_QAX[102], QA[101], DA_scan[102]); + _MUX mqA103 (DFTRAMBYP, READ_QAX[103], QA[102], DA_scan[103]); + _MUX mqA104 (DFTRAMBYP, READ_QAX[104], QA[103], DA_scan[104]); + _MUX mqA105 (DFTRAMBYP, READ_QAX[105], QA[104], DA_scan[105]); + _MUX mqA106 (DFTRAMBYP, READ_QAX[106], QA[105], DA_scan[106]); + _MUX mqA107 (DFTRAMBYP, READ_QAX[107], QA[106], DA_scan[107]); + _MUX mqA108 (DFTRAMBYP, READ_QAX[108], QA[107], DA_scan[108]); + _MUX mqA109 (DFTRAMBYP, READ_QAX[109], QA[108], DA_scan[109]); + _MUX mqA110 (DFTRAMBYP, READ_QAX[110], QA[109], DA_scan[110]); + _MUX mqA111 (DFTRAMBYP, READ_QAX[111], QA[110], DA_scan[111]); + _MUX mqA112 (DFTRAMBYP, READ_QAX[112], QA[111], DA_scan[112]); + _MUX mqA113 (DFTRAMBYP, READ_QAX[113], QA[112], DA_scan[113]); + _MUX mqA114 (DFTRAMBYP, READ_QAX[114], QA[113], DA_scan[114]); + _MUX mqA115 (DFTRAMBYP, READ_QAX[115], QA[114], DA_scan[115]); + _MUX mqA116 (DFTRAMBYP, READ_QAX[116], QA[115], DA_scan[116]); + _MUX mqA117 (DFTRAMBYP, READ_QAX[117], QA[116], DA_scan[117]); + _MUX mqA118 (DFTRAMBYP, READ_QAX[118], QA[117], DA_scan[118]); + _MUX mqA119 (DFTRAMBYP, READ_QAX[119], QA[118], DA_scan[119]); + _MUX mqA120 (DFTRAMBYP, READ_QAX[120], QA[119], DA_scan[120]); + _MUX mqA121 (DFTRAMBYP, READ_QAX[121], QA[120], DA_scan[121]); + _MUX mqA122 (DFTRAMBYP, READ_QAX[122], QA[121], DA_scan[122]); + _MUX mqA123 (DFTRAMBYP, READ_QAX[123], QA[122], DA_scan[123]); + _MUX mqA124 (DFTRAMBYP, READ_QAX[124], QA[123], DA_scan[124]); + _MUX mqA125 (DFTRAMBYP, READ_QAX[125], QA[124], DA_scan[125]); + _MUX mqA126 (DFTRAMBYP, READ_QAX[126], QA[125], DA_scan[126]); + _MUX mqA127 (DFTRAMBYP, READ_QAX[127], QA[126], DA_scan[127]); + rf2_32x128_wm1_scanflop uDQA0 (.CLK(CLKA), .SE(SEA), .SI(QA[1]), .D(DA_scan[0]), .Q(QA[0]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA1 (.CLK(CLKA), .SE(SEA), .SI(QA[2]), .D(DA_scan[1]), .Q(QA[1]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA2 (.CLK(CLKA), .SE(SEA), .SI(QA[3]), .D(DA_scan[2]), .Q(QA[2]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA3 (.CLK(CLKA), .SE(SEA), .SI(QA[4]), .D(DA_scan[3]), .Q(QA[3]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA4 (.CLK(CLKA), .SE(SEA), .SI(QA[5]), .D(DA_scan[4]), .Q(QA[4]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA5 (.CLK(CLKA), .SE(SEA), .SI(QA[6]), .D(DA_scan[5]), .Q(QA[5]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA6 (.CLK(CLKA), .SE(SEA), .SI(QA[7]), .D(DA_scan[6]), .Q(QA[6]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA7 (.CLK(CLKA), .SE(SEA), .SI(QA[8]), .D(DA_scan[7]), .Q(QA[7]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA8 (.CLK(CLKA), .SE(SEA), .SI(QA[9]), .D(DA_scan[8]), .Q(QA[8]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA9 (.CLK(CLKA), .SE(SEA), .SI(QA[10]), .D(DA_scan[9]), .Q(QA[9]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA10 (.CLK(CLKA), .SE(SEA), .SI(QA[11]), .D(DA_scan[10]), .Q(QA[10]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA11 (.CLK(CLKA), .SE(SEA), .SI(QA[12]), .D(DA_scan[11]), .Q(QA[11]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA12 (.CLK(CLKA), .SE(SEA), .SI(QA[13]), .D(DA_scan[12]), .Q(QA[12]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA13 (.CLK(CLKA), .SE(SEA), .SI(QA[14]), .D(DA_scan[13]), .Q(QA[13]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA14 (.CLK(CLKA), .SE(SEA), .SI(QA[15]), .D(DA_scan[14]), .Q(QA[14]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA15 (.CLK(CLKA), .SE(SEA), .SI(QA[16]), .D(DA_scan[15]), .Q(QA[15]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA16 (.CLK(CLKA), .SE(SEA), .SI(QA[17]), .D(DA_scan[16]), .Q(QA[16]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA17 (.CLK(CLKA), .SE(SEA), .SI(QA[18]), .D(DA_scan[17]), .Q(QA[17]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA18 (.CLK(CLKA), .SE(SEA), .SI(QA[19]), .D(DA_scan[18]), .Q(QA[18]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA19 (.CLK(CLKA), .SE(SEA), .SI(QA[20]), .D(DA_scan[19]), .Q(QA[19]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA20 (.CLK(CLKA), .SE(SEA), .SI(QA[21]), .D(DA_scan[20]), .Q(QA[20]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA21 (.CLK(CLKA), .SE(SEA), .SI(QA[22]), .D(DA_scan[21]), .Q(QA[21]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA22 (.CLK(CLKA), .SE(SEA), .SI(QA[23]), .D(DA_scan[22]), .Q(QA[22]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA23 (.CLK(CLKA), .SE(SEA), .SI(QA[24]), .D(DA_scan[23]), .Q(QA[23]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA24 (.CLK(CLKA), .SE(SEA), .SI(QA[25]), .D(DA_scan[24]), .Q(QA[24]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA25 (.CLK(CLKA), .SE(SEA), .SI(QA[26]), .D(DA_scan[25]), .Q(QA[25]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA26 (.CLK(CLKA), .SE(SEA), .SI(QA[27]), .D(DA_scan[26]), .Q(QA[26]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA27 (.CLK(CLKA), .SE(SEA), .SI(QA[28]), .D(DA_scan[27]), .Q(QA[27]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA28 (.CLK(CLKA), .SE(SEA), .SI(QA[29]), .D(DA_scan[28]), .Q(QA[28]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA29 (.CLK(CLKA), .SE(SEA), .SI(QA[30]), .D(DA_scan[29]), .Q(QA[29]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA30 (.CLK(CLKA), .SE(SEA), .SI(QA[31]), .D(DA_scan[30]), .Q(QA[30]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA31 (.CLK(CLKA), .SE(SEA), .SI(QA[32]), .D(DA_scan[31]), .Q(QA[31]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA32 (.CLK(CLKA), .SE(SEA), .SI(QA[33]), .D(DA_scan[32]), .Q(QA[32]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA33 (.CLK(CLKA), .SE(SEA), .SI(QA[34]), .D(DA_scan[33]), .Q(QA[33]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA34 (.CLK(CLKA), .SE(SEA), .SI(QA[35]), .D(DA_scan[34]), .Q(QA[34]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA35 (.CLK(CLKA), .SE(SEA), .SI(QA[36]), .D(DA_scan[35]), .Q(QA[35]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA36 (.CLK(CLKA), .SE(SEA), .SI(QA[37]), .D(DA_scan[36]), .Q(QA[36]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA37 (.CLK(CLKA), .SE(SEA), .SI(QA[38]), .D(DA_scan[37]), .Q(QA[37]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA38 (.CLK(CLKA), .SE(SEA), .SI(QA[39]), .D(DA_scan[38]), .Q(QA[38]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA39 (.CLK(CLKA), .SE(SEA), .SI(QA[40]), .D(DA_scan[39]), .Q(QA[39]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA40 (.CLK(CLKA), .SE(SEA), .SI(QA[41]), .D(DA_scan[40]), .Q(QA[40]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA41 (.CLK(CLKA), .SE(SEA), .SI(QA[42]), .D(DA_scan[41]), .Q(QA[41]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA42 (.CLK(CLKA), .SE(SEA), .SI(QA[43]), .D(DA_scan[42]), .Q(QA[42]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA43 (.CLK(CLKA), .SE(SEA), .SI(QA[44]), .D(DA_scan[43]), .Q(QA[43]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA44 (.CLK(CLKA), .SE(SEA), .SI(QA[45]), .D(DA_scan[44]), .Q(QA[44]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA45 (.CLK(CLKA), .SE(SEA), .SI(QA[46]), .D(DA_scan[45]), .Q(QA[45]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA46 (.CLK(CLKA), .SE(SEA), .SI(QA[47]), .D(DA_scan[46]), .Q(QA[46]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA47 (.CLK(CLKA), .SE(SEA), .SI(QA[48]), .D(DA_scan[47]), .Q(QA[47]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA48 (.CLK(CLKA), .SE(SEA), .SI(QA[49]), .D(DA_scan[48]), .Q(QA[48]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA49 (.CLK(CLKA), .SE(SEA), .SI(QA[50]), .D(DA_scan[49]), .Q(QA[49]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA50 (.CLK(CLKA), .SE(SEA), .SI(QA[51]), .D(DA_scan[50]), .Q(QA[50]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA51 (.CLK(CLKA), .SE(SEA), .SI(QA[52]), .D(DA_scan[51]), .Q(QA[51]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA52 (.CLK(CLKA), .SE(SEA), .SI(QA[53]), .D(DA_scan[52]), .Q(QA[52]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA53 (.CLK(CLKA), .SE(SEA), .SI(QA[54]), .D(DA_scan[53]), .Q(QA[53]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA54 (.CLK(CLKA), .SE(SEA), .SI(QA[55]), .D(DA_scan[54]), .Q(QA[54]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA55 (.CLK(CLKA), .SE(SEA), .SI(QA[56]), .D(DA_scan[55]), .Q(QA[55]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA56 (.CLK(CLKA), .SE(SEA), .SI(QA[57]), .D(DA_scan[56]), .Q(QA[56]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA57 (.CLK(CLKA), .SE(SEA), .SI(QA[58]), .D(DA_scan[57]), .Q(QA[57]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA58 (.CLK(CLKA), .SE(SEA), .SI(QA[59]), .D(DA_scan[58]), .Q(QA[58]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA59 (.CLK(CLKA), .SE(SEA), .SI(QA[60]), .D(DA_scan[59]), .Q(QA[59]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA60 (.CLK(CLKA), .SE(SEA), .SI(QA[61]), .D(DA_scan[60]), .Q(QA[60]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA61 (.CLK(CLKA), .SE(SEA), .SI(QA[62]), .D(DA_scan[61]), .Q(QA[61]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA62 (.CLK(CLKA), .SE(SEA), .SI(QA[63]), .D(DA_scan[62]), .Q(QA[62]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA63 (.CLK(CLKA), .SE(SEA), .SI(BUS_SIA[0]), .D(DA_scan[63]), .Q(QA[63]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA64 (.CLK(CLKA), .SE(SEA), .SI(BUS_SIA[1]), .D(DA_scan[64]), .Q(QA[64]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA65 (.CLK(CLKA), .SE(SEA), .SI(QA[64]), .D(DA_scan[65]), .Q(QA[65]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA66 (.CLK(CLKA), .SE(SEA), .SI(QA[65]), .D(DA_scan[66]), .Q(QA[66]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA67 (.CLK(CLKA), .SE(SEA), .SI(QA[66]), .D(DA_scan[67]), .Q(QA[67]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA68 (.CLK(CLKA), .SE(SEA), .SI(QA[67]), .D(DA_scan[68]), .Q(QA[68]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA69 (.CLK(CLKA), .SE(SEA), .SI(QA[68]), .D(DA_scan[69]), .Q(QA[69]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA70 (.CLK(CLKA), .SE(SEA), .SI(QA[69]), .D(DA_scan[70]), .Q(QA[70]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA71 (.CLK(CLKA), .SE(SEA), .SI(QA[70]), .D(DA_scan[71]), .Q(QA[71]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA72 (.CLK(CLKA), .SE(SEA), .SI(QA[71]), .D(DA_scan[72]), .Q(QA[72]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA73 (.CLK(CLKA), .SE(SEA), .SI(QA[72]), .D(DA_scan[73]), .Q(QA[73]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA74 (.CLK(CLKA), .SE(SEA), .SI(QA[73]), .D(DA_scan[74]), .Q(QA[74]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA75 (.CLK(CLKA), .SE(SEA), .SI(QA[74]), .D(DA_scan[75]), .Q(QA[75]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA76 (.CLK(CLKA), .SE(SEA), .SI(QA[75]), .D(DA_scan[76]), .Q(QA[76]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA77 (.CLK(CLKA), .SE(SEA), .SI(QA[76]), .D(DA_scan[77]), .Q(QA[77]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA78 (.CLK(CLKA), .SE(SEA), .SI(QA[77]), .D(DA_scan[78]), .Q(QA[78]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA79 (.CLK(CLKA), .SE(SEA), .SI(QA[78]), .D(DA_scan[79]), .Q(QA[79]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA80 (.CLK(CLKA), .SE(SEA), .SI(QA[79]), .D(DA_scan[80]), .Q(QA[80]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA81 (.CLK(CLKA), .SE(SEA), .SI(QA[80]), .D(DA_scan[81]), .Q(QA[81]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA82 (.CLK(CLKA), .SE(SEA), .SI(QA[81]), .D(DA_scan[82]), .Q(QA[82]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA83 (.CLK(CLKA), .SE(SEA), .SI(QA[82]), .D(DA_scan[83]), .Q(QA[83]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA84 (.CLK(CLKA), .SE(SEA), .SI(QA[83]), .D(DA_scan[84]), .Q(QA[84]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA85 (.CLK(CLKA), .SE(SEA), .SI(QA[84]), .D(DA_scan[85]), .Q(QA[85]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA86 (.CLK(CLKA), .SE(SEA), .SI(QA[85]), .D(DA_scan[86]), .Q(QA[86]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA87 (.CLK(CLKA), .SE(SEA), .SI(QA[86]), .D(DA_scan[87]), .Q(QA[87]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA88 (.CLK(CLKA), .SE(SEA), .SI(QA[87]), .D(DA_scan[88]), .Q(QA[88]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA89 (.CLK(CLKA), .SE(SEA), .SI(QA[88]), .D(DA_scan[89]), .Q(QA[89]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA90 (.CLK(CLKA), .SE(SEA), .SI(QA[89]), .D(DA_scan[90]), .Q(QA[90]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA91 (.CLK(CLKA), .SE(SEA), .SI(QA[90]), .D(DA_scan[91]), .Q(QA[91]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA92 (.CLK(CLKA), .SE(SEA), .SI(QA[91]), .D(DA_scan[92]), .Q(QA[92]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA93 (.CLK(CLKA), .SE(SEA), .SI(QA[92]), .D(DA_scan[93]), .Q(QA[93]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA94 (.CLK(CLKA), .SE(SEA), .SI(QA[93]), .D(DA_scan[94]), .Q(QA[94]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA95 (.CLK(CLKA), .SE(SEA), .SI(QA[94]), .D(DA_scan[95]), .Q(QA[95]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA96 (.CLK(CLKA), .SE(SEA), .SI(QA[95]), .D(DA_scan[96]), .Q(QA[96]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA97 (.CLK(CLKA), .SE(SEA), .SI(QA[96]), .D(DA_scan[97]), .Q(QA[97]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA98 (.CLK(CLKA), .SE(SEA), .SI(QA[97]), .D(DA_scan[98]), .Q(QA[98]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA99 (.CLK(CLKA), .SE(SEA), .SI(QA[98]), .D(DA_scan[99]), .Q(QA[99]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA100 (.CLK(CLKA), .SE(SEA), .SI(QA[99]), .D(DA_scan[100]), .Q(QA[100]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA101 (.CLK(CLKA), .SE(SEA), .SI(QA[100]), .D(DA_scan[101]), .Q(QA[101]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA102 (.CLK(CLKA), .SE(SEA), .SI(QA[101]), .D(DA_scan[102]), .Q(QA[102]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA103 (.CLK(CLKA), .SE(SEA), .SI(QA[102]), .D(DA_scan[103]), .Q(QA[103]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA104 (.CLK(CLKA), .SE(SEA), .SI(QA[103]), .D(DA_scan[104]), .Q(QA[104]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA105 (.CLK(CLKA), .SE(SEA), .SI(QA[104]), .D(DA_scan[105]), .Q(QA[105]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA106 (.CLK(CLKA), .SE(SEA), .SI(QA[105]), .D(DA_scan[106]), .Q(QA[106]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA107 (.CLK(CLKA), .SE(SEA), .SI(QA[106]), .D(DA_scan[107]), .Q(QA[107]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA108 (.CLK(CLKA), .SE(SEA), .SI(QA[107]), .D(DA_scan[108]), .Q(QA[108]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA109 (.CLK(CLKA), .SE(SEA), .SI(QA[108]), .D(DA_scan[109]), .Q(QA[109]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA110 (.CLK(CLKA), .SE(SEA), .SI(QA[109]), .D(DA_scan[110]), .Q(QA[110]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA111 (.CLK(CLKA), .SE(SEA), .SI(QA[110]), .D(DA_scan[111]), .Q(QA[111]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA112 (.CLK(CLKA), .SE(SEA), .SI(QA[111]), .D(DA_scan[112]), .Q(QA[112]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA113 (.CLK(CLKA), .SE(SEA), .SI(QA[112]), .D(DA_scan[113]), .Q(QA[113]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA114 (.CLK(CLKA), .SE(SEA), .SI(QA[113]), .D(DA_scan[114]), .Q(QA[114]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA115 (.CLK(CLKA), .SE(SEA), .SI(QA[114]), .D(DA_scan[115]), .Q(QA[115]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA116 (.CLK(CLKA), .SE(SEA), .SI(QA[115]), .D(DA_scan[116]), .Q(QA[116]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA117 (.CLK(CLKA), .SE(SEA), .SI(QA[116]), .D(DA_scan[117]), .Q(QA[117]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA118 (.CLK(CLKA), .SE(SEA), .SI(QA[117]), .D(DA_scan[118]), .Q(QA[118]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA119 (.CLK(CLKA), .SE(SEA), .SI(QA[118]), .D(DA_scan[119]), .Q(QA[119]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA120 (.CLK(CLKA), .SE(SEA), .SI(QA[119]), .D(DA_scan[120]), .Q(QA[120]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA121 (.CLK(CLKA), .SE(SEA), .SI(QA[120]), .D(DA_scan[121]), .Q(QA[121]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA122 (.CLK(CLKA), .SE(SEA), .SI(QA[121]), .D(DA_scan[122]), .Q(QA[122]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA123 (.CLK(CLKA), .SE(SEA), .SI(QA[122]), .D(DA_scan[123]), .Q(QA[123]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA124 (.CLK(CLKA), .SE(SEA), .SI(QA[123]), .D(DA_scan[124]), .Q(QA[124]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA125 (.CLK(CLKA), .SE(SEA), .SI(QA[124]), .D(DA_scan[125]), .Q(QA[125]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA126 (.CLK(CLKA), .SE(SEA), .SI(QA[125]), .D(DA_scan[126]), .Q(QA[126]), .Xout(XoutAiff)); + rf2_32x128_wm1_scanflop uDQA127 (.CLK(CLKA), .SE(SEA), .SI(QA[126]), .D(DA_scan[127]), .Q(QA[127]), .Xout(XoutAiff)); + assign SOA[0] = QA[0]; + assign SOA[1] = QA[127]; + wire [1:0] BUS_SIB; + assign BUS_SIB[0] = SIB[0]; + assign BUS_SIB[1] = SIB[1]; + wire [4:0] BUS_AB; + assign BUS_AB = AB; + wire [127:0] BUS_DB; + assign BUS_DB = DB; + wire [127:0] DB_scan; + wire [127:0] BUS_WENB; + assign BUS_WENB = WENB; + wire [4:0] BMUX_AB; + wire [4:0] BMUXSEL_AB; + wire [127:0] BMUX_DB; + wire BMUX_CENB; + wire BMUXSEL_CENB; + wire [127:0] BMUX_WENB; + wire [127:0] BMUXSEL_WENB; + _MUX maB0 (TENB, TAB[0], BUS_AB[0], BMUX_AB[0]); + _MUX maselB0 (DFTRAMBYP, 1'b0, BMUX_AB[0], BMUXSEL_AB[0]); + buf bufmaB0(AYB[0],BMUXSEL_AB[0]); + _MUX maB1 (TENB, TAB[1], BUS_AB[1], BMUX_AB[1]); + _MUX maselB1 (DFTRAMBYP, 1'b0, BMUX_AB[1], BMUXSEL_AB[1]); + buf bufmaB1(AYB[1],BMUXSEL_AB[1]); + _MUX maB2 (TENB, TAB[2], BUS_AB[2], BMUX_AB[2]); + _MUX maselB2 (DFTRAMBYP, 1'b0, BMUX_AB[2], BMUXSEL_AB[2]); + buf bufmaB2(AYB[2],BMUXSEL_AB[2]); + _MUX maB3 (TENB, TAB[3], BUS_AB[3], BMUX_AB[3]); + _MUX maselB3 (DFTRAMBYP, 1'b0, BMUX_AB[3], BMUXSEL_AB[3]); + buf bufmaB3(AYB[3],BMUXSEL_AB[3]); + _MUX maB4 (TENB, TAB[4], BUS_AB[4], BMUX_AB[4]); + _MUX maselB4 (DFTRAMBYP, 1'b0, BMUX_AB[4], BMUXSEL_AB[4]); + buf bufmaB4(AYB[4],BMUXSEL_AB[4]); + + _MUX mdB0 (TENB, TDB[0], BUS_DB[0], BMUX_DB[0]); + _MUX mdB1 (TENB, TDB[1], BUS_DB[1], BMUX_DB[1]); + _MUX mdB2 (TENB, TDB[2], BUS_DB[2], BMUX_DB[2]); + _MUX mdB3 (TENB, TDB[3], BUS_DB[3], BMUX_DB[3]); + _MUX mdB4 (TENB, TDB[4], BUS_DB[4], BMUX_DB[4]); + _MUX mdB5 (TENB, TDB[5], BUS_DB[5], BMUX_DB[5]); + _MUX mdB6 (TENB, TDB[6], BUS_DB[6], BMUX_DB[6]); + _MUX mdB7 (TENB, TDB[7], BUS_DB[7], BMUX_DB[7]); + _MUX mdB8 (TENB, TDB[8], BUS_DB[8], BMUX_DB[8]); + _MUX mdB9 (TENB, TDB[9], BUS_DB[9], BMUX_DB[9]); + _MUX mdB10 (TENB, TDB[10], BUS_DB[10], BMUX_DB[10]); + _MUX mdB11 (TENB, TDB[11], BUS_DB[11], BMUX_DB[11]); + _MUX mdB12 (TENB, TDB[12], BUS_DB[12], BMUX_DB[12]); + _MUX mdB13 (TENB, TDB[13], BUS_DB[13], BMUX_DB[13]); + _MUX mdB14 (TENB, TDB[14], BUS_DB[14], BMUX_DB[14]); + _MUX mdB15 (TENB, TDB[15], BUS_DB[15], BMUX_DB[15]); + _MUX mdB16 (TENB, TDB[16], BUS_DB[16], BMUX_DB[16]); + _MUX mdB17 (TENB, TDB[17], BUS_DB[17], BMUX_DB[17]); + _MUX mdB18 (TENB, TDB[18], BUS_DB[18], BMUX_DB[18]); + _MUX mdB19 (TENB, TDB[19], BUS_DB[19], BMUX_DB[19]); + _MUX mdB20 (TENB, TDB[20], BUS_DB[20], BMUX_DB[20]); + _MUX mdB21 (TENB, TDB[21], BUS_DB[21], BMUX_DB[21]); + _MUX mdB22 (TENB, TDB[22], BUS_DB[22], BMUX_DB[22]); + _MUX mdB23 (TENB, TDB[23], BUS_DB[23], BMUX_DB[23]); + _MUX mdB24 (TENB, TDB[24], BUS_DB[24], BMUX_DB[24]); + _MUX mdB25 (TENB, TDB[25], BUS_DB[25], BMUX_DB[25]); + _MUX mdB26 (TENB, TDB[26], BUS_DB[26], BMUX_DB[26]); + _MUX mdB27 (TENB, TDB[27], BUS_DB[27], BMUX_DB[27]); + _MUX mdB28 (TENB, TDB[28], BUS_DB[28], BMUX_DB[28]); + _MUX mdB29 (TENB, TDB[29], BUS_DB[29], BMUX_DB[29]); + _MUX mdB30 (TENB, TDB[30], BUS_DB[30], BMUX_DB[30]); + _MUX mdB31 (TENB, TDB[31], BUS_DB[31], BMUX_DB[31]); + _MUX mdB32 (TENB, TDB[32], BUS_DB[32], BMUX_DB[32]); + _MUX mdB33 (TENB, TDB[33], BUS_DB[33], BMUX_DB[33]); + _MUX mdB34 (TENB, TDB[34], BUS_DB[34], BMUX_DB[34]); + _MUX mdB35 (TENB, TDB[35], BUS_DB[35], BMUX_DB[35]); + _MUX mdB36 (TENB, TDB[36], BUS_DB[36], BMUX_DB[36]); + _MUX mdB37 (TENB, TDB[37], BUS_DB[37], BMUX_DB[37]); + _MUX mdB38 (TENB, TDB[38], BUS_DB[38], BMUX_DB[38]); + _MUX mdB39 (TENB, TDB[39], BUS_DB[39], BMUX_DB[39]); + _MUX mdB40 (TENB, TDB[40], BUS_DB[40], BMUX_DB[40]); + _MUX mdB41 (TENB, TDB[41], BUS_DB[41], BMUX_DB[41]); + _MUX mdB42 (TENB, TDB[42], BUS_DB[42], BMUX_DB[42]); + _MUX mdB43 (TENB, TDB[43], BUS_DB[43], BMUX_DB[43]); + _MUX mdB44 (TENB, TDB[44], BUS_DB[44], BMUX_DB[44]); + _MUX mdB45 (TENB, TDB[45], BUS_DB[45], BMUX_DB[45]); + _MUX mdB46 (TENB, TDB[46], BUS_DB[46], BMUX_DB[46]); + _MUX mdB47 (TENB, TDB[47], BUS_DB[47], BMUX_DB[47]); + _MUX mdB48 (TENB, TDB[48], BUS_DB[48], BMUX_DB[48]); + _MUX mdB49 (TENB, TDB[49], BUS_DB[49], BMUX_DB[49]); + _MUX mdB50 (TENB, TDB[50], BUS_DB[50], BMUX_DB[50]); + _MUX mdB51 (TENB, TDB[51], BUS_DB[51], BMUX_DB[51]); + _MUX mdB52 (TENB, TDB[52], BUS_DB[52], BMUX_DB[52]); + _MUX mdB53 (TENB, TDB[53], BUS_DB[53], BMUX_DB[53]); + _MUX mdB54 (TENB, TDB[54], BUS_DB[54], BMUX_DB[54]); + _MUX mdB55 (TENB, TDB[55], BUS_DB[55], BMUX_DB[55]); + _MUX mdB56 (TENB, TDB[56], BUS_DB[56], BMUX_DB[56]); + _MUX mdB57 (TENB, TDB[57], BUS_DB[57], BMUX_DB[57]); + _MUX mdB58 (TENB, TDB[58], BUS_DB[58], BMUX_DB[58]); + _MUX mdB59 (TENB, TDB[59], BUS_DB[59], BMUX_DB[59]); + _MUX mdB60 (TENB, TDB[60], BUS_DB[60], BMUX_DB[60]); + _MUX mdB61 (TENB, TDB[61], BUS_DB[61], BMUX_DB[61]); + _MUX mdB62 (TENB, TDB[62], BUS_DB[62], BMUX_DB[62]); + _MUX mdB63 (TENB, TDB[63], BUS_DB[63], BMUX_DB[63]); + _MUX mdB64 (TENB, TDB[64], BUS_DB[64], BMUX_DB[64]); + _MUX mdB65 (TENB, TDB[65], BUS_DB[65], BMUX_DB[65]); + _MUX mdB66 (TENB, TDB[66], BUS_DB[66], BMUX_DB[66]); + _MUX mdB67 (TENB, TDB[67], BUS_DB[67], BMUX_DB[67]); + _MUX mdB68 (TENB, TDB[68], BUS_DB[68], BMUX_DB[68]); + _MUX mdB69 (TENB, TDB[69], BUS_DB[69], BMUX_DB[69]); + _MUX mdB70 (TENB, TDB[70], BUS_DB[70], BMUX_DB[70]); + _MUX mdB71 (TENB, TDB[71], BUS_DB[71], BMUX_DB[71]); + _MUX mdB72 (TENB, TDB[72], BUS_DB[72], BMUX_DB[72]); + _MUX mdB73 (TENB, TDB[73], BUS_DB[73], BMUX_DB[73]); + _MUX mdB74 (TENB, TDB[74], BUS_DB[74], BMUX_DB[74]); + _MUX mdB75 (TENB, TDB[75], BUS_DB[75], BMUX_DB[75]); + _MUX mdB76 (TENB, TDB[76], BUS_DB[76], BMUX_DB[76]); + _MUX mdB77 (TENB, TDB[77], BUS_DB[77], BMUX_DB[77]); + _MUX mdB78 (TENB, TDB[78], BUS_DB[78], BMUX_DB[78]); + _MUX mdB79 (TENB, TDB[79], BUS_DB[79], BMUX_DB[79]); + _MUX mdB80 (TENB, TDB[80], BUS_DB[80], BMUX_DB[80]); + _MUX mdB81 (TENB, TDB[81], BUS_DB[81], BMUX_DB[81]); + _MUX mdB82 (TENB, TDB[82], BUS_DB[82], BMUX_DB[82]); + _MUX mdB83 (TENB, TDB[83], BUS_DB[83], BMUX_DB[83]); + _MUX mdB84 (TENB, TDB[84], BUS_DB[84], BMUX_DB[84]); + _MUX mdB85 (TENB, TDB[85], BUS_DB[85], BMUX_DB[85]); + _MUX mdB86 (TENB, TDB[86], BUS_DB[86], BMUX_DB[86]); + _MUX mdB87 (TENB, TDB[87], BUS_DB[87], BMUX_DB[87]); + _MUX mdB88 (TENB, TDB[88], BUS_DB[88], BMUX_DB[88]); + _MUX mdB89 (TENB, TDB[89], BUS_DB[89], BMUX_DB[89]); + _MUX mdB90 (TENB, TDB[90], BUS_DB[90], BMUX_DB[90]); + _MUX mdB91 (TENB, TDB[91], BUS_DB[91], BMUX_DB[91]); + _MUX mdB92 (TENB, TDB[92], BUS_DB[92], BMUX_DB[92]); + _MUX mdB93 (TENB, TDB[93], BUS_DB[93], BMUX_DB[93]); + _MUX mdB94 (TENB, TDB[94], BUS_DB[94], BMUX_DB[94]); + _MUX mdB95 (TENB, TDB[95], BUS_DB[95], BMUX_DB[95]); + _MUX mdB96 (TENB, TDB[96], BUS_DB[96], BMUX_DB[96]); + _MUX mdB97 (TENB, TDB[97], BUS_DB[97], BMUX_DB[97]); + _MUX mdB98 (TENB, TDB[98], BUS_DB[98], BMUX_DB[98]); + _MUX mdB99 (TENB, TDB[99], BUS_DB[99], BMUX_DB[99]); + _MUX mdB100 (TENB, TDB[100], BUS_DB[100], BMUX_DB[100]); + _MUX mdB101 (TENB, TDB[101], BUS_DB[101], BMUX_DB[101]); + _MUX mdB102 (TENB, TDB[102], BUS_DB[102], BMUX_DB[102]); + _MUX mdB103 (TENB, TDB[103], BUS_DB[103], BMUX_DB[103]); + _MUX mdB104 (TENB, TDB[104], BUS_DB[104], BMUX_DB[104]); + _MUX mdB105 (TENB, TDB[105], BUS_DB[105], BMUX_DB[105]); + _MUX mdB106 (TENB, TDB[106], BUS_DB[106], BMUX_DB[106]); + _MUX mdB107 (TENB, TDB[107], BUS_DB[107], BMUX_DB[107]); + _MUX mdB108 (TENB, TDB[108], BUS_DB[108], BMUX_DB[108]); + _MUX mdB109 (TENB, TDB[109], BUS_DB[109], BMUX_DB[109]); + _MUX mdB110 (TENB, TDB[110], BUS_DB[110], BMUX_DB[110]); + _MUX mdB111 (TENB, TDB[111], BUS_DB[111], BMUX_DB[111]); + _MUX mdB112 (TENB, TDB[112], BUS_DB[112], BMUX_DB[112]); + _MUX mdB113 (TENB, TDB[113], BUS_DB[113], BMUX_DB[113]); + _MUX mdB114 (TENB, TDB[114], BUS_DB[114], BMUX_DB[114]); + _MUX mdB115 (TENB, TDB[115], BUS_DB[115], BMUX_DB[115]); + _MUX mdB116 (TENB, TDB[116], BUS_DB[116], BMUX_DB[116]); + _MUX mdB117 (TENB, TDB[117], BUS_DB[117], BMUX_DB[117]); + _MUX mdB118 (TENB, TDB[118], BUS_DB[118], BMUX_DB[118]); + _MUX mdB119 (TENB, TDB[119], BUS_DB[119], BMUX_DB[119]); + _MUX mdB120 (TENB, TDB[120], BUS_DB[120], BMUX_DB[120]); + _MUX mdB121 (TENB, TDB[121], BUS_DB[121], BMUX_DB[121]); + _MUX mdB122 (TENB, TDB[122], BUS_DB[122], BMUX_DB[122]); + _MUX mdB123 (TENB, TDB[123], BUS_DB[123], BMUX_DB[123]); + _MUX mdB124 (TENB, TDB[124], BUS_DB[124], BMUX_DB[124]); + _MUX mdB125 (TENB, TDB[125], BUS_DB[125], BMUX_DB[125]); + _MUX mdB126 (TENB, TDB[126], BUS_DB[126], BMUX_DB[126]); + _MUX mdB127 (TENB, TDB[127], BUS_DB[127], BMUX_DB[127]); + + _MUX mwenB0 (TENB, TWENB[0], BUS_WENB[0], BMUX_WENB[0]); + _MUX mwenselB0 (DFTRAMBYP, 1'b0,BMUX_WENB[0], BMUXSEL_WENB[0]); + buf bufmwenB0 (WENYB[0], BMUXSEL_WENB[0]); + _MUX mwenB1 (TENB, TWENB[1], BUS_WENB[1], BMUX_WENB[1]); + _MUX mwenselB1 (DFTRAMBYP, 1'b0,BMUX_WENB[1], BMUXSEL_WENB[1]); + buf bufmwenB1 (WENYB[1], BMUXSEL_WENB[1]); + _MUX mwenB2 (TENB, TWENB[2], BUS_WENB[2], BMUX_WENB[2]); + _MUX mwenselB2 (DFTRAMBYP, 1'b0,BMUX_WENB[2], BMUXSEL_WENB[2]); + buf bufmwenB2 (WENYB[2], BMUXSEL_WENB[2]); + _MUX mwenB3 (TENB, TWENB[3], BUS_WENB[3], BMUX_WENB[3]); + _MUX mwenselB3 (DFTRAMBYP, 1'b0,BMUX_WENB[3], BMUXSEL_WENB[3]); + buf bufmwenB3 (WENYB[3], BMUXSEL_WENB[3]); + _MUX mwenB4 (TENB, TWENB[4], BUS_WENB[4], BMUX_WENB[4]); + _MUX mwenselB4 (DFTRAMBYP, 1'b0,BMUX_WENB[4], BMUXSEL_WENB[4]); + buf bufmwenB4 (WENYB[4], BMUXSEL_WENB[4]); + _MUX mwenB5 (TENB, TWENB[5], BUS_WENB[5], BMUX_WENB[5]); + _MUX mwenselB5 (DFTRAMBYP, 1'b0,BMUX_WENB[5], BMUXSEL_WENB[5]); + buf bufmwenB5 (WENYB[5], BMUXSEL_WENB[5]); + _MUX mwenB6 (TENB, TWENB[6], BUS_WENB[6], BMUX_WENB[6]); + _MUX mwenselB6 (DFTRAMBYP, 1'b0,BMUX_WENB[6], BMUXSEL_WENB[6]); + buf bufmwenB6 (WENYB[6], BMUXSEL_WENB[6]); + _MUX mwenB7 (TENB, TWENB[7], BUS_WENB[7], BMUX_WENB[7]); + _MUX mwenselB7 (DFTRAMBYP, 1'b0,BMUX_WENB[7], BMUXSEL_WENB[7]); + buf bufmwenB7 (WENYB[7], BMUXSEL_WENB[7]); + _MUX mwenB8 (TENB, TWENB[8], BUS_WENB[8], BMUX_WENB[8]); + _MUX mwenselB8 (DFTRAMBYP, 1'b0,BMUX_WENB[8], BMUXSEL_WENB[8]); + buf bufmwenB8 (WENYB[8], BMUXSEL_WENB[8]); + _MUX mwenB9 (TENB, TWENB[9], BUS_WENB[9], BMUX_WENB[9]); + _MUX mwenselB9 (DFTRAMBYP, 1'b0,BMUX_WENB[9], BMUXSEL_WENB[9]); + buf bufmwenB9 (WENYB[9], BMUXSEL_WENB[9]); + _MUX mwenB10 (TENB, TWENB[10], BUS_WENB[10], BMUX_WENB[10]); + _MUX mwenselB10 (DFTRAMBYP, 1'b0,BMUX_WENB[10], BMUXSEL_WENB[10]); + buf bufmwenB10 (WENYB[10], BMUXSEL_WENB[10]); + _MUX mwenB11 (TENB, TWENB[11], BUS_WENB[11], BMUX_WENB[11]); + _MUX mwenselB11 (DFTRAMBYP, 1'b0,BMUX_WENB[11], BMUXSEL_WENB[11]); + buf bufmwenB11 (WENYB[11], BMUXSEL_WENB[11]); + _MUX mwenB12 (TENB, TWENB[12], BUS_WENB[12], BMUX_WENB[12]); + _MUX mwenselB12 (DFTRAMBYP, 1'b0,BMUX_WENB[12], BMUXSEL_WENB[12]); + buf bufmwenB12 (WENYB[12], BMUXSEL_WENB[12]); + _MUX mwenB13 (TENB, TWENB[13], BUS_WENB[13], BMUX_WENB[13]); + _MUX mwenselB13 (DFTRAMBYP, 1'b0,BMUX_WENB[13], BMUXSEL_WENB[13]); + buf bufmwenB13 (WENYB[13], BMUXSEL_WENB[13]); + _MUX mwenB14 (TENB, TWENB[14], BUS_WENB[14], BMUX_WENB[14]); + _MUX mwenselB14 (DFTRAMBYP, 1'b0,BMUX_WENB[14], BMUXSEL_WENB[14]); + buf bufmwenB14 (WENYB[14], BMUXSEL_WENB[14]); + _MUX mwenB15 (TENB, TWENB[15], BUS_WENB[15], BMUX_WENB[15]); + _MUX mwenselB15 (DFTRAMBYP, 1'b0,BMUX_WENB[15], BMUXSEL_WENB[15]); + buf bufmwenB15 (WENYB[15], BMUXSEL_WENB[15]); + _MUX mwenB16 (TENB, TWENB[16], BUS_WENB[16], BMUX_WENB[16]); + _MUX mwenselB16 (DFTRAMBYP, 1'b0,BMUX_WENB[16], BMUXSEL_WENB[16]); + buf bufmwenB16 (WENYB[16], BMUXSEL_WENB[16]); + _MUX mwenB17 (TENB, TWENB[17], BUS_WENB[17], BMUX_WENB[17]); + _MUX mwenselB17 (DFTRAMBYP, 1'b0,BMUX_WENB[17], BMUXSEL_WENB[17]); + buf bufmwenB17 (WENYB[17], BMUXSEL_WENB[17]); + _MUX mwenB18 (TENB, TWENB[18], BUS_WENB[18], BMUX_WENB[18]); + _MUX mwenselB18 (DFTRAMBYP, 1'b0,BMUX_WENB[18], BMUXSEL_WENB[18]); + buf bufmwenB18 (WENYB[18], BMUXSEL_WENB[18]); + _MUX mwenB19 (TENB, TWENB[19], BUS_WENB[19], BMUX_WENB[19]); + _MUX mwenselB19 (DFTRAMBYP, 1'b0,BMUX_WENB[19], BMUXSEL_WENB[19]); + buf bufmwenB19 (WENYB[19], BMUXSEL_WENB[19]); + _MUX mwenB20 (TENB, TWENB[20], BUS_WENB[20], BMUX_WENB[20]); + _MUX mwenselB20 (DFTRAMBYP, 1'b0,BMUX_WENB[20], BMUXSEL_WENB[20]); + buf bufmwenB20 (WENYB[20], BMUXSEL_WENB[20]); + _MUX mwenB21 (TENB, TWENB[21], BUS_WENB[21], BMUX_WENB[21]); + _MUX mwenselB21 (DFTRAMBYP, 1'b0,BMUX_WENB[21], BMUXSEL_WENB[21]); + buf bufmwenB21 (WENYB[21], BMUXSEL_WENB[21]); + _MUX mwenB22 (TENB, TWENB[22], BUS_WENB[22], BMUX_WENB[22]); + _MUX mwenselB22 (DFTRAMBYP, 1'b0,BMUX_WENB[22], BMUXSEL_WENB[22]); + buf bufmwenB22 (WENYB[22], BMUXSEL_WENB[22]); + _MUX mwenB23 (TENB, TWENB[23], BUS_WENB[23], BMUX_WENB[23]); + _MUX mwenselB23 (DFTRAMBYP, 1'b0,BMUX_WENB[23], BMUXSEL_WENB[23]); + buf bufmwenB23 (WENYB[23], BMUXSEL_WENB[23]); + _MUX mwenB24 (TENB, TWENB[24], BUS_WENB[24], BMUX_WENB[24]); + _MUX mwenselB24 (DFTRAMBYP, 1'b0,BMUX_WENB[24], BMUXSEL_WENB[24]); + buf bufmwenB24 (WENYB[24], BMUXSEL_WENB[24]); + _MUX mwenB25 (TENB, TWENB[25], BUS_WENB[25], BMUX_WENB[25]); + _MUX mwenselB25 (DFTRAMBYP, 1'b0,BMUX_WENB[25], BMUXSEL_WENB[25]); + buf bufmwenB25 (WENYB[25], BMUXSEL_WENB[25]); + _MUX mwenB26 (TENB, TWENB[26], BUS_WENB[26], BMUX_WENB[26]); + _MUX mwenselB26 (DFTRAMBYP, 1'b0,BMUX_WENB[26], BMUXSEL_WENB[26]); + buf bufmwenB26 (WENYB[26], BMUXSEL_WENB[26]); + _MUX mwenB27 (TENB, TWENB[27], BUS_WENB[27], BMUX_WENB[27]); + _MUX mwenselB27 (DFTRAMBYP, 1'b0,BMUX_WENB[27], BMUXSEL_WENB[27]); + buf bufmwenB27 (WENYB[27], BMUXSEL_WENB[27]); + _MUX mwenB28 (TENB, TWENB[28], BUS_WENB[28], BMUX_WENB[28]); + _MUX mwenselB28 (DFTRAMBYP, 1'b0,BMUX_WENB[28], BMUXSEL_WENB[28]); + buf bufmwenB28 (WENYB[28], BMUXSEL_WENB[28]); + _MUX mwenB29 (TENB, TWENB[29], BUS_WENB[29], BMUX_WENB[29]); + _MUX mwenselB29 (DFTRAMBYP, 1'b0,BMUX_WENB[29], BMUXSEL_WENB[29]); + buf bufmwenB29 (WENYB[29], BMUXSEL_WENB[29]); + _MUX mwenB30 (TENB, TWENB[30], BUS_WENB[30], BMUX_WENB[30]); + _MUX mwenselB30 (DFTRAMBYP, 1'b0,BMUX_WENB[30], BMUXSEL_WENB[30]); + buf bufmwenB30 (WENYB[30], BMUXSEL_WENB[30]); + _MUX mwenB31 (TENB, TWENB[31], BUS_WENB[31], BMUX_WENB[31]); + _MUX mwenselB31 (DFTRAMBYP, 1'b0,BMUX_WENB[31], BMUXSEL_WENB[31]); + buf bufmwenB31 (WENYB[31], BMUXSEL_WENB[31]); + _MUX mwenB32 (TENB, TWENB[32], BUS_WENB[32], BMUX_WENB[32]); + _MUX mwenselB32 (DFTRAMBYP, 1'b0,BMUX_WENB[32], BMUXSEL_WENB[32]); + buf bufmwenB32 (WENYB[32], BMUXSEL_WENB[32]); + _MUX mwenB33 (TENB, TWENB[33], BUS_WENB[33], BMUX_WENB[33]); + _MUX mwenselB33 (DFTRAMBYP, 1'b0,BMUX_WENB[33], BMUXSEL_WENB[33]); + buf bufmwenB33 (WENYB[33], BMUXSEL_WENB[33]); + _MUX mwenB34 (TENB, TWENB[34], BUS_WENB[34], BMUX_WENB[34]); + _MUX mwenselB34 (DFTRAMBYP, 1'b0,BMUX_WENB[34], BMUXSEL_WENB[34]); + buf bufmwenB34 (WENYB[34], BMUXSEL_WENB[34]); + _MUX mwenB35 (TENB, TWENB[35], BUS_WENB[35], BMUX_WENB[35]); + _MUX mwenselB35 (DFTRAMBYP, 1'b0,BMUX_WENB[35], BMUXSEL_WENB[35]); + buf bufmwenB35 (WENYB[35], BMUXSEL_WENB[35]); + _MUX mwenB36 (TENB, TWENB[36], BUS_WENB[36], BMUX_WENB[36]); + _MUX mwenselB36 (DFTRAMBYP, 1'b0,BMUX_WENB[36], BMUXSEL_WENB[36]); + buf bufmwenB36 (WENYB[36], BMUXSEL_WENB[36]); + _MUX mwenB37 (TENB, TWENB[37], BUS_WENB[37], BMUX_WENB[37]); + _MUX mwenselB37 (DFTRAMBYP, 1'b0,BMUX_WENB[37], BMUXSEL_WENB[37]); + buf bufmwenB37 (WENYB[37], BMUXSEL_WENB[37]); + _MUX mwenB38 (TENB, TWENB[38], BUS_WENB[38], BMUX_WENB[38]); + _MUX mwenselB38 (DFTRAMBYP, 1'b0,BMUX_WENB[38], BMUXSEL_WENB[38]); + buf bufmwenB38 (WENYB[38], BMUXSEL_WENB[38]); + _MUX mwenB39 (TENB, TWENB[39], BUS_WENB[39], BMUX_WENB[39]); + _MUX mwenselB39 (DFTRAMBYP, 1'b0,BMUX_WENB[39], BMUXSEL_WENB[39]); + buf bufmwenB39 (WENYB[39], BMUXSEL_WENB[39]); + _MUX mwenB40 (TENB, TWENB[40], BUS_WENB[40], BMUX_WENB[40]); + _MUX mwenselB40 (DFTRAMBYP, 1'b0,BMUX_WENB[40], BMUXSEL_WENB[40]); + buf bufmwenB40 (WENYB[40], BMUXSEL_WENB[40]); + _MUX mwenB41 (TENB, TWENB[41], BUS_WENB[41], BMUX_WENB[41]); + _MUX mwenselB41 (DFTRAMBYP, 1'b0,BMUX_WENB[41], BMUXSEL_WENB[41]); + buf bufmwenB41 (WENYB[41], BMUXSEL_WENB[41]); + _MUX mwenB42 (TENB, TWENB[42], BUS_WENB[42], BMUX_WENB[42]); + _MUX mwenselB42 (DFTRAMBYP, 1'b0,BMUX_WENB[42], BMUXSEL_WENB[42]); + buf bufmwenB42 (WENYB[42], BMUXSEL_WENB[42]); + _MUX mwenB43 (TENB, TWENB[43], BUS_WENB[43], BMUX_WENB[43]); + _MUX mwenselB43 (DFTRAMBYP, 1'b0,BMUX_WENB[43], BMUXSEL_WENB[43]); + buf bufmwenB43 (WENYB[43], BMUXSEL_WENB[43]); + _MUX mwenB44 (TENB, TWENB[44], BUS_WENB[44], BMUX_WENB[44]); + _MUX mwenselB44 (DFTRAMBYP, 1'b0,BMUX_WENB[44], BMUXSEL_WENB[44]); + buf bufmwenB44 (WENYB[44], BMUXSEL_WENB[44]); + _MUX mwenB45 (TENB, TWENB[45], BUS_WENB[45], BMUX_WENB[45]); + _MUX mwenselB45 (DFTRAMBYP, 1'b0,BMUX_WENB[45], BMUXSEL_WENB[45]); + buf bufmwenB45 (WENYB[45], BMUXSEL_WENB[45]); + _MUX mwenB46 (TENB, TWENB[46], BUS_WENB[46], BMUX_WENB[46]); + _MUX mwenselB46 (DFTRAMBYP, 1'b0,BMUX_WENB[46], BMUXSEL_WENB[46]); + buf bufmwenB46 (WENYB[46], BMUXSEL_WENB[46]); + _MUX mwenB47 (TENB, TWENB[47], BUS_WENB[47], BMUX_WENB[47]); + _MUX mwenselB47 (DFTRAMBYP, 1'b0,BMUX_WENB[47], BMUXSEL_WENB[47]); + buf bufmwenB47 (WENYB[47], BMUXSEL_WENB[47]); + _MUX mwenB48 (TENB, TWENB[48], BUS_WENB[48], BMUX_WENB[48]); + _MUX mwenselB48 (DFTRAMBYP, 1'b0,BMUX_WENB[48], BMUXSEL_WENB[48]); + buf bufmwenB48 (WENYB[48], BMUXSEL_WENB[48]); + _MUX mwenB49 (TENB, TWENB[49], BUS_WENB[49], BMUX_WENB[49]); + _MUX mwenselB49 (DFTRAMBYP, 1'b0,BMUX_WENB[49], BMUXSEL_WENB[49]); + buf bufmwenB49 (WENYB[49], BMUXSEL_WENB[49]); + _MUX mwenB50 (TENB, TWENB[50], BUS_WENB[50], BMUX_WENB[50]); + _MUX mwenselB50 (DFTRAMBYP, 1'b0,BMUX_WENB[50], BMUXSEL_WENB[50]); + buf bufmwenB50 (WENYB[50], BMUXSEL_WENB[50]); + _MUX mwenB51 (TENB, TWENB[51], BUS_WENB[51], BMUX_WENB[51]); + _MUX mwenselB51 (DFTRAMBYP, 1'b0,BMUX_WENB[51], BMUXSEL_WENB[51]); + buf bufmwenB51 (WENYB[51], BMUXSEL_WENB[51]); + _MUX mwenB52 (TENB, TWENB[52], BUS_WENB[52], BMUX_WENB[52]); + _MUX mwenselB52 (DFTRAMBYP, 1'b0,BMUX_WENB[52], BMUXSEL_WENB[52]); + buf bufmwenB52 (WENYB[52], BMUXSEL_WENB[52]); + _MUX mwenB53 (TENB, TWENB[53], BUS_WENB[53], BMUX_WENB[53]); + _MUX mwenselB53 (DFTRAMBYP, 1'b0,BMUX_WENB[53], BMUXSEL_WENB[53]); + buf bufmwenB53 (WENYB[53], BMUXSEL_WENB[53]); + _MUX mwenB54 (TENB, TWENB[54], BUS_WENB[54], BMUX_WENB[54]); + _MUX mwenselB54 (DFTRAMBYP, 1'b0,BMUX_WENB[54], BMUXSEL_WENB[54]); + buf bufmwenB54 (WENYB[54], BMUXSEL_WENB[54]); + _MUX mwenB55 (TENB, TWENB[55], BUS_WENB[55], BMUX_WENB[55]); + _MUX mwenselB55 (DFTRAMBYP, 1'b0,BMUX_WENB[55], BMUXSEL_WENB[55]); + buf bufmwenB55 (WENYB[55], BMUXSEL_WENB[55]); + _MUX mwenB56 (TENB, TWENB[56], BUS_WENB[56], BMUX_WENB[56]); + _MUX mwenselB56 (DFTRAMBYP, 1'b0,BMUX_WENB[56], BMUXSEL_WENB[56]); + buf bufmwenB56 (WENYB[56], BMUXSEL_WENB[56]); + _MUX mwenB57 (TENB, TWENB[57], BUS_WENB[57], BMUX_WENB[57]); + _MUX mwenselB57 (DFTRAMBYP, 1'b0,BMUX_WENB[57], BMUXSEL_WENB[57]); + buf bufmwenB57 (WENYB[57], BMUXSEL_WENB[57]); + _MUX mwenB58 (TENB, TWENB[58], BUS_WENB[58], BMUX_WENB[58]); + _MUX mwenselB58 (DFTRAMBYP, 1'b0,BMUX_WENB[58], BMUXSEL_WENB[58]); + buf bufmwenB58 (WENYB[58], BMUXSEL_WENB[58]); + _MUX mwenB59 (TENB, TWENB[59], BUS_WENB[59], BMUX_WENB[59]); + _MUX mwenselB59 (DFTRAMBYP, 1'b0,BMUX_WENB[59], BMUXSEL_WENB[59]); + buf bufmwenB59 (WENYB[59], BMUXSEL_WENB[59]); + _MUX mwenB60 (TENB, TWENB[60], BUS_WENB[60], BMUX_WENB[60]); + _MUX mwenselB60 (DFTRAMBYP, 1'b0,BMUX_WENB[60], BMUXSEL_WENB[60]); + buf bufmwenB60 (WENYB[60], BMUXSEL_WENB[60]); + _MUX mwenB61 (TENB, TWENB[61], BUS_WENB[61], BMUX_WENB[61]); + _MUX mwenselB61 (DFTRAMBYP, 1'b0,BMUX_WENB[61], BMUXSEL_WENB[61]); + buf bufmwenB61 (WENYB[61], BMUXSEL_WENB[61]); + _MUX mwenB62 (TENB, TWENB[62], BUS_WENB[62], BMUX_WENB[62]); + _MUX mwenselB62 (DFTRAMBYP, 1'b0,BMUX_WENB[62], BMUXSEL_WENB[62]); + buf bufmwenB62 (WENYB[62], BMUXSEL_WENB[62]); + _MUX mwenB63 (TENB, TWENB[63], BUS_WENB[63], BMUX_WENB[63]); + _MUX mwenselB63 (DFTRAMBYP, 1'b0,BMUX_WENB[63], BMUXSEL_WENB[63]); + buf bufmwenB63 (WENYB[63], BMUXSEL_WENB[63]); + _MUX mwenB64 (TENB, TWENB[64], BUS_WENB[64], BMUX_WENB[64]); + _MUX mwenselB64 (DFTRAMBYP, 1'b0,BMUX_WENB[64], BMUXSEL_WENB[64]); + buf bufmwenB64 (WENYB[64], BMUXSEL_WENB[64]); + _MUX mwenB65 (TENB, TWENB[65], BUS_WENB[65], BMUX_WENB[65]); + _MUX mwenselB65 (DFTRAMBYP, 1'b0,BMUX_WENB[65], BMUXSEL_WENB[65]); + buf bufmwenB65 (WENYB[65], BMUXSEL_WENB[65]); + _MUX mwenB66 (TENB, TWENB[66], BUS_WENB[66], BMUX_WENB[66]); + _MUX mwenselB66 (DFTRAMBYP, 1'b0,BMUX_WENB[66], BMUXSEL_WENB[66]); + buf bufmwenB66 (WENYB[66], BMUXSEL_WENB[66]); + _MUX mwenB67 (TENB, TWENB[67], BUS_WENB[67], BMUX_WENB[67]); + _MUX mwenselB67 (DFTRAMBYP, 1'b0,BMUX_WENB[67], BMUXSEL_WENB[67]); + buf bufmwenB67 (WENYB[67], BMUXSEL_WENB[67]); + _MUX mwenB68 (TENB, TWENB[68], BUS_WENB[68], BMUX_WENB[68]); + _MUX mwenselB68 (DFTRAMBYP, 1'b0,BMUX_WENB[68], BMUXSEL_WENB[68]); + buf bufmwenB68 (WENYB[68], BMUXSEL_WENB[68]); + _MUX mwenB69 (TENB, TWENB[69], BUS_WENB[69], BMUX_WENB[69]); + _MUX mwenselB69 (DFTRAMBYP, 1'b0,BMUX_WENB[69], BMUXSEL_WENB[69]); + buf bufmwenB69 (WENYB[69], BMUXSEL_WENB[69]); + _MUX mwenB70 (TENB, TWENB[70], BUS_WENB[70], BMUX_WENB[70]); + _MUX mwenselB70 (DFTRAMBYP, 1'b0,BMUX_WENB[70], BMUXSEL_WENB[70]); + buf bufmwenB70 (WENYB[70], BMUXSEL_WENB[70]); + _MUX mwenB71 (TENB, TWENB[71], BUS_WENB[71], BMUX_WENB[71]); + _MUX mwenselB71 (DFTRAMBYP, 1'b0,BMUX_WENB[71], BMUXSEL_WENB[71]); + buf bufmwenB71 (WENYB[71], BMUXSEL_WENB[71]); + _MUX mwenB72 (TENB, TWENB[72], BUS_WENB[72], BMUX_WENB[72]); + _MUX mwenselB72 (DFTRAMBYP, 1'b0,BMUX_WENB[72], BMUXSEL_WENB[72]); + buf bufmwenB72 (WENYB[72], BMUXSEL_WENB[72]); + _MUX mwenB73 (TENB, TWENB[73], BUS_WENB[73], BMUX_WENB[73]); + _MUX mwenselB73 (DFTRAMBYP, 1'b0,BMUX_WENB[73], BMUXSEL_WENB[73]); + buf bufmwenB73 (WENYB[73], BMUXSEL_WENB[73]); + _MUX mwenB74 (TENB, TWENB[74], BUS_WENB[74], BMUX_WENB[74]); + _MUX mwenselB74 (DFTRAMBYP, 1'b0,BMUX_WENB[74], BMUXSEL_WENB[74]); + buf bufmwenB74 (WENYB[74], BMUXSEL_WENB[74]); + _MUX mwenB75 (TENB, TWENB[75], BUS_WENB[75], BMUX_WENB[75]); + _MUX mwenselB75 (DFTRAMBYP, 1'b0,BMUX_WENB[75], BMUXSEL_WENB[75]); + buf bufmwenB75 (WENYB[75], BMUXSEL_WENB[75]); + _MUX mwenB76 (TENB, TWENB[76], BUS_WENB[76], BMUX_WENB[76]); + _MUX mwenselB76 (DFTRAMBYP, 1'b0,BMUX_WENB[76], BMUXSEL_WENB[76]); + buf bufmwenB76 (WENYB[76], BMUXSEL_WENB[76]); + _MUX mwenB77 (TENB, TWENB[77], BUS_WENB[77], BMUX_WENB[77]); + _MUX mwenselB77 (DFTRAMBYP, 1'b0,BMUX_WENB[77], BMUXSEL_WENB[77]); + buf bufmwenB77 (WENYB[77], BMUXSEL_WENB[77]); + _MUX mwenB78 (TENB, TWENB[78], BUS_WENB[78], BMUX_WENB[78]); + _MUX mwenselB78 (DFTRAMBYP, 1'b0,BMUX_WENB[78], BMUXSEL_WENB[78]); + buf bufmwenB78 (WENYB[78], BMUXSEL_WENB[78]); + _MUX mwenB79 (TENB, TWENB[79], BUS_WENB[79], BMUX_WENB[79]); + _MUX mwenselB79 (DFTRAMBYP, 1'b0,BMUX_WENB[79], BMUXSEL_WENB[79]); + buf bufmwenB79 (WENYB[79], BMUXSEL_WENB[79]); + _MUX mwenB80 (TENB, TWENB[80], BUS_WENB[80], BMUX_WENB[80]); + _MUX mwenselB80 (DFTRAMBYP, 1'b0,BMUX_WENB[80], BMUXSEL_WENB[80]); + buf bufmwenB80 (WENYB[80], BMUXSEL_WENB[80]); + _MUX mwenB81 (TENB, TWENB[81], BUS_WENB[81], BMUX_WENB[81]); + _MUX mwenselB81 (DFTRAMBYP, 1'b0,BMUX_WENB[81], BMUXSEL_WENB[81]); + buf bufmwenB81 (WENYB[81], BMUXSEL_WENB[81]); + _MUX mwenB82 (TENB, TWENB[82], BUS_WENB[82], BMUX_WENB[82]); + _MUX mwenselB82 (DFTRAMBYP, 1'b0,BMUX_WENB[82], BMUXSEL_WENB[82]); + buf bufmwenB82 (WENYB[82], BMUXSEL_WENB[82]); + _MUX mwenB83 (TENB, TWENB[83], BUS_WENB[83], BMUX_WENB[83]); + _MUX mwenselB83 (DFTRAMBYP, 1'b0,BMUX_WENB[83], BMUXSEL_WENB[83]); + buf bufmwenB83 (WENYB[83], BMUXSEL_WENB[83]); + _MUX mwenB84 (TENB, TWENB[84], BUS_WENB[84], BMUX_WENB[84]); + _MUX mwenselB84 (DFTRAMBYP, 1'b0,BMUX_WENB[84], BMUXSEL_WENB[84]); + buf bufmwenB84 (WENYB[84], BMUXSEL_WENB[84]); + _MUX mwenB85 (TENB, TWENB[85], BUS_WENB[85], BMUX_WENB[85]); + _MUX mwenselB85 (DFTRAMBYP, 1'b0,BMUX_WENB[85], BMUXSEL_WENB[85]); + buf bufmwenB85 (WENYB[85], BMUXSEL_WENB[85]); + _MUX mwenB86 (TENB, TWENB[86], BUS_WENB[86], BMUX_WENB[86]); + _MUX mwenselB86 (DFTRAMBYP, 1'b0,BMUX_WENB[86], BMUXSEL_WENB[86]); + buf bufmwenB86 (WENYB[86], BMUXSEL_WENB[86]); + _MUX mwenB87 (TENB, TWENB[87], BUS_WENB[87], BMUX_WENB[87]); + _MUX mwenselB87 (DFTRAMBYP, 1'b0,BMUX_WENB[87], BMUXSEL_WENB[87]); + buf bufmwenB87 (WENYB[87], BMUXSEL_WENB[87]); + _MUX mwenB88 (TENB, TWENB[88], BUS_WENB[88], BMUX_WENB[88]); + _MUX mwenselB88 (DFTRAMBYP, 1'b0,BMUX_WENB[88], BMUXSEL_WENB[88]); + buf bufmwenB88 (WENYB[88], BMUXSEL_WENB[88]); + _MUX mwenB89 (TENB, TWENB[89], BUS_WENB[89], BMUX_WENB[89]); + _MUX mwenselB89 (DFTRAMBYP, 1'b0,BMUX_WENB[89], BMUXSEL_WENB[89]); + buf bufmwenB89 (WENYB[89], BMUXSEL_WENB[89]); + _MUX mwenB90 (TENB, TWENB[90], BUS_WENB[90], BMUX_WENB[90]); + _MUX mwenselB90 (DFTRAMBYP, 1'b0,BMUX_WENB[90], BMUXSEL_WENB[90]); + buf bufmwenB90 (WENYB[90], BMUXSEL_WENB[90]); + _MUX mwenB91 (TENB, TWENB[91], BUS_WENB[91], BMUX_WENB[91]); + _MUX mwenselB91 (DFTRAMBYP, 1'b0,BMUX_WENB[91], BMUXSEL_WENB[91]); + buf bufmwenB91 (WENYB[91], BMUXSEL_WENB[91]); + _MUX mwenB92 (TENB, TWENB[92], BUS_WENB[92], BMUX_WENB[92]); + _MUX mwenselB92 (DFTRAMBYP, 1'b0,BMUX_WENB[92], BMUXSEL_WENB[92]); + buf bufmwenB92 (WENYB[92], BMUXSEL_WENB[92]); + _MUX mwenB93 (TENB, TWENB[93], BUS_WENB[93], BMUX_WENB[93]); + _MUX mwenselB93 (DFTRAMBYP, 1'b0,BMUX_WENB[93], BMUXSEL_WENB[93]); + buf bufmwenB93 (WENYB[93], BMUXSEL_WENB[93]); + _MUX mwenB94 (TENB, TWENB[94], BUS_WENB[94], BMUX_WENB[94]); + _MUX mwenselB94 (DFTRAMBYP, 1'b0,BMUX_WENB[94], BMUXSEL_WENB[94]); + buf bufmwenB94 (WENYB[94], BMUXSEL_WENB[94]); + _MUX mwenB95 (TENB, TWENB[95], BUS_WENB[95], BMUX_WENB[95]); + _MUX mwenselB95 (DFTRAMBYP, 1'b0,BMUX_WENB[95], BMUXSEL_WENB[95]); + buf bufmwenB95 (WENYB[95], BMUXSEL_WENB[95]); + _MUX mwenB96 (TENB, TWENB[96], BUS_WENB[96], BMUX_WENB[96]); + _MUX mwenselB96 (DFTRAMBYP, 1'b0,BMUX_WENB[96], BMUXSEL_WENB[96]); + buf bufmwenB96 (WENYB[96], BMUXSEL_WENB[96]); + _MUX mwenB97 (TENB, TWENB[97], BUS_WENB[97], BMUX_WENB[97]); + _MUX mwenselB97 (DFTRAMBYP, 1'b0,BMUX_WENB[97], BMUXSEL_WENB[97]); + buf bufmwenB97 (WENYB[97], BMUXSEL_WENB[97]); + _MUX mwenB98 (TENB, TWENB[98], BUS_WENB[98], BMUX_WENB[98]); + _MUX mwenselB98 (DFTRAMBYP, 1'b0,BMUX_WENB[98], BMUXSEL_WENB[98]); + buf bufmwenB98 (WENYB[98], BMUXSEL_WENB[98]); + _MUX mwenB99 (TENB, TWENB[99], BUS_WENB[99], BMUX_WENB[99]); + _MUX mwenselB99 (DFTRAMBYP, 1'b0,BMUX_WENB[99], BMUXSEL_WENB[99]); + buf bufmwenB99 (WENYB[99], BMUXSEL_WENB[99]); + _MUX mwenB100 (TENB, TWENB[100], BUS_WENB[100], BMUX_WENB[100]); + _MUX mwenselB100 (DFTRAMBYP, 1'b0,BMUX_WENB[100], BMUXSEL_WENB[100]); + buf bufmwenB100 (WENYB[100], BMUXSEL_WENB[100]); + _MUX mwenB101 (TENB, TWENB[101], BUS_WENB[101], BMUX_WENB[101]); + _MUX mwenselB101 (DFTRAMBYP, 1'b0,BMUX_WENB[101], BMUXSEL_WENB[101]); + buf bufmwenB101 (WENYB[101], BMUXSEL_WENB[101]); + _MUX mwenB102 (TENB, TWENB[102], BUS_WENB[102], BMUX_WENB[102]); + _MUX mwenselB102 (DFTRAMBYP, 1'b0,BMUX_WENB[102], BMUXSEL_WENB[102]); + buf bufmwenB102 (WENYB[102], BMUXSEL_WENB[102]); + _MUX mwenB103 (TENB, TWENB[103], BUS_WENB[103], BMUX_WENB[103]); + _MUX mwenselB103 (DFTRAMBYP, 1'b0,BMUX_WENB[103], BMUXSEL_WENB[103]); + buf bufmwenB103 (WENYB[103], BMUXSEL_WENB[103]); + _MUX mwenB104 (TENB, TWENB[104], BUS_WENB[104], BMUX_WENB[104]); + _MUX mwenselB104 (DFTRAMBYP, 1'b0,BMUX_WENB[104], BMUXSEL_WENB[104]); + buf bufmwenB104 (WENYB[104], BMUXSEL_WENB[104]); + _MUX mwenB105 (TENB, TWENB[105], BUS_WENB[105], BMUX_WENB[105]); + _MUX mwenselB105 (DFTRAMBYP, 1'b0,BMUX_WENB[105], BMUXSEL_WENB[105]); + buf bufmwenB105 (WENYB[105], BMUXSEL_WENB[105]); + _MUX mwenB106 (TENB, TWENB[106], BUS_WENB[106], BMUX_WENB[106]); + _MUX mwenselB106 (DFTRAMBYP, 1'b0,BMUX_WENB[106], BMUXSEL_WENB[106]); + buf bufmwenB106 (WENYB[106], BMUXSEL_WENB[106]); + _MUX mwenB107 (TENB, TWENB[107], BUS_WENB[107], BMUX_WENB[107]); + _MUX mwenselB107 (DFTRAMBYP, 1'b0,BMUX_WENB[107], BMUXSEL_WENB[107]); + buf bufmwenB107 (WENYB[107], BMUXSEL_WENB[107]); + _MUX mwenB108 (TENB, TWENB[108], BUS_WENB[108], BMUX_WENB[108]); + _MUX mwenselB108 (DFTRAMBYP, 1'b0,BMUX_WENB[108], BMUXSEL_WENB[108]); + buf bufmwenB108 (WENYB[108], BMUXSEL_WENB[108]); + _MUX mwenB109 (TENB, TWENB[109], BUS_WENB[109], BMUX_WENB[109]); + _MUX mwenselB109 (DFTRAMBYP, 1'b0,BMUX_WENB[109], BMUXSEL_WENB[109]); + buf bufmwenB109 (WENYB[109], BMUXSEL_WENB[109]); + _MUX mwenB110 (TENB, TWENB[110], BUS_WENB[110], BMUX_WENB[110]); + _MUX mwenselB110 (DFTRAMBYP, 1'b0,BMUX_WENB[110], BMUXSEL_WENB[110]); + buf bufmwenB110 (WENYB[110], BMUXSEL_WENB[110]); + _MUX mwenB111 (TENB, TWENB[111], BUS_WENB[111], BMUX_WENB[111]); + _MUX mwenselB111 (DFTRAMBYP, 1'b0,BMUX_WENB[111], BMUXSEL_WENB[111]); + buf bufmwenB111 (WENYB[111], BMUXSEL_WENB[111]); + _MUX mwenB112 (TENB, TWENB[112], BUS_WENB[112], BMUX_WENB[112]); + _MUX mwenselB112 (DFTRAMBYP, 1'b0,BMUX_WENB[112], BMUXSEL_WENB[112]); + buf bufmwenB112 (WENYB[112], BMUXSEL_WENB[112]); + _MUX mwenB113 (TENB, TWENB[113], BUS_WENB[113], BMUX_WENB[113]); + _MUX mwenselB113 (DFTRAMBYP, 1'b0,BMUX_WENB[113], BMUXSEL_WENB[113]); + buf bufmwenB113 (WENYB[113], BMUXSEL_WENB[113]); + _MUX mwenB114 (TENB, TWENB[114], BUS_WENB[114], BMUX_WENB[114]); + _MUX mwenselB114 (DFTRAMBYP, 1'b0,BMUX_WENB[114], BMUXSEL_WENB[114]); + buf bufmwenB114 (WENYB[114], BMUXSEL_WENB[114]); + _MUX mwenB115 (TENB, TWENB[115], BUS_WENB[115], BMUX_WENB[115]); + _MUX mwenselB115 (DFTRAMBYP, 1'b0,BMUX_WENB[115], BMUXSEL_WENB[115]); + buf bufmwenB115 (WENYB[115], BMUXSEL_WENB[115]); + _MUX mwenB116 (TENB, TWENB[116], BUS_WENB[116], BMUX_WENB[116]); + _MUX mwenselB116 (DFTRAMBYP, 1'b0,BMUX_WENB[116], BMUXSEL_WENB[116]); + buf bufmwenB116 (WENYB[116], BMUXSEL_WENB[116]); + _MUX mwenB117 (TENB, TWENB[117], BUS_WENB[117], BMUX_WENB[117]); + _MUX mwenselB117 (DFTRAMBYP, 1'b0,BMUX_WENB[117], BMUXSEL_WENB[117]); + buf bufmwenB117 (WENYB[117], BMUXSEL_WENB[117]); + _MUX mwenB118 (TENB, TWENB[118], BUS_WENB[118], BMUX_WENB[118]); + _MUX mwenselB118 (DFTRAMBYP, 1'b0,BMUX_WENB[118], BMUXSEL_WENB[118]); + buf bufmwenB118 (WENYB[118], BMUXSEL_WENB[118]); + _MUX mwenB119 (TENB, TWENB[119], BUS_WENB[119], BMUX_WENB[119]); + _MUX mwenselB119 (DFTRAMBYP, 1'b0,BMUX_WENB[119], BMUXSEL_WENB[119]); + buf bufmwenB119 (WENYB[119], BMUXSEL_WENB[119]); + _MUX mwenB120 (TENB, TWENB[120], BUS_WENB[120], BMUX_WENB[120]); + _MUX mwenselB120 (DFTRAMBYP, 1'b0,BMUX_WENB[120], BMUXSEL_WENB[120]); + buf bufmwenB120 (WENYB[120], BMUXSEL_WENB[120]); + _MUX mwenB121 (TENB, TWENB[121], BUS_WENB[121], BMUX_WENB[121]); + _MUX mwenselB121 (DFTRAMBYP, 1'b0,BMUX_WENB[121], BMUXSEL_WENB[121]); + buf bufmwenB121 (WENYB[121], BMUXSEL_WENB[121]); + _MUX mwenB122 (TENB, TWENB[122], BUS_WENB[122], BMUX_WENB[122]); + _MUX mwenselB122 (DFTRAMBYP, 1'b0,BMUX_WENB[122], BMUXSEL_WENB[122]); + buf bufmwenB122 (WENYB[122], BMUXSEL_WENB[122]); + _MUX mwenB123 (TENB, TWENB[123], BUS_WENB[123], BMUX_WENB[123]); + _MUX mwenselB123 (DFTRAMBYP, 1'b0,BMUX_WENB[123], BMUXSEL_WENB[123]); + buf bufmwenB123 (WENYB[123], BMUXSEL_WENB[123]); + _MUX mwenB124 (TENB, TWENB[124], BUS_WENB[124], BMUX_WENB[124]); + _MUX mwenselB124 (DFTRAMBYP, 1'b0,BMUX_WENB[124], BMUXSEL_WENB[124]); + buf bufmwenB124 (WENYB[124], BMUXSEL_WENB[124]); + _MUX mwenB125 (TENB, TWENB[125], BUS_WENB[125], BMUX_WENB[125]); + _MUX mwenselB125 (DFTRAMBYP, 1'b0,BMUX_WENB[125], BMUXSEL_WENB[125]); + buf bufmwenB125 (WENYB[125], BMUXSEL_WENB[125]); + _MUX mwenB126 (TENB, TWENB[126], BUS_WENB[126], BMUX_WENB[126]); + _MUX mwenselB126 (DFTRAMBYP, 1'b0,BMUX_WENB[126], BMUXSEL_WENB[126]); + buf bufmwenB126 (WENYB[126], BMUXSEL_WENB[126]); + _MUX mwenB127 (TENB, TWENB[127], BUS_WENB[127], BMUX_WENB[127]); + _MUX mwenselB127 (DFTRAMBYP, 1'b0,BMUX_WENB[127], BMUXSEL_WENB[127]); + buf bufmwenB127 (WENYB[127], BMUXSEL_WENB[127]); + + _MUX mcenB (TENB, TCENB, CENB, BMUX_CENB); + _MUX mcenselB (DFTRAMBYP, 1'b0,BMUX_CENB, BMUXSEL_CENB); + buf bufmcenB (CENYB, BMUXSEL_CENB); + wire [4:0] B_max, B_max_n, AB_m; + wire XoutBif, XoutBiff; + wire [4:1] BMUX_AB_n, EQ_B, m_AB; + wire [3:0] XoutBi; + not BMUX_AB1_n (BMUX_AB_n[1], BMUX_AB[1]); + not BMUX_AB2_n (BMUX_AB_n[2], BMUX_AB[2]); + not BMUX_AB3_n (BMUX_AB_n[3], BMUX_AB[3]); + not BMUX_AB4_n (BMUX_AB_n[4], BMUX_AB[4]); + + assign B_max[0] = 1; + assign B_max[1] = 1; + assign B_max[2] = 1; + assign B_max[3] = 1; + assign B_max[4] = 1; + + not Bmax0_n (B_max_n[0], B_max[0]); + not Bmax1_n (B_max_n[1], B_max[1]); + not Bmax2_n (B_max_n[2], B_max[2]); + not Bmax3_n (B_max_n[3], B_max[3]); + not Bmax4_n (B_max_n[4], B_max[4]); + + and andBMUXABAmax0 (AB_m[0], BMUX_AB[0], B_max_n[0]); + and andBMUXABAmax1 (AB_m[1], BMUX_AB[1], B_max_n[1]); + and andBMUXABAmax2 (AB_m[2], BMUX_AB[2], B_max_n[2]); + and andBMUXABAmax3 (AB_m[3], BMUX_AB[3], B_max_n[3]); + and andBMUXABAmax4 (AB_m[4], BMUX_AB[4], B_max_n[4]); + + and andBMUXABAmax1_n (m_AB[1], BMUX_AB_n[1], B_max[1]); + and andBMUXABAmax2_n (m_AB[2], BMUX_AB_n[2], B_max[2]); + and andBMUXABAmax3_n (m_AB[3], BMUX_AB_n[3], B_max[3]); + and andBMUXABAmax4_n (m_AB[4], BMUX_AB_n[4], B_max[4]); + + nor norABAmax1 (EQ_B[1], m_AB[1], AB_m[1]); + nor norABAmax2 (EQ_B[2], m_AB[2], AB_m[2]); + nor norABAmax3 (EQ_B[3], m_AB[3], AB_m[3]); + nor norABAmax4 (EQ_B[4], m_AB[4], AB_m[4]); + + and XfABAmax0 (XoutBi[0], AB_m[0], EQ_B[4], EQ_B[3], EQ_B[2], EQ_B[1]); + and XfABAmax1 (XoutBi[1], AB_m[1], EQ_B[4], EQ_B[3], EQ_B[2]); + and XfABAmax2 (XoutBi[2], AB_m[2], EQ_B[4], EQ_B[3]); + and XfABAmax3 (XoutBi[3], AB_m[3], EQ_B[4]); + or orXfABAmax4 (XoutBif, AB_m[4], XoutBi[0], XoutBi[1], XoutBi[2], XoutBi[3]); + + wire [4:0] xDetectionAddrBusB; + xor addrHandleB0 (xDetectionAddrBusB[0], BMUX_AB[0], BMUX_AB[0]); + xor addrHandleB1 (xDetectionAddrBusB[1], BMUX_AB[1], BMUX_AB[1]); + xor addrHandleB2 (xDetectionAddrBusB[2], BMUX_AB[2], BMUX_AB[2]); + xor addrHandleB3 (xDetectionAddrBusB[3], BMUX_AB[3], BMUX_AB[3]); + xor addrHandleB4 (xDetectionAddrBusB[4], BMUX_AB[4], BMUX_AB[4]); + or addrFinalB (xAddrB,xDetectionAddrBusB[0],xDetectionAddrBusB[1],xDetectionAddrBusB[2],xDetectionAddrBusB[3],xDetectionAddrBusB[4]); + or xBoundB (XoutBFinal, XoutBif, xAddrB); + nor scanshiftB (nscanshiftB, DFTRAMBYP, SEB); + and XoutaddrB (XoutaddrB, nscanshiftB, XoutBFinal); + or XoutBFF0 (XoutBiff, XoutaddrB, XoutB); + + wire [127:0] SPLIT_WENB; + assign SPLIT_WENB[0]=BMUX_WENB[0]; + assign SPLIT_WENB[1]=BMUX_WENB[1]; + assign SPLIT_WENB[2]=BMUX_WENB[2]; + assign SPLIT_WENB[3]=BMUX_WENB[3]; + assign SPLIT_WENB[4]=BMUX_WENB[4]; + assign SPLIT_WENB[5]=BMUX_WENB[5]; + assign SPLIT_WENB[6]=BMUX_WENB[6]; + assign SPLIT_WENB[7]=BMUX_WENB[7]; + assign SPLIT_WENB[8]=BMUX_WENB[8]; + assign SPLIT_WENB[9]=BMUX_WENB[9]; + assign SPLIT_WENB[10]=BMUX_WENB[10]; + assign SPLIT_WENB[11]=BMUX_WENB[11]; + assign SPLIT_WENB[12]=BMUX_WENB[12]; + assign SPLIT_WENB[13]=BMUX_WENB[13]; + assign SPLIT_WENB[14]=BMUX_WENB[14]; + assign SPLIT_WENB[15]=BMUX_WENB[15]; + assign SPLIT_WENB[16]=BMUX_WENB[16]; + assign SPLIT_WENB[17]=BMUX_WENB[17]; + assign SPLIT_WENB[18]=BMUX_WENB[18]; + assign SPLIT_WENB[19]=BMUX_WENB[19]; + assign SPLIT_WENB[20]=BMUX_WENB[20]; + assign SPLIT_WENB[21]=BMUX_WENB[21]; + assign SPLIT_WENB[22]=BMUX_WENB[22]; + assign SPLIT_WENB[23]=BMUX_WENB[23]; + assign SPLIT_WENB[24]=BMUX_WENB[24]; + assign SPLIT_WENB[25]=BMUX_WENB[25]; + assign SPLIT_WENB[26]=BMUX_WENB[26]; + assign SPLIT_WENB[27]=BMUX_WENB[27]; + assign SPLIT_WENB[28]=BMUX_WENB[28]; + assign SPLIT_WENB[29]=BMUX_WENB[29]; + assign SPLIT_WENB[30]=BMUX_WENB[30]; + assign SPLIT_WENB[31]=BMUX_WENB[31]; + assign SPLIT_WENB[32]=BMUX_WENB[32]; + assign SPLIT_WENB[33]=BMUX_WENB[33]; + assign SPLIT_WENB[34]=BMUX_WENB[34]; + assign SPLIT_WENB[35]=BMUX_WENB[35]; + assign SPLIT_WENB[36]=BMUX_WENB[36]; + assign SPLIT_WENB[37]=BMUX_WENB[37]; + assign SPLIT_WENB[38]=BMUX_WENB[38]; + assign SPLIT_WENB[39]=BMUX_WENB[39]; + assign SPLIT_WENB[40]=BMUX_WENB[40]; + assign SPLIT_WENB[41]=BMUX_WENB[41]; + assign SPLIT_WENB[42]=BMUX_WENB[42]; + assign SPLIT_WENB[43]=BMUX_WENB[43]; + assign SPLIT_WENB[44]=BMUX_WENB[44]; + assign SPLIT_WENB[45]=BMUX_WENB[45]; + assign SPLIT_WENB[46]=BMUX_WENB[46]; + assign SPLIT_WENB[47]=BMUX_WENB[47]; + assign SPLIT_WENB[48]=BMUX_WENB[48]; + assign SPLIT_WENB[49]=BMUX_WENB[49]; + assign SPLIT_WENB[50]=BMUX_WENB[50]; + assign SPLIT_WENB[51]=BMUX_WENB[51]; + assign SPLIT_WENB[52]=BMUX_WENB[52]; + assign SPLIT_WENB[53]=BMUX_WENB[53]; + assign SPLIT_WENB[54]=BMUX_WENB[54]; + assign SPLIT_WENB[55]=BMUX_WENB[55]; + assign SPLIT_WENB[56]=BMUX_WENB[56]; + assign SPLIT_WENB[57]=BMUX_WENB[57]; + assign SPLIT_WENB[58]=BMUX_WENB[58]; + assign SPLIT_WENB[59]=BMUX_WENB[59]; + assign SPLIT_WENB[60]=BMUX_WENB[60]; + assign SPLIT_WENB[61]=BMUX_WENB[61]; + assign SPLIT_WENB[62]=BMUX_WENB[62]; + assign SPLIT_WENB[63]=BMUX_WENB[63]; + assign SPLIT_WENB[64]=BMUX_WENB[64]; + assign SPLIT_WENB[65]=BMUX_WENB[65]; + assign SPLIT_WENB[66]=BMUX_WENB[66]; + assign SPLIT_WENB[67]=BMUX_WENB[67]; + assign SPLIT_WENB[68]=BMUX_WENB[68]; + assign SPLIT_WENB[69]=BMUX_WENB[69]; + assign SPLIT_WENB[70]=BMUX_WENB[70]; + assign SPLIT_WENB[71]=BMUX_WENB[71]; + assign SPLIT_WENB[72]=BMUX_WENB[72]; + assign SPLIT_WENB[73]=BMUX_WENB[73]; + assign SPLIT_WENB[74]=BMUX_WENB[74]; + assign SPLIT_WENB[75]=BMUX_WENB[75]; + assign SPLIT_WENB[76]=BMUX_WENB[76]; + assign SPLIT_WENB[77]=BMUX_WENB[77]; + assign SPLIT_WENB[78]=BMUX_WENB[78]; + assign SPLIT_WENB[79]=BMUX_WENB[79]; + assign SPLIT_WENB[80]=BMUX_WENB[80]; + assign SPLIT_WENB[81]=BMUX_WENB[81]; + assign SPLIT_WENB[82]=BMUX_WENB[82]; + assign SPLIT_WENB[83]=BMUX_WENB[83]; + assign SPLIT_WENB[84]=BMUX_WENB[84]; + assign SPLIT_WENB[85]=BMUX_WENB[85]; + assign SPLIT_WENB[86]=BMUX_WENB[86]; + assign SPLIT_WENB[87]=BMUX_WENB[87]; + assign SPLIT_WENB[88]=BMUX_WENB[88]; + assign SPLIT_WENB[89]=BMUX_WENB[89]; + assign SPLIT_WENB[90]=BMUX_WENB[90]; + assign SPLIT_WENB[91]=BMUX_WENB[91]; + assign SPLIT_WENB[92]=BMUX_WENB[92]; + assign SPLIT_WENB[93]=BMUX_WENB[93]; + assign SPLIT_WENB[94]=BMUX_WENB[94]; + assign SPLIT_WENB[95]=BMUX_WENB[95]; + assign SPLIT_WENB[96]=BMUX_WENB[96]; + assign SPLIT_WENB[97]=BMUX_WENB[97]; + assign SPLIT_WENB[98]=BMUX_WENB[98]; + assign SPLIT_WENB[99]=BMUX_WENB[99]; + assign SPLIT_WENB[100]=BMUX_WENB[100]; + assign SPLIT_WENB[101]=BMUX_WENB[101]; + assign SPLIT_WENB[102]=BMUX_WENB[102]; + assign SPLIT_WENB[103]=BMUX_WENB[103]; + assign SPLIT_WENB[104]=BMUX_WENB[104]; + assign SPLIT_WENB[105]=BMUX_WENB[105]; + assign SPLIT_WENB[106]=BMUX_WENB[106]; + assign SPLIT_WENB[107]=BMUX_WENB[107]; + assign SPLIT_WENB[108]=BMUX_WENB[108]; + assign SPLIT_WENB[109]=BMUX_WENB[109]; + assign SPLIT_WENB[110]=BMUX_WENB[110]; + assign SPLIT_WENB[111]=BMUX_WENB[111]; + assign SPLIT_WENB[112]=BMUX_WENB[112]; + assign SPLIT_WENB[113]=BMUX_WENB[113]; + assign SPLIT_WENB[114]=BMUX_WENB[114]; + assign SPLIT_WENB[115]=BMUX_WENB[115]; + assign SPLIT_WENB[116]=BMUX_WENB[116]; + assign SPLIT_WENB[117]=BMUX_WENB[117]; + assign SPLIT_WENB[118]=BMUX_WENB[118]; + assign SPLIT_WENB[119]=BMUX_WENB[119]; + assign SPLIT_WENB[120]=BMUX_WENB[120]; + assign SPLIT_WENB[121]=BMUX_WENB[121]; + assign SPLIT_WENB[122]=BMUX_WENB[122]; + assign SPLIT_WENB[123]=BMUX_WENB[123]; + assign SPLIT_WENB[124]=BMUX_WENB[124]; + assign SPLIT_WENB[125]=BMUX_WENB[125]; + assign SPLIT_WENB[126]=BMUX_WENB[126]; + assign SPLIT_WENB[127]=BMUX_WENB[127]; + wire NOT_CENB; + not (NOT_CENB, BMUX_CENB); + wire NOT_DFTRAMBYP; + not (NOT_DFTRAMBYP, DFTRAMBYP); + wire [127:0] WRITEB; + wire [127: 0] NOT_SPLIT_WENB; + not (NOT_SPLIT_WENB[0], SPLIT_WENB[0]); + not (NOT_SPLIT_WENB[1], SPLIT_WENB[1]); + not (NOT_SPLIT_WENB[2], SPLIT_WENB[2]); + not (NOT_SPLIT_WENB[3], SPLIT_WENB[3]); + not (NOT_SPLIT_WENB[4], SPLIT_WENB[4]); + not (NOT_SPLIT_WENB[5], SPLIT_WENB[5]); + not (NOT_SPLIT_WENB[6], SPLIT_WENB[6]); + not (NOT_SPLIT_WENB[7], SPLIT_WENB[7]); + not (NOT_SPLIT_WENB[8], SPLIT_WENB[8]); + not (NOT_SPLIT_WENB[9], SPLIT_WENB[9]); + not (NOT_SPLIT_WENB[10], SPLIT_WENB[10]); + not (NOT_SPLIT_WENB[11], SPLIT_WENB[11]); + not (NOT_SPLIT_WENB[12], SPLIT_WENB[12]); + not (NOT_SPLIT_WENB[13], SPLIT_WENB[13]); + not (NOT_SPLIT_WENB[14], SPLIT_WENB[14]); + not (NOT_SPLIT_WENB[15], SPLIT_WENB[15]); + not (NOT_SPLIT_WENB[16], SPLIT_WENB[16]); + not (NOT_SPLIT_WENB[17], SPLIT_WENB[17]); + not (NOT_SPLIT_WENB[18], SPLIT_WENB[18]); + not (NOT_SPLIT_WENB[19], SPLIT_WENB[19]); + not (NOT_SPLIT_WENB[20], SPLIT_WENB[20]); + not (NOT_SPLIT_WENB[21], SPLIT_WENB[21]); + not (NOT_SPLIT_WENB[22], SPLIT_WENB[22]); + not (NOT_SPLIT_WENB[23], SPLIT_WENB[23]); + not (NOT_SPLIT_WENB[24], SPLIT_WENB[24]); + not (NOT_SPLIT_WENB[25], SPLIT_WENB[25]); + not (NOT_SPLIT_WENB[26], SPLIT_WENB[26]); + not (NOT_SPLIT_WENB[27], SPLIT_WENB[27]); + not (NOT_SPLIT_WENB[28], SPLIT_WENB[28]); + not (NOT_SPLIT_WENB[29], SPLIT_WENB[29]); + not (NOT_SPLIT_WENB[30], SPLIT_WENB[30]); + not (NOT_SPLIT_WENB[31], SPLIT_WENB[31]); + not (NOT_SPLIT_WENB[32], SPLIT_WENB[32]); + not (NOT_SPLIT_WENB[33], SPLIT_WENB[33]); + not (NOT_SPLIT_WENB[34], SPLIT_WENB[34]); + not (NOT_SPLIT_WENB[35], SPLIT_WENB[35]); + not (NOT_SPLIT_WENB[36], SPLIT_WENB[36]); + not (NOT_SPLIT_WENB[37], SPLIT_WENB[37]); + not (NOT_SPLIT_WENB[38], SPLIT_WENB[38]); + not (NOT_SPLIT_WENB[39], SPLIT_WENB[39]); + not (NOT_SPLIT_WENB[40], SPLIT_WENB[40]); + not (NOT_SPLIT_WENB[41], SPLIT_WENB[41]); + not (NOT_SPLIT_WENB[42], SPLIT_WENB[42]); + not (NOT_SPLIT_WENB[43], SPLIT_WENB[43]); + not (NOT_SPLIT_WENB[44], SPLIT_WENB[44]); + not (NOT_SPLIT_WENB[45], SPLIT_WENB[45]); + not (NOT_SPLIT_WENB[46], SPLIT_WENB[46]); + not (NOT_SPLIT_WENB[47], SPLIT_WENB[47]); + not (NOT_SPLIT_WENB[48], SPLIT_WENB[48]); + not (NOT_SPLIT_WENB[49], SPLIT_WENB[49]); + not (NOT_SPLIT_WENB[50], SPLIT_WENB[50]); + not (NOT_SPLIT_WENB[51], SPLIT_WENB[51]); + not (NOT_SPLIT_WENB[52], SPLIT_WENB[52]); + not (NOT_SPLIT_WENB[53], SPLIT_WENB[53]); + not (NOT_SPLIT_WENB[54], SPLIT_WENB[54]); + not (NOT_SPLIT_WENB[55], SPLIT_WENB[55]); + not (NOT_SPLIT_WENB[56], SPLIT_WENB[56]); + not (NOT_SPLIT_WENB[57], SPLIT_WENB[57]); + not (NOT_SPLIT_WENB[58], SPLIT_WENB[58]); + not (NOT_SPLIT_WENB[59], SPLIT_WENB[59]); + not (NOT_SPLIT_WENB[60], SPLIT_WENB[60]); + not (NOT_SPLIT_WENB[61], SPLIT_WENB[61]); + not (NOT_SPLIT_WENB[62], SPLIT_WENB[62]); + not (NOT_SPLIT_WENB[63], SPLIT_WENB[63]); + not (NOT_SPLIT_WENB[64], SPLIT_WENB[64]); + not (NOT_SPLIT_WENB[65], SPLIT_WENB[65]); + not (NOT_SPLIT_WENB[66], SPLIT_WENB[66]); + not (NOT_SPLIT_WENB[67], SPLIT_WENB[67]); + not (NOT_SPLIT_WENB[68], SPLIT_WENB[68]); + not (NOT_SPLIT_WENB[69], SPLIT_WENB[69]); + not (NOT_SPLIT_WENB[70], SPLIT_WENB[70]); + not (NOT_SPLIT_WENB[71], SPLIT_WENB[71]); + not (NOT_SPLIT_WENB[72], SPLIT_WENB[72]); + not (NOT_SPLIT_WENB[73], SPLIT_WENB[73]); + not (NOT_SPLIT_WENB[74], SPLIT_WENB[74]); + not (NOT_SPLIT_WENB[75], SPLIT_WENB[75]); + not (NOT_SPLIT_WENB[76], SPLIT_WENB[76]); + not (NOT_SPLIT_WENB[77], SPLIT_WENB[77]); + not (NOT_SPLIT_WENB[78], SPLIT_WENB[78]); + not (NOT_SPLIT_WENB[79], SPLIT_WENB[79]); + not (NOT_SPLIT_WENB[80], SPLIT_WENB[80]); + not (NOT_SPLIT_WENB[81], SPLIT_WENB[81]); + not (NOT_SPLIT_WENB[82], SPLIT_WENB[82]); + not (NOT_SPLIT_WENB[83], SPLIT_WENB[83]); + not (NOT_SPLIT_WENB[84], SPLIT_WENB[84]); + not (NOT_SPLIT_WENB[85], SPLIT_WENB[85]); + not (NOT_SPLIT_WENB[86], SPLIT_WENB[86]); + not (NOT_SPLIT_WENB[87], SPLIT_WENB[87]); + not (NOT_SPLIT_WENB[88], SPLIT_WENB[88]); + not (NOT_SPLIT_WENB[89], SPLIT_WENB[89]); + not (NOT_SPLIT_WENB[90], SPLIT_WENB[90]); + not (NOT_SPLIT_WENB[91], SPLIT_WENB[91]); + not (NOT_SPLIT_WENB[92], SPLIT_WENB[92]); + not (NOT_SPLIT_WENB[93], SPLIT_WENB[93]); + not (NOT_SPLIT_WENB[94], SPLIT_WENB[94]); + not (NOT_SPLIT_WENB[95], SPLIT_WENB[95]); + not (NOT_SPLIT_WENB[96], SPLIT_WENB[96]); + not (NOT_SPLIT_WENB[97], SPLIT_WENB[97]); + not (NOT_SPLIT_WENB[98], SPLIT_WENB[98]); + not (NOT_SPLIT_WENB[99], SPLIT_WENB[99]); + not (NOT_SPLIT_WENB[100], SPLIT_WENB[100]); + not (NOT_SPLIT_WENB[101], SPLIT_WENB[101]); + not (NOT_SPLIT_WENB[102], SPLIT_WENB[102]); + not (NOT_SPLIT_WENB[103], SPLIT_WENB[103]); + not (NOT_SPLIT_WENB[104], SPLIT_WENB[104]); + not (NOT_SPLIT_WENB[105], SPLIT_WENB[105]); + not (NOT_SPLIT_WENB[106], SPLIT_WENB[106]); + not (NOT_SPLIT_WENB[107], SPLIT_WENB[107]); + not (NOT_SPLIT_WENB[108], SPLIT_WENB[108]); + not (NOT_SPLIT_WENB[109], SPLIT_WENB[109]); + not (NOT_SPLIT_WENB[110], SPLIT_WENB[110]); + not (NOT_SPLIT_WENB[111], SPLIT_WENB[111]); + not (NOT_SPLIT_WENB[112], SPLIT_WENB[112]); + not (NOT_SPLIT_WENB[113], SPLIT_WENB[113]); + not (NOT_SPLIT_WENB[114], SPLIT_WENB[114]); + not (NOT_SPLIT_WENB[115], SPLIT_WENB[115]); + not (NOT_SPLIT_WENB[116], SPLIT_WENB[116]); + not (NOT_SPLIT_WENB[117], SPLIT_WENB[117]); + not (NOT_SPLIT_WENB[118], SPLIT_WENB[118]); + not (NOT_SPLIT_WENB[119], SPLIT_WENB[119]); + not (NOT_SPLIT_WENB[120], SPLIT_WENB[120]); + not (NOT_SPLIT_WENB[121], SPLIT_WENB[121]); + not (NOT_SPLIT_WENB[122], SPLIT_WENB[122]); + not (NOT_SPLIT_WENB[123], SPLIT_WENB[123]); + not (NOT_SPLIT_WENB[124], SPLIT_WENB[124]); + not (NOT_SPLIT_WENB[125], SPLIT_WENB[125]); + not (NOT_SPLIT_WENB[126], SPLIT_WENB[126]); + not (NOT_SPLIT_WENB[127], SPLIT_WENB[127]); + and (WRITEB[0], NOT_DFTRAMBYP, NOT_SPLIT_WENB[0], NOT_CENB); + and (WRITEB[1], NOT_DFTRAMBYP, NOT_SPLIT_WENB[1], NOT_CENB); + and (WRITEB[2], NOT_DFTRAMBYP, NOT_SPLIT_WENB[2], NOT_CENB); + and (WRITEB[3], NOT_DFTRAMBYP, NOT_SPLIT_WENB[3], NOT_CENB); + and (WRITEB[4], NOT_DFTRAMBYP, NOT_SPLIT_WENB[4], NOT_CENB); + and (WRITEB[5], NOT_DFTRAMBYP, NOT_SPLIT_WENB[5], NOT_CENB); + and (WRITEB[6], NOT_DFTRAMBYP, NOT_SPLIT_WENB[6], NOT_CENB); + and (WRITEB[7], NOT_DFTRAMBYP, NOT_SPLIT_WENB[7], NOT_CENB); + and (WRITEB[8], NOT_DFTRAMBYP, NOT_SPLIT_WENB[8], NOT_CENB); + and (WRITEB[9], NOT_DFTRAMBYP, NOT_SPLIT_WENB[9], NOT_CENB); + and (WRITEB[10], NOT_DFTRAMBYP, NOT_SPLIT_WENB[10], NOT_CENB); + and (WRITEB[11], NOT_DFTRAMBYP, NOT_SPLIT_WENB[11], NOT_CENB); + and (WRITEB[12], NOT_DFTRAMBYP, NOT_SPLIT_WENB[12], NOT_CENB); + and (WRITEB[13], NOT_DFTRAMBYP, NOT_SPLIT_WENB[13], NOT_CENB); + and (WRITEB[14], NOT_DFTRAMBYP, NOT_SPLIT_WENB[14], NOT_CENB); + and (WRITEB[15], NOT_DFTRAMBYP, NOT_SPLIT_WENB[15], NOT_CENB); + and (WRITEB[16], NOT_DFTRAMBYP, NOT_SPLIT_WENB[16], NOT_CENB); + and (WRITEB[17], NOT_DFTRAMBYP, NOT_SPLIT_WENB[17], NOT_CENB); + and (WRITEB[18], NOT_DFTRAMBYP, NOT_SPLIT_WENB[18], NOT_CENB); + and (WRITEB[19], NOT_DFTRAMBYP, NOT_SPLIT_WENB[19], NOT_CENB); + and (WRITEB[20], NOT_DFTRAMBYP, NOT_SPLIT_WENB[20], NOT_CENB); + and (WRITEB[21], NOT_DFTRAMBYP, NOT_SPLIT_WENB[21], NOT_CENB); + and (WRITEB[22], NOT_DFTRAMBYP, NOT_SPLIT_WENB[22], NOT_CENB); + and (WRITEB[23], NOT_DFTRAMBYP, NOT_SPLIT_WENB[23], NOT_CENB); + and (WRITEB[24], NOT_DFTRAMBYP, NOT_SPLIT_WENB[24], NOT_CENB); + and (WRITEB[25], NOT_DFTRAMBYP, NOT_SPLIT_WENB[25], NOT_CENB); + and (WRITEB[26], NOT_DFTRAMBYP, NOT_SPLIT_WENB[26], NOT_CENB); + and (WRITEB[27], NOT_DFTRAMBYP, NOT_SPLIT_WENB[27], NOT_CENB); + and (WRITEB[28], NOT_DFTRAMBYP, NOT_SPLIT_WENB[28], NOT_CENB); + and (WRITEB[29], NOT_DFTRAMBYP, NOT_SPLIT_WENB[29], NOT_CENB); + and (WRITEB[30], NOT_DFTRAMBYP, NOT_SPLIT_WENB[30], NOT_CENB); + and (WRITEB[31], NOT_DFTRAMBYP, NOT_SPLIT_WENB[31], NOT_CENB); + and (WRITEB[32], NOT_DFTRAMBYP, NOT_SPLIT_WENB[32], NOT_CENB); + and (WRITEB[33], NOT_DFTRAMBYP, NOT_SPLIT_WENB[33], NOT_CENB); + and (WRITEB[34], NOT_DFTRAMBYP, NOT_SPLIT_WENB[34], NOT_CENB); + and (WRITEB[35], NOT_DFTRAMBYP, NOT_SPLIT_WENB[35], NOT_CENB); + and (WRITEB[36], NOT_DFTRAMBYP, NOT_SPLIT_WENB[36], NOT_CENB); + and (WRITEB[37], NOT_DFTRAMBYP, NOT_SPLIT_WENB[37], NOT_CENB); + and (WRITEB[38], NOT_DFTRAMBYP, NOT_SPLIT_WENB[38], NOT_CENB); + and (WRITEB[39], NOT_DFTRAMBYP, NOT_SPLIT_WENB[39], NOT_CENB); + and (WRITEB[40], NOT_DFTRAMBYP, NOT_SPLIT_WENB[40], NOT_CENB); + and (WRITEB[41], NOT_DFTRAMBYP, NOT_SPLIT_WENB[41], NOT_CENB); + and (WRITEB[42], NOT_DFTRAMBYP, NOT_SPLIT_WENB[42], NOT_CENB); + and (WRITEB[43], NOT_DFTRAMBYP, NOT_SPLIT_WENB[43], NOT_CENB); + and (WRITEB[44], NOT_DFTRAMBYP, NOT_SPLIT_WENB[44], NOT_CENB); + and (WRITEB[45], NOT_DFTRAMBYP, NOT_SPLIT_WENB[45], NOT_CENB); + and (WRITEB[46], NOT_DFTRAMBYP, NOT_SPLIT_WENB[46], NOT_CENB); + and (WRITEB[47], NOT_DFTRAMBYP, NOT_SPLIT_WENB[47], NOT_CENB); + and (WRITEB[48], NOT_DFTRAMBYP, NOT_SPLIT_WENB[48], NOT_CENB); + and (WRITEB[49], NOT_DFTRAMBYP, NOT_SPLIT_WENB[49], NOT_CENB); + and (WRITEB[50], NOT_DFTRAMBYP, NOT_SPLIT_WENB[50], NOT_CENB); + and (WRITEB[51], NOT_DFTRAMBYP, NOT_SPLIT_WENB[51], NOT_CENB); + and (WRITEB[52], NOT_DFTRAMBYP, NOT_SPLIT_WENB[52], NOT_CENB); + and (WRITEB[53], NOT_DFTRAMBYP, NOT_SPLIT_WENB[53], NOT_CENB); + and (WRITEB[54], NOT_DFTRAMBYP, NOT_SPLIT_WENB[54], NOT_CENB); + and (WRITEB[55], NOT_DFTRAMBYP, NOT_SPLIT_WENB[55], NOT_CENB); + and (WRITEB[56], NOT_DFTRAMBYP, NOT_SPLIT_WENB[56], NOT_CENB); + and (WRITEB[57], NOT_DFTRAMBYP, NOT_SPLIT_WENB[57], NOT_CENB); + and (WRITEB[58], NOT_DFTRAMBYP, NOT_SPLIT_WENB[58], NOT_CENB); + and (WRITEB[59], NOT_DFTRAMBYP, NOT_SPLIT_WENB[59], NOT_CENB); + and (WRITEB[60], NOT_DFTRAMBYP, NOT_SPLIT_WENB[60], NOT_CENB); + and (WRITEB[61], NOT_DFTRAMBYP, NOT_SPLIT_WENB[61], NOT_CENB); + and (WRITEB[62], NOT_DFTRAMBYP, NOT_SPLIT_WENB[62], NOT_CENB); + and (WRITEB[63], NOT_DFTRAMBYP, NOT_SPLIT_WENB[63], NOT_CENB); + and (WRITEB[64], NOT_DFTRAMBYP, NOT_SPLIT_WENB[64], NOT_CENB); + and (WRITEB[65], NOT_DFTRAMBYP, NOT_SPLIT_WENB[65], NOT_CENB); + and (WRITEB[66], NOT_DFTRAMBYP, NOT_SPLIT_WENB[66], NOT_CENB); + and (WRITEB[67], NOT_DFTRAMBYP, NOT_SPLIT_WENB[67], NOT_CENB); + and (WRITEB[68], NOT_DFTRAMBYP, NOT_SPLIT_WENB[68], NOT_CENB); + and (WRITEB[69], NOT_DFTRAMBYP, NOT_SPLIT_WENB[69], NOT_CENB); + and (WRITEB[70], NOT_DFTRAMBYP, NOT_SPLIT_WENB[70], NOT_CENB); + and (WRITEB[71], NOT_DFTRAMBYP, NOT_SPLIT_WENB[71], NOT_CENB); + and (WRITEB[72], NOT_DFTRAMBYP, NOT_SPLIT_WENB[72], NOT_CENB); + and (WRITEB[73], NOT_DFTRAMBYP, NOT_SPLIT_WENB[73], NOT_CENB); + and (WRITEB[74], NOT_DFTRAMBYP, NOT_SPLIT_WENB[74], NOT_CENB); + and (WRITEB[75], NOT_DFTRAMBYP, NOT_SPLIT_WENB[75], NOT_CENB); + and (WRITEB[76], NOT_DFTRAMBYP, NOT_SPLIT_WENB[76], NOT_CENB); + and (WRITEB[77], NOT_DFTRAMBYP, NOT_SPLIT_WENB[77], NOT_CENB); + and (WRITEB[78], NOT_DFTRAMBYP, NOT_SPLIT_WENB[78], NOT_CENB); + and (WRITEB[79], NOT_DFTRAMBYP, NOT_SPLIT_WENB[79], NOT_CENB); + and (WRITEB[80], NOT_DFTRAMBYP, NOT_SPLIT_WENB[80], NOT_CENB); + and (WRITEB[81], NOT_DFTRAMBYP, NOT_SPLIT_WENB[81], NOT_CENB); + and (WRITEB[82], NOT_DFTRAMBYP, NOT_SPLIT_WENB[82], NOT_CENB); + and (WRITEB[83], NOT_DFTRAMBYP, NOT_SPLIT_WENB[83], NOT_CENB); + and (WRITEB[84], NOT_DFTRAMBYP, NOT_SPLIT_WENB[84], NOT_CENB); + and (WRITEB[85], NOT_DFTRAMBYP, NOT_SPLIT_WENB[85], NOT_CENB); + and (WRITEB[86], NOT_DFTRAMBYP, NOT_SPLIT_WENB[86], NOT_CENB); + and (WRITEB[87], NOT_DFTRAMBYP, NOT_SPLIT_WENB[87], NOT_CENB); + and (WRITEB[88], NOT_DFTRAMBYP, NOT_SPLIT_WENB[88], NOT_CENB); + and (WRITEB[89], NOT_DFTRAMBYP, NOT_SPLIT_WENB[89], NOT_CENB); + and (WRITEB[90], NOT_DFTRAMBYP, NOT_SPLIT_WENB[90], NOT_CENB); + and (WRITEB[91], NOT_DFTRAMBYP, NOT_SPLIT_WENB[91], NOT_CENB); + and (WRITEB[92], NOT_DFTRAMBYP, NOT_SPLIT_WENB[92], NOT_CENB); + and (WRITEB[93], NOT_DFTRAMBYP, NOT_SPLIT_WENB[93], NOT_CENB); + and (WRITEB[94], NOT_DFTRAMBYP, NOT_SPLIT_WENB[94], NOT_CENB); + and (WRITEB[95], NOT_DFTRAMBYP, NOT_SPLIT_WENB[95], NOT_CENB); + and (WRITEB[96], NOT_DFTRAMBYP, NOT_SPLIT_WENB[96], NOT_CENB); + and (WRITEB[97], NOT_DFTRAMBYP, NOT_SPLIT_WENB[97], NOT_CENB); + and (WRITEB[98], NOT_DFTRAMBYP, NOT_SPLIT_WENB[98], NOT_CENB); + and (WRITEB[99], NOT_DFTRAMBYP, NOT_SPLIT_WENB[99], NOT_CENB); + and (WRITEB[100], NOT_DFTRAMBYP, NOT_SPLIT_WENB[100], NOT_CENB); + and (WRITEB[101], NOT_DFTRAMBYP, NOT_SPLIT_WENB[101], NOT_CENB); + and (WRITEB[102], NOT_DFTRAMBYP, NOT_SPLIT_WENB[102], NOT_CENB); + and (WRITEB[103], NOT_DFTRAMBYP, NOT_SPLIT_WENB[103], NOT_CENB); + and (WRITEB[104], NOT_DFTRAMBYP, NOT_SPLIT_WENB[104], NOT_CENB); + and (WRITEB[105], NOT_DFTRAMBYP, NOT_SPLIT_WENB[105], NOT_CENB); + and (WRITEB[106], NOT_DFTRAMBYP, NOT_SPLIT_WENB[106], NOT_CENB); + and (WRITEB[107], NOT_DFTRAMBYP, NOT_SPLIT_WENB[107], NOT_CENB); + and (WRITEB[108], NOT_DFTRAMBYP, NOT_SPLIT_WENB[108], NOT_CENB); + and (WRITEB[109], NOT_DFTRAMBYP, NOT_SPLIT_WENB[109], NOT_CENB); + and (WRITEB[110], NOT_DFTRAMBYP, NOT_SPLIT_WENB[110], NOT_CENB); + and (WRITEB[111], NOT_DFTRAMBYP, NOT_SPLIT_WENB[111], NOT_CENB); + and (WRITEB[112], NOT_DFTRAMBYP, NOT_SPLIT_WENB[112], NOT_CENB); + and (WRITEB[113], NOT_DFTRAMBYP, NOT_SPLIT_WENB[113], NOT_CENB); + and (WRITEB[114], NOT_DFTRAMBYP, NOT_SPLIT_WENB[114], NOT_CENB); + and (WRITEB[115], NOT_DFTRAMBYP, NOT_SPLIT_WENB[115], NOT_CENB); + and (WRITEB[116], NOT_DFTRAMBYP, NOT_SPLIT_WENB[116], NOT_CENB); + and (WRITEB[117], NOT_DFTRAMBYP, NOT_SPLIT_WENB[117], NOT_CENB); + and (WRITEB[118], NOT_DFTRAMBYP, NOT_SPLIT_WENB[118], NOT_CENB); + and (WRITEB[119], NOT_DFTRAMBYP, NOT_SPLIT_WENB[119], NOT_CENB); + and (WRITEB[120], NOT_DFTRAMBYP, NOT_SPLIT_WENB[120], NOT_CENB); + and (WRITEB[121], NOT_DFTRAMBYP, NOT_SPLIT_WENB[121], NOT_CENB); + and (WRITEB[122], NOT_DFTRAMBYP, NOT_SPLIT_WENB[122], NOT_CENB); + and (WRITEB[123], NOT_DFTRAMBYP, NOT_SPLIT_WENB[123], NOT_CENB); + and (WRITEB[124], NOT_DFTRAMBYP, NOT_SPLIT_WENB[124], NOT_CENB); + and (WRITEB[125], NOT_DFTRAMBYP, NOT_SPLIT_WENB[125], NOT_CENB); + and (WRITEB[126], NOT_DFTRAMBYP, NOT_SPLIT_WENB[126], NOT_CENB); + and (WRITEB[127], NOT_DFTRAMBYP, NOT_SPLIT_WENB[127], NOT_CENB); + rf2_32x128_wm1_bitcell memB0 (.CLK(CLKB), .WRITE(WRITEB[0]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[0]), .Xout(XoutBiff), .Q(INT_QA[0])); + rf2_32x128_wm1_bitcell memB1 (.CLK(CLKB), .WRITE(WRITEB[1]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[1]), .Xout(XoutBiff), .Q(INT_QA[1])); + rf2_32x128_wm1_bitcell memB2 (.CLK(CLKB), .WRITE(WRITEB[2]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[2]), .Xout(XoutBiff), .Q(INT_QA[2])); + rf2_32x128_wm1_bitcell memB3 (.CLK(CLKB), .WRITE(WRITEB[3]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[3]), .Xout(XoutBiff), .Q(INT_QA[3])); + rf2_32x128_wm1_bitcell memB4 (.CLK(CLKB), .WRITE(WRITEB[4]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[4]), .Xout(XoutBiff), .Q(INT_QA[4])); + rf2_32x128_wm1_bitcell memB5 (.CLK(CLKB), .WRITE(WRITEB[5]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[5]), .Xout(XoutBiff), .Q(INT_QA[5])); + rf2_32x128_wm1_bitcell memB6 (.CLK(CLKB), .WRITE(WRITEB[6]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[6]), .Xout(XoutBiff), .Q(INT_QA[6])); + rf2_32x128_wm1_bitcell memB7 (.CLK(CLKB), .WRITE(WRITEB[7]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[7]), .Xout(XoutBiff), .Q(INT_QA[7])); + rf2_32x128_wm1_bitcell memB8 (.CLK(CLKB), .WRITE(WRITEB[8]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[8]), .Xout(XoutBiff), .Q(INT_QA[8])); + rf2_32x128_wm1_bitcell memB9 (.CLK(CLKB), .WRITE(WRITEB[9]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[9]), .Xout(XoutBiff), .Q(INT_QA[9])); + rf2_32x128_wm1_bitcell memB10 (.CLK(CLKB), .WRITE(WRITEB[10]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[10]), .Xout(XoutBiff), .Q(INT_QA[10])); + rf2_32x128_wm1_bitcell memB11 (.CLK(CLKB), .WRITE(WRITEB[11]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[11]), .Xout(XoutBiff), .Q(INT_QA[11])); + rf2_32x128_wm1_bitcell memB12 (.CLK(CLKB), .WRITE(WRITEB[12]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[12]), .Xout(XoutBiff), .Q(INT_QA[12])); + rf2_32x128_wm1_bitcell memB13 (.CLK(CLKB), .WRITE(WRITEB[13]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[13]), .Xout(XoutBiff), .Q(INT_QA[13])); + rf2_32x128_wm1_bitcell memB14 (.CLK(CLKB), .WRITE(WRITEB[14]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[14]), .Xout(XoutBiff), .Q(INT_QA[14])); + rf2_32x128_wm1_bitcell memB15 (.CLK(CLKB), .WRITE(WRITEB[15]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[15]), .Xout(XoutBiff), .Q(INT_QA[15])); + rf2_32x128_wm1_bitcell memB16 (.CLK(CLKB), .WRITE(WRITEB[16]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[16]), .Xout(XoutBiff), .Q(INT_QA[16])); + rf2_32x128_wm1_bitcell memB17 (.CLK(CLKB), .WRITE(WRITEB[17]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[17]), .Xout(XoutBiff), .Q(INT_QA[17])); + rf2_32x128_wm1_bitcell memB18 (.CLK(CLKB), .WRITE(WRITEB[18]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[18]), .Xout(XoutBiff), .Q(INT_QA[18])); + rf2_32x128_wm1_bitcell memB19 (.CLK(CLKB), .WRITE(WRITEB[19]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[19]), .Xout(XoutBiff), .Q(INT_QA[19])); + rf2_32x128_wm1_bitcell memB20 (.CLK(CLKB), .WRITE(WRITEB[20]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[20]), .Xout(XoutBiff), .Q(INT_QA[20])); + rf2_32x128_wm1_bitcell memB21 (.CLK(CLKB), .WRITE(WRITEB[21]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[21]), .Xout(XoutBiff), .Q(INT_QA[21])); + rf2_32x128_wm1_bitcell memB22 (.CLK(CLKB), .WRITE(WRITEB[22]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[22]), .Xout(XoutBiff), .Q(INT_QA[22])); + rf2_32x128_wm1_bitcell memB23 (.CLK(CLKB), .WRITE(WRITEB[23]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[23]), .Xout(XoutBiff), .Q(INT_QA[23])); + rf2_32x128_wm1_bitcell memB24 (.CLK(CLKB), .WRITE(WRITEB[24]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[24]), .Xout(XoutBiff), .Q(INT_QA[24])); + rf2_32x128_wm1_bitcell memB25 (.CLK(CLKB), .WRITE(WRITEB[25]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[25]), .Xout(XoutBiff), .Q(INT_QA[25])); + rf2_32x128_wm1_bitcell memB26 (.CLK(CLKB), .WRITE(WRITEB[26]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[26]), .Xout(XoutBiff), .Q(INT_QA[26])); + rf2_32x128_wm1_bitcell memB27 (.CLK(CLKB), .WRITE(WRITEB[27]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[27]), .Xout(XoutBiff), .Q(INT_QA[27])); + rf2_32x128_wm1_bitcell memB28 (.CLK(CLKB), .WRITE(WRITEB[28]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[28]), .Xout(XoutBiff), .Q(INT_QA[28])); + rf2_32x128_wm1_bitcell memB29 (.CLK(CLKB), .WRITE(WRITEB[29]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[29]), .Xout(XoutBiff), .Q(INT_QA[29])); + rf2_32x128_wm1_bitcell memB30 (.CLK(CLKB), .WRITE(WRITEB[30]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[30]), .Xout(XoutBiff), .Q(INT_QA[30])); + rf2_32x128_wm1_bitcell memB31 (.CLK(CLKB), .WRITE(WRITEB[31]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[31]), .Xout(XoutBiff), .Q(INT_QA[31])); + rf2_32x128_wm1_bitcell memB32 (.CLK(CLKB), .WRITE(WRITEB[32]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[32]), .Xout(XoutBiff), .Q(INT_QA[32])); + rf2_32x128_wm1_bitcell memB33 (.CLK(CLKB), .WRITE(WRITEB[33]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[33]), .Xout(XoutBiff), .Q(INT_QA[33])); + rf2_32x128_wm1_bitcell memB34 (.CLK(CLKB), .WRITE(WRITEB[34]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[34]), .Xout(XoutBiff), .Q(INT_QA[34])); + rf2_32x128_wm1_bitcell memB35 (.CLK(CLKB), .WRITE(WRITEB[35]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[35]), .Xout(XoutBiff), .Q(INT_QA[35])); + rf2_32x128_wm1_bitcell memB36 (.CLK(CLKB), .WRITE(WRITEB[36]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[36]), .Xout(XoutBiff), .Q(INT_QA[36])); + rf2_32x128_wm1_bitcell memB37 (.CLK(CLKB), .WRITE(WRITEB[37]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[37]), .Xout(XoutBiff), .Q(INT_QA[37])); + rf2_32x128_wm1_bitcell memB38 (.CLK(CLKB), .WRITE(WRITEB[38]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[38]), .Xout(XoutBiff), .Q(INT_QA[38])); + rf2_32x128_wm1_bitcell memB39 (.CLK(CLKB), .WRITE(WRITEB[39]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[39]), .Xout(XoutBiff), .Q(INT_QA[39])); + rf2_32x128_wm1_bitcell memB40 (.CLK(CLKB), .WRITE(WRITEB[40]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[40]), .Xout(XoutBiff), .Q(INT_QA[40])); + rf2_32x128_wm1_bitcell memB41 (.CLK(CLKB), .WRITE(WRITEB[41]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[41]), .Xout(XoutBiff), .Q(INT_QA[41])); + rf2_32x128_wm1_bitcell memB42 (.CLK(CLKB), .WRITE(WRITEB[42]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[42]), .Xout(XoutBiff), .Q(INT_QA[42])); + rf2_32x128_wm1_bitcell memB43 (.CLK(CLKB), .WRITE(WRITEB[43]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[43]), .Xout(XoutBiff), .Q(INT_QA[43])); + rf2_32x128_wm1_bitcell memB44 (.CLK(CLKB), .WRITE(WRITEB[44]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[44]), .Xout(XoutBiff), .Q(INT_QA[44])); + rf2_32x128_wm1_bitcell memB45 (.CLK(CLKB), .WRITE(WRITEB[45]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[45]), .Xout(XoutBiff), .Q(INT_QA[45])); + rf2_32x128_wm1_bitcell memB46 (.CLK(CLKB), .WRITE(WRITEB[46]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[46]), .Xout(XoutBiff), .Q(INT_QA[46])); + rf2_32x128_wm1_bitcell memB47 (.CLK(CLKB), .WRITE(WRITEB[47]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[47]), .Xout(XoutBiff), .Q(INT_QA[47])); + rf2_32x128_wm1_bitcell memB48 (.CLK(CLKB), .WRITE(WRITEB[48]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[48]), .Xout(XoutBiff), .Q(INT_QA[48])); + rf2_32x128_wm1_bitcell memB49 (.CLK(CLKB), .WRITE(WRITEB[49]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[49]), .Xout(XoutBiff), .Q(INT_QA[49])); + rf2_32x128_wm1_bitcell memB50 (.CLK(CLKB), .WRITE(WRITEB[50]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[50]), .Xout(XoutBiff), .Q(INT_QA[50])); + rf2_32x128_wm1_bitcell memB51 (.CLK(CLKB), .WRITE(WRITEB[51]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[51]), .Xout(XoutBiff), .Q(INT_QA[51])); + rf2_32x128_wm1_bitcell memB52 (.CLK(CLKB), .WRITE(WRITEB[52]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[52]), .Xout(XoutBiff), .Q(INT_QA[52])); + rf2_32x128_wm1_bitcell memB53 (.CLK(CLKB), .WRITE(WRITEB[53]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[53]), .Xout(XoutBiff), .Q(INT_QA[53])); + rf2_32x128_wm1_bitcell memB54 (.CLK(CLKB), .WRITE(WRITEB[54]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[54]), .Xout(XoutBiff), .Q(INT_QA[54])); + rf2_32x128_wm1_bitcell memB55 (.CLK(CLKB), .WRITE(WRITEB[55]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[55]), .Xout(XoutBiff), .Q(INT_QA[55])); + rf2_32x128_wm1_bitcell memB56 (.CLK(CLKB), .WRITE(WRITEB[56]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[56]), .Xout(XoutBiff), .Q(INT_QA[56])); + rf2_32x128_wm1_bitcell memB57 (.CLK(CLKB), .WRITE(WRITEB[57]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[57]), .Xout(XoutBiff), .Q(INT_QA[57])); + rf2_32x128_wm1_bitcell memB58 (.CLK(CLKB), .WRITE(WRITEB[58]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[58]), .Xout(XoutBiff), .Q(INT_QA[58])); + rf2_32x128_wm1_bitcell memB59 (.CLK(CLKB), .WRITE(WRITEB[59]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[59]), .Xout(XoutBiff), .Q(INT_QA[59])); + rf2_32x128_wm1_bitcell memB60 (.CLK(CLKB), .WRITE(WRITEB[60]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[60]), .Xout(XoutBiff), .Q(INT_QA[60])); + rf2_32x128_wm1_bitcell memB61 (.CLK(CLKB), .WRITE(WRITEB[61]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[61]), .Xout(XoutBiff), .Q(INT_QA[61])); + rf2_32x128_wm1_bitcell memB62 (.CLK(CLKB), .WRITE(WRITEB[62]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[62]), .Xout(XoutBiff), .Q(INT_QA[62])); + rf2_32x128_wm1_bitcell memB63 (.CLK(CLKB), .WRITE(WRITEB[63]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[63]), .Xout(XoutBiff), .Q(INT_QA[63])); + rf2_32x128_wm1_bitcell memB64 (.CLK(CLKB), .WRITE(WRITEB[64]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[64]), .Xout(XoutBiff), .Q(INT_QA[64])); + rf2_32x128_wm1_bitcell memB65 (.CLK(CLKB), .WRITE(WRITEB[65]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[65]), .Xout(XoutBiff), .Q(INT_QA[65])); + rf2_32x128_wm1_bitcell memB66 (.CLK(CLKB), .WRITE(WRITEB[66]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[66]), .Xout(XoutBiff), .Q(INT_QA[66])); + rf2_32x128_wm1_bitcell memB67 (.CLK(CLKB), .WRITE(WRITEB[67]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[67]), .Xout(XoutBiff), .Q(INT_QA[67])); + rf2_32x128_wm1_bitcell memB68 (.CLK(CLKB), .WRITE(WRITEB[68]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[68]), .Xout(XoutBiff), .Q(INT_QA[68])); + rf2_32x128_wm1_bitcell memB69 (.CLK(CLKB), .WRITE(WRITEB[69]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[69]), .Xout(XoutBiff), .Q(INT_QA[69])); + rf2_32x128_wm1_bitcell memB70 (.CLK(CLKB), .WRITE(WRITEB[70]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[70]), .Xout(XoutBiff), .Q(INT_QA[70])); + rf2_32x128_wm1_bitcell memB71 (.CLK(CLKB), .WRITE(WRITEB[71]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[71]), .Xout(XoutBiff), .Q(INT_QA[71])); + rf2_32x128_wm1_bitcell memB72 (.CLK(CLKB), .WRITE(WRITEB[72]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[72]), .Xout(XoutBiff), .Q(INT_QA[72])); + rf2_32x128_wm1_bitcell memB73 (.CLK(CLKB), .WRITE(WRITEB[73]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[73]), .Xout(XoutBiff), .Q(INT_QA[73])); + rf2_32x128_wm1_bitcell memB74 (.CLK(CLKB), .WRITE(WRITEB[74]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[74]), .Xout(XoutBiff), .Q(INT_QA[74])); + rf2_32x128_wm1_bitcell memB75 (.CLK(CLKB), .WRITE(WRITEB[75]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[75]), .Xout(XoutBiff), .Q(INT_QA[75])); + rf2_32x128_wm1_bitcell memB76 (.CLK(CLKB), .WRITE(WRITEB[76]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[76]), .Xout(XoutBiff), .Q(INT_QA[76])); + rf2_32x128_wm1_bitcell memB77 (.CLK(CLKB), .WRITE(WRITEB[77]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[77]), .Xout(XoutBiff), .Q(INT_QA[77])); + rf2_32x128_wm1_bitcell memB78 (.CLK(CLKB), .WRITE(WRITEB[78]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[78]), .Xout(XoutBiff), .Q(INT_QA[78])); + rf2_32x128_wm1_bitcell memB79 (.CLK(CLKB), .WRITE(WRITEB[79]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[79]), .Xout(XoutBiff), .Q(INT_QA[79])); + rf2_32x128_wm1_bitcell memB80 (.CLK(CLKB), .WRITE(WRITEB[80]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[80]), .Xout(XoutBiff), .Q(INT_QA[80])); + rf2_32x128_wm1_bitcell memB81 (.CLK(CLKB), .WRITE(WRITEB[81]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[81]), .Xout(XoutBiff), .Q(INT_QA[81])); + rf2_32x128_wm1_bitcell memB82 (.CLK(CLKB), .WRITE(WRITEB[82]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[82]), .Xout(XoutBiff), .Q(INT_QA[82])); + rf2_32x128_wm1_bitcell memB83 (.CLK(CLKB), .WRITE(WRITEB[83]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[83]), .Xout(XoutBiff), .Q(INT_QA[83])); + rf2_32x128_wm1_bitcell memB84 (.CLK(CLKB), .WRITE(WRITEB[84]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[84]), .Xout(XoutBiff), .Q(INT_QA[84])); + rf2_32x128_wm1_bitcell memB85 (.CLK(CLKB), .WRITE(WRITEB[85]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[85]), .Xout(XoutBiff), .Q(INT_QA[85])); + rf2_32x128_wm1_bitcell memB86 (.CLK(CLKB), .WRITE(WRITEB[86]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[86]), .Xout(XoutBiff), .Q(INT_QA[86])); + rf2_32x128_wm1_bitcell memB87 (.CLK(CLKB), .WRITE(WRITEB[87]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[87]), .Xout(XoutBiff), .Q(INT_QA[87])); + rf2_32x128_wm1_bitcell memB88 (.CLK(CLKB), .WRITE(WRITEB[88]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[88]), .Xout(XoutBiff), .Q(INT_QA[88])); + rf2_32x128_wm1_bitcell memB89 (.CLK(CLKB), .WRITE(WRITEB[89]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[89]), .Xout(XoutBiff), .Q(INT_QA[89])); + rf2_32x128_wm1_bitcell memB90 (.CLK(CLKB), .WRITE(WRITEB[90]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[90]), .Xout(XoutBiff), .Q(INT_QA[90])); + rf2_32x128_wm1_bitcell memB91 (.CLK(CLKB), .WRITE(WRITEB[91]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[91]), .Xout(XoutBiff), .Q(INT_QA[91])); + rf2_32x128_wm1_bitcell memB92 (.CLK(CLKB), .WRITE(WRITEB[92]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[92]), .Xout(XoutBiff), .Q(INT_QA[92])); + rf2_32x128_wm1_bitcell memB93 (.CLK(CLKB), .WRITE(WRITEB[93]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[93]), .Xout(XoutBiff), .Q(INT_QA[93])); + rf2_32x128_wm1_bitcell memB94 (.CLK(CLKB), .WRITE(WRITEB[94]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[94]), .Xout(XoutBiff), .Q(INT_QA[94])); + rf2_32x128_wm1_bitcell memB95 (.CLK(CLKB), .WRITE(WRITEB[95]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[95]), .Xout(XoutBiff), .Q(INT_QA[95])); + rf2_32x128_wm1_bitcell memB96 (.CLK(CLKB), .WRITE(WRITEB[96]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[96]), .Xout(XoutBiff), .Q(INT_QA[96])); + rf2_32x128_wm1_bitcell memB97 (.CLK(CLKB), .WRITE(WRITEB[97]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[97]), .Xout(XoutBiff), .Q(INT_QA[97])); + rf2_32x128_wm1_bitcell memB98 (.CLK(CLKB), .WRITE(WRITEB[98]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[98]), .Xout(XoutBiff), .Q(INT_QA[98])); + rf2_32x128_wm1_bitcell memB99 (.CLK(CLKB), .WRITE(WRITEB[99]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[99]), .Xout(XoutBiff), .Q(INT_QA[99])); + rf2_32x128_wm1_bitcell memB100 (.CLK(CLKB), .WRITE(WRITEB[100]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[100]), .Xout(XoutBiff), .Q(INT_QA[100])); + rf2_32x128_wm1_bitcell memB101 (.CLK(CLKB), .WRITE(WRITEB[101]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[101]), .Xout(XoutBiff), .Q(INT_QA[101])); + rf2_32x128_wm1_bitcell memB102 (.CLK(CLKB), .WRITE(WRITEB[102]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[102]), .Xout(XoutBiff), .Q(INT_QA[102])); + rf2_32x128_wm1_bitcell memB103 (.CLK(CLKB), .WRITE(WRITEB[103]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[103]), .Xout(XoutBiff), .Q(INT_QA[103])); + rf2_32x128_wm1_bitcell memB104 (.CLK(CLKB), .WRITE(WRITEB[104]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[104]), .Xout(XoutBiff), .Q(INT_QA[104])); + rf2_32x128_wm1_bitcell memB105 (.CLK(CLKB), .WRITE(WRITEB[105]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[105]), .Xout(XoutBiff), .Q(INT_QA[105])); + rf2_32x128_wm1_bitcell memB106 (.CLK(CLKB), .WRITE(WRITEB[106]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[106]), .Xout(XoutBiff), .Q(INT_QA[106])); + rf2_32x128_wm1_bitcell memB107 (.CLK(CLKB), .WRITE(WRITEB[107]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[107]), .Xout(XoutBiff), .Q(INT_QA[107])); + rf2_32x128_wm1_bitcell memB108 (.CLK(CLKB), .WRITE(WRITEB[108]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[108]), .Xout(XoutBiff), .Q(INT_QA[108])); + rf2_32x128_wm1_bitcell memB109 (.CLK(CLKB), .WRITE(WRITEB[109]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[109]), .Xout(XoutBiff), .Q(INT_QA[109])); + rf2_32x128_wm1_bitcell memB110 (.CLK(CLKB), .WRITE(WRITEB[110]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[110]), .Xout(XoutBiff), .Q(INT_QA[110])); + rf2_32x128_wm1_bitcell memB111 (.CLK(CLKB), .WRITE(WRITEB[111]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[111]), .Xout(XoutBiff), .Q(INT_QA[111])); + rf2_32x128_wm1_bitcell memB112 (.CLK(CLKB), .WRITE(WRITEB[112]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[112]), .Xout(XoutBiff), .Q(INT_QA[112])); + rf2_32x128_wm1_bitcell memB113 (.CLK(CLKB), .WRITE(WRITEB[113]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[113]), .Xout(XoutBiff), .Q(INT_QA[113])); + rf2_32x128_wm1_bitcell memB114 (.CLK(CLKB), .WRITE(WRITEB[114]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[114]), .Xout(XoutBiff), .Q(INT_QA[114])); + rf2_32x128_wm1_bitcell memB115 (.CLK(CLKB), .WRITE(WRITEB[115]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[115]), .Xout(XoutBiff), .Q(INT_QA[115])); + rf2_32x128_wm1_bitcell memB116 (.CLK(CLKB), .WRITE(WRITEB[116]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[116]), .Xout(XoutBiff), .Q(INT_QA[116])); + rf2_32x128_wm1_bitcell memB117 (.CLK(CLKB), .WRITE(WRITEB[117]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[117]), .Xout(XoutBiff), .Q(INT_QA[117])); + rf2_32x128_wm1_bitcell memB118 (.CLK(CLKB), .WRITE(WRITEB[118]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[118]), .Xout(XoutBiff), .Q(INT_QA[118])); + rf2_32x128_wm1_bitcell memB119 (.CLK(CLKB), .WRITE(WRITEB[119]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[119]), .Xout(XoutBiff), .Q(INT_QA[119])); + rf2_32x128_wm1_bitcell memB120 (.CLK(CLKB), .WRITE(WRITEB[120]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[120]), .Xout(XoutBiff), .Q(INT_QA[120])); + rf2_32x128_wm1_bitcell memB121 (.CLK(CLKB), .WRITE(WRITEB[121]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[121]), .Xout(XoutBiff), .Q(INT_QA[121])); + rf2_32x128_wm1_bitcell memB122 (.CLK(CLKB), .WRITE(WRITEB[122]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[122]), .Xout(XoutBiff), .Q(INT_QA[122])); + rf2_32x128_wm1_bitcell memB123 (.CLK(CLKB), .WRITE(WRITEB[123]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[123]), .Xout(XoutBiff), .Q(INT_QA[123])); + rf2_32x128_wm1_bitcell memB124 (.CLK(CLKB), .WRITE(WRITEB[124]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[124]), .Xout(XoutBiff), .Q(INT_QA[124])); + rf2_32x128_wm1_bitcell memB125 (.CLK(CLKB), .WRITE(WRITEB[125]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[125]), .Xout(XoutBiff), .Q(INT_QA[125])); + rf2_32x128_wm1_bitcell memB126 (.CLK(CLKB), .WRITE(WRITEB[126]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[126]), .Xout(XoutBiff), .Q(INT_QA[126])); + rf2_32x128_wm1_bitcell memB127 (.CLK(CLKB), .WRITE(WRITEB[127]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[127]), .Xout(XoutBiff), .Q(INT_QA[127])); + xor (x_detection_CENB, BMUX_CENB, BMUX_CENB); + and (acendftB, x_detection_CENB, NOT_DFTRAMBYP); + assign XoutB = (SEB & ~DFTRAMBYP) | acendftB; + wire [127:0] QB_int; + wire [127:0] DB_hold; + _MUX mhB0 (BMUX_CENB, BMUX_DB[0], QB_int[0], DB_hold[0]); + _MUX mhB1 (BMUX_CENB, BMUX_DB[1], QB_int[1], DB_hold[1]); + _MUX mhB2 (BMUX_CENB, BMUX_DB[2], QB_int[2], DB_hold[2]); + _MUX mhB3 (BMUX_CENB, BMUX_DB[3], QB_int[3], DB_hold[3]); + _MUX mhB4 (BMUX_CENB, BMUX_DB[4], QB_int[4], DB_hold[4]); + _MUX mhB5 (BMUX_CENB, BMUX_DB[5], QB_int[5], DB_hold[5]); + _MUX mhB6 (BMUX_CENB, BMUX_DB[6], QB_int[6], DB_hold[6]); + _MUX mhB7 (BMUX_CENB, BMUX_DB[7], QB_int[7], DB_hold[7]); + _MUX mhB8 (BMUX_CENB, BMUX_DB[8], QB_int[8], DB_hold[8]); + _MUX mhB9 (BMUX_CENB, BMUX_DB[9], QB_int[9], DB_hold[9]); + _MUX mhB10 (BMUX_CENB, BMUX_DB[10], QB_int[10], DB_hold[10]); + _MUX mhB11 (BMUX_CENB, BMUX_DB[11], QB_int[11], DB_hold[11]); + _MUX mhB12 (BMUX_CENB, BMUX_DB[12], QB_int[12], DB_hold[12]); + _MUX mhB13 (BMUX_CENB, BMUX_DB[13], QB_int[13], DB_hold[13]); + _MUX mhB14 (BMUX_CENB, BMUX_DB[14], QB_int[14], DB_hold[14]); + _MUX mhB15 (BMUX_CENB, BMUX_DB[15], QB_int[15], DB_hold[15]); + _MUX mhB16 (BMUX_CENB, BMUX_DB[16], QB_int[16], DB_hold[16]); + _MUX mhB17 (BMUX_CENB, BMUX_DB[17], QB_int[17], DB_hold[17]); + _MUX mhB18 (BMUX_CENB, BMUX_DB[18], QB_int[18], DB_hold[18]); + _MUX mhB19 (BMUX_CENB, BMUX_DB[19], QB_int[19], DB_hold[19]); + _MUX mhB20 (BMUX_CENB, BMUX_DB[20], QB_int[20], DB_hold[20]); + _MUX mhB21 (BMUX_CENB, BMUX_DB[21], QB_int[21], DB_hold[21]); + _MUX mhB22 (BMUX_CENB, BMUX_DB[22], QB_int[22], DB_hold[22]); + _MUX mhB23 (BMUX_CENB, BMUX_DB[23], QB_int[23], DB_hold[23]); + _MUX mhB24 (BMUX_CENB, BMUX_DB[24], QB_int[24], DB_hold[24]); + _MUX mhB25 (BMUX_CENB, BMUX_DB[25], QB_int[25], DB_hold[25]); + _MUX mhB26 (BMUX_CENB, BMUX_DB[26], QB_int[26], DB_hold[26]); + _MUX mhB27 (BMUX_CENB, BMUX_DB[27], QB_int[27], DB_hold[27]); + _MUX mhB28 (BMUX_CENB, BMUX_DB[28], QB_int[28], DB_hold[28]); + _MUX mhB29 (BMUX_CENB, BMUX_DB[29], QB_int[29], DB_hold[29]); + _MUX mhB30 (BMUX_CENB, BMUX_DB[30], QB_int[30], DB_hold[30]); + _MUX mhB31 (BMUX_CENB, BMUX_DB[31], QB_int[31], DB_hold[31]); + _MUX mhB32 (BMUX_CENB, BMUX_DB[32], QB_int[32], DB_hold[32]); + _MUX mhB33 (BMUX_CENB, BMUX_DB[33], QB_int[33], DB_hold[33]); + _MUX mhB34 (BMUX_CENB, BMUX_DB[34], QB_int[34], DB_hold[34]); + _MUX mhB35 (BMUX_CENB, BMUX_DB[35], QB_int[35], DB_hold[35]); + _MUX mhB36 (BMUX_CENB, BMUX_DB[36], QB_int[36], DB_hold[36]); + _MUX mhB37 (BMUX_CENB, BMUX_DB[37], QB_int[37], DB_hold[37]); + _MUX mhB38 (BMUX_CENB, BMUX_DB[38], QB_int[38], DB_hold[38]); + _MUX mhB39 (BMUX_CENB, BMUX_DB[39], QB_int[39], DB_hold[39]); + _MUX mhB40 (BMUX_CENB, BMUX_DB[40], QB_int[40], DB_hold[40]); + _MUX mhB41 (BMUX_CENB, BMUX_DB[41], QB_int[41], DB_hold[41]); + _MUX mhB42 (BMUX_CENB, BMUX_DB[42], QB_int[42], DB_hold[42]); + _MUX mhB43 (BMUX_CENB, BMUX_DB[43], QB_int[43], DB_hold[43]); + _MUX mhB44 (BMUX_CENB, BMUX_DB[44], QB_int[44], DB_hold[44]); + _MUX mhB45 (BMUX_CENB, BMUX_DB[45], QB_int[45], DB_hold[45]); + _MUX mhB46 (BMUX_CENB, BMUX_DB[46], QB_int[46], DB_hold[46]); + _MUX mhB47 (BMUX_CENB, BMUX_DB[47], QB_int[47], DB_hold[47]); + _MUX mhB48 (BMUX_CENB, BMUX_DB[48], QB_int[48], DB_hold[48]); + _MUX mhB49 (BMUX_CENB, BMUX_DB[49], QB_int[49], DB_hold[49]); + _MUX mhB50 (BMUX_CENB, BMUX_DB[50], QB_int[50], DB_hold[50]); + _MUX mhB51 (BMUX_CENB, BMUX_DB[51], QB_int[51], DB_hold[51]); + _MUX mhB52 (BMUX_CENB, BMUX_DB[52], QB_int[52], DB_hold[52]); + _MUX mhB53 (BMUX_CENB, BMUX_DB[53], QB_int[53], DB_hold[53]); + _MUX mhB54 (BMUX_CENB, BMUX_DB[54], QB_int[54], DB_hold[54]); + _MUX mhB55 (BMUX_CENB, BMUX_DB[55], QB_int[55], DB_hold[55]); + _MUX mhB56 (BMUX_CENB, BMUX_DB[56], QB_int[56], DB_hold[56]); + _MUX mhB57 (BMUX_CENB, BMUX_DB[57], QB_int[57], DB_hold[57]); + _MUX mhB58 (BMUX_CENB, BMUX_DB[58], QB_int[58], DB_hold[58]); + _MUX mhB59 (BMUX_CENB, BMUX_DB[59], QB_int[59], DB_hold[59]); + _MUX mhB60 (BMUX_CENB, BMUX_DB[60], QB_int[60], DB_hold[60]); + _MUX mhB61 (BMUX_CENB, BMUX_DB[61], QB_int[61], DB_hold[61]); + _MUX mhB62 (BMUX_CENB, BMUX_DB[62], QB_int[62], DB_hold[62]); + _MUX mhB63 (BMUX_CENB, BMUX_DB[63], QB_int[63], DB_hold[63]); + _MUX mhB64 (BMUX_CENB, BMUX_DB[64], QB_int[64], DB_hold[64]); + _MUX mhB65 (BMUX_CENB, BMUX_DB[65], QB_int[65], DB_hold[65]); + _MUX mhB66 (BMUX_CENB, BMUX_DB[66], QB_int[66], DB_hold[66]); + _MUX mhB67 (BMUX_CENB, BMUX_DB[67], QB_int[67], DB_hold[67]); + _MUX mhB68 (BMUX_CENB, BMUX_DB[68], QB_int[68], DB_hold[68]); + _MUX mhB69 (BMUX_CENB, BMUX_DB[69], QB_int[69], DB_hold[69]); + _MUX mhB70 (BMUX_CENB, BMUX_DB[70], QB_int[70], DB_hold[70]); + _MUX mhB71 (BMUX_CENB, BMUX_DB[71], QB_int[71], DB_hold[71]); + _MUX mhB72 (BMUX_CENB, BMUX_DB[72], QB_int[72], DB_hold[72]); + _MUX mhB73 (BMUX_CENB, BMUX_DB[73], QB_int[73], DB_hold[73]); + _MUX mhB74 (BMUX_CENB, BMUX_DB[74], QB_int[74], DB_hold[74]); + _MUX mhB75 (BMUX_CENB, BMUX_DB[75], QB_int[75], DB_hold[75]); + _MUX mhB76 (BMUX_CENB, BMUX_DB[76], QB_int[76], DB_hold[76]); + _MUX mhB77 (BMUX_CENB, BMUX_DB[77], QB_int[77], DB_hold[77]); + _MUX mhB78 (BMUX_CENB, BMUX_DB[78], QB_int[78], DB_hold[78]); + _MUX mhB79 (BMUX_CENB, BMUX_DB[79], QB_int[79], DB_hold[79]); + _MUX mhB80 (BMUX_CENB, BMUX_DB[80], QB_int[80], DB_hold[80]); + _MUX mhB81 (BMUX_CENB, BMUX_DB[81], QB_int[81], DB_hold[81]); + _MUX mhB82 (BMUX_CENB, BMUX_DB[82], QB_int[82], DB_hold[82]); + _MUX mhB83 (BMUX_CENB, BMUX_DB[83], QB_int[83], DB_hold[83]); + _MUX mhB84 (BMUX_CENB, BMUX_DB[84], QB_int[84], DB_hold[84]); + _MUX mhB85 (BMUX_CENB, BMUX_DB[85], QB_int[85], DB_hold[85]); + _MUX mhB86 (BMUX_CENB, BMUX_DB[86], QB_int[86], DB_hold[86]); + _MUX mhB87 (BMUX_CENB, BMUX_DB[87], QB_int[87], DB_hold[87]); + _MUX mhB88 (BMUX_CENB, BMUX_DB[88], QB_int[88], DB_hold[88]); + _MUX mhB89 (BMUX_CENB, BMUX_DB[89], QB_int[89], DB_hold[89]); + _MUX mhB90 (BMUX_CENB, BMUX_DB[90], QB_int[90], DB_hold[90]); + _MUX mhB91 (BMUX_CENB, BMUX_DB[91], QB_int[91], DB_hold[91]); + _MUX mhB92 (BMUX_CENB, BMUX_DB[92], QB_int[92], DB_hold[92]); + _MUX mhB93 (BMUX_CENB, BMUX_DB[93], QB_int[93], DB_hold[93]); + _MUX mhB94 (BMUX_CENB, BMUX_DB[94], QB_int[94], DB_hold[94]); + _MUX mhB95 (BMUX_CENB, BMUX_DB[95], QB_int[95], DB_hold[95]); + _MUX mhB96 (BMUX_CENB, BMUX_DB[96], QB_int[96], DB_hold[96]); + _MUX mhB97 (BMUX_CENB, BMUX_DB[97], QB_int[97], DB_hold[97]); + _MUX mhB98 (BMUX_CENB, BMUX_DB[98], QB_int[98], DB_hold[98]); + _MUX mhB99 (BMUX_CENB, BMUX_DB[99], QB_int[99], DB_hold[99]); + _MUX mhB100 (BMUX_CENB, BMUX_DB[100], QB_int[100], DB_hold[100]); + _MUX mhB101 (BMUX_CENB, BMUX_DB[101], QB_int[101], DB_hold[101]); + _MUX mhB102 (BMUX_CENB, BMUX_DB[102], QB_int[102], DB_hold[102]); + _MUX mhB103 (BMUX_CENB, BMUX_DB[103], QB_int[103], DB_hold[103]); + _MUX mhB104 (BMUX_CENB, BMUX_DB[104], QB_int[104], DB_hold[104]); + _MUX mhB105 (BMUX_CENB, BMUX_DB[105], QB_int[105], DB_hold[105]); + _MUX mhB106 (BMUX_CENB, BMUX_DB[106], QB_int[106], DB_hold[106]); + _MUX mhB107 (BMUX_CENB, BMUX_DB[107], QB_int[107], DB_hold[107]); + _MUX mhB108 (BMUX_CENB, BMUX_DB[108], QB_int[108], DB_hold[108]); + _MUX mhB109 (BMUX_CENB, BMUX_DB[109], QB_int[109], DB_hold[109]); + _MUX mhB110 (BMUX_CENB, BMUX_DB[110], QB_int[110], DB_hold[110]); + _MUX mhB111 (BMUX_CENB, BMUX_DB[111], QB_int[111], DB_hold[111]); + _MUX mhB112 (BMUX_CENB, BMUX_DB[112], QB_int[112], DB_hold[112]); + _MUX mhB113 (BMUX_CENB, BMUX_DB[113], QB_int[113], DB_hold[113]); + _MUX mhB114 (BMUX_CENB, BMUX_DB[114], QB_int[114], DB_hold[114]); + _MUX mhB115 (BMUX_CENB, BMUX_DB[115], QB_int[115], DB_hold[115]); + _MUX mhB116 (BMUX_CENB, BMUX_DB[116], QB_int[116], DB_hold[116]); + _MUX mhB117 (BMUX_CENB, BMUX_DB[117], QB_int[117], DB_hold[117]); + _MUX mhB118 (BMUX_CENB, BMUX_DB[118], QB_int[118], DB_hold[118]); + _MUX mhB119 (BMUX_CENB, BMUX_DB[119], QB_int[119], DB_hold[119]); + _MUX mhB120 (BMUX_CENB, BMUX_DB[120], QB_int[120], DB_hold[120]); + _MUX mhB121 (BMUX_CENB, BMUX_DB[121], QB_int[121], DB_hold[121]); + _MUX mhB122 (BMUX_CENB, BMUX_DB[122], QB_int[122], DB_hold[122]); + _MUX mhB123 (BMUX_CENB, BMUX_DB[123], QB_int[123], DB_hold[123]); + _MUX mhB124 (BMUX_CENB, BMUX_DB[124], QB_int[124], DB_hold[124]); + _MUX mhB125 (BMUX_CENB, BMUX_DB[125], QB_int[125], DB_hold[125]); + _MUX mhB126 (BMUX_CENB, BMUX_DB[126], QB_int[126], DB_hold[126]); + _MUX mhB127 (BMUX_CENB, BMUX_DB[127], QB_int[127], DB_hold[127]); + _MUX mqB0 (DFTRAMBYP, DB_hold[0], BMUX_DB[0], DB_scan[0]); + _MUX mqB1 (DFTRAMBYP, DB_hold[1], BMUX_DB[1], DB_scan[1]); + _MUX mqB2 (DFTRAMBYP, DB_hold[2], BMUX_DB[2], DB_scan[2]); + _MUX mqB3 (DFTRAMBYP, DB_hold[3], BMUX_DB[3], DB_scan[3]); + _MUX mqB4 (DFTRAMBYP, DB_hold[4], BMUX_DB[4], DB_scan[4]); + _MUX mqB5 (DFTRAMBYP, DB_hold[5], BMUX_DB[5], DB_scan[5]); + _MUX mqB6 (DFTRAMBYP, DB_hold[6], BMUX_DB[6], DB_scan[6]); + _MUX mqB7 (DFTRAMBYP, DB_hold[7], BMUX_DB[7], DB_scan[7]); + _MUX mqB8 (DFTRAMBYP, DB_hold[8], BMUX_DB[8], DB_scan[8]); + _MUX mqB9 (DFTRAMBYP, DB_hold[9], BMUX_DB[9], DB_scan[9]); + _MUX mqB10 (DFTRAMBYP, DB_hold[10], BMUX_DB[10], DB_scan[10]); + _MUX mqB11 (DFTRAMBYP, DB_hold[11], BMUX_DB[11], DB_scan[11]); + _MUX mqB12 (DFTRAMBYP, DB_hold[12], BMUX_DB[12], DB_scan[12]); + _MUX mqB13 (DFTRAMBYP, DB_hold[13], BMUX_DB[13], DB_scan[13]); + _MUX mqB14 (DFTRAMBYP, DB_hold[14], BMUX_DB[14], DB_scan[14]); + _MUX mqB15 (DFTRAMBYP, DB_hold[15], BMUX_DB[15], DB_scan[15]); + _MUX mqB16 (DFTRAMBYP, DB_hold[16], BMUX_DB[16], DB_scan[16]); + _MUX mqB17 (DFTRAMBYP, DB_hold[17], BMUX_DB[17], DB_scan[17]); + _MUX mqB18 (DFTRAMBYP, DB_hold[18], BMUX_DB[18], DB_scan[18]); + _MUX mqB19 (DFTRAMBYP, DB_hold[19], BMUX_DB[19], DB_scan[19]); + _MUX mqB20 (DFTRAMBYP, DB_hold[20], BMUX_DB[20], DB_scan[20]); + _MUX mqB21 (DFTRAMBYP, DB_hold[21], BMUX_DB[21], DB_scan[21]); + _MUX mqB22 (DFTRAMBYP, DB_hold[22], BMUX_DB[22], DB_scan[22]); + _MUX mqB23 (DFTRAMBYP, DB_hold[23], BMUX_DB[23], DB_scan[23]); + _MUX mqB24 (DFTRAMBYP, DB_hold[24], BMUX_DB[24], DB_scan[24]); + _MUX mqB25 (DFTRAMBYP, DB_hold[25], BMUX_DB[25], DB_scan[25]); + _MUX mqB26 (DFTRAMBYP, DB_hold[26], BMUX_DB[26], DB_scan[26]); + _MUX mqB27 (DFTRAMBYP, DB_hold[27], BMUX_DB[27], DB_scan[27]); + _MUX mqB28 (DFTRAMBYP, DB_hold[28], BMUX_DB[28], DB_scan[28]); + _MUX mqB29 (DFTRAMBYP, DB_hold[29], BMUX_DB[29], DB_scan[29]); + _MUX mqB30 (DFTRAMBYP, DB_hold[30], BMUX_DB[30], DB_scan[30]); + _MUX mqB31 (DFTRAMBYP, DB_hold[31], BMUX_DB[31], DB_scan[31]); + _MUX mqB32 (DFTRAMBYP, DB_hold[32], BMUX_DB[32], DB_scan[32]); + _MUX mqB33 (DFTRAMBYP, DB_hold[33], BMUX_DB[33], DB_scan[33]); + _MUX mqB34 (DFTRAMBYP, DB_hold[34], BMUX_DB[34], DB_scan[34]); + _MUX mqB35 (DFTRAMBYP, DB_hold[35], BMUX_DB[35], DB_scan[35]); + _MUX mqB36 (DFTRAMBYP, DB_hold[36], BMUX_DB[36], DB_scan[36]); + _MUX mqB37 (DFTRAMBYP, DB_hold[37], BMUX_DB[37], DB_scan[37]); + _MUX mqB38 (DFTRAMBYP, DB_hold[38], BMUX_DB[38], DB_scan[38]); + _MUX mqB39 (DFTRAMBYP, DB_hold[39], BMUX_DB[39], DB_scan[39]); + _MUX mqB40 (DFTRAMBYP, DB_hold[40], BMUX_DB[40], DB_scan[40]); + _MUX mqB41 (DFTRAMBYP, DB_hold[41], BMUX_DB[41], DB_scan[41]); + _MUX mqB42 (DFTRAMBYP, DB_hold[42], BMUX_DB[42], DB_scan[42]); + _MUX mqB43 (DFTRAMBYP, DB_hold[43], BMUX_DB[43], DB_scan[43]); + _MUX mqB44 (DFTRAMBYP, DB_hold[44], BMUX_DB[44], DB_scan[44]); + _MUX mqB45 (DFTRAMBYP, DB_hold[45], BMUX_DB[45], DB_scan[45]); + _MUX mqB46 (DFTRAMBYP, DB_hold[46], BMUX_DB[46], DB_scan[46]); + _MUX mqB47 (DFTRAMBYP, DB_hold[47], BMUX_DB[47], DB_scan[47]); + _MUX mqB48 (DFTRAMBYP, DB_hold[48], BMUX_DB[48], DB_scan[48]); + _MUX mqB49 (DFTRAMBYP, DB_hold[49], BMUX_DB[49], DB_scan[49]); + _MUX mqB50 (DFTRAMBYP, DB_hold[50], BMUX_DB[50], DB_scan[50]); + _MUX mqB51 (DFTRAMBYP, DB_hold[51], BMUX_DB[51], DB_scan[51]); + _MUX mqB52 (DFTRAMBYP, DB_hold[52], BMUX_DB[52], DB_scan[52]); + _MUX mqB53 (DFTRAMBYP, DB_hold[53], BMUX_DB[53], DB_scan[53]); + _MUX mqB54 (DFTRAMBYP, DB_hold[54], BMUX_DB[54], DB_scan[54]); + _MUX mqB55 (DFTRAMBYP, DB_hold[55], BMUX_DB[55], DB_scan[55]); + _MUX mqB56 (DFTRAMBYP, DB_hold[56], BMUX_DB[56], DB_scan[56]); + _MUX mqB57 (DFTRAMBYP, DB_hold[57], BMUX_DB[57], DB_scan[57]); + _MUX mqB58 (DFTRAMBYP, DB_hold[58], BMUX_DB[58], DB_scan[58]); + _MUX mqB59 (DFTRAMBYP, DB_hold[59], BMUX_DB[59], DB_scan[59]); + _MUX mqB60 (DFTRAMBYP, DB_hold[60], BMUX_DB[60], DB_scan[60]); + _MUX mqB61 (DFTRAMBYP, DB_hold[61], BMUX_DB[61], DB_scan[61]); + _MUX mqB62 (DFTRAMBYP, DB_hold[62], BMUX_DB[62], DB_scan[62]); + _MUX mqB63 (DFTRAMBYP, DB_hold[63], BMUX_DB[63], DB_scan[63]); + _MUX mqB64 (DFTRAMBYP, DB_hold[64], BMUX_DB[64], DB_scan[64]); + _MUX mqB65 (DFTRAMBYP, DB_hold[65], BMUX_DB[65], DB_scan[65]); + _MUX mqB66 (DFTRAMBYP, DB_hold[66], BMUX_DB[66], DB_scan[66]); + _MUX mqB67 (DFTRAMBYP, DB_hold[67], BMUX_DB[67], DB_scan[67]); + _MUX mqB68 (DFTRAMBYP, DB_hold[68], BMUX_DB[68], DB_scan[68]); + _MUX mqB69 (DFTRAMBYP, DB_hold[69], BMUX_DB[69], DB_scan[69]); + _MUX mqB70 (DFTRAMBYP, DB_hold[70], BMUX_DB[70], DB_scan[70]); + _MUX mqB71 (DFTRAMBYP, DB_hold[71], BMUX_DB[71], DB_scan[71]); + _MUX mqB72 (DFTRAMBYP, DB_hold[72], BMUX_DB[72], DB_scan[72]); + _MUX mqB73 (DFTRAMBYP, DB_hold[73], BMUX_DB[73], DB_scan[73]); + _MUX mqB74 (DFTRAMBYP, DB_hold[74], BMUX_DB[74], DB_scan[74]); + _MUX mqB75 (DFTRAMBYP, DB_hold[75], BMUX_DB[75], DB_scan[75]); + _MUX mqB76 (DFTRAMBYP, DB_hold[76], BMUX_DB[76], DB_scan[76]); + _MUX mqB77 (DFTRAMBYP, DB_hold[77], BMUX_DB[77], DB_scan[77]); + _MUX mqB78 (DFTRAMBYP, DB_hold[78], BMUX_DB[78], DB_scan[78]); + _MUX mqB79 (DFTRAMBYP, DB_hold[79], BMUX_DB[79], DB_scan[79]); + _MUX mqB80 (DFTRAMBYP, DB_hold[80], BMUX_DB[80], DB_scan[80]); + _MUX mqB81 (DFTRAMBYP, DB_hold[81], BMUX_DB[81], DB_scan[81]); + _MUX mqB82 (DFTRAMBYP, DB_hold[82], BMUX_DB[82], DB_scan[82]); + _MUX mqB83 (DFTRAMBYP, DB_hold[83], BMUX_DB[83], DB_scan[83]); + _MUX mqB84 (DFTRAMBYP, DB_hold[84], BMUX_DB[84], DB_scan[84]); + _MUX mqB85 (DFTRAMBYP, DB_hold[85], BMUX_DB[85], DB_scan[85]); + _MUX mqB86 (DFTRAMBYP, DB_hold[86], BMUX_DB[86], DB_scan[86]); + _MUX mqB87 (DFTRAMBYP, DB_hold[87], BMUX_DB[87], DB_scan[87]); + _MUX mqB88 (DFTRAMBYP, DB_hold[88], BMUX_DB[88], DB_scan[88]); + _MUX mqB89 (DFTRAMBYP, DB_hold[89], BMUX_DB[89], DB_scan[89]); + _MUX mqB90 (DFTRAMBYP, DB_hold[90], BMUX_DB[90], DB_scan[90]); + _MUX mqB91 (DFTRAMBYP, DB_hold[91], BMUX_DB[91], DB_scan[91]); + _MUX mqB92 (DFTRAMBYP, DB_hold[92], BMUX_DB[92], DB_scan[92]); + _MUX mqB93 (DFTRAMBYP, DB_hold[93], BMUX_DB[93], DB_scan[93]); + _MUX mqB94 (DFTRAMBYP, DB_hold[94], BMUX_DB[94], DB_scan[94]); + _MUX mqB95 (DFTRAMBYP, DB_hold[95], BMUX_DB[95], DB_scan[95]); + _MUX mqB96 (DFTRAMBYP, DB_hold[96], BMUX_DB[96], DB_scan[96]); + _MUX mqB97 (DFTRAMBYP, DB_hold[97], BMUX_DB[97], DB_scan[97]); + _MUX mqB98 (DFTRAMBYP, DB_hold[98], BMUX_DB[98], DB_scan[98]); + _MUX mqB99 (DFTRAMBYP, DB_hold[99], BMUX_DB[99], DB_scan[99]); + _MUX mqB100 (DFTRAMBYP, DB_hold[100], BMUX_DB[100], DB_scan[100]); + _MUX mqB101 (DFTRAMBYP, DB_hold[101], BMUX_DB[101], DB_scan[101]); + _MUX mqB102 (DFTRAMBYP, DB_hold[102], BMUX_DB[102], DB_scan[102]); + _MUX mqB103 (DFTRAMBYP, DB_hold[103], BMUX_DB[103], DB_scan[103]); + _MUX mqB104 (DFTRAMBYP, DB_hold[104], BMUX_DB[104], DB_scan[104]); + _MUX mqB105 (DFTRAMBYP, DB_hold[105], BMUX_DB[105], DB_scan[105]); + _MUX mqB106 (DFTRAMBYP, DB_hold[106], BMUX_DB[106], DB_scan[106]); + _MUX mqB107 (DFTRAMBYP, DB_hold[107], BMUX_DB[107], DB_scan[107]); + _MUX mqB108 (DFTRAMBYP, DB_hold[108], BMUX_DB[108], DB_scan[108]); + _MUX mqB109 (DFTRAMBYP, DB_hold[109], BMUX_DB[109], DB_scan[109]); + _MUX mqB110 (DFTRAMBYP, DB_hold[110], BMUX_DB[110], DB_scan[110]); + _MUX mqB111 (DFTRAMBYP, DB_hold[111], BMUX_DB[111], DB_scan[111]); + _MUX mqB112 (DFTRAMBYP, DB_hold[112], BMUX_DB[112], DB_scan[112]); + _MUX mqB113 (DFTRAMBYP, DB_hold[113], BMUX_DB[113], DB_scan[113]); + _MUX mqB114 (DFTRAMBYP, DB_hold[114], BMUX_DB[114], DB_scan[114]); + _MUX mqB115 (DFTRAMBYP, DB_hold[115], BMUX_DB[115], DB_scan[115]); + _MUX mqB116 (DFTRAMBYP, DB_hold[116], BMUX_DB[116], DB_scan[116]); + _MUX mqB117 (DFTRAMBYP, DB_hold[117], BMUX_DB[117], DB_scan[117]); + _MUX mqB118 (DFTRAMBYP, DB_hold[118], BMUX_DB[118], DB_scan[118]); + _MUX mqB119 (DFTRAMBYP, DB_hold[119], BMUX_DB[119], DB_scan[119]); + _MUX mqB120 (DFTRAMBYP, DB_hold[120], BMUX_DB[120], DB_scan[120]); + _MUX mqB121 (DFTRAMBYP, DB_hold[121], BMUX_DB[121], DB_scan[121]); + _MUX mqB122 (DFTRAMBYP, DB_hold[122], BMUX_DB[122], DB_scan[122]); + _MUX mqB123 (DFTRAMBYP, DB_hold[123], BMUX_DB[123], DB_scan[123]); + _MUX mqB124 (DFTRAMBYP, DB_hold[124], BMUX_DB[124], DB_scan[124]); + _MUX mqB125 (DFTRAMBYP, DB_hold[125], BMUX_DB[125], DB_scan[125]); + _MUX mqB126 (DFTRAMBYP, DB_hold[126], BMUX_DB[126], DB_scan[126]); + _MUX mqB127 (DFTRAMBYP, DB_hold[127], BMUX_DB[127], DB_scan[127]); + rf2_32x128_wm1_scanflop uDQB0 (.CLK(CLKB), .SE(SEB), .SI(QB_int[1]), .D(DB_scan[0]), .Q(QB_int[0]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB1 (.CLK(CLKB), .SE(SEB), .SI(QB_int[2]), .D(DB_scan[1]), .Q(QB_int[1]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB2 (.CLK(CLKB), .SE(SEB), .SI(QB_int[3]), .D(DB_scan[2]), .Q(QB_int[2]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB3 (.CLK(CLKB), .SE(SEB), .SI(QB_int[4]), .D(DB_scan[3]), .Q(QB_int[3]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB4 (.CLK(CLKB), .SE(SEB), .SI(QB_int[5]), .D(DB_scan[4]), .Q(QB_int[4]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB5 (.CLK(CLKB), .SE(SEB), .SI(QB_int[6]), .D(DB_scan[5]), .Q(QB_int[5]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB6 (.CLK(CLKB), .SE(SEB), .SI(QB_int[7]), .D(DB_scan[6]), .Q(QB_int[6]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB7 (.CLK(CLKB), .SE(SEB), .SI(QB_int[8]), .D(DB_scan[7]), .Q(QB_int[7]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB8 (.CLK(CLKB), .SE(SEB), .SI(QB_int[9]), .D(DB_scan[8]), .Q(QB_int[8]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB9 (.CLK(CLKB), .SE(SEB), .SI(QB_int[10]), .D(DB_scan[9]), .Q(QB_int[9]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB10 (.CLK(CLKB), .SE(SEB), .SI(QB_int[11]), .D(DB_scan[10]), .Q(QB_int[10]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB11 (.CLK(CLKB), .SE(SEB), .SI(QB_int[12]), .D(DB_scan[11]), .Q(QB_int[11]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB12 (.CLK(CLKB), .SE(SEB), .SI(QB_int[13]), .D(DB_scan[12]), .Q(QB_int[12]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB13 (.CLK(CLKB), .SE(SEB), .SI(QB_int[14]), .D(DB_scan[13]), .Q(QB_int[13]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB14 (.CLK(CLKB), .SE(SEB), .SI(QB_int[15]), .D(DB_scan[14]), .Q(QB_int[14]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB15 (.CLK(CLKB), .SE(SEB), .SI(QB_int[16]), .D(DB_scan[15]), .Q(QB_int[15]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB16 (.CLK(CLKB), .SE(SEB), .SI(QB_int[17]), .D(DB_scan[16]), .Q(QB_int[16]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB17 (.CLK(CLKB), .SE(SEB), .SI(QB_int[18]), .D(DB_scan[17]), .Q(QB_int[17]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB18 (.CLK(CLKB), .SE(SEB), .SI(QB_int[19]), .D(DB_scan[18]), .Q(QB_int[18]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB19 (.CLK(CLKB), .SE(SEB), .SI(QB_int[20]), .D(DB_scan[19]), .Q(QB_int[19]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB20 (.CLK(CLKB), .SE(SEB), .SI(QB_int[21]), .D(DB_scan[20]), .Q(QB_int[20]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB21 (.CLK(CLKB), .SE(SEB), .SI(QB_int[22]), .D(DB_scan[21]), .Q(QB_int[21]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB22 (.CLK(CLKB), .SE(SEB), .SI(QB_int[23]), .D(DB_scan[22]), .Q(QB_int[22]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB23 (.CLK(CLKB), .SE(SEB), .SI(QB_int[24]), .D(DB_scan[23]), .Q(QB_int[23]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB24 (.CLK(CLKB), .SE(SEB), .SI(QB_int[25]), .D(DB_scan[24]), .Q(QB_int[24]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB25 (.CLK(CLKB), .SE(SEB), .SI(QB_int[26]), .D(DB_scan[25]), .Q(QB_int[25]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB26 (.CLK(CLKB), .SE(SEB), .SI(QB_int[27]), .D(DB_scan[26]), .Q(QB_int[26]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB27 (.CLK(CLKB), .SE(SEB), .SI(QB_int[28]), .D(DB_scan[27]), .Q(QB_int[27]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB28 (.CLK(CLKB), .SE(SEB), .SI(QB_int[29]), .D(DB_scan[28]), .Q(QB_int[28]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB29 (.CLK(CLKB), .SE(SEB), .SI(QB_int[30]), .D(DB_scan[29]), .Q(QB_int[29]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB30 (.CLK(CLKB), .SE(SEB), .SI(QB_int[31]), .D(DB_scan[30]), .Q(QB_int[30]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB31 (.CLK(CLKB), .SE(SEB), .SI(QB_int[32]), .D(DB_scan[31]), .Q(QB_int[31]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB32 (.CLK(CLKB), .SE(SEB), .SI(QB_int[33]), .D(DB_scan[32]), .Q(QB_int[32]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB33 (.CLK(CLKB), .SE(SEB), .SI(QB_int[34]), .D(DB_scan[33]), .Q(QB_int[33]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB34 (.CLK(CLKB), .SE(SEB), .SI(QB_int[35]), .D(DB_scan[34]), .Q(QB_int[34]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB35 (.CLK(CLKB), .SE(SEB), .SI(QB_int[36]), .D(DB_scan[35]), .Q(QB_int[35]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB36 (.CLK(CLKB), .SE(SEB), .SI(QB_int[37]), .D(DB_scan[36]), .Q(QB_int[36]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB37 (.CLK(CLKB), .SE(SEB), .SI(QB_int[38]), .D(DB_scan[37]), .Q(QB_int[37]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB38 (.CLK(CLKB), .SE(SEB), .SI(QB_int[39]), .D(DB_scan[38]), .Q(QB_int[38]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB39 (.CLK(CLKB), .SE(SEB), .SI(QB_int[40]), .D(DB_scan[39]), .Q(QB_int[39]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB40 (.CLK(CLKB), .SE(SEB), .SI(QB_int[41]), .D(DB_scan[40]), .Q(QB_int[40]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB41 (.CLK(CLKB), .SE(SEB), .SI(QB_int[42]), .D(DB_scan[41]), .Q(QB_int[41]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB42 (.CLK(CLKB), .SE(SEB), .SI(QB_int[43]), .D(DB_scan[42]), .Q(QB_int[42]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB43 (.CLK(CLKB), .SE(SEB), .SI(QB_int[44]), .D(DB_scan[43]), .Q(QB_int[43]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB44 (.CLK(CLKB), .SE(SEB), .SI(QB_int[45]), .D(DB_scan[44]), .Q(QB_int[44]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB45 (.CLK(CLKB), .SE(SEB), .SI(QB_int[46]), .D(DB_scan[45]), .Q(QB_int[45]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB46 (.CLK(CLKB), .SE(SEB), .SI(QB_int[47]), .D(DB_scan[46]), .Q(QB_int[46]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB47 (.CLK(CLKB), .SE(SEB), .SI(QB_int[48]), .D(DB_scan[47]), .Q(QB_int[47]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB48 (.CLK(CLKB), .SE(SEB), .SI(QB_int[49]), .D(DB_scan[48]), .Q(QB_int[48]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB49 (.CLK(CLKB), .SE(SEB), .SI(QB_int[50]), .D(DB_scan[49]), .Q(QB_int[49]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB50 (.CLK(CLKB), .SE(SEB), .SI(QB_int[51]), .D(DB_scan[50]), .Q(QB_int[50]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB51 (.CLK(CLKB), .SE(SEB), .SI(QB_int[52]), .D(DB_scan[51]), .Q(QB_int[51]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB52 (.CLK(CLKB), .SE(SEB), .SI(QB_int[53]), .D(DB_scan[52]), .Q(QB_int[52]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB53 (.CLK(CLKB), .SE(SEB), .SI(QB_int[54]), .D(DB_scan[53]), .Q(QB_int[53]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB54 (.CLK(CLKB), .SE(SEB), .SI(QB_int[55]), .D(DB_scan[54]), .Q(QB_int[54]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB55 (.CLK(CLKB), .SE(SEB), .SI(QB_int[56]), .D(DB_scan[55]), .Q(QB_int[55]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB56 (.CLK(CLKB), .SE(SEB), .SI(QB_int[57]), .D(DB_scan[56]), .Q(QB_int[56]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB57 (.CLK(CLKB), .SE(SEB), .SI(QB_int[58]), .D(DB_scan[57]), .Q(QB_int[57]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB58 (.CLK(CLKB), .SE(SEB), .SI(QB_int[59]), .D(DB_scan[58]), .Q(QB_int[58]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB59 (.CLK(CLKB), .SE(SEB), .SI(QB_int[60]), .D(DB_scan[59]), .Q(QB_int[59]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB60 (.CLK(CLKB), .SE(SEB), .SI(QB_int[61]), .D(DB_scan[60]), .Q(QB_int[60]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB61 (.CLK(CLKB), .SE(SEB), .SI(QB_int[62]), .D(DB_scan[61]), .Q(QB_int[61]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB62 (.CLK(CLKB), .SE(SEB), .SI(QB_int[63]), .D(DB_scan[62]), .Q(QB_int[62]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB63 (.CLK(CLKB), .SE(SEB), .SI(BUS_SIB[0]), .D(DB_scan[63]), .Q(QB_int[63]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB64 (.CLK(CLKB), .SE(SEB), .SI(BUS_SIB[1]), .D(DB_scan[64]), .Q(QB_int[64]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB65 (.CLK(CLKB), .SE(SEB), .SI(QB_int[64]), .D(DB_scan[65]), .Q(QB_int[65]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB66 (.CLK(CLKB), .SE(SEB), .SI(QB_int[65]), .D(DB_scan[66]), .Q(QB_int[66]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB67 (.CLK(CLKB), .SE(SEB), .SI(QB_int[66]), .D(DB_scan[67]), .Q(QB_int[67]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB68 (.CLK(CLKB), .SE(SEB), .SI(QB_int[67]), .D(DB_scan[68]), .Q(QB_int[68]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB69 (.CLK(CLKB), .SE(SEB), .SI(QB_int[68]), .D(DB_scan[69]), .Q(QB_int[69]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB70 (.CLK(CLKB), .SE(SEB), .SI(QB_int[69]), .D(DB_scan[70]), .Q(QB_int[70]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB71 (.CLK(CLKB), .SE(SEB), .SI(QB_int[70]), .D(DB_scan[71]), .Q(QB_int[71]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB72 (.CLK(CLKB), .SE(SEB), .SI(QB_int[71]), .D(DB_scan[72]), .Q(QB_int[72]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB73 (.CLK(CLKB), .SE(SEB), .SI(QB_int[72]), .D(DB_scan[73]), .Q(QB_int[73]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB74 (.CLK(CLKB), .SE(SEB), .SI(QB_int[73]), .D(DB_scan[74]), .Q(QB_int[74]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB75 (.CLK(CLKB), .SE(SEB), .SI(QB_int[74]), .D(DB_scan[75]), .Q(QB_int[75]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB76 (.CLK(CLKB), .SE(SEB), .SI(QB_int[75]), .D(DB_scan[76]), .Q(QB_int[76]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB77 (.CLK(CLKB), .SE(SEB), .SI(QB_int[76]), .D(DB_scan[77]), .Q(QB_int[77]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB78 (.CLK(CLKB), .SE(SEB), .SI(QB_int[77]), .D(DB_scan[78]), .Q(QB_int[78]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB79 (.CLK(CLKB), .SE(SEB), .SI(QB_int[78]), .D(DB_scan[79]), .Q(QB_int[79]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB80 (.CLK(CLKB), .SE(SEB), .SI(QB_int[79]), .D(DB_scan[80]), .Q(QB_int[80]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB81 (.CLK(CLKB), .SE(SEB), .SI(QB_int[80]), .D(DB_scan[81]), .Q(QB_int[81]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB82 (.CLK(CLKB), .SE(SEB), .SI(QB_int[81]), .D(DB_scan[82]), .Q(QB_int[82]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB83 (.CLK(CLKB), .SE(SEB), .SI(QB_int[82]), .D(DB_scan[83]), .Q(QB_int[83]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB84 (.CLK(CLKB), .SE(SEB), .SI(QB_int[83]), .D(DB_scan[84]), .Q(QB_int[84]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB85 (.CLK(CLKB), .SE(SEB), .SI(QB_int[84]), .D(DB_scan[85]), .Q(QB_int[85]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB86 (.CLK(CLKB), .SE(SEB), .SI(QB_int[85]), .D(DB_scan[86]), .Q(QB_int[86]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB87 (.CLK(CLKB), .SE(SEB), .SI(QB_int[86]), .D(DB_scan[87]), .Q(QB_int[87]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB88 (.CLK(CLKB), .SE(SEB), .SI(QB_int[87]), .D(DB_scan[88]), .Q(QB_int[88]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB89 (.CLK(CLKB), .SE(SEB), .SI(QB_int[88]), .D(DB_scan[89]), .Q(QB_int[89]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB90 (.CLK(CLKB), .SE(SEB), .SI(QB_int[89]), .D(DB_scan[90]), .Q(QB_int[90]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB91 (.CLK(CLKB), .SE(SEB), .SI(QB_int[90]), .D(DB_scan[91]), .Q(QB_int[91]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB92 (.CLK(CLKB), .SE(SEB), .SI(QB_int[91]), .D(DB_scan[92]), .Q(QB_int[92]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB93 (.CLK(CLKB), .SE(SEB), .SI(QB_int[92]), .D(DB_scan[93]), .Q(QB_int[93]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB94 (.CLK(CLKB), .SE(SEB), .SI(QB_int[93]), .D(DB_scan[94]), .Q(QB_int[94]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB95 (.CLK(CLKB), .SE(SEB), .SI(QB_int[94]), .D(DB_scan[95]), .Q(QB_int[95]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB96 (.CLK(CLKB), .SE(SEB), .SI(QB_int[95]), .D(DB_scan[96]), .Q(QB_int[96]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB97 (.CLK(CLKB), .SE(SEB), .SI(QB_int[96]), .D(DB_scan[97]), .Q(QB_int[97]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB98 (.CLK(CLKB), .SE(SEB), .SI(QB_int[97]), .D(DB_scan[98]), .Q(QB_int[98]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB99 (.CLK(CLKB), .SE(SEB), .SI(QB_int[98]), .D(DB_scan[99]), .Q(QB_int[99]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB100 (.CLK(CLKB), .SE(SEB), .SI(QB_int[99]), .D(DB_scan[100]), .Q(QB_int[100]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB101 (.CLK(CLKB), .SE(SEB), .SI(QB_int[100]), .D(DB_scan[101]), .Q(QB_int[101]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB102 (.CLK(CLKB), .SE(SEB), .SI(QB_int[101]), .D(DB_scan[102]), .Q(QB_int[102]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB103 (.CLK(CLKB), .SE(SEB), .SI(QB_int[102]), .D(DB_scan[103]), .Q(QB_int[103]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB104 (.CLK(CLKB), .SE(SEB), .SI(QB_int[103]), .D(DB_scan[104]), .Q(QB_int[104]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB105 (.CLK(CLKB), .SE(SEB), .SI(QB_int[104]), .D(DB_scan[105]), .Q(QB_int[105]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB106 (.CLK(CLKB), .SE(SEB), .SI(QB_int[105]), .D(DB_scan[106]), .Q(QB_int[106]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB107 (.CLK(CLKB), .SE(SEB), .SI(QB_int[106]), .D(DB_scan[107]), .Q(QB_int[107]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB108 (.CLK(CLKB), .SE(SEB), .SI(QB_int[107]), .D(DB_scan[108]), .Q(QB_int[108]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB109 (.CLK(CLKB), .SE(SEB), .SI(QB_int[108]), .D(DB_scan[109]), .Q(QB_int[109]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB110 (.CLK(CLKB), .SE(SEB), .SI(QB_int[109]), .D(DB_scan[110]), .Q(QB_int[110]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB111 (.CLK(CLKB), .SE(SEB), .SI(QB_int[110]), .D(DB_scan[111]), .Q(QB_int[111]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB112 (.CLK(CLKB), .SE(SEB), .SI(QB_int[111]), .D(DB_scan[112]), .Q(QB_int[112]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB113 (.CLK(CLKB), .SE(SEB), .SI(QB_int[112]), .D(DB_scan[113]), .Q(QB_int[113]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB114 (.CLK(CLKB), .SE(SEB), .SI(QB_int[113]), .D(DB_scan[114]), .Q(QB_int[114]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB115 (.CLK(CLKB), .SE(SEB), .SI(QB_int[114]), .D(DB_scan[115]), .Q(QB_int[115]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB116 (.CLK(CLKB), .SE(SEB), .SI(QB_int[115]), .D(DB_scan[116]), .Q(QB_int[116]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB117 (.CLK(CLKB), .SE(SEB), .SI(QB_int[116]), .D(DB_scan[117]), .Q(QB_int[117]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB118 (.CLK(CLKB), .SE(SEB), .SI(QB_int[117]), .D(DB_scan[118]), .Q(QB_int[118]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB119 (.CLK(CLKB), .SE(SEB), .SI(QB_int[118]), .D(DB_scan[119]), .Q(QB_int[119]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB120 (.CLK(CLKB), .SE(SEB), .SI(QB_int[119]), .D(DB_scan[120]), .Q(QB_int[120]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB121 (.CLK(CLKB), .SE(SEB), .SI(QB_int[120]), .D(DB_scan[121]), .Q(QB_int[121]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB122 (.CLK(CLKB), .SE(SEB), .SI(QB_int[121]), .D(DB_scan[122]), .Q(QB_int[122]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB123 (.CLK(CLKB), .SE(SEB), .SI(QB_int[122]), .D(DB_scan[123]), .Q(QB_int[123]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB124 (.CLK(CLKB), .SE(SEB), .SI(QB_int[123]), .D(DB_scan[124]), .Q(QB_int[124]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB125 (.CLK(CLKB), .SE(SEB), .SI(QB_int[124]), .D(DB_scan[125]), .Q(QB_int[125]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB126 (.CLK(CLKB), .SE(SEB), .SI(QB_int[125]), .D(DB_scan[126]), .Q(QB_int[126]), .Xout(XoutBiff)); + rf2_32x128_wm1_scanflop uDQB127 (.CLK(CLKB), .SE(SEB), .SI(QB_int[126]), .D(DB_scan[127]), .Q(QB_int[127]), .Xout(XoutBiff)); + assign SOB[0] = QB_int[0]; + assign SOB[1] = QB_int[127]; +endmodule +`undef read_write +`disable_portfaults +`nosuppress_faults diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v new file mode 100644 index 00000000..42d98a78 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v @@ -0,0 +1,29949 @@ +/* verilog_memcomp Version: c0.4.0-EAC */ +/* common_memcomp Version: c0.1.0-EAC */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// Verilog model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x128_wm1 +// Words: 32 +// Bits: 128 +// Mux: 2 +// Drive: 6 +// Write Mask: On +// Write Thru: Off +// Extra Margin Adjustment: On +// Test Muxes On +// Power Gating: Off +// Retention: On +// Pipeline: Off +// Read Disturb Test: Off +// +// Creation Date: Thu Oct 17 15:32:08 2019 +// Version: r4p0 +// +// Modeling Assumptions: This model supports full gate level simulation +// including proper x-handling and timing check behavior. Unit +// delay timing is included in the model. Back-annotation of SDF +// (v3.0 or v2.1) is supported. SDF can be created utilyzing the delay +// calculation views provided with this generator and supported +// delay calculators. All buses are modeled [MSB:LSB]. All +// ports are padded with Verilog primitives. +// +// Modeling Limitations: None. +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// +`timescale 1 ns/1 ps +`define ARM_MEM_PROP 1.000 +`define ARM_MEM_RETAIN 1.000 +`define ARM_MEM_PERIOD 3.000 +`define ARM_MEM_WIDTH 1.000 +`define ARM_MEM_SETUP 1.000 +`define ARM_MEM_HOLD 0.500 +`define ARM_MEM_COLLISION 3.000 +// If ARM_HVM_MODEL is defined at Simulator Command Line, it Selects the Hierarchical Verilog Model +`ifdef ARM_HVM_MODEL + + +module datapath_latch_rf2_32x128_wm1 (CLK,Q_update,SE,SI,D,DFTRAMBYP,mem_path,XQ,Q); + input CLK,Q_update,SE,SI,D,DFTRAMBYP,mem_path,XQ; + output Q; + + reg D_int; + reg Q; + + // Model PHI2 portion + always @(CLK or SE or SI or D) begin + if (CLK === 1'b0) begin + if (SE===1'b1) + D_int=SI; + else if (SE===1'bx) + D_int=1'bx; + else + D_int=D; + end + end + + // model output side of RAM latch + always @(posedge Q_update or posedge XQ) begin + #0; + if (XQ===1'b0) begin + if (DFTRAMBYP===1'b1) + Q=D_int; + else + Q=mem_path; + end + else + Q=1'bx; + end +endmodule // datapath_latch_rf2_32x128_wm1 + +// If ARM_UD_MODEL is defined at Simulator Command Line, it Selects the Fast Functional Model +`ifdef ARM_UD_MODEL + +// Following parameter Values can be overridden at Simulator Command Line. + +// ARM_UD_DP Defines the delay through Data Paths, for Memory Models it represents BIST MUX output delays. +`ifdef ARM_UD_DP +`else +`define ARM_UD_DP #0.001 +`endif +// ARM_UD_CP Defines the delay through Clock Path Cells, for Memory Models it is not used. +`ifdef ARM_UD_CP +`else +`define ARM_UD_CP +`endif +// ARM_UD_SEQ Defines the delay through the Memory, for Memory Models it is used for CLK->Q delays. +`ifdef ARM_UD_SEQ +`else +`define ARM_UD_SEQ #0.01 +`endif + +`celldefine +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS +module rf2_32x128_wm1 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, + SOB, CLKA, CENA, AA, CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, + TAA, TENB, TCENB, TWENB, TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x128_wm1 (CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, + CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TWENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + parameter ASSERT_PREFIX = ""; + parameter BITS = 128; + parameter WORDS = 32; + parameter MUX = 2; + parameter MEM_WIDTH = 256; // redun block size 2, 128 on left, 128 on right + parameter MEM_HEIGHT = 16; + parameter WP_SIZE = 1 ; + parameter UPM_WIDTH = 3; + parameter UPMW_WIDTH = 0; + parameter UPMS_WIDTH = 1; + + output CENYA; + output [4:0] AYA; + output CENYB; + output [127:0] WENYB; + output [4:0] AYB; + output [127:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [127:0] WENB; + input [4:0] AB; + input [127:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [127:0] TWENB; + input [4:0] TAB; + input [127:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + + reg pre_charge_st; + reg pre_charge_st_a; + reg pre_charge_st_b; + integer row_address; + integer mux_address; + initial row_address = 0; + initial mux_address = 0; + reg [255:0] mem [0:15]; + reg [255:0] row, row_t; + reg LAST_CLKA; + reg [255:0] row_mask; + reg [255:0] new_data; + reg [255:0] data_out; + reg [127:0] readLatch0; + reg [127:0] shifted_readLatch0; + reg read_mux_sel0_p2; + reg [127:0] readLatch1; + reg [127:0] shifted_readLatch1; + reg read_mux_sel1_p2; + reg LAST_CLKB; + wire [127:0] QA_int; + reg XQA, QA_update; + reg [127:0] mem_path; + reg [127:0] partial_mask; + reg XDB_sh, DB_sh_update; + wire [127:0] DB_int_bmux; + reg [127:0] writeEnable; + real previous_CLKA; + real previous_CLKB; + initial previous_CLKA = 0; + initial previous_CLKB = 0; + reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC; + reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1; + reg cont_flag0_int; + reg cont_flag1_int; + initial cont_flag0_int = 1'b0; + initial cont_flag1_int = 1'b0; + reg clk0_int; + reg clk1_int; + + wire CENYA_; + wire [4:0] AYA_; + wire CENYB_; + wire [127:0] WENYB_; + wire [4:0] AYB_; + wire [127:0] QA_; + wire [1:0] SOA_; + wire [1:0] SOB_; + wire CLKA_; + wire CENA_; + reg CENA_int; + reg CENA_p2; + wire [4:0] AA_; + reg [4:0] AA_int; + wire CLKB_; + wire CENB_; + reg CENB_int; + reg CENB_p2; + wire [127:0] WENB_; + reg [127:0] WENB_int; + wire [4:0] AB_; + reg [4:0] AB_int; + wire [127:0] DB_; + reg [127:0] DB_int; + wire [127:0] DB_int_sh; + reg [127:0] DB_int_sh_int; + wire [2:0] EMAA_; + reg [2:0] EMAA_int; + wire EMASA_; + reg EMASA_int; + wire [2:0] EMAB_; + reg [2:0] EMAB_int; + wire TENA_; + reg TENA_int; + wire TCENA_; + reg TCENA_int; + reg TCENA_p2; + wire [4:0] TAA_; + reg [4:0] TAA_int; + wire TENB_; + reg TENB_int; + wire TCENB_; + reg TCENB_int; + reg TCENB_p2; + wire [127:0] TWENB_; + reg [127:0] TWENB_int; + wire [4:0] TAB_; + reg [4:0] TAB_int; + wire [127:0] TDB_; + reg [127:0] TDB_int; + wire RET1N_; + reg RET1N_int; + wire [1:0] SIA_; + wire [1:0] SIA_int; + wire SEA_; + reg SEA_int; + wire DFTRAMBYP_; + reg DFTRAMBYP_int; + reg DFTRAMBYP_p2; + wire [1:0] SIB_; + reg [1:0] SIB_int; + wire SEB_; + reg SEB_int; + wire COLLDISN_; + reg COLLDISN_int; + + assign CENYA = CENYA_; + assign AYA[0] = AYA_[0]; + assign AYA[1] = AYA_[1]; + assign AYA[2] = AYA_[2]; + assign AYA[3] = AYA_[3]; + assign AYA[4] = AYA_[4]; + assign CENYB = CENYB_; + assign WENYB[0] = WENYB_[0]; + assign WENYB[1] = WENYB_[1]; + assign WENYB[2] = WENYB_[2]; + assign WENYB[3] = WENYB_[3]; + assign WENYB[4] = WENYB_[4]; + assign WENYB[5] = WENYB_[5]; + assign WENYB[6] = WENYB_[6]; + assign WENYB[7] = WENYB_[7]; + assign WENYB[8] = WENYB_[8]; + assign WENYB[9] = WENYB_[9]; + assign WENYB[10] = WENYB_[10]; + assign WENYB[11] = WENYB_[11]; + assign WENYB[12] = WENYB_[12]; + assign WENYB[13] = WENYB_[13]; + assign WENYB[14] = WENYB_[14]; + assign WENYB[15] = WENYB_[15]; + assign WENYB[16] = WENYB_[16]; + assign WENYB[17] = WENYB_[17]; + assign WENYB[18] = WENYB_[18]; + assign WENYB[19] = WENYB_[19]; + assign WENYB[20] = WENYB_[20]; + assign WENYB[21] = WENYB_[21]; + assign WENYB[22] = WENYB_[22]; + assign WENYB[23] = WENYB_[23]; + assign WENYB[24] = WENYB_[24]; + assign WENYB[25] = WENYB_[25]; + assign WENYB[26] = WENYB_[26]; + assign WENYB[27] = WENYB_[27]; + assign WENYB[28] = WENYB_[28]; + assign WENYB[29] = WENYB_[29]; + assign WENYB[30] = WENYB_[30]; + assign WENYB[31] = WENYB_[31]; + assign WENYB[32] = WENYB_[32]; + assign WENYB[33] = WENYB_[33]; + assign WENYB[34] = WENYB_[34]; + assign WENYB[35] = WENYB_[35]; + assign WENYB[36] = WENYB_[36]; + assign WENYB[37] = WENYB_[37]; + assign WENYB[38] = WENYB_[38]; + assign WENYB[39] = WENYB_[39]; + assign WENYB[40] = WENYB_[40]; + assign WENYB[41] = WENYB_[41]; + assign WENYB[42] = WENYB_[42]; + assign WENYB[43] = WENYB_[43]; + assign WENYB[44] = WENYB_[44]; + assign WENYB[45] = WENYB_[45]; + assign WENYB[46] = WENYB_[46]; + assign WENYB[47] = WENYB_[47]; + assign WENYB[48] = WENYB_[48]; + assign WENYB[49] = WENYB_[49]; + assign WENYB[50] = WENYB_[50]; + assign WENYB[51] = WENYB_[51]; + assign WENYB[52] = WENYB_[52]; + assign WENYB[53] = WENYB_[53]; + assign WENYB[54] = WENYB_[54]; + assign WENYB[55] = WENYB_[55]; + assign WENYB[56] = WENYB_[56]; + assign WENYB[57] = WENYB_[57]; + assign WENYB[58] = WENYB_[58]; + assign WENYB[59] = WENYB_[59]; + assign WENYB[60] = WENYB_[60]; + assign WENYB[61] = WENYB_[61]; + assign WENYB[62] = WENYB_[62]; + assign WENYB[63] = WENYB_[63]; + assign WENYB[64] = WENYB_[64]; + assign WENYB[65] = WENYB_[65]; + assign WENYB[66] = WENYB_[66]; + assign WENYB[67] = WENYB_[67]; + assign WENYB[68] = WENYB_[68]; + assign WENYB[69] = WENYB_[69]; + assign WENYB[70] = WENYB_[70]; + assign WENYB[71] = WENYB_[71]; + assign WENYB[72] = WENYB_[72]; + assign WENYB[73] = WENYB_[73]; + assign WENYB[74] = WENYB_[74]; + assign WENYB[75] = WENYB_[75]; + assign WENYB[76] = WENYB_[76]; + assign WENYB[77] = WENYB_[77]; + assign WENYB[78] = WENYB_[78]; + assign WENYB[79] = WENYB_[79]; + assign WENYB[80] = WENYB_[80]; + assign WENYB[81] = WENYB_[81]; + assign WENYB[82] = WENYB_[82]; + assign WENYB[83] = WENYB_[83]; + assign WENYB[84] = WENYB_[84]; + assign WENYB[85] = WENYB_[85]; + assign WENYB[86] = WENYB_[86]; + assign WENYB[87] = WENYB_[87]; + assign WENYB[88] = WENYB_[88]; + assign WENYB[89] = WENYB_[89]; + assign WENYB[90] = WENYB_[90]; + assign WENYB[91] = WENYB_[91]; + assign WENYB[92] = WENYB_[92]; + assign WENYB[93] = WENYB_[93]; + assign WENYB[94] = WENYB_[94]; + assign WENYB[95] = WENYB_[95]; + assign WENYB[96] = WENYB_[96]; + assign WENYB[97] = WENYB_[97]; + assign WENYB[98] = WENYB_[98]; + assign WENYB[99] = WENYB_[99]; + assign WENYB[100] = WENYB_[100]; + assign WENYB[101] = WENYB_[101]; + assign WENYB[102] = WENYB_[102]; + assign WENYB[103] = WENYB_[103]; + assign WENYB[104] = WENYB_[104]; + assign WENYB[105] = WENYB_[105]; + assign WENYB[106] = WENYB_[106]; + assign WENYB[107] = WENYB_[107]; + assign WENYB[108] = WENYB_[108]; + assign WENYB[109] = WENYB_[109]; + assign WENYB[110] = WENYB_[110]; + assign WENYB[111] = WENYB_[111]; + assign WENYB[112] = WENYB_[112]; + assign WENYB[113] = WENYB_[113]; + assign WENYB[114] = WENYB_[114]; + assign WENYB[115] = WENYB_[115]; + assign WENYB[116] = WENYB_[116]; + assign WENYB[117] = WENYB_[117]; + assign WENYB[118] = WENYB_[118]; + assign WENYB[119] = WENYB_[119]; + assign WENYB[120] = WENYB_[120]; + assign WENYB[121] = WENYB_[121]; + assign WENYB[122] = WENYB_[122]; + assign WENYB[123] = WENYB_[123]; + assign WENYB[124] = WENYB_[124]; + assign WENYB[125] = WENYB_[125]; + assign WENYB[126] = WENYB_[126]; + assign WENYB[127] = WENYB_[127]; + assign AYB[0] = AYB_[0]; + assign AYB[1] = AYB_[1]; + assign AYB[2] = AYB_[2]; + assign AYB[3] = AYB_[3]; + assign AYB[4] = AYB_[4]; + assign QA[0] = QA_[0]; + assign QA[1] = QA_[1]; + assign QA[2] = QA_[2]; + assign QA[3] = QA_[3]; + assign QA[4] = QA_[4]; + assign QA[5] = QA_[5]; + assign QA[6] = QA_[6]; + assign QA[7] = QA_[7]; + assign QA[8] = QA_[8]; + assign QA[9] = QA_[9]; + assign QA[10] = QA_[10]; + assign QA[11] = QA_[11]; + assign QA[12] = QA_[12]; + assign QA[13] = QA_[13]; + assign QA[14] = QA_[14]; + assign QA[15] = QA_[15]; + assign QA[16] = QA_[16]; + assign QA[17] = QA_[17]; + assign QA[18] = QA_[18]; + assign QA[19] = QA_[19]; + assign QA[20] = QA_[20]; + assign QA[21] = QA_[21]; + assign QA[22] = QA_[22]; + assign QA[23] = QA_[23]; + assign QA[24] = QA_[24]; + assign QA[25] = QA_[25]; + assign QA[26] = QA_[26]; + assign QA[27] = QA_[27]; + assign QA[28] = QA_[28]; + assign QA[29] = QA_[29]; + assign QA[30] = QA_[30]; + assign QA[31] = QA_[31]; + assign QA[32] = QA_[32]; + assign QA[33] = QA_[33]; + assign QA[34] = QA_[34]; + assign QA[35] = QA_[35]; + assign QA[36] = QA_[36]; + assign QA[37] = QA_[37]; + assign QA[38] = QA_[38]; + assign QA[39] = QA_[39]; + assign QA[40] = QA_[40]; + assign QA[41] = QA_[41]; + assign QA[42] = QA_[42]; + assign QA[43] = QA_[43]; + assign QA[44] = QA_[44]; + assign QA[45] = QA_[45]; + assign QA[46] = QA_[46]; + assign QA[47] = QA_[47]; + assign QA[48] = QA_[48]; + assign QA[49] = QA_[49]; + assign QA[50] = QA_[50]; + assign QA[51] = QA_[51]; + assign QA[52] = QA_[52]; + assign QA[53] = QA_[53]; + assign QA[54] = QA_[54]; + assign QA[55] = QA_[55]; + assign QA[56] = QA_[56]; + assign QA[57] = QA_[57]; + assign QA[58] = QA_[58]; + assign QA[59] = QA_[59]; + assign QA[60] = QA_[60]; + assign QA[61] = QA_[61]; + assign QA[62] = QA_[62]; + assign QA[63] = QA_[63]; + assign QA[64] = QA_[64]; + assign QA[65] = QA_[65]; + assign QA[66] = QA_[66]; + assign QA[67] = QA_[67]; + assign QA[68] = QA_[68]; + assign QA[69] = QA_[69]; + assign QA[70] = QA_[70]; + assign QA[71] = QA_[71]; + assign QA[72] = QA_[72]; + assign QA[73] = QA_[73]; + assign QA[74] = QA_[74]; + assign QA[75] = QA_[75]; + assign QA[76] = QA_[76]; + assign QA[77] = QA_[77]; + assign QA[78] = QA_[78]; + assign QA[79] = QA_[79]; + assign QA[80] = QA_[80]; + assign QA[81] = QA_[81]; + assign QA[82] = QA_[82]; + assign QA[83] = QA_[83]; + assign QA[84] = QA_[84]; + assign QA[85] = QA_[85]; + assign QA[86] = QA_[86]; + assign QA[87] = QA_[87]; + assign QA[88] = QA_[88]; + assign QA[89] = QA_[89]; + assign QA[90] = QA_[90]; + assign QA[91] = QA_[91]; + assign QA[92] = QA_[92]; + assign QA[93] = QA_[93]; + assign QA[94] = QA_[94]; + assign QA[95] = QA_[95]; + assign QA[96] = QA_[96]; + assign QA[97] = QA_[97]; + assign QA[98] = QA_[98]; + assign QA[99] = QA_[99]; + assign QA[100] = QA_[100]; + assign QA[101] = QA_[101]; + assign QA[102] = QA_[102]; + assign QA[103] = QA_[103]; + assign QA[104] = QA_[104]; + assign QA[105] = QA_[105]; + assign QA[106] = QA_[106]; + assign QA[107] = QA_[107]; + assign QA[108] = QA_[108]; + assign QA[109] = QA_[109]; + assign QA[110] = QA_[110]; + assign QA[111] = QA_[111]; + assign QA[112] = QA_[112]; + assign QA[113] = QA_[113]; + assign QA[114] = QA_[114]; + assign QA[115] = QA_[115]; + assign QA[116] = QA_[116]; + assign QA[117] = QA_[117]; + assign QA[118] = QA_[118]; + assign QA[119] = QA_[119]; + assign QA[120] = QA_[120]; + assign QA[121] = QA_[121]; + assign QA[122] = QA_[122]; + assign QA[123] = QA_[123]; + assign QA[124] = QA_[124]; + assign QA[125] = QA_[125]; + assign QA[126] = QA_[126]; + assign QA[127] = QA_[127]; + assign SOA[0] = SOA_[0]; + assign SOA[1] = SOA_[1]; + assign SOB[0] = SOB_[0]; + assign SOB[1] = SOB_[1]; + assign CLKA_ = CLKA; + assign CENA_ = CENA; + assign AA_[0] = AA[0]; + assign AA_[1] = AA[1]; + assign AA_[2] = AA[2]; + assign AA_[3] = AA[3]; + assign AA_[4] = AA[4]; + assign CLKB_ = CLKB; + assign CENB_ = CENB; + assign WENB_[0] = WENB[0]; + assign WENB_[1] = WENB[1]; + assign WENB_[2] = WENB[2]; + assign WENB_[3] = WENB[3]; + assign WENB_[4] = WENB[4]; + assign WENB_[5] = WENB[5]; + assign WENB_[6] = WENB[6]; + assign WENB_[7] = WENB[7]; + assign WENB_[8] = WENB[8]; + assign WENB_[9] = WENB[9]; + assign WENB_[10] = WENB[10]; + assign WENB_[11] = WENB[11]; + assign WENB_[12] = WENB[12]; + assign WENB_[13] = WENB[13]; + assign WENB_[14] = WENB[14]; + assign WENB_[15] = WENB[15]; + assign WENB_[16] = WENB[16]; + assign WENB_[17] = WENB[17]; + assign WENB_[18] = WENB[18]; + assign WENB_[19] = WENB[19]; + assign WENB_[20] = WENB[20]; + assign WENB_[21] = WENB[21]; + assign WENB_[22] = WENB[22]; + assign WENB_[23] = WENB[23]; + assign WENB_[24] = WENB[24]; + assign WENB_[25] = WENB[25]; + assign WENB_[26] = WENB[26]; + assign WENB_[27] = WENB[27]; + assign WENB_[28] = WENB[28]; + assign WENB_[29] = WENB[29]; + assign WENB_[30] = WENB[30]; + assign WENB_[31] = WENB[31]; + assign WENB_[32] = WENB[32]; + assign WENB_[33] = WENB[33]; + assign WENB_[34] = WENB[34]; + assign WENB_[35] = WENB[35]; + assign WENB_[36] = WENB[36]; + assign WENB_[37] = WENB[37]; + assign WENB_[38] = WENB[38]; + assign WENB_[39] = WENB[39]; + assign WENB_[40] = WENB[40]; + assign WENB_[41] = WENB[41]; + assign WENB_[42] = WENB[42]; + assign WENB_[43] = WENB[43]; + assign WENB_[44] = WENB[44]; + assign WENB_[45] = WENB[45]; + assign WENB_[46] = WENB[46]; + assign WENB_[47] = WENB[47]; + assign WENB_[48] = WENB[48]; + assign WENB_[49] = WENB[49]; + assign WENB_[50] = WENB[50]; + assign WENB_[51] = WENB[51]; + assign WENB_[52] = WENB[52]; + assign WENB_[53] = WENB[53]; + assign WENB_[54] = WENB[54]; + assign WENB_[55] = WENB[55]; + assign WENB_[56] = WENB[56]; + assign WENB_[57] = WENB[57]; + assign WENB_[58] = WENB[58]; + assign WENB_[59] = WENB[59]; + assign WENB_[60] = WENB[60]; + assign WENB_[61] = WENB[61]; + assign WENB_[62] = WENB[62]; + assign WENB_[63] = WENB[63]; + assign WENB_[64] = WENB[64]; + assign WENB_[65] = WENB[65]; + assign WENB_[66] = WENB[66]; + assign WENB_[67] = WENB[67]; + assign WENB_[68] = WENB[68]; + assign WENB_[69] = WENB[69]; + assign WENB_[70] = WENB[70]; + assign WENB_[71] = WENB[71]; + assign WENB_[72] = WENB[72]; + assign WENB_[73] = WENB[73]; + assign WENB_[74] = WENB[74]; + assign WENB_[75] = WENB[75]; + assign WENB_[76] = WENB[76]; + assign WENB_[77] = WENB[77]; + assign WENB_[78] = WENB[78]; + assign WENB_[79] = WENB[79]; + assign WENB_[80] = WENB[80]; + assign WENB_[81] = WENB[81]; + assign WENB_[82] = WENB[82]; + assign WENB_[83] = WENB[83]; + assign WENB_[84] = WENB[84]; + assign WENB_[85] = WENB[85]; + assign WENB_[86] = WENB[86]; + assign WENB_[87] = WENB[87]; + assign WENB_[88] = WENB[88]; + assign WENB_[89] = WENB[89]; + assign WENB_[90] = WENB[90]; + assign WENB_[91] = WENB[91]; + assign WENB_[92] = WENB[92]; + assign WENB_[93] = WENB[93]; + assign WENB_[94] = WENB[94]; + assign WENB_[95] = WENB[95]; + assign WENB_[96] = WENB[96]; + assign WENB_[97] = WENB[97]; + assign WENB_[98] = WENB[98]; + assign WENB_[99] = WENB[99]; + assign WENB_[100] = WENB[100]; + assign WENB_[101] = WENB[101]; + assign WENB_[102] = WENB[102]; + assign WENB_[103] = WENB[103]; + assign WENB_[104] = WENB[104]; + assign WENB_[105] = WENB[105]; + assign WENB_[106] = WENB[106]; + assign WENB_[107] = WENB[107]; + assign WENB_[108] = WENB[108]; + assign WENB_[109] = WENB[109]; + assign WENB_[110] = WENB[110]; + assign WENB_[111] = WENB[111]; + assign WENB_[112] = WENB[112]; + assign WENB_[113] = WENB[113]; + assign WENB_[114] = WENB[114]; + assign WENB_[115] = WENB[115]; + assign WENB_[116] = WENB[116]; + assign WENB_[117] = WENB[117]; + assign WENB_[118] = WENB[118]; + assign WENB_[119] = WENB[119]; + assign WENB_[120] = WENB[120]; + assign WENB_[121] = WENB[121]; + assign WENB_[122] = WENB[122]; + assign WENB_[123] = WENB[123]; + assign WENB_[124] = WENB[124]; + assign WENB_[125] = WENB[125]; + assign WENB_[126] = WENB[126]; + assign WENB_[127] = WENB[127]; + assign AB_[0] = AB[0]; + assign AB_[1] = AB[1]; + assign AB_[2] = AB[2]; + assign AB_[3] = AB[3]; + assign AB_[4] = AB[4]; + assign DB_[0] = DB[0]; + assign DB_[1] = DB[1]; + assign DB_[2] = DB[2]; + assign DB_[3] = DB[3]; + assign DB_[4] = DB[4]; + assign DB_[5] = DB[5]; + assign DB_[6] = DB[6]; + assign DB_[7] = DB[7]; + assign DB_[8] = DB[8]; + assign DB_[9] = DB[9]; + assign DB_[10] = DB[10]; + assign DB_[11] = DB[11]; + assign DB_[12] = DB[12]; + assign DB_[13] = DB[13]; + assign DB_[14] = DB[14]; + assign DB_[15] = DB[15]; + assign DB_[16] = DB[16]; + assign DB_[17] = DB[17]; + assign DB_[18] = DB[18]; + assign DB_[19] = DB[19]; + assign DB_[20] = DB[20]; + assign DB_[21] = DB[21]; + assign DB_[22] = DB[22]; + assign DB_[23] = DB[23]; + assign DB_[24] = DB[24]; + assign DB_[25] = DB[25]; + assign DB_[26] = DB[26]; + assign DB_[27] = DB[27]; + assign DB_[28] = DB[28]; + assign DB_[29] = DB[29]; + assign DB_[30] = DB[30]; + assign DB_[31] = DB[31]; + assign DB_[32] = DB[32]; + assign DB_[33] = DB[33]; + assign DB_[34] = DB[34]; + assign DB_[35] = DB[35]; + assign DB_[36] = DB[36]; + assign DB_[37] = DB[37]; + assign DB_[38] = DB[38]; + assign DB_[39] = DB[39]; + assign DB_[40] = DB[40]; + assign DB_[41] = DB[41]; + assign DB_[42] = DB[42]; + assign DB_[43] = DB[43]; + assign DB_[44] = DB[44]; + assign DB_[45] = DB[45]; + assign DB_[46] = DB[46]; + assign DB_[47] = DB[47]; + assign DB_[48] = DB[48]; + assign DB_[49] = DB[49]; + assign DB_[50] = DB[50]; + assign DB_[51] = DB[51]; + assign DB_[52] = DB[52]; + assign DB_[53] = DB[53]; + assign DB_[54] = DB[54]; + assign DB_[55] = DB[55]; + assign DB_[56] = DB[56]; + assign DB_[57] = DB[57]; + assign DB_[58] = DB[58]; + assign DB_[59] = DB[59]; + assign DB_[60] = DB[60]; + assign DB_[61] = DB[61]; + assign DB_[62] = DB[62]; + assign DB_[63] = DB[63]; + assign DB_[64] = DB[64]; + assign DB_[65] = DB[65]; + assign DB_[66] = DB[66]; + assign DB_[67] = DB[67]; + assign DB_[68] = DB[68]; + assign DB_[69] = DB[69]; + assign DB_[70] = DB[70]; + assign DB_[71] = DB[71]; + assign DB_[72] = DB[72]; + assign DB_[73] = DB[73]; + assign DB_[74] = DB[74]; + assign DB_[75] = DB[75]; + assign DB_[76] = DB[76]; + assign DB_[77] = DB[77]; + assign DB_[78] = DB[78]; + assign DB_[79] = DB[79]; + assign DB_[80] = DB[80]; + assign DB_[81] = DB[81]; + assign DB_[82] = DB[82]; + assign DB_[83] = DB[83]; + assign DB_[84] = DB[84]; + assign DB_[85] = DB[85]; + assign DB_[86] = DB[86]; + assign DB_[87] = DB[87]; + assign DB_[88] = DB[88]; + assign DB_[89] = DB[89]; + assign DB_[90] = DB[90]; + assign DB_[91] = DB[91]; + assign DB_[92] = DB[92]; + assign DB_[93] = DB[93]; + assign DB_[94] = DB[94]; + assign DB_[95] = DB[95]; + assign DB_[96] = DB[96]; + assign DB_[97] = DB[97]; + assign DB_[98] = DB[98]; + assign DB_[99] = DB[99]; + assign DB_[100] = DB[100]; + assign DB_[101] = DB[101]; + assign DB_[102] = DB[102]; + assign DB_[103] = DB[103]; + assign DB_[104] = DB[104]; + assign DB_[105] = DB[105]; + assign DB_[106] = DB[106]; + assign DB_[107] = DB[107]; + assign DB_[108] = DB[108]; + assign DB_[109] = DB[109]; + assign DB_[110] = DB[110]; + assign DB_[111] = DB[111]; + assign DB_[112] = DB[112]; + assign DB_[113] = DB[113]; + assign DB_[114] = DB[114]; + assign DB_[115] = DB[115]; + assign DB_[116] = DB[116]; + assign DB_[117] = DB[117]; + assign DB_[118] = DB[118]; + assign DB_[119] = DB[119]; + assign DB_[120] = DB[120]; + assign DB_[121] = DB[121]; + assign DB_[122] = DB[122]; + assign DB_[123] = DB[123]; + assign DB_[124] = DB[124]; + assign DB_[125] = DB[125]; + assign DB_[126] = DB[126]; + assign DB_[127] = DB[127]; + assign EMAA_[0] = EMAA[0]; + assign EMAA_[1] = EMAA[1]; + assign EMAA_[2] = EMAA[2]; + assign EMASA_ = EMASA; + assign EMAB_[0] = EMAB[0]; + assign EMAB_[1] = EMAB[1]; + assign EMAB_[2] = EMAB[2]; + assign TENA_ = TENA; + assign TCENA_ = TCENA; + assign TAA_[0] = TAA[0]; + assign TAA_[1] = TAA[1]; + assign TAA_[2] = TAA[2]; + assign TAA_[3] = TAA[3]; + assign TAA_[4] = TAA[4]; + assign TENB_ = TENB; + assign TCENB_ = TCENB; + assign TWENB_[0] = TWENB[0]; + assign TWENB_[1] = TWENB[1]; + assign TWENB_[2] = TWENB[2]; + assign TWENB_[3] = TWENB[3]; + assign TWENB_[4] = TWENB[4]; + assign TWENB_[5] = TWENB[5]; + assign TWENB_[6] = TWENB[6]; + assign TWENB_[7] = TWENB[7]; + assign TWENB_[8] = TWENB[8]; + assign TWENB_[9] = TWENB[9]; + assign TWENB_[10] = TWENB[10]; + assign TWENB_[11] = TWENB[11]; + assign TWENB_[12] = TWENB[12]; + assign TWENB_[13] = TWENB[13]; + assign TWENB_[14] = TWENB[14]; + assign TWENB_[15] = TWENB[15]; + assign TWENB_[16] = TWENB[16]; + assign TWENB_[17] = TWENB[17]; + assign TWENB_[18] = TWENB[18]; + assign TWENB_[19] = TWENB[19]; + assign TWENB_[20] = TWENB[20]; + assign TWENB_[21] = TWENB[21]; + assign TWENB_[22] = TWENB[22]; + assign TWENB_[23] = TWENB[23]; + assign TWENB_[24] = TWENB[24]; + assign TWENB_[25] = TWENB[25]; + assign TWENB_[26] = TWENB[26]; + assign TWENB_[27] = TWENB[27]; + assign TWENB_[28] = TWENB[28]; + assign TWENB_[29] = TWENB[29]; + assign TWENB_[30] = TWENB[30]; + assign TWENB_[31] = TWENB[31]; + assign TWENB_[32] = TWENB[32]; + assign TWENB_[33] = TWENB[33]; + assign TWENB_[34] = TWENB[34]; + assign TWENB_[35] = TWENB[35]; + assign TWENB_[36] = TWENB[36]; + assign TWENB_[37] = TWENB[37]; + assign TWENB_[38] = TWENB[38]; + assign TWENB_[39] = TWENB[39]; + assign TWENB_[40] = TWENB[40]; + assign TWENB_[41] = TWENB[41]; + assign TWENB_[42] = TWENB[42]; + assign TWENB_[43] = TWENB[43]; + assign TWENB_[44] = TWENB[44]; + assign TWENB_[45] = TWENB[45]; + assign TWENB_[46] = TWENB[46]; + assign TWENB_[47] = TWENB[47]; + assign TWENB_[48] = TWENB[48]; + assign TWENB_[49] = TWENB[49]; + assign TWENB_[50] = TWENB[50]; + assign TWENB_[51] = TWENB[51]; + assign TWENB_[52] = TWENB[52]; + assign TWENB_[53] = TWENB[53]; + assign TWENB_[54] = TWENB[54]; + assign TWENB_[55] = TWENB[55]; + assign TWENB_[56] = TWENB[56]; + assign TWENB_[57] = TWENB[57]; + assign TWENB_[58] = TWENB[58]; + assign TWENB_[59] = TWENB[59]; + assign TWENB_[60] = TWENB[60]; + assign TWENB_[61] = TWENB[61]; + assign TWENB_[62] = TWENB[62]; + assign TWENB_[63] = TWENB[63]; + assign TWENB_[64] = TWENB[64]; + assign TWENB_[65] = TWENB[65]; + assign TWENB_[66] = TWENB[66]; + assign TWENB_[67] = TWENB[67]; + assign TWENB_[68] = TWENB[68]; + assign TWENB_[69] = TWENB[69]; + assign TWENB_[70] = TWENB[70]; + assign TWENB_[71] = TWENB[71]; + assign TWENB_[72] = TWENB[72]; + assign TWENB_[73] = TWENB[73]; + assign TWENB_[74] = TWENB[74]; + assign TWENB_[75] = TWENB[75]; + assign TWENB_[76] = TWENB[76]; + assign TWENB_[77] = TWENB[77]; + assign TWENB_[78] = TWENB[78]; + assign TWENB_[79] = TWENB[79]; + assign TWENB_[80] = TWENB[80]; + assign TWENB_[81] = TWENB[81]; + assign TWENB_[82] = TWENB[82]; + assign TWENB_[83] = TWENB[83]; + assign TWENB_[84] = TWENB[84]; + assign TWENB_[85] = TWENB[85]; + assign TWENB_[86] = TWENB[86]; + assign TWENB_[87] = TWENB[87]; + assign TWENB_[88] = TWENB[88]; + assign TWENB_[89] = TWENB[89]; + assign TWENB_[90] = TWENB[90]; + assign TWENB_[91] = TWENB[91]; + assign TWENB_[92] = TWENB[92]; + assign TWENB_[93] = TWENB[93]; + assign TWENB_[94] = TWENB[94]; + assign TWENB_[95] = TWENB[95]; + assign TWENB_[96] = TWENB[96]; + assign TWENB_[97] = TWENB[97]; + assign TWENB_[98] = TWENB[98]; + assign TWENB_[99] = TWENB[99]; + assign TWENB_[100] = TWENB[100]; + assign TWENB_[101] = TWENB[101]; + assign TWENB_[102] = TWENB[102]; + assign TWENB_[103] = TWENB[103]; + assign TWENB_[104] = TWENB[104]; + assign TWENB_[105] = TWENB[105]; + assign TWENB_[106] = TWENB[106]; + assign TWENB_[107] = TWENB[107]; + assign TWENB_[108] = TWENB[108]; + assign TWENB_[109] = TWENB[109]; + assign TWENB_[110] = TWENB[110]; + assign TWENB_[111] = TWENB[111]; + assign TWENB_[112] = TWENB[112]; + assign TWENB_[113] = TWENB[113]; + assign TWENB_[114] = TWENB[114]; + assign TWENB_[115] = TWENB[115]; + assign TWENB_[116] = TWENB[116]; + assign TWENB_[117] = TWENB[117]; + assign TWENB_[118] = TWENB[118]; + assign TWENB_[119] = TWENB[119]; + assign TWENB_[120] = TWENB[120]; + assign TWENB_[121] = TWENB[121]; + assign TWENB_[122] = TWENB[122]; + assign TWENB_[123] = TWENB[123]; + assign TWENB_[124] = TWENB[124]; + assign TWENB_[125] = TWENB[125]; + assign TWENB_[126] = TWENB[126]; + assign TWENB_[127] = TWENB[127]; + assign TAB_[0] = TAB[0]; + assign TAB_[1] = TAB[1]; + assign TAB_[2] = TAB[2]; + assign TAB_[3] = TAB[3]; + assign TAB_[4] = TAB[4]; + assign TDB_[0] = TDB[0]; + assign TDB_[1] = TDB[1]; + assign TDB_[2] = TDB[2]; + assign TDB_[3] = TDB[3]; + assign TDB_[4] = TDB[4]; + assign TDB_[5] = TDB[5]; + assign TDB_[6] = TDB[6]; + assign TDB_[7] = TDB[7]; + assign TDB_[8] = TDB[8]; + assign TDB_[9] = TDB[9]; + assign TDB_[10] = TDB[10]; + assign TDB_[11] = TDB[11]; + assign TDB_[12] = TDB[12]; + assign TDB_[13] = TDB[13]; + assign TDB_[14] = TDB[14]; + assign TDB_[15] = TDB[15]; + assign TDB_[16] = TDB[16]; + assign TDB_[17] = TDB[17]; + assign TDB_[18] = TDB[18]; + assign TDB_[19] = TDB[19]; + assign TDB_[20] = TDB[20]; + assign TDB_[21] = TDB[21]; + assign TDB_[22] = TDB[22]; + assign TDB_[23] = TDB[23]; + assign TDB_[24] = TDB[24]; + assign TDB_[25] = TDB[25]; + assign TDB_[26] = TDB[26]; + assign TDB_[27] = TDB[27]; + assign TDB_[28] = TDB[28]; + assign TDB_[29] = TDB[29]; + assign TDB_[30] = TDB[30]; + assign TDB_[31] = TDB[31]; + assign TDB_[32] = TDB[32]; + assign TDB_[33] = TDB[33]; + assign TDB_[34] = TDB[34]; + assign TDB_[35] = TDB[35]; + assign TDB_[36] = TDB[36]; + assign TDB_[37] = TDB[37]; + assign TDB_[38] = TDB[38]; + assign TDB_[39] = TDB[39]; + assign TDB_[40] = TDB[40]; + assign TDB_[41] = TDB[41]; + assign TDB_[42] = TDB[42]; + assign TDB_[43] = TDB[43]; + assign TDB_[44] = TDB[44]; + assign TDB_[45] = TDB[45]; + assign TDB_[46] = TDB[46]; + assign TDB_[47] = TDB[47]; + assign TDB_[48] = TDB[48]; + assign TDB_[49] = TDB[49]; + assign TDB_[50] = TDB[50]; + assign TDB_[51] = TDB[51]; + assign TDB_[52] = TDB[52]; + assign TDB_[53] = TDB[53]; + assign TDB_[54] = TDB[54]; + assign TDB_[55] = TDB[55]; + assign TDB_[56] = TDB[56]; + assign TDB_[57] = TDB[57]; + assign TDB_[58] = TDB[58]; + assign TDB_[59] = TDB[59]; + assign TDB_[60] = TDB[60]; + assign TDB_[61] = TDB[61]; + assign TDB_[62] = TDB[62]; + assign TDB_[63] = TDB[63]; + assign TDB_[64] = TDB[64]; + assign TDB_[65] = TDB[65]; + assign TDB_[66] = TDB[66]; + assign TDB_[67] = TDB[67]; + assign TDB_[68] = TDB[68]; + assign TDB_[69] = TDB[69]; + assign TDB_[70] = TDB[70]; + assign TDB_[71] = TDB[71]; + assign TDB_[72] = TDB[72]; + assign TDB_[73] = TDB[73]; + assign TDB_[74] = TDB[74]; + assign TDB_[75] = TDB[75]; + assign TDB_[76] = TDB[76]; + assign TDB_[77] = TDB[77]; + assign TDB_[78] = TDB[78]; + assign TDB_[79] = TDB[79]; + assign TDB_[80] = TDB[80]; + assign TDB_[81] = TDB[81]; + assign TDB_[82] = TDB[82]; + assign TDB_[83] = TDB[83]; + assign TDB_[84] = TDB[84]; + assign TDB_[85] = TDB[85]; + assign TDB_[86] = TDB[86]; + assign TDB_[87] = TDB[87]; + assign TDB_[88] = TDB[88]; + assign TDB_[89] = TDB[89]; + assign TDB_[90] = TDB[90]; + assign TDB_[91] = TDB[91]; + assign TDB_[92] = TDB[92]; + assign TDB_[93] = TDB[93]; + assign TDB_[94] = TDB[94]; + assign TDB_[95] = TDB[95]; + assign TDB_[96] = TDB[96]; + assign TDB_[97] = TDB[97]; + assign TDB_[98] = TDB[98]; + assign TDB_[99] = TDB[99]; + assign TDB_[100] = TDB[100]; + assign TDB_[101] = TDB[101]; + assign TDB_[102] = TDB[102]; + assign TDB_[103] = TDB[103]; + assign TDB_[104] = TDB[104]; + assign TDB_[105] = TDB[105]; + assign TDB_[106] = TDB[106]; + assign TDB_[107] = TDB[107]; + assign TDB_[108] = TDB[108]; + assign TDB_[109] = TDB[109]; + assign TDB_[110] = TDB[110]; + assign TDB_[111] = TDB[111]; + assign TDB_[112] = TDB[112]; + assign TDB_[113] = TDB[113]; + assign TDB_[114] = TDB[114]; + assign TDB_[115] = TDB[115]; + assign TDB_[116] = TDB[116]; + assign TDB_[117] = TDB[117]; + assign TDB_[118] = TDB[118]; + assign TDB_[119] = TDB[119]; + assign TDB_[120] = TDB[120]; + assign TDB_[121] = TDB[121]; + assign TDB_[122] = TDB[122]; + assign TDB_[123] = TDB[123]; + assign TDB_[124] = TDB[124]; + assign TDB_[125] = TDB[125]; + assign TDB_[126] = TDB[126]; + assign TDB_[127] = TDB[127]; + assign RET1N_ = RET1N; + assign SIA_[0] = SIA[0]; + assign SIA_[1] = SIA[1]; + assign SEA_ = SEA; + assign DFTRAMBYP_ = DFTRAMBYP; + assign SIB_[0] = SIB[0]; + assign SIB_[1] = SIB[1]; + assign SEB_ = SEB; + assign COLLDISN_ = COLLDISN; + + assign `ARM_UD_DP CENYA_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENA_ ? CENA_ : TCENA_)) : 1'bx; + assign `ARM_UD_DP AYA_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENA_ ? AA_ : TAA_)) : {5{1'bx}}; + assign `ARM_UD_DP CENYB_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENB_ ? CENB_ : TCENB_)) : 1'bx; + assign `ARM_UD_DP WENYB_ = (RET1N_ | pre_charge_st) ? ({128{DFTRAMBYP_}} & (TENB_ ? WENB_ : TWENB_)) : {128{1'bx}}; + assign `ARM_UD_DP AYB_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENB_ ? AB_ : TAB_)) : {5{1'bx}}; + assign `ARM_UD_SEQ QA_ = (RET1N_ | pre_charge_st) ? ((QA_int)) : {128{1'bx}}; + assign `ARM_UD_DP SOA_ = (RET1N_ | pre_charge_st) ? ({QA_[127], QA_[0]}) : {2{1'bx}}; + assign `ARM_UD_DP SOB_ = (RET1N_ | pre_charge_st) ? ({DB_int_sh[127], DB_int_sh[0]}) : {2{1'bx}}; + +// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS. +`ifdef INITIALIZE_MEMORY + integer i; + initial begin + #0; + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'b0}}; + end +`endif + always @ (EMAA_) begin + if(EMAA_ < 3) + $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time); + end + always @ (EMASA_) begin + if(EMASA_ < 0) + $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time); + end + always @ (EMAB_) begin + if(EMAB_ < 3) + $display("Warning: Set Value for EMAB doesn't match Default value 3 in %m at %0t", $time); + end + + task failedWrite; + input port_f; + integer i; + begin + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'bx}}; + end + endtask + + function isBitX; + input bitval; + begin + isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0; + end + endfunction + + function isBit1; + input bitval; + begin + isBit1 = ( bitval===1'b1 ) ? 1'b1 : 1'b0; + end + endfunction + + +task loadmem; + input [1000*8-1:0] filename; + reg [BITS-1:0] memld [0:WORDS-1]; + integer i; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + $readmemb(filename, memld); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[127], 1'b0, wordtemp[126], 1'b0, wordtemp[125], + 1'b0, wordtemp[124], 1'b0, wordtemp[123], 1'b0, wordtemp[122], 1'b0, wordtemp[121], + 1'b0, wordtemp[120], 1'b0, wordtemp[119], 1'b0, wordtemp[118], 1'b0, wordtemp[117], + 1'b0, wordtemp[116], 1'b0, wordtemp[115], 1'b0, wordtemp[114], 1'b0, wordtemp[113], + 1'b0, wordtemp[112], 1'b0, wordtemp[111], 1'b0, wordtemp[110], 1'b0, wordtemp[109], + 1'b0, wordtemp[108], 1'b0, wordtemp[107], 1'b0, wordtemp[106], 1'b0, wordtemp[105], + 1'b0, wordtemp[104], 1'b0, wordtemp[103], 1'b0, wordtemp[102], 1'b0, wordtemp[101], + 1'b0, wordtemp[100], 1'b0, wordtemp[99], 1'b0, wordtemp[98], 1'b0, wordtemp[97], + 1'b0, wordtemp[96], 1'b0, wordtemp[95], 1'b0, wordtemp[94], 1'b0, wordtemp[93], + 1'b0, wordtemp[92], 1'b0, wordtemp[91], 1'b0, wordtemp[90], 1'b0, wordtemp[89], + 1'b0, wordtemp[88], 1'b0, wordtemp[87], 1'b0, wordtemp[86], 1'b0, wordtemp[85], + 1'b0, wordtemp[84], 1'b0, wordtemp[83], 1'b0, wordtemp[82], 1'b0, wordtemp[81], + 1'b0, wordtemp[80], 1'b0, wordtemp[79], 1'b0, wordtemp[78], 1'b0, wordtemp[77], + 1'b0, wordtemp[76], 1'b0, wordtemp[75], 1'b0, wordtemp[74], 1'b0, wordtemp[73], + 1'b0, wordtemp[72], 1'b0, wordtemp[71], 1'b0, wordtemp[70], 1'b0, wordtemp[69], + 1'b0, wordtemp[68], 1'b0, wordtemp[67], 1'b0, wordtemp[66], 1'b0, wordtemp[65], + 1'b0, wordtemp[64], 1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61], + 1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57], + 1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53], + 1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49], + 1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45], + 1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41], + 1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37], + 1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33], + 1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29], + 1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25], + 1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21], + 1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17], + 1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], + 1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], + 1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], + 1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], + 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + end + endtask + +task dumpmem; + input [1000*8-1:0] filename_dump; + integer i, dump_file_desc; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + dump_file_desc = $fopen(filename_dump); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + data_out = (row >> mux_address); + mem_path = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + $fdisplay(dump_file_desc, "%b", QA_int); + end + end + $fclose(dump_file_desc); + end + endtask + +task loadaddr; + input [4:0] load_addr; + input [127:0] load_data; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + wordtemp = load_data; + Atemp = load_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[127], 1'b0, wordtemp[126], 1'b0, wordtemp[125], + 1'b0, wordtemp[124], 1'b0, wordtemp[123], 1'b0, wordtemp[122], 1'b0, wordtemp[121], + 1'b0, wordtemp[120], 1'b0, wordtemp[119], 1'b0, wordtemp[118], 1'b0, wordtemp[117], + 1'b0, wordtemp[116], 1'b0, wordtemp[115], 1'b0, wordtemp[114], 1'b0, wordtemp[113], + 1'b0, wordtemp[112], 1'b0, wordtemp[111], 1'b0, wordtemp[110], 1'b0, wordtemp[109], + 1'b0, wordtemp[108], 1'b0, wordtemp[107], 1'b0, wordtemp[106], 1'b0, wordtemp[105], + 1'b0, wordtemp[104], 1'b0, wordtemp[103], 1'b0, wordtemp[102], 1'b0, wordtemp[101], + 1'b0, wordtemp[100], 1'b0, wordtemp[99], 1'b0, wordtemp[98], 1'b0, wordtemp[97], + 1'b0, wordtemp[96], 1'b0, wordtemp[95], 1'b0, wordtemp[94], 1'b0, wordtemp[93], + 1'b0, wordtemp[92], 1'b0, wordtemp[91], 1'b0, wordtemp[90], 1'b0, wordtemp[89], + 1'b0, wordtemp[88], 1'b0, wordtemp[87], 1'b0, wordtemp[86], 1'b0, wordtemp[85], + 1'b0, wordtemp[84], 1'b0, wordtemp[83], 1'b0, wordtemp[82], 1'b0, wordtemp[81], + 1'b0, wordtemp[80], 1'b0, wordtemp[79], 1'b0, wordtemp[78], 1'b0, wordtemp[77], + 1'b0, wordtemp[76], 1'b0, wordtemp[75], 1'b0, wordtemp[74], 1'b0, wordtemp[73], + 1'b0, wordtemp[72], 1'b0, wordtemp[71], 1'b0, wordtemp[70], 1'b0, wordtemp[69], + 1'b0, wordtemp[68], 1'b0, wordtemp[67], 1'b0, wordtemp[66], 1'b0, wordtemp[65], + 1'b0, wordtemp[64], 1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61], + 1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57], + 1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53], + 1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49], + 1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45], + 1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41], + 1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37], + 1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33], + 1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29], + 1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25], + 1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21], + 1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17], + 1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], + 1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], + 1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], + 1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], + 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + endtask + +task dumpaddr; + output [127:0] dump_data; + input [4:0] dump_addr; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + Atemp = dump_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + data_out = (row >> mux_address); + mem_path = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + dump_data = QA_int; + end + end + endtask + + + task ReadA; + begin + if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'b1) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0 && (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAA_int & isBit1(DFTRAMBYP_int)), (EMASA_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if ((AA_int >= WORDS) && (CENA_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + XQA = 0 ? 1'b0 : 1'b1; QA_update = 0 ? 1'b0 : 1'b1; + end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if (DFTRAMBYP_int !== 1'b1) begin + mux_address = (AA_int & 1'b1); + row_address = (AA_int >> 1); + if (row_address > 15) + row = {256{1'bx}}; + else + row = mem[row_address]; + data_out = (row >> mux_address); + mem_path = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + end + if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'b0) begin + end else if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end + if( isBitX(DFTRAMBYP_int) ) begin + XQA = 1'b1; QA_update = 1'b1; + end + if( isBitX(SEA_int) && DFTRAMBYP_int === 1'b1 ) begin + XQA = 1'b1; QA_update = 1'b1; + end + if(isBitX(DFTRAMBYP_int)) begin + XQA = 1'b1; QA_update = 1'b1; + failedWrite(0); + end + end + end + endtask + + task WriteB; + begin + if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'b1) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0 && (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAB_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if ((AB_int >= WORDS) && (CENB_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end else if (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) + DB_int = {128{1'bx}}; + + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end + mux_address = (AB_int & 1'b1); + row_address = (AB_int >> 1); + if (DFTRAMBYP_int !== 1'b1) begin + if (row_address > 15) + row = {256{1'bx}}; + else + row = mem[row_address]; + end + if(isBitX(DFTRAMBYP_int)) begin + writeEnable = {128{1'bx}}; + DB_int = {128{1'bx}}; + end else + writeEnable = ~ {WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, DB_int[127], 1'b0, DB_int[126], 1'b0, DB_int[125], 1'b0, DB_int[124], + 1'b0, DB_int[123], 1'b0, DB_int[122], 1'b0, DB_int[121], 1'b0, DB_int[120], + 1'b0, DB_int[119], 1'b0, DB_int[118], 1'b0, DB_int[117], 1'b0, DB_int[116], + 1'b0, DB_int[115], 1'b0, DB_int[114], 1'b0, DB_int[113], 1'b0, DB_int[112], + 1'b0, DB_int[111], 1'b0, DB_int[110], 1'b0, DB_int[109], 1'b0, DB_int[108], + 1'b0, DB_int[107], 1'b0, DB_int[106], 1'b0, DB_int[105], 1'b0, DB_int[104], + 1'b0, DB_int[103], 1'b0, DB_int[102], 1'b0, DB_int[101], 1'b0, DB_int[100], + 1'b0, DB_int[99], 1'b0, DB_int[98], 1'b0, DB_int[97], 1'b0, DB_int[96], 1'b0, DB_int[95], + 1'b0, DB_int[94], 1'b0, DB_int[93], 1'b0, DB_int[92], 1'b0, DB_int[91], 1'b0, DB_int[90], + 1'b0, DB_int[89], 1'b0, DB_int[88], 1'b0, DB_int[87], 1'b0, DB_int[86], 1'b0, DB_int[85], + 1'b0, DB_int[84], 1'b0, DB_int[83], 1'b0, DB_int[82], 1'b0, DB_int[81], 1'b0, DB_int[80], + 1'b0, DB_int[79], 1'b0, DB_int[78], 1'b0, DB_int[77], 1'b0, DB_int[76], 1'b0, DB_int[75], + 1'b0, DB_int[74], 1'b0, DB_int[73], 1'b0, DB_int[72], 1'b0, DB_int[71], 1'b0, DB_int[70], + 1'b0, DB_int[69], 1'b0, DB_int[68], 1'b0, DB_int[67], 1'b0, DB_int[66], 1'b0, DB_int[65], + 1'b0, DB_int[64], 1'b0, DB_int[63], 1'b0, DB_int[62], 1'b0, DB_int[61], 1'b0, DB_int[60], + 1'b0, DB_int[59], 1'b0, DB_int[58], 1'b0, DB_int[57], 1'b0, DB_int[56], 1'b0, DB_int[55], + 1'b0, DB_int[54], 1'b0, DB_int[53], 1'b0, DB_int[52], 1'b0, DB_int[51], 1'b0, DB_int[50], + 1'b0, DB_int[49], 1'b0, DB_int[48], 1'b0, DB_int[47], 1'b0, DB_int[46], 1'b0, DB_int[45], + 1'b0, DB_int[44], 1'b0, DB_int[43], 1'b0, DB_int[42], 1'b0, DB_int[41], 1'b0, DB_int[40], + 1'b0, DB_int[39], 1'b0, DB_int[38], 1'b0, DB_int[37], 1'b0, DB_int[36], 1'b0, DB_int[35], + 1'b0, DB_int[34], 1'b0, DB_int[33], 1'b0, DB_int[32], 1'b0, DB_int[31], 1'b0, DB_int[30], + 1'b0, DB_int[29], 1'b0, DB_int[28], 1'b0, DB_int[27], 1'b0, DB_int[26], 1'b0, DB_int[25], + 1'b0, DB_int[24], 1'b0, DB_int[23], 1'b0, DB_int[22], 1'b0, DB_int[21], 1'b0, DB_int[20], + 1'b0, DB_int[19], 1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15], + 1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10], + 1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5], + 1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + if (DFTRAMBYP_int === 1'b1 && (SEB_int === 1'b0 || SEB_int === 1'bx)) begin + end else begin + mem[row_address] = row; + end + end + end + endtask + always @ (CENA_ or TCENA_ or TENA_ or DFTRAMBYP_ or CLKA_) begin + if(CLKA_ == 1'b0) begin + CENA_p2 = CENA_; + TCENA_p2 = TCENA_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (VDDCE) begin + if (VDDCE != 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time); + end + $display("In PowerDown Mode in %m at %0t", $time); + failedWrite(0); + end + if (VDDCE == 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDPE should be powered up after VDDCE in %m at %0t", $time); + $display("Illegal power up sequencing in %m at %0t", $time); + end + failedWrite(0); + end + end +`endif +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || TCENA_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKA_ === 1'bx)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_a = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_a = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(0); + end +`else + if (RET1N_ == 1'b0) begin +`endif + XQA = 1'b1; QA_update = 1'b1; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_a = 0; + pre_charge_st = 0; +`else + end else begin +`endif + XQA = 1'b1; QA_update = 1'b1; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + #0; + QA_update = 1'b0; + end + + always @ (CLKB_ or DFTRAMBYP_p2) begin + #0; + if(CLKB_ == 1'b1 && (DFTRAMBYP_int === 1'b1 || CENB_int != 1'b1)) begin + if (RET1N_ == 1'b1) begin + DB_sh_update = 1'b1; + end + end + end + + always @ CLKA_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if ((CLKA_ === 1'b1 || CLKA_ === 1'b0) && LAST_CLKA === 1'bx) begin + XQA = 1'b0; QA_update = 1'b0; + end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + end else begin + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (RET1N_ == 1'b1) begin + XQA = 1'b0; QA_update = 1'b1; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b0) begin + if (RET1N_ == 1'b1) begin + XQA = 1'b0; QA_update = 1'b1; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else begin + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + ReadA; + if (CENA_int === 1'b0) previous_CLKA = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + ReadA; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + mem_path = (partial_mask & {128{1'bx}}) | (~partial_mask & mem_path); + #0; + QA_update = 1'b0; + #0; + QA_update = 1'b1; + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int, 1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin + QA_update = 1'b0; + XQA = 1'b0; + end + end + LAST_CLKA = CLKA_; + end + + assign SIA_int = SEA_ ? SIA_ : {2{1'b0}}; + + datapath_latch_rf2_32x128_wm1 uDQA0 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[1]), .D(QA_int[1]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[0]), .XQ(XQA), .Q(QA_int[0])); + datapath_latch_rf2_32x128_wm1 uDQA1 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[2]), .D(QA_int[2]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[1]), .XQ(XQA), .Q(QA_int[1])); + datapath_latch_rf2_32x128_wm1 uDQA2 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[3]), .D(QA_int[3]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[2]), .XQ(XQA), .Q(QA_int[2])); + datapath_latch_rf2_32x128_wm1 uDQA3 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[4]), .D(QA_int[4]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[3]), .XQ(XQA), .Q(QA_int[3])); + datapath_latch_rf2_32x128_wm1 uDQA4 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[5]), .D(QA_int[5]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[4]), .XQ(XQA), .Q(QA_int[4])); + datapath_latch_rf2_32x128_wm1 uDQA5 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[6]), .D(QA_int[6]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[5]), .XQ(XQA), .Q(QA_int[5])); + datapath_latch_rf2_32x128_wm1 uDQA6 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[7]), .D(QA_int[7]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[6]), .XQ(XQA), .Q(QA_int[6])); + datapath_latch_rf2_32x128_wm1 uDQA7 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[8]), .D(QA_int[8]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[7]), .XQ(XQA), .Q(QA_int[7])); + datapath_latch_rf2_32x128_wm1 uDQA8 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[9]), .D(QA_int[9]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[8]), .XQ(XQA), .Q(QA_int[8])); + datapath_latch_rf2_32x128_wm1 uDQA9 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[10]), .D(QA_int[10]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[9]), .XQ(XQA), .Q(QA_int[9])); + datapath_latch_rf2_32x128_wm1 uDQA10 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[11]), .D(QA_int[11]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[10]), .XQ(XQA), .Q(QA_int[10])); + datapath_latch_rf2_32x128_wm1 uDQA11 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[12]), .D(QA_int[12]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[11]), .XQ(XQA), .Q(QA_int[11])); + datapath_latch_rf2_32x128_wm1 uDQA12 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[13]), .D(QA_int[13]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[12]), .XQ(XQA), .Q(QA_int[12])); + datapath_latch_rf2_32x128_wm1 uDQA13 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[14]), .D(QA_int[14]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[13]), .XQ(XQA), .Q(QA_int[13])); + datapath_latch_rf2_32x128_wm1 uDQA14 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[15]), .D(QA_int[15]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[14]), .XQ(XQA), .Q(QA_int[14])); + datapath_latch_rf2_32x128_wm1 uDQA15 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[16]), .D(QA_int[16]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[15]), .XQ(XQA), .Q(QA_int[15])); + datapath_latch_rf2_32x128_wm1 uDQA16 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[17]), .D(QA_int[17]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[16]), .XQ(XQA), .Q(QA_int[16])); + datapath_latch_rf2_32x128_wm1 uDQA17 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[18]), .D(QA_int[18]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[17]), .XQ(XQA), .Q(QA_int[17])); + datapath_latch_rf2_32x128_wm1 uDQA18 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[19]), .D(QA_int[19]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[18]), .XQ(XQA), .Q(QA_int[18])); + datapath_latch_rf2_32x128_wm1 uDQA19 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[20]), .D(QA_int[20]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[19]), .XQ(XQA), .Q(QA_int[19])); + datapath_latch_rf2_32x128_wm1 uDQA20 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[21]), .D(QA_int[21]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[20]), .XQ(XQA), .Q(QA_int[20])); + datapath_latch_rf2_32x128_wm1 uDQA21 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[22]), .D(QA_int[22]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[21]), .XQ(XQA), .Q(QA_int[21])); + datapath_latch_rf2_32x128_wm1 uDQA22 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[23]), .D(QA_int[23]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[22]), .XQ(XQA), .Q(QA_int[22])); + datapath_latch_rf2_32x128_wm1 uDQA23 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[24]), .D(QA_int[24]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[23]), .XQ(XQA), .Q(QA_int[23])); + datapath_latch_rf2_32x128_wm1 uDQA24 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[25]), .D(QA_int[25]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[24]), .XQ(XQA), .Q(QA_int[24])); + datapath_latch_rf2_32x128_wm1 uDQA25 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[26]), .D(QA_int[26]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[25]), .XQ(XQA), .Q(QA_int[25])); + datapath_latch_rf2_32x128_wm1 uDQA26 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[27]), .D(QA_int[27]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[26]), .XQ(XQA), .Q(QA_int[26])); + datapath_latch_rf2_32x128_wm1 uDQA27 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[28]), .D(QA_int[28]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[27]), .XQ(XQA), .Q(QA_int[27])); + datapath_latch_rf2_32x128_wm1 uDQA28 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[29]), .D(QA_int[29]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[28]), .XQ(XQA), .Q(QA_int[28])); + datapath_latch_rf2_32x128_wm1 uDQA29 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[30]), .D(QA_int[30]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[29]), .XQ(XQA), .Q(QA_int[29])); + datapath_latch_rf2_32x128_wm1 uDQA30 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[31]), .D(QA_int[31]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[30]), .XQ(XQA), .Q(QA_int[30])); + datapath_latch_rf2_32x128_wm1 uDQA31 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[32]), .D(QA_int[32]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[31]), .XQ(XQA), .Q(QA_int[31])); + datapath_latch_rf2_32x128_wm1 uDQA32 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[33]), .D(QA_int[33]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[32]), .XQ(XQA), .Q(QA_int[32])); + datapath_latch_rf2_32x128_wm1 uDQA33 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[34]), .D(QA_int[34]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[33]), .XQ(XQA), .Q(QA_int[33])); + datapath_latch_rf2_32x128_wm1 uDQA34 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[35]), .D(QA_int[35]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[34]), .XQ(XQA), .Q(QA_int[34])); + datapath_latch_rf2_32x128_wm1 uDQA35 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[36]), .D(QA_int[36]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[35]), .XQ(XQA), .Q(QA_int[35])); + datapath_latch_rf2_32x128_wm1 uDQA36 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[37]), .D(QA_int[37]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[36]), .XQ(XQA), .Q(QA_int[36])); + datapath_latch_rf2_32x128_wm1 uDQA37 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[38]), .D(QA_int[38]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[37]), .XQ(XQA), .Q(QA_int[37])); + datapath_latch_rf2_32x128_wm1 uDQA38 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[39]), .D(QA_int[39]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[38]), .XQ(XQA), .Q(QA_int[38])); + datapath_latch_rf2_32x128_wm1 uDQA39 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[40]), .D(QA_int[40]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[39]), .XQ(XQA), .Q(QA_int[39])); + datapath_latch_rf2_32x128_wm1 uDQA40 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[41]), .D(QA_int[41]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[40]), .XQ(XQA), .Q(QA_int[40])); + datapath_latch_rf2_32x128_wm1 uDQA41 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[42]), .D(QA_int[42]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[41]), .XQ(XQA), .Q(QA_int[41])); + datapath_latch_rf2_32x128_wm1 uDQA42 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[43]), .D(QA_int[43]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[42]), .XQ(XQA), .Q(QA_int[42])); + datapath_latch_rf2_32x128_wm1 uDQA43 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[44]), .D(QA_int[44]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[43]), .XQ(XQA), .Q(QA_int[43])); + datapath_latch_rf2_32x128_wm1 uDQA44 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[45]), .D(QA_int[45]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[44]), .XQ(XQA), .Q(QA_int[44])); + datapath_latch_rf2_32x128_wm1 uDQA45 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[46]), .D(QA_int[46]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[45]), .XQ(XQA), .Q(QA_int[45])); + datapath_latch_rf2_32x128_wm1 uDQA46 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[47]), .D(QA_int[47]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[46]), .XQ(XQA), .Q(QA_int[46])); + datapath_latch_rf2_32x128_wm1 uDQA47 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[48]), .D(QA_int[48]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[47]), .XQ(XQA), .Q(QA_int[47])); + datapath_latch_rf2_32x128_wm1 uDQA48 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[49]), .D(QA_int[49]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[48]), .XQ(XQA), .Q(QA_int[48])); + datapath_latch_rf2_32x128_wm1 uDQA49 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[50]), .D(QA_int[50]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[49]), .XQ(XQA), .Q(QA_int[49])); + datapath_latch_rf2_32x128_wm1 uDQA50 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[51]), .D(QA_int[51]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[50]), .XQ(XQA), .Q(QA_int[50])); + datapath_latch_rf2_32x128_wm1 uDQA51 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[52]), .D(QA_int[52]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[51]), .XQ(XQA), .Q(QA_int[51])); + datapath_latch_rf2_32x128_wm1 uDQA52 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[53]), .D(QA_int[53]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[52]), .XQ(XQA), .Q(QA_int[52])); + datapath_latch_rf2_32x128_wm1 uDQA53 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[54]), .D(QA_int[54]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[53]), .XQ(XQA), .Q(QA_int[53])); + datapath_latch_rf2_32x128_wm1 uDQA54 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[55]), .D(QA_int[55]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[54]), .XQ(XQA), .Q(QA_int[54])); + datapath_latch_rf2_32x128_wm1 uDQA55 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[56]), .D(QA_int[56]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[55]), .XQ(XQA), .Q(QA_int[55])); + datapath_latch_rf2_32x128_wm1 uDQA56 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[57]), .D(QA_int[57]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[56]), .XQ(XQA), .Q(QA_int[56])); + datapath_latch_rf2_32x128_wm1 uDQA57 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[58]), .D(QA_int[58]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[57]), .XQ(XQA), .Q(QA_int[57])); + datapath_latch_rf2_32x128_wm1 uDQA58 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[59]), .D(QA_int[59]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[58]), .XQ(XQA), .Q(QA_int[58])); + datapath_latch_rf2_32x128_wm1 uDQA59 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[60]), .D(QA_int[60]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[59]), .XQ(XQA), .Q(QA_int[59])); + datapath_latch_rf2_32x128_wm1 uDQA60 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[61]), .D(QA_int[61]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[60]), .XQ(XQA), .Q(QA_int[60])); + datapath_latch_rf2_32x128_wm1 uDQA61 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[62]), .D(QA_int[62]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[61]), .XQ(XQA), .Q(QA_int[61])); + datapath_latch_rf2_32x128_wm1 uDQA62 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[63]), .D(QA_int[63]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[62]), .XQ(XQA), .Q(QA_int[62])); + datapath_latch_rf2_32x128_wm1 uDQA63 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(SIA_int[0]), .D(1'b0), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[63]), .XQ(XQA), .Q(QA_int[63])); + datapath_latch_rf2_32x128_wm1 uDQA64 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(SIA_int[1]), .D(1'b0), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[64]), .XQ(XQA), .Q(QA_int[64])); + datapath_latch_rf2_32x128_wm1 uDQA65 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[64]), .D(QA_int[64]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[65]), .XQ(XQA), .Q(QA_int[65])); + datapath_latch_rf2_32x128_wm1 uDQA66 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[65]), .D(QA_int[65]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[66]), .XQ(XQA), .Q(QA_int[66])); + datapath_latch_rf2_32x128_wm1 uDQA67 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[66]), .D(QA_int[66]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[67]), .XQ(XQA), .Q(QA_int[67])); + datapath_latch_rf2_32x128_wm1 uDQA68 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[67]), .D(QA_int[67]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[68]), .XQ(XQA), .Q(QA_int[68])); + datapath_latch_rf2_32x128_wm1 uDQA69 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[68]), .D(QA_int[68]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[69]), .XQ(XQA), .Q(QA_int[69])); + datapath_latch_rf2_32x128_wm1 uDQA70 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[69]), .D(QA_int[69]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[70]), .XQ(XQA), .Q(QA_int[70])); + datapath_latch_rf2_32x128_wm1 uDQA71 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[70]), .D(QA_int[70]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[71]), .XQ(XQA), .Q(QA_int[71])); + datapath_latch_rf2_32x128_wm1 uDQA72 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[71]), .D(QA_int[71]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[72]), .XQ(XQA), .Q(QA_int[72])); + datapath_latch_rf2_32x128_wm1 uDQA73 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[72]), .D(QA_int[72]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[73]), .XQ(XQA), .Q(QA_int[73])); + datapath_latch_rf2_32x128_wm1 uDQA74 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[73]), .D(QA_int[73]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[74]), .XQ(XQA), .Q(QA_int[74])); + datapath_latch_rf2_32x128_wm1 uDQA75 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[74]), .D(QA_int[74]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[75]), .XQ(XQA), .Q(QA_int[75])); + datapath_latch_rf2_32x128_wm1 uDQA76 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[75]), .D(QA_int[75]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[76]), .XQ(XQA), .Q(QA_int[76])); + datapath_latch_rf2_32x128_wm1 uDQA77 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[76]), .D(QA_int[76]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[77]), .XQ(XQA), .Q(QA_int[77])); + datapath_latch_rf2_32x128_wm1 uDQA78 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[77]), .D(QA_int[77]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[78]), .XQ(XQA), .Q(QA_int[78])); + datapath_latch_rf2_32x128_wm1 uDQA79 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[78]), .D(QA_int[78]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[79]), .XQ(XQA), .Q(QA_int[79])); + datapath_latch_rf2_32x128_wm1 uDQA80 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[79]), .D(QA_int[79]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[80]), .XQ(XQA), .Q(QA_int[80])); + datapath_latch_rf2_32x128_wm1 uDQA81 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[80]), .D(QA_int[80]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[81]), .XQ(XQA), .Q(QA_int[81])); + datapath_latch_rf2_32x128_wm1 uDQA82 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[81]), .D(QA_int[81]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[82]), .XQ(XQA), .Q(QA_int[82])); + datapath_latch_rf2_32x128_wm1 uDQA83 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[82]), .D(QA_int[82]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[83]), .XQ(XQA), .Q(QA_int[83])); + datapath_latch_rf2_32x128_wm1 uDQA84 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[83]), .D(QA_int[83]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[84]), .XQ(XQA), .Q(QA_int[84])); + datapath_latch_rf2_32x128_wm1 uDQA85 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[84]), .D(QA_int[84]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[85]), .XQ(XQA), .Q(QA_int[85])); + datapath_latch_rf2_32x128_wm1 uDQA86 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[85]), .D(QA_int[85]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[86]), .XQ(XQA), .Q(QA_int[86])); + datapath_latch_rf2_32x128_wm1 uDQA87 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[86]), .D(QA_int[86]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[87]), .XQ(XQA), .Q(QA_int[87])); + datapath_latch_rf2_32x128_wm1 uDQA88 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[87]), .D(QA_int[87]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[88]), .XQ(XQA), .Q(QA_int[88])); + datapath_latch_rf2_32x128_wm1 uDQA89 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[88]), .D(QA_int[88]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[89]), .XQ(XQA), .Q(QA_int[89])); + datapath_latch_rf2_32x128_wm1 uDQA90 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[89]), .D(QA_int[89]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[90]), .XQ(XQA), .Q(QA_int[90])); + datapath_latch_rf2_32x128_wm1 uDQA91 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[90]), .D(QA_int[90]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[91]), .XQ(XQA), .Q(QA_int[91])); + datapath_latch_rf2_32x128_wm1 uDQA92 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[91]), .D(QA_int[91]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[92]), .XQ(XQA), .Q(QA_int[92])); + datapath_latch_rf2_32x128_wm1 uDQA93 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[92]), .D(QA_int[92]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[93]), .XQ(XQA), .Q(QA_int[93])); + datapath_latch_rf2_32x128_wm1 uDQA94 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[93]), .D(QA_int[93]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[94]), .XQ(XQA), .Q(QA_int[94])); + datapath_latch_rf2_32x128_wm1 uDQA95 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[94]), .D(QA_int[94]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[95]), .XQ(XQA), .Q(QA_int[95])); + datapath_latch_rf2_32x128_wm1 uDQA96 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[95]), .D(QA_int[95]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[96]), .XQ(XQA), .Q(QA_int[96])); + datapath_latch_rf2_32x128_wm1 uDQA97 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[96]), .D(QA_int[96]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[97]), .XQ(XQA), .Q(QA_int[97])); + datapath_latch_rf2_32x128_wm1 uDQA98 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[97]), .D(QA_int[97]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[98]), .XQ(XQA), .Q(QA_int[98])); + datapath_latch_rf2_32x128_wm1 uDQA99 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[98]), .D(QA_int[98]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[99]), .XQ(XQA), .Q(QA_int[99])); + datapath_latch_rf2_32x128_wm1 uDQA100 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[99]), .D(QA_int[99]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[100]), .XQ(XQA), .Q(QA_int[100])); + datapath_latch_rf2_32x128_wm1 uDQA101 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[100]), .D(QA_int[100]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[101]), .XQ(XQA), .Q(QA_int[101])); + datapath_latch_rf2_32x128_wm1 uDQA102 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[101]), .D(QA_int[101]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[102]), .XQ(XQA), .Q(QA_int[102])); + datapath_latch_rf2_32x128_wm1 uDQA103 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[102]), .D(QA_int[102]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[103]), .XQ(XQA), .Q(QA_int[103])); + datapath_latch_rf2_32x128_wm1 uDQA104 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[103]), .D(QA_int[103]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[104]), .XQ(XQA), .Q(QA_int[104])); + datapath_latch_rf2_32x128_wm1 uDQA105 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[104]), .D(QA_int[104]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[105]), .XQ(XQA), .Q(QA_int[105])); + datapath_latch_rf2_32x128_wm1 uDQA106 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[105]), .D(QA_int[105]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[106]), .XQ(XQA), .Q(QA_int[106])); + datapath_latch_rf2_32x128_wm1 uDQA107 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[106]), .D(QA_int[106]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[107]), .XQ(XQA), .Q(QA_int[107])); + datapath_latch_rf2_32x128_wm1 uDQA108 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[107]), .D(QA_int[107]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[108]), .XQ(XQA), .Q(QA_int[108])); + datapath_latch_rf2_32x128_wm1 uDQA109 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[108]), .D(QA_int[108]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[109]), .XQ(XQA), .Q(QA_int[109])); + datapath_latch_rf2_32x128_wm1 uDQA110 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[109]), .D(QA_int[109]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[110]), .XQ(XQA), .Q(QA_int[110])); + datapath_latch_rf2_32x128_wm1 uDQA111 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[110]), .D(QA_int[110]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[111]), .XQ(XQA), .Q(QA_int[111])); + datapath_latch_rf2_32x128_wm1 uDQA112 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[111]), .D(QA_int[111]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[112]), .XQ(XQA), .Q(QA_int[112])); + datapath_latch_rf2_32x128_wm1 uDQA113 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[112]), .D(QA_int[112]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[113]), .XQ(XQA), .Q(QA_int[113])); + datapath_latch_rf2_32x128_wm1 uDQA114 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[113]), .D(QA_int[113]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[114]), .XQ(XQA), .Q(QA_int[114])); + datapath_latch_rf2_32x128_wm1 uDQA115 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[114]), .D(QA_int[114]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[115]), .XQ(XQA), .Q(QA_int[115])); + datapath_latch_rf2_32x128_wm1 uDQA116 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[115]), .D(QA_int[115]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[116]), .XQ(XQA), .Q(QA_int[116])); + datapath_latch_rf2_32x128_wm1 uDQA117 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[116]), .D(QA_int[116]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[117]), .XQ(XQA), .Q(QA_int[117])); + datapath_latch_rf2_32x128_wm1 uDQA118 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[117]), .D(QA_int[117]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[118]), .XQ(XQA), .Q(QA_int[118])); + datapath_latch_rf2_32x128_wm1 uDQA119 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[118]), .D(QA_int[118]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[119]), .XQ(XQA), .Q(QA_int[119])); + datapath_latch_rf2_32x128_wm1 uDQA120 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[119]), .D(QA_int[119]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[120]), .XQ(XQA), .Q(QA_int[120])); + datapath_latch_rf2_32x128_wm1 uDQA121 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[120]), .D(QA_int[120]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[121]), .XQ(XQA), .Q(QA_int[121])); + datapath_latch_rf2_32x128_wm1 uDQA122 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[121]), .D(QA_int[121]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[122]), .XQ(XQA), .Q(QA_int[122])); + datapath_latch_rf2_32x128_wm1 uDQA123 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[122]), .D(QA_int[122]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[123]), .XQ(XQA), .Q(QA_int[123])); + datapath_latch_rf2_32x128_wm1 uDQA124 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[123]), .D(QA_int[123]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[124]), .XQ(XQA), .Q(QA_int[124])); + datapath_latch_rf2_32x128_wm1 uDQA125 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[124]), .D(QA_int[124]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[125]), .XQ(XQA), .Q(QA_int[125])); + datapath_latch_rf2_32x128_wm1 uDQA126 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[125]), .D(QA_int[125]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[126]), .XQ(XQA), .Q(QA_int[126])); + datapath_latch_rf2_32x128_wm1 uDQA127 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[126]), .D(QA_int[126]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[127]), .XQ(XQA), .Q(QA_int[127])); + + + + always @ (CENB_ or TCENB_ or TENB_ or DFTRAMBYP_ or CLKB_) begin + if(CLKB_ == 1'b0) begin + CENB_p2 = CENB_; + TCENB_p2 = TCENB_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || TCENB_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKB_ === 1'bx)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_b = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_b = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(1); + end +`else + if (RET1N_ == 1'b0) begin +`endif + CENB_int = 1'bx; + WENB_int = {128{1'bx}}; + AB_int = {5{1'bx}}; + DB_int = {128{1'bx}}; + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TWENB_int = {128{1'bx}}; + TAB_int = {5{1'bx}}; + TDB_int = {128{1'bx}}; + RET1N_int = 1'bx; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_b = 0; + pre_charge_st = 0; +`else + end else begin +`endif + CENB_int = 1'bx; + WENB_int = {128{1'bx}}; + AB_int = {5{1'bx}}; + DB_int = {128{1'bx}}; + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TWENB_int = {128{1'bx}}; + TAB_int = {5{1'bx}}; + TDB_int = {128{1'bx}}; + RET1N_int = 1'bx; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + #0; + QA_update = 1'b0; + DB_sh_update = 1'b0; + end + + always @ CLKB_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + end else if ((CLKB_ === 1'b1 || CLKB_ === 1'b0) && LAST_CLKB === 1'bx) begin + DB_sh_update = 1'b0; XDB_sh = 1'b0; + end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin + if (RET1N_ == 1'b0) begin + DFTRAMBYP_int = DFTRAMBYP_; + SEB_int = SEB_; + end else begin + DFTRAMBYP_int = DFTRAMBYP_; + SEB_int = SEB_; + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + TWENB_int = TWENB_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + WENB_int = TENB_ ? WENB_ : TWENB_; + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + XDB_sh = 1'b0; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + XDB_sh = 1'b0; + end else begin + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + TWENB_int = TWENB_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + WENB_int = TENB_ ? WENB_ : TWENB_; + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + XDB_sh = 1'b0; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b0) begin + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + end else begin + WriteB; + end + if (CENB_int === 1'b0) previous_CLKB = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + ReadA; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + mem_path = (partial_mask & {128{1'bx}}) | (~partial_mask & mem_path); + #0; + QA_update = 1'b0; + #0; + QA_update = 1'b1; + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end + end else if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKB_ === 1'b0 && LAST_CLKB === 1'b1) begin + DB_sh_update = 1'b0; XDB_sh = 1'b0; + end + end + LAST_CLKB = CLKB_; + end + + assign DB_int_bmux = TENB_ ? DB_ : TDB_; + + datapath_latch_rf2_32x128_wm1 uDQB0 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[1]), .D(DB_int_bmux[0]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[0]), .XQ(XDB_sh), .Q(DB_int_sh[0])); + datapath_latch_rf2_32x128_wm1 uDQB1 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[2]), .D(DB_int_bmux[1]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[1]), .XQ(XDB_sh), .Q(DB_int_sh[1])); + datapath_latch_rf2_32x128_wm1 uDQB2 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[3]), .D(DB_int_bmux[2]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[2]), .XQ(XDB_sh), .Q(DB_int_sh[2])); + datapath_latch_rf2_32x128_wm1 uDQB3 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[4]), .D(DB_int_bmux[3]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[3]), .XQ(XDB_sh), .Q(DB_int_sh[3])); + datapath_latch_rf2_32x128_wm1 uDQB4 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[5]), .D(DB_int_bmux[4]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[4]), .XQ(XDB_sh), .Q(DB_int_sh[4])); + datapath_latch_rf2_32x128_wm1 uDQB5 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[6]), .D(DB_int_bmux[5]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[5]), .XQ(XDB_sh), .Q(DB_int_sh[5])); + datapath_latch_rf2_32x128_wm1 uDQB6 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[7]), .D(DB_int_bmux[6]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[6]), .XQ(XDB_sh), .Q(DB_int_sh[6])); + datapath_latch_rf2_32x128_wm1 uDQB7 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[8]), .D(DB_int_bmux[7]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[7]), .XQ(XDB_sh), .Q(DB_int_sh[7])); + datapath_latch_rf2_32x128_wm1 uDQB8 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[9]), .D(DB_int_bmux[8]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[8]), .XQ(XDB_sh), .Q(DB_int_sh[8])); + datapath_latch_rf2_32x128_wm1 uDQB9 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[10]), .D(DB_int_bmux[9]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[9]), .XQ(XDB_sh), .Q(DB_int_sh[9])); + datapath_latch_rf2_32x128_wm1 uDQB10 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[11]), .D(DB_int_bmux[10]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[10]), .XQ(XDB_sh), .Q(DB_int_sh[10])); + datapath_latch_rf2_32x128_wm1 uDQB11 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[12]), .D(DB_int_bmux[11]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[11]), .XQ(XDB_sh), .Q(DB_int_sh[11])); + datapath_latch_rf2_32x128_wm1 uDQB12 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[13]), .D(DB_int_bmux[12]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[12]), .XQ(XDB_sh), .Q(DB_int_sh[12])); + datapath_latch_rf2_32x128_wm1 uDQB13 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[14]), .D(DB_int_bmux[13]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[13]), .XQ(XDB_sh), .Q(DB_int_sh[13])); + datapath_latch_rf2_32x128_wm1 uDQB14 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[15]), .D(DB_int_bmux[14]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[14]), .XQ(XDB_sh), .Q(DB_int_sh[14])); + datapath_latch_rf2_32x128_wm1 uDQB15 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[16]), .D(DB_int_bmux[15]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[15]), .XQ(XDB_sh), .Q(DB_int_sh[15])); + datapath_latch_rf2_32x128_wm1 uDQB16 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[17]), .D(DB_int_bmux[16]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[16]), .XQ(XDB_sh), .Q(DB_int_sh[16])); + datapath_latch_rf2_32x128_wm1 uDQB17 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[18]), .D(DB_int_bmux[17]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[17]), .XQ(XDB_sh), .Q(DB_int_sh[17])); + datapath_latch_rf2_32x128_wm1 uDQB18 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[19]), .D(DB_int_bmux[18]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[18]), .XQ(XDB_sh), .Q(DB_int_sh[18])); + datapath_latch_rf2_32x128_wm1 uDQB19 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[20]), .D(DB_int_bmux[19]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[19]), .XQ(XDB_sh), .Q(DB_int_sh[19])); + datapath_latch_rf2_32x128_wm1 uDQB20 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[21]), .D(DB_int_bmux[20]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[20]), .XQ(XDB_sh), .Q(DB_int_sh[20])); + datapath_latch_rf2_32x128_wm1 uDQB21 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[22]), .D(DB_int_bmux[21]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[21]), .XQ(XDB_sh), .Q(DB_int_sh[21])); + datapath_latch_rf2_32x128_wm1 uDQB22 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[23]), .D(DB_int_bmux[22]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[22]), .XQ(XDB_sh), .Q(DB_int_sh[22])); + datapath_latch_rf2_32x128_wm1 uDQB23 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[24]), .D(DB_int_bmux[23]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[23]), .XQ(XDB_sh), .Q(DB_int_sh[23])); + datapath_latch_rf2_32x128_wm1 uDQB24 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[25]), .D(DB_int_bmux[24]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[24]), .XQ(XDB_sh), .Q(DB_int_sh[24])); + datapath_latch_rf2_32x128_wm1 uDQB25 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[26]), .D(DB_int_bmux[25]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[25]), .XQ(XDB_sh), .Q(DB_int_sh[25])); + datapath_latch_rf2_32x128_wm1 uDQB26 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[27]), .D(DB_int_bmux[26]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[26]), .XQ(XDB_sh), .Q(DB_int_sh[26])); + datapath_latch_rf2_32x128_wm1 uDQB27 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[28]), .D(DB_int_bmux[27]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[27]), .XQ(XDB_sh), .Q(DB_int_sh[27])); + datapath_latch_rf2_32x128_wm1 uDQB28 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[29]), .D(DB_int_bmux[28]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[28]), .XQ(XDB_sh), .Q(DB_int_sh[28])); + datapath_latch_rf2_32x128_wm1 uDQB29 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[30]), .D(DB_int_bmux[29]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[29]), .XQ(XDB_sh), .Q(DB_int_sh[29])); + datapath_latch_rf2_32x128_wm1 uDQB30 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[31]), .D(DB_int_bmux[30]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[30]), .XQ(XDB_sh), .Q(DB_int_sh[30])); + datapath_latch_rf2_32x128_wm1 uDQB31 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[32]), .D(DB_int_bmux[31]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[31]), .XQ(XDB_sh), .Q(DB_int_sh[31])); + datapath_latch_rf2_32x128_wm1 uDQB32 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[33]), .D(DB_int_bmux[32]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[32]), .XQ(XDB_sh), .Q(DB_int_sh[32])); + datapath_latch_rf2_32x128_wm1 uDQB33 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[34]), .D(DB_int_bmux[33]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[33]), .XQ(XDB_sh), .Q(DB_int_sh[33])); + datapath_latch_rf2_32x128_wm1 uDQB34 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[35]), .D(DB_int_bmux[34]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[34]), .XQ(XDB_sh), .Q(DB_int_sh[34])); + datapath_latch_rf2_32x128_wm1 uDQB35 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[36]), .D(DB_int_bmux[35]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[35]), .XQ(XDB_sh), .Q(DB_int_sh[35])); + datapath_latch_rf2_32x128_wm1 uDQB36 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[37]), .D(DB_int_bmux[36]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[36]), .XQ(XDB_sh), .Q(DB_int_sh[36])); + datapath_latch_rf2_32x128_wm1 uDQB37 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[38]), .D(DB_int_bmux[37]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[37]), .XQ(XDB_sh), .Q(DB_int_sh[37])); + datapath_latch_rf2_32x128_wm1 uDQB38 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[39]), .D(DB_int_bmux[38]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[38]), .XQ(XDB_sh), .Q(DB_int_sh[38])); + datapath_latch_rf2_32x128_wm1 uDQB39 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[40]), .D(DB_int_bmux[39]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[39]), .XQ(XDB_sh), .Q(DB_int_sh[39])); + datapath_latch_rf2_32x128_wm1 uDQB40 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[41]), .D(DB_int_bmux[40]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[40]), .XQ(XDB_sh), .Q(DB_int_sh[40])); + datapath_latch_rf2_32x128_wm1 uDQB41 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[42]), .D(DB_int_bmux[41]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[41]), .XQ(XDB_sh), .Q(DB_int_sh[41])); + datapath_latch_rf2_32x128_wm1 uDQB42 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[43]), .D(DB_int_bmux[42]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[42]), .XQ(XDB_sh), .Q(DB_int_sh[42])); + datapath_latch_rf2_32x128_wm1 uDQB43 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[44]), .D(DB_int_bmux[43]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[43]), .XQ(XDB_sh), .Q(DB_int_sh[43])); + datapath_latch_rf2_32x128_wm1 uDQB44 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[45]), .D(DB_int_bmux[44]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[44]), .XQ(XDB_sh), .Q(DB_int_sh[44])); + datapath_latch_rf2_32x128_wm1 uDQB45 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[46]), .D(DB_int_bmux[45]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[45]), .XQ(XDB_sh), .Q(DB_int_sh[45])); + datapath_latch_rf2_32x128_wm1 uDQB46 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[47]), .D(DB_int_bmux[46]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[46]), .XQ(XDB_sh), .Q(DB_int_sh[46])); + datapath_latch_rf2_32x128_wm1 uDQB47 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[48]), .D(DB_int_bmux[47]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[47]), .XQ(XDB_sh), .Q(DB_int_sh[47])); + datapath_latch_rf2_32x128_wm1 uDQB48 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[49]), .D(DB_int_bmux[48]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[48]), .XQ(XDB_sh), .Q(DB_int_sh[48])); + datapath_latch_rf2_32x128_wm1 uDQB49 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[50]), .D(DB_int_bmux[49]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[49]), .XQ(XDB_sh), .Q(DB_int_sh[49])); + datapath_latch_rf2_32x128_wm1 uDQB50 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[51]), .D(DB_int_bmux[50]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[50]), .XQ(XDB_sh), .Q(DB_int_sh[50])); + datapath_latch_rf2_32x128_wm1 uDQB51 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[52]), .D(DB_int_bmux[51]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[51]), .XQ(XDB_sh), .Q(DB_int_sh[51])); + datapath_latch_rf2_32x128_wm1 uDQB52 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[53]), .D(DB_int_bmux[52]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[52]), .XQ(XDB_sh), .Q(DB_int_sh[52])); + datapath_latch_rf2_32x128_wm1 uDQB53 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[54]), .D(DB_int_bmux[53]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[53]), .XQ(XDB_sh), .Q(DB_int_sh[53])); + datapath_latch_rf2_32x128_wm1 uDQB54 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[55]), .D(DB_int_bmux[54]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[54]), .XQ(XDB_sh), .Q(DB_int_sh[54])); + datapath_latch_rf2_32x128_wm1 uDQB55 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[56]), .D(DB_int_bmux[55]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[55]), .XQ(XDB_sh), .Q(DB_int_sh[55])); + datapath_latch_rf2_32x128_wm1 uDQB56 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[57]), .D(DB_int_bmux[56]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[56]), .XQ(XDB_sh), .Q(DB_int_sh[56])); + datapath_latch_rf2_32x128_wm1 uDQB57 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[58]), .D(DB_int_bmux[57]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[57]), .XQ(XDB_sh), .Q(DB_int_sh[57])); + datapath_latch_rf2_32x128_wm1 uDQB58 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[59]), .D(DB_int_bmux[58]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[58]), .XQ(XDB_sh), .Q(DB_int_sh[58])); + datapath_latch_rf2_32x128_wm1 uDQB59 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[60]), .D(DB_int_bmux[59]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[59]), .XQ(XDB_sh), .Q(DB_int_sh[59])); + datapath_latch_rf2_32x128_wm1 uDQB60 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[61]), .D(DB_int_bmux[60]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[60]), .XQ(XDB_sh), .Q(DB_int_sh[60])); + datapath_latch_rf2_32x128_wm1 uDQB61 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[62]), .D(DB_int_bmux[61]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[61]), .XQ(XDB_sh), .Q(DB_int_sh[61])); + datapath_latch_rf2_32x128_wm1 uDQB62 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[63]), .D(DB_int_bmux[62]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[62]), .XQ(XDB_sh), .Q(DB_int_sh[62])); + datapath_latch_rf2_32x128_wm1 uDQB63 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(SIB_[0]), .D(DB_int_bmux[63]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[63]), .XQ(XDB_sh), .Q(DB_int_sh[63])); + datapath_latch_rf2_32x128_wm1 uDQB64 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(SIB_[1]), .D(DB_int_bmux[64]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[64]), .XQ(XDB_sh), .Q(DB_int_sh[64])); + datapath_latch_rf2_32x128_wm1 uDQB65 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[64]), .D(DB_int_bmux[65]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[65]), .XQ(XDB_sh), .Q(DB_int_sh[65])); + datapath_latch_rf2_32x128_wm1 uDQB66 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[65]), .D(DB_int_bmux[66]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[66]), .XQ(XDB_sh), .Q(DB_int_sh[66])); + datapath_latch_rf2_32x128_wm1 uDQB67 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[66]), .D(DB_int_bmux[67]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[67]), .XQ(XDB_sh), .Q(DB_int_sh[67])); + datapath_latch_rf2_32x128_wm1 uDQB68 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[67]), .D(DB_int_bmux[68]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[68]), .XQ(XDB_sh), .Q(DB_int_sh[68])); + datapath_latch_rf2_32x128_wm1 uDQB69 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[68]), .D(DB_int_bmux[69]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[69]), .XQ(XDB_sh), .Q(DB_int_sh[69])); + datapath_latch_rf2_32x128_wm1 uDQB70 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[69]), .D(DB_int_bmux[70]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[70]), .XQ(XDB_sh), .Q(DB_int_sh[70])); + datapath_latch_rf2_32x128_wm1 uDQB71 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[70]), .D(DB_int_bmux[71]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[71]), .XQ(XDB_sh), .Q(DB_int_sh[71])); + datapath_latch_rf2_32x128_wm1 uDQB72 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[71]), .D(DB_int_bmux[72]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[72]), .XQ(XDB_sh), .Q(DB_int_sh[72])); + datapath_latch_rf2_32x128_wm1 uDQB73 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[72]), .D(DB_int_bmux[73]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[73]), .XQ(XDB_sh), .Q(DB_int_sh[73])); + datapath_latch_rf2_32x128_wm1 uDQB74 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[73]), .D(DB_int_bmux[74]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[74]), .XQ(XDB_sh), .Q(DB_int_sh[74])); + datapath_latch_rf2_32x128_wm1 uDQB75 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[74]), .D(DB_int_bmux[75]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[75]), .XQ(XDB_sh), .Q(DB_int_sh[75])); + datapath_latch_rf2_32x128_wm1 uDQB76 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[75]), .D(DB_int_bmux[76]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[76]), .XQ(XDB_sh), .Q(DB_int_sh[76])); + datapath_latch_rf2_32x128_wm1 uDQB77 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[76]), .D(DB_int_bmux[77]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[77]), .XQ(XDB_sh), .Q(DB_int_sh[77])); + datapath_latch_rf2_32x128_wm1 uDQB78 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[77]), .D(DB_int_bmux[78]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[78]), .XQ(XDB_sh), .Q(DB_int_sh[78])); + datapath_latch_rf2_32x128_wm1 uDQB79 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[78]), .D(DB_int_bmux[79]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[79]), .XQ(XDB_sh), .Q(DB_int_sh[79])); + datapath_latch_rf2_32x128_wm1 uDQB80 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[79]), .D(DB_int_bmux[80]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[80]), .XQ(XDB_sh), .Q(DB_int_sh[80])); + datapath_latch_rf2_32x128_wm1 uDQB81 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[80]), .D(DB_int_bmux[81]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[81]), .XQ(XDB_sh), .Q(DB_int_sh[81])); + datapath_latch_rf2_32x128_wm1 uDQB82 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[81]), .D(DB_int_bmux[82]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[82]), .XQ(XDB_sh), .Q(DB_int_sh[82])); + datapath_latch_rf2_32x128_wm1 uDQB83 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[82]), .D(DB_int_bmux[83]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[83]), .XQ(XDB_sh), .Q(DB_int_sh[83])); + datapath_latch_rf2_32x128_wm1 uDQB84 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[83]), .D(DB_int_bmux[84]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[84]), .XQ(XDB_sh), .Q(DB_int_sh[84])); + datapath_latch_rf2_32x128_wm1 uDQB85 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[84]), .D(DB_int_bmux[85]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[85]), .XQ(XDB_sh), .Q(DB_int_sh[85])); + datapath_latch_rf2_32x128_wm1 uDQB86 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[85]), .D(DB_int_bmux[86]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[86]), .XQ(XDB_sh), .Q(DB_int_sh[86])); + datapath_latch_rf2_32x128_wm1 uDQB87 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[86]), .D(DB_int_bmux[87]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[87]), .XQ(XDB_sh), .Q(DB_int_sh[87])); + datapath_latch_rf2_32x128_wm1 uDQB88 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[87]), .D(DB_int_bmux[88]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[88]), .XQ(XDB_sh), .Q(DB_int_sh[88])); + datapath_latch_rf2_32x128_wm1 uDQB89 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[88]), .D(DB_int_bmux[89]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[89]), .XQ(XDB_sh), .Q(DB_int_sh[89])); + datapath_latch_rf2_32x128_wm1 uDQB90 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[89]), .D(DB_int_bmux[90]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[90]), .XQ(XDB_sh), .Q(DB_int_sh[90])); + datapath_latch_rf2_32x128_wm1 uDQB91 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[90]), .D(DB_int_bmux[91]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[91]), .XQ(XDB_sh), .Q(DB_int_sh[91])); + datapath_latch_rf2_32x128_wm1 uDQB92 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[91]), .D(DB_int_bmux[92]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[92]), .XQ(XDB_sh), .Q(DB_int_sh[92])); + datapath_latch_rf2_32x128_wm1 uDQB93 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[92]), .D(DB_int_bmux[93]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[93]), .XQ(XDB_sh), .Q(DB_int_sh[93])); + datapath_latch_rf2_32x128_wm1 uDQB94 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[93]), .D(DB_int_bmux[94]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[94]), .XQ(XDB_sh), .Q(DB_int_sh[94])); + datapath_latch_rf2_32x128_wm1 uDQB95 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[94]), .D(DB_int_bmux[95]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[95]), .XQ(XDB_sh), .Q(DB_int_sh[95])); + datapath_latch_rf2_32x128_wm1 uDQB96 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[95]), .D(DB_int_bmux[96]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[96]), .XQ(XDB_sh), .Q(DB_int_sh[96])); + datapath_latch_rf2_32x128_wm1 uDQB97 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[96]), .D(DB_int_bmux[97]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[97]), .XQ(XDB_sh), .Q(DB_int_sh[97])); + datapath_latch_rf2_32x128_wm1 uDQB98 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[97]), .D(DB_int_bmux[98]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[98]), .XQ(XDB_sh), .Q(DB_int_sh[98])); + datapath_latch_rf2_32x128_wm1 uDQB99 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[98]), .D(DB_int_bmux[99]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[99]), .XQ(XDB_sh), .Q(DB_int_sh[99])); + datapath_latch_rf2_32x128_wm1 uDQB100 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[99]), .D(DB_int_bmux[100]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[100]), .XQ(XDB_sh), .Q(DB_int_sh[100])); + datapath_latch_rf2_32x128_wm1 uDQB101 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[100]), .D(DB_int_bmux[101]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[101]), .XQ(XDB_sh), .Q(DB_int_sh[101])); + datapath_latch_rf2_32x128_wm1 uDQB102 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[101]), .D(DB_int_bmux[102]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[102]), .XQ(XDB_sh), .Q(DB_int_sh[102])); + datapath_latch_rf2_32x128_wm1 uDQB103 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[102]), .D(DB_int_bmux[103]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[103]), .XQ(XDB_sh), .Q(DB_int_sh[103])); + datapath_latch_rf2_32x128_wm1 uDQB104 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[103]), .D(DB_int_bmux[104]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[104]), .XQ(XDB_sh), .Q(DB_int_sh[104])); + datapath_latch_rf2_32x128_wm1 uDQB105 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[104]), .D(DB_int_bmux[105]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[105]), .XQ(XDB_sh), .Q(DB_int_sh[105])); + datapath_latch_rf2_32x128_wm1 uDQB106 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[105]), .D(DB_int_bmux[106]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[106]), .XQ(XDB_sh), .Q(DB_int_sh[106])); + datapath_latch_rf2_32x128_wm1 uDQB107 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[106]), .D(DB_int_bmux[107]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[107]), .XQ(XDB_sh), .Q(DB_int_sh[107])); + datapath_latch_rf2_32x128_wm1 uDQB108 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[107]), .D(DB_int_bmux[108]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[108]), .XQ(XDB_sh), .Q(DB_int_sh[108])); + datapath_latch_rf2_32x128_wm1 uDQB109 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[108]), .D(DB_int_bmux[109]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[109]), .XQ(XDB_sh), .Q(DB_int_sh[109])); + datapath_latch_rf2_32x128_wm1 uDQB110 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[109]), .D(DB_int_bmux[110]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[110]), .XQ(XDB_sh), .Q(DB_int_sh[110])); + datapath_latch_rf2_32x128_wm1 uDQB111 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[110]), .D(DB_int_bmux[111]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[111]), .XQ(XDB_sh), .Q(DB_int_sh[111])); + datapath_latch_rf2_32x128_wm1 uDQB112 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[111]), .D(DB_int_bmux[112]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[112]), .XQ(XDB_sh), .Q(DB_int_sh[112])); + datapath_latch_rf2_32x128_wm1 uDQB113 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[112]), .D(DB_int_bmux[113]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[113]), .XQ(XDB_sh), .Q(DB_int_sh[113])); + datapath_latch_rf2_32x128_wm1 uDQB114 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[113]), .D(DB_int_bmux[114]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[114]), .XQ(XDB_sh), .Q(DB_int_sh[114])); + datapath_latch_rf2_32x128_wm1 uDQB115 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[114]), .D(DB_int_bmux[115]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[115]), .XQ(XDB_sh), .Q(DB_int_sh[115])); + datapath_latch_rf2_32x128_wm1 uDQB116 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[115]), .D(DB_int_bmux[116]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[116]), .XQ(XDB_sh), .Q(DB_int_sh[116])); + datapath_latch_rf2_32x128_wm1 uDQB117 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[116]), .D(DB_int_bmux[117]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[117]), .XQ(XDB_sh), .Q(DB_int_sh[117])); + datapath_latch_rf2_32x128_wm1 uDQB118 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[117]), .D(DB_int_bmux[118]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[118]), .XQ(XDB_sh), .Q(DB_int_sh[118])); + datapath_latch_rf2_32x128_wm1 uDQB119 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[118]), .D(DB_int_bmux[119]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[119]), .XQ(XDB_sh), .Q(DB_int_sh[119])); + datapath_latch_rf2_32x128_wm1 uDQB120 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[119]), .D(DB_int_bmux[120]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[120]), .XQ(XDB_sh), .Q(DB_int_sh[120])); + datapath_latch_rf2_32x128_wm1 uDQB121 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[120]), .D(DB_int_bmux[121]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[121]), .XQ(XDB_sh), .Q(DB_int_sh[121])); + datapath_latch_rf2_32x128_wm1 uDQB122 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[121]), .D(DB_int_bmux[122]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[122]), .XQ(XDB_sh), .Q(DB_int_sh[122])); + datapath_latch_rf2_32x128_wm1 uDQB123 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[122]), .D(DB_int_bmux[123]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[123]), .XQ(XDB_sh), .Q(DB_int_sh[123])); + datapath_latch_rf2_32x128_wm1 uDQB124 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[123]), .D(DB_int_bmux[124]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[124]), .XQ(XDB_sh), .Q(DB_int_sh[124])); + datapath_latch_rf2_32x128_wm1 uDQB125 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[124]), .D(DB_int_bmux[125]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[125]), .XQ(XDB_sh), .Q(DB_int_sh[125])); + datapath_latch_rf2_32x128_wm1 uDQB126 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[125]), .D(DB_int_bmux[126]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[126]), .XQ(XDB_sh), .Q(DB_int_sh[126])); + datapath_latch_rf2_32x128_wm1 uDQB127 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[126]), .D(DB_int_bmux[127]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[127]), .XQ(XDB_sh), .Q(DB_int_sh[127])); + + + +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + always @ (VDDCE or VDDPE or VSSE) begin + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); + end +`endif + + function row_contention; + input [4:0] aa; + input [4:0] ab; + input [127:0] wena; + input [127:0] wenb; + reg result; + reg sameRow; + reg sameMux; + reg anyWrite; + begin + anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1; + sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0; + if (aa[4:1] == ab[4:1]) begin + sameRow = 1'b1; + end else begin + sameRow = 1'b0; + end + if (sameRow == 1'b1 && anyWrite == 1'b1) + row_contention = 1'b1; + else if (sameRow == 1'b1 && sameMux == 1'b1) + row_contention = 1'b1; + else + row_contention = 1'b0; + end + endfunction + + function col_contention; + input [4:0] aa; + input [4:0] ab; + begin + if (aa[0:0] == ab[0:0]) + col_contention = 1'b1; + else + col_contention = 1'b0; + end + endfunction + + function is_contention; + input [4:0] aa; + input [4:0] ab; + input [127:0] wena; + input [127:0] wenb; + reg result; + begin + if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin + result = 1'b0; + end else if (aa == ab) begin + result = 1'b1; + end else begin + result = 1'b0; + end + is_contention = result; + end + endfunction + + +endmodule +`endcelldefine +`else +`celldefine +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS +module rf2_32x128_wm1 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, + SOB, CLKA, CENA, AA, CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, + TAA, TENB, TCENB, TWENB, TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x128_wm1 (CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, + CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TWENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + parameter ASSERT_PREFIX = ""; + parameter BITS = 128; + parameter WORDS = 32; + parameter MUX = 2; + parameter MEM_WIDTH = 256; // redun block size 2, 128 on left, 128 on right + parameter MEM_HEIGHT = 16; + parameter WP_SIZE = 1 ; + parameter UPM_WIDTH = 3; + parameter UPMW_WIDTH = 0; + parameter UPMS_WIDTH = 1; + + output CENYA; + output [4:0] AYA; + output CENYB; + output [127:0] WENYB; + output [4:0] AYB; + output [127:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [127:0] WENB; + input [4:0] AB; + input [127:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [127:0] TWENB; + input [4:0] TAB; + input [127:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + + reg pre_charge_st; + reg pre_charge_st_a; + reg pre_charge_st_b; + integer row_address; + integer mux_address; + initial row_address = 0; + initial mux_address = 0; + reg [255:0] mem [0:15]; + reg [255:0] row, row_t; + reg LAST_CLKA; + reg [255:0] row_mask; + reg [255:0] new_data; + reg [255:0] data_out; + reg [127:0] readLatch0; + reg [127:0] shifted_readLatch0; + reg read_mux_sel0_p2; + reg [127:0] readLatch1; + reg [127:0] shifted_readLatch1; + reg read_mux_sel1_p2; + reg LAST_CLKB; + wire [127:0] QA_int; + reg XQA, QA_update; + reg [127:0] mem_path; + reg [127:0] partial_mask; + reg XDB_sh, DB_sh_update; + wire [127:0] DB_int_bmux; + reg [127:0] writeEnable; + real previous_CLKA; + real previous_CLKB; + initial previous_CLKA = 0; + initial previous_CLKB = 0; + reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC; + reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1; + reg cont_flag0_int; + reg cont_flag1_int; + initial cont_flag0_int = 1'b0; + initial cont_flag1_int = 1'b0; + + reg NOT_CENA, NOT_AA4, NOT_AA3, NOT_AA2, NOT_AA1, NOT_AA0, NOT_CENB, NOT_WENB127; + reg NOT_WENB126, NOT_WENB125, NOT_WENB124, NOT_WENB123, NOT_WENB122, NOT_WENB121; + reg NOT_WENB120, NOT_WENB119, NOT_WENB118, NOT_WENB117, NOT_WENB116, NOT_WENB115; + reg NOT_WENB114, NOT_WENB113, NOT_WENB112, NOT_WENB111, NOT_WENB110, NOT_WENB109; + reg NOT_WENB108, NOT_WENB107, NOT_WENB106, NOT_WENB105, NOT_WENB104, NOT_WENB103; + reg NOT_WENB102, NOT_WENB101, NOT_WENB100, NOT_WENB99, NOT_WENB98, NOT_WENB97, NOT_WENB96; + reg NOT_WENB95, NOT_WENB94, NOT_WENB93, NOT_WENB92, NOT_WENB91, NOT_WENB90, NOT_WENB89; + reg NOT_WENB88, NOT_WENB87, NOT_WENB86, NOT_WENB85, NOT_WENB84, NOT_WENB83, NOT_WENB82; + reg NOT_WENB81, NOT_WENB80, NOT_WENB79, NOT_WENB78, NOT_WENB77, NOT_WENB76, NOT_WENB75; + reg NOT_WENB74, NOT_WENB73, NOT_WENB72, NOT_WENB71, NOT_WENB70, NOT_WENB69, NOT_WENB68; + reg NOT_WENB67, NOT_WENB66, NOT_WENB65, NOT_WENB64, NOT_WENB63, NOT_WENB62, NOT_WENB61; + reg NOT_WENB60, NOT_WENB59, NOT_WENB58, NOT_WENB57, NOT_WENB56, NOT_WENB55, NOT_WENB54; + reg NOT_WENB53, NOT_WENB52, NOT_WENB51, NOT_WENB50, NOT_WENB49, NOT_WENB48, NOT_WENB47; + reg NOT_WENB46, NOT_WENB45, NOT_WENB44, NOT_WENB43, NOT_WENB42, NOT_WENB41, NOT_WENB40; + reg NOT_WENB39, NOT_WENB38, NOT_WENB37, NOT_WENB36, NOT_WENB35, NOT_WENB34, NOT_WENB33; + reg NOT_WENB32, NOT_WENB31, NOT_WENB30, NOT_WENB29, NOT_WENB28, NOT_WENB27, NOT_WENB26; + reg NOT_WENB25, NOT_WENB24, NOT_WENB23, NOT_WENB22, NOT_WENB21, NOT_WENB20, NOT_WENB19; + reg NOT_WENB18, NOT_WENB17, NOT_WENB16, NOT_WENB15, NOT_WENB14, NOT_WENB13, NOT_WENB12; + reg NOT_WENB11, NOT_WENB10, NOT_WENB9, NOT_WENB8, NOT_WENB7, NOT_WENB6, NOT_WENB5; + reg NOT_WENB4, NOT_WENB3, NOT_WENB2, NOT_WENB1, NOT_WENB0, NOT_AB4, NOT_AB3, NOT_AB2; + reg NOT_AB1, NOT_AB0, NOT_DB127, NOT_DB126, NOT_DB125, NOT_DB124, NOT_DB123, NOT_DB122; + reg NOT_DB121, NOT_DB120, NOT_DB119, NOT_DB118, NOT_DB117, NOT_DB116, NOT_DB115; + reg NOT_DB114, NOT_DB113, NOT_DB112, NOT_DB111, NOT_DB110, NOT_DB109, NOT_DB108; + reg NOT_DB107, NOT_DB106, NOT_DB105, NOT_DB104, NOT_DB103, NOT_DB102, NOT_DB101; + reg NOT_DB100, NOT_DB99, NOT_DB98, NOT_DB97, NOT_DB96, NOT_DB95, NOT_DB94, NOT_DB93; + reg NOT_DB92, NOT_DB91, NOT_DB90, NOT_DB89, NOT_DB88, NOT_DB87, NOT_DB86, NOT_DB85; + reg NOT_DB84, NOT_DB83, NOT_DB82, NOT_DB81, NOT_DB80, NOT_DB79, NOT_DB78, NOT_DB77; + reg NOT_DB76, NOT_DB75, NOT_DB74, NOT_DB73, NOT_DB72, NOT_DB71, NOT_DB70, NOT_DB69; + reg NOT_DB68, NOT_DB67, NOT_DB66, NOT_DB65, NOT_DB64, NOT_DB63, NOT_DB62, NOT_DB61; + reg NOT_DB60, NOT_DB59, NOT_DB58, NOT_DB57, NOT_DB56, NOT_DB55, NOT_DB54, NOT_DB53; + reg NOT_DB52, NOT_DB51, NOT_DB50, NOT_DB49, NOT_DB48, NOT_DB47, NOT_DB46, NOT_DB45; + reg NOT_DB44, NOT_DB43, NOT_DB42, NOT_DB41, NOT_DB40, NOT_DB39, NOT_DB38, NOT_DB37; + reg NOT_DB36, NOT_DB35, NOT_DB34, NOT_DB33, NOT_DB32, NOT_DB31, NOT_DB30, NOT_DB29; + reg NOT_DB28, NOT_DB27, NOT_DB26, NOT_DB25, NOT_DB24, NOT_DB23, NOT_DB22, NOT_DB21; + reg NOT_DB20, NOT_DB19, NOT_DB18, NOT_DB17, NOT_DB16, NOT_DB15, NOT_DB14, NOT_DB13; + reg NOT_DB12, NOT_DB11, NOT_DB10, NOT_DB9, NOT_DB8, NOT_DB7, NOT_DB6, NOT_DB5, NOT_DB4; + reg NOT_DB3, NOT_DB2, NOT_DB1, NOT_DB0, NOT_EMAA2, NOT_EMAA1, NOT_EMAA0, NOT_EMASA; + reg NOT_EMAB2, NOT_EMAB1, NOT_EMAB0, NOT_TENA, NOT_TCENA, NOT_TAA4, NOT_TAA3, NOT_TAA2; + reg NOT_TAA1, NOT_TAA0, NOT_TENB, NOT_TCENB, NOT_TWENB127, NOT_TWENB126, NOT_TWENB125; + reg NOT_TWENB124, NOT_TWENB123, NOT_TWENB122, NOT_TWENB121, NOT_TWENB120, NOT_TWENB119; + reg NOT_TWENB118, NOT_TWENB117, NOT_TWENB116, NOT_TWENB115, NOT_TWENB114, NOT_TWENB113; + reg NOT_TWENB112, NOT_TWENB111, NOT_TWENB110, NOT_TWENB109, NOT_TWENB108, NOT_TWENB107; + reg NOT_TWENB106, NOT_TWENB105, NOT_TWENB104, NOT_TWENB103, NOT_TWENB102, NOT_TWENB101; + reg NOT_TWENB100, NOT_TWENB99, NOT_TWENB98, NOT_TWENB97, NOT_TWENB96, NOT_TWENB95; + reg NOT_TWENB94, NOT_TWENB93, NOT_TWENB92, NOT_TWENB91, NOT_TWENB90, NOT_TWENB89; + reg NOT_TWENB88, NOT_TWENB87, NOT_TWENB86, NOT_TWENB85, NOT_TWENB84, NOT_TWENB83; + reg NOT_TWENB82, NOT_TWENB81, NOT_TWENB80, NOT_TWENB79, NOT_TWENB78, NOT_TWENB77; + reg NOT_TWENB76, NOT_TWENB75, NOT_TWENB74, NOT_TWENB73, NOT_TWENB72, NOT_TWENB71; + reg NOT_TWENB70, NOT_TWENB69, NOT_TWENB68, NOT_TWENB67, NOT_TWENB66, NOT_TWENB65; + reg NOT_TWENB64, NOT_TWENB63, NOT_TWENB62, NOT_TWENB61, NOT_TWENB60, NOT_TWENB59; + reg NOT_TWENB58, NOT_TWENB57, NOT_TWENB56, NOT_TWENB55, NOT_TWENB54, NOT_TWENB53; + reg NOT_TWENB52, NOT_TWENB51, NOT_TWENB50, NOT_TWENB49, NOT_TWENB48, NOT_TWENB47; + reg NOT_TWENB46, NOT_TWENB45, NOT_TWENB44, NOT_TWENB43, NOT_TWENB42, NOT_TWENB41; + reg NOT_TWENB40, NOT_TWENB39, NOT_TWENB38, NOT_TWENB37, NOT_TWENB36, NOT_TWENB35; + reg NOT_TWENB34, NOT_TWENB33, NOT_TWENB32, NOT_TWENB31, NOT_TWENB30, NOT_TWENB29; + reg NOT_TWENB28, NOT_TWENB27, NOT_TWENB26, NOT_TWENB25, NOT_TWENB24, NOT_TWENB23; + reg NOT_TWENB22, NOT_TWENB21, NOT_TWENB20, NOT_TWENB19, NOT_TWENB18, NOT_TWENB17; + reg NOT_TWENB16, NOT_TWENB15, NOT_TWENB14, NOT_TWENB13, NOT_TWENB12, NOT_TWENB11; + reg NOT_TWENB10, NOT_TWENB9, NOT_TWENB8, NOT_TWENB7, NOT_TWENB6, NOT_TWENB5, NOT_TWENB4; + reg NOT_TWENB3, NOT_TWENB2, NOT_TWENB1, NOT_TWENB0, NOT_TAB4, NOT_TAB3, NOT_TAB2; + reg NOT_TAB1, NOT_TAB0, NOT_TDB127, NOT_TDB126, NOT_TDB125, NOT_TDB124, NOT_TDB123; + reg NOT_TDB122, NOT_TDB121, NOT_TDB120, NOT_TDB119, NOT_TDB118, NOT_TDB117, NOT_TDB116; + reg NOT_TDB115, NOT_TDB114, NOT_TDB113, NOT_TDB112, NOT_TDB111, NOT_TDB110, NOT_TDB109; + reg NOT_TDB108, NOT_TDB107, NOT_TDB106, NOT_TDB105, NOT_TDB104, NOT_TDB103, NOT_TDB102; + reg NOT_TDB101, NOT_TDB100, NOT_TDB99, NOT_TDB98, NOT_TDB97, NOT_TDB96, NOT_TDB95; + reg NOT_TDB94, NOT_TDB93, NOT_TDB92, NOT_TDB91, NOT_TDB90, NOT_TDB89, NOT_TDB88; + reg NOT_TDB87, NOT_TDB86, NOT_TDB85, NOT_TDB84, NOT_TDB83, NOT_TDB82, NOT_TDB81; + reg NOT_TDB80, NOT_TDB79, NOT_TDB78, NOT_TDB77, NOT_TDB76, NOT_TDB75, NOT_TDB74; + reg NOT_TDB73, NOT_TDB72, NOT_TDB71, NOT_TDB70, NOT_TDB69, NOT_TDB68, NOT_TDB67; + reg NOT_TDB66, NOT_TDB65, NOT_TDB64, NOT_TDB63, NOT_TDB62, NOT_TDB61, NOT_TDB60; + reg NOT_TDB59, NOT_TDB58, NOT_TDB57, NOT_TDB56, NOT_TDB55, NOT_TDB54, NOT_TDB53; + reg NOT_TDB52, NOT_TDB51, NOT_TDB50, NOT_TDB49, NOT_TDB48, NOT_TDB47, NOT_TDB46; + reg NOT_TDB45, NOT_TDB44, NOT_TDB43, NOT_TDB42, NOT_TDB41, NOT_TDB40, NOT_TDB39; + reg NOT_TDB38, NOT_TDB37, NOT_TDB36, NOT_TDB35, NOT_TDB34, NOT_TDB33, NOT_TDB32; + reg NOT_TDB31, NOT_TDB30, NOT_TDB29, NOT_TDB28, NOT_TDB27, NOT_TDB26, NOT_TDB25; + reg NOT_TDB24, NOT_TDB23, NOT_TDB22, NOT_TDB21, NOT_TDB20, NOT_TDB19, NOT_TDB18; + reg NOT_TDB17, NOT_TDB16, NOT_TDB15, NOT_TDB14, NOT_TDB13, NOT_TDB12, NOT_TDB11; + reg NOT_TDB10, NOT_TDB9, NOT_TDB8, NOT_TDB7, NOT_TDB6, NOT_TDB5, NOT_TDB4, NOT_TDB3; + reg NOT_TDB2, NOT_TDB1, NOT_TDB0, NOT_SIA1, NOT_SIA0, NOT_SEA, NOT_DFTRAMBYP_CLKA; + reg NOT_DFTRAMBYP_CLKB, NOT_RET1N, NOT_SIB1, NOT_SIB0, NOT_SEB, NOT_COLLDISN; + reg NOT_CONTA, NOT_CLKA_PER, NOT_CLKA_MINH, NOT_CLKA_MINL, NOT_CONTB, NOT_CLKB_PER; + reg NOT_CLKB_MINH, NOT_CLKB_MINL; + reg clk0_int; + reg clk1_int; + + wire CENYA_; + wire [4:0] AYA_; + wire CENYB_; + wire [127:0] WENYB_; + wire [4:0] AYB_; + wire [127:0] QA_; + wire [1:0] SOA_; + wire [1:0] SOB_; + wire CLKA_; + wire CENA_; + reg CENA_int; + reg CENA_p2; + wire [4:0] AA_; + reg [4:0] AA_int; + wire CLKB_; + wire CENB_; + reg CENB_int; + reg CENB_p2; + wire [127:0] WENB_; + reg [127:0] WENB_int; + wire [4:0] AB_; + reg [4:0] AB_int; + wire [127:0] DB_; + reg [127:0] DB_int; + wire [127:0] DB_int_sh; + reg [127:0] DB_int_sh_int; + wire [2:0] EMAA_; + reg [2:0] EMAA_int; + wire EMASA_; + reg EMASA_int; + wire [2:0] EMAB_; + reg [2:0] EMAB_int; + wire TENA_; + reg TENA_int; + wire TCENA_; + reg TCENA_int; + reg TCENA_p2; + wire [4:0] TAA_; + reg [4:0] TAA_int; + wire TENB_; + reg TENB_int; + wire TCENB_; + reg TCENB_int; + reg TCENB_p2; + wire [127:0] TWENB_; + reg [127:0] TWENB_int; + wire [4:0] TAB_; + reg [4:0] TAB_int; + wire [127:0] TDB_; + reg [127:0] TDB_int; + wire RET1N_; + reg RET1N_int; + wire [1:0] SIA_; + wire [1:0] SIA_int; + wire SEA_; + reg SEA_int; + wire DFTRAMBYP_; + reg DFTRAMBYP_int; + reg DFTRAMBYP_p2; + wire [1:0] SIB_; + reg [1:0] SIB_int; + wire SEB_; + reg SEB_int; + wire COLLDISN_; + reg COLLDISN_int; + + buf B0(CENYA, CENYA_); + buf B1(AYA[0], AYA_[0]); + buf B2(AYA[1], AYA_[1]); + buf B3(AYA[2], AYA_[2]); + buf B4(AYA[3], AYA_[3]); + buf B5(AYA[4], AYA_[4]); + buf B6(CENYB, CENYB_); + buf B7(WENYB[0], WENYB_[0]); + buf B8(WENYB[1], WENYB_[1]); + buf B9(WENYB[2], WENYB_[2]); + buf B10(WENYB[3], WENYB_[3]); + buf B11(WENYB[4], WENYB_[4]); + buf B12(WENYB[5], WENYB_[5]); + buf B13(WENYB[6], WENYB_[6]); + buf B14(WENYB[7], WENYB_[7]); + buf B15(WENYB[8], WENYB_[8]); + buf B16(WENYB[9], WENYB_[9]); + buf B17(WENYB[10], WENYB_[10]); + buf B18(WENYB[11], WENYB_[11]); + buf B19(WENYB[12], WENYB_[12]); + buf B20(WENYB[13], WENYB_[13]); + buf B21(WENYB[14], WENYB_[14]); + buf B22(WENYB[15], WENYB_[15]); + buf B23(WENYB[16], WENYB_[16]); + buf B24(WENYB[17], WENYB_[17]); + buf B25(WENYB[18], WENYB_[18]); + buf B26(WENYB[19], WENYB_[19]); + buf B27(WENYB[20], WENYB_[20]); + buf B28(WENYB[21], WENYB_[21]); + buf B29(WENYB[22], WENYB_[22]); + buf B30(WENYB[23], WENYB_[23]); + buf B31(WENYB[24], WENYB_[24]); + buf B32(WENYB[25], WENYB_[25]); + buf B33(WENYB[26], WENYB_[26]); + buf B34(WENYB[27], WENYB_[27]); + buf B35(WENYB[28], WENYB_[28]); + buf B36(WENYB[29], WENYB_[29]); + buf B37(WENYB[30], WENYB_[30]); + buf B38(WENYB[31], WENYB_[31]); + buf B39(WENYB[32], WENYB_[32]); + buf B40(WENYB[33], WENYB_[33]); + buf B41(WENYB[34], WENYB_[34]); + buf B42(WENYB[35], WENYB_[35]); + buf B43(WENYB[36], WENYB_[36]); + buf B44(WENYB[37], WENYB_[37]); + buf B45(WENYB[38], WENYB_[38]); + buf B46(WENYB[39], WENYB_[39]); + buf B47(WENYB[40], WENYB_[40]); + buf B48(WENYB[41], WENYB_[41]); + buf B49(WENYB[42], WENYB_[42]); + buf B50(WENYB[43], WENYB_[43]); + buf B51(WENYB[44], WENYB_[44]); + buf B52(WENYB[45], WENYB_[45]); + buf B53(WENYB[46], WENYB_[46]); + buf B54(WENYB[47], WENYB_[47]); + buf B55(WENYB[48], WENYB_[48]); + buf B56(WENYB[49], WENYB_[49]); + buf B57(WENYB[50], WENYB_[50]); + buf B58(WENYB[51], WENYB_[51]); + buf B59(WENYB[52], WENYB_[52]); + buf B60(WENYB[53], WENYB_[53]); + buf B61(WENYB[54], WENYB_[54]); + buf B62(WENYB[55], WENYB_[55]); + buf B63(WENYB[56], WENYB_[56]); + buf B64(WENYB[57], WENYB_[57]); + buf B65(WENYB[58], WENYB_[58]); + buf B66(WENYB[59], WENYB_[59]); + buf B67(WENYB[60], WENYB_[60]); + buf B68(WENYB[61], WENYB_[61]); + buf B69(WENYB[62], WENYB_[62]); + buf B70(WENYB[63], WENYB_[63]); + buf B71(WENYB[64], WENYB_[64]); + buf B72(WENYB[65], WENYB_[65]); + buf B73(WENYB[66], WENYB_[66]); + buf B74(WENYB[67], WENYB_[67]); + buf B75(WENYB[68], WENYB_[68]); + buf B76(WENYB[69], WENYB_[69]); + buf B77(WENYB[70], WENYB_[70]); + buf B78(WENYB[71], WENYB_[71]); + buf B79(WENYB[72], WENYB_[72]); + buf B80(WENYB[73], WENYB_[73]); + buf B81(WENYB[74], WENYB_[74]); + buf B82(WENYB[75], WENYB_[75]); + buf B83(WENYB[76], WENYB_[76]); + buf B84(WENYB[77], WENYB_[77]); + buf B85(WENYB[78], WENYB_[78]); + buf B86(WENYB[79], WENYB_[79]); + buf B87(WENYB[80], WENYB_[80]); + buf B88(WENYB[81], WENYB_[81]); + buf B89(WENYB[82], WENYB_[82]); + buf B90(WENYB[83], WENYB_[83]); + buf B91(WENYB[84], WENYB_[84]); + buf B92(WENYB[85], WENYB_[85]); + buf B93(WENYB[86], WENYB_[86]); + buf B94(WENYB[87], WENYB_[87]); + buf B95(WENYB[88], WENYB_[88]); + buf B96(WENYB[89], WENYB_[89]); + buf B97(WENYB[90], WENYB_[90]); + buf B98(WENYB[91], WENYB_[91]); + buf B99(WENYB[92], WENYB_[92]); + buf B100(WENYB[93], WENYB_[93]); + buf B101(WENYB[94], WENYB_[94]); + buf B102(WENYB[95], WENYB_[95]); + buf B103(WENYB[96], WENYB_[96]); + buf B104(WENYB[97], WENYB_[97]); + buf B105(WENYB[98], WENYB_[98]); + buf B106(WENYB[99], WENYB_[99]); + buf B107(WENYB[100], WENYB_[100]); + buf B108(WENYB[101], WENYB_[101]); + buf B109(WENYB[102], WENYB_[102]); + buf B110(WENYB[103], WENYB_[103]); + buf B111(WENYB[104], WENYB_[104]); + buf B112(WENYB[105], WENYB_[105]); + buf B113(WENYB[106], WENYB_[106]); + buf B114(WENYB[107], WENYB_[107]); + buf B115(WENYB[108], WENYB_[108]); + buf B116(WENYB[109], WENYB_[109]); + buf B117(WENYB[110], WENYB_[110]); + buf B118(WENYB[111], WENYB_[111]); + buf B119(WENYB[112], WENYB_[112]); + buf B120(WENYB[113], WENYB_[113]); + buf B121(WENYB[114], WENYB_[114]); + buf B122(WENYB[115], WENYB_[115]); + buf B123(WENYB[116], WENYB_[116]); + buf B124(WENYB[117], WENYB_[117]); + buf B125(WENYB[118], WENYB_[118]); + buf B126(WENYB[119], WENYB_[119]); + buf B127(WENYB[120], WENYB_[120]); + buf B128(WENYB[121], WENYB_[121]); + buf B129(WENYB[122], WENYB_[122]); + buf B130(WENYB[123], WENYB_[123]); + buf B131(WENYB[124], WENYB_[124]); + buf B132(WENYB[125], WENYB_[125]); + buf B133(WENYB[126], WENYB_[126]); + buf B134(WENYB[127], WENYB_[127]); + buf B135(AYB[0], AYB_[0]); + buf B136(AYB[1], AYB_[1]); + buf B137(AYB[2], AYB_[2]); + buf B138(AYB[3], AYB_[3]); + buf B139(AYB[4], AYB_[4]); + buf B140(QA[0], QA_[0]); + buf B141(QA[1], QA_[1]); + buf B142(QA[2], QA_[2]); + buf B143(QA[3], QA_[3]); + buf B144(QA[4], QA_[4]); + buf B145(QA[5], QA_[5]); + buf B146(QA[6], QA_[6]); + buf B147(QA[7], QA_[7]); + buf B148(QA[8], QA_[8]); + buf B149(QA[9], QA_[9]); + buf B150(QA[10], QA_[10]); + buf B151(QA[11], QA_[11]); + buf B152(QA[12], QA_[12]); + buf B153(QA[13], QA_[13]); + buf B154(QA[14], QA_[14]); + buf B155(QA[15], QA_[15]); + buf B156(QA[16], QA_[16]); + buf B157(QA[17], QA_[17]); + buf B158(QA[18], QA_[18]); + buf B159(QA[19], QA_[19]); + buf B160(QA[20], QA_[20]); + buf B161(QA[21], QA_[21]); + buf B162(QA[22], QA_[22]); + buf B163(QA[23], QA_[23]); + buf B164(QA[24], QA_[24]); + buf B165(QA[25], QA_[25]); + buf B166(QA[26], QA_[26]); + buf B167(QA[27], QA_[27]); + buf B168(QA[28], QA_[28]); + buf B169(QA[29], QA_[29]); + buf B170(QA[30], QA_[30]); + buf B171(QA[31], QA_[31]); + buf B172(QA[32], QA_[32]); + buf B173(QA[33], QA_[33]); + buf B174(QA[34], QA_[34]); + buf B175(QA[35], QA_[35]); + buf B176(QA[36], QA_[36]); + buf B177(QA[37], QA_[37]); + buf B178(QA[38], QA_[38]); + buf B179(QA[39], QA_[39]); + buf B180(QA[40], QA_[40]); + buf B181(QA[41], QA_[41]); + buf B182(QA[42], QA_[42]); + buf B183(QA[43], QA_[43]); + buf B184(QA[44], QA_[44]); + buf B185(QA[45], QA_[45]); + buf B186(QA[46], QA_[46]); + buf B187(QA[47], QA_[47]); + buf B188(QA[48], QA_[48]); + buf B189(QA[49], QA_[49]); + buf B190(QA[50], QA_[50]); + buf B191(QA[51], QA_[51]); + buf B192(QA[52], QA_[52]); + buf B193(QA[53], QA_[53]); + buf B194(QA[54], QA_[54]); + buf B195(QA[55], QA_[55]); + buf B196(QA[56], QA_[56]); + buf B197(QA[57], QA_[57]); + buf B198(QA[58], QA_[58]); + buf B199(QA[59], QA_[59]); + buf B200(QA[60], QA_[60]); + buf B201(QA[61], QA_[61]); + buf B202(QA[62], QA_[62]); + buf B203(QA[63], QA_[63]); + buf B204(QA[64], QA_[64]); + buf B205(QA[65], QA_[65]); + buf B206(QA[66], QA_[66]); + buf B207(QA[67], QA_[67]); + buf B208(QA[68], QA_[68]); + buf B209(QA[69], QA_[69]); + buf B210(QA[70], QA_[70]); + buf B211(QA[71], QA_[71]); + buf B212(QA[72], QA_[72]); + buf B213(QA[73], QA_[73]); + buf B214(QA[74], QA_[74]); + buf B215(QA[75], QA_[75]); + buf B216(QA[76], QA_[76]); + buf B217(QA[77], QA_[77]); + buf B218(QA[78], QA_[78]); + buf B219(QA[79], QA_[79]); + buf B220(QA[80], QA_[80]); + buf B221(QA[81], QA_[81]); + buf B222(QA[82], QA_[82]); + buf B223(QA[83], QA_[83]); + buf B224(QA[84], QA_[84]); + buf B225(QA[85], QA_[85]); + buf B226(QA[86], QA_[86]); + buf B227(QA[87], QA_[87]); + buf B228(QA[88], QA_[88]); + buf B229(QA[89], QA_[89]); + buf B230(QA[90], QA_[90]); + buf B231(QA[91], QA_[91]); + buf B232(QA[92], QA_[92]); + buf B233(QA[93], QA_[93]); + buf B234(QA[94], QA_[94]); + buf B235(QA[95], QA_[95]); + buf B236(QA[96], QA_[96]); + buf B237(QA[97], QA_[97]); + buf B238(QA[98], QA_[98]); + buf B239(QA[99], QA_[99]); + buf B240(QA[100], QA_[100]); + buf B241(QA[101], QA_[101]); + buf B242(QA[102], QA_[102]); + buf B243(QA[103], QA_[103]); + buf B244(QA[104], QA_[104]); + buf B245(QA[105], QA_[105]); + buf B246(QA[106], QA_[106]); + buf B247(QA[107], QA_[107]); + buf B248(QA[108], QA_[108]); + buf B249(QA[109], QA_[109]); + buf B250(QA[110], QA_[110]); + buf B251(QA[111], QA_[111]); + buf B252(QA[112], QA_[112]); + buf B253(QA[113], QA_[113]); + buf B254(QA[114], QA_[114]); + buf B255(QA[115], QA_[115]); + buf B256(QA[116], QA_[116]); + buf B257(QA[117], QA_[117]); + buf B258(QA[118], QA_[118]); + buf B259(QA[119], QA_[119]); + buf B260(QA[120], QA_[120]); + buf B261(QA[121], QA_[121]); + buf B262(QA[122], QA_[122]); + buf B263(QA[123], QA_[123]); + buf B264(QA[124], QA_[124]); + buf B265(QA[125], QA_[125]); + buf B266(QA[126], QA_[126]); + buf B267(QA[127], QA_[127]); + buf B268(SOA[0], SOA_[0]); + buf B269(SOA[1], SOA_[1]); + buf B270(SOB[0], SOB_[0]); + buf B271(SOB[1], SOB_[1]); + buf B272(CLKA_, CLKA); + buf B273(CENA_, CENA); + buf B274(AA_[0], AA[0]); + buf B275(AA_[1], AA[1]); + buf B276(AA_[2], AA[2]); + buf B277(AA_[3], AA[3]); + buf B278(AA_[4], AA[4]); + buf B279(CLKB_, CLKB); + buf B280(CENB_, CENB); + buf B281(WENB_[0], WENB[0]); + buf B282(WENB_[1], WENB[1]); + buf B283(WENB_[2], WENB[2]); + buf B284(WENB_[3], WENB[3]); + buf B285(WENB_[4], WENB[4]); + buf B286(WENB_[5], WENB[5]); + buf B287(WENB_[6], WENB[6]); + buf B288(WENB_[7], WENB[7]); + buf B289(WENB_[8], WENB[8]); + buf B290(WENB_[9], WENB[9]); + buf B291(WENB_[10], WENB[10]); + buf B292(WENB_[11], WENB[11]); + buf B293(WENB_[12], WENB[12]); + buf B294(WENB_[13], WENB[13]); + buf B295(WENB_[14], WENB[14]); + buf B296(WENB_[15], WENB[15]); + buf B297(WENB_[16], WENB[16]); + buf B298(WENB_[17], WENB[17]); + buf B299(WENB_[18], WENB[18]); + buf B300(WENB_[19], WENB[19]); + buf B301(WENB_[20], WENB[20]); + buf B302(WENB_[21], WENB[21]); + buf B303(WENB_[22], WENB[22]); + buf B304(WENB_[23], WENB[23]); + buf B305(WENB_[24], WENB[24]); + buf B306(WENB_[25], WENB[25]); + buf B307(WENB_[26], WENB[26]); + buf B308(WENB_[27], WENB[27]); + buf B309(WENB_[28], WENB[28]); + buf B310(WENB_[29], WENB[29]); + buf B311(WENB_[30], WENB[30]); + buf B312(WENB_[31], WENB[31]); + buf B313(WENB_[32], WENB[32]); + buf B314(WENB_[33], WENB[33]); + buf B315(WENB_[34], WENB[34]); + buf B316(WENB_[35], WENB[35]); + buf B317(WENB_[36], WENB[36]); + buf B318(WENB_[37], WENB[37]); + buf B319(WENB_[38], WENB[38]); + buf B320(WENB_[39], WENB[39]); + buf B321(WENB_[40], WENB[40]); + buf B322(WENB_[41], WENB[41]); + buf B323(WENB_[42], WENB[42]); + buf B324(WENB_[43], WENB[43]); + buf B325(WENB_[44], WENB[44]); + buf B326(WENB_[45], WENB[45]); + buf B327(WENB_[46], WENB[46]); + buf B328(WENB_[47], WENB[47]); + buf B329(WENB_[48], WENB[48]); + buf B330(WENB_[49], WENB[49]); + buf B331(WENB_[50], WENB[50]); + buf B332(WENB_[51], WENB[51]); + buf B333(WENB_[52], WENB[52]); + buf B334(WENB_[53], WENB[53]); + buf B335(WENB_[54], WENB[54]); + buf B336(WENB_[55], WENB[55]); + buf B337(WENB_[56], WENB[56]); + buf B338(WENB_[57], WENB[57]); + buf B339(WENB_[58], WENB[58]); + buf B340(WENB_[59], WENB[59]); + buf B341(WENB_[60], WENB[60]); + buf B342(WENB_[61], WENB[61]); + buf B343(WENB_[62], WENB[62]); + buf B344(WENB_[63], WENB[63]); + buf B345(WENB_[64], WENB[64]); + buf B346(WENB_[65], WENB[65]); + buf B347(WENB_[66], WENB[66]); + buf B348(WENB_[67], WENB[67]); + buf B349(WENB_[68], WENB[68]); + buf B350(WENB_[69], WENB[69]); + buf B351(WENB_[70], WENB[70]); + buf B352(WENB_[71], WENB[71]); + buf B353(WENB_[72], WENB[72]); + buf B354(WENB_[73], WENB[73]); + buf B355(WENB_[74], WENB[74]); + buf B356(WENB_[75], WENB[75]); + buf B357(WENB_[76], WENB[76]); + buf B358(WENB_[77], WENB[77]); + buf B359(WENB_[78], WENB[78]); + buf B360(WENB_[79], WENB[79]); + buf B361(WENB_[80], WENB[80]); + buf B362(WENB_[81], WENB[81]); + buf B363(WENB_[82], WENB[82]); + buf B364(WENB_[83], WENB[83]); + buf B365(WENB_[84], WENB[84]); + buf B366(WENB_[85], WENB[85]); + buf B367(WENB_[86], WENB[86]); + buf B368(WENB_[87], WENB[87]); + buf B369(WENB_[88], WENB[88]); + buf B370(WENB_[89], WENB[89]); + buf B371(WENB_[90], WENB[90]); + buf B372(WENB_[91], WENB[91]); + buf B373(WENB_[92], WENB[92]); + buf B374(WENB_[93], WENB[93]); + buf B375(WENB_[94], WENB[94]); + buf B376(WENB_[95], WENB[95]); + buf B377(WENB_[96], WENB[96]); + buf B378(WENB_[97], WENB[97]); + buf B379(WENB_[98], WENB[98]); + buf B380(WENB_[99], WENB[99]); + buf B381(WENB_[100], WENB[100]); + buf B382(WENB_[101], WENB[101]); + buf B383(WENB_[102], WENB[102]); + buf B384(WENB_[103], WENB[103]); + buf B385(WENB_[104], WENB[104]); + buf B386(WENB_[105], WENB[105]); + buf B387(WENB_[106], WENB[106]); + buf B388(WENB_[107], WENB[107]); + buf B389(WENB_[108], WENB[108]); + buf B390(WENB_[109], WENB[109]); + buf B391(WENB_[110], WENB[110]); + buf B392(WENB_[111], WENB[111]); + buf B393(WENB_[112], WENB[112]); + buf B394(WENB_[113], WENB[113]); + buf B395(WENB_[114], WENB[114]); + buf B396(WENB_[115], WENB[115]); + buf B397(WENB_[116], WENB[116]); + buf B398(WENB_[117], WENB[117]); + buf B399(WENB_[118], WENB[118]); + buf B400(WENB_[119], WENB[119]); + buf B401(WENB_[120], WENB[120]); + buf B402(WENB_[121], WENB[121]); + buf B403(WENB_[122], WENB[122]); + buf B404(WENB_[123], WENB[123]); + buf B405(WENB_[124], WENB[124]); + buf B406(WENB_[125], WENB[125]); + buf B407(WENB_[126], WENB[126]); + buf B408(WENB_[127], WENB[127]); + buf B409(AB_[0], AB[0]); + buf B410(AB_[1], AB[1]); + buf B411(AB_[2], AB[2]); + buf B412(AB_[3], AB[3]); + buf B413(AB_[4], AB[4]); + buf B414(DB_[0], DB[0]); + buf B415(DB_[1], DB[1]); + buf B416(DB_[2], DB[2]); + buf B417(DB_[3], DB[3]); + buf B418(DB_[4], DB[4]); + buf B419(DB_[5], DB[5]); + buf B420(DB_[6], DB[6]); + buf B421(DB_[7], DB[7]); + buf B422(DB_[8], DB[8]); + buf B423(DB_[9], DB[9]); + buf B424(DB_[10], DB[10]); + buf B425(DB_[11], DB[11]); + buf B426(DB_[12], DB[12]); + buf B427(DB_[13], DB[13]); + buf B428(DB_[14], DB[14]); + buf B429(DB_[15], DB[15]); + buf B430(DB_[16], DB[16]); + buf B431(DB_[17], DB[17]); + buf B432(DB_[18], DB[18]); + buf B433(DB_[19], DB[19]); + buf B434(DB_[20], DB[20]); + buf B435(DB_[21], DB[21]); + buf B436(DB_[22], DB[22]); + buf B437(DB_[23], DB[23]); + buf B438(DB_[24], DB[24]); + buf B439(DB_[25], DB[25]); + buf B440(DB_[26], DB[26]); + buf B441(DB_[27], DB[27]); + buf B442(DB_[28], DB[28]); + buf B443(DB_[29], DB[29]); + buf B444(DB_[30], DB[30]); + buf B445(DB_[31], DB[31]); + buf B446(DB_[32], DB[32]); + buf B447(DB_[33], DB[33]); + buf B448(DB_[34], DB[34]); + buf B449(DB_[35], DB[35]); + buf B450(DB_[36], DB[36]); + buf B451(DB_[37], DB[37]); + buf B452(DB_[38], DB[38]); + buf B453(DB_[39], DB[39]); + buf B454(DB_[40], DB[40]); + buf B455(DB_[41], DB[41]); + buf B456(DB_[42], DB[42]); + buf B457(DB_[43], DB[43]); + buf B458(DB_[44], DB[44]); + buf B459(DB_[45], DB[45]); + buf B460(DB_[46], DB[46]); + buf B461(DB_[47], DB[47]); + buf B462(DB_[48], DB[48]); + buf B463(DB_[49], DB[49]); + buf B464(DB_[50], DB[50]); + buf B465(DB_[51], DB[51]); + buf B466(DB_[52], DB[52]); + buf B467(DB_[53], DB[53]); + buf B468(DB_[54], DB[54]); + buf B469(DB_[55], DB[55]); + buf B470(DB_[56], DB[56]); + buf B471(DB_[57], DB[57]); + buf B472(DB_[58], DB[58]); + buf B473(DB_[59], DB[59]); + buf B474(DB_[60], DB[60]); + buf B475(DB_[61], DB[61]); + buf B476(DB_[62], DB[62]); + buf B477(DB_[63], DB[63]); + buf B478(DB_[64], DB[64]); + buf B479(DB_[65], DB[65]); + buf B480(DB_[66], DB[66]); + buf B481(DB_[67], DB[67]); + buf B482(DB_[68], DB[68]); + buf B483(DB_[69], DB[69]); + buf B484(DB_[70], DB[70]); + buf B485(DB_[71], DB[71]); + buf B486(DB_[72], DB[72]); + buf B487(DB_[73], DB[73]); + buf B488(DB_[74], DB[74]); + buf B489(DB_[75], DB[75]); + buf B490(DB_[76], DB[76]); + buf B491(DB_[77], DB[77]); + buf B492(DB_[78], DB[78]); + buf B493(DB_[79], DB[79]); + buf B494(DB_[80], DB[80]); + buf B495(DB_[81], DB[81]); + buf B496(DB_[82], DB[82]); + buf B497(DB_[83], DB[83]); + buf B498(DB_[84], DB[84]); + buf B499(DB_[85], DB[85]); + buf B500(DB_[86], DB[86]); + buf B501(DB_[87], DB[87]); + buf B502(DB_[88], DB[88]); + buf B503(DB_[89], DB[89]); + buf B504(DB_[90], DB[90]); + buf B505(DB_[91], DB[91]); + buf B506(DB_[92], DB[92]); + buf B507(DB_[93], DB[93]); + buf B508(DB_[94], DB[94]); + buf B509(DB_[95], DB[95]); + buf B510(DB_[96], DB[96]); + buf B511(DB_[97], DB[97]); + buf B512(DB_[98], DB[98]); + buf B513(DB_[99], DB[99]); + buf B514(DB_[100], DB[100]); + buf B515(DB_[101], DB[101]); + buf B516(DB_[102], DB[102]); + buf B517(DB_[103], DB[103]); + buf B518(DB_[104], DB[104]); + buf B519(DB_[105], DB[105]); + buf B520(DB_[106], DB[106]); + buf B521(DB_[107], DB[107]); + buf B522(DB_[108], DB[108]); + buf B523(DB_[109], DB[109]); + buf B524(DB_[110], DB[110]); + buf B525(DB_[111], DB[111]); + buf B526(DB_[112], DB[112]); + buf B527(DB_[113], DB[113]); + buf B528(DB_[114], DB[114]); + buf B529(DB_[115], DB[115]); + buf B530(DB_[116], DB[116]); + buf B531(DB_[117], DB[117]); + buf B532(DB_[118], DB[118]); + buf B533(DB_[119], DB[119]); + buf B534(DB_[120], DB[120]); + buf B535(DB_[121], DB[121]); + buf B536(DB_[122], DB[122]); + buf B537(DB_[123], DB[123]); + buf B538(DB_[124], DB[124]); + buf B539(DB_[125], DB[125]); + buf B540(DB_[126], DB[126]); + buf B541(DB_[127], DB[127]); + buf B542(EMAA_[0], EMAA[0]); + buf B543(EMAA_[1], EMAA[1]); + buf B544(EMAA_[2], EMAA[2]); + buf B545(EMASA_, EMASA); + buf B546(EMAB_[0], EMAB[0]); + buf B547(EMAB_[1], EMAB[1]); + buf B548(EMAB_[2], EMAB[2]); + buf B549(TENA_, TENA); + buf B550(TCENA_, TCENA); + buf B551(TAA_[0], TAA[0]); + buf B552(TAA_[1], TAA[1]); + buf B553(TAA_[2], TAA[2]); + buf B554(TAA_[3], TAA[3]); + buf B555(TAA_[4], TAA[4]); + buf B556(TENB_, TENB); + buf B557(TCENB_, TCENB); + buf B558(TWENB_[0], TWENB[0]); + buf B559(TWENB_[1], TWENB[1]); + buf B560(TWENB_[2], TWENB[2]); + buf B561(TWENB_[3], TWENB[3]); + buf B562(TWENB_[4], TWENB[4]); + buf B563(TWENB_[5], TWENB[5]); + buf B564(TWENB_[6], TWENB[6]); + buf B565(TWENB_[7], TWENB[7]); + buf B566(TWENB_[8], TWENB[8]); + buf B567(TWENB_[9], TWENB[9]); + buf B568(TWENB_[10], TWENB[10]); + buf B569(TWENB_[11], TWENB[11]); + buf B570(TWENB_[12], TWENB[12]); + buf B571(TWENB_[13], TWENB[13]); + buf B572(TWENB_[14], TWENB[14]); + buf B573(TWENB_[15], TWENB[15]); + buf B574(TWENB_[16], TWENB[16]); + buf B575(TWENB_[17], TWENB[17]); + buf B576(TWENB_[18], TWENB[18]); + buf B577(TWENB_[19], TWENB[19]); + buf B578(TWENB_[20], TWENB[20]); + buf B579(TWENB_[21], TWENB[21]); + buf B580(TWENB_[22], TWENB[22]); + buf B581(TWENB_[23], TWENB[23]); + buf B582(TWENB_[24], TWENB[24]); + buf B583(TWENB_[25], TWENB[25]); + buf B584(TWENB_[26], TWENB[26]); + buf B585(TWENB_[27], TWENB[27]); + buf B586(TWENB_[28], TWENB[28]); + buf B587(TWENB_[29], TWENB[29]); + buf B588(TWENB_[30], TWENB[30]); + buf B589(TWENB_[31], TWENB[31]); + buf B590(TWENB_[32], TWENB[32]); + buf B591(TWENB_[33], TWENB[33]); + buf B592(TWENB_[34], TWENB[34]); + buf B593(TWENB_[35], TWENB[35]); + buf B594(TWENB_[36], TWENB[36]); + buf B595(TWENB_[37], TWENB[37]); + buf B596(TWENB_[38], TWENB[38]); + buf B597(TWENB_[39], TWENB[39]); + buf B598(TWENB_[40], TWENB[40]); + buf B599(TWENB_[41], TWENB[41]); + buf B600(TWENB_[42], TWENB[42]); + buf B601(TWENB_[43], TWENB[43]); + buf B602(TWENB_[44], TWENB[44]); + buf B603(TWENB_[45], TWENB[45]); + buf B604(TWENB_[46], TWENB[46]); + buf B605(TWENB_[47], TWENB[47]); + buf B606(TWENB_[48], TWENB[48]); + buf B607(TWENB_[49], TWENB[49]); + buf B608(TWENB_[50], TWENB[50]); + buf B609(TWENB_[51], TWENB[51]); + buf B610(TWENB_[52], TWENB[52]); + buf B611(TWENB_[53], TWENB[53]); + buf B612(TWENB_[54], TWENB[54]); + buf B613(TWENB_[55], TWENB[55]); + buf B614(TWENB_[56], TWENB[56]); + buf B615(TWENB_[57], TWENB[57]); + buf B616(TWENB_[58], TWENB[58]); + buf B617(TWENB_[59], TWENB[59]); + buf B618(TWENB_[60], TWENB[60]); + buf B619(TWENB_[61], TWENB[61]); + buf B620(TWENB_[62], TWENB[62]); + buf B621(TWENB_[63], TWENB[63]); + buf B622(TWENB_[64], TWENB[64]); + buf B623(TWENB_[65], TWENB[65]); + buf B624(TWENB_[66], TWENB[66]); + buf B625(TWENB_[67], TWENB[67]); + buf B626(TWENB_[68], TWENB[68]); + buf B627(TWENB_[69], TWENB[69]); + buf B628(TWENB_[70], TWENB[70]); + buf B629(TWENB_[71], TWENB[71]); + buf B630(TWENB_[72], TWENB[72]); + buf B631(TWENB_[73], TWENB[73]); + buf B632(TWENB_[74], TWENB[74]); + buf B633(TWENB_[75], TWENB[75]); + buf B634(TWENB_[76], TWENB[76]); + buf B635(TWENB_[77], TWENB[77]); + buf B636(TWENB_[78], TWENB[78]); + buf B637(TWENB_[79], TWENB[79]); + buf B638(TWENB_[80], TWENB[80]); + buf B639(TWENB_[81], TWENB[81]); + buf B640(TWENB_[82], TWENB[82]); + buf B641(TWENB_[83], TWENB[83]); + buf B642(TWENB_[84], TWENB[84]); + buf B643(TWENB_[85], TWENB[85]); + buf B644(TWENB_[86], TWENB[86]); + buf B645(TWENB_[87], TWENB[87]); + buf B646(TWENB_[88], TWENB[88]); + buf B647(TWENB_[89], TWENB[89]); + buf B648(TWENB_[90], TWENB[90]); + buf B649(TWENB_[91], TWENB[91]); + buf B650(TWENB_[92], TWENB[92]); + buf B651(TWENB_[93], TWENB[93]); + buf B652(TWENB_[94], TWENB[94]); + buf B653(TWENB_[95], TWENB[95]); + buf B654(TWENB_[96], TWENB[96]); + buf B655(TWENB_[97], TWENB[97]); + buf B656(TWENB_[98], TWENB[98]); + buf B657(TWENB_[99], TWENB[99]); + buf B658(TWENB_[100], TWENB[100]); + buf B659(TWENB_[101], TWENB[101]); + buf B660(TWENB_[102], TWENB[102]); + buf B661(TWENB_[103], TWENB[103]); + buf B662(TWENB_[104], TWENB[104]); + buf B663(TWENB_[105], TWENB[105]); + buf B664(TWENB_[106], TWENB[106]); + buf B665(TWENB_[107], TWENB[107]); + buf B666(TWENB_[108], TWENB[108]); + buf B667(TWENB_[109], TWENB[109]); + buf B668(TWENB_[110], TWENB[110]); + buf B669(TWENB_[111], TWENB[111]); + buf B670(TWENB_[112], TWENB[112]); + buf B671(TWENB_[113], TWENB[113]); + buf B672(TWENB_[114], TWENB[114]); + buf B673(TWENB_[115], TWENB[115]); + buf B674(TWENB_[116], TWENB[116]); + buf B675(TWENB_[117], TWENB[117]); + buf B676(TWENB_[118], TWENB[118]); + buf B677(TWENB_[119], TWENB[119]); + buf B678(TWENB_[120], TWENB[120]); + buf B679(TWENB_[121], TWENB[121]); + buf B680(TWENB_[122], TWENB[122]); + buf B681(TWENB_[123], TWENB[123]); + buf B682(TWENB_[124], TWENB[124]); + buf B683(TWENB_[125], TWENB[125]); + buf B684(TWENB_[126], TWENB[126]); + buf B685(TWENB_[127], TWENB[127]); + buf B686(TAB_[0], TAB[0]); + buf B687(TAB_[1], TAB[1]); + buf B688(TAB_[2], TAB[2]); + buf B689(TAB_[3], TAB[3]); + buf B690(TAB_[4], TAB[4]); + buf B691(TDB_[0], TDB[0]); + buf B692(TDB_[1], TDB[1]); + buf B693(TDB_[2], TDB[2]); + buf B694(TDB_[3], TDB[3]); + buf B695(TDB_[4], TDB[4]); + buf B696(TDB_[5], TDB[5]); + buf B697(TDB_[6], TDB[6]); + buf B698(TDB_[7], TDB[7]); + buf B699(TDB_[8], TDB[8]); + buf B700(TDB_[9], TDB[9]); + buf B701(TDB_[10], TDB[10]); + buf B702(TDB_[11], TDB[11]); + buf B703(TDB_[12], TDB[12]); + buf B704(TDB_[13], TDB[13]); + buf B705(TDB_[14], TDB[14]); + buf B706(TDB_[15], TDB[15]); + buf B707(TDB_[16], TDB[16]); + buf B708(TDB_[17], TDB[17]); + buf B709(TDB_[18], TDB[18]); + buf B710(TDB_[19], TDB[19]); + buf B711(TDB_[20], TDB[20]); + buf B712(TDB_[21], TDB[21]); + buf B713(TDB_[22], TDB[22]); + buf B714(TDB_[23], TDB[23]); + buf B715(TDB_[24], TDB[24]); + buf B716(TDB_[25], TDB[25]); + buf B717(TDB_[26], TDB[26]); + buf B718(TDB_[27], TDB[27]); + buf B719(TDB_[28], TDB[28]); + buf B720(TDB_[29], TDB[29]); + buf B721(TDB_[30], TDB[30]); + buf B722(TDB_[31], TDB[31]); + buf B723(TDB_[32], TDB[32]); + buf B724(TDB_[33], TDB[33]); + buf B725(TDB_[34], TDB[34]); + buf B726(TDB_[35], TDB[35]); + buf B727(TDB_[36], TDB[36]); + buf B728(TDB_[37], TDB[37]); + buf B729(TDB_[38], TDB[38]); + buf B730(TDB_[39], TDB[39]); + buf B731(TDB_[40], TDB[40]); + buf B732(TDB_[41], TDB[41]); + buf B733(TDB_[42], TDB[42]); + buf B734(TDB_[43], TDB[43]); + buf B735(TDB_[44], TDB[44]); + buf B736(TDB_[45], TDB[45]); + buf B737(TDB_[46], TDB[46]); + buf B738(TDB_[47], TDB[47]); + buf B739(TDB_[48], TDB[48]); + buf B740(TDB_[49], TDB[49]); + buf B741(TDB_[50], TDB[50]); + buf B742(TDB_[51], TDB[51]); + buf B743(TDB_[52], TDB[52]); + buf B744(TDB_[53], TDB[53]); + buf B745(TDB_[54], TDB[54]); + buf B746(TDB_[55], TDB[55]); + buf B747(TDB_[56], TDB[56]); + buf B748(TDB_[57], TDB[57]); + buf B749(TDB_[58], TDB[58]); + buf B750(TDB_[59], TDB[59]); + buf B751(TDB_[60], TDB[60]); + buf B752(TDB_[61], TDB[61]); + buf B753(TDB_[62], TDB[62]); + buf B754(TDB_[63], TDB[63]); + buf B755(TDB_[64], TDB[64]); + buf B756(TDB_[65], TDB[65]); + buf B757(TDB_[66], TDB[66]); + buf B758(TDB_[67], TDB[67]); + buf B759(TDB_[68], TDB[68]); + buf B760(TDB_[69], TDB[69]); + buf B761(TDB_[70], TDB[70]); + buf B762(TDB_[71], TDB[71]); + buf B763(TDB_[72], TDB[72]); + buf B764(TDB_[73], TDB[73]); + buf B765(TDB_[74], TDB[74]); + buf B766(TDB_[75], TDB[75]); + buf B767(TDB_[76], TDB[76]); + buf B768(TDB_[77], TDB[77]); + buf B769(TDB_[78], TDB[78]); + buf B770(TDB_[79], TDB[79]); + buf B771(TDB_[80], TDB[80]); + buf B772(TDB_[81], TDB[81]); + buf B773(TDB_[82], TDB[82]); + buf B774(TDB_[83], TDB[83]); + buf B775(TDB_[84], TDB[84]); + buf B776(TDB_[85], TDB[85]); + buf B777(TDB_[86], TDB[86]); + buf B778(TDB_[87], TDB[87]); + buf B779(TDB_[88], TDB[88]); + buf B780(TDB_[89], TDB[89]); + buf B781(TDB_[90], TDB[90]); + buf B782(TDB_[91], TDB[91]); + buf B783(TDB_[92], TDB[92]); + buf B784(TDB_[93], TDB[93]); + buf B785(TDB_[94], TDB[94]); + buf B786(TDB_[95], TDB[95]); + buf B787(TDB_[96], TDB[96]); + buf B788(TDB_[97], TDB[97]); + buf B789(TDB_[98], TDB[98]); + buf B790(TDB_[99], TDB[99]); + buf B791(TDB_[100], TDB[100]); + buf B792(TDB_[101], TDB[101]); + buf B793(TDB_[102], TDB[102]); + buf B794(TDB_[103], TDB[103]); + buf B795(TDB_[104], TDB[104]); + buf B796(TDB_[105], TDB[105]); + buf B797(TDB_[106], TDB[106]); + buf B798(TDB_[107], TDB[107]); + buf B799(TDB_[108], TDB[108]); + buf B800(TDB_[109], TDB[109]); + buf B801(TDB_[110], TDB[110]); + buf B802(TDB_[111], TDB[111]); + buf B803(TDB_[112], TDB[112]); + buf B804(TDB_[113], TDB[113]); + buf B805(TDB_[114], TDB[114]); + buf B806(TDB_[115], TDB[115]); + buf B807(TDB_[116], TDB[116]); + buf B808(TDB_[117], TDB[117]); + buf B809(TDB_[118], TDB[118]); + buf B810(TDB_[119], TDB[119]); + buf B811(TDB_[120], TDB[120]); + buf B812(TDB_[121], TDB[121]); + buf B813(TDB_[122], TDB[122]); + buf B814(TDB_[123], TDB[123]); + buf B815(TDB_[124], TDB[124]); + buf B816(TDB_[125], TDB[125]); + buf B817(TDB_[126], TDB[126]); + buf B818(TDB_[127], TDB[127]); + buf B819(RET1N_, RET1N); + buf B820(SIA_[0], SIA[0]); + buf B821(SIA_[1], SIA[1]); + buf B822(SEA_, SEA); + buf B823(DFTRAMBYP_, DFTRAMBYP); + buf B824(SIB_[0], SIB[0]); + buf B825(SIB_[1], SIB[1]); + buf B826(SEB_, SEB); + buf B827(COLLDISN_, COLLDISN); + + assign CENYA_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENA_ ? CENA_ : TCENA_)) : 1'bx; + assign AYA_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENA_ ? AA_ : TAA_)) : {5{1'bx}}; + assign CENYB_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENB_ ? CENB_ : TCENB_)) : 1'bx; + assign WENYB_ = (RET1N_ | pre_charge_st) ? ({128{DFTRAMBYP_}} & (TENB_ ? WENB_ : TWENB_)) : {128{1'bx}}; + assign AYB_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENB_ ? AB_ : TAB_)) : {5{1'bx}}; + assign QA_ = (RET1N_ | pre_charge_st) ? ((QA_int)) : {128{1'bx}}; + assign SOA_ = (RET1N_ | pre_charge_st) ? ({QA_[127], QA_[0]}) : {2{1'bx}}; + assign SOB_ = (RET1N_ | pre_charge_st) ? ({DB_int_sh[127], DB_int_sh[0]}) : {2{1'bx}}; + +// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS. +`ifdef INITIALIZE_MEMORY + integer i; + initial begin + #0; + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'b0}}; + end +`endif + always @ (EMAA_) begin + if(EMAA_ < 3) + $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time); + end + always @ (EMASA_) begin + if(EMASA_ < 0) + $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time); + end + always @ (EMAB_) begin + if(EMAB_ < 3) + $display("Warning: Set Value for EMAB doesn't match Default value 3 in %m at %0t", $time); + end + + task failedWrite; + input port_f; + integer i; + begin + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'bx}}; + end + endtask + + function isBitX; + input bitval; + begin + isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0; + end + endfunction + + function isBit1; + input bitval; + begin + isBit1 = ( bitval===1'b1 ) ? 1'b1 : 1'b0; + end + endfunction + + +task loadmem; + input [1000*8-1:0] filename; + reg [BITS-1:0] memld [0:WORDS-1]; + integer i; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + $readmemb(filename, memld); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[127], 1'b0, wordtemp[126], 1'b0, wordtemp[125], + 1'b0, wordtemp[124], 1'b0, wordtemp[123], 1'b0, wordtemp[122], 1'b0, wordtemp[121], + 1'b0, wordtemp[120], 1'b0, wordtemp[119], 1'b0, wordtemp[118], 1'b0, wordtemp[117], + 1'b0, wordtemp[116], 1'b0, wordtemp[115], 1'b0, wordtemp[114], 1'b0, wordtemp[113], + 1'b0, wordtemp[112], 1'b0, wordtemp[111], 1'b0, wordtemp[110], 1'b0, wordtemp[109], + 1'b0, wordtemp[108], 1'b0, wordtemp[107], 1'b0, wordtemp[106], 1'b0, wordtemp[105], + 1'b0, wordtemp[104], 1'b0, wordtemp[103], 1'b0, wordtemp[102], 1'b0, wordtemp[101], + 1'b0, wordtemp[100], 1'b0, wordtemp[99], 1'b0, wordtemp[98], 1'b0, wordtemp[97], + 1'b0, wordtemp[96], 1'b0, wordtemp[95], 1'b0, wordtemp[94], 1'b0, wordtemp[93], + 1'b0, wordtemp[92], 1'b0, wordtemp[91], 1'b0, wordtemp[90], 1'b0, wordtemp[89], + 1'b0, wordtemp[88], 1'b0, wordtemp[87], 1'b0, wordtemp[86], 1'b0, wordtemp[85], + 1'b0, wordtemp[84], 1'b0, wordtemp[83], 1'b0, wordtemp[82], 1'b0, wordtemp[81], + 1'b0, wordtemp[80], 1'b0, wordtemp[79], 1'b0, wordtemp[78], 1'b0, wordtemp[77], + 1'b0, wordtemp[76], 1'b0, wordtemp[75], 1'b0, wordtemp[74], 1'b0, wordtemp[73], + 1'b0, wordtemp[72], 1'b0, wordtemp[71], 1'b0, wordtemp[70], 1'b0, wordtemp[69], + 1'b0, wordtemp[68], 1'b0, wordtemp[67], 1'b0, wordtemp[66], 1'b0, wordtemp[65], + 1'b0, wordtemp[64], 1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61], + 1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57], + 1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53], + 1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49], + 1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45], + 1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41], + 1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37], + 1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33], + 1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29], + 1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25], + 1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21], + 1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17], + 1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], + 1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], + 1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], + 1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], + 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + end + endtask + +task dumpmem; + input [1000*8-1:0] filename_dump; + integer i, dump_file_desc; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + dump_file_desc = $fopen(filename_dump); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + data_out = (row >> mux_address); + mem_path = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + $fdisplay(dump_file_desc, "%b", QA_int); + end + end + $fclose(dump_file_desc); + end + endtask + +task loadaddr; + input [4:0] load_addr; + input [127:0] load_data; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + wordtemp = load_data; + Atemp = load_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[127], 1'b0, wordtemp[126], 1'b0, wordtemp[125], + 1'b0, wordtemp[124], 1'b0, wordtemp[123], 1'b0, wordtemp[122], 1'b0, wordtemp[121], + 1'b0, wordtemp[120], 1'b0, wordtemp[119], 1'b0, wordtemp[118], 1'b0, wordtemp[117], + 1'b0, wordtemp[116], 1'b0, wordtemp[115], 1'b0, wordtemp[114], 1'b0, wordtemp[113], + 1'b0, wordtemp[112], 1'b0, wordtemp[111], 1'b0, wordtemp[110], 1'b0, wordtemp[109], + 1'b0, wordtemp[108], 1'b0, wordtemp[107], 1'b0, wordtemp[106], 1'b0, wordtemp[105], + 1'b0, wordtemp[104], 1'b0, wordtemp[103], 1'b0, wordtemp[102], 1'b0, wordtemp[101], + 1'b0, wordtemp[100], 1'b0, wordtemp[99], 1'b0, wordtemp[98], 1'b0, wordtemp[97], + 1'b0, wordtemp[96], 1'b0, wordtemp[95], 1'b0, wordtemp[94], 1'b0, wordtemp[93], + 1'b0, wordtemp[92], 1'b0, wordtemp[91], 1'b0, wordtemp[90], 1'b0, wordtemp[89], + 1'b0, wordtemp[88], 1'b0, wordtemp[87], 1'b0, wordtemp[86], 1'b0, wordtemp[85], + 1'b0, wordtemp[84], 1'b0, wordtemp[83], 1'b0, wordtemp[82], 1'b0, wordtemp[81], + 1'b0, wordtemp[80], 1'b0, wordtemp[79], 1'b0, wordtemp[78], 1'b0, wordtemp[77], + 1'b0, wordtemp[76], 1'b0, wordtemp[75], 1'b0, wordtemp[74], 1'b0, wordtemp[73], + 1'b0, wordtemp[72], 1'b0, wordtemp[71], 1'b0, wordtemp[70], 1'b0, wordtemp[69], + 1'b0, wordtemp[68], 1'b0, wordtemp[67], 1'b0, wordtemp[66], 1'b0, wordtemp[65], + 1'b0, wordtemp[64], 1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61], + 1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57], + 1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53], + 1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49], + 1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45], + 1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41], + 1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37], + 1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33], + 1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29], + 1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25], + 1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21], + 1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17], + 1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], + 1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], + 1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], + 1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], + 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + endtask + +task dumpaddr; + output [127:0] dump_data; + input [4:0] dump_addr; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + Atemp = dump_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + data_out = (row >> mux_address); + mem_path = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + dump_data = QA_int; + end + end + endtask + + + task ReadA; + begin + if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'b1) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0 && (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAA_int & isBit1(DFTRAMBYP_int)), (EMASA_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if ((AA_int >= WORDS) && (CENA_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + XQA = 0 ? 1'b0 : 1'b1; QA_update = 0 ? 1'b0 : 1'b1; + end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if (DFTRAMBYP_int !== 1'b1) begin + mux_address = (AA_int & 1'b1); + row_address = (AA_int >> 1); + if (row_address > 15) + row = {256{1'bx}}; + else + row = mem[row_address]; + data_out = (row >> mux_address); + mem_path = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + end + if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'b0) begin + end else if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end + if( isBitX(DFTRAMBYP_int) ) begin + XQA = 1'b1; QA_update = 1'b1; + end + if( isBitX(SEA_int) && DFTRAMBYP_int === 1'b1 ) begin + XQA = 1'b1; QA_update = 1'b1; + end + if(isBitX(DFTRAMBYP_int)) begin + XQA = 1'b1; QA_update = 1'b1; + failedWrite(0); + end + end + end + endtask + + task WriteB; + begin + if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'b1) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0 && (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAB_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if ((AB_int >= WORDS) && (CENB_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end else if (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) + DB_int = {128{1'bx}}; + + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end + mux_address = (AB_int & 1'b1); + row_address = (AB_int >> 1); + if (DFTRAMBYP_int !== 1'b1) begin + if (row_address > 15) + row = {256{1'bx}}; + else + row = mem[row_address]; + end + if(isBitX(DFTRAMBYP_int)) begin + writeEnable = {128{1'bx}}; + DB_int = {128{1'bx}}; + end else + writeEnable = ~ {WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, DB_int[127], 1'b0, DB_int[126], 1'b0, DB_int[125], 1'b0, DB_int[124], + 1'b0, DB_int[123], 1'b0, DB_int[122], 1'b0, DB_int[121], 1'b0, DB_int[120], + 1'b0, DB_int[119], 1'b0, DB_int[118], 1'b0, DB_int[117], 1'b0, DB_int[116], + 1'b0, DB_int[115], 1'b0, DB_int[114], 1'b0, DB_int[113], 1'b0, DB_int[112], + 1'b0, DB_int[111], 1'b0, DB_int[110], 1'b0, DB_int[109], 1'b0, DB_int[108], + 1'b0, DB_int[107], 1'b0, DB_int[106], 1'b0, DB_int[105], 1'b0, DB_int[104], + 1'b0, DB_int[103], 1'b0, DB_int[102], 1'b0, DB_int[101], 1'b0, DB_int[100], + 1'b0, DB_int[99], 1'b0, DB_int[98], 1'b0, DB_int[97], 1'b0, DB_int[96], 1'b0, DB_int[95], + 1'b0, DB_int[94], 1'b0, DB_int[93], 1'b0, DB_int[92], 1'b0, DB_int[91], 1'b0, DB_int[90], + 1'b0, DB_int[89], 1'b0, DB_int[88], 1'b0, DB_int[87], 1'b0, DB_int[86], 1'b0, DB_int[85], + 1'b0, DB_int[84], 1'b0, DB_int[83], 1'b0, DB_int[82], 1'b0, DB_int[81], 1'b0, DB_int[80], + 1'b0, DB_int[79], 1'b0, DB_int[78], 1'b0, DB_int[77], 1'b0, DB_int[76], 1'b0, DB_int[75], + 1'b0, DB_int[74], 1'b0, DB_int[73], 1'b0, DB_int[72], 1'b0, DB_int[71], 1'b0, DB_int[70], + 1'b0, DB_int[69], 1'b0, DB_int[68], 1'b0, DB_int[67], 1'b0, DB_int[66], 1'b0, DB_int[65], + 1'b0, DB_int[64], 1'b0, DB_int[63], 1'b0, DB_int[62], 1'b0, DB_int[61], 1'b0, DB_int[60], + 1'b0, DB_int[59], 1'b0, DB_int[58], 1'b0, DB_int[57], 1'b0, DB_int[56], 1'b0, DB_int[55], + 1'b0, DB_int[54], 1'b0, DB_int[53], 1'b0, DB_int[52], 1'b0, DB_int[51], 1'b0, DB_int[50], + 1'b0, DB_int[49], 1'b0, DB_int[48], 1'b0, DB_int[47], 1'b0, DB_int[46], 1'b0, DB_int[45], + 1'b0, DB_int[44], 1'b0, DB_int[43], 1'b0, DB_int[42], 1'b0, DB_int[41], 1'b0, DB_int[40], + 1'b0, DB_int[39], 1'b0, DB_int[38], 1'b0, DB_int[37], 1'b0, DB_int[36], 1'b0, DB_int[35], + 1'b0, DB_int[34], 1'b0, DB_int[33], 1'b0, DB_int[32], 1'b0, DB_int[31], 1'b0, DB_int[30], + 1'b0, DB_int[29], 1'b0, DB_int[28], 1'b0, DB_int[27], 1'b0, DB_int[26], 1'b0, DB_int[25], + 1'b0, DB_int[24], 1'b0, DB_int[23], 1'b0, DB_int[22], 1'b0, DB_int[21], 1'b0, DB_int[20], + 1'b0, DB_int[19], 1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15], + 1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10], + 1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5], + 1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + if (DFTRAMBYP_int === 1'b1 && (SEB_int === 1'b0 || SEB_int === 1'bx)) begin + end else begin + mem[row_address] = row; + end + end + end + endtask + always @ (CENA_ or TCENA_ or TENA_ or DFTRAMBYP_ or CLKA_) begin + if(CLKA_ == 1'b0) begin + CENA_p2 = CENA_; + TCENA_p2 = TCENA_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (VDDCE) begin + if (VDDCE != 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time); + end + $display("In PowerDown Mode in %m at %0t", $time); + failedWrite(0); + end + if (VDDCE == 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDPE should be powered up after VDDCE in %m at %0t", $time); + $display("Illegal power up sequencing in %m at %0t", $time); + end + failedWrite(0); + end + end +`endif +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || TCENA_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKA_ === 1'bx)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_a = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_a = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(0); + end +`else + if (RET1N_ == 1'b0) begin +`endif + XQA = 1'b1; QA_update = 1'b1; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_a = 0; + pre_charge_st = 0; +`else + end else begin +`endif + XQA = 1'b1; QA_update = 1'b1; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + #0; + QA_update = 1'b0; + end + + always @ (CLKB_ or DFTRAMBYP_p2) begin + #0; + if(CLKB_ == 1'b1 && (DFTRAMBYP_int === 1'b1 || CENB_int != 1'b1)) begin + if (RET1N_ == 1'b1) begin + DB_sh_update = 1'b1; + end + end + end + + always @ CLKA_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if ((CLKA_ === 1'b1 || CLKA_ === 1'b0) && LAST_CLKA === 1'bx) begin + XQA = 1'b0; QA_update = 1'b0; + end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + end else begin + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (RET1N_ == 1'b1) begin + XQA = 1'b0; QA_update = 1'b1; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b0) begin + if (RET1N_ == 1'b1) begin + XQA = 1'b0; QA_update = 1'b1; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else begin + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + ReadA; + if (CENA_int === 1'b0) previous_CLKA = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + ReadA; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + mem_path = (partial_mask & {128{1'bx}}) | (~partial_mask & mem_path); + #0; + QA_update = 1'b0; + #0; + QA_update = 1'b1; + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int, 1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin + QA_update = 1'b0; + XQA = 1'b0; + end + end + LAST_CLKA = CLKA_; + end + + reg globalNotifier0; + initial globalNotifier0 = 1'b0; + initial cont_flag0_int = 1'b0; + + always @ globalNotifier0 begin + if ($realtime == 0) begin + end else if ((EMAA_int[0] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMAA_int[1] === 1'bx & DFTRAMBYP_int === 1'b1) || + (EMAA_int[2] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMASA_int === 1'bx & DFTRAMBYP_int === 1'b1) + ) begin + XQA = 1'b1; QA_update = 1'b1; + end else if ((CENA_int === 1'bx & DFTRAMBYP_int === 1'b0) || EMAA_int[0] === 1'bx || + EMAA_int[1] === 1'bx || EMAA_int[2] === 1'bx || EMASA_int === 1'bx || RET1N_int === 1'bx + || clk0_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (TENA_int === 1'bx) begin + if(((CENA_ === 1'b1 & TCENA_ === 1'b1) & DFTRAMBYP_int === 1'b0) | (DFTRAMBYP_int === 1'b1 & SEA_int === 1'b1)) begin + end else begin + if (DFTRAMBYP_int === 1'b0) begin + XQA = 1'b1; QA_update = 1'b1; + end + end + end else if (cont_flag0_int === 1'bx && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + cont_flag0_int = 1'b0; + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + mem_path = (partial_mask & {128{1'bx}}) | (~partial_mask & mem_path); + #0; + QA_update = 1'b0; + #0; + QA_update = 1'b1; + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end + end else if ((CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && cont_flag0_int === 1'bx && (COLLDISN_int === 1'b0 || COLLDISN_int === + 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + cont_flag0_int = 1'b0; + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end else begin + #0; + ReadA; + end + #0; + QA_update = 1'b0; + globalNotifier0 = 1'b0; + end + + assign SIA_int = SEA_ ? SIA_ : {2{1'b0}}; + + datapath_latch_rf2_32x128_wm1 uDQA0 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[1]), .D(QA_int[1]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[0]), .XQ(XQA), .Q(QA_int[0])); + datapath_latch_rf2_32x128_wm1 uDQA1 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[2]), .D(QA_int[2]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[1]), .XQ(XQA), .Q(QA_int[1])); + datapath_latch_rf2_32x128_wm1 uDQA2 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[3]), .D(QA_int[3]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[2]), .XQ(XQA), .Q(QA_int[2])); + datapath_latch_rf2_32x128_wm1 uDQA3 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[4]), .D(QA_int[4]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[3]), .XQ(XQA), .Q(QA_int[3])); + datapath_latch_rf2_32x128_wm1 uDQA4 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[5]), .D(QA_int[5]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[4]), .XQ(XQA), .Q(QA_int[4])); + datapath_latch_rf2_32x128_wm1 uDQA5 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[6]), .D(QA_int[6]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[5]), .XQ(XQA), .Q(QA_int[5])); + datapath_latch_rf2_32x128_wm1 uDQA6 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[7]), .D(QA_int[7]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[6]), .XQ(XQA), .Q(QA_int[6])); + datapath_latch_rf2_32x128_wm1 uDQA7 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[8]), .D(QA_int[8]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[7]), .XQ(XQA), .Q(QA_int[7])); + datapath_latch_rf2_32x128_wm1 uDQA8 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[9]), .D(QA_int[9]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[8]), .XQ(XQA), .Q(QA_int[8])); + datapath_latch_rf2_32x128_wm1 uDQA9 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[10]), .D(QA_int[10]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[9]), .XQ(XQA), .Q(QA_int[9])); + datapath_latch_rf2_32x128_wm1 uDQA10 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[11]), .D(QA_int[11]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[10]), .XQ(XQA), .Q(QA_int[10])); + datapath_latch_rf2_32x128_wm1 uDQA11 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[12]), .D(QA_int[12]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[11]), .XQ(XQA), .Q(QA_int[11])); + datapath_latch_rf2_32x128_wm1 uDQA12 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[13]), .D(QA_int[13]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[12]), .XQ(XQA), .Q(QA_int[12])); + datapath_latch_rf2_32x128_wm1 uDQA13 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[14]), .D(QA_int[14]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[13]), .XQ(XQA), .Q(QA_int[13])); + datapath_latch_rf2_32x128_wm1 uDQA14 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[15]), .D(QA_int[15]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[14]), .XQ(XQA), .Q(QA_int[14])); + datapath_latch_rf2_32x128_wm1 uDQA15 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[16]), .D(QA_int[16]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[15]), .XQ(XQA), .Q(QA_int[15])); + datapath_latch_rf2_32x128_wm1 uDQA16 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[17]), .D(QA_int[17]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[16]), .XQ(XQA), .Q(QA_int[16])); + datapath_latch_rf2_32x128_wm1 uDQA17 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[18]), .D(QA_int[18]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[17]), .XQ(XQA), .Q(QA_int[17])); + datapath_latch_rf2_32x128_wm1 uDQA18 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[19]), .D(QA_int[19]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[18]), .XQ(XQA), .Q(QA_int[18])); + datapath_latch_rf2_32x128_wm1 uDQA19 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[20]), .D(QA_int[20]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[19]), .XQ(XQA), .Q(QA_int[19])); + datapath_latch_rf2_32x128_wm1 uDQA20 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[21]), .D(QA_int[21]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[20]), .XQ(XQA), .Q(QA_int[20])); + datapath_latch_rf2_32x128_wm1 uDQA21 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[22]), .D(QA_int[22]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[21]), .XQ(XQA), .Q(QA_int[21])); + datapath_latch_rf2_32x128_wm1 uDQA22 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[23]), .D(QA_int[23]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[22]), .XQ(XQA), .Q(QA_int[22])); + datapath_latch_rf2_32x128_wm1 uDQA23 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[24]), .D(QA_int[24]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[23]), .XQ(XQA), .Q(QA_int[23])); + datapath_latch_rf2_32x128_wm1 uDQA24 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[25]), .D(QA_int[25]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[24]), .XQ(XQA), .Q(QA_int[24])); + datapath_latch_rf2_32x128_wm1 uDQA25 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[26]), .D(QA_int[26]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[25]), .XQ(XQA), .Q(QA_int[25])); + datapath_latch_rf2_32x128_wm1 uDQA26 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[27]), .D(QA_int[27]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[26]), .XQ(XQA), .Q(QA_int[26])); + datapath_latch_rf2_32x128_wm1 uDQA27 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[28]), .D(QA_int[28]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[27]), .XQ(XQA), .Q(QA_int[27])); + datapath_latch_rf2_32x128_wm1 uDQA28 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[29]), .D(QA_int[29]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[28]), .XQ(XQA), .Q(QA_int[28])); + datapath_latch_rf2_32x128_wm1 uDQA29 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[30]), .D(QA_int[30]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[29]), .XQ(XQA), .Q(QA_int[29])); + datapath_latch_rf2_32x128_wm1 uDQA30 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[31]), .D(QA_int[31]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[30]), .XQ(XQA), .Q(QA_int[30])); + datapath_latch_rf2_32x128_wm1 uDQA31 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[32]), .D(QA_int[32]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[31]), .XQ(XQA), .Q(QA_int[31])); + datapath_latch_rf2_32x128_wm1 uDQA32 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[33]), .D(QA_int[33]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[32]), .XQ(XQA), .Q(QA_int[32])); + datapath_latch_rf2_32x128_wm1 uDQA33 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[34]), .D(QA_int[34]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[33]), .XQ(XQA), .Q(QA_int[33])); + datapath_latch_rf2_32x128_wm1 uDQA34 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[35]), .D(QA_int[35]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[34]), .XQ(XQA), .Q(QA_int[34])); + datapath_latch_rf2_32x128_wm1 uDQA35 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[36]), .D(QA_int[36]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[35]), .XQ(XQA), .Q(QA_int[35])); + datapath_latch_rf2_32x128_wm1 uDQA36 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[37]), .D(QA_int[37]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[36]), .XQ(XQA), .Q(QA_int[36])); + datapath_latch_rf2_32x128_wm1 uDQA37 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[38]), .D(QA_int[38]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[37]), .XQ(XQA), .Q(QA_int[37])); + datapath_latch_rf2_32x128_wm1 uDQA38 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[39]), .D(QA_int[39]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[38]), .XQ(XQA), .Q(QA_int[38])); + datapath_latch_rf2_32x128_wm1 uDQA39 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[40]), .D(QA_int[40]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[39]), .XQ(XQA), .Q(QA_int[39])); + datapath_latch_rf2_32x128_wm1 uDQA40 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[41]), .D(QA_int[41]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[40]), .XQ(XQA), .Q(QA_int[40])); + datapath_latch_rf2_32x128_wm1 uDQA41 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[42]), .D(QA_int[42]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[41]), .XQ(XQA), .Q(QA_int[41])); + datapath_latch_rf2_32x128_wm1 uDQA42 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[43]), .D(QA_int[43]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[42]), .XQ(XQA), .Q(QA_int[42])); + datapath_latch_rf2_32x128_wm1 uDQA43 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[44]), .D(QA_int[44]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[43]), .XQ(XQA), .Q(QA_int[43])); + datapath_latch_rf2_32x128_wm1 uDQA44 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[45]), .D(QA_int[45]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[44]), .XQ(XQA), .Q(QA_int[44])); + datapath_latch_rf2_32x128_wm1 uDQA45 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[46]), .D(QA_int[46]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[45]), .XQ(XQA), .Q(QA_int[45])); + datapath_latch_rf2_32x128_wm1 uDQA46 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[47]), .D(QA_int[47]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[46]), .XQ(XQA), .Q(QA_int[46])); + datapath_latch_rf2_32x128_wm1 uDQA47 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[48]), .D(QA_int[48]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[47]), .XQ(XQA), .Q(QA_int[47])); + datapath_latch_rf2_32x128_wm1 uDQA48 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[49]), .D(QA_int[49]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[48]), .XQ(XQA), .Q(QA_int[48])); + datapath_latch_rf2_32x128_wm1 uDQA49 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[50]), .D(QA_int[50]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[49]), .XQ(XQA), .Q(QA_int[49])); + datapath_latch_rf2_32x128_wm1 uDQA50 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[51]), .D(QA_int[51]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[50]), .XQ(XQA), .Q(QA_int[50])); + datapath_latch_rf2_32x128_wm1 uDQA51 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[52]), .D(QA_int[52]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[51]), .XQ(XQA), .Q(QA_int[51])); + datapath_latch_rf2_32x128_wm1 uDQA52 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[53]), .D(QA_int[53]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[52]), .XQ(XQA), .Q(QA_int[52])); + datapath_latch_rf2_32x128_wm1 uDQA53 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[54]), .D(QA_int[54]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[53]), .XQ(XQA), .Q(QA_int[53])); + datapath_latch_rf2_32x128_wm1 uDQA54 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[55]), .D(QA_int[55]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[54]), .XQ(XQA), .Q(QA_int[54])); + datapath_latch_rf2_32x128_wm1 uDQA55 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[56]), .D(QA_int[56]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[55]), .XQ(XQA), .Q(QA_int[55])); + datapath_latch_rf2_32x128_wm1 uDQA56 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[57]), .D(QA_int[57]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[56]), .XQ(XQA), .Q(QA_int[56])); + datapath_latch_rf2_32x128_wm1 uDQA57 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[58]), .D(QA_int[58]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[57]), .XQ(XQA), .Q(QA_int[57])); + datapath_latch_rf2_32x128_wm1 uDQA58 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[59]), .D(QA_int[59]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[58]), .XQ(XQA), .Q(QA_int[58])); + datapath_latch_rf2_32x128_wm1 uDQA59 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[60]), .D(QA_int[60]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[59]), .XQ(XQA), .Q(QA_int[59])); + datapath_latch_rf2_32x128_wm1 uDQA60 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[61]), .D(QA_int[61]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[60]), .XQ(XQA), .Q(QA_int[60])); + datapath_latch_rf2_32x128_wm1 uDQA61 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[62]), .D(QA_int[62]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[61]), .XQ(XQA), .Q(QA_int[61])); + datapath_latch_rf2_32x128_wm1 uDQA62 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[63]), .D(QA_int[63]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[62]), .XQ(XQA), .Q(QA_int[62])); + datapath_latch_rf2_32x128_wm1 uDQA63 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(SIA_int[0]), .D(1'b0), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[63]), .XQ(XQA), .Q(QA_int[63])); + datapath_latch_rf2_32x128_wm1 uDQA64 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(SIA_int[1]), .D(1'b0), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[64]), .XQ(XQA), .Q(QA_int[64])); + datapath_latch_rf2_32x128_wm1 uDQA65 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[64]), .D(QA_int[64]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[65]), .XQ(XQA), .Q(QA_int[65])); + datapath_latch_rf2_32x128_wm1 uDQA66 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[65]), .D(QA_int[65]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[66]), .XQ(XQA), .Q(QA_int[66])); + datapath_latch_rf2_32x128_wm1 uDQA67 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[66]), .D(QA_int[66]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[67]), .XQ(XQA), .Q(QA_int[67])); + datapath_latch_rf2_32x128_wm1 uDQA68 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[67]), .D(QA_int[67]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[68]), .XQ(XQA), .Q(QA_int[68])); + datapath_latch_rf2_32x128_wm1 uDQA69 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[68]), .D(QA_int[68]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[69]), .XQ(XQA), .Q(QA_int[69])); + datapath_latch_rf2_32x128_wm1 uDQA70 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[69]), .D(QA_int[69]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[70]), .XQ(XQA), .Q(QA_int[70])); + datapath_latch_rf2_32x128_wm1 uDQA71 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[70]), .D(QA_int[70]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[71]), .XQ(XQA), .Q(QA_int[71])); + datapath_latch_rf2_32x128_wm1 uDQA72 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[71]), .D(QA_int[71]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[72]), .XQ(XQA), .Q(QA_int[72])); + datapath_latch_rf2_32x128_wm1 uDQA73 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[72]), .D(QA_int[72]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[73]), .XQ(XQA), .Q(QA_int[73])); + datapath_latch_rf2_32x128_wm1 uDQA74 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[73]), .D(QA_int[73]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[74]), .XQ(XQA), .Q(QA_int[74])); + datapath_latch_rf2_32x128_wm1 uDQA75 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[74]), .D(QA_int[74]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[75]), .XQ(XQA), .Q(QA_int[75])); + datapath_latch_rf2_32x128_wm1 uDQA76 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[75]), .D(QA_int[75]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[76]), .XQ(XQA), .Q(QA_int[76])); + datapath_latch_rf2_32x128_wm1 uDQA77 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[76]), .D(QA_int[76]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[77]), .XQ(XQA), .Q(QA_int[77])); + datapath_latch_rf2_32x128_wm1 uDQA78 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[77]), .D(QA_int[77]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[78]), .XQ(XQA), .Q(QA_int[78])); + datapath_latch_rf2_32x128_wm1 uDQA79 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[78]), .D(QA_int[78]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[79]), .XQ(XQA), .Q(QA_int[79])); + datapath_latch_rf2_32x128_wm1 uDQA80 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[79]), .D(QA_int[79]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[80]), .XQ(XQA), .Q(QA_int[80])); + datapath_latch_rf2_32x128_wm1 uDQA81 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[80]), .D(QA_int[80]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[81]), .XQ(XQA), .Q(QA_int[81])); + datapath_latch_rf2_32x128_wm1 uDQA82 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[81]), .D(QA_int[81]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[82]), .XQ(XQA), .Q(QA_int[82])); + datapath_latch_rf2_32x128_wm1 uDQA83 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[82]), .D(QA_int[82]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[83]), .XQ(XQA), .Q(QA_int[83])); + datapath_latch_rf2_32x128_wm1 uDQA84 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[83]), .D(QA_int[83]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[84]), .XQ(XQA), .Q(QA_int[84])); + datapath_latch_rf2_32x128_wm1 uDQA85 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[84]), .D(QA_int[84]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[85]), .XQ(XQA), .Q(QA_int[85])); + datapath_latch_rf2_32x128_wm1 uDQA86 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[85]), .D(QA_int[85]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[86]), .XQ(XQA), .Q(QA_int[86])); + datapath_latch_rf2_32x128_wm1 uDQA87 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[86]), .D(QA_int[86]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[87]), .XQ(XQA), .Q(QA_int[87])); + datapath_latch_rf2_32x128_wm1 uDQA88 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[87]), .D(QA_int[87]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[88]), .XQ(XQA), .Q(QA_int[88])); + datapath_latch_rf2_32x128_wm1 uDQA89 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[88]), .D(QA_int[88]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[89]), .XQ(XQA), .Q(QA_int[89])); + datapath_latch_rf2_32x128_wm1 uDQA90 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[89]), .D(QA_int[89]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[90]), .XQ(XQA), .Q(QA_int[90])); + datapath_latch_rf2_32x128_wm1 uDQA91 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[90]), .D(QA_int[90]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[91]), .XQ(XQA), .Q(QA_int[91])); + datapath_latch_rf2_32x128_wm1 uDQA92 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[91]), .D(QA_int[91]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[92]), .XQ(XQA), .Q(QA_int[92])); + datapath_latch_rf2_32x128_wm1 uDQA93 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[92]), .D(QA_int[92]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[93]), .XQ(XQA), .Q(QA_int[93])); + datapath_latch_rf2_32x128_wm1 uDQA94 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[93]), .D(QA_int[93]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[94]), .XQ(XQA), .Q(QA_int[94])); + datapath_latch_rf2_32x128_wm1 uDQA95 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[94]), .D(QA_int[94]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[95]), .XQ(XQA), .Q(QA_int[95])); + datapath_latch_rf2_32x128_wm1 uDQA96 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[95]), .D(QA_int[95]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[96]), .XQ(XQA), .Q(QA_int[96])); + datapath_latch_rf2_32x128_wm1 uDQA97 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[96]), .D(QA_int[96]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[97]), .XQ(XQA), .Q(QA_int[97])); + datapath_latch_rf2_32x128_wm1 uDQA98 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[97]), .D(QA_int[97]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[98]), .XQ(XQA), .Q(QA_int[98])); + datapath_latch_rf2_32x128_wm1 uDQA99 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[98]), .D(QA_int[98]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[99]), .XQ(XQA), .Q(QA_int[99])); + datapath_latch_rf2_32x128_wm1 uDQA100 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[99]), .D(QA_int[99]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[100]), .XQ(XQA), .Q(QA_int[100])); + datapath_latch_rf2_32x128_wm1 uDQA101 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[100]), .D(QA_int[100]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[101]), .XQ(XQA), .Q(QA_int[101])); + datapath_latch_rf2_32x128_wm1 uDQA102 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[101]), .D(QA_int[101]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[102]), .XQ(XQA), .Q(QA_int[102])); + datapath_latch_rf2_32x128_wm1 uDQA103 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[102]), .D(QA_int[102]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[103]), .XQ(XQA), .Q(QA_int[103])); + datapath_latch_rf2_32x128_wm1 uDQA104 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[103]), .D(QA_int[103]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[104]), .XQ(XQA), .Q(QA_int[104])); + datapath_latch_rf2_32x128_wm1 uDQA105 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[104]), .D(QA_int[104]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[105]), .XQ(XQA), .Q(QA_int[105])); + datapath_latch_rf2_32x128_wm1 uDQA106 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[105]), .D(QA_int[105]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[106]), .XQ(XQA), .Q(QA_int[106])); + datapath_latch_rf2_32x128_wm1 uDQA107 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[106]), .D(QA_int[106]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[107]), .XQ(XQA), .Q(QA_int[107])); + datapath_latch_rf2_32x128_wm1 uDQA108 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[107]), .D(QA_int[107]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[108]), .XQ(XQA), .Q(QA_int[108])); + datapath_latch_rf2_32x128_wm1 uDQA109 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[108]), .D(QA_int[108]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[109]), .XQ(XQA), .Q(QA_int[109])); + datapath_latch_rf2_32x128_wm1 uDQA110 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[109]), .D(QA_int[109]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[110]), .XQ(XQA), .Q(QA_int[110])); + datapath_latch_rf2_32x128_wm1 uDQA111 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[110]), .D(QA_int[110]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[111]), .XQ(XQA), .Q(QA_int[111])); + datapath_latch_rf2_32x128_wm1 uDQA112 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[111]), .D(QA_int[111]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[112]), .XQ(XQA), .Q(QA_int[112])); + datapath_latch_rf2_32x128_wm1 uDQA113 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[112]), .D(QA_int[112]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[113]), .XQ(XQA), .Q(QA_int[113])); + datapath_latch_rf2_32x128_wm1 uDQA114 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[113]), .D(QA_int[113]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[114]), .XQ(XQA), .Q(QA_int[114])); + datapath_latch_rf2_32x128_wm1 uDQA115 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[114]), .D(QA_int[114]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[115]), .XQ(XQA), .Q(QA_int[115])); + datapath_latch_rf2_32x128_wm1 uDQA116 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[115]), .D(QA_int[115]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[116]), .XQ(XQA), .Q(QA_int[116])); + datapath_latch_rf2_32x128_wm1 uDQA117 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[116]), .D(QA_int[116]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[117]), .XQ(XQA), .Q(QA_int[117])); + datapath_latch_rf2_32x128_wm1 uDQA118 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[117]), .D(QA_int[117]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[118]), .XQ(XQA), .Q(QA_int[118])); + datapath_latch_rf2_32x128_wm1 uDQA119 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[118]), .D(QA_int[118]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[119]), .XQ(XQA), .Q(QA_int[119])); + datapath_latch_rf2_32x128_wm1 uDQA120 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[119]), .D(QA_int[119]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[120]), .XQ(XQA), .Q(QA_int[120])); + datapath_latch_rf2_32x128_wm1 uDQA121 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[120]), .D(QA_int[120]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[121]), .XQ(XQA), .Q(QA_int[121])); + datapath_latch_rf2_32x128_wm1 uDQA122 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[121]), .D(QA_int[121]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[122]), .XQ(XQA), .Q(QA_int[122])); + datapath_latch_rf2_32x128_wm1 uDQA123 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[122]), .D(QA_int[122]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[123]), .XQ(XQA), .Q(QA_int[123])); + datapath_latch_rf2_32x128_wm1 uDQA124 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[123]), .D(QA_int[123]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[124]), .XQ(XQA), .Q(QA_int[124])); + datapath_latch_rf2_32x128_wm1 uDQA125 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[124]), .D(QA_int[124]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[125]), .XQ(XQA), .Q(QA_int[125])); + datapath_latch_rf2_32x128_wm1 uDQA126 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[125]), .D(QA_int[125]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[126]), .XQ(XQA), .Q(QA_int[126])); + datapath_latch_rf2_32x128_wm1 uDQA127 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[126]), .D(QA_int[126]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[127]), .XQ(XQA), .Q(QA_int[127])); + + + + always @ (CENB_ or TCENB_ or TENB_ or DFTRAMBYP_ or CLKB_) begin + if(CLKB_ == 1'b0) begin + CENB_p2 = CENB_; + TCENB_p2 = TCENB_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || TCENB_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKB_ === 1'bx)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_b = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_b = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(1); + end +`else + if (RET1N_ == 1'b0) begin +`endif + CENB_int = 1'bx; + WENB_int = {128{1'bx}}; + AB_int = {5{1'bx}}; + DB_int = {128{1'bx}}; + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TWENB_int = {128{1'bx}}; + TAB_int = {5{1'bx}}; + TDB_int = {128{1'bx}}; + RET1N_int = 1'bx; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_b = 0; + pre_charge_st = 0; +`else + end else begin +`endif + CENB_int = 1'bx; + WENB_int = {128{1'bx}}; + AB_int = {5{1'bx}}; + DB_int = {128{1'bx}}; + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TWENB_int = {128{1'bx}}; + TAB_int = {5{1'bx}}; + TDB_int = {128{1'bx}}; + RET1N_int = 1'bx; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + #0; + QA_update = 1'b0; + DB_sh_update = 1'b0; + end + + always @ CLKB_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + end else if ((CLKB_ === 1'b1 || CLKB_ === 1'b0) && LAST_CLKB === 1'bx) begin + DB_sh_update = 1'b0; XDB_sh = 1'b0; + end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin + if (RET1N_ == 1'b0) begin + DFTRAMBYP_int = DFTRAMBYP_; + SEB_int = SEB_; + end else begin + DFTRAMBYP_int = DFTRAMBYP_; + SEB_int = SEB_; + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + TWENB_int = TWENB_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + WENB_int = TENB_ ? WENB_ : TWENB_; + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + XDB_sh = 1'b0; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + XDB_sh = 1'b0; + end else begin + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + TWENB_int = TWENB_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + WENB_int = TENB_ ? WENB_ : TWENB_; + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + XDB_sh = 1'b0; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b0) begin + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + end else begin + WriteB; + end + if (CENB_int === 1'b0) previous_CLKB = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + ReadA; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + mem_path = (partial_mask & {128{1'bx}}) | (~partial_mask & mem_path); + #0; + QA_update = 1'b0; + #0; + QA_update = 1'b1; + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end + end else if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKB_ === 1'b0 && LAST_CLKB === 1'b1) begin + DB_sh_update = 1'b0; XDB_sh = 1'b0; + end + end + LAST_CLKB = CLKB_; + end + + reg globalNotifier1; + initial globalNotifier1 = 1'b0; + initial cont_flag1_int = 1'b0; + + always @ globalNotifier1 begin + if ($realtime == 0) begin + end else if ((EMAB_int[0] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMAB_int[1] === 1'bx & DFTRAMBYP_int === 1'b1) || + (EMAB_int[2] === 1'bx & DFTRAMBYP_int === 1'b1)) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if ((CENB_int === 1'bx & DFTRAMBYP_int === 1'b0) || EMAB_int[0] === 1'bx || + EMAB_int[1] === 1'bx || EMAB_int[2] === 1'bx || RET1N_int === 1'bx || clk1_int === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (TENB_int === 1'bx) begin + if(((CENB_ === 1'b1 & TCENB_ === 1'b1) & DFTRAMBYP_int === 1'b0) | (DFTRAMBYP_int === 1'b1 & SEB_int === 1'b1)) begin + end else begin + if (DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end + end else if (cont_flag1_int === 1'bx && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + cont_flag1_int = 1'b0; + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + mem_path = (partial_mask & {128{1'bx}}) | (~partial_mask & mem_path); + #0; + QA_update = 1'b0; + #0; + QA_update = 1'b1; + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end + end else if ((CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && cont_flag1_int === 1'bx && (COLLDISN_int === 1'b0 || COLLDISN_int === + 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + cont_flag1_int = 1'b0; + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end else begin + #0; + WriteB; + end + #0; + DB_sh_update = 1'b0; + globalNotifier1 = 1'b0; + end + + assign DB_int_bmux = TENB_ ? DB_ : TDB_; + + datapath_latch_rf2_32x128_wm1 uDQB0 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[1]), .D(DB_int_bmux[0]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[0]), .XQ(XDB_sh), .Q(DB_int_sh[0])); + datapath_latch_rf2_32x128_wm1 uDQB1 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[2]), .D(DB_int_bmux[1]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[1]), .XQ(XDB_sh), .Q(DB_int_sh[1])); + datapath_latch_rf2_32x128_wm1 uDQB2 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[3]), .D(DB_int_bmux[2]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[2]), .XQ(XDB_sh), .Q(DB_int_sh[2])); + datapath_latch_rf2_32x128_wm1 uDQB3 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[4]), .D(DB_int_bmux[3]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[3]), .XQ(XDB_sh), .Q(DB_int_sh[3])); + datapath_latch_rf2_32x128_wm1 uDQB4 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[5]), .D(DB_int_bmux[4]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[4]), .XQ(XDB_sh), .Q(DB_int_sh[4])); + datapath_latch_rf2_32x128_wm1 uDQB5 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[6]), .D(DB_int_bmux[5]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[5]), .XQ(XDB_sh), .Q(DB_int_sh[5])); + datapath_latch_rf2_32x128_wm1 uDQB6 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[7]), .D(DB_int_bmux[6]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[6]), .XQ(XDB_sh), .Q(DB_int_sh[6])); + datapath_latch_rf2_32x128_wm1 uDQB7 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[8]), .D(DB_int_bmux[7]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[7]), .XQ(XDB_sh), .Q(DB_int_sh[7])); + datapath_latch_rf2_32x128_wm1 uDQB8 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[9]), .D(DB_int_bmux[8]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[8]), .XQ(XDB_sh), .Q(DB_int_sh[8])); + datapath_latch_rf2_32x128_wm1 uDQB9 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[10]), .D(DB_int_bmux[9]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[9]), .XQ(XDB_sh), .Q(DB_int_sh[9])); + datapath_latch_rf2_32x128_wm1 uDQB10 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[11]), .D(DB_int_bmux[10]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[10]), .XQ(XDB_sh), .Q(DB_int_sh[10])); + datapath_latch_rf2_32x128_wm1 uDQB11 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[12]), .D(DB_int_bmux[11]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[11]), .XQ(XDB_sh), .Q(DB_int_sh[11])); + datapath_latch_rf2_32x128_wm1 uDQB12 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[13]), .D(DB_int_bmux[12]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[12]), .XQ(XDB_sh), .Q(DB_int_sh[12])); + datapath_latch_rf2_32x128_wm1 uDQB13 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[14]), .D(DB_int_bmux[13]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[13]), .XQ(XDB_sh), .Q(DB_int_sh[13])); + datapath_latch_rf2_32x128_wm1 uDQB14 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[15]), .D(DB_int_bmux[14]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[14]), .XQ(XDB_sh), .Q(DB_int_sh[14])); + datapath_latch_rf2_32x128_wm1 uDQB15 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[16]), .D(DB_int_bmux[15]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[15]), .XQ(XDB_sh), .Q(DB_int_sh[15])); + datapath_latch_rf2_32x128_wm1 uDQB16 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[17]), .D(DB_int_bmux[16]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[16]), .XQ(XDB_sh), .Q(DB_int_sh[16])); + datapath_latch_rf2_32x128_wm1 uDQB17 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[18]), .D(DB_int_bmux[17]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[17]), .XQ(XDB_sh), .Q(DB_int_sh[17])); + datapath_latch_rf2_32x128_wm1 uDQB18 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[19]), .D(DB_int_bmux[18]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[18]), .XQ(XDB_sh), .Q(DB_int_sh[18])); + datapath_latch_rf2_32x128_wm1 uDQB19 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[20]), .D(DB_int_bmux[19]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[19]), .XQ(XDB_sh), .Q(DB_int_sh[19])); + datapath_latch_rf2_32x128_wm1 uDQB20 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[21]), .D(DB_int_bmux[20]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[20]), .XQ(XDB_sh), .Q(DB_int_sh[20])); + datapath_latch_rf2_32x128_wm1 uDQB21 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[22]), .D(DB_int_bmux[21]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[21]), .XQ(XDB_sh), .Q(DB_int_sh[21])); + datapath_latch_rf2_32x128_wm1 uDQB22 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[23]), .D(DB_int_bmux[22]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[22]), .XQ(XDB_sh), .Q(DB_int_sh[22])); + datapath_latch_rf2_32x128_wm1 uDQB23 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[24]), .D(DB_int_bmux[23]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[23]), .XQ(XDB_sh), .Q(DB_int_sh[23])); + datapath_latch_rf2_32x128_wm1 uDQB24 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[25]), .D(DB_int_bmux[24]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[24]), .XQ(XDB_sh), .Q(DB_int_sh[24])); + datapath_latch_rf2_32x128_wm1 uDQB25 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[26]), .D(DB_int_bmux[25]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[25]), .XQ(XDB_sh), .Q(DB_int_sh[25])); + datapath_latch_rf2_32x128_wm1 uDQB26 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[27]), .D(DB_int_bmux[26]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[26]), .XQ(XDB_sh), .Q(DB_int_sh[26])); + datapath_latch_rf2_32x128_wm1 uDQB27 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[28]), .D(DB_int_bmux[27]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[27]), .XQ(XDB_sh), .Q(DB_int_sh[27])); + datapath_latch_rf2_32x128_wm1 uDQB28 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[29]), .D(DB_int_bmux[28]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[28]), .XQ(XDB_sh), .Q(DB_int_sh[28])); + datapath_latch_rf2_32x128_wm1 uDQB29 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[30]), .D(DB_int_bmux[29]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[29]), .XQ(XDB_sh), .Q(DB_int_sh[29])); + datapath_latch_rf2_32x128_wm1 uDQB30 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[31]), .D(DB_int_bmux[30]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[30]), .XQ(XDB_sh), .Q(DB_int_sh[30])); + datapath_latch_rf2_32x128_wm1 uDQB31 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[32]), .D(DB_int_bmux[31]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[31]), .XQ(XDB_sh), .Q(DB_int_sh[31])); + datapath_latch_rf2_32x128_wm1 uDQB32 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[33]), .D(DB_int_bmux[32]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[32]), .XQ(XDB_sh), .Q(DB_int_sh[32])); + datapath_latch_rf2_32x128_wm1 uDQB33 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[34]), .D(DB_int_bmux[33]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[33]), .XQ(XDB_sh), .Q(DB_int_sh[33])); + datapath_latch_rf2_32x128_wm1 uDQB34 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[35]), .D(DB_int_bmux[34]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[34]), .XQ(XDB_sh), .Q(DB_int_sh[34])); + datapath_latch_rf2_32x128_wm1 uDQB35 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[36]), .D(DB_int_bmux[35]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[35]), .XQ(XDB_sh), .Q(DB_int_sh[35])); + datapath_latch_rf2_32x128_wm1 uDQB36 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[37]), .D(DB_int_bmux[36]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[36]), .XQ(XDB_sh), .Q(DB_int_sh[36])); + datapath_latch_rf2_32x128_wm1 uDQB37 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[38]), .D(DB_int_bmux[37]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[37]), .XQ(XDB_sh), .Q(DB_int_sh[37])); + datapath_latch_rf2_32x128_wm1 uDQB38 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[39]), .D(DB_int_bmux[38]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[38]), .XQ(XDB_sh), .Q(DB_int_sh[38])); + datapath_latch_rf2_32x128_wm1 uDQB39 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[40]), .D(DB_int_bmux[39]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[39]), .XQ(XDB_sh), .Q(DB_int_sh[39])); + datapath_latch_rf2_32x128_wm1 uDQB40 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[41]), .D(DB_int_bmux[40]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[40]), .XQ(XDB_sh), .Q(DB_int_sh[40])); + datapath_latch_rf2_32x128_wm1 uDQB41 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[42]), .D(DB_int_bmux[41]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[41]), .XQ(XDB_sh), .Q(DB_int_sh[41])); + datapath_latch_rf2_32x128_wm1 uDQB42 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[43]), .D(DB_int_bmux[42]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[42]), .XQ(XDB_sh), .Q(DB_int_sh[42])); + datapath_latch_rf2_32x128_wm1 uDQB43 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[44]), .D(DB_int_bmux[43]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[43]), .XQ(XDB_sh), .Q(DB_int_sh[43])); + datapath_latch_rf2_32x128_wm1 uDQB44 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[45]), .D(DB_int_bmux[44]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[44]), .XQ(XDB_sh), .Q(DB_int_sh[44])); + datapath_latch_rf2_32x128_wm1 uDQB45 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[46]), .D(DB_int_bmux[45]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[45]), .XQ(XDB_sh), .Q(DB_int_sh[45])); + datapath_latch_rf2_32x128_wm1 uDQB46 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[47]), .D(DB_int_bmux[46]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[46]), .XQ(XDB_sh), .Q(DB_int_sh[46])); + datapath_latch_rf2_32x128_wm1 uDQB47 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[48]), .D(DB_int_bmux[47]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[47]), .XQ(XDB_sh), .Q(DB_int_sh[47])); + datapath_latch_rf2_32x128_wm1 uDQB48 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[49]), .D(DB_int_bmux[48]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[48]), .XQ(XDB_sh), .Q(DB_int_sh[48])); + datapath_latch_rf2_32x128_wm1 uDQB49 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[50]), .D(DB_int_bmux[49]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[49]), .XQ(XDB_sh), .Q(DB_int_sh[49])); + datapath_latch_rf2_32x128_wm1 uDQB50 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[51]), .D(DB_int_bmux[50]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[50]), .XQ(XDB_sh), .Q(DB_int_sh[50])); + datapath_latch_rf2_32x128_wm1 uDQB51 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[52]), .D(DB_int_bmux[51]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[51]), .XQ(XDB_sh), .Q(DB_int_sh[51])); + datapath_latch_rf2_32x128_wm1 uDQB52 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[53]), .D(DB_int_bmux[52]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[52]), .XQ(XDB_sh), .Q(DB_int_sh[52])); + datapath_latch_rf2_32x128_wm1 uDQB53 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[54]), .D(DB_int_bmux[53]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[53]), .XQ(XDB_sh), .Q(DB_int_sh[53])); + datapath_latch_rf2_32x128_wm1 uDQB54 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[55]), .D(DB_int_bmux[54]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[54]), .XQ(XDB_sh), .Q(DB_int_sh[54])); + datapath_latch_rf2_32x128_wm1 uDQB55 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[56]), .D(DB_int_bmux[55]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[55]), .XQ(XDB_sh), .Q(DB_int_sh[55])); + datapath_latch_rf2_32x128_wm1 uDQB56 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[57]), .D(DB_int_bmux[56]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[56]), .XQ(XDB_sh), .Q(DB_int_sh[56])); + datapath_latch_rf2_32x128_wm1 uDQB57 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[58]), .D(DB_int_bmux[57]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[57]), .XQ(XDB_sh), .Q(DB_int_sh[57])); + datapath_latch_rf2_32x128_wm1 uDQB58 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[59]), .D(DB_int_bmux[58]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[58]), .XQ(XDB_sh), .Q(DB_int_sh[58])); + datapath_latch_rf2_32x128_wm1 uDQB59 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[60]), .D(DB_int_bmux[59]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[59]), .XQ(XDB_sh), .Q(DB_int_sh[59])); + datapath_latch_rf2_32x128_wm1 uDQB60 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[61]), .D(DB_int_bmux[60]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[60]), .XQ(XDB_sh), .Q(DB_int_sh[60])); + datapath_latch_rf2_32x128_wm1 uDQB61 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[62]), .D(DB_int_bmux[61]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[61]), .XQ(XDB_sh), .Q(DB_int_sh[61])); + datapath_latch_rf2_32x128_wm1 uDQB62 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[63]), .D(DB_int_bmux[62]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[62]), .XQ(XDB_sh), .Q(DB_int_sh[62])); + datapath_latch_rf2_32x128_wm1 uDQB63 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(SIB_[0]), .D(DB_int_bmux[63]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[63]), .XQ(XDB_sh), .Q(DB_int_sh[63])); + datapath_latch_rf2_32x128_wm1 uDQB64 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(SIB_[1]), .D(DB_int_bmux[64]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[64]), .XQ(XDB_sh), .Q(DB_int_sh[64])); + datapath_latch_rf2_32x128_wm1 uDQB65 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[64]), .D(DB_int_bmux[65]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[65]), .XQ(XDB_sh), .Q(DB_int_sh[65])); + datapath_latch_rf2_32x128_wm1 uDQB66 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[65]), .D(DB_int_bmux[66]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[66]), .XQ(XDB_sh), .Q(DB_int_sh[66])); + datapath_latch_rf2_32x128_wm1 uDQB67 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[66]), .D(DB_int_bmux[67]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[67]), .XQ(XDB_sh), .Q(DB_int_sh[67])); + datapath_latch_rf2_32x128_wm1 uDQB68 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[67]), .D(DB_int_bmux[68]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[68]), .XQ(XDB_sh), .Q(DB_int_sh[68])); + datapath_latch_rf2_32x128_wm1 uDQB69 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[68]), .D(DB_int_bmux[69]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[69]), .XQ(XDB_sh), .Q(DB_int_sh[69])); + datapath_latch_rf2_32x128_wm1 uDQB70 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[69]), .D(DB_int_bmux[70]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[70]), .XQ(XDB_sh), .Q(DB_int_sh[70])); + datapath_latch_rf2_32x128_wm1 uDQB71 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[70]), .D(DB_int_bmux[71]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[71]), .XQ(XDB_sh), .Q(DB_int_sh[71])); + datapath_latch_rf2_32x128_wm1 uDQB72 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[71]), .D(DB_int_bmux[72]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[72]), .XQ(XDB_sh), .Q(DB_int_sh[72])); + datapath_latch_rf2_32x128_wm1 uDQB73 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[72]), .D(DB_int_bmux[73]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[73]), .XQ(XDB_sh), .Q(DB_int_sh[73])); + datapath_latch_rf2_32x128_wm1 uDQB74 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[73]), .D(DB_int_bmux[74]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[74]), .XQ(XDB_sh), .Q(DB_int_sh[74])); + datapath_latch_rf2_32x128_wm1 uDQB75 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[74]), .D(DB_int_bmux[75]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[75]), .XQ(XDB_sh), .Q(DB_int_sh[75])); + datapath_latch_rf2_32x128_wm1 uDQB76 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[75]), .D(DB_int_bmux[76]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[76]), .XQ(XDB_sh), .Q(DB_int_sh[76])); + datapath_latch_rf2_32x128_wm1 uDQB77 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[76]), .D(DB_int_bmux[77]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[77]), .XQ(XDB_sh), .Q(DB_int_sh[77])); + datapath_latch_rf2_32x128_wm1 uDQB78 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[77]), .D(DB_int_bmux[78]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[78]), .XQ(XDB_sh), .Q(DB_int_sh[78])); + datapath_latch_rf2_32x128_wm1 uDQB79 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[78]), .D(DB_int_bmux[79]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[79]), .XQ(XDB_sh), .Q(DB_int_sh[79])); + datapath_latch_rf2_32x128_wm1 uDQB80 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[79]), .D(DB_int_bmux[80]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[80]), .XQ(XDB_sh), .Q(DB_int_sh[80])); + datapath_latch_rf2_32x128_wm1 uDQB81 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[80]), .D(DB_int_bmux[81]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[81]), .XQ(XDB_sh), .Q(DB_int_sh[81])); + datapath_latch_rf2_32x128_wm1 uDQB82 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[81]), .D(DB_int_bmux[82]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[82]), .XQ(XDB_sh), .Q(DB_int_sh[82])); + datapath_latch_rf2_32x128_wm1 uDQB83 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[82]), .D(DB_int_bmux[83]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[83]), .XQ(XDB_sh), .Q(DB_int_sh[83])); + datapath_latch_rf2_32x128_wm1 uDQB84 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[83]), .D(DB_int_bmux[84]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[84]), .XQ(XDB_sh), .Q(DB_int_sh[84])); + datapath_latch_rf2_32x128_wm1 uDQB85 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[84]), .D(DB_int_bmux[85]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[85]), .XQ(XDB_sh), .Q(DB_int_sh[85])); + datapath_latch_rf2_32x128_wm1 uDQB86 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[85]), .D(DB_int_bmux[86]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[86]), .XQ(XDB_sh), .Q(DB_int_sh[86])); + datapath_latch_rf2_32x128_wm1 uDQB87 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[86]), .D(DB_int_bmux[87]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[87]), .XQ(XDB_sh), .Q(DB_int_sh[87])); + datapath_latch_rf2_32x128_wm1 uDQB88 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[87]), .D(DB_int_bmux[88]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[88]), .XQ(XDB_sh), .Q(DB_int_sh[88])); + datapath_latch_rf2_32x128_wm1 uDQB89 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[88]), .D(DB_int_bmux[89]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[89]), .XQ(XDB_sh), .Q(DB_int_sh[89])); + datapath_latch_rf2_32x128_wm1 uDQB90 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[89]), .D(DB_int_bmux[90]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[90]), .XQ(XDB_sh), .Q(DB_int_sh[90])); + datapath_latch_rf2_32x128_wm1 uDQB91 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[90]), .D(DB_int_bmux[91]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[91]), .XQ(XDB_sh), .Q(DB_int_sh[91])); + datapath_latch_rf2_32x128_wm1 uDQB92 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[91]), .D(DB_int_bmux[92]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[92]), .XQ(XDB_sh), .Q(DB_int_sh[92])); + datapath_latch_rf2_32x128_wm1 uDQB93 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[92]), .D(DB_int_bmux[93]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[93]), .XQ(XDB_sh), .Q(DB_int_sh[93])); + datapath_latch_rf2_32x128_wm1 uDQB94 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[93]), .D(DB_int_bmux[94]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[94]), .XQ(XDB_sh), .Q(DB_int_sh[94])); + datapath_latch_rf2_32x128_wm1 uDQB95 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[94]), .D(DB_int_bmux[95]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[95]), .XQ(XDB_sh), .Q(DB_int_sh[95])); + datapath_latch_rf2_32x128_wm1 uDQB96 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[95]), .D(DB_int_bmux[96]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[96]), .XQ(XDB_sh), .Q(DB_int_sh[96])); + datapath_latch_rf2_32x128_wm1 uDQB97 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[96]), .D(DB_int_bmux[97]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[97]), .XQ(XDB_sh), .Q(DB_int_sh[97])); + datapath_latch_rf2_32x128_wm1 uDQB98 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[97]), .D(DB_int_bmux[98]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[98]), .XQ(XDB_sh), .Q(DB_int_sh[98])); + datapath_latch_rf2_32x128_wm1 uDQB99 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[98]), .D(DB_int_bmux[99]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[99]), .XQ(XDB_sh), .Q(DB_int_sh[99])); + datapath_latch_rf2_32x128_wm1 uDQB100 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[99]), .D(DB_int_bmux[100]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[100]), .XQ(XDB_sh), .Q(DB_int_sh[100])); + datapath_latch_rf2_32x128_wm1 uDQB101 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[100]), .D(DB_int_bmux[101]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[101]), .XQ(XDB_sh), .Q(DB_int_sh[101])); + datapath_latch_rf2_32x128_wm1 uDQB102 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[101]), .D(DB_int_bmux[102]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[102]), .XQ(XDB_sh), .Q(DB_int_sh[102])); + datapath_latch_rf2_32x128_wm1 uDQB103 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[102]), .D(DB_int_bmux[103]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[103]), .XQ(XDB_sh), .Q(DB_int_sh[103])); + datapath_latch_rf2_32x128_wm1 uDQB104 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[103]), .D(DB_int_bmux[104]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[104]), .XQ(XDB_sh), .Q(DB_int_sh[104])); + datapath_latch_rf2_32x128_wm1 uDQB105 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[104]), .D(DB_int_bmux[105]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[105]), .XQ(XDB_sh), .Q(DB_int_sh[105])); + datapath_latch_rf2_32x128_wm1 uDQB106 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[105]), .D(DB_int_bmux[106]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[106]), .XQ(XDB_sh), .Q(DB_int_sh[106])); + datapath_latch_rf2_32x128_wm1 uDQB107 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[106]), .D(DB_int_bmux[107]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[107]), .XQ(XDB_sh), .Q(DB_int_sh[107])); + datapath_latch_rf2_32x128_wm1 uDQB108 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[107]), .D(DB_int_bmux[108]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[108]), .XQ(XDB_sh), .Q(DB_int_sh[108])); + datapath_latch_rf2_32x128_wm1 uDQB109 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[108]), .D(DB_int_bmux[109]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[109]), .XQ(XDB_sh), .Q(DB_int_sh[109])); + datapath_latch_rf2_32x128_wm1 uDQB110 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[109]), .D(DB_int_bmux[110]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[110]), .XQ(XDB_sh), .Q(DB_int_sh[110])); + datapath_latch_rf2_32x128_wm1 uDQB111 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[110]), .D(DB_int_bmux[111]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[111]), .XQ(XDB_sh), .Q(DB_int_sh[111])); + datapath_latch_rf2_32x128_wm1 uDQB112 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[111]), .D(DB_int_bmux[112]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[112]), .XQ(XDB_sh), .Q(DB_int_sh[112])); + datapath_latch_rf2_32x128_wm1 uDQB113 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[112]), .D(DB_int_bmux[113]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[113]), .XQ(XDB_sh), .Q(DB_int_sh[113])); + datapath_latch_rf2_32x128_wm1 uDQB114 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[113]), .D(DB_int_bmux[114]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[114]), .XQ(XDB_sh), .Q(DB_int_sh[114])); + datapath_latch_rf2_32x128_wm1 uDQB115 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[114]), .D(DB_int_bmux[115]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[115]), .XQ(XDB_sh), .Q(DB_int_sh[115])); + datapath_latch_rf2_32x128_wm1 uDQB116 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[115]), .D(DB_int_bmux[116]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[116]), .XQ(XDB_sh), .Q(DB_int_sh[116])); + datapath_latch_rf2_32x128_wm1 uDQB117 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[116]), .D(DB_int_bmux[117]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[117]), .XQ(XDB_sh), .Q(DB_int_sh[117])); + datapath_latch_rf2_32x128_wm1 uDQB118 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[117]), .D(DB_int_bmux[118]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[118]), .XQ(XDB_sh), .Q(DB_int_sh[118])); + datapath_latch_rf2_32x128_wm1 uDQB119 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[118]), .D(DB_int_bmux[119]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[119]), .XQ(XDB_sh), .Q(DB_int_sh[119])); + datapath_latch_rf2_32x128_wm1 uDQB120 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[119]), .D(DB_int_bmux[120]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[120]), .XQ(XDB_sh), .Q(DB_int_sh[120])); + datapath_latch_rf2_32x128_wm1 uDQB121 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[120]), .D(DB_int_bmux[121]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[121]), .XQ(XDB_sh), .Q(DB_int_sh[121])); + datapath_latch_rf2_32x128_wm1 uDQB122 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[121]), .D(DB_int_bmux[122]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[122]), .XQ(XDB_sh), .Q(DB_int_sh[122])); + datapath_latch_rf2_32x128_wm1 uDQB123 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[122]), .D(DB_int_bmux[123]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[123]), .XQ(XDB_sh), .Q(DB_int_sh[123])); + datapath_latch_rf2_32x128_wm1 uDQB124 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[123]), .D(DB_int_bmux[124]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[124]), .XQ(XDB_sh), .Q(DB_int_sh[124])); + datapath_latch_rf2_32x128_wm1 uDQB125 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[124]), .D(DB_int_bmux[125]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[125]), .XQ(XDB_sh), .Q(DB_int_sh[125])); + datapath_latch_rf2_32x128_wm1 uDQB126 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[125]), .D(DB_int_bmux[126]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[126]), .XQ(XDB_sh), .Q(DB_int_sh[126])); + datapath_latch_rf2_32x128_wm1 uDQB127 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[126]), .D(DB_int_bmux[127]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[127]), .XQ(XDB_sh), .Q(DB_int_sh[127])); + + + +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + always @ (VDDCE or VDDPE or VSSE) begin + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); + end +`endif + + function row_contention; + input [4:0] aa; + input [4:0] ab; + input [127:0] wena; + input [127:0] wenb; + reg result; + reg sameRow; + reg sameMux; + reg anyWrite; + begin + anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1; + sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0; + if (aa[4:1] == ab[4:1]) begin + sameRow = 1'b1; + end else begin + sameRow = 1'b0; + end + if (sameRow == 1'b1 && anyWrite == 1'b1) + row_contention = 1'b1; + else if (sameRow == 1'b1 && sameMux == 1'b1) + row_contention = 1'b1; + else + row_contention = 1'b0; + end + endfunction + + function col_contention; + input [4:0] aa; + input [4:0] ab; + begin + if (aa[0:0] == ab[0:0]) + col_contention = 1'b1; + else + col_contention = 1'b0; + end + endfunction + + function is_contention; + input [4:0] aa; + input [4:0] ab; + input [127:0] wena; + input [127:0] wenb; + reg result; + begin + if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin + result = 1'b0; + end else if (aa == ab) begin + result = 1'b1; + end else begin + result = 1'b0; + end + is_contention = result; + end + endfunction + + wire contA_flag = (CENA_int !== 1'b1 && ((TENB_ ? CENB_ : TCENB_) !== 1'b1)) && ((COLLDISN_int === 1'b1 && is_contention(TENB_ ? AB_ : TAB_, AA_int, 1'b0, 1'b1)) || + ((COLLDISN_int === 1'b0 || COLLDISN_int === 1'bx) && row_contention(TENB_ ? AB_ : TAB_, AA_int, 1'b0, 1'b1))); + wire contB_flag = (CENB_int !== 1'b1 && ((TENA_ ? CENA_ : TCENA_) !== 1'b1)) && ((COLLDISN_int === 1'b1 && is_contention(TENA_ ? AA_ : TAA_, AB_int, 1'b1, 1'b0)) || + ((COLLDISN_int === 1'b0 || COLLDISN_int === 1'bx) && row_contention(TENA_ ? AA_ : TAA_, AB_int, 1'b1, 1'b0))); + + always @ NOT_CENA begin + CENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA4 begin + AA_int[4] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA3 begin + AA_int[3] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA2 begin + AA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA1 begin + AA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA0 begin + AA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CENB begin + CENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB127 begin + WENB_int[127] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB126 begin + WENB_int[126] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB125 begin + WENB_int[125] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB124 begin + WENB_int[124] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB123 begin + WENB_int[123] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB122 begin + WENB_int[122] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB121 begin + WENB_int[121] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB120 begin + WENB_int[120] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB119 begin + WENB_int[119] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB118 begin + WENB_int[118] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB117 begin + WENB_int[117] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB116 begin + WENB_int[116] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB115 begin + WENB_int[115] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB114 begin + WENB_int[114] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB113 begin + WENB_int[113] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB112 begin + WENB_int[112] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB111 begin + WENB_int[111] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB110 begin + WENB_int[110] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB109 begin + WENB_int[109] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB108 begin + WENB_int[108] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB107 begin + WENB_int[107] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB106 begin + WENB_int[106] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB105 begin + WENB_int[105] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB104 begin + WENB_int[104] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB103 begin + WENB_int[103] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB102 begin + WENB_int[102] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB101 begin + WENB_int[101] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB100 begin + WENB_int[100] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB99 begin + WENB_int[99] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB98 begin + WENB_int[98] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB97 begin + WENB_int[97] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB96 begin + WENB_int[96] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB95 begin + WENB_int[95] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB94 begin + WENB_int[94] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB93 begin + WENB_int[93] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB92 begin + WENB_int[92] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB91 begin + WENB_int[91] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB90 begin + WENB_int[90] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB89 begin + WENB_int[89] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB88 begin + WENB_int[88] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB87 begin + WENB_int[87] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB86 begin + WENB_int[86] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB85 begin + WENB_int[85] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB84 begin + WENB_int[84] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB83 begin + WENB_int[83] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB82 begin + WENB_int[82] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB81 begin + WENB_int[81] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB80 begin + WENB_int[80] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB79 begin + WENB_int[79] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB78 begin + WENB_int[78] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB77 begin + WENB_int[77] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB76 begin + WENB_int[76] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB75 begin + WENB_int[75] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB74 begin + WENB_int[74] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB73 begin + WENB_int[73] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB72 begin + WENB_int[72] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB71 begin + WENB_int[71] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB70 begin + WENB_int[70] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB69 begin + WENB_int[69] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB68 begin + WENB_int[68] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB67 begin + WENB_int[67] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB66 begin + WENB_int[66] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB65 begin + WENB_int[65] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB64 begin + WENB_int[64] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB63 begin + WENB_int[63] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB62 begin + WENB_int[62] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB61 begin + WENB_int[61] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB60 begin + WENB_int[60] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB59 begin + WENB_int[59] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB58 begin + WENB_int[58] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB57 begin + WENB_int[57] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB56 begin + WENB_int[56] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB55 begin + WENB_int[55] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB54 begin + WENB_int[54] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB53 begin + WENB_int[53] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB52 begin + WENB_int[52] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB51 begin + WENB_int[51] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB50 begin + WENB_int[50] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB49 begin + WENB_int[49] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB48 begin + WENB_int[48] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB47 begin + WENB_int[47] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB46 begin + WENB_int[46] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB45 begin + WENB_int[45] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB44 begin + WENB_int[44] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB43 begin + WENB_int[43] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB42 begin + WENB_int[42] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB41 begin + WENB_int[41] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB40 begin + WENB_int[40] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB39 begin + WENB_int[39] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB38 begin + WENB_int[38] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB37 begin + WENB_int[37] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB36 begin + WENB_int[36] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB35 begin + WENB_int[35] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB34 begin + WENB_int[34] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB33 begin + WENB_int[33] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB32 begin + WENB_int[32] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB31 begin + WENB_int[31] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB30 begin + WENB_int[30] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB29 begin + WENB_int[29] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB28 begin + WENB_int[28] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB27 begin + WENB_int[27] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB26 begin + WENB_int[26] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB25 begin + WENB_int[25] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB24 begin + WENB_int[24] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB23 begin + WENB_int[23] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB22 begin + WENB_int[22] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB21 begin + WENB_int[21] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB20 begin + WENB_int[20] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB19 begin + WENB_int[19] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB18 begin + WENB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB17 begin + WENB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB16 begin + WENB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB15 begin + WENB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB14 begin + WENB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB13 begin + WENB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB12 begin + WENB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB11 begin + WENB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB10 begin + WENB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB9 begin + WENB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB8 begin + WENB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB7 begin + WENB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB6 begin + WENB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB5 begin + WENB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB4 begin + WENB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB3 begin + WENB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB2 begin + WENB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB1 begin + WENB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB0 begin + WENB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB4 begin + AB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB3 begin + AB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB2 begin + AB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB1 begin + AB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB0 begin + AB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB127 begin + DB_int[127] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB126 begin + DB_int[126] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB125 begin + DB_int[125] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB124 begin + DB_int[124] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB123 begin + DB_int[123] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB122 begin + DB_int[122] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB121 begin + DB_int[121] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB120 begin + DB_int[120] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB119 begin + DB_int[119] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB118 begin + DB_int[118] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB117 begin + DB_int[117] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB116 begin + DB_int[116] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB115 begin + DB_int[115] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB114 begin + DB_int[114] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB113 begin + DB_int[113] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB112 begin + DB_int[112] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB111 begin + DB_int[111] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB110 begin + DB_int[110] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB109 begin + DB_int[109] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB108 begin + DB_int[108] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB107 begin + DB_int[107] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB106 begin + DB_int[106] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB105 begin + DB_int[105] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB104 begin + DB_int[104] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB103 begin + DB_int[103] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB102 begin + DB_int[102] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB101 begin + DB_int[101] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB100 begin + DB_int[100] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB99 begin + DB_int[99] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB98 begin + DB_int[98] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB97 begin + DB_int[97] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB96 begin + DB_int[96] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB95 begin + DB_int[95] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB94 begin + DB_int[94] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB93 begin + DB_int[93] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB92 begin + DB_int[92] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB91 begin + DB_int[91] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB90 begin + DB_int[90] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB89 begin + DB_int[89] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB88 begin + DB_int[88] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB87 begin + DB_int[87] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB86 begin + DB_int[86] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB85 begin + DB_int[85] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB84 begin + DB_int[84] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB83 begin + DB_int[83] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB82 begin + DB_int[82] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB81 begin + DB_int[81] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB80 begin + DB_int[80] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB79 begin + DB_int[79] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB78 begin + DB_int[78] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB77 begin + DB_int[77] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB76 begin + DB_int[76] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB75 begin + DB_int[75] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB74 begin + DB_int[74] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB73 begin + DB_int[73] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB72 begin + DB_int[72] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB71 begin + DB_int[71] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB70 begin + DB_int[70] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB69 begin + DB_int[69] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB68 begin + DB_int[68] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB67 begin + DB_int[67] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB66 begin + DB_int[66] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB65 begin + DB_int[65] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB64 begin + DB_int[64] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB63 begin + DB_int[63] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB62 begin + DB_int[62] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB61 begin + DB_int[61] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB60 begin + DB_int[60] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB59 begin + DB_int[59] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB58 begin + DB_int[58] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB57 begin + DB_int[57] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB56 begin + DB_int[56] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB55 begin + DB_int[55] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB54 begin + DB_int[54] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB53 begin + DB_int[53] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB52 begin + DB_int[52] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB51 begin + DB_int[51] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB50 begin + DB_int[50] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB49 begin + DB_int[49] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB48 begin + DB_int[48] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB47 begin + DB_int[47] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB46 begin + DB_int[46] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB45 begin + DB_int[45] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB44 begin + DB_int[44] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB43 begin + DB_int[43] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB42 begin + DB_int[42] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB41 begin + DB_int[41] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB40 begin + DB_int[40] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB39 begin + DB_int[39] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB38 begin + DB_int[38] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB37 begin + DB_int[37] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB36 begin + DB_int[36] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB35 begin + DB_int[35] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB34 begin + DB_int[34] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB33 begin + DB_int[33] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB32 begin + DB_int[32] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB31 begin + DB_int[31] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB30 begin + DB_int[30] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB29 begin + DB_int[29] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB28 begin + DB_int[28] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB27 begin + DB_int[27] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB26 begin + DB_int[26] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB25 begin + DB_int[25] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB24 begin + DB_int[24] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB23 begin + DB_int[23] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB22 begin + DB_int[22] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB21 begin + DB_int[21] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB20 begin + DB_int[20] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB19 begin + DB_int[19] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB18 begin + DB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB17 begin + DB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB16 begin + DB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB15 begin + DB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB14 begin + DB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB13 begin + DB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB12 begin + DB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB11 begin + DB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB10 begin + DB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB9 begin + DB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB8 begin + DB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB7 begin + DB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB6 begin + DB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB5 begin + DB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB4 begin + DB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB3 begin + DB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB2 begin + DB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB1 begin + DB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB0 begin + DB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAA2 begin + EMAA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAA1 begin + EMAA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAA0 begin + EMAA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMASA begin + EMASA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAB2 begin + EMAB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAB1 begin + EMAB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAB0 begin + EMAB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TENA begin + TENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TCENA begin + CENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA4 begin + AA_int[4] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA3 begin + AA_int[3] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA2 begin + AA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA1 begin + AA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA0 begin + AA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TENB begin + TENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TCENB begin + CENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB127 begin + WENB_int[127] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB126 begin + WENB_int[126] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB125 begin + WENB_int[125] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB124 begin + WENB_int[124] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB123 begin + WENB_int[123] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB122 begin + WENB_int[122] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB121 begin + WENB_int[121] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB120 begin + WENB_int[120] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB119 begin + WENB_int[119] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB118 begin + WENB_int[118] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB117 begin + WENB_int[117] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB116 begin + WENB_int[116] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB115 begin + WENB_int[115] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB114 begin + WENB_int[114] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB113 begin + WENB_int[113] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB112 begin + WENB_int[112] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB111 begin + WENB_int[111] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB110 begin + WENB_int[110] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB109 begin + WENB_int[109] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB108 begin + WENB_int[108] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB107 begin + WENB_int[107] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB106 begin + WENB_int[106] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB105 begin + WENB_int[105] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB104 begin + WENB_int[104] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB103 begin + WENB_int[103] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB102 begin + WENB_int[102] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB101 begin + WENB_int[101] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB100 begin + WENB_int[100] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB99 begin + WENB_int[99] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB98 begin + WENB_int[98] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB97 begin + WENB_int[97] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB96 begin + WENB_int[96] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB95 begin + WENB_int[95] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB94 begin + WENB_int[94] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB93 begin + WENB_int[93] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB92 begin + WENB_int[92] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB91 begin + WENB_int[91] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB90 begin + WENB_int[90] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB89 begin + WENB_int[89] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB88 begin + WENB_int[88] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB87 begin + WENB_int[87] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB86 begin + WENB_int[86] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB85 begin + WENB_int[85] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB84 begin + WENB_int[84] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB83 begin + WENB_int[83] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB82 begin + WENB_int[82] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB81 begin + WENB_int[81] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB80 begin + WENB_int[80] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB79 begin + WENB_int[79] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB78 begin + WENB_int[78] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB77 begin + WENB_int[77] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB76 begin + WENB_int[76] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB75 begin + WENB_int[75] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB74 begin + WENB_int[74] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB73 begin + WENB_int[73] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB72 begin + WENB_int[72] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB71 begin + WENB_int[71] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB70 begin + WENB_int[70] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB69 begin + WENB_int[69] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB68 begin + WENB_int[68] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB67 begin + WENB_int[67] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB66 begin + WENB_int[66] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB65 begin + WENB_int[65] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB64 begin + WENB_int[64] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB63 begin + WENB_int[63] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB62 begin + WENB_int[62] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB61 begin + WENB_int[61] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB60 begin + WENB_int[60] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB59 begin + WENB_int[59] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB58 begin + WENB_int[58] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB57 begin + WENB_int[57] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB56 begin + WENB_int[56] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB55 begin + WENB_int[55] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB54 begin + WENB_int[54] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB53 begin + WENB_int[53] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB52 begin + WENB_int[52] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB51 begin + WENB_int[51] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB50 begin + WENB_int[50] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB49 begin + WENB_int[49] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB48 begin + WENB_int[48] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB47 begin + WENB_int[47] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB46 begin + WENB_int[46] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB45 begin + WENB_int[45] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB44 begin + WENB_int[44] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB43 begin + WENB_int[43] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB42 begin + WENB_int[42] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB41 begin + WENB_int[41] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB40 begin + WENB_int[40] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB39 begin + WENB_int[39] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB38 begin + WENB_int[38] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB37 begin + WENB_int[37] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB36 begin + WENB_int[36] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB35 begin + WENB_int[35] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB34 begin + WENB_int[34] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB33 begin + WENB_int[33] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB32 begin + WENB_int[32] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB31 begin + WENB_int[31] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB30 begin + WENB_int[30] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB29 begin + WENB_int[29] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB28 begin + WENB_int[28] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB27 begin + WENB_int[27] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB26 begin + WENB_int[26] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB25 begin + WENB_int[25] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB24 begin + WENB_int[24] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB23 begin + WENB_int[23] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB22 begin + WENB_int[22] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB21 begin + WENB_int[21] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB20 begin + WENB_int[20] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB19 begin + WENB_int[19] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB18 begin + WENB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB17 begin + WENB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB16 begin + WENB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB15 begin + WENB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB14 begin + WENB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB13 begin + WENB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB12 begin + WENB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB11 begin + WENB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB10 begin + WENB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB9 begin + WENB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB8 begin + WENB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB7 begin + WENB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB6 begin + WENB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB5 begin + WENB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB4 begin + WENB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB3 begin + WENB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB2 begin + WENB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB1 begin + WENB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB0 begin + WENB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB4 begin + AB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB3 begin + AB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB2 begin + AB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB1 begin + AB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB0 begin + AB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB127 begin + DB_int[127] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB126 begin + DB_int[126] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB125 begin + DB_int[125] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB124 begin + DB_int[124] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB123 begin + DB_int[123] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB122 begin + DB_int[122] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB121 begin + DB_int[121] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB120 begin + DB_int[120] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB119 begin + DB_int[119] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB118 begin + DB_int[118] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB117 begin + DB_int[117] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB116 begin + DB_int[116] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB115 begin + DB_int[115] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB114 begin + DB_int[114] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB113 begin + DB_int[113] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB112 begin + DB_int[112] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB111 begin + DB_int[111] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB110 begin + DB_int[110] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB109 begin + DB_int[109] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB108 begin + DB_int[108] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB107 begin + DB_int[107] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB106 begin + DB_int[106] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB105 begin + DB_int[105] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB104 begin + DB_int[104] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB103 begin + DB_int[103] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB102 begin + DB_int[102] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB101 begin + DB_int[101] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB100 begin + DB_int[100] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB99 begin + DB_int[99] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB98 begin + DB_int[98] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB97 begin + DB_int[97] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB96 begin + DB_int[96] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB95 begin + DB_int[95] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB94 begin + DB_int[94] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB93 begin + DB_int[93] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB92 begin + DB_int[92] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB91 begin + DB_int[91] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB90 begin + DB_int[90] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB89 begin + DB_int[89] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB88 begin + DB_int[88] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB87 begin + DB_int[87] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB86 begin + DB_int[86] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB85 begin + DB_int[85] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB84 begin + DB_int[84] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB83 begin + DB_int[83] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB82 begin + DB_int[82] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB81 begin + DB_int[81] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB80 begin + DB_int[80] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB79 begin + DB_int[79] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB78 begin + DB_int[78] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB77 begin + DB_int[77] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB76 begin + DB_int[76] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB75 begin + DB_int[75] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB74 begin + DB_int[74] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB73 begin + DB_int[73] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB72 begin + DB_int[72] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB71 begin + DB_int[71] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB70 begin + DB_int[70] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB69 begin + DB_int[69] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB68 begin + DB_int[68] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB67 begin + DB_int[67] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB66 begin + DB_int[66] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB65 begin + DB_int[65] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB64 begin + DB_int[64] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB63 begin + DB_int[63] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB62 begin + DB_int[62] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB61 begin + DB_int[61] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB60 begin + DB_int[60] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB59 begin + DB_int[59] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB58 begin + DB_int[58] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB57 begin + DB_int[57] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB56 begin + DB_int[56] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB55 begin + DB_int[55] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB54 begin + DB_int[54] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB53 begin + DB_int[53] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB52 begin + DB_int[52] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB51 begin + DB_int[51] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB50 begin + DB_int[50] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB49 begin + DB_int[49] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB48 begin + DB_int[48] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB47 begin + DB_int[47] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB46 begin + DB_int[46] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB45 begin + DB_int[45] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB44 begin + DB_int[44] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB43 begin + DB_int[43] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB42 begin + DB_int[42] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB41 begin + DB_int[41] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB40 begin + DB_int[40] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB39 begin + DB_int[39] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB38 begin + DB_int[38] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB37 begin + DB_int[37] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB36 begin + DB_int[36] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB35 begin + DB_int[35] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB34 begin + DB_int[34] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB33 begin + DB_int[33] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB32 begin + DB_int[32] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB31 begin + DB_int[31] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB30 begin + DB_int[30] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB29 begin + DB_int[29] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB28 begin + DB_int[28] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB27 begin + DB_int[27] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB26 begin + DB_int[26] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB25 begin + DB_int[25] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB24 begin + DB_int[24] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB23 begin + DB_int[23] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB22 begin + DB_int[22] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB21 begin + DB_int[21] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB20 begin + DB_int[20] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB19 begin + DB_int[19] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB18 begin + DB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB17 begin + DB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB16 begin + DB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB15 begin + DB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB14 begin + DB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB13 begin + DB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB12 begin + DB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB11 begin + DB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB10 begin + DB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB9 begin + DB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB8 begin + DB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB7 begin + DB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB6 begin + DB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB5 begin + DB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB4 begin + DB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB3 begin + DB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB2 begin + DB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB1 begin + DB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB0 begin + DB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIA1 begin + XQA = 1'b1; QA_update = 1'b1; + end + always @ NOT_SIA0 begin + XQA = 1'b1; QA_update = 1'b1; + end + always @ NOT_SEA begin + XQA = 1'b1; QA_update = 1'b1; + SEA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_DFTRAMBYP_CLKA begin + XQA = 1'b1; QA_update = 1'b1; + DFTRAMBYP_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_DFTRAMBYP_CLKB begin + XDB_sh = 1'b1; DB_sh_update = 1'b1; + DFTRAMBYP_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_RET1N begin + RET1N_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIB1 begin + XDB_sh = 1'b1; DB_sh_update = 1'b1; + end + always @ NOT_SIB0 begin + XDB_sh = 1'b1; DB_sh_update = 1'b1; + end + always @ NOT_SEB begin + XDB_sh = 1'b1; DB_sh_update = 1'b1; + XDB_sh = 1'b1; DB_sh_update = 1'b1; + SEB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_COLLDISN begin + COLLDISN_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + + always @ NOT_CONTA begin + cont_flag0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_PER begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_MINH begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_MINL begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CONTB begin + cont_flag1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_PER begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_MINH begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_MINL begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + + + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp; + wire RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp; + + wire RET1Neq1aTENAeq1, RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0; + wire RET1Neq1aTENBeq1, RET1Neq1aTENBeq1aCENBeq0, RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1; + wire RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, RET1Neq1aTENAeq0, RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1; + wire RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, RET1Neq1aTENBeq0, RET1Neq1aTENBeq0aTCENBeq0; + wire RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0; + wire RET1Neq1aSEAeq1, RET1Neq1aSEBeq1, RET1Neq1, RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp; + wire RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp; + + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&!EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&!EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&!EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&!EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&EMAB[1]&&EMAB[0]; + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[127])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[126])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[125])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[124])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[123])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[122])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[121])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[120])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[119])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[118])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[117])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[116])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[115])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[114])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[113])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[112])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[111])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[110])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[109])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[108])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[107])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[106])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[105])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[104])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[103])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[102])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[101])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[100])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[99])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[98])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[97])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[96])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[95])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[94])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[93])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[92])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[91])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[90])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[89])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[88])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[87])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[86])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[85])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[84])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[83])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[82])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[81])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[80])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[79])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[78])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[77])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[76])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[75])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[74])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[73])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[72])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[71])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[70])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[69])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[68])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[67])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[66])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[65])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[64])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[63])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[62])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[61])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[60])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[59])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[58])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[57])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[56])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[55])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[54])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[53])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[52])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[51])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[50])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[49])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[48])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[47])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[46])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[45])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[44])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[43])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[42])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[41])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[40])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[39])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[38])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[37])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[36])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[35])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[34])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[33])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[32])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[31])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[30])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[29])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[28])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[27])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[26])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[25])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[24])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[23])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[22])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[21])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[20])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[19])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[18])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[17])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[16])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[15])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[14])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[13])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[12])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[11])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[10])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[9])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[8])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[7])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[6])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[5])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[4])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[3])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[2])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[1])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[0])); + assign RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp = + RET1N&&(((TENA&&!CENA&&!DFTRAMBYP)||(!TENA&&!TCENA&&!DFTRAMBYP))||DFTRAMBYP); + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[127])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[126])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[125])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[124])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[123])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[122])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[121])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[120])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[119])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[118])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[117])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[116])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[115])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[114])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[113])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[112])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[111])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[110])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[109])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[108])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[107])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[106])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[105])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[104])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[103])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[102])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[101])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[100])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[99])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[98])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[97])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[96])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[95])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[94])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[93])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[92])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[91])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[90])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[89])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[88])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[87])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[86])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[85])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[84])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[83])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[82])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[81])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[80])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[79])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[78])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[77])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[76])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[75])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[74])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[73])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[72])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[71])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[70])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[69])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[68])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[67])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[66])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[65])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[64])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[63])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[62])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[61])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[60])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[59])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[58])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[57])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[56])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[55])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[54])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[53])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[52])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[51])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[50])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[49])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[48])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[47])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[46])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[45])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[44])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[43])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[42])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[41])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[40])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[39])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[38])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[37])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[36])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[35])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[34])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[33])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[32])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[31])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[30])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[29])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[28])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[27])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[26])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[25])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[24])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[23])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[22])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[21])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[20])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[19])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[18])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[17])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[16])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[15])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[14])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[13])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[12])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[11])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[10])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[9])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[8])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[7])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[6])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[5])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[4])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[3])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[2])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[1])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[0])); + + assign RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1 = RET1N&&TENA&&!CENA&&COLLDISN; + assign RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0 = RET1N&&TENA&&!CENA&&!COLLDISN; + assign RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1 = RET1N&&TENB&&!CENB&&COLLDISN; + assign RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0 = RET1N&&TENB&&!CENB&&!COLLDISN; + assign RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1 = RET1N&&!TENA&&!TCENA&&COLLDISN; + assign RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0 = RET1N&&!TENA&&!TCENA&&!COLLDISN; + assign RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1 = RET1N&&!TENB&&!TCENB&&COLLDISN; + assign RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0 = RET1N&&!TENB&&!TCENB&&!COLLDISN; + assign RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp = RET1N&&((TENA&&!CENA)||(!TENA&&!TCENA)); + assign RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp = RET1N&&((TENB&&!CENB)||(!TENB&&!TCENB)); + + assign RET1Neq1aTENBeq1aCENBeq0 = RET1N&&TENB&&!CENB; + assign RET1Neq1aTENBeq0aTCENBeq0 = RET1N&&!TENB&&!TCENB; + + assign RET1Neq1aTENAeq1 = RET1N&&TENA; + assign RET1Neq1aTENBeq1 = RET1N&&TENB; + assign RET1Neq1aTENAeq0 = RET1N&&!TENA; + assign RET1Neq1aTENBeq0 = RET1N&&!TENB; + assign RET1Neq1aSEAeq1 = RET1N&&SEA; + assign RET1Neq1aSEBeq1 = RET1N&&SEB; + assign RET1Neq1 = RET1N; + + specify + + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (CENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TCENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1) + (TENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0) + (TENA -=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[4] +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[3] +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[2] +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[1] +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[0] +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[4] +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[3] +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[2] +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[1] +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[0] +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1) + (TENA +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1) + (TENA +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1) + (TENA +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1) + (TENA +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1) + (TENA +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0) + (TENA -=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0) + (TENA -=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0) + (TENA -=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0) + (TENA -=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0) + (TENA -=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (CENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TCENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1) + (TENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0) + (TENB -=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[127] +=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[126] +=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[125] +=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[124] +=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[123] +=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[122] +=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[121] +=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[120] +=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[119] +=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[118] +=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[117] +=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[116] +=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[115] +=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[114] +=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[113] +=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[112] +=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[111] +=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[110] +=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[109] +=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[108] +=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[107] +=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[106] +=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[105] +=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[104] +=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[103] +=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[102] +=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[101] +=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[100] +=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[99] +=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[98] +=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[97] +=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[96] +=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[95] +=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[94] +=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[93] +=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[92] +=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[91] +=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[90] +=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[89] +=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[88] +=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[87] +=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[86] +=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[85] +=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[84] +=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[83] +=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[82] +=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[81] +=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[80] +=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[79] +=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[78] +=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[77] +=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[76] +=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[75] +=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[74] +=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[73] +=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[72] +=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[71] +=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[70] +=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[69] +=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[68] +=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[67] +=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[66] +=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[65] +=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[64] +=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[63] +=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[62] +=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[61] +=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[60] +=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[59] +=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[58] +=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[57] +=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[56] +=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[55] +=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[54] +=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[53] +=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[52] +=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[51] +=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[50] +=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[49] +=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[48] +=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[47] +=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[46] +=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[45] +=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[44] +=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[43] +=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[42] +=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[41] +=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[40] +=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[39] +=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[38] +=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[37] +=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[36] +=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[35] +=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[34] +=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[33] +=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[32] +=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[31] +=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[30] +=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[29] +=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[28] +=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[27] +=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[26] +=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[25] +=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[24] +=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[23] +=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[22] +=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[21] +=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[20] +=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[19] +=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[18] +=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[17] +=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[16] +=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[15] +=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[14] +=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[13] +=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[12] +=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[11] +=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[10] +=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[9] +=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[8] +=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[7] +=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[6] +=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[5] +=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[4] +=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[3] +=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[2] +=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[1] +=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[0] +=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[127] +=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[126] +=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[125] +=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[124] +=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[123] +=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[122] +=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[121] +=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[120] +=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[119] +=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[118] +=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[117] +=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[116] +=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[115] +=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[114] +=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[113] +=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[112] +=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[111] +=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[110] +=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[109] +=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[108] +=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[107] +=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[106] +=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[105] +=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[104] +=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[103] +=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[102] +=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[101] +=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[100] +=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[99] +=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[98] +=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[97] +=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[96] +=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[95] +=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[94] +=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[93] +=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[92] +=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[91] +=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[90] +=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[89] +=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[88] +=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[87] +=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[86] +=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[85] +=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[84] +=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[83] +=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[82] +=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[81] +=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[80] +=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[79] +=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[78] +=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[77] +=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[76] +=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[75] +=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[74] +=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[73] +=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[72] +=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[71] +=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[70] +=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[69] +=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[68] +=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[67] +=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[66] +=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[65] +=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[64] +=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[63] +=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[62] +=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[61] +=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[60] +=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[59] +=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[58] +=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[57] +=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[56] +=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[55] +=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[54] +=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[53] +=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[52] +=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[51] +=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[50] +=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[49] +=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[48] +=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[47] +=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[46] +=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[45] +=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[44] +=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[43] +=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[42] +=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[41] +=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[40] +=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[39] +=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[38] +=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[37] +=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[36] +=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[35] +=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[34] +=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[33] +=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[32] +=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[31] +=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[30] +=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[29] +=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[28] +=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[27] +=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[26] +=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[25] +=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[24] +=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[23] +=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[22] +=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[21] +=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[20] +=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[19] +=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[18] +=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[17] +=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[16] +=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[15] +=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[14] +=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[13] +=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[12] +=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[11] +=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[10] +=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[9] +=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[8] +=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[7] +=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[6] +=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[5] +=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[4] +=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[3] +=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[2] +=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[1] +=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[0] +=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[127] == 1'b0 && WENB[127] == 1'b1) + (TENB +=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[126] == 1'b0 && WENB[126] == 1'b1) + (TENB +=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[125] == 1'b0 && WENB[125] == 1'b1) + (TENB +=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[124] == 1'b0 && WENB[124] == 1'b1) + (TENB +=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[123] == 1'b0 && WENB[123] == 1'b1) + (TENB +=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[122] == 1'b0 && WENB[122] == 1'b1) + (TENB +=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[121] == 1'b0 && WENB[121] == 1'b1) + (TENB +=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[120] == 1'b0 && WENB[120] == 1'b1) + (TENB +=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[119] == 1'b0 && WENB[119] == 1'b1) + (TENB +=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[118] == 1'b0 && WENB[118] == 1'b1) + (TENB +=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[117] == 1'b0 && WENB[117] == 1'b1) + (TENB +=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[116] == 1'b0 && WENB[116] == 1'b1) + (TENB +=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[115] == 1'b0 && WENB[115] == 1'b1) + (TENB +=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[114] == 1'b0 && WENB[114] == 1'b1) + (TENB +=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[113] == 1'b0 && WENB[113] == 1'b1) + (TENB +=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[112] == 1'b0 && WENB[112] == 1'b1) + (TENB +=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[111] == 1'b0 && WENB[111] == 1'b1) + (TENB +=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[110] == 1'b0 && WENB[110] == 1'b1) + (TENB +=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[109] == 1'b0 && WENB[109] == 1'b1) + (TENB +=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[108] == 1'b0 && WENB[108] == 1'b1) + (TENB +=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[107] == 1'b0 && WENB[107] == 1'b1) + (TENB +=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[106] == 1'b0 && WENB[106] == 1'b1) + (TENB +=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[105] == 1'b0 && WENB[105] == 1'b1) + (TENB +=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[104] == 1'b0 && WENB[104] == 1'b1) + (TENB +=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[103] == 1'b0 && WENB[103] == 1'b1) + (TENB +=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[102] == 1'b0 && WENB[102] == 1'b1) + (TENB +=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[101] == 1'b0 && WENB[101] == 1'b1) + (TENB +=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[100] == 1'b0 && WENB[100] == 1'b1) + (TENB +=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[99] == 1'b0 && WENB[99] == 1'b1) + (TENB +=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[98] == 1'b0 && WENB[98] == 1'b1) + (TENB +=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[97] == 1'b0 && WENB[97] == 1'b1) + (TENB +=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[96] == 1'b0 && WENB[96] == 1'b1) + (TENB +=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[95] == 1'b0 && WENB[95] == 1'b1) + (TENB +=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[94] == 1'b0 && WENB[94] == 1'b1) + (TENB +=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[93] == 1'b0 && WENB[93] == 1'b1) + (TENB +=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[92] == 1'b0 && WENB[92] == 1'b1) + (TENB +=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[91] == 1'b0 && WENB[91] == 1'b1) + (TENB +=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[90] == 1'b0 && WENB[90] == 1'b1) + (TENB +=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[89] == 1'b0 && WENB[89] == 1'b1) + (TENB +=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[88] == 1'b0 && WENB[88] == 1'b1) + (TENB +=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[87] == 1'b0 && WENB[87] == 1'b1) + (TENB +=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[86] == 1'b0 && WENB[86] == 1'b1) + (TENB +=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[85] == 1'b0 && WENB[85] == 1'b1) + (TENB +=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[84] == 1'b0 && WENB[84] == 1'b1) + (TENB +=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[83] == 1'b0 && WENB[83] == 1'b1) + (TENB +=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[82] == 1'b0 && WENB[82] == 1'b1) + (TENB +=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[81] == 1'b0 && WENB[81] == 1'b1) + (TENB +=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[80] == 1'b0 && WENB[80] == 1'b1) + (TENB +=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[79] == 1'b0 && WENB[79] == 1'b1) + (TENB +=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[78] == 1'b0 && WENB[78] == 1'b1) + (TENB +=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[77] == 1'b0 && WENB[77] == 1'b1) + (TENB +=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[76] == 1'b0 && WENB[76] == 1'b1) + (TENB +=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[75] == 1'b0 && WENB[75] == 1'b1) + (TENB +=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[74] == 1'b0 && WENB[74] == 1'b1) + (TENB +=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[73] == 1'b0 && WENB[73] == 1'b1) + (TENB +=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[72] == 1'b0 && WENB[72] == 1'b1) + (TENB +=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[71] == 1'b0 && WENB[71] == 1'b1) + (TENB +=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[70] == 1'b0 && WENB[70] == 1'b1) + (TENB +=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[69] == 1'b0 && WENB[69] == 1'b1) + (TENB +=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[68] == 1'b0 && WENB[68] == 1'b1) + (TENB +=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[67] == 1'b0 && WENB[67] == 1'b1) + (TENB +=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[66] == 1'b0 && WENB[66] == 1'b1) + (TENB +=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[65] == 1'b0 && WENB[65] == 1'b1) + (TENB +=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[64] == 1'b0 && WENB[64] == 1'b1) + (TENB +=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[63] == 1'b0 && WENB[63] == 1'b1) + (TENB +=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[62] == 1'b0 && WENB[62] == 1'b1) + (TENB +=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[61] == 1'b0 && WENB[61] == 1'b1) + (TENB +=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[60] == 1'b0 && WENB[60] == 1'b1) + (TENB +=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[59] == 1'b0 && WENB[59] == 1'b1) + (TENB +=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[58] == 1'b0 && WENB[58] == 1'b1) + (TENB +=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[57] == 1'b0 && WENB[57] == 1'b1) + (TENB +=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[56] == 1'b0 && WENB[56] == 1'b1) + (TENB +=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[55] == 1'b0 && WENB[55] == 1'b1) + (TENB +=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[54] == 1'b0 && WENB[54] == 1'b1) + (TENB +=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[53] == 1'b0 && WENB[53] == 1'b1) + (TENB +=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[52] == 1'b0 && WENB[52] == 1'b1) + (TENB +=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[51] == 1'b0 && WENB[51] == 1'b1) + (TENB +=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[50] == 1'b0 && WENB[50] == 1'b1) + (TENB +=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[49] == 1'b0 && WENB[49] == 1'b1) + (TENB +=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[48] == 1'b0 && WENB[48] == 1'b1) + (TENB +=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[47] == 1'b0 && WENB[47] == 1'b1) + (TENB +=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[46] == 1'b0 && WENB[46] == 1'b1) + (TENB +=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[45] == 1'b0 && WENB[45] == 1'b1) + (TENB +=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[44] == 1'b0 && WENB[44] == 1'b1) + (TENB +=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[43] == 1'b0 && WENB[43] == 1'b1) + (TENB +=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[42] == 1'b0 && WENB[42] == 1'b1) + (TENB +=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[41] == 1'b0 && WENB[41] == 1'b1) + (TENB +=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[40] == 1'b0 && WENB[40] == 1'b1) + (TENB +=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[39] == 1'b0 && WENB[39] == 1'b1) + (TENB +=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[38] == 1'b0 && WENB[38] == 1'b1) + (TENB +=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[37] == 1'b0 && WENB[37] == 1'b1) + (TENB +=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[36] == 1'b0 && WENB[36] == 1'b1) + (TENB +=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[35] == 1'b0 && WENB[35] == 1'b1) + (TENB +=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[34] == 1'b0 && WENB[34] == 1'b1) + (TENB +=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[33] == 1'b0 && WENB[33] == 1'b1) + (TENB +=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[32] == 1'b0 && WENB[32] == 1'b1) + (TENB +=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[31] == 1'b0 && WENB[31] == 1'b1) + (TENB +=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[30] == 1'b0 && WENB[30] == 1'b1) + (TENB +=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[29] == 1'b0 && WENB[29] == 1'b1) + (TENB +=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[28] == 1'b0 && WENB[28] == 1'b1) + (TENB +=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[27] == 1'b0 && WENB[27] == 1'b1) + (TENB +=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[26] == 1'b0 && WENB[26] == 1'b1) + (TENB +=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[25] == 1'b0 && WENB[25] == 1'b1) + (TENB +=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[24] == 1'b0 && WENB[24] == 1'b1) + (TENB +=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[23] == 1'b0 && WENB[23] == 1'b1) + (TENB +=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[22] == 1'b0 && WENB[22] == 1'b1) + (TENB +=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[21] == 1'b0 && WENB[21] == 1'b1) + (TENB +=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[20] == 1'b0 && WENB[20] == 1'b1) + (TENB +=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[19] == 1'b0 && WENB[19] == 1'b1) + (TENB +=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[18] == 1'b0 && WENB[18] == 1'b1) + (TENB +=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[17] == 1'b0 && WENB[17] == 1'b1) + (TENB +=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[16] == 1'b0 && WENB[16] == 1'b1) + (TENB +=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[15] == 1'b0 && WENB[15] == 1'b1) + (TENB +=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[14] == 1'b0 && WENB[14] == 1'b1) + (TENB +=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[13] == 1'b0 && WENB[13] == 1'b1) + (TENB +=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[12] == 1'b0 && WENB[12] == 1'b1) + (TENB +=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[11] == 1'b0 && WENB[11] == 1'b1) + (TENB +=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[10] == 1'b0 && WENB[10] == 1'b1) + (TENB +=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[9] == 1'b0 && WENB[9] == 1'b1) + (TENB +=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[8] == 1'b0 && WENB[8] == 1'b1) + (TENB +=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[7] == 1'b0 && WENB[7] == 1'b1) + (TENB +=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[6] == 1'b0 && WENB[6] == 1'b1) + (TENB +=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[5] == 1'b0 && WENB[5] == 1'b1) + (TENB +=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[4] == 1'b0 && WENB[4] == 1'b1) + (TENB +=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[3] == 1'b0 && WENB[3] == 1'b1) + (TENB +=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[2] == 1'b0 && WENB[2] == 1'b1) + (TENB +=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[1] == 1'b0 && WENB[1] == 1'b1) + (TENB +=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[0] == 1'b0 && WENB[0] == 1'b1) + (TENB +=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[127] == 1'b1 && WENB[127] == 1'b0) + (TENB -=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[126] == 1'b1 && WENB[126] == 1'b0) + (TENB -=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[125] == 1'b1 && WENB[125] == 1'b0) + (TENB -=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[124] == 1'b1 && WENB[124] == 1'b0) + (TENB -=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[123] == 1'b1 && WENB[123] == 1'b0) + (TENB -=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[122] == 1'b1 && WENB[122] == 1'b0) + (TENB -=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[121] == 1'b1 && WENB[121] == 1'b0) + (TENB -=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[120] == 1'b1 && WENB[120] == 1'b0) + (TENB -=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[119] == 1'b1 && WENB[119] == 1'b0) + (TENB -=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[118] == 1'b1 && WENB[118] == 1'b0) + (TENB -=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[117] == 1'b1 && WENB[117] == 1'b0) + (TENB -=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[116] == 1'b1 && WENB[116] == 1'b0) + (TENB -=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[115] == 1'b1 && WENB[115] == 1'b0) + (TENB -=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[114] == 1'b1 && WENB[114] == 1'b0) + (TENB -=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[113] == 1'b1 && WENB[113] == 1'b0) + (TENB -=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[112] == 1'b1 && WENB[112] == 1'b0) + (TENB -=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[111] == 1'b1 && WENB[111] == 1'b0) + (TENB -=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[110] == 1'b1 && WENB[110] == 1'b0) + (TENB -=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[109] == 1'b1 && WENB[109] == 1'b0) + (TENB -=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[108] == 1'b1 && WENB[108] == 1'b0) + (TENB -=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[107] == 1'b1 && WENB[107] == 1'b0) + (TENB -=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[106] == 1'b1 && WENB[106] == 1'b0) + (TENB -=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[105] == 1'b1 && WENB[105] == 1'b0) + (TENB -=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[104] == 1'b1 && WENB[104] == 1'b0) + (TENB -=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[103] == 1'b1 && WENB[103] == 1'b0) + (TENB -=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[102] == 1'b1 && WENB[102] == 1'b0) + (TENB -=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[101] == 1'b1 && WENB[101] == 1'b0) + (TENB -=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[100] == 1'b1 && WENB[100] == 1'b0) + (TENB -=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[99] == 1'b1 && WENB[99] == 1'b0) + (TENB -=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[98] == 1'b1 && WENB[98] == 1'b0) + (TENB -=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[97] == 1'b1 && WENB[97] == 1'b0) + (TENB -=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[96] == 1'b1 && WENB[96] == 1'b0) + (TENB -=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[95] == 1'b1 && WENB[95] == 1'b0) + (TENB -=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[94] == 1'b1 && WENB[94] == 1'b0) + (TENB -=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[93] == 1'b1 && WENB[93] == 1'b0) + (TENB -=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[92] == 1'b1 && WENB[92] == 1'b0) + (TENB -=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[91] == 1'b1 && WENB[91] == 1'b0) + (TENB -=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[90] == 1'b1 && WENB[90] == 1'b0) + (TENB -=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[89] == 1'b1 && WENB[89] == 1'b0) + (TENB -=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[88] == 1'b1 && WENB[88] == 1'b0) + (TENB -=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[87] == 1'b1 && WENB[87] == 1'b0) + (TENB -=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[86] == 1'b1 && WENB[86] == 1'b0) + (TENB -=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[85] == 1'b1 && WENB[85] == 1'b0) + (TENB -=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[84] == 1'b1 && WENB[84] == 1'b0) + (TENB -=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[83] == 1'b1 && WENB[83] == 1'b0) + (TENB -=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[82] == 1'b1 && WENB[82] == 1'b0) + (TENB -=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[81] == 1'b1 && WENB[81] == 1'b0) + (TENB -=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[80] == 1'b1 && WENB[80] == 1'b0) + (TENB -=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[79] == 1'b1 && WENB[79] == 1'b0) + (TENB -=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[78] == 1'b1 && WENB[78] == 1'b0) + (TENB -=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[77] == 1'b1 && WENB[77] == 1'b0) + (TENB -=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[76] == 1'b1 && WENB[76] == 1'b0) + (TENB -=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[75] == 1'b1 && WENB[75] == 1'b0) + (TENB -=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[74] == 1'b1 && WENB[74] == 1'b0) + (TENB -=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[73] == 1'b1 && WENB[73] == 1'b0) + (TENB -=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[72] == 1'b1 && WENB[72] == 1'b0) + (TENB -=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[71] == 1'b1 && WENB[71] == 1'b0) + (TENB -=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[70] == 1'b1 && WENB[70] == 1'b0) + (TENB -=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[69] == 1'b1 && WENB[69] == 1'b0) + (TENB -=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[68] == 1'b1 && WENB[68] == 1'b0) + (TENB -=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[67] == 1'b1 && WENB[67] == 1'b0) + (TENB -=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[66] == 1'b1 && WENB[66] == 1'b0) + (TENB -=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[65] == 1'b1 && WENB[65] == 1'b0) + (TENB -=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[64] == 1'b1 && WENB[64] == 1'b0) + (TENB -=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[63] == 1'b1 && WENB[63] == 1'b0) + (TENB -=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[62] == 1'b1 && WENB[62] == 1'b0) + (TENB -=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[61] == 1'b1 && WENB[61] == 1'b0) + (TENB -=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[60] == 1'b1 && WENB[60] == 1'b0) + (TENB -=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[59] == 1'b1 && WENB[59] == 1'b0) + (TENB -=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[58] == 1'b1 && WENB[58] == 1'b0) + (TENB -=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[57] == 1'b1 && WENB[57] == 1'b0) + (TENB -=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[56] == 1'b1 && WENB[56] == 1'b0) + (TENB -=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[55] == 1'b1 && WENB[55] == 1'b0) + (TENB -=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[54] == 1'b1 && WENB[54] == 1'b0) + (TENB -=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[53] == 1'b1 && WENB[53] == 1'b0) + (TENB -=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[52] == 1'b1 && WENB[52] == 1'b0) + (TENB -=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[51] == 1'b1 && WENB[51] == 1'b0) + (TENB -=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[50] == 1'b1 && WENB[50] == 1'b0) + (TENB -=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[49] == 1'b1 && WENB[49] == 1'b0) + (TENB -=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[48] == 1'b1 && WENB[48] == 1'b0) + (TENB -=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[47] == 1'b1 && WENB[47] == 1'b0) + (TENB -=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[46] == 1'b1 && WENB[46] == 1'b0) + (TENB -=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[45] == 1'b1 && WENB[45] == 1'b0) + (TENB -=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[44] == 1'b1 && WENB[44] == 1'b0) + (TENB -=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[43] == 1'b1 && WENB[43] == 1'b0) + (TENB -=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[42] == 1'b1 && WENB[42] == 1'b0) + (TENB -=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[41] == 1'b1 && WENB[41] == 1'b0) + (TENB -=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[40] == 1'b1 && WENB[40] == 1'b0) + (TENB -=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[39] == 1'b1 && WENB[39] == 1'b0) + (TENB -=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[38] == 1'b1 && WENB[38] == 1'b0) + (TENB -=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[37] == 1'b1 && WENB[37] == 1'b0) + (TENB -=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[36] == 1'b1 && WENB[36] == 1'b0) + (TENB -=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[35] == 1'b1 && WENB[35] == 1'b0) + (TENB -=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[34] == 1'b1 && WENB[34] == 1'b0) + (TENB -=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[33] == 1'b1 && WENB[33] == 1'b0) + (TENB -=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[32] == 1'b1 && WENB[32] == 1'b0) + (TENB -=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[31] == 1'b1 && WENB[31] == 1'b0) + (TENB -=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[30] == 1'b1 && WENB[30] == 1'b0) + (TENB -=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[29] == 1'b1 && WENB[29] == 1'b0) + (TENB -=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[28] == 1'b1 && WENB[28] == 1'b0) + (TENB -=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[27] == 1'b1 && WENB[27] == 1'b0) + (TENB -=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[26] == 1'b1 && WENB[26] == 1'b0) + (TENB -=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[25] == 1'b1 && WENB[25] == 1'b0) + (TENB -=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[24] == 1'b1 && WENB[24] == 1'b0) + (TENB -=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[23] == 1'b1 && WENB[23] == 1'b0) + (TENB -=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[22] == 1'b1 && WENB[22] == 1'b0) + (TENB -=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[21] == 1'b1 && WENB[21] == 1'b0) + (TENB -=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[20] == 1'b1 && WENB[20] == 1'b0) + (TENB -=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[19] == 1'b1 && WENB[19] == 1'b0) + (TENB -=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[18] == 1'b1 && WENB[18] == 1'b0) + (TENB -=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[17] == 1'b1 && WENB[17] == 1'b0) + (TENB -=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[16] == 1'b1 && WENB[16] == 1'b0) + (TENB -=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[15] == 1'b1 && WENB[15] == 1'b0) + (TENB -=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[14] == 1'b1 && WENB[14] == 1'b0) + (TENB -=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[13] == 1'b1 && WENB[13] == 1'b0) + (TENB -=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[12] == 1'b1 && WENB[12] == 1'b0) + (TENB -=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[11] == 1'b1 && WENB[11] == 1'b0) + (TENB -=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[10] == 1'b1 && WENB[10] == 1'b0) + (TENB -=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[9] == 1'b1 && WENB[9] == 1'b0) + (TENB -=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[8] == 1'b1 && WENB[8] == 1'b0) + (TENB -=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[7] == 1'b1 && WENB[7] == 1'b0) + (TENB -=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[6] == 1'b1 && WENB[6] == 1'b0) + (TENB -=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[5] == 1'b1 && WENB[5] == 1'b0) + (TENB -=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[4] == 1'b1 && WENB[4] == 1'b0) + (TENB -=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[3] == 1'b1 && WENB[3] == 1'b0) + (TENB -=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[2] == 1'b1 && WENB[2] == 1'b0) + (TENB -=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[1] == 1'b1 && WENB[1] == 1'b0) + (TENB -=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[0] == 1'b1 && WENB[0] == 1'b0) + (TENB -=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[4] +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[3] +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[2] +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[1] +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[0] +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[4] +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[3] +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[2] +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[1] +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[0] +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1) + (TENB +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1) + (TENB +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1) + (TENB +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1) + (TENB +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1) + (TENB +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0) + (TENB -=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0) + (TENB -=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0) + (TENB -=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0) + (TENB -=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0) + (TENB -=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (posedge CLKB => (SOB[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (posedge CLKB => (SOB[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $period(posedge CLKA, `ARM_MEM_PERIOD, NOT_CLKA_PER); + `else + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + `endif + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $period(posedge CLKB, `ARM_MEM_PERIOD, NOT_CLKB_PER); + `else + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + `endif + + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $width(posedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH); + $width(negedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL); + `else + $width(posedge CLKA &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH); + $width(negedge CLKA &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL); + `endif + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $width(posedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH); + $width(negedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL); + `else + $width(posedge CLKB &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH); + $width(negedge CLKB &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL); + `endif + + + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1, posedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1, negedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1, posedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1, negedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp, posedge DB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp, posedge DB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp, posedge DB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp, posedge DB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp, posedge DB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp, posedge DB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp, posedge DB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp, posedge DB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp, posedge DB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp, posedge DB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp, posedge DB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp, posedge DB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp, posedge DB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp, posedge DB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp, posedge DB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp, posedge DB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp, posedge DB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp, posedge DB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp, posedge DB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp, posedge DB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp, posedge DB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp, posedge DB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp, posedge DB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp, posedge DB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp, posedge DB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp, posedge DB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp, posedge DB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp, posedge DB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp, posedge DB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp, posedge DB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp, posedge DB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp, posedge DB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp, posedge DB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp, posedge DB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp, posedge DB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp, posedge DB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp, posedge DB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp, posedge DB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp, posedge DB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp, posedge DB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp, posedge DB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp, posedge DB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp, posedge DB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp, posedge DB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp, posedge DB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp, posedge DB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp, posedge DB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp, posedge DB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp, posedge DB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp, posedge DB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp, posedge DB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp, posedge DB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp, posedge DB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp, posedge DB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp, posedge DB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp, posedge DB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp, posedge DB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp, posedge DB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp, posedge DB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp, posedge DB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp, posedge DB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp, posedge DB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp, posedge DB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp, posedge DB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp, posedge DB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp, posedge DB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp, posedge DB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp, posedge DB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp, posedge DB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp, posedge DB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp, posedge DB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp, posedge DB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp, posedge DB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp, posedge DB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp, posedge DB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp, posedge DB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp, posedge DB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp, posedge DB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp, posedge DB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp, posedge DB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp, posedge DB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp, posedge DB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp, posedge DB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp, posedge DB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp, posedge DB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp, posedge DB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp, posedge DB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp, posedge DB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp, posedge DB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp, posedge DB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp, posedge DB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp, posedge DB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp, posedge DB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp, posedge DB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp, posedge DB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp, posedge DB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp, posedge DB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp, posedge DB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp, posedge DB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp, posedge DB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp, posedge DB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp, posedge DB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp, posedge DB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp, posedge DB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp, posedge DB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp, posedge DB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp, posedge DB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp, posedge DB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp, posedge DB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp, posedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp, posedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp, posedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp, posedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp, posedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp, posedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp, posedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp, posedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp, posedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp, posedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp, posedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp, posedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp, posedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp, posedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp, posedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp, posedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp, posedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp, posedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp, posedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp, negedge DB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp, negedge DB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp, negedge DB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp, negedge DB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp, negedge DB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp, negedge DB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp, negedge DB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp, negedge DB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp, negedge DB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp, negedge DB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp, negedge DB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp, negedge DB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp, negedge DB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp, negedge DB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp, negedge DB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp, negedge DB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp, negedge DB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp, negedge DB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp, negedge DB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp, negedge DB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp, negedge DB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp, negedge DB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp, negedge DB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp, negedge DB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp, negedge DB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp, negedge DB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp, negedge DB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp, negedge DB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp, negedge DB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp, negedge DB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp, negedge DB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp, negedge DB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp, negedge DB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp, negedge DB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp, negedge DB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp, negedge DB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp, negedge DB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp, negedge DB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp, negedge DB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp, negedge DB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp, negedge DB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp, negedge DB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp, negedge DB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp, negedge DB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp, negedge DB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp, negedge DB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp, negedge DB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp, negedge DB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp, negedge DB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp, negedge DB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp, negedge DB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp, negedge DB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp, negedge DB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp, negedge DB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp, negedge DB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp, negedge DB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp, negedge DB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp, negedge DB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp, negedge DB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp, negedge DB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp, negedge DB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp, negedge DB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp, negedge DB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp, negedge DB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp, negedge DB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp, negedge DB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp, negedge DB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp, negedge DB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp, negedge DB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp, negedge DB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp, negedge DB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp, negedge DB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp, negedge DB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp, negedge DB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp, negedge DB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp, negedge DB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp, negedge DB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp, negedge DB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp, negedge DB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp, negedge DB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp, negedge DB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp, negedge DB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp, negedge DB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp, negedge DB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp, negedge DB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp, negedge DB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp, negedge DB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp, negedge DB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp, negedge DB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp, negedge DB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp, negedge DB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp, negedge DB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp, negedge DB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp, negedge DB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp, negedge DB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp, negedge DB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp, negedge DB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp, negedge DB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp, negedge DB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp, negedge DB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp, negedge DB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp, negedge DB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp, negedge DB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp, negedge DB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp, negedge DB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp, negedge DB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp, negedge DB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp, negedge DB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp, negedge DB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp, negedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp, negedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp, negedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp, negedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp, negedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp, negedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp, negedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp, negedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp, negedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp, negedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp, negedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp, negedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp, negedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp, negedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp, negedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp, negedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp, negedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp, negedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp, negedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0); + $setuphold(posedge CLKA &&& RET1Neq1, posedge TENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge TENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0, posedge TCENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0, negedge TCENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKB &&& RET1Neq1, posedge TENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge TENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0, posedge TCENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0, negedge TCENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp, posedge TDB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp, posedge TDB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp, posedge TDB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp, posedge TDB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp, posedge TDB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp, posedge TDB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp, posedge TDB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp, posedge TDB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp, posedge TDB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp, posedge TDB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp, posedge TDB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp, posedge TDB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp, posedge TDB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp, posedge TDB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp, posedge TDB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp, posedge TDB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp, posedge TDB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp, posedge TDB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp, posedge TDB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp, posedge TDB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp, posedge TDB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp, posedge TDB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp, posedge TDB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp, posedge TDB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp, posedge TDB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp, posedge TDB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp, posedge TDB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp, posedge TDB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp, posedge TDB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp, posedge TDB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp, posedge TDB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp, posedge TDB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp, posedge TDB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp, posedge TDB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp, posedge TDB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp, posedge TDB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp, posedge TDB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp, posedge TDB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp, posedge TDB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp, posedge TDB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp, posedge TDB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp, posedge TDB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp, posedge TDB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp, posedge TDB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp, posedge TDB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp, posedge TDB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp, posedge TDB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp, posedge TDB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp, posedge TDB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp, posedge TDB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp, posedge TDB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp, posedge TDB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp, posedge TDB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp, posedge TDB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp, posedge TDB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp, posedge TDB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp, posedge TDB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp, posedge TDB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp, posedge TDB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp, posedge TDB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp, posedge TDB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp, posedge TDB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp, posedge TDB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp, posedge TDB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp, posedge TDB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp, posedge TDB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp, posedge TDB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp, posedge TDB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp, posedge TDB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp, posedge TDB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp, posedge TDB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp, posedge TDB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp, posedge TDB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp, posedge TDB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp, posedge TDB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp, posedge TDB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp, posedge TDB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp, posedge TDB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp, posedge TDB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp, posedge TDB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp, posedge TDB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp, posedge TDB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp, posedge TDB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp, posedge TDB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp, posedge TDB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp, posedge TDB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp, posedge TDB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp, posedge TDB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp, posedge TDB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp, posedge TDB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp, posedge TDB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp, posedge TDB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp, posedge TDB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp, posedge TDB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp, posedge TDB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp, posedge TDB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp, posedge TDB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp, posedge TDB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp, posedge TDB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp, posedge TDB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp, posedge TDB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp, posedge TDB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp, posedge TDB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp, posedge TDB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp, posedge TDB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp, posedge TDB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp, posedge TDB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp, posedge TDB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp, posedge TDB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp, posedge TDB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp, posedge TDB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp, posedge TDB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp, posedge TDB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp, posedge TDB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp, posedge TDB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp, posedge TDB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp, posedge TDB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp, posedge TDB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp, posedge TDB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp, posedge TDB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp, posedge TDB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp, posedge TDB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp, posedge TDB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp, posedge TDB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp, posedge TDB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp, posedge TDB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp, posedge TDB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp, posedge TDB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp, negedge TDB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp, negedge TDB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp, negedge TDB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp, negedge TDB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp, negedge TDB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp, negedge TDB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp, negedge TDB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp, negedge TDB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp, negedge TDB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp, negedge TDB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp, negedge TDB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp, negedge TDB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp, negedge TDB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp, negedge TDB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp, negedge TDB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp, negedge TDB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp, negedge TDB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp, negedge TDB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp, negedge TDB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp, negedge TDB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp, negedge TDB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp, negedge TDB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp, negedge TDB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp, negedge TDB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp, negedge TDB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp, negedge TDB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp, negedge TDB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp, negedge TDB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp, negedge TDB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp, negedge TDB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp, negedge TDB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp, negedge TDB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp, negedge TDB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp, negedge TDB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp, negedge TDB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp, negedge TDB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp, negedge TDB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp, negedge TDB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp, negedge TDB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp, negedge TDB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp, negedge TDB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp, negedge TDB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp, negedge TDB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp, negedge TDB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp, negedge TDB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp, negedge TDB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp, negedge TDB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp, negedge TDB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp, negedge TDB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp, negedge TDB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp, negedge TDB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp, negedge TDB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp, negedge TDB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp, negedge TDB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp, negedge TDB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp, negedge TDB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp, negedge TDB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp, negedge TDB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp, negedge TDB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp, negedge TDB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp, negedge TDB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp, negedge TDB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp, negedge TDB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp, negedge TDB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp, negedge TDB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp, negedge TDB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp, negedge TDB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp, negedge TDB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp, negedge TDB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp, negedge TDB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp, negedge TDB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp, negedge TDB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp, negedge TDB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp, negedge TDB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp, negedge TDB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp, negedge TDB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp, negedge TDB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp, negedge TDB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp, negedge TDB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp, negedge TDB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp, negedge TDB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp, negedge TDB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp, negedge TDB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp, negedge TDB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp, negedge TDB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp, negedge TDB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp, negedge TDB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp, negedge TDB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp, negedge TDB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp, negedge TDB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp, negedge TDB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp, negedge TDB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp, negedge TDB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp, negedge TDB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp, negedge TDB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp, negedge TDB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp, negedge TDB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp, negedge TDB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp, negedge TDB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp, negedge TDB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp, negedge TDB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp, negedge TDB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp, negedge TDB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp, negedge TDB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp, negedge TDB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp, negedge TDB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp, negedge TDB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp, negedge TDB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp, negedge TDB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp, negedge TDB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp, negedge TDB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp, negedge TDB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp, negedge TDB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp, negedge TDB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp, negedge TDB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp, negedge TDB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp, negedge TDB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp, negedge TDB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp, negedge TDB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp, negedge TDB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp, negedge TDB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp, negedge TDB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp, negedge TDB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp, negedge TDB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp, negedge TDB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp, negedge TDB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp, negedge TDB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp, negedge TDB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB0); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, posedge SIA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA1); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, posedge SIA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA0); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, negedge SIA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA1); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, negedge SIA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA0); + $setuphold(posedge CLKA &&& RET1Neq1, posedge SEA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge SEA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEA); + $setuphold(posedge CLKA &&& RET1Neq1, posedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKA); + $setuphold(posedge CLKB &&& RET1Neq1, posedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKB); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, posedge SIB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB1); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, posedge SIB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB0); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, negedge SIB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB1); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, negedge SIB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB0); + $setuphold(posedge CLKB &&& RET1Neq1, posedge SEB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge SEB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEB); + $setuphold(posedge CLKA &&& RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp, posedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKA &&& RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp, negedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKB &&& RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp, posedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKB &&& RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp, negedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(negedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge TCENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge TCENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge TCENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge TCENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge DFTRAMBYP, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge DFTRAMBYP, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, posedge DFTRAMBYP, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, posedge DFTRAMBYP, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + endspecify + + +endmodule +`endcelldefine + `endif + `else +// If ARM_UD_MODEL is defined at Simulator Command Line, it Selects the Fast Functional Model +`ifdef ARM_UD_MODEL + +// Following parameter Values can be overridden at Simulator Command Line. + +// ARM_UD_DP Defines the delay through Data Paths, for Memory Models it represents BIST MUX output delays. +`ifdef ARM_UD_DP +`else +`define ARM_UD_DP #0.001 +`endif +// ARM_UD_CP Defines the delay through Clock Path Cells, for Memory Models it is not used. +`ifdef ARM_UD_CP +`else +`define ARM_UD_CP +`endif +// ARM_UD_SEQ Defines the delay through the Memory, for Memory Models it is used for CLK->Q delays. +`ifdef ARM_UD_SEQ +`else +`define ARM_UD_SEQ #0.01 +`endif + +`celldefine +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS +module rf2_32x128_wm1 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, + SOB, CLKA, CENA, AA, CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, + TAA, TENB, TCENB, TWENB, TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x128_wm1 (CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, + CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TWENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + parameter ASSERT_PREFIX = ""; + parameter BITS = 128; + parameter WORDS = 32; + parameter MUX = 2; + parameter MEM_WIDTH = 256; // redun block size 2, 128 on left, 128 on right + parameter MEM_HEIGHT = 16; + parameter WP_SIZE = 1 ; + parameter UPM_WIDTH = 3; + parameter UPMW_WIDTH = 0; + parameter UPMS_WIDTH = 1; + + output CENYA; + output [4:0] AYA; + output CENYB; + output [127:0] WENYB; + output [4:0] AYB; + output [127:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [127:0] WENB; + input [4:0] AB; + input [127:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [127:0] TWENB; + input [4:0] TAB; + input [127:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + + reg pre_charge_st; + reg pre_charge_st_a; + reg pre_charge_st_b; + integer row_address; + integer mux_address; + initial row_address = 0; + initial mux_address = 0; + reg [255:0] mem [0:15]; + reg [255:0] row, row_t; + reg LAST_CLKA; + reg [255:0] row_mask; + reg [255:0] new_data; + reg [255:0] data_out; + reg [127:0] readLatch0; + reg [127:0] shifted_readLatch0; + reg read_mux_sel0_p2; + reg [127:0] readLatch1; + reg [127:0] shifted_readLatch1; + reg read_mux_sel1_p2; + reg LAST_CLKB; + reg [127:0] QA_int; + reg [127:0] partial_mask; + reg [127:0] writeEnable; + real previous_CLKA; + real previous_CLKB; + initial previous_CLKA = 0; + initial previous_CLKB = 0; + reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC; + reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1; + reg cont_flag0_int; + reg cont_flag1_int; + initial cont_flag0_int = 1'b0; + initial cont_flag1_int = 1'b0; + reg clk0_int; + reg clk1_int; + + wire CENYA_; + wire [4:0] AYA_; + wire CENYB_; + wire [127:0] WENYB_; + wire [4:0] AYB_; + wire [127:0] QA_; + wire [1:0] SOA_; + reg [1:0] SOA_int; + wire [1:0] SOB_; + reg [1:0] SOB_int; + wire CLKA_; + wire CENA_; + reg CENA_int; + reg CENA_p2; + wire [4:0] AA_; + reg [4:0] AA_int; + wire CLKB_; + wire CENB_; + reg CENB_int; + reg CENB_p2; + wire [127:0] WENB_; + reg [127:0] WENB_int; + wire [4:0] AB_; + reg [4:0] AB_int; + wire [127:0] DB_; + reg [127:0] DB_int; + reg [127:0] DB_int_sh; + reg [127:0] DB_int_sh_int; + wire [2:0] EMAA_; + reg [2:0] EMAA_int; + wire EMASA_; + reg EMASA_int; + wire [2:0] EMAB_; + reg [2:0] EMAB_int; + wire TENA_; + reg TENA_int; + wire TCENA_; + reg TCENA_int; + reg TCENA_p2; + wire [4:0] TAA_; + reg [4:0] TAA_int; + wire TENB_; + reg TENB_int; + wire TCENB_; + reg TCENB_int; + reg TCENB_p2; + wire [127:0] TWENB_; + reg [127:0] TWENB_int; + wire [4:0] TAB_; + reg [4:0] TAB_int; + wire [127:0] TDB_; + reg [127:0] TDB_int; + wire RET1N_; + reg RET1N_int; + wire [1:0] SIA_; + reg [1:0] SIA_int; + wire SEA_; + reg SEA_int; + wire DFTRAMBYP_; + reg DFTRAMBYP_int; + reg DFTRAMBYP_p2; + wire [1:0] SIB_; + reg [1:0] SIB_int; + wire SEB_; + reg SEB_int; + wire COLLDISN_; + reg COLLDISN_int; + + assign CENYA = CENYA_; + assign AYA[0] = AYA_[0]; + assign AYA[1] = AYA_[1]; + assign AYA[2] = AYA_[2]; + assign AYA[3] = AYA_[3]; + assign AYA[4] = AYA_[4]; + assign CENYB = CENYB_; + assign WENYB[0] = WENYB_[0]; + assign WENYB[1] = WENYB_[1]; + assign WENYB[2] = WENYB_[2]; + assign WENYB[3] = WENYB_[3]; + assign WENYB[4] = WENYB_[4]; + assign WENYB[5] = WENYB_[5]; + assign WENYB[6] = WENYB_[6]; + assign WENYB[7] = WENYB_[7]; + assign WENYB[8] = WENYB_[8]; + assign WENYB[9] = WENYB_[9]; + assign WENYB[10] = WENYB_[10]; + assign WENYB[11] = WENYB_[11]; + assign WENYB[12] = WENYB_[12]; + assign WENYB[13] = WENYB_[13]; + assign WENYB[14] = WENYB_[14]; + assign WENYB[15] = WENYB_[15]; + assign WENYB[16] = WENYB_[16]; + assign WENYB[17] = WENYB_[17]; + assign WENYB[18] = WENYB_[18]; + assign WENYB[19] = WENYB_[19]; + assign WENYB[20] = WENYB_[20]; + assign WENYB[21] = WENYB_[21]; + assign WENYB[22] = WENYB_[22]; + assign WENYB[23] = WENYB_[23]; + assign WENYB[24] = WENYB_[24]; + assign WENYB[25] = WENYB_[25]; + assign WENYB[26] = WENYB_[26]; + assign WENYB[27] = WENYB_[27]; + assign WENYB[28] = WENYB_[28]; + assign WENYB[29] = WENYB_[29]; + assign WENYB[30] = WENYB_[30]; + assign WENYB[31] = WENYB_[31]; + assign WENYB[32] = WENYB_[32]; + assign WENYB[33] = WENYB_[33]; + assign WENYB[34] = WENYB_[34]; + assign WENYB[35] = WENYB_[35]; + assign WENYB[36] = WENYB_[36]; + assign WENYB[37] = WENYB_[37]; + assign WENYB[38] = WENYB_[38]; + assign WENYB[39] = WENYB_[39]; + assign WENYB[40] = WENYB_[40]; + assign WENYB[41] = WENYB_[41]; + assign WENYB[42] = WENYB_[42]; + assign WENYB[43] = WENYB_[43]; + assign WENYB[44] = WENYB_[44]; + assign WENYB[45] = WENYB_[45]; + assign WENYB[46] = WENYB_[46]; + assign WENYB[47] = WENYB_[47]; + assign WENYB[48] = WENYB_[48]; + assign WENYB[49] = WENYB_[49]; + assign WENYB[50] = WENYB_[50]; + assign WENYB[51] = WENYB_[51]; + assign WENYB[52] = WENYB_[52]; + assign WENYB[53] = WENYB_[53]; + assign WENYB[54] = WENYB_[54]; + assign WENYB[55] = WENYB_[55]; + assign WENYB[56] = WENYB_[56]; + assign WENYB[57] = WENYB_[57]; + assign WENYB[58] = WENYB_[58]; + assign WENYB[59] = WENYB_[59]; + assign WENYB[60] = WENYB_[60]; + assign WENYB[61] = WENYB_[61]; + assign WENYB[62] = WENYB_[62]; + assign WENYB[63] = WENYB_[63]; + assign WENYB[64] = WENYB_[64]; + assign WENYB[65] = WENYB_[65]; + assign WENYB[66] = WENYB_[66]; + assign WENYB[67] = WENYB_[67]; + assign WENYB[68] = WENYB_[68]; + assign WENYB[69] = WENYB_[69]; + assign WENYB[70] = WENYB_[70]; + assign WENYB[71] = WENYB_[71]; + assign WENYB[72] = WENYB_[72]; + assign WENYB[73] = WENYB_[73]; + assign WENYB[74] = WENYB_[74]; + assign WENYB[75] = WENYB_[75]; + assign WENYB[76] = WENYB_[76]; + assign WENYB[77] = WENYB_[77]; + assign WENYB[78] = WENYB_[78]; + assign WENYB[79] = WENYB_[79]; + assign WENYB[80] = WENYB_[80]; + assign WENYB[81] = WENYB_[81]; + assign WENYB[82] = WENYB_[82]; + assign WENYB[83] = WENYB_[83]; + assign WENYB[84] = WENYB_[84]; + assign WENYB[85] = WENYB_[85]; + assign WENYB[86] = WENYB_[86]; + assign WENYB[87] = WENYB_[87]; + assign WENYB[88] = WENYB_[88]; + assign WENYB[89] = WENYB_[89]; + assign WENYB[90] = WENYB_[90]; + assign WENYB[91] = WENYB_[91]; + assign WENYB[92] = WENYB_[92]; + assign WENYB[93] = WENYB_[93]; + assign WENYB[94] = WENYB_[94]; + assign WENYB[95] = WENYB_[95]; + assign WENYB[96] = WENYB_[96]; + assign WENYB[97] = WENYB_[97]; + assign WENYB[98] = WENYB_[98]; + assign WENYB[99] = WENYB_[99]; + assign WENYB[100] = WENYB_[100]; + assign WENYB[101] = WENYB_[101]; + assign WENYB[102] = WENYB_[102]; + assign WENYB[103] = WENYB_[103]; + assign WENYB[104] = WENYB_[104]; + assign WENYB[105] = WENYB_[105]; + assign WENYB[106] = WENYB_[106]; + assign WENYB[107] = WENYB_[107]; + assign WENYB[108] = WENYB_[108]; + assign WENYB[109] = WENYB_[109]; + assign WENYB[110] = WENYB_[110]; + assign WENYB[111] = WENYB_[111]; + assign WENYB[112] = WENYB_[112]; + assign WENYB[113] = WENYB_[113]; + assign WENYB[114] = WENYB_[114]; + assign WENYB[115] = WENYB_[115]; + assign WENYB[116] = WENYB_[116]; + assign WENYB[117] = WENYB_[117]; + assign WENYB[118] = WENYB_[118]; + assign WENYB[119] = WENYB_[119]; + assign WENYB[120] = WENYB_[120]; + assign WENYB[121] = WENYB_[121]; + assign WENYB[122] = WENYB_[122]; + assign WENYB[123] = WENYB_[123]; + assign WENYB[124] = WENYB_[124]; + assign WENYB[125] = WENYB_[125]; + assign WENYB[126] = WENYB_[126]; + assign WENYB[127] = WENYB_[127]; + assign AYB[0] = AYB_[0]; + assign AYB[1] = AYB_[1]; + assign AYB[2] = AYB_[2]; + assign AYB[3] = AYB_[3]; + assign AYB[4] = AYB_[4]; + assign QA[0] = QA_[0]; + assign QA[1] = QA_[1]; + assign QA[2] = QA_[2]; + assign QA[3] = QA_[3]; + assign QA[4] = QA_[4]; + assign QA[5] = QA_[5]; + assign QA[6] = QA_[6]; + assign QA[7] = QA_[7]; + assign QA[8] = QA_[8]; + assign QA[9] = QA_[9]; + assign QA[10] = QA_[10]; + assign QA[11] = QA_[11]; + assign QA[12] = QA_[12]; + assign QA[13] = QA_[13]; + assign QA[14] = QA_[14]; + assign QA[15] = QA_[15]; + assign QA[16] = QA_[16]; + assign QA[17] = QA_[17]; + assign QA[18] = QA_[18]; + assign QA[19] = QA_[19]; + assign QA[20] = QA_[20]; + assign QA[21] = QA_[21]; + assign QA[22] = QA_[22]; + assign QA[23] = QA_[23]; + assign QA[24] = QA_[24]; + assign QA[25] = QA_[25]; + assign QA[26] = QA_[26]; + assign QA[27] = QA_[27]; + assign QA[28] = QA_[28]; + assign QA[29] = QA_[29]; + assign QA[30] = QA_[30]; + assign QA[31] = QA_[31]; + assign QA[32] = QA_[32]; + assign QA[33] = QA_[33]; + assign QA[34] = QA_[34]; + assign QA[35] = QA_[35]; + assign QA[36] = QA_[36]; + assign QA[37] = QA_[37]; + assign QA[38] = QA_[38]; + assign QA[39] = QA_[39]; + assign QA[40] = QA_[40]; + assign QA[41] = QA_[41]; + assign QA[42] = QA_[42]; + assign QA[43] = QA_[43]; + assign QA[44] = QA_[44]; + assign QA[45] = QA_[45]; + assign QA[46] = QA_[46]; + assign QA[47] = QA_[47]; + assign QA[48] = QA_[48]; + assign QA[49] = QA_[49]; + assign QA[50] = QA_[50]; + assign QA[51] = QA_[51]; + assign QA[52] = QA_[52]; + assign QA[53] = QA_[53]; + assign QA[54] = QA_[54]; + assign QA[55] = QA_[55]; + assign QA[56] = QA_[56]; + assign QA[57] = QA_[57]; + assign QA[58] = QA_[58]; + assign QA[59] = QA_[59]; + assign QA[60] = QA_[60]; + assign QA[61] = QA_[61]; + assign QA[62] = QA_[62]; + assign QA[63] = QA_[63]; + assign QA[64] = QA_[64]; + assign QA[65] = QA_[65]; + assign QA[66] = QA_[66]; + assign QA[67] = QA_[67]; + assign QA[68] = QA_[68]; + assign QA[69] = QA_[69]; + assign QA[70] = QA_[70]; + assign QA[71] = QA_[71]; + assign QA[72] = QA_[72]; + assign QA[73] = QA_[73]; + assign QA[74] = QA_[74]; + assign QA[75] = QA_[75]; + assign QA[76] = QA_[76]; + assign QA[77] = QA_[77]; + assign QA[78] = QA_[78]; + assign QA[79] = QA_[79]; + assign QA[80] = QA_[80]; + assign QA[81] = QA_[81]; + assign QA[82] = QA_[82]; + assign QA[83] = QA_[83]; + assign QA[84] = QA_[84]; + assign QA[85] = QA_[85]; + assign QA[86] = QA_[86]; + assign QA[87] = QA_[87]; + assign QA[88] = QA_[88]; + assign QA[89] = QA_[89]; + assign QA[90] = QA_[90]; + assign QA[91] = QA_[91]; + assign QA[92] = QA_[92]; + assign QA[93] = QA_[93]; + assign QA[94] = QA_[94]; + assign QA[95] = QA_[95]; + assign QA[96] = QA_[96]; + assign QA[97] = QA_[97]; + assign QA[98] = QA_[98]; + assign QA[99] = QA_[99]; + assign QA[100] = QA_[100]; + assign QA[101] = QA_[101]; + assign QA[102] = QA_[102]; + assign QA[103] = QA_[103]; + assign QA[104] = QA_[104]; + assign QA[105] = QA_[105]; + assign QA[106] = QA_[106]; + assign QA[107] = QA_[107]; + assign QA[108] = QA_[108]; + assign QA[109] = QA_[109]; + assign QA[110] = QA_[110]; + assign QA[111] = QA_[111]; + assign QA[112] = QA_[112]; + assign QA[113] = QA_[113]; + assign QA[114] = QA_[114]; + assign QA[115] = QA_[115]; + assign QA[116] = QA_[116]; + assign QA[117] = QA_[117]; + assign QA[118] = QA_[118]; + assign QA[119] = QA_[119]; + assign QA[120] = QA_[120]; + assign QA[121] = QA_[121]; + assign QA[122] = QA_[122]; + assign QA[123] = QA_[123]; + assign QA[124] = QA_[124]; + assign QA[125] = QA_[125]; + assign QA[126] = QA_[126]; + assign QA[127] = QA_[127]; + assign SOA[0] = SOA_[0]; + assign SOA[1] = SOA_[1]; + assign SOB[0] = SOB_[0]; + assign SOB[1] = SOB_[1]; + assign CLKA_ = CLKA; + assign CENA_ = CENA; + assign AA_[0] = AA[0]; + assign AA_[1] = AA[1]; + assign AA_[2] = AA[2]; + assign AA_[3] = AA[3]; + assign AA_[4] = AA[4]; + assign CLKB_ = CLKB; + assign CENB_ = CENB; + assign WENB_[0] = WENB[0]; + assign WENB_[1] = WENB[1]; + assign WENB_[2] = WENB[2]; + assign WENB_[3] = WENB[3]; + assign WENB_[4] = WENB[4]; + assign WENB_[5] = WENB[5]; + assign WENB_[6] = WENB[6]; + assign WENB_[7] = WENB[7]; + assign WENB_[8] = WENB[8]; + assign WENB_[9] = WENB[9]; + assign WENB_[10] = WENB[10]; + assign WENB_[11] = WENB[11]; + assign WENB_[12] = WENB[12]; + assign WENB_[13] = WENB[13]; + assign WENB_[14] = WENB[14]; + assign WENB_[15] = WENB[15]; + assign WENB_[16] = WENB[16]; + assign WENB_[17] = WENB[17]; + assign WENB_[18] = WENB[18]; + assign WENB_[19] = WENB[19]; + assign WENB_[20] = WENB[20]; + assign WENB_[21] = WENB[21]; + assign WENB_[22] = WENB[22]; + assign WENB_[23] = WENB[23]; + assign WENB_[24] = WENB[24]; + assign WENB_[25] = WENB[25]; + assign WENB_[26] = WENB[26]; + assign WENB_[27] = WENB[27]; + assign WENB_[28] = WENB[28]; + assign WENB_[29] = WENB[29]; + assign WENB_[30] = WENB[30]; + assign WENB_[31] = WENB[31]; + assign WENB_[32] = WENB[32]; + assign WENB_[33] = WENB[33]; + assign WENB_[34] = WENB[34]; + assign WENB_[35] = WENB[35]; + assign WENB_[36] = WENB[36]; + assign WENB_[37] = WENB[37]; + assign WENB_[38] = WENB[38]; + assign WENB_[39] = WENB[39]; + assign WENB_[40] = WENB[40]; + assign WENB_[41] = WENB[41]; + assign WENB_[42] = WENB[42]; + assign WENB_[43] = WENB[43]; + assign WENB_[44] = WENB[44]; + assign WENB_[45] = WENB[45]; + assign WENB_[46] = WENB[46]; + assign WENB_[47] = WENB[47]; + assign WENB_[48] = WENB[48]; + assign WENB_[49] = WENB[49]; + assign WENB_[50] = WENB[50]; + assign WENB_[51] = WENB[51]; + assign WENB_[52] = WENB[52]; + assign WENB_[53] = WENB[53]; + assign WENB_[54] = WENB[54]; + assign WENB_[55] = WENB[55]; + assign WENB_[56] = WENB[56]; + assign WENB_[57] = WENB[57]; + assign WENB_[58] = WENB[58]; + assign WENB_[59] = WENB[59]; + assign WENB_[60] = WENB[60]; + assign WENB_[61] = WENB[61]; + assign WENB_[62] = WENB[62]; + assign WENB_[63] = WENB[63]; + assign WENB_[64] = WENB[64]; + assign WENB_[65] = WENB[65]; + assign WENB_[66] = WENB[66]; + assign WENB_[67] = WENB[67]; + assign WENB_[68] = WENB[68]; + assign WENB_[69] = WENB[69]; + assign WENB_[70] = WENB[70]; + assign WENB_[71] = WENB[71]; + assign WENB_[72] = WENB[72]; + assign WENB_[73] = WENB[73]; + assign WENB_[74] = WENB[74]; + assign WENB_[75] = WENB[75]; + assign WENB_[76] = WENB[76]; + assign WENB_[77] = WENB[77]; + assign WENB_[78] = WENB[78]; + assign WENB_[79] = WENB[79]; + assign WENB_[80] = WENB[80]; + assign WENB_[81] = WENB[81]; + assign WENB_[82] = WENB[82]; + assign WENB_[83] = WENB[83]; + assign WENB_[84] = WENB[84]; + assign WENB_[85] = WENB[85]; + assign WENB_[86] = WENB[86]; + assign WENB_[87] = WENB[87]; + assign WENB_[88] = WENB[88]; + assign WENB_[89] = WENB[89]; + assign WENB_[90] = WENB[90]; + assign WENB_[91] = WENB[91]; + assign WENB_[92] = WENB[92]; + assign WENB_[93] = WENB[93]; + assign WENB_[94] = WENB[94]; + assign WENB_[95] = WENB[95]; + assign WENB_[96] = WENB[96]; + assign WENB_[97] = WENB[97]; + assign WENB_[98] = WENB[98]; + assign WENB_[99] = WENB[99]; + assign WENB_[100] = WENB[100]; + assign WENB_[101] = WENB[101]; + assign WENB_[102] = WENB[102]; + assign WENB_[103] = WENB[103]; + assign WENB_[104] = WENB[104]; + assign WENB_[105] = WENB[105]; + assign WENB_[106] = WENB[106]; + assign WENB_[107] = WENB[107]; + assign WENB_[108] = WENB[108]; + assign WENB_[109] = WENB[109]; + assign WENB_[110] = WENB[110]; + assign WENB_[111] = WENB[111]; + assign WENB_[112] = WENB[112]; + assign WENB_[113] = WENB[113]; + assign WENB_[114] = WENB[114]; + assign WENB_[115] = WENB[115]; + assign WENB_[116] = WENB[116]; + assign WENB_[117] = WENB[117]; + assign WENB_[118] = WENB[118]; + assign WENB_[119] = WENB[119]; + assign WENB_[120] = WENB[120]; + assign WENB_[121] = WENB[121]; + assign WENB_[122] = WENB[122]; + assign WENB_[123] = WENB[123]; + assign WENB_[124] = WENB[124]; + assign WENB_[125] = WENB[125]; + assign WENB_[126] = WENB[126]; + assign WENB_[127] = WENB[127]; + assign AB_[0] = AB[0]; + assign AB_[1] = AB[1]; + assign AB_[2] = AB[2]; + assign AB_[3] = AB[3]; + assign AB_[4] = AB[4]; + assign DB_[0] = DB[0]; + assign DB_[1] = DB[1]; + assign DB_[2] = DB[2]; + assign DB_[3] = DB[3]; + assign DB_[4] = DB[4]; + assign DB_[5] = DB[5]; + assign DB_[6] = DB[6]; + assign DB_[7] = DB[7]; + assign DB_[8] = DB[8]; + assign DB_[9] = DB[9]; + assign DB_[10] = DB[10]; + assign DB_[11] = DB[11]; + assign DB_[12] = DB[12]; + assign DB_[13] = DB[13]; + assign DB_[14] = DB[14]; + assign DB_[15] = DB[15]; + assign DB_[16] = DB[16]; + assign DB_[17] = DB[17]; + assign DB_[18] = DB[18]; + assign DB_[19] = DB[19]; + assign DB_[20] = DB[20]; + assign DB_[21] = DB[21]; + assign DB_[22] = DB[22]; + assign DB_[23] = DB[23]; + assign DB_[24] = DB[24]; + assign DB_[25] = DB[25]; + assign DB_[26] = DB[26]; + assign DB_[27] = DB[27]; + assign DB_[28] = DB[28]; + assign DB_[29] = DB[29]; + assign DB_[30] = DB[30]; + assign DB_[31] = DB[31]; + assign DB_[32] = DB[32]; + assign DB_[33] = DB[33]; + assign DB_[34] = DB[34]; + assign DB_[35] = DB[35]; + assign DB_[36] = DB[36]; + assign DB_[37] = DB[37]; + assign DB_[38] = DB[38]; + assign DB_[39] = DB[39]; + assign DB_[40] = DB[40]; + assign DB_[41] = DB[41]; + assign DB_[42] = DB[42]; + assign DB_[43] = DB[43]; + assign DB_[44] = DB[44]; + assign DB_[45] = DB[45]; + assign DB_[46] = DB[46]; + assign DB_[47] = DB[47]; + assign DB_[48] = DB[48]; + assign DB_[49] = DB[49]; + assign DB_[50] = DB[50]; + assign DB_[51] = DB[51]; + assign DB_[52] = DB[52]; + assign DB_[53] = DB[53]; + assign DB_[54] = DB[54]; + assign DB_[55] = DB[55]; + assign DB_[56] = DB[56]; + assign DB_[57] = DB[57]; + assign DB_[58] = DB[58]; + assign DB_[59] = DB[59]; + assign DB_[60] = DB[60]; + assign DB_[61] = DB[61]; + assign DB_[62] = DB[62]; + assign DB_[63] = DB[63]; + assign DB_[64] = DB[64]; + assign DB_[65] = DB[65]; + assign DB_[66] = DB[66]; + assign DB_[67] = DB[67]; + assign DB_[68] = DB[68]; + assign DB_[69] = DB[69]; + assign DB_[70] = DB[70]; + assign DB_[71] = DB[71]; + assign DB_[72] = DB[72]; + assign DB_[73] = DB[73]; + assign DB_[74] = DB[74]; + assign DB_[75] = DB[75]; + assign DB_[76] = DB[76]; + assign DB_[77] = DB[77]; + assign DB_[78] = DB[78]; + assign DB_[79] = DB[79]; + assign DB_[80] = DB[80]; + assign DB_[81] = DB[81]; + assign DB_[82] = DB[82]; + assign DB_[83] = DB[83]; + assign DB_[84] = DB[84]; + assign DB_[85] = DB[85]; + assign DB_[86] = DB[86]; + assign DB_[87] = DB[87]; + assign DB_[88] = DB[88]; + assign DB_[89] = DB[89]; + assign DB_[90] = DB[90]; + assign DB_[91] = DB[91]; + assign DB_[92] = DB[92]; + assign DB_[93] = DB[93]; + assign DB_[94] = DB[94]; + assign DB_[95] = DB[95]; + assign DB_[96] = DB[96]; + assign DB_[97] = DB[97]; + assign DB_[98] = DB[98]; + assign DB_[99] = DB[99]; + assign DB_[100] = DB[100]; + assign DB_[101] = DB[101]; + assign DB_[102] = DB[102]; + assign DB_[103] = DB[103]; + assign DB_[104] = DB[104]; + assign DB_[105] = DB[105]; + assign DB_[106] = DB[106]; + assign DB_[107] = DB[107]; + assign DB_[108] = DB[108]; + assign DB_[109] = DB[109]; + assign DB_[110] = DB[110]; + assign DB_[111] = DB[111]; + assign DB_[112] = DB[112]; + assign DB_[113] = DB[113]; + assign DB_[114] = DB[114]; + assign DB_[115] = DB[115]; + assign DB_[116] = DB[116]; + assign DB_[117] = DB[117]; + assign DB_[118] = DB[118]; + assign DB_[119] = DB[119]; + assign DB_[120] = DB[120]; + assign DB_[121] = DB[121]; + assign DB_[122] = DB[122]; + assign DB_[123] = DB[123]; + assign DB_[124] = DB[124]; + assign DB_[125] = DB[125]; + assign DB_[126] = DB[126]; + assign DB_[127] = DB[127]; + assign EMAA_[0] = EMAA[0]; + assign EMAA_[1] = EMAA[1]; + assign EMAA_[2] = EMAA[2]; + assign EMASA_ = EMASA; + assign EMAB_[0] = EMAB[0]; + assign EMAB_[1] = EMAB[1]; + assign EMAB_[2] = EMAB[2]; + assign TENA_ = TENA; + assign TCENA_ = TCENA; + assign TAA_[0] = TAA[0]; + assign TAA_[1] = TAA[1]; + assign TAA_[2] = TAA[2]; + assign TAA_[3] = TAA[3]; + assign TAA_[4] = TAA[4]; + assign TENB_ = TENB; + assign TCENB_ = TCENB; + assign TWENB_[0] = TWENB[0]; + assign TWENB_[1] = TWENB[1]; + assign TWENB_[2] = TWENB[2]; + assign TWENB_[3] = TWENB[3]; + assign TWENB_[4] = TWENB[4]; + assign TWENB_[5] = TWENB[5]; + assign TWENB_[6] = TWENB[6]; + assign TWENB_[7] = TWENB[7]; + assign TWENB_[8] = TWENB[8]; + assign TWENB_[9] = TWENB[9]; + assign TWENB_[10] = TWENB[10]; + assign TWENB_[11] = TWENB[11]; + assign TWENB_[12] = TWENB[12]; + assign TWENB_[13] = TWENB[13]; + assign TWENB_[14] = TWENB[14]; + assign TWENB_[15] = TWENB[15]; + assign TWENB_[16] = TWENB[16]; + assign TWENB_[17] = TWENB[17]; + assign TWENB_[18] = TWENB[18]; + assign TWENB_[19] = TWENB[19]; + assign TWENB_[20] = TWENB[20]; + assign TWENB_[21] = TWENB[21]; + assign TWENB_[22] = TWENB[22]; + assign TWENB_[23] = TWENB[23]; + assign TWENB_[24] = TWENB[24]; + assign TWENB_[25] = TWENB[25]; + assign TWENB_[26] = TWENB[26]; + assign TWENB_[27] = TWENB[27]; + assign TWENB_[28] = TWENB[28]; + assign TWENB_[29] = TWENB[29]; + assign TWENB_[30] = TWENB[30]; + assign TWENB_[31] = TWENB[31]; + assign TWENB_[32] = TWENB[32]; + assign TWENB_[33] = TWENB[33]; + assign TWENB_[34] = TWENB[34]; + assign TWENB_[35] = TWENB[35]; + assign TWENB_[36] = TWENB[36]; + assign TWENB_[37] = TWENB[37]; + assign TWENB_[38] = TWENB[38]; + assign TWENB_[39] = TWENB[39]; + assign TWENB_[40] = TWENB[40]; + assign TWENB_[41] = TWENB[41]; + assign TWENB_[42] = TWENB[42]; + assign TWENB_[43] = TWENB[43]; + assign TWENB_[44] = TWENB[44]; + assign TWENB_[45] = TWENB[45]; + assign TWENB_[46] = TWENB[46]; + assign TWENB_[47] = TWENB[47]; + assign TWENB_[48] = TWENB[48]; + assign TWENB_[49] = TWENB[49]; + assign TWENB_[50] = TWENB[50]; + assign TWENB_[51] = TWENB[51]; + assign TWENB_[52] = TWENB[52]; + assign TWENB_[53] = TWENB[53]; + assign TWENB_[54] = TWENB[54]; + assign TWENB_[55] = TWENB[55]; + assign TWENB_[56] = TWENB[56]; + assign TWENB_[57] = TWENB[57]; + assign TWENB_[58] = TWENB[58]; + assign TWENB_[59] = TWENB[59]; + assign TWENB_[60] = TWENB[60]; + assign TWENB_[61] = TWENB[61]; + assign TWENB_[62] = TWENB[62]; + assign TWENB_[63] = TWENB[63]; + assign TWENB_[64] = TWENB[64]; + assign TWENB_[65] = TWENB[65]; + assign TWENB_[66] = TWENB[66]; + assign TWENB_[67] = TWENB[67]; + assign TWENB_[68] = TWENB[68]; + assign TWENB_[69] = TWENB[69]; + assign TWENB_[70] = TWENB[70]; + assign TWENB_[71] = TWENB[71]; + assign TWENB_[72] = TWENB[72]; + assign TWENB_[73] = TWENB[73]; + assign TWENB_[74] = TWENB[74]; + assign TWENB_[75] = TWENB[75]; + assign TWENB_[76] = TWENB[76]; + assign TWENB_[77] = TWENB[77]; + assign TWENB_[78] = TWENB[78]; + assign TWENB_[79] = TWENB[79]; + assign TWENB_[80] = TWENB[80]; + assign TWENB_[81] = TWENB[81]; + assign TWENB_[82] = TWENB[82]; + assign TWENB_[83] = TWENB[83]; + assign TWENB_[84] = TWENB[84]; + assign TWENB_[85] = TWENB[85]; + assign TWENB_[86] = TWENB[86]; + assign TWENB_[87] = TWENB[87]; + assign TWENB_[88] = TWENB[88]; + assign TWENB_[89] = TWENB[89]; + assign TWENB_[90] = TWENB[90]; + assign TWENB_[91] = TWENB[91]; + assign TWENB_[92] = TWENB[92]; + assign TWENB_[93] = TWENB[93]; + assign TWENB_[94] = TWENB[94]; + assign TWENB_[95] = TWENB[95]; + assign TWENB_[96] = TWENB[96]; + assign TWENB_[97] = TWENB[97]; + assign TWENB_[98] = TWENB[98]; + assign TWENB_[99] = TWENB[99]; + assign TWENB_[100] = TWENB[100]; + assign TWENB_[101] = TWENB[101]; + assign TWENB_[102] = TWENB[102]; + assign TWENB_[103] = TWENB[103]; + assign TWENB_[104] = TWENB[104]; + assign TWENB_[105] = TWENB[105]; + assign TWENB_[106] = TWENB[106]; + assign TWENB_[107] = TWENB[107]; + assign TWENB_[108] = TWENB[108]; + assign TWENB_[109] = TWENB[109]; + assign TWENB_[110] = TWENB[110]; + assign TWENB_[111] = TWENB[111]; + assign TWENB_[112] = TWENB[112]; + assign TWENB_[113] = TWENB[113]; + assign TWENB_[114] = TWENB[114]; + assign TWENB_[115] = TWENB[115]; + assign TWENB_[116] = TWENB[116]; + assign TWENB_[117] = TWENB[117]; + assign TWENB_[118] = TWENB[118]; + assign TWENB_[119] = TWENB[119]; + assign TWENB_[120] = TWENB[120]; + assign TWENB_[121] = TWENB[121]; + assign TWENB_[122] = TWENB[122]; + assign TWENB_[123] = TWENB[123]; + assign TWENB_[124] = TWENB[124]; + assign TWENB_[125] = TWENB[125]; + assign TWENB_[126] = TWENB[126]; + assign TWENB_[127] = TWENB[127]; + assign TAB_[0] = TAB[0]; + assign TAB_[1] = TAB[1]; + assign TAB_[2] = TAB[2]; + assign TAB_[3] = TAB[3]; + assign TAB_[4] = TAB[4]; + assign TDB_[0] = TDB[0]; + assign TDB_[1] = TDB[1]; + assign TDB_[2] = TDB[2]; + assign TDB_[3] = TDB[3]; + assign TDB_[4] = TDB[4]; + assign TDB_[5] = TDB[5]; + assign TDB_[6] = TDB[6]; + assign TDB_[7] = TDB[7]; + assign TDB_[8] = TDB[8]; + assign TDB_[9] = TDB[9]; + assign TDB_[10] = TDB[10]; + assign TDB_[11] = TDB[11]; + assign TDB_[12] = TDB[12]; + assign TDB_[13] = TDB[13]; + assign TDB_[14] = TDB[14]; + assign TDB_[15] = TDB[15]; + assign TDB_[16] = TDB[16]; + assign TDB_[17] = TDB[17]; + assign TDB_[18] = TDB[18]; + assign TDB_[19] = TDB[19]; + assign TDB_[20] = TDB[20]; + assign TDB_[21] = TDB[21]; + assign TDB_[22] = TDB[22]; + assign TDB_[23] = TDB[23]; + assign TDB_[24] = TDB[24]; + assign TDB_[25] = TDB[25]; + assign TDB_[26] = TDB[26]; + assign TDB_[27] = TDB[27]; + assign TDB_[28] = TDB[28]; + assign TDB_[29] = TDB[29]; + assign TDB_[30] = TDB[30]; + assign TDB_[31] = TDB[31]; + assign TDB_[32] = TDB[32]; + assign TDB_[33] = TDB[33]; + assign TDB_[34] = TDB[34]; + assign TDB_[35] = TDB[35]; + assign TDB_[36] = TDB[36]; + assign TDB_[37] = TDB[37]; + assign TDB_[38] = TDB[38]; + assign TDB_[39] = TDB[39]; + assign TDB_[40] = TDB[40]; + assign TDB_[41] = TDB[41]; + assign TDB_[42] = TDB[42]; + assign TDB_[43] = TDB[43]; + assign TDB_[44] = TDB[44]; + assign TDB_[45] = TDB[45]; + assign TDB_[46] = TDB[46]; + assign TDB_[47] = TDB[47]; + assign TDB_[48] = TDB[48]; + assign TDB_[49] = TDB[49]; + assign TDB_[50] = TDB[50]; + assign TDB_[51] = TDB[51]; + assign TDB_[52] = TDB[52]; + assign TDB_[53] = TDB[53]; + assign TDB_[54] = TDB[54]; + assign TDB_[55] = TDB[55]; + assign TDB_[56] = TDB[56]; + assign TDB_[57] = TDB[57]; + assign TDB_[58] = TDB[58]; + assign TDB_[59] = TDB[59]; + assign TDB_[60] = TDB[60]; + assign TDB_[61] = TDB[61]; + assign TDB_[62] = TDB[62]; + assign TDB_[63] = TDB[63]; + assign TDB_[64] = TDB[64]; + assign TDB_[65] = TDB[65]; + assign TDB_[66] = TDB[66]; + assign TDB_[67] = TDB[67]; + assign TDB_[68] = TDB[68]; + assign TDB_[69] = TDB[69]; + assign TDB_[70] = TDB[70]; + assign TDB_[71] = TDB[71]; + assign TDB_[72] = TDB[72]; + assign TDB_[73] = TDB[73]; + assign TDB_[74] = TDB[74]; + assign TDB_[75] = TDB[75]; + assign TDB_[76] = TDB[76]; + assign TDB_[77] = TDB[77]; + assign TDB_[78] = TDB[78]; + assign TDB_[79] = TDB[79]; + assign TDB_[80] = TDB[80]; + assign TDB_[81] = TDB[81]; + assign TDB_[82] = TDB[82]; + assign TDB_[83] = TDB[83]; + assign TDB_[84] = TDB[84]; + assign TDB_[85] = TDB[85]; + assign TDB_[86] = TDB[86]; + assign TDB_[87] = TDB[87]; + assign TDB_[88] = TDB[88]; + assign TDB_[89] = TDB[89]; + assign TDB_[90] = TDB[90]; + assign TDB_[91] = TDB[91]; + assign TDB_[92] = TDB[92]; + assign TDB_[93] = TDB[93]; + assign TDB_[94] = TDB[94]; + assign TDB_[95] = TDB[95]; + assign TDB_[96] = TDB[96]; + assign TDB_[97] = TDB[97]; + assign TDB_[98] = TDB[98]; + assign TDB_[99] = TDB[99]; + assign TDB_[100] = TDB[100]; + assign TDB_[101] = TDB[101]; + assign TDB_[102] = TDB[102]; + assign TDB_[103] = TDB[103]; + assign TDB_[104] = TDB[104]; + assign TDB_[105] = TDB[105]; + assign TDB_[106] = TDB[106]; + assign TDB_[107] = TDB[107]; + assign TDB_[108] = TDB[108]; + assign TDB_[109] = TDB[109]; + assign TDB_[110] = TDB[110]; + assign TDB_[111] = TDB[111]; + assign TDB_[112] = TDB[112]; + assign TDB_[113] = TDB[113]; + assign TDB_[114] = TDB[114]; + assign TDB_[115] = TDB[115]; + assign TDB_[116] = TDB[116]; + assign TDB_[117] = TDB[117]; + assign TDB_[118] = TDB[118]; + assign TDB_[119] = TDB[119]; + assign TDB_[120] = TDB[120]; + assign TDB_[121] = TDB[121]; + assign TDB_[122] = TDB[122]; + assign TDB_[123] = TDB[123]; + assign TDB_[124] = TDB[124]; + assign TDB_[125] = TDB[125]; + assign TDB_[126] = TDB[126]; + assign TDB_[127] = TDB[127]; + assign RET1N_ = RET1N; + assign SIA_[0] = SIA[0]; + assign SIA_[1] = SIA[1]; + assign SEA_ = SEA; + assign DFTRAMBYP_ = DFTRAMBYP; + assign SIB_[0] = SIB[0]; + assign SIB_[1] = SIB[1]; + assign SEB_ = SEB; + assign COLLDISN_ = COLLDISN; + + assign `ARM_UD_DP CENYA_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENA_ ? CENA_ : TCENA_)) : 1'bx; + assign `ARM_UD_DP AYA_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENA_ ? AA_ : TAA_)) : {5{1'bx}}; + assign `ARM_UD_DP CENYB_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENB_ ? CENB_ : TCENB_)) : 1'bx; + assign `ARM_UD_DP WENYB_ = (RET1N_ | pre_charge_st) ? ({128{DFTRAMBYP_}} & (TENB_ ? WENB_ : TWENB_)) : {128{1'bx}}; + assign `ARM_UD_DP AYB_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENB_ ? AB_ : TAB_)) : {5{1'bx}}; + assign `ARM_UD_SEQ QA_ = (RET1N_ | pre_charge_st) ? ((QA_int)) : {128{1'bx}}; + assign `ARM_UD_DP SOA_ = (RET1N_ | pre_charge_st) ? ({QA_[127], QA_[0]}) : {2{1'bx}}; + assign `ARM_UD_DP SOB_ = (RET1N_ | pre_charge_st) ? (SOB_int) : {2{1'bx}}; + +// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS. +`ifdef INITIALIZE_MEMORY + integer i; + initial begin + #0; + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'b0}}; + end +`endif + always @ (EMAA_) begin + if(EMAA_ < 3) + $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time); + end + always @ (EMASA_) begin + if(EMASA_ < 0) + $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time); + end + always @ (EMAB_) begin + if(EMAB_ < 3) + $display("Warning: Set Value for EMAB doesn't match Default value 3 in %m at %0t", $time); + end + + task failedWrite; + input port_f; + integer i; + begin + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'bx}}; + end + endtask + + function isBitX; + input bitval; + begin + isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0; + end + endfunction + + function isBit1; + input bitval; + begin + isBit1 = ( bitval===1'b1 ) ? 1'b1 : 1'b0; + end + endfunction + + +task loadmem; + input [1000*8-1:0] filename; + reg [BITS-1:0] memld [0:WORDS-1]; + integer i; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + $readmemb(filename, memld); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[127], 1'b0, wordtemp[126], 1'b0, wordtemp[125], + 1'b0, wordtemp[124], 1'b0, wordtemp[123], 1'b0, wordtemp[122], 1'b0, wordtemp[121], + 1'b0, wordtemp[120], 1'b0, wordtemp[119], 1'b0, wordtemp[118], 1'b0, wordtemp[117], + 1'b0, wordtemp[116], 1'b0, wordtemp[115], 1'b0, wordtemp[114], 1'b0, wordtemp[113], + 1'b0, wordtemp[112], 1'b0, wordtemp[111], 1'b0, wordtemp[110], 1'b0, wordtemp[109], + 1'b0, wordtemp[108], 1'b0, wordtemp[107], 1'b0, wordtemp[106], 1'b0, wordtemp[105], + 1'b0, wordtemp[104], 1'b0, wordtemp[103], 1'b0, wordtemp[102], 1'b0, wordtemp[101], + 1'b0, wordtemp[100], 1'b0, wordtemp[99], 1'b0, wordtemp[98], 1'b0, wordtemp[97], + 1'b0, wordtemp[96], 1'b0, wordtemp[95], 1'b0, wordtemp[94], 1'b0, wordtemp[93], + 1'b0, wordtemp[92], 1'b0, wordtemp[91], 1'b0, wordtemp[90], 1'b0, wordtemp[89], + 1'b0, wordtemp[88], 1'b0, wordtemp[87], 1'b0, wordtemp[86], 1'b0, wordtemp[85], + 1'b0, wordtemp[84], 1'b0, wordtemp[83], 1'b0, wordtemp[82], 1'b0, wordtemp[81], + 1'b0, wordtemp[80], 1'b0, wordtemp[79], 1'b0, wordtemp[78], 1'b0, wordtemp[77], + 1'b0, wordtemp[76], 1'b0, wordtemp[75], 1'b0, wordtemp[74], 1'b0, wordtemp[73], + 1'b0, wordtemp[72], 1'b0, wordtemp[71], 1'b0, wordtemp[70], 1'b0, wordtemp[69], + 1'b0, wordtemp[68], 1'b0, wordtemp[67], 1'b0, wordtemp[66], 1'b0, wordtemp[65], + 1'b0, wordtemp[64], 1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61], + 1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57], + 1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53], + 1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49], + 1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45], + 1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41], + 1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37], + 1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33], + 1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29], + 1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25], + 1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21], + 1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17], + 1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], + 1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], + 1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], + 1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], + 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + end + endtask + +task dumpmem; + input [1000*8-1:0] filename_dump; + integer i, dump_file_desc; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + dump_file_desc = $fopen(filename_dump); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + data_out = (row >> mux_address); + QA_int = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + $fdisplay(dump_file_desc, "%b", QA_int); + end + end + $fclose(dump_file_desc); + end + endtask + +task loadaddr; + input [4:0] load_addr; + input [127:0] load_data; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + wordtemp = load_data; + Atemp = load_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[127], 1'b0, wordtemp[126], 1'b0, wordtemp[125], + 1'b0, wordtemp[124], 1'b0, wordtemp[123], 1'b0, wordtemp[122], 1'b0, wordtemp[121], + 1'b0, wordtemp[120], 1'b0, wordtemp[119], 1'b0, wordtemp[118], 1'b0, wordtemp[117], + 1'b0, wordtemp[116], 1'b0, wordtemp[115], 1'b0, wordtemp[114], 1'b0, wordtemp[113], + 1'b0, wordtemp[112], 1'b0, wordtemp[111], 1'b0, wordtemp[110], 1'b0, wordtemp[109], + 1'b0, wordtemp[108], 1'b0, wordtemp[107], 1'b0, wordtemp[106], 1'b0, wordtemp[105], + 1'b0, wordtemp[104], 1'b0, wordtemp[103], 1'b0, wordtemp[102], 1'b0, wordtemp[101], + 1'b0, wordtemp[100], 1'b0, wordtemp[99], 1'b0, wordtemp[98], 1'b0, wordtemp[97], + 1'b0, wordtemp[96], 1'b0, wordtemp[95], 1'b0, wordtemp[94], 1'b0, wordtemp[93], + 1'b0, wordtemp[92], 1'b0, wordtemp[91], 1'b0, wordtemp[90], 1'b0, wordtemp[89], + 1'b0, wordtemp[88], 1'b0, wordtemp[87], 1'b0, wordtemp[86], 1'b0, wordtemp[85], + 1'b0, wordtemp[84], 1'b0, wordtemp[83], 1'b0, wordtemp[82], 1'b0, wordtemp[81], + 1'b0, wordtemp[80], 1'b0, wordtemp[79], 1'b0, wordtemp[78], 1'b0, wordtemp[77], + 1'b0, wordtemp[76], 1'b0, wordtemp[75], 1'b0, wordtemp[74], 1'b0, wordtemp[73], + 1'b0, wordtemp[72], 1'b0, wordtemp[71], 1'b0, wordtemp[70], 1'b0, wordtemp[69], + 1'b0, wordtemp[68], 1'b0, wordtemp[67], 1'b0, wordtemp[66], 1'b0, wordtemp[65], + 1'b0, wordtemp[64], 1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61], + 1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57], + 1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53], + 1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49], + 1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45], + 1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41], + 1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37], + 1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33], + 1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29], + 1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25], + 1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21], + 1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17], + 1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], + 1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], + 1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], + 1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], + 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + endtask + +task dumpaddr; + output [127:0] dump_data; + input [4:0] dump_addr; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + Atemp = dump_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + data_out = (row >> mux_address); + QA_int = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + dump_data = QA_int; + end + end + endtask + + + task ReadA; + begin + if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'bx) begin + QA_int = {128{1'bx}}; + end else if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'b1) begin + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'b0 && (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAA_int & isBit1(DFTRAMBYP_int)), (EMASA_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + QA_int = {128{1'bx}}; + end else if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) begin + QA_int = {128{1'bx}}; + end else if ((AA_int >= WORDS) && (CENA_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + QA_int = 0 ? QA_int : {128{1'bx}}; + end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if (DFTRAMBYP_int !== 1'b1) begin + mux_address = (AA_int & 1'b1); + row_address = (AA_int >> 1); + if (row_address > 15) + row = {256{1'bx}}; + else + row = mem[row_address]; + data_out = (row >> mux_address); + QA_int = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + end + if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'b0) begin + end else if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'bx) begin + QA_int = {128{1'bx}}; + end + if( isBitX(DFTRAMBYP_int) ) + QA_int = {128{1'bx}}; + if(isBitX(DFTRAMBYP_int)) begin + QA_int = {128{1'bx}}; + failedWrite(0); + end + end + end + endtask + + task WriteB; + begin + if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'b1) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'b0 && (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAB_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if ((AB_int >= WORDS) && (CENB_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end else if (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) + DB_int = {128{1'bx}}; + + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end + mux_address = (AB_int & 1'b1); + row_address = (AB_int >> 1); + if (DFTRAMBYP_int !== 1'b1) begin + if (row_address > 15) + row = {256{1'bx}}; + else + row = mem[row_address]; + end + if(isBitX(DFTRAMBYP_int)) begin + writeEnable = {128{1'bx}}; + DB_int = {128{1'bx}}; + end else + writeEnable = ~ {WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, DB_int[127], 1'b0, DB_int[126], 1'b0, DB_int[125], 1'b0, DB_int[124], + 1'b0, DB_int[123], 1'b0, DB_int[122], 1'b0, DB_int[121], 1'b0, DB_int[120], + 1'b0, DB_int[119], 1'b0, DB_int[118], 1'b0, DB_int[117], 1'b0, DB_int[116], + 1'b0, DB_int[115], 1'b0, DB_int[114], 1'b0, DB_int[113], 1'b0, DB_int[112], + 1'b0, DB_int[111], 1'b0, DB_int[110], 1'b0, DB_int[109], 1'b0, DB_int[108], + 1'b0, DB_int[107], 1'b0, DB_int[106], 1'b0, DB_int[105], 1'b0, DB_int[104], + 1'b0, DB_int[103], 1'b0, DB_int[102], 1'b0, DB_int[101], 1'b0, DB_int[100], + 1'b0, DB_int[99], 1'b0, DB_int[98], 1'b0, DB_int[97], 1'b0, DB_int[96], 1'b0, DB_int[95], + 1'b0, DB_int[94], 1'b0, DB_int[93], 1'b0, DB_int[92], 1'b0, DB_int[91], 1'b0, DB_int[90], + 1'b0, DB_int[89], 1'b0, DB_int[88], 1'b0, DB_int[87], 1'b0, DB_int[86], 1'b0, DB_int[85], + 1'b0, DB_int[84], 1'b0, DB_int[83], 1'b0, DB_int[82], 1'b0, DB_int[81], 1'b0, DB_int[80], + 1'b0, DB_int[79], 1'b0, DB_int[78], 1'b0, DB_int[77], 1'b0, DB_int[76], 1'b0, DB_int[75], + 1'b0, DB_int[74], 1'b0, DB_int[73], 1'b0, DB_int[72], 1'b0, DB_int[71], 1'b0, DB_int[70], + 1'b0, DB_int[69], 1'b0, DB_int[68], 1'b0, DB_int[67], 1'b0, DB_int[66], 1'b0, DB_int[65], + 1'b0, DB_int[64], 1'b0, DB_int[63], 1'b0, DB_int[62], 1'b0, DB_int[61], 1'b0, DB_int[60], + 1'b0, DB_int[59], 1'b0, DB_int[58], 1'b0, DB_int[57], 1'b0, DB_int[56], 1'b0, DB_int[55], + 1'b0, DB_int[54], 1'b0, DB_int[53], 1'b0, DB_int[52], 1'b0, DB_int[51], 1'b0, DB_int[50], + 1'b0, DB_int[49], 1'b0, DB_int[48], 1'b0, DB_int[47], 1'b0, DB_int[46], 1'b0, DB_int[45], + 1'b0, DB_int[44], 1'b0, DB_int[43], 1'b0, DB_int[42], 1'b0, DB_int[41], 1'b0, DB_int[40], + 1'b0, DB_int[39], 1'b0, DB_int[38], 1'b0, DB_int[37], 1'b0, DB_int[36], 1'b0, DB_int[35], + 1'b0, DB_int[34], 1'b0, DB_int[33], 1'b0, DB_int[32], 1'b0, DB_int[31], 1'b0, DB_int[30], + 1'b0, DB_int[29], 1'b0, DB_int[28], 1'b0, DB_int[27], 1'b0, DB_int[26], 1'b0, DB_int[25], + 1'b0, DB_int[24], 1'b0, DB_int[23], 1'b0, DB_int[22], 1'b0, DB_int[21], 1'b0, DB_int[20], + 1'b0, DB_int[19], 1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15], + 1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10], + 1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5], + 1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + if (DFTRAMBYP_int === 1'b1 && (SEB_int === 1'b0 || SEB_int === 1'bx)) begin + end else begin + mem[row_address] = row; + end + end + end + endtask + always @ (CENA_ or TCENA_ or TENA_ or DFTRAMBYP_ or CLKA_) begin + if(CLKA_ == 1'b0) begin + CENA_p2 = CENA_; + TCENA_p2 = TCENA_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (VDDCE) begin + if (VDDCE != 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time); + end + $display("In PowerDown Mode in %m at %0t", $time); + failedWrite(0); + end + if (VDDCE == 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDPE should be powered up after VDDCE in %m at %0t", $time); + $display("Illegal power up sequencing in %m at %0t", $time); + end + failedWrite(0); + end + end +`endif +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || TCENA_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKA_ === 1'bx)) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_a = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_a = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(0); + end +`else + if (RET1N_ == 1'b0) begin +`endif + QA_int = {128{1'bx}}; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SIA_int = {2{1'bx}}; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_a = 0; + pre_charge_st = 0; +`else + end else begin +`endif + QA_int = {128{1'bx}}; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SIA_int = {2{1'bx}}; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + end + + always @ (CLKB_ or DFTRAMBYP_) begin + #0; + if(CLKB_ == 1'b1 && (DFTRAMBYP_int === 1'b1 || CENB_int != 1'b1)) begin + if (RET1N_ == 1'b1) begin + SOB_int = ({DB_int_sh[127], DB_int_sh[0]}); + DB_int_sh_int = DB_int_sh; + end + end + end + always @ (SIA_int) begin + #0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1 && ^SIA_int === 1'bx) begin + QA_int[64] = SIA_int[1]; + QA_int[63] = SIA_int[0]; + end + end + + always @ CLKA_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + SIA_int = SIA_; + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + end else begin + SIA_int = SIA_; + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + SIA_int = SIA_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (RET1N_ == 1'b1) begin + QA_int[127:64] = {QA_int[126:64], SIA_[1]}; + QA_int[63:0] = {SIA_[0], QA_int[63:1]}; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b0) begin + if (RET1N_ == 1'b1) begin + QA_int[127:64] = {QA_int[126:64], 1'b0}; + QA_int[63:0] = {1'b0, QA_int[63:1]}; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else begin + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + SIA_int = SIA_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + ReadA; + if (CENA_int === 1'b0) previous_CLKA = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + ReadA; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + QA_int = (partial_mask & {128{1'bx}}) | (~partial_mask & QA_int); + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int, 1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin + end + end + LAST_CLKA = CLKA_; + end + always @ (CENB_ or TCENB_ or TENB_ or DFTRAMBYP_ or CLKB_) begin + if(CLKB_ == 1'b0) begin + CENB_p2 = CENB_; + TCENB_p2 = TCENB_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || TCENB_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKB_ === 1'bx)) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_b = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_b = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(1); + end +`else + if (RET1N_ == 1'b0) begin +`endif + CENB_int = 1'bx; + WENB_int = {128{1'bx}}; + AB_int = {5{1'bx}}; + DB_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + SOB_int = {2{1'bx}}; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TWENB_int = {128{1'bx}}; + TAB_int = {5{1'bx}}; + TDB_int = {128{1'bx}}; + RET1N_int = 1'bx; + SIB_int = {2{1'bx}}; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_b = 0; + pre_charge_st = 0; +`else + end else begin +`endif + CENB_int = 1'bx; + WENB_int = {128{1'bx}}; + AB_int = {5{1'bx}}; + DB_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + SOB_int = {2{1'bx}}; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TWENB_int = {128{1'bx}}; + TAB_int = {5{1'bx}}; + TDB_int = {128{1'bx}}; + RET1N_int = 1'bx; + SIB_int = {2{1'bx}}; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + end + + always @ (SIB_int) begin + #0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1 && ^SIB_int === 1'bx) begin + DB_int_sh_int[64] = SIB_int[1]; + DB_int_sh_int[63] = SIB_int[0]; + end + end + always @ CLKB_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin + if (RET1N_ == 1'b0) begin + DFTRAMBYP_int = DFTRAMBYP_; + SIB_int = SIB_; + SEB_int = SEB_; + end else begin + DFTRAMBYP_int = DFTRAMBYP_; + SIB_int = SIB_; + SEB_int = SEB_; + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + TWENB_int = TWENB_; + RET1N_int = RET1N_; + SIB_int = SIB_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + WENB_int = TENB_ ? WENB_ : TWENB_; + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + DB_int_sh = TENB_ ? DB_ : TDB_; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + DB_int_sh[127:64] = {DB_int_sh_int[126:64], SIB_[1]}; + DB_int_sh[63:0] = {SIB_[0], DB_int_sh_int[63:1]}; + end else begin + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + TWENB_int = TWENB_; + RET1N_int = RET1N_; + SIB_int = SIB_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + WENB_int = TENB_ ? WENB_ : TWENB_; + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + DB_int_sh_int = DB_int_sh; + DB_int_sh = TENB_ ? DB_ : TDB_; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b0) begin + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + end else begin + WriteB; + end + if (CENB_int === 1'b0) previous_CLKB = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + ReadA; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + QA_int = (partial_mask & {128{1'bx}}) | (~partial_mask & QA_int); + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end + end else if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end + end + LAST_CLKB = CLKB_; + end +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + always @ (VDDCE or VDDPE or VSSE) begin + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); + end +`endif + + function row_contention; + input [4:0] aa; + input [4:0] ab; + input [127:0] wena; + input [127:0] wenb; + reg result; + reg sameRow; + reg sameMux; + reg anyWrite; + begin + anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1; + sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0; + if (aa[4:1] == ab[4:1]) begin + sameRow = 1'b1; + end else begin + sameRow = 1'b0; + end + if (sameRow == 1'b1 && anyWrite == 1'b1) + row_contention = 1'b1; + else if (sameRow == 1'b1 && sameMux == 1'b1) + row_contention = 1'b1; + else + row_contention = 1'b0; + end + endfunction + + function col_contention; + input [4:0] aa; + input [4:0] ab; + begin + if (aa[0:0] == ab[0:0]) + col_contention = 1'b1; + else + col_contention = 1'b0; + end + endfunction + + function is_contention; + input [4:0] aa; + input [4:0] ab; + input [127:0] wena; + input [127:0] wenb; + reg result; + begin + if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin + result = 1'b0; + end else if (aa == ab) begin + result = 1'b1; + end else begin + result = 1'b0; + end + is_contention = result; + end + endfunction + + +endmodule +`endcelldefine +`else +`celldefine +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS +module rf2_32x128_wm1 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, + SOB, CLKA, CENA, AA, CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, + TAA, TENB, TCENB, TWENB, TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x128_wm1 (CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, + CLKB, CENB, WENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TWENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + parameter ASSERT_PREFIX = ""; + parameter BITS = 128; + parameter WORDS = 32; + parameter MUX = 2; + parameter MEM_WIDTH = 256; // redun block size 2, 128 on left, 128 on right + parameter MEM_HEIGHT = 16; + parameter WP_SIZE = 1 ; + parameter UPM_WIDTH = 3; + parameter UPMW_WIDTH = 0; + parameter UPMS_WIDTH = 1; + + output CENYA; + output [4:0] AYA; + output CENYB; + output [127:0] WENYB; + output [4:0] AYB; + output [127:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [127:0] WENB; + input [4:0] AB; + input [127:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [127:0] TWENB; + input [4:0] TAB; + input [127:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + + reg pre_charge_st; + reg pre_charge_st_a; + reg pre_charge_st_b; + integer row_address; + integer mux_address; + initial row_address = 0; + initial mux_address = 0; + reg [255:0] mem [0:15]; + reg [255:0] row, row_t; + reg LAST_CLKA; + reg [255:0] row_mask; + reg [255:0] new_data; + reg [255:0] data_out; + reg [127:0] readLatch0; + reg [127:0] shifted_readLatch0; + reg read_mux_sel0_p2; + reg [127:0] readLatch1; + reg [127:0] shifted_readLatch1; + reg read_mux_sel1_p2; + reg LAST_CLKB; + reg [127:0] QA_int; + reg [127:0] partial_mask; + reg [127:0] writeEnable; + real previous_CLKA; + real previous_CLKB; + initial previous_CLKA = 0; + initial previous_CLKB = 0; + reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC; + reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1; + reg cont_flag0_int; + reg cont_flag1_int; + initial cont_flag0_int = 1'b0; + initial cont_flag1_int = 1'b0; + + reg NOT_CENA, NOT_AA4, NOT_AA3, NOT_AA2, NOT_AA1, NOT_AA0, NOT_CENB, NOT_WENB127; + reg NOT_WENB126, NOT_WENB125, NOT_WENB124, NOT_WENB123, NOT_WENB122, NOT_WENB121; + reg NOT_WENB120, NOT_WENB119, NOT_WENB118, NOT_WENB117, NOT_WENB116, NOT_WENB115; + reg NOT_WENB114, NOT_WENB113, NOT_WENB112, NOT_WENB111, NOT_WENB110, NOT_WENB109; + reg NOT_WENB108, NOT_WENB107, NOT_WENB106, NOT_WENB105, NOT_WENB104, NOT_WENB103; + reg NOT_WENB102, NOT_WENB101, NOT_WENB100, NOT_WENB99, NOT_WENB98, NOT_WENB97, NOT_WENB96; + reg NOT_WENB95, NOT_WENB94, NOT_WENB93, NOT_WENB92, NOT_WENB91, NOT_WENB90, NOT_WENB89; + reg NOT_WENB88, NOT_WENB87, NOT_WENB86, NOT_WENB85, NOT_WENB84, NOT_WENB83, NOT_WENB82; + reg NOT_WENB81, NOT_WENB80, NOT_WENB79, NOT_WENB78, NOT_WENB77, NOT_WENB76, NOT_WENB75; + reg NOT_WENB74, NOT_WENB73, NOT_WENB72, NOT_WENB71, NOT_WENB70, NOT_WENB69, NOT_WENB68; + reg NOT_WENB67, NOT_WENB66, NOT_WENB65, NOT_WENB64, NOT_WENB63, NOT_WENB62, NOT_WENB61; + reg NOT_WENB60, NOT_WENB59, NOT_WENB58, NOT_WENB57, NOT_WENB56, NOT_WENB55, NOT_WENB54; + reg NOT_WENB53, NOT_WENB52, NOT_WENB51, NOT_WENB50, NOT_WENB49, NOT_WENB48, NOT_WENB47; + reg NOT_WENB46, NOT_WENB45, NOT_WENB44, NOT_WENB43, NOT_WENB42, NOT_WENB41, NOT_WENB40; + reg NOT_WENB39, NOT_WENB38, NOT_WENB37, NOT_WENB36, NOT_WENB35, NOT_WENB34, NOT_WENB33; + reg NOT_WENB32, NOT_WENB31, NOT_WENB30, NOT_WENB29, NOT_WENB28, NOT_WENB27, NOT_WENB26; + reg NOT_WENB25, NOT_WENB24, NOT_WENB23, NOT_WENB22, NOT_WENB21, NOT_WENB20, NOT_WENB19; + reg NOT_WENB18, NOT_WENB17, NOT_WENB16, NOT_WENB15, NOT_WENB14, NOT_WENB13, NOT_WENB12; + reg NOT_WENB11, NOT_WENB10, NOT_WENB9, NOT_WENB8, NOT_WENB7, NOT_WENB6, NOT_WENB5; + reg NOT_WENB4, NOT_WENB3, NOT_WENB2, NOT_WENB1, NOT_WENB0, NOT_AB4, NOT_AB3, NOT_AB2; + reg NOT_AB1, NOT_AB0, NOT_DB127, NOT_DB126, NOT_DB125, NOT_DB124, NOT_DB123, NOT_DB122; + reg NOT_DB121, NOT_DB120, NOT_DB119, NOT_DB118, NOT_DB117, NOT_DB116, NOT_DB115; + reg NOT_DB114, NOT_DB113, NOT_DB112, NOT_DB111, NOT_DB110, NOT_DB109, NOT_DB108; + reg NOT_DB107, NOT_DB106, NOT_DB105, NOT_DB104, NOT_DB103, NOT_DB102, NOT_DB101; + reg NOT_DB100, NOT_DB99, NOT_DB98, NOT_DB97, NOT_DB96, NOT_DB95, NOT_DB94, NOT_DB93; + reg NOT_DB92, NOT_DB91, NOT_DB90, NOT_DB89, NOT_DB88, NOT_DB87, NOT_DB86, NOT_DB85; + reg NOT_DB84, NOT_DB83, NOT_DB82, NOT_DB81, NOT_DB80, NOT_DB79, NOT_DB78, NOT_DB77; + reg NOT_DB76, NOT_DB75, NOT_DB74, NOT_DB73, NOT_DB72, NOT_DB71, NOT_DB70, NOT_DB69; + reg NOT_DB68, NOT_DB67, NOT_DB66, NOT_DB65, NOT_DB64, NOT_DB63, NOT_DB62, NOT_DB61; + reg NOT_DB60, NOT_DB59, NOT_DB58, NOT_DB57, NOT_DB56, NOT_DB55, NOT_DB54, NOT_DB53; + reg NOT_DB52, NOT_DB51, NOT_DB50, NOT_DB49, NOT_DB48, NOT_DB47, NOT_DB46, NOT_DB45; + reg NOT_DB44, NOT_DB43, NOT_DB42, NOT_DB41, NOT_DB40, NOT_DB39, NOT_DB38, NOT_DB37; + reg NOT_DB36, NOT_DB35, NOT_DB34, NOT_DB33, NOT_DB32, NOT_DB31, NOT_DB30, NOT_DB29; + reg NOT_DB28, NOT_DB27, NOT_DB26, NOT_DB25, NOT_DB24, NOT_DB23, NOT_DB22, NOT_DB21; + reg NOT_DB20, NOT_DB19, NOT_DB18, NOT_DB17, NOT_DB16, NOT_DB15, NOT_DB14, NOT_DB13; + reg NOT_DB12, NOT_DB11, NOT_DB10, NOT_DB9, NOT_DB8, NOT_DB7, NOT_DB6, NOT_DB5, NOT_DB4; + reg NOT_DB3, NOT_DB2, NOT_DB1, NOT_DB0, NOT_EMAA2, NOT_EMAA1, NOT_EMAA0, NOT_EMASA; + reg NOT_EMAB2, NOT_EMAB1, NOT_EMAB0, NOT_TENA, NOT_TCENA, NOT_TAA4, NOT_TAA3, NOT_TAA2; + reg NOT_TAA1, NOT_TAA0, NOT_TENB, NOT_TCENB, NOT_TWENB127, NOT_TWENB126, NOT_TWENB125; + reg NOT_TWENB124, NOT_TWENB123, NOT_TWENB122, NOT_TWENB121, NOT_TWENB120, NOT_TWENB119; + reg NOT_TWENB118, NOT_TWENB117, NOT_TWENB116, NOT_TWENB115, NOT_TWENB114, NOT_TWENB113; + reg NOT_TWENB112, NOT_TWENB111, NOT_TWENB110, NOT_TWENB109, NOT_TWENB108, NOT_TWENB107; + reg NOT_TWENB106, NOT_TWENB105, NOT_TWENB104, NOT_TWENB103, NOT_TWENB102, NOT_TWENB101; + reg NOT_TWENB100, NOT_TWENB99, NOT_TWENB98, NOT_TWENB97, NOT_TWENB96, NOT_TWENB95; + reg NOT_TWENB94, NOT_TWENB93, NOT_TWENB92, NOT_TWENB91, NOT_TWENB90, NOT_TWENB89; + reg NOT_TWENB88, NOT_TWENB87, NOT_TWENB86, NOT_TWENB85, NOT_TWENB84, NOT_TWENB83; + reg NOT_TWENB82, NOT_TWENB81, NOT_TWENB80, NOT_TWENB79, NOT_TWENB78, NOT_TWENB77; + reg NOT_TWENB76, NOT_TWENB75, NOT_TWENB74, NOT_TWENB73, NOT_TWENB72, NOT_TWENB71; + reg NOT_TWENB70, NOT_TWENB69, NOT_TWENB68, NOT_TWENB67, NOT_TWENB66, NOT_TWENB65; + reg NOT_TWENB64, NOT_TWENB63, NOT_TWENB62, NOT_TWENB61, NOT_TWENB60, NOT_TWENB59; + reg NOT_TWENB58, NOT_TWENB57, NOT_TWENB56, NOT_TWENB55, NOT_TWENB54, NOT_TWENB53; + reg NOT_TWENB52, NOT_TWENB51, NOT_TWENB50, NOT_TWENB49, NOT_TWENB48, NOT_TWENB47; + reg NOT_TWENB46, NOT_TWENB45, NOT_TWENB44, NOT_TWENB43, NOT_TWENB42, NOT_TWENB41; + reg NOT_TWENB40, NOT_TWENB39, NOT_TWENB38, NOT_TWENB37, NOT_TWENB36, NOT_TWENB35; + reg NOT_TWENB34, NOT_TWENB33, NOT_TWENB32, NOT_TWENB31, NOT_TWENB30, NOT_TWENB29; + reg NOT_TWENB28, NOT_TWENB27, NOT_TWENB26, NOT_TWENB25, NOT_TWENB24, NOT_TWENB23; + reg NOT_TWENB22, NOT_TWENB21, NOT_TWENB20, NOT_TWENB19, NOT_TWENB18, NOT_TWENB17; + reg NOT_TWENB16, NOT_TWENB15, NOT_TWENB14, NOT_TWENB13, NOT_TWENB12, NOT_TWENB11; + reg NOT_TWENB10, NOT_TWENB9, NOT_TWENB8, NOT_TWENB7, NOT_TWENB6, NOT_TWENB5, NOT_TWENB4; + reg NOT_TWENB3, NOT_TWENB2, NOT_TWENB1, NOT_TWENB0, NOT_TAB4, NOT_TAB3, NOT_TAB2; + reg NOT_TAB1, NOT_TAB0, NOT_TDB127, NOT_TDB126, NOT_TDB125, NOT_TDB124, NOT_TDB123; + reg NOT_TDB122, NOT_TDB121, NOT_TDB120, NOT_TDB119, NOT_TDB118, NOT_TDB117, NOT_TDB116; + reg NOT_TDB115, NOT_TDB114, NOT_TDB113, NOT_TDB112, NOT_TDB111, NOT_TDB110, NOT_TDB109; + reg NOT_TDB108, NOT_TDB107, NOT_TDB106, NOT_TDB105, NOT_TDB104, NOT_TDB103, NOT_TDB102; + reg NOT_TDB101, NOT_TDB100, NOT_TDB99, NOT_TDB98, NOT_TDB97, NOT_TDB96, NOT_TDB95; + reg NOT_TDB94, NOT_TDB93, NOT_TDB92, NOT_TDB91, NOT_TDB90, NOT_TDB89, NOT_TDB88; + reg NOT_TDB87, NOT_TDB86, NOT_TDB85, NOT_TDB84, NOT_TDB83, NOT_TDB82, NOT_TDB81; + reg NOT_TDB80, NOT_TDB79, NOT_TDB78, NOT_TDB77, NOT_TDB76, NOT_TDB75, NOT_TDB74; + reg NOT_TDB73, NOT_TDB72, NOT_TDB71, NOT_TDB70, NOT_TDB69, NOT_TDB68, NOT_TDB67; + reg NOT_TDB66, NOT_TDB65, NOT_TDB64, NOT_TDB63, NOT_TDB62, NOT_TDB61, NOT_TDB60; + reg NOT_TDB59, NOT_TDB58, NOT_TDB57, NOT_TDB56, NOT_TDB55, NOT_TDB54, NOT_TDB53; + reg NOT_TDB52, NOT_TDB51, NOT_TDB50, NOT_TDB49, NOT_TDB48, NOT_TDB47, NOT_TDB46; + reg NOT_TDB45, NOT_TDB44, NOT_TDB43, NOT_TDB42, NOT_TDB41, NOT_TDB40, NOT_TDB39; + reg NOT_TDB38, NOT_TDB37, NOT_TDB36, NOT_TDB35, NOT_TDB34, NOT_TDB33, NOT_TDB32; + reg NOT_TDB31, NOT_TDB30, NOT_TDB29, NOT_TDB28, NOT_TDB27, NOT_TDB26, NOT_TDB25; + reg NOT_TDB24, NOT_TDB23, NOT_TDB22, NOT_TDB21, NOT_TDB20, NOT_TDB19, NOT_TDB18; + reg NOT_TDB17, NOT_TDB16, NOT_TDB15, NOT_TDB14, NOT_TDB13, NOT_TDB12, NOT_TDB11; + reg NOT_TDB10, NOT_TDB9, NOT_TDB8, NOT_TDB7, NOT_TDB6, NOT_TDB5, NOT_TDB4, NOT_TDB3; + reg NOT_TDB2, NOT_TDB1, NOT_TDB0, NOT_SIA1, NOT_SIA0, NOT_SEA, NOT_DFTRAMBYP_CLKA; + reg NOT_DFTRAMBYP_CLKB, NOT_RET1N, NOT_SIB1, NOT_SIB0, NOT_SEB, NOT_COLLDISN; + reg NOT_CONTA, NOT_CLKA_PER, NOT_CLKA_MINH, NOT_CLKA_MINL, NOT_CONTB, NOT_CLKB_PER; + reg NOT_CLKB_MINH, NOT_CLKB_MINL; + reg clk0_int; + reg clk1_int; + + wire CENYA_; + wire [4:0] AYA_; + wire CENYB_; + wire [127:0] WENYB_; + wire [4:0] AYB_; + wire [127:0] QA_; + wire [1:0] SOA_; + reg [1:0] SOA_int; + wire [1:0] SOB_; + reg [1:0] SOB_int; + wire CLKA_; + wire CENA_; + reg CENA_int; + reg CENA_p2; + wire [4:0] AA_; + reg [4:0] AA_int; + wire CLKB_; + wire CENB_; + reg CENB_int; + reg CENB_p2; + wire [127:0] WENB_; + reg [127:0] WENB_int; + wire [4:0] AB_; + reg [4:0] AB_int; + wire [127:0] DB_; + reg [127:0] DB_int; + reg [127:0] DB_int_sh; + reg [127:0] DB_int_sh_int; + wire [2:0] EMAA_; + reg [2:0] EMAA_int; + wire EMASA_; + reg EMASA_int; + wire [2:0] EMAB_; + reg [2:0] EMAB_int; + wire TENA_; + reg TENA_int; + wire TCENA_; + reg TCENA_int; + reg TCENA_p2; + wire [4:0] TAA_; + reg [4:0] TAA_int; + wire TENB_; + reg TENB_int; + wire TCENB_; + reg TCENB_int; + reg TCENB_p2; + wire [127:0] TWENB_; + reg [127:0] TWENB_int; + wire [4:0] TAB_; + reg [4:0] TAB_int; + wire [127:0] TDB_; + reg [127:0] TDB_int; + wire RET1N_; + reg RET1N_int; + wire [1:0] SIA_; + reg [1:0] SIA_int; + wire SEA_; + reg SEA_int; + wire DFTRAMBYP_; + reg DFTRAMBYP_int; + reg DFTRAMBYP_p2; + wire [1:0] SIB_; + reg [1:0] SIB_int; + wire SEB_; + reg SEB_int; + wire COLLDISN_; + reg COLLDISN_int; + + buf B828(CENYA, CENYA_); + buf B829(AYA[0], AYA_[0]); + buf B830(AYA[1], AYA_[1]); + buf B831(AYA[2], AYA_[2]); + buf B832(AYA[3], AYA_[3]); + buf B833(AYA[4], AYA_[4]); + buf B834(CENYB, CENYB_); + buf B835(WENYB[0], WENYB_[0]); + buf B836(WENYB[1], WENYB_[1]); + buf B837(WENYB[2], WENYB_[2]); + buf B838(WENYB[3], WENYB_[3]); + buf B839(WENYB[4], WENYB_[4]); + buf B840(WENYB[5], WENYB_[5]); + buf B841(WENYB[6], WENYB_[6]); + buf B842(WENYB[7], WENYB_[7]); + buf B843(WENYB[8], WENYB_[8]); + buf B844(WENYB[9], WENYB_[9]); + buf B845(WENYB[10], WENYB_[10]); + buf B846(WENYB[11], WENYB_[11]); + buf B847(WENYB[12], WENYB_[12]); + buf B848(WENYB[13], WENYB_[13]); + buf B849(WENYB[14], WENYB_[14]); + buf B850(WENYB[15], WENYB_[15]); + buf B851(WENYB[16], WENYB_[16]); + buf B852(WENYB[17], WENYB_[17]); + buf B853(WENYB[18], WENYB_[18]); + buf B854(WENYB[19], WENYB_[19]); + buf B855(WENYB[20], WENYB_[20]); + buf B856(WENYB[21], WENYB_[21]); + buf B857(WENYB[22], WENYB_[22]); + buf B858(WENYB[23], WENYB_[23]); + buf B859(WENYB[24], WENYB_[24]); + buf B860(WENYB[25], WENYB_[25]); + buf B861(WENYB[26], WENYB_[26]); + buf B862(WENYB[27], WENYB_[27]); + buf B863(WENYB[28], WENYB_[28]); + buf B864(WENYB[29], WENYB_[29]); + buf B865(WENYB[30], WENYB_[30]); + buf B866(WENYB[31], WENYB_[31]); + buf B867(WENYB[32], WENYB_[32]); + buf B868(WENYB[33], WENYB_[33]); + buf B869(WENYB[34], WENYB_[34]); + buf B870(WENYB[35], WENYB_[35]); + buf B871(WENYB[36], WENYB_[36]); + buf B872(WENYB[37], WENYB_[37]); + buf B873(WENYB[38], WENYB_[38]); + buf B874(WENYB[39], WENYB_[39]); + buf B875(WENYB[40], WENYB_[40]); + buf B876(WENYB[41], WENYB_[41]); + buf B877(WENYB[42], WENYB_[42]); + buf B878(WENYB[43], WENYB_[43]); + buf B879(WENYB[44], WENYB_[44]); + buf B880(WENYB[45], WENYB_[45]); + buf B881(WENYB[46], WENYB_[46]); + buf B882(WENYB[47], WENYB_[47]); + buf B883(WENYB[48], WENYB_[48]); + buf B884(WENYB[49], WENYB_[49]); + buf B885(WENYB[50], WENYB_[50]); + buf B886(WENYB[51], WENYB_[51]); + buf B887(WENYB[52], WENYB_[52]); + buf B888(WENYB[53], WENYB_[53]); + buf B889(WENYB[54], WENYB_[54]); + buf B890(WENYB[55], WENYB_[55]); + buf B891(WENYB[56], WENYB_[56]); + buf B892(WENYB[57], WENYB_[57]); + buf B893(WENYB[58], WENYB_[58]); + buf B894(WENYB[59], WENYB_[59]); + buf B895(WENYB[60], WENYB_[60]); + buf B896(WENYB[61], WENYB_[61]); + buf B897(WENYB[62], WENYB_[62]); + buf B898(WENYB[63], WENYB_[63]); + buf B899(WENYB[64], WENYB_[64]); + buf B900(WENYB[65], WENYB_[65]); + buf B901(WENYB[66], WENYB_[66]); + buf B902(WENYB[67], WENYB_[67]); + buf B903(WENYB[68], WENYB_[68]); + buf B904(WENYB[69], WENYB_[69]); + buf B905(WENYB[70], WENYB_[70]); + buf B906(WENYB[71], WENYB_[71]); + buf B907(WENYB[72], WENYB_[72]); + buf B908(WENYB[73], WENYB_[73]); + buf B909(WENYB[74], WENYB_[74]); + buf B910(WENYB[75], WENYB_[75]); + buf B911(WENYB[76], WENYB_[76]); + buf B912(WENYB[77], WENYB_[77]); + buf B913(WENYB[78], WENYB_[78]); + buf B914(WENYB[79], WENYB_[79]); + buf B915(WENYB[80], WENYB_[80]); + buf B916(WENYB[81], WENYB_[81]); + buf B917(WENYB[82], WENYB_[82]); + buf B918(WENYB[83], WENYB_[83]); + buf B919(WENYB[84], WENYB_[84]); + buf B920(WENYB[85], WENYB_[85]); + buf B921(WENYB[86], WENYB_[86]); + buf B922(WENYB[87], WENYB_[87]); + buf B923(WENYB[88], WENYB_[88]); + buf B924(WENYB[89], WENYB_[89]); + buf B925(WENYB[90], WENYB_[90]); + buf B926(WENYB[91], WENYB_[91]); + buf B927(WENYB[92], WENYB_[92]); + buf B928(WENYB[93], WENYB_[93]); + buf B929(WENYB[94], WENYB_[94]); + buf B930(WENYB[95], WENYB_[95]); + buf B931(WENYB[96], WENYB_[96]); + buf B932(WENYB[97], WENYB_[97]); + buf B933(WENYB[98], WENYB_[98]); + buf B934(WENYB[99], WENYB_[99]); + buf B935(WENYB[100], WENYB_[100]); + buf B936(WENYB[101], WENYB_[101]); + buf B937(WENYB[102], WENYB_[102]); + buf B938(WENYB[103], WENYB_[103]); + buf B939(WENYB[104], WENYB_[104]); + buf B940(WENYB[105], WENYB_[105]); + buf B941(WENYB[106], WENYB_[106]); + buf B942(WENYB[107], WENYB_[107]); + buf B943(WENYB[108], WENYB_[108]); + buf B944(WENYB[109], WENYB_[109]); + buf B945(WENYB[110], WENYB_[110]); + buf B946(WENYB[111], WENYB_[111]); + buf B947(WENYB[112], WENYB_[112]); + buf B948(WENYB[113], WENYB_[113]); + buf B949(WENYB[114], WENYB_[114]); + buf B950(WENYB[115], WENYB_[115]); + buf B951(WENYB[116], WENYB_[116]); + buf B952(WENYB[117], WENYB_[117]); + buf B953(WENYB[118], WENYB_[118]); + buf B954(WENYB[119], WENYB_[119]); + buf B955(WENYB[120], WENYB_[120]); + buf B956(WENYB[121], WENYB_[121]); + buf B957(WENYB[122], WENYB_[122]); + buf B958(WENYB[123], WENYB_[123]); + buf B959(WENYB[124], WENYB_[124]); + buf B960(WENYB[125], WENYB_[125]); + buf B961(WENYB[126], WENYB_[126]); + buf B962(WENYB[127], WENYB_[127]); + buf B963(AYB[0], AYB_[0]); + buf B964(AYB[1], AYB_[1]); + buf B965(AYB[2], AYB_[2]); + buf B966(AYB[3], AYB_[3]); + buf B967(AYB[4], AYB_[4]); + buf B968(QA[0], QA_[0]); + buf B969(QA[1], QA_[1]); + buf B970(QA[2], QA_[2]); + buf B971(QA[3], QA_[3]); + buf B972(QA[4], QA_[4]); + buf B973(QA[5], QA_[5]); + buf B974(QA[6], QA_[6]); + buf B975(QA[7], QA_[7]); + buf B976(QA[8], QA_[8]); + buf B977(QA[9], QA_[9]); + buf B978(QA[10], QA_[10]); + buf B979(QA[11], QA_[11]); + buf B980(QA[12], QA_[12]); + buf B981(QA[13], QA_[13]); + buf B982(QA[14], QA_[14]); + buf B983(QA[15], QA_[15]); + buf B984(QA[16], QA_[16]); + buf B985(QA[17], QA_[17]); + buf B986(QA[18], QA_[18]); + buf B987(QA[19], QA_[19]); + buf B988(QA[20], QA_[20]); + buf B989(QA[21], QA_[21]); + buf B990(QA[22], QA_[22]); + buf B991(QA[23], QA_[23]); + buf B992(QA[24], QA_[24]); + buf B993(QA[25], QA_[25]); + buf B994(QA[26], QA_[26]); + buf B995(QA[27], QA_[27]); + buf B996(QA[28], QA_[28]); + buf B997(QA[29], QA_[29]); + buf B998(QA[30], QA_[30]); + buf B999(QA[31], QA_[31]); + buf B1000(QA[32], QA_[32]); + buf B1001(QA[33], QA_[33]); + buf B1002(QA[34], QA_[34]); + buf B1003(QA[35], QA_[35]); + buf B1004(QA[36], QA_[36]); + buf B1005(QA[37], QA_[37]); + buf B1006(QA[38], QA_[38]); + buf B1007(QA[39], QA_[39]); + buf B1008(QA[40], QA_[40]); + buf B1009(QA[41], QA_[41]); + buf B1010(QA[42], QA_[42]); + buf B1011(QA[43], QA_[43]); + buf B1012(QA[44], QA_[44]); + buf B1013(QA[45], QA_[45]); + buf B1014(QA[46], QA_[46]); + buf B1015(QA[47], QA_[47]); + buf B1016(QA[48], QA_[48]); + buf B1017(QA[49], QA_[49]); + buf B1018(QA[50], QA_[50]); + buf B1019(QA[51], QA_[51]); + buf B1020(QA[52], QA_[52]); + buf B1021(QA[53], QA_[53]); + buf B1022(QA[54], QA_[54]); + buf B1023(QA[55], QA_[55]); + buf B1024(QA[56], QA_[56]); + buf B1025(QA[57], QA_[57]); + buf B1026(QA[58], QA_[58]); + buf B1027(QA[59], QA_[59]); + buf B1028(QA[60], QA_[60]); + buf B1029(QA[61], QA_[61]); + buf B1030(QA[62], QA_[62]); + buf B1031(QA[63], QA_[63]); + buf B1032(QA[64], QA_[64]); + buf B1033(QA[65], QA_[65]); + buf B1034(QA[66], QA_[66]); + buf B1035(QA[67], QA_[67]); + buf B1036(QA[68], QA_[68]); + buf B1037(QA[69], QA_[69]); + buf B1038(QA[70], QA_[70]); + buf B1039(QA[71], QA_[71]); + buf B1040(QA[72], QA_[72]); + buf B1041(QA[73], QA_[73]); + buf B1042(QA[74], QA_[74]); + buf B1043(QA[75], QA_[75]); + buf B1044(QA[76], QA_[76]); + buf B1045(QA[77], QA_[77]); + buf B1046(QA[78], QA_[78]); + buf B1047(QA[79], QA_[79]); + buf B1048(QA[80], QA_[80]); + buf B1049(QA[81], QA_[81]); + buf B1050(QA[82], QA_[82]); + buf B1051(QA[83], QA_[83]); + buf B1052(QA[84], QA_[84]); + buf B1053(QA[85], QA_[85]); + buf B1054(QA[86], QA_[86]); + buf B1055(QA[87], QA_[87]); + buf B1056(QA[88], QA_[88]); + buf B1057(QA[89], QA_[89]); + buf B1058(QA[90], QA_[90]); + buf B1059(QA[91], QA_[91]); + buf B1060(QA[92], QA_[92]); + buf B1061(QA[93], QA_[93]); + buf B1062(QA[94], QA_[94]); + buf B1063(QA[95], QA_[95]); + buf B1064(QA[96], QA_[96]); + buf B1065(QA[97], QA_[97]); + buf B1066(QA[98], QA_[98]); + buf B1067(QA[99], QA_[99]); + buf B1068(QA[100], QA_[100]); + buf B1069(QA[101], QA_[101]); + buf B1070(QA[102], QA_[102]); + buf B1071(QA[103], QA_[103]); + buf B1072(QA[104], QA_[104]); + buf B1073(QA[105], QA_[105]); + buf B1074(QA[106], QA_[106]); + buf B1075(QA[107], QA_[107]); + buf B1076(QA[108], QA_[108]); + buf B1077(QA[109], QA_[109]); + buf B1078(QA[110], QA_[110]); + buf B1079(QA[111], QA_[111]); + buf B1080(QA[112], QA_[112]); + buf B1081(QA[113], QA_[113]); + buf B1082(QA[114], QA_[114]); + buf B1083(QA[115], QA_[115]); + buf B1084(QA[116], QA_[116]); + buf B1085(QA[117], QA_[117]); + buf B1086(QA[118], QA_[118]); + buf B1087(QA[119], QA_[119]); + buf B1088(QA[120], QA_[120]); + buf B1089(QA[121], QA_[121]); + buf B1090(QA[122], QA_[122]); + buf B1091(QA[123], QA_[123]); + buf B1092(QA[124], QA_[124]); + buf B1093(QA[125], QA_[125]); + buf B1094(QA[126], QA_[126]); + buf B1095(QA[127], QA_[127]); + buf B1096(SOA[0], SOA_[0]); + buf B1097(SOA[1], SOA_[1]); + buf B1098(SOB[0], SOB_[0]); + buf B1099(SOB[1], SOB_[1]); + buf B1100(CLKA_, CLKA); + buf B1101(CENA_, CENA); + buf B1102(AA_[0], AA[0]); + buf B1103(AA_[1], AA[1]); + buf B1104(AA_[2], AA[2]); + buf B1105(AA_[3], AA[3]); + buf B1106(AA_[4], AA[4]); + buf B1107(CLKB_, CLKB); + buf B1108(CENB_, CENB); + buf B1109(WENB_[0], WENB[0]); + buf B1110(WENB_[1], WENB[1]); + buf B1111(WENB_[2], WENB[2]); + buf B1112(WENB_[3], WENB[3]); + buf B1113(WENB_[4], WENB[4]); + buf B1114(WENB_[5], WENB[5]); + buf B1115(WENB_[6], WENB[6]); + buf B1116(WENB_[7], WENB[7]); + buf B1117(WENB_[8], WENB[8]); + buf B1118(WENB_[9], WENB[9]); + buf B1119(WENB_[10], WENB[10]); + buf B1120(WENB_[11], WENB[11]); + buf B1121(WENB_[12], WENB[12]); + buf B1122(WENB_[13], WENB[13]); + buf B1123(WENB_[14], WENB[14]); + buf B1124(WENB_[15], WENB[15]); + buf B1125(WENB_[16], WENB[16]); + buf B1126(WENB_[17], WENB[17]); + buf B1127(WENB_[18], WENB[18]); + buf B1128(WENB_[19], WENB[19]); + buf B1129(WENB_[20], WENB[20]); + buf B1130(WENB_[21], WENB[21]); + buf B1131(WENB_[22], WENB[22]); + buf B1132(WENB_[23], WENB[23]); + buf B1133(WENB_[24], WENB[24]); + buf B1134(WENB_[25], WENB[25]); + buf B1135(WENB_[26], WENB[26]); + buf B1136(WENB_[27], WENB[27]); + buf B1137(WENB_[28], WENB[28]); + buf B1138(WENB_[29], WENB[29]); + buf B1139(WENB_[30], WENB[30]); + buf B1140(WENB_[31], WENB[31]); + buf B1141(WENB_[32], WENB[32]); + buf B1142(WENB_[33], WENB[33]); + buf B1143(WENB_[34], WENB[34]); + buf B1144(WENB_[35], WENB[35]); + buf B1145(WENB_[36], WENB[36]); + buf B1146(WENB_[37], WENB[37]); + buf B1147(WENB_[38], WENB[38]); + buf B1148(WENB_[39], WENB[39]); + buf B1149(WENB_[40], WENB[40]); + buf B1150(WENB_[41], WENB[41]); + buf B1151(WENB_[42], WENB[42]); + buf B1152(WENB_[43], WENB[43]); + buf B1153(WENB_[44], WENB[44]); + buf B1154(WENB_[45], WENB[45]); + buf B1155(WENB_[46], WENB[46]); + buf B1156(WENB_[47], WENB[47]); + buf B1157(WENB_[48], WENB[48]); + buf B1158(WENB_[49], WENB[49]); + buf B1159(WENB_[50], WENB[50]); + buf B1160(WENB_[51], WENB[51]); + buf B1161(WENB_[52], WENB[52]); + buf B1162(WENB_[53], WENB[53]); + buf B1163(WENB_[54], WENB[54]); + buf B1164(WENB_[55], WENB[55]); + buf B1165(WENB_[56], WENB[56]); + buf B1166(WENB_[57], WENB[57]); + buf B1167(WENB_[58], WENB[58]); + buf B1168(WENB_[59], WENB[59]); + buf B1169(WENB_[60], WENB[60]); + buf B1170(WENB_[61], WENB[61]); + buf B1171(WENB_[62], WENB[62]); + buf B1172(WENB_[63], WENB[63]); + buf B1173(WENB_[64], WENB[64]); + buf B1174(WENB_[65], WENB[65]); + buf B1175(WENB_[66], WENB[66]); + buf B1176(WENB_[67], WENB[67]); + buf B1177(WENB_[68], WENB[68]); + buf B1178(WENB_[69], WENB[69]); + buf B1179(WENB_[70], WENB[70]); + buf B1180(WENB_[71], WENB[71]); + buf B1181(WENB_[72], WENB[72]); + buf B1182(WENB_[73], WENB[73]); + buf B1183(WENB_[74], WENB[74]); + buf B1184(WENB_[75], WENB[75]); + buf B1185(WENB_[76], WENB[76]); + buf B1186(WENB_[77], WENB[77]); + buf B1187(WENB_[78], WENB[78]); + buf B1188(WENB_[79], WENB[79]); + buf B1189(WENB_[80], WENB[80]); + buf B1190(WENB_[81], WENB[81]); + buf B1191(WENB_[82], WENB[82]); + buf B1192(WENB_[83], WENB[83]); + buf B1193(WENB_[84], WENB[84]); + buf B1194(WENB_[85], WENB[85]); + buf B1195(WENB_[86], WENB[86]); + buf B1196(WENB_[87], WENB[87]); + buf B1197(WENB_[88], WENB[88]); + buf B1198(WENB_[89], WENB[89]); + buf B1199(WENB_[90], WENB[90]); + buf B1200(WENB_[91], WENB[91]); + buf B1201(WENB_[92], WENB[92]); + buf B1202(WENB_[93], WENB[93]); + buf B1203(WENB_[94], WENB[94]); + buf B1204(WENB_[95], WENB[95]); + buf B1205(WENB_[96], WENB[96]); + buf B1206(WENB_[97], WENB[97]); + buf B1207(WENB_[98], WENB[98]); + buf B1208(WENB_[99], WENB[99]); + buf B1209(WENB_[100], WENB[100]); + buf B1210(WENB_[101], WENB[101]); + buf B1211(WENB_[102], WENB[102]); + buf B1212(WENB_[103], WENB[103]); + buf B1213(WENB_[104], WENB[104]); + buf B1214(WENB_[105], WENB[105]); + buf B1215(WENB_[106], WENB[106]); + buf B1216(WENB_[107], WENB[107]); + buf B1217(WENB_[108], WENB[108]); + buf B1218(WENB_[109], WENB[109]); + buf B1219(WENB_[110], WENB[110]); + buf B1220(WENB_[111], WENB[111]); + buf B1221(WENB_[112], WENB[112]); + buf B1222(WENB_[113], WENB[113]); + buf B1223(WENB_[114], WENB[114]); + buf B1224(WENB_[115], WENB[115]); + buf B1225(WENB_[116], WENB[116]); + buf B1226(WENB_[117], WENB[117]); + buf B1227(WENB_[118], WENB[118]); + buf B1228(WENB_[119], WENB[119]); + buf B1229(WENB_[120], WENB[120]); + buf B1230(WENB_[121], WENB[121]); + buf B1231(WENB_[122], WENB[122]); + buf B1232(WENB_[123], WENB[123]); + buf B1233(WENB_[124], WENB[124]); + buf B1234(WENB_[125], WENB[125]); + buf B1235(WENB_[126], WENB[126]); + buf B1236(WENB_[127], WENB[127]); + buf B1237(AB_[0], AB[0]); + buf B1238(AB_[1], AB[1]); + buf B1239(AB_[2], AB[2]); + buf B1240(AB_[3], AB[3]); + buf B1241(AB_[4], AB[4]); + buf B1242(DB_[0], DB[0]); + buf B1243(DB_[1], DB[1]); + buf B1244(DB_[2], DB[2]); + buf B1245(DB_[3], DB[3]); + buf B1246(DB_[4], DB[4]); + buf B1247(DB_[5], DB[5]); + buf B1248(DB_[6], DB[6]); + buf B1249(DB_[7], DB[7]); + buf B1250(DB_[8], DB[8]); + buf B1251(DB_[9], DB[9]); + buf B1252(DB_[10], DB[10]); + buf B1253(DB_[11], DB[11]); + buf B1254(DB_[12], DB[12]); + buf B1255(DB_[13], DB[13]); + buf B1256(DB_[14], DB[14]); + buf B1257(DB_[15], DB[15]); + buf B1258(DB_[16], DB[16]); + buf B1259(DB_[17], DB[17]); + buf B1260(DB_[18], DB[18]); + buf B1261(DB_[19], DB[19]); + buf B1262(DB_[20], DB[20]); + buf B1263(DB_[21], DB[21]); + buf B1264(DB_[22], DB[22]); + buf B1265(DB_[23], DB[23]); + buf B1266(DB_[24], DB[24]); + buf B1267(DB_[25], DB[25]); + buf B1268(DB_[26], DB[26]); + buf B1269(DB_[27], DB[27]); + buf B1270(DB_[28], DB[28]); + buf B1271(DB_[29], DB[29]); + buf B1272(DB_[30], DB[30]); + buf B1273(DB_[31], DB[31]); + buf B1274(DB_[32], DB[32]); + buf B1275(DB_[33], DB[33]); + buf B1276(DB_[34], DB[34]); + buf B1277(DB_[35], DB[35]); + buf B1278(DB_[36], DB[36]); + buf B1279(DB_[37], DB[37]); + buf B1280(DB_[38], DB[38]); + buf B1281(DB_[39], DB[39]); + buf B1282(DB_[40], DB[40]); + buf B1283(DB_[41], DB[41]); + buf B1284(DB_[42], DB[42]); + buf B1285(DB_[43], DB[43]); + buf B1286(DB_[44], DB[44]); + buf B1287(DB_[45], DB[45]); + buf B1288(DB_[46], DB[46]); + buf B1289(DB_[47], DB[47]); + buf B1290(DB_[48], DB[48]); + buf B1291(DB_[49], DB[49]); + buf B1292(DB_[50], DB[50]); + buf B1293(DB_[51], DB[51]); + buf B1294(DB_[52], DB[52]); + buf B1295(DB_[53], DB[53]); + buf B1296(DB_[54], DB[54]); + buf B1297(DB_[55], DB[55]); + buf B1298(DB_[56], DB[56]); + buf B1299(DB_[57], DB[57]); + buf B1300(DB_[58], DB[58]); + buf B1301(DB_[59], DB[59]); + buf B1302(DB_[60], DB[60]); + buf B1303(DB_[61], DB[61]); + buf B1304(DB_[62], DB[62]); + buf B1305(DB_[63], DB[63]); + buf B1306(DB_[64], DB[64]); + buf B1307(DB_[65], DB[65]); + buf B1308(DB_[66], DB[66]); + buf B1309(DB_[67], DB[67]); + buf B1310(DB_[68], DB[68]); + buf B1311(DB_[69], DB[69]); + buf B1312(DB_[70], DB[70]); + buf B1313(DB_[71], DB[71]); + buf B1314(DB_[72], DB[72]); + buf B1315(DB_[73], DB[73]); + buf B1316(DB_[74], DB[74]); + buf B1317(DB_[75], DB[75]); + buf B1318(DB_[76], DB[76]); + buf B1319(DB_[77], DB[77]); + buf B1320(DB_[78], DB[78]); + buf B1321(DB_[79], DB[79]); + buf B1322(DB_[80], DB[80]); + buf B1323(DB_[81], DB[81]); + buf B1324(DB_[82], DB[82]); + buf B1325(DB_[83], DB[83]); + buf B1326(DB_[84], DB[84]); + buf B1327(DB_[85], DB[85]); + buf B1328(DB_[86], DB[86]); + buf B1329(DB_[87], DB[87]); + buf B1330(DB_[88], DB[88]); + buf B1331(DB_[89], DB[89]); + buf B1332(DB_[90], DB[90]); + buf B1333(DB_[91], DB[91]); + buf B1334(DB_[92], DB[92]); + buf B1335(DB_[93], DB[93]); + buf B1336(DB_[94], DB[94]); + buf B1337(DB_[95], DB[95]); + buf B1338(DB_[96], DB[96]); + buf B1339(DB_[97], DB[97]); + buf B1340(DB_[98], DB[98]); + buf B1341(DB_[99], DB[99]); + buf B1342(DB_[100], DB[100]); + buf B1343(DB_[101], DB[101]); + buf B1344(DB_[102], DB[102]); + buf B1345(DB_[103], DB[103]); + buf B1346(DB_[104], DB[104]); + buf B1347(DB_[105], DB[105]); + buf B1348(DB_[106], DB[106]); + buf B1349(DB_[107], DB[107]); + buf B1350(DB_[108], DB[108]); + buf B1351(DB_[109], DB[109]); + buf B1352(DB_[110], DB[110]); + buf B1353(DB_[111], DB[111]); + buf B1354(DB_[112], DB[112]); + buf B1355(DB_[113], DB[113]); + buf B1356(DB_[114], DB[114]); + buf B1357(DB_[115], DB[115]); + buf B1358(DB_[116], DB[116]); + buf B1359(DB_[117], DB[117]); + buf B1360(DB_[118], DB[118]); + buf B1361(DB_[119], DB[119]); + buf B1362(DB_[120], DB[120]); + buf B1363(DB_[121], DB[121]); + buf B1364(DB_[122], DB[122]); + buf B1365(DB_[123], DB[123]); + buf B1366(DB_[124], DB[124]); + buf B1367(DB_[125], DB[125]); + buf B1368(DB_[126], DB[126]); + buf B1369(DB_[127], DB[127]); + buf B1370(EMAA_[0], EMAA[0]); + buf B1371(EMAA_[1], EMAA[1]); + buf B1372(EMAA_[2], EMAA[2]); + buf B1373(EMASA_, EMASA); + buf B1374(EMAB_[0], EMAB[0]); + buf B1375(EMAB_[1], EMAB[1]); + buf B1376(EMAB_[2], EMAB[2]); + buf B1377(TENA_, TENA); + buf B1378(TCENA_, TCENA); + buf B1379(TAA_[0], TAA[0]); + buf B1380(TAA_[1], TAA[1]); + buf B1381(TAA_[2], TAA[2]); + buf B1382(TAA_[3], TAA[3]); + buf B1383(TAA_[4], TAA[4]); + buf B1384(TENB_, TENB); + buf B1385(TCENB_, TCENB); + buf B1386(TWENB_[0], TWENB[0]); + buf B1387(TWENB_[1], TWENB[1]); + buf B1388(TWENB_[2], TWENB[2]); + buf B1389(TWENB_[3], TWENB[3]); + buf B1390(TWENB_[4], TWENB[4]); + buf B1391(TWENB_[5], TWENB[5]); + buf B1392(TWENB_[6], TWENB[6]); + buf B1393(TWENB_[7], TWENB[7]); + buf B1394(TWENB_[8], TWENB[8]); + buf B1395(TWENB_[9], TWENB[9]); + buf B1396(TWENB_[10], TWENB[10]); + buf B1397(TWENB_[11], TWENB[11]); + buf B1398(TWENB_[12], TWENB[12]); + buf B1399(TWENB_[13], TWENB[13]); + buf B1400(TWENB_[14], TWENB[14]); + buf B1401(TWENB_[15], TWENB[15]); + buf B1402(TWENB_[16], TWENB[16]); + buf B1403(TWENB_[17], TWENB[17]); + buf B1404(TWENB_[18], TWENB[18]); + buf B1405(TWENB_[19], TWENB[19]); + buf B1406(TWENB_[20], TWENB[20]); + buf B1407(TWENB_[21], TWENB[21]); + buf B1408(TWENB_[22], TWENB[22]); + buf B1409(TWENB_[23], TWENB[23]); + buf B1410(TWENB_[24], TWENB[24]); + buf B1411(TWENB_[25], TWENB[25]); + buf B1412(TWENB_[26], TWENB[26]); + buf B1413(TWENB_[27], TWENB[27]); + buf B1414(TWENB_[28], TWENB[28]); + buf B1415(TWENB_[29], TWENB[29]); + buf B1416(TWENB_[30], TWENB[30]); + buf B1417(TWENB_[31], TWENB[31]); + buf B1418(TWENB_[32], TWENB[32]); + buf B1419(TWENB_[33], TWENB[33]); + buf B1420(TWENB_[34], TWENB[34]); + buf B1421(TWENB_[35], TWENB[35]); + buf B1422(TWENB_[36], TWENB[36]); + buf B1423(TWENB_[37], TWENB[37]); + buf B1424(TWENB_[38], TWENB[38]); + buf B1425(TWENB_[39], TWENB[39]); + buf B1426(TWENB_[40], TWENB[40]); + buf B1427(TWENB_[41], TWENB[41]); + buf B1428(TWENB_[42], TWENB[42]); + buf B1429(TWENB_[43], TWENB[43]); + buf B1430(TWENB_[44], TWENB[44]); + buf B1431(TWENB_[45], TWENB[45]); + buf B1432(TWENB_[46], TWENB[46]); + buf B1433(TWENB_[47], TWENB[47]); + buf B1434(TWENB_[48], TWENB[48]); + buf B1435(TWENB_[49], TWENB[49]); + buf B1436(TWENB_[50], TWENB[50]); + buf B1437(TWENB_[51], TWENB[51]); + buf B1438(TWENB_[52], TWENB[52]); + buf B1439(TWENB_[53], TWENB[53]); + buf B1440(TWENB_[54], TWENB[54]); + buf B1441(TWENB_[55], TWENB[55]); + buf B1442(TWENB_[56], TWENB[56]); + buf B1443(TWENB_[57], TWENB[57]); + buf B1444(TWENB_[58], TWENB[58]); + buf B1445(TWENB_[59], TWENB[59]); + buf B1446(TWENB_[60], TWENB[60]); + buf B1447(TWENB_[61], TWENB[61]); + buf B1448(TWENB_[62], TWENB[62]); + buf B1449(TWENB_[63], TWENB[63]); + buf B1450(TWENB_[64], TWENB[64]); + buf B1451(TWENB_[65], TWENB[65]); + buf B1452(TWENB_[66], TWENB[66]); + buf B1453(TWENB_[67], TWENB[67]); + buf B1454(TWENB_[68], TWENB[68]); + buf B1455(TWENB_[69], TWENB[69]); + buf B1456(TWENB_[70], TWENB[70]); + buf B1457(TWENB_[71], TWENB[71]); + buf B1458(TWENB_[72], TWENB[72]); + buf B1459(TWENB_[73], TWENB[73]); + buf B1460(TWENB_[74], TWENB[74]); + buf B1461(TWENB_[75], TWENB[75]); + buf B1462(TWENB_[76], TWENB[76]); + buf B1463(TWENB_[77], TWENB[77]); + buf B1464(TWENB_[78], TWENB[78]); + buf B1465(TWENB_[79], TWENB[79]); + buf B1466(TWENB_[80], TWENB[80]); + buf B1467(TWENB_[81], TWENB[81]); + buf B1468(TWENB_[82], TWENB[82]); + buf B1469(TWENB_[83], TWENB[83]); + buf B1470(TWENB_[84], TWENB[84]); + buf B1471(TWENB_[85], TWENB[85]); + buf B1472(TWENB_[86], TWENB[86]); + buf B1473(TWENB_[87], TWENB[87]); + buf B1474(TWENB_[88], TWENB[88]); + buf B1475(TWENB_[89], TWENB[89]); + buf B1476(TWENB_[90], TWENB[90]); + buf B1477(TWENB_[91], TWENB[91]); + buf B1478(TWENB_[92], TWENB[92]); + buf B1479(TWENB_[93], TWENB[93]); + buf B1480(TWENB_[94], TWENB[94]); + buf B1481(TWENB_[95], TWENB[95]); + buf B1482(TWENB_[96], TWENB[96]); + buf B1483(TWENB_[97], TWENB[97]); + buf B1484(TWENB_[98], TWENB[98]); + buf B1485(TWENB_[99], TWENB[99]); + buf B1486(TWENB_[100], TWENB[100]); + buf B1487(TWENB_[101], TWENB[101]); + buf B1488(TWENB_[102], TWENB[102]); + buf B1489(TWENB_[103], TWENB[103]); + buf B1490(TWENB_[104], TWENB[104]); + buf B1491(TWENB_[105], TWENB[105]); + buf B1492(TWENB_[106], TWENB[106]); + buf B1493(TWENB_[107], TWENB[107]); + buf B1494(TWENB_[108], TWENB[108]); + buf B1495(TWENB_[109], TWENB[109]); + buf B1496(TWENB_[110], TWENB[110]); + buf B1497(TWENB_[111], TWENB[111]); + buf B1498(TWENB_[112], TWENB[112]); + buf B1499(TWENB_[113], TWENB[113]); + buf B1500(TWENB_[114], TWENB[114]); + buf B1501(TWENB_[115], TWENB[115]); + buf B1502(TWENB_[116], TWENB[116]); + buf B1503(TWENB_[117], TWENB[117]); + buf B1504(TWENB_[118], TWENB[118]); + buf B1505(TWENB_[119], TWENB[119]); + buf B1506(TWENB_[120], TWENB[120]); + buf B1507(TWENB_[121], TWENB[121]); + buf B1508(TWENB_[122], TWENB[122]); + buf B1509(TWENB_[123], TWENB[123]); + buf B1510(TWENB_[124], TWENB[124]); + buf B1511(TWENB_[125], TWENB[125]); + buf B1512(TWENB_[126], TWENB[126]); + buf B1513(TWENB_[127], TWENB[127]); + buf B1514(TAB_[0], TAB[0]); + buf B1515(TAB_[1], TAB[1]); + buf B1516(TAB_[2], TAB[2]); + buf B1517(TAB_[3], TAB[3]); + buf B1518(TAB_[4], TAB[4]); + buf B1519(TDB_[0], TDB[0]); + buf B1520(TDB_[1], TDB[1]); + buf B1521(TDB_[2], TDB[2]); + buf B1522(TDB_[3], TDB[3]); + buf B1523(TDB_[4], TDB[4]); + buf B1524(TDB_[5], TDB[5]); + buf B1525(TDB_[6], TDB[6]); + buf B1526(TDB_[7], TDB[7]); + buf B1527(TDB_[8], TDB[8]); + buf B1528(TDB_[9], TDB[9]); + buf B1529(TDB_[10], TDB[10]); + buf B1530(TDB_[11], TDB[11]); + buf B1531(TDB_[12], TDB[12]); + buf B1532(TDB_[13], TDB[13]); + buf B1533(TDB_[14], TDB[14]); + buf B1534(TDB_[15], TDB[15]); + buf B1535(TDB_[16], TDB[16]); + buf B1536(TDB_[17], TDB[17]); + buf B1537(TDB_[18], TDB[18]); + buf B1538(TDB_[19], TDB[19]); + buf B1539(TDB_[20], TDB[20]); + buf B1540(TDB_[21], TDB[21]); + buf B1541(TDB_[22], TDB[22]); + buf B1542(TDB_[23], TDB[23]); + buf B1543(TDB_[24], TDB[24]); + buf B1544(TDB_[25], TDB[25]); + buf B1545(TDB_[26], TDB[26]); + buf B1546(TDB_[27], TDB[27]); + buf B1547(TDB_[28], TDB[28]); + buf B1548(TDB_[29], TDB[29]); + buf B1549(TDB_[30], TDB[30]); + buf B1550(TDB_[31], TDB[31]); + buf B1551(TDB_[32], TDB[32]); + buf B1552(TDB_[33], TDB[33]); + buf B1553(TDB_[34], TDB[34]); + buf B1554(TDB_[35], TDB[35]); + buf B1555(TDB_[36], TDB[36]); + buf B1556(TDB_[37], TDB[37]); + buf B1557(TDB_[38], TDB[38]); + buf B1558(TDB_[39], TDB[39]); + buf B1559(TDB_[40], TDB[40]); + buf B1560(TDB_[41], TDB[41]); + buf B1561(TDB_[42], TDB[42]); + buf B1562(TDB_[43], TDB[43]); + buf B1563(TDB_[44], TDB[44]); + buf B1564(TDB_[45], TDB[45]); + buf B1565(TDB_[46], TDB[46]); + buf B1566(TDB_[47], TDB[47]); + buf B1567(TDB_[48], TDB[48]); + buf B1568(TDB_[49], TDB[49]); + buf B1569(TDB_[50], TDB[50]); + buf B1570(TDB_[51], TDB[51]); + buf B1571(TDB_[52], TDB[52]); + buf B1572(TDB_[53], TDB[53]); + buf B1573(TDB_[54], TDB[54]); + buf B1574(TDB_[55], TDB[55]); + buf B1575(TDB_[56], TDB[56]); + buf B1576(TDB_[57], TDB[57]); + buf B1577(TDB_[58], TDB[58]); + buf B1578(TDB_[59], TDB[59]); + buf B1579(TDB_[60], TDB[60]); + buf B1580(TDB_[61], TDB[61]); + buf B1581(TDB_[62], TDB[62]); + buf B1582(TDB_[63], TDB[63]); + buf B1583(TDB_[64], TDB[64]); + buf B1584(TDB_[65], TDB[65]); + buf B1585(TDB_[66], TDB[66]); + buf B1586(TDB_[67], TDB[67]); + buf B1587(TDB_[68], TDB[68]); + buf B1588(TDB_[69], TDB[69]); + buf B1589(TDB_[70], TDB[70]); + buf B1590(TDB_[71], TDB[71]); + buf B1591(TDB_[72], TDB[72]); + buf B1592(TDB_[73], TDB[73]); + buf B1593(TDB_[74], TDB[74]); + buf B1594(TDB_[75], TDB[75]); + buf B1595(TDB_[76], TDB[76]); + buf B1596(TDB_[77], TDB[77]); + buf B1597(TDB_[78], TDB[78]); + buf B1598(TDB_[79], TDB[79]); + buf B1599(TDB_[80], TDB[80]); + buf B1600(TDB_[81], TDB[81]); + buf B1601(TDB_[82], TDB[82]); + buf B1602(TDB_[83], TDB[83]); + buf B1603(TDB_[84], TDB[84]); + buf B1604(TDB_[85], TDB[85]); + buf B1605(TDB_[86], TDB[86]); + buf B1606(TDB_[87], TDB[87]); + buf B1607(TDB_[88], TDB[88]); + buf B1608(TDB_[89], TDB[89]); + buf B1609(TDB_[90], TDB[90]); + buf B1610(TDB_[91], TDB[91]); + buf B1611(TDB_[92], TDB[92]); + buf B1612(TDB_[93], TDB[93]); + buf B1613(TDB_[94], TDB[94]); + buf B1614(TDB_[95], TDB[95]); + buf B1615(TDB_[96], TDB[96]); + buf B1616(TDB_[97], TDB[97]); + buf B1617(TDB_[98], TDB[98]); + buf B1618(TDB_[99], TDB[99]); + buf B1619(TDB_[100], TDB[100]); + buf B1620(TDB_[101], TDB[101]); + buf B1621(TDB_[102], TDB[102]); + buf B1622(TDB_[103], TDB[103]); + buf B1623(TDB_[104], TDB[104]); + buf B1624(TDB_[105], TDB[105]); + buf B1625(TDB_[106], TDB[106]); + buf B1626(TDB_[107], TDB[107]); + buf B1627(TDB_[108], TDB[108]); + buf B1628(TDB_[109], TDB[109]); + buf B1629(TDB_[110], TDB[110]); + buf B1630(TDB_[111], TDB[111]); + buf B1631(TDB_[112], TDB[112]); + buf B1632(TDB_[113], TDB[113]); + buf B1633(TDB_[114], TDB[114]); + buf B1634(TDB_[115], TDB[115]); + buf B1635(TDB_[116], TDB[116]); + buf B1636(TDB_[117], TDB[117]); + buf B1637(TDB_[118], TDB[118]); + buf B1638(TDB_[119], TDB[119]); + buf B1639(TDB_[120], TDB[120]); + buf B1640(TDB_[121], TDB[121]); + buf B1641(TDB_[122], TDB[122]); + buf B1642(TDB_[123], TDB[123]); + buf B1643(TDB_[124], TDB[124]); + buf B1644(TDB_[125], TDB[125]); + buf B1645(TDB_[126], TDB[126]); + buf B1646(TDB_[127], TDB[127]); + buf B1647(RET1N_, RET1N); + buf B1648(SIA_[0], SIA[0]); + buf B1649(SIA_[1], SIA[1]); + buf B1650(SEA_, SEA); + buf B1651(DFTRAMBYP_, DFTRAMBYP); + buf B1652(SIB_[0], SIB[0]); + buf B1653(SIB_[1], SIB[1]); + buf B1654(SEB_, SEB); + buf B1655(COLLDISN_, COLLDISN); + + assign CENYA_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENA_ ? CENA_ : TCENA_)) : 1'bx; + assign AYA_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENA_ ? AA_ : TAA_)) : {5{1'bx}}; + assign CENYB_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENB_ ? CENB_ : TCENB_)) : 1'bx; + assign WENYB_ = (RET1N_ | pre_charge_st) ? ({128{DFTRAMBYP_}} & (TENB_ ? WENB_ : TWENB_)) : {128{1'bx}}; + assign AYB_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENB_ ? AB_ : TAB_)) : {5{1'bx}}; + `ifdef ARM_FAULT_MODELING + rf2_32x128_wm1_error_injection u1(.CLK(CLKA_), .Q_out(QA_), .A(AA_int), .CEN(CENA_int), .DFTRAMBYP(DFTRAMBYP_int), .SE(SEA_int), .Q_in(QA_int)); + `else + assign QA_ = (RET1N_ | pre_charge_st) ? ((QA_int)) : {128{1'bx}}; + `endif + assign SOA_ = (RET1N_ | pre_charge_st) ? ({QA_[127], QA_[0]}) : {2{1'bx}}; + assign SOB_ = (RET1N_ | pre_charge_st) ? (SOB_int) : {2{1'bx}}; + +// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS. +`ifdef INITIALIZE_MEMORY + integer i; + initial begin + #0; + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'b0}}; + end +`endif + always @ (EMAA_) begin + if(EMAA_ < 3) + $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time); + end + always @ (EMASA_) begin + if(EMASA_ < 0) + $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time); + end + always @ (EMAB_) begin + if(EMAB_ < 3) + $display("Warning: Set Value for EMAB doesn't match Default value 3 in %m at %0t", $time); + end + + task failedWrite; + input port_f; + integer i; + begin + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'bx}}; + end + endtask + + function isBitX; + input bitval; + begin + isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0; + end + endfunction + + function isBit1; + input bitval; + begin + isBit1 = ( bitval===1'b1 ) ? 1'b1 : 1'b0; + end + endfunction + + +task loadmem; + input [1000*8-1:0] filename; + reg [BITS-1:0] memld [0:WORDS-1]; + integer i; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + $readmemb(filename, memld); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[127], 1'b0, wordtemp[126], 1'b0, wordtemp[125], + 1'b0, wordtemp[124], 1'b0, wordtemp[123], 1'b0, wordtemp[122], 1'b0, wordtemp[121], + 1'b0, wordtemp[120], 1'b0, wordtemp[119], 1'b0, wordtemp[118], 1'b0, wordtemp[117], + 1'b0, wordtemp[116], 1'b0, wordtemp[115], 1'b0, wordtemp[114], 1'b0, wordtemp[113], + 1'b0, wordtemp[112], 1'b0, wordtemp[111], 1'b0, wordtemp[110], 1'b0, wordtemp[109], + 1'b0, wordtemp[108], 1'b0, wordtemp[107], 1'b0, wordtemp[106], 1'b0, wordtemp[105], + 1'b0, wordtemp[104], 1'b0, wordtemp[103], 1'b0, wordtemp[102], 1'b0, wordtemp[101], + 1'b0, wordtemp[100], 1'b0, wordtemp[99], 1'b0, wordtemp[98], 1'b0, wordtemp[97], + 1'b0, wordtemp[96], 1'b0, wordtemp[95], 1'b0, wordtemp[94], 1'b0, wordtemp[93], + 1'b0, wordtemp[92], 1'b0, wordtemp[91], 1'b0, wordtemp[90], 1'b0, wordtemp[89], + 1'b0, wordtemp[88], 1'b0, wordtemp[87], 1'b0, wordtemp[86], 1'b0, wordtemp[85], + 1'b0, wordtemp[84], 1'b0, wordtemp[83], 1'b0, wordtemp[82], 1'b0, wordtemp[81], + 1'b0, wordtemp[80], 1'b0, wordtemp[79], 1'b0, wordtemp[78], 1'b0, wordtemp[77], + 1'b0, wordtemp[76], 1'b0, wordtemp[75], 1'b0, wordtemp[74], 1'b0, wordtemp[73], + 1'b0, wordtemp[72], 1'b0, wordtemp[71], 1'b0, wordtemp[70], 1'b0, wordtemp[69], + 1'b0, wordtemp[68], 1'b0, wordtemp[67], 1'b0, wordtemp[66], 1'b0, wordtemp[65], + 1'b0, wordtemp[64], 1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61], + 1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57], + 1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53], + 1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49], + 1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45], + 1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41], + 1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37], + 1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33], + 1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29], + 1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25], + 1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21], + 1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17], + 1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], + 1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], + 1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], + 1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], + 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + end + endtask + +task dumpmem; + input [1000*8-1:0] filename_dump; + integer i, dump_file_desc; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + dump_file_desc = $fopen(filename_dump); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + data_out = (row >> mux_address); + QA_int = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + $fdisplay(dump_file_desc, "%b", QA_int); + end + end + $fclose(dump_file_desc); + end + endtask + +task loadaddr; + input [4:0] load_addr; + input [127:0] load_data; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + wordtemp = load_data; + Atemp = load_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[127], 1'b0, wordtemp[126], 1'b0, wordtemp[125], + 1'b0, wordtemp[124], 1'b0, wordtemp[123], 1'b0, wordtemp[122], 1'b0, wordtemp[121], + 1'b0, wordtemp[120], 1'b0, wordtemp[119], 1'b0, wordtemp[118], 1'b0, wordtemp[117], + 1'b0, wordtemp[116], 1'b0, wordtemp[115], 1'b0, wordtemp[114], 1'b0, wordtemp[113], + 1'b0, wordtemp[112], 1'b0, wordtemp[111], 1'b0, wordtemp[110], 1'b0, wordtemp[109], + 1'b0, wordtemp[108], 1'b0, wordtemp[107], 1'b0, wordtemp[106], 1'b0, wordtemp[105], + 1'b0, wordtemp[104], 1'b0, wordtemp[103], 1'b0, wordtemp[102], 1'b0, wordtemp[101], + 1'b0, wordtemp[100], 1'b0, wordtemp[99], 1'b0, wordtemp[98], 1'b0, wordtemp[97], + 1'b0, wordtemp[96], 1'b0, wordtemp[95], 1'b0, wordtemp[94], 1'b0, wordtemp[93], + 1'b0, wordtemp[92], 1'b0, wordtemp[91], 1'b0, wordtemp[90], 1'b0, wordtemp[89], + 1'b0, wordtemp[88], 1'b0, wordtemp[87], 1'b0, wordtemp[86], 1'b0, wordtemp[85], + 1'b0, wordtemp[84], 1'b0, wordtemp[83], 1'b0, wordtemp[82], 1'b0, wordtemp[81], + 1'b0, wordtemp[80], 1'b0, wordtemp[79], 1'b0, wordtemp[78], 1'b0, wordtemp[77], + 1'b0, wordtemp[76], 1'b0, wordtemp[75], 1'b0, wordtemp[74], 1'b0, wordtemp[73], + 1'b0, wordtemp[72], 1'b0, wordtemp[71], 1'b0, wordtemp[70], 1'b0, wordtemp[69], + 1'b0, wordtemp[68], 1'b0, wordtemp[67], 1'b0, wordtemp[66], 1'b0, wordtemp[65], + 1'b0, wordtemp[64], 1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61], + 1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57], + 1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53], + 1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49], + 1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45], + 1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41], + 1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37], + 1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33], + 1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29], + 1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25], + 1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21], + 1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17], + 1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], + 1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], + 1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], + 1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], + 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + endtask + +task dumpaddr; + output [127:0] dump_data; + input [4:0] dump_addr; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + Atemp = dump_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {128{1'b1}}; + data_out = (row >> mux_address); + QA_int = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + dump_data = QA_int; + end + end + endtask + + + task ReadA; + begin + if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'bx) begin + QA_int = {128{1'bx}}; + end else if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'b1) begin + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'b0 && (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAA_int & isBit1(DFTRAMBYP_int)), (EMASA_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + QA_int = {128{1'bx}}; + end else if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) begin + QA_int = {128{1'bx}}; + end else if ((AA_int >= WORDS) && (CENA_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + QA_int = 0 ? QA_int : {128{1'bx}}; + end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if (DFTRAMBYP_int !== 1'b1) begin + mux_address = (AA_int & 1'b1); + row_address = (AA_int >> 1); + if (row_address > 15) + row = {256{1'bx}}; + else + row = mem[row_address]; + data_out = (row >> mux_address); + QA_int = {data_out[254], data_out[252], data_out[250], data_out[248], data_out[246], + data_out[244], data_out[242], data_out[240], data_out[238], data_out[236], + data_out[234], data_out[232], data_out[230], data_out[228], data_out[226], + data_out[224], data_out[222], data_out[220], data_out[218], data_out[216], + data_out[214], data_out[212], data_out[210], data_out[208], data_out[206], + data_out[204], data_out[202], data_out[200], data_out[198], data_out[196], + data_out[194], data_out[192], data_out[190], data_out[188], data_out[186], + data_out[184], data_out[182], data_out[180], data_out[178], data_out[176], + data_out[174], data_out[172], data_out[170], data_out[168], data_out[166], + data_out[164], data_out[162], data_out[160], data_out[158], data_out[156], + data_out[154], data_out[152], data_out[150], data_out[148], data_out[146], + data_out[144], data_out[142], data_out[140], data_out[138], data_out[136], + data_out[134], data_out[132], data_out[130], data_out[128], data_out[126], + data_out[124], data_out[122], data_out[120], data_out[118], data_out[116], + data_out[114], data_out[112], data_out[110], data_out[108], data_out[106], + data_out[104], data_out[102], data_out[100], data_out[98], data_out[96], data_out[94], + data_out[92], data_out[90], data_out[88], data_out[86], data_out[84], data_out[82], + data_out[80], data_out[78], data_out[76], data_out[74], data_out[72], data_out[70], + data_out[68], data_out[66], data_out[64], data_out[62], data_out[60], data_out[58], + data_out[56], data_out[54], data_out[52], data_out[50], data_out[48], data_out[46], + data_out[44], data_out[42], data_out[40], data_out[38], data_out[36], data_out[34], + data_out[32], data_out[30], data_out[28], data_out[26], data_out[24], data_out[22], + data_out[20], data_out[18], data_out[16], data_out[14], data_out[12], data_out[10], + data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]}; + end + if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'b0) begin + end else if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'bx) begin + QA_int = {128{1'bx}}; + end + if( isBitX(DFTRAMBYP_int) ) + QA_int = {128{1'bx}}; + if(isBitX(DFTRAMBYP_int)) begin + QA_int = {128{1'bx}}; + failedWrite(0); + end + end + end + endtask + + task WriteB; + begin + if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'b1) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'b0 && (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAB_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if ((AB_int >= WORDS) && (CENB_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end else if (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) + DB_int = {128{1'bx}}; + + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end + mux_address = (AB_int & 1'b1); + row_address = (AB_int >> 1); + if (DFTRAMBYP_int !== 1'b1) begin + if (row_address > 15) + row = {256{1'bx}}; + else + row = mem[row_address]; + end + if(isBitX(DFTRAMBYP_int)) begin + writeEnable = {128{1'bx}}; + DB_int = {128{1'bx}}; + end else + writeEnable = ~ {WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + row_mask = ( {1'b0, writeEnable[127], 1'b0, writeEnable[126], 1'b0, writeEnable[125], + 1'b0, writeEnable[124], 1'b0, writeEnable[123], 1'b0, writeEnable[122], 1'b0, writeEnable[121], + 1'b0, writeEnable[120], 1'b0, writeEnable[119], 1'b0, writeEnable[118], 1'b0, writeEnable[117], + 1'b0, writeEnable[116], 1'b0, writeEnable[115], 1'b0, writeEnable[114], 1'b0, writeEnable[113], + 1'b0, writeEnable[112], 1'b0, writeEnable[111], 1'b0, writeEnable[110], 1'b0, writeEnable[109], + 1'b0, writeEnable[108], 1'b0, writeEnable[107], 1'b0, writeEnable[106], 1'b0, writeEnable[105], + 1'b0, writeEnable[104], 1'b0, writeEnable[103], 1'b0, writeEnable[102], 1'b0, writeEnable[101], + 1'b0, writeEnable[100], 1'b0, writeEnable[99], 1'b0, writeEnable[98], 1'b0, writeEnable[97], + 1'b0, writeEnable[96], 1'b0, writeEnable[95], 1'b0, writeEnable[94], 1'b0, writeEnable[93], + 1'b0, writeEnable[92], 1'b0, writeEnable[91], 1'b0, writeEnable[90], 1'b0, writeEnable[89], + 1'b0, writeEnable[88], 1'b0, writeEnable[87], 1'b0, writeEnable[86], 1'b0, writeEnable[85], + 1'b0, writeEnable[84], 1'b0, writeEnable[83], 1'b0, writeEnable[82], 1'b0, writeEnable[81], + 1'b0, writeEnable[80], 1'b0, writeEnable[79], 1'b0, writeEnable[78], 1'b0, writeEnable[77], + 1'b0, writeEnable[76], 1'b0, writeEnable[75], 1'b0, writeEnable[74], 1'b0, writeEnable[73], + 1'b0, writeEnable[72], 1'b0, writeEnable[71], 1'b0, writeEnable[70], 1'b0, writeEnable[69], + 1'b0, writeEnable[68], 1'b0, writeEnable[67], 1'b0, writeEnable[66], 1'b0, writeEnable[65], + 1'b0, writeEnable[64], 1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61], + 1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57], + 1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53], + 1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49], + 1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45], + 1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41], + 1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37], + 1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33], + 1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29], + 1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25], + 1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21], + 1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17], + 1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], + 1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], + 1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], + 1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], + 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, DB_int[127], 1'b0, DB_int[126], 1'b0, DB_int[125], 1'b0, DB_int[124], + 1'b0, DB_int[123], 1'b0, DB_int[122], 1'b0, DB_int[121], 1'b0, DB_int[120], + 1'b0, DB_int[119], 1'b0, DB_int[118], 1'b0, DB_int[117], 1'b0, DB_int[116], + 1'b0, DB_int[115], 1'b0, DB_int[114], 1'b0, DB_int[113], 1'b0, DB_int[112], + 1'b0, DB_int[111], 1'b0, DB_int[110], 1'b0, DB_int[109], 1'b0, DB_int[108], + 1'b0, DB_int[107], 1'b0, DB_int[106], 1'b0, DB_int[105], 1'b0, DB_int[104], + 1'b0, DB_int[103], 1'b0, DB_int[102], 1'b0, DB_int[101], 1'b0, DB_int[100], + 1'b0, DB_int[99], 1'b0, DB_int[98], 1'b0, DB_int[97], 1'b0, DB_int[96], 1'b0, DB_int[95], + 1'b0, DB_int[94], 1'b0, DB_int[93], 1'b0, DB_int[92], 1'b0, DB_int[91], 1'b0, DB_int[90], + 1'b0, DB_int[89], 1'b0, DB_int[88], 1'b0, DB_int[87], 1'b0, DB_int[86], 1'b0, DB_int[85], + 1'b0, DB_int[84], 1'b0, DB_int[83], 1'b0, DB_int[82], 1'b0, DB_int[81], 1'b0, DB_int[80], + 1'b0, DB_int[79], 1'b0, DB_int[78], 1'b0, DB_int[77], 1'b0, DB_int[76], 1'b0, DB_int[75], + 1'b0, DB_int[74], 1'b0, DB_int[73], 1'b0, DB_int[72], 1'b0, DB_int[71], 1'b0, DB_int[70], + 1'b0, DB_int[69], 1'b0, DB_int[68], 1'b0, DB_int[67], 1'b0, DB_int[66], 1'b0, DB_int[65], + 1'b0, DB_int[64], 1'b0, DB_int[63], 1'b0, DB_int[62], 1'b0, DB_int[61], 1'b0, DB_int[60], + 1'b0, DB_int[59], 1'b0, DB_int[58], 1'b0, DB_int[57], 1'b0, DB_int[56], 1'b0, DB_int[55], + 1'b0, DB_int[54], 1'b0, DB_int[53], 1'b0, DB_int[52], 1'b0, DB_int[51], 1'b0, DB_int[50], + 1'b0, DB_int[49], 1'b0, DB_int[48], 1'b0, DB_int[47], 1'b0, DB_int[46], 1'b0, DB_int[45], + 1'b0, DB_int[44], 1'b0, DB_int[43], 1'b0, DB_int[42], 1'b0, DB_int[41], 1'b0, DB_int[40], + 1'b0, DB_int[39], 1'b0, DB_int[38], 1'b0, DB_int[37], 1'b0, DB_int[36], 1'b0, DB_int[35], + 1'b0, DB_int[34], 1'b0, DB_int[33], 1'b0, DB_int[32], 1'b0, DB_int[31], 1'b0, DB_int[30], + 1'b0, DB_int[29], 1'b0, DB_int[28], 1'b0, DB_int[27], 1'b0, DB_int[26], 1'b0, DB_int[25], + 1'b0, DB_int[24], 1'b0, DB_int[23], 1'b0, DB_int[22], 1'b0, DB_int[21], 1'b0, DB_int[20], + 1'b0, DB_int[19], 1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15], + 1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10], + 1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5], + 1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + if (DFTRAMBYP_int === 1'b1 && (SEB_int === 1'b0 || SEB_int === 1'bx)) begin + end else begin + mem[row_address] = row; + end + end + end + endtask + always @ (CENA_ or TCENA_ or TENA_ or DFTRAMBYP_ or CLKA_) begin + if(CLKA_ == 1'b0) begin + CENA_p2 = CENA_; + TCENA_p2 = TCENA_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (VDDCE) begin + if (VDDCE != 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time); + end + $display("In PowerDown Mode in %m at %0t", $time); + failedWrite(0); + end + if (VDDCE == 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDPE should be powered up after VDDCE in %m at %0t", $time); + $display("Illegal power up sequencing in %m at %0t", $time); + end + failedWrite(0); + end + end +`endif +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || TCENA_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKA_ === 1'bx)) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_a = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_a = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(0); + end +`else + if (RET1N_ == 1'b0) begin +`endif + QA_int = {128{1'bx}}; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SIA_int = {2{1'bx}}; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_a = 0; + pre_charge_st = 0; +`else + end else begin +`endif + QA_int = {128{1'bx}}; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SIA_int = {2{1'bx}}; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + end + + always @ (CLKB_ or DFTRAMBYP_) begin + #0; + if(CLKB_ == 1'b1 && (DFTRAMBYP_int === 1'b1 || CENB_int != 1'b1)) begin + if (RET1N_ == 1'b1) begin + SOB_int = ({DB_int_sh[127], DB_int_sh[0]}); + DB_int_sh_int = DB_int_sh; + end + end + end + always @ (SIA_int) begin + #0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1 && ^SIA_int === 1'bx) begin + QA_int[64] = SIA_int[1]; + QA_int[63] = SIA_int[0]; + end + end + + always @ CLKA_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + QA_int = {128{1'bx}}; + end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + SIA_int = SIA_; + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + end else begin + SIA_int = SIA_; + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + SIA_int = SIA_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (RET1N_ == 1'b1) begin + QA_int[127:64] = {QA_int[126:64], SIA_[1]}; + QA_int[63:0] = {SIA_[0], QA_int[63:1]}; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b0) begin + if (RET1N_ == 1'b1) begin + QA_int[127:64] = {QA_int[126:64], 1'b0}; + QA_int[63:0] = {1'b0, QA_int[63:1]}; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else begin + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + SIA_int = SIA_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + ReadA; + if (CENA_int === 1'b0) previous_CLKA = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + ReadA; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + QA_int = (partial_mask & {128{1'bx}}) | (~partial_mask & QA_int); + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int, 1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin + end + end + LAST_CLKA = CLKA_; + end + + reg globalNotifier0; + initial globalNotifier0 = 1'b0; + initial cont_flag0_int = 1'b0; + + always @ globalNotifier0 begin + if ($realtime == 0) begin + end else if ((EMAA_int[0] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMAA_int[1] === 1'bx & DFTRAMBYP_int === 1'b1) || + (EMAA_int[2] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMASA_int === 1'bx & DFTRAMBYP_int === 1'b1) + ) begin + QA_int = {128{1'bx}}; + end else if ((CENA_int === 1'bx & DFTRAMBYP_int === 1'b0) || EMAA_int[0] === 1'bx || + EMAA_int[1] === 1'bx || EMAA_int[2] === 1'bx || EMASA_int === 1'bx || RET1N_int === 1'bx + || clk0_int === 1'bx) begin + QA_int = {128{1'bx}}; + end else if (TENA_int === 1'bx) begin + if(((CENA_ === 1'b1 & TCENA_ === 1'b1) & DFTRAMBYP_int === 1'b0) | (DFTRAMBYP_int === 1'b1 & SEA_int === 1'b1)) begin + end else begin + if (DFTRAMBYP_int === 1'b0) begin + QA_int = {128{1'bx}}; + end + end + end else if (^SIA_int === 1'bx && DFTRAMBYP_int === 1'b1) begin + end else if (cont_flag0_int === 1'bx && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + cont_flag0_int = 1'b0; + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + QA_int = (partial_mask & {128{1'bx}}) | (~partial_mask & QA_int); + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end + end else if ((CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && cont_flag0_int === 1'bx && (COLLDISN_int === 1'b0 || COLLDISN_int === + 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + cont_flag0_int = 1'b0; + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end else begin + #0; + ReadA; + end + globalNotifier0 = 1'b0; + end + always @ (CENB_ or TCENB_ or TENB_ or DFTRAMBYP_ or CLKB_) begin + if(CLKB_ == 1'b0) begin + CENB_p2 = CENB_; + TCENB_p2 = TCENB_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || TCENB_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKB_ === 1'bx)) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_b = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + QA_int = {128{1'bx}}; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_b = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(1); + end +`else + if (RET1N_ == 1'b0) begin +`endif + CENB_int = 1'bx; + WENB_int = {128{1'bx}}; + AB_int = {5{1'bx}}; + DB_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + SOB_int = {2{1'bx}}; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TWENB_int = {128{1'bx}}; + TAB_int = {5{1'bx}}; + TDB_int = {128{1'bx}}; + RET1N_int = 1'bx; + SIB_int = {2{1'bx}}; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_b = 0; + pre_charge_st = 0; +`else + end else begin +`endif + CENB_int = 1'bx; + WENB_int = {128{1'bx}}; + AB_int = {5{1'bx}}; + DB_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + SOB_int = {2{1'bx}}; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TWENB_int = {128{1'bx}}; + TAB_int = {5{1'bx}}; + TDB_int = {128{1'bx}}; + RET1N_int = 1'bx; + SIB_int = {2{1'bx}}; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + end + + always @ (SIB_int) begin + #0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1 && ^SIB_int === 1'bx) begin + DB_int_sh_int[64] = SIB_int[1]; + DB_int_sh_int[63] = SIB_int[0]; + end + end + always @ CLKB_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin + if (RET1N_ == 1'b0) begin + DFTRAMBYP_int = DFTRAMBYP_; + SIB_int = SIB_; + SEB_int = SEB_; + end else begin + DFTRAMBYP_int = DFTRAMBYP_; + SIB_int = SIB_; + SEB_int = SEB_; + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + TWENB_int = TWENB_; + RET1N_int = RET1N_; + SIB_int = SIB_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + WENB_int = TENB_ ? WENB_ : TWENB_; + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + DB_int_sh = TENB_ ? DB_ : TDB_; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + DB_int_sh[127:64] = {DB_int_sh_int[126:64], SIB_[1]}; + DB_int_sh[63:0] = {SIB_[0], DB_int_sh_int[63:1]}; + end else begin + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + TWENB_int = TWENB_; + RET1N_int = RET1N_; + SIB_int = SIB_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + WENB_int = TENB_ ? WENB_ : TWENB_; + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + DB_int_sh_int = DB_int_sh; + DB_int_sh = TENB_ ? DB_ : TDB_; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b0) begin + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + end else begin + WriteB; + end + if (CENB_int === 1'b0) previous_CLKB = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + ReadA; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + QA_int = (partial_mask & {128{1'bx}}) | (~partial_mask & QA_int); + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end + end else if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end + end + LAST_CLKB = CLKB_; + end + + reg globalNotifier1; + initial globalNotifier1 = 1'b0; + initial cont_flag1_int = 1'b0; + + always @ globalNotifier1 begin + if ($realtime == 0) begin + end else if ((EMAB_int[0] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMAB_int[1] === 1'bx & DFTRAMBYP_int === 1'b1) || + (EMAB_int[2] === 1'bx & DFTRAMBYP_int === 1'b1)) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if ((CENB_int === 1'bx & DFTRAMBYP_int === 1'b0) || EMAB_int[0] === 1'bx || + EMAB_int[1] === 1'bx || EMAB_int[2] === 1'bx || RET1N_int === 1'bx || clk1_int === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end else if (TENB_int === 1'bx) begin + if(((CENB_ === 1'b1 & TCENB_ === 1'b1) & DFTRAMBYP_int === 1'b0) | (DFTRAMBYP_int === 1'b1 & SEB_int === 1'b1)) begin + end else begin + if (DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {128{1'bx}}; + DB_int_sh = {128{1'bx}}; + end + end else if (^SIB_int === 1'bx && DFTRAMBYP_int === 1'b1) begin + end else if (cont_flag1_int === 1'bx && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + cont_flag1_int = 1'b0; + if((|WENB_int) == 1'b1) begin + $display("%s contention: write B partially, read A partially in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + WriteB; + partial_mask = ~{WENB_int[127], WENB_int[126], WENB_int[125], WENB_int[124], + WENB_int[123], WENB_int[122], WENB_int[121], WENB_int[120], WENB_int[119], + WENB_int[118], WENB_int[117], WENB_int[116], WENB_int[115], WENB_int[114], + WENB_int[113], WENB_int[112], WENB_int[111], WENB_int[110], WENB_int[109], + WENB_int[108], WENB_int[107], WENB_int[106], WENB_int[105], WENB_int[104], + WENB_int[103], WENB_int[102], WENB_int[101], WENB_int[100], WENB_int[99], + WENB_int[98], WENB_int[97], WENB_int[96], WENB_int[95], WENB_int[94], WENB_int[93], + WENB_int[92], WENB_int[91], WENB_int[90], WENB_int[89], WENB_int[88], WENB_int[87], + WENB_int[86], WENB_int[85], WENB_int[84], WENB_int[83], WENB_int[82], WENB_int[81], + WENB_int[80], WENB_int[79], WENB_int[78], WENB_int[77], WENB_int[76], WENB_int[75], + WENB_int[74], WENB_int[73], WENB_int[72], WENB_int[71], WENB_int[70], WENB_int[69], + WENB_int[68], WENB_int[67], WENB_int[66], WENB_int[65], WENB_int[64], WENB_int[63], + WENB_int[62], WENB_int[61], WENB_int[60], WENB_int[59], WENB_int[58], WENB_int[57], + WENB_int[56], WENB_int[55], WENB_int[54], WENB_int[53], WENB_int[52], WENB_int[51], + WENB_int[50], WENB_int[49], WENB_int[48], WENB_int[47], WENB_int[46], WENB_int[45], + WENB_int[44], WENB_int[43], WENB_int[42], WENB_int[41], WENB_int[40], WENB_int[39], + WENB_int[38], WENB_int[37], WENB_int[36], WENB_int[35], WENB_int[34], WENB_int[33], + WENB_int[32], WENB_int[31], WENB_int[30], WENB_int[29], WENB_int[28], WENB_int[27], + WENB_int[26], WENB_int[25], WENB_int[24], WENB_int[23], WENB_int[22], WENB_int[21], + WENB_int[20], WENB_int[19], WENB_int[18], WENB_int[17], WENB_int[16], WENB_int[15], + WENB_int[14], WENB_int[13], WENB_int[12], WENB_int[11], WENB_int[10], WENB_int[9], + WENB_int[8], WENB_int[7], WENB_int[6], WENB_int[5], WENB_int[4], WENB_int[3], + WENB_int[2], WENB_int[1], WENB_int[0]}; + QA_int = (partial_mask & {128{1'bx}}) | (~partial_mask & QA_int); + end else begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end + end else if ((CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && cont_flag1_int === 1'bx && (COLLDISN_int === 1'b0 || COLLDISN_int === + 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + cont_flag1_int = 1'b0; + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {128{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {128{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end else begin + #0; + WriteB; + end + globalNotifier1 = 1'b0; + end +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + always @ (VDDCE or VDDPE or VSSE) begin + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); + end +`endif + + function row_contention; + input [4:0] aa; + input [4:0] ab; + input [127:0] wena; + input [127:0] wenb; + reg result; + reg sameRow; + reg sameMux; + reg anyWrite; + begin + anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1; + sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0; + if (aa[4:1] == ab[4:1]) begin + sameRow = 1'b1; + end else begin + sameRow = 1'b0; + end + if (sameRow == 1'b1 && anyWrite == 1'b1) + row_contention = 1'b1; + else if (sameRow == 1'b1 && sameMux == 1'b1) + row_contention = 1'b1; + else + row_contention = 1'b0; + end + endfunction + + function col_contention; + input [4:0] aa; + input [4:0] ab; + begin + if (aa[0:0] == ab[0:0]) + col_contention = 1'b1; + else + col_contention = 1'b0; + end + endfunction + + function is_contention; + input [4:0] aa; + input [4:0] ab; + input [127:0] wena; + input [127:0] wenb; + reg result; + begin + if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin + result = 1'b0; + end else if (aa == ab) begin + result = 1'b1; + end else begin + result = 1'b0; + end + is_contention = result; + end + endfunction + + wire contA_flag = (CENA_int !== 1'b1 && ((TENB_ ? CENB_ : TCENB_) !== 1'b1)) && ((COLLDISN_int === 1'b1 && is_contention(TENB_ ? AB_ : TAB_, AA_int, 1'b0, 1'b1)) || + ((COLLDISN_int === 1'b0 || COLLDISN_int === 1'bx) && row_contention(TENB_ ? AB_ : TAB_, AA_int, 1'b0, 1'b1))); + wire contB_flag = (CENB_int !== 1'b1 && ((TENA_ ? CENA_ : TCENA_) !== 1'b1)) && ((COLLDISN_int === 1'b1 && is_contention(TENA_ ? AA_ : TAA_, AB_int, 1'b1, 1'b0)) || + ((COLLDISN_int === 1'b0 || COLLDISN_int === 1'bx) && row_contention(TENA_ ? AA_ : TAA_, AB_int, 1'b1, 1'b0))); + + always @ NOT_CENA begin + CENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA4 begin + AA_int[4] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA3 begin + AA_int[3] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA2 begin + AA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA1 begin + AA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA0 begin + AA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CENB begin + CENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB127 begin + WENB_int[127] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB126 begin + WENB_int[126] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB125 begin + WENB_int[125] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB124 begin + WENB_int[124] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB123 begin + WENB_int[123] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB122 begin + WENB_int[122] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB121 begin + WENB_int[121] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB120 begin + WENB_int[120] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB119 begin + WENB_int[119] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB118 begin + WENB_int[118] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB117 begin + WENB_int[117] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB116 begin + WENB_int[116] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB115 begin + WENB_int[115] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB114 begin + WENB_int[114] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB113 begin + WENB_int[113] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB112 begin + WENB_int[112] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB111 begin + WENB_int[111] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB110 begin + WENB_int[110] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB109 begin + WENB_int[109] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB108 begin + WENB_int[108] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB107 begin + WENB_int[107] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB106 begin + WENB_int[106] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB105 begin + WENB_int[105] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB104 begin + WENB_int[104] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB103 begin + WENB_int[103] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB102 begin + WENB_int[102] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB101 begin + WENB_int[101] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB100 begin + WENB_int[100] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB99 begin + WENB_int[99] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB98 begin + WENB_int[98] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB97 begin + WENB_int[97] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB96 begin + WENB_int[96] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB95 begin + WENB_int[95] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB94 begin + WENB_int[94] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB93 begin + WENB_int[93] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB92 begin + WENB_int[92] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB91 begin + WENB_int[91] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB90 begin + WENB_int[90] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB89 begin + WENB_int[89] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB88 begin + WENB_int[88] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB87 begin + WENB_int[87] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB86 begin + WENB_int[86] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB85 begin + WENB_int[85] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB84 begin + WENB_int[84] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB83 begin + WENB_int[83] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB82 begin + WENB_int[82] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB81 begin + WENB_int[81] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB80 begin + WENB_int[80] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB79 begin + WENB_int[79] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB78 begin + WENB_int[78] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB77 begin + WENB_int[77] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB76 begin + WENB_int[76] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB75 begin + WENB_int[75] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB74 begin + WENB_int[74] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB73 begin + WENB_int[73] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB72 begin + WENB_int[72] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB71 begin + WENB_int[71] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB70 begin + WENB_int[70] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB69 begin + WENB_int[69] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB68 begin + WENB_int[68] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB67 begin + WENB_int[67] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB66 begin + WENB_int[66] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB65 begin + WENB_int[65] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB64 begin + WENB_int[64] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB63 begin + WENB_int[63] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB62 begin + WENB_int[62] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB61 begin + WENB_int[61] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB60 begin + WENB_int[60] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB59 begin + WENB_int[59] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB58 begin + WENB_int[58] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB57 begin + WENB_int[57] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB56 begin + WENB_int[56] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB55 begin + WENB_int[55] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB54 begin + WENB_int[54] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB53 begin + WENB_int[53] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB52 begin + WENB_int[52] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB51 begin + WENB_int[51] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB50 begin + WENB_int[50] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB49 begin + WENB_int[49] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB48 begin + WENB_int[48] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB47 begin + WENB_int[47] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB46 begin + WENB_int[46] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB45 begin + WENB_int[45] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB44 begin + WENB_int[44] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB43 begin + WENB_int[43] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB42 begin + WENB_int[42] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB41 begin + WENB_int[41] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB40 begin + WENB_int[40] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB39 begin + WENB_int[39] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB38 begin + WENB_int[38] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB37 begin + WENB_int[37] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB36 begin + WENB_int[36] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB35 begin + WENB_int[35] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB34 begin + WENB_int[34] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB33 begin + WENB_int[33] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB32 begin + WENB_int[32] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB31 begin + WENB_int[31] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB30 begin + WENB_int[30] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB29 begin + WENB_int[29] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB28 begin + WENB_int[28] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB27 begin + WENB_int[27] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB26 begin + WENB_int[26] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB25 begin + WENB_int[25] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB24 begin + WENB_int[24] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB23 begin + WENB_int[23] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB22 begin + WENB_int[22] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB21 begin + WENB_int[21] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB20 begin + WENB_int[20] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB19 begin + WENB_int[19] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB18 begin + WENB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB17 begin + WENB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB16 begin + WENB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB15 begin + WENB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB14 begin + WENB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB13 begin + WENB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB12 begin + WENB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB11 begin + WENB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB10 begin + WENB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB9 begin + WENB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB8 begin + WENB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB7 begin + WENB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB6 begin + WENB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB5 begin + WENB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB4 begin + WENB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB3 begin + WENB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB2 begin + WENB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB1 begin + WENB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_WENB0 begin + WENB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB4 begin + AB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB3 begin + AB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB2 begin + AB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB1 begin + AB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB0 begin + AB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB127 begin + DB_int[127] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB126 begin + DB_int[126] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB125 begin + DB_int[125] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB124 begin + DB_int[124] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB123 begin + DB_int[123] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB122 begin + DB_int[122] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB121 begin + DB_int[121] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB120 begin + DB_int[120] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB119 begin + DB_int[119] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB118 begin + DB_int[118] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB117 begin + DB_int[117] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB116 begin + DB_int[116] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB115 begin + DB_int[115] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB114 begin + DB_int[114] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB113 begin + DB_int[113] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB112 begin + DB_int[112] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB111 begin + DB_int[111] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB110 begin + DB_int[110] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB109 begin + DB_int[109] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB108 begin + DB_int[108] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB107 begin + DB_int[107] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB106 begin + DB_int[106] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB105 begin + DB_int[105] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB104 begin + DB_int[104] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB103 begin + DB_int[103] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB102 begin + DB_int[102] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB101 begin + DB_int[101] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB100 begin + DB_int[100] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB99 begin + DB_int[99] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB98 begin + DB_int[98] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB97 begin + DB_int[97] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB96 begin + DB_int[96] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB95 begin + DB_int[95] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB94 begin + DB_int[94] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB93 begin + DB_int[93] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB92 begin + DB_int[92] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB91 begin + DB_int[91] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB90 begin + DB_int[90] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB89 begin + DB_int[89] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB88 begin + DB_int[88] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB87 begin + DB_int[87] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB86 begin + DB_int[86] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB85 begin + DB_int[85] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB84 begin + DB_int[84] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB83 begin + DB_int[83] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB82 begin + DB_int[82] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB81 begin + DB_int[81] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB80 begin + DB_int[80] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB79 begin + DB_int[79] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB78 begin + DB_int[78] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB77 begin + DB_int[77] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB76 begin + DB_int[76] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB75 begin + DB_int[75] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB74 begin + DB_int[74] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB73 begin + DB_int[73] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB72 begin + DB_int[72] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB71 begin + DB_int[71] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB70 begin + DB_int[70] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB69 begin + DB_int[69] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB68 begin + DB_int[68] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB67 begin + DB_int[67] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB66 begin + DB_int[66] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB65 begin + DB_int[65] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB64 begin + DB_int[64] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB63 begin + DB_int[63] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB62 begin + DB_int[62] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB61 begin + DB_int[61] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB60 begin + DB_int[60] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB59 begin + DB_int[59] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB58 begin + DB_int[58] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB57 begin + DB_int[57] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB56 begin + DB_int[56] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB55 begin + DB_int[55] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB54 begin + DB_int[54] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB53 begin + DB_int[53] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB52 begin + DB_int[52] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB51 begin + DB_int[51] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB50 begin + DB_int[50] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB49 begin + DB_int[49] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB48 begin + DB_int[48] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB47 begin + DB_int[47] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB46 begin + DB_int[46] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB45 begin + DB_int[45] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB44 begin + DB_int[44] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB43 begin + DB_int[43] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB42 begin + DB_int[42] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB41 begin + DB_int[41] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB40 begin + DB_int[40] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB39 begin + DB_int[39] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB38 begin + DB_int[38] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB37 begin + DB_int[37] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB36 begin + DB_int[36] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB35 begin + DB_int[35] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB34 begin + DB_int[34] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB33 begin + DB_int[33] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB32 begin + DB_int[32] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB31 begin + DB_int[31] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB30 begin + DB_int[30] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB29 begin + DB_int[29] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB28 begin + DB_int[28] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB27 begin + DB_int[27] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB26 begin + DB_int[26] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB25 begin + DB_int[25] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB24 begin + DB_int[24] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB23 begin + DB_int[23] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB22 begin + DB_int[22] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB21 begin + DB_int[21] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB20 begin + DB_int[20] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB19 begin + DB_int[19] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB18 begin + DB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB17 begin + DB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB16 begin + DB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB15 begin + DB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB14 begin + DB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB13 begin + DB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB12 begin + DB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB11 begin + DB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB10 begin + DB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB9 begin + DB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB8 begin + DB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB7 begin + DB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB6 begin + DB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB5 begin + DB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB4 begin + DB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB3 begin + DB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB2 begin + DB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB1 begin + DB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB0 begin + DB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAA2 begin + EMAA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAA1 begin + EMAA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAA0 begin + EMAA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMASA begin + EMASA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAB2 begin + EMAB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAB1 begin + EMAB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAB0 begin + EMAB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TENA begin + TENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TCENA begin + CENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA4 begin + AA_int[4] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA3 begin + AA_int[3] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA2 begin + AA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA1 begin + AA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA0 begin + AA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TENB begin + TENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TCENB begin + CENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB127 begin + WENB_int[127] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB126 begin + WENB_int[126] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB125 begin + WENB_int[125] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB124 begin + WENB_int[124] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB123 begin + WENB_int[123] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB122 begin + WENB_int[122] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB121 begin + WENB_int[121] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB120 begin + WENB_int[120] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB119 begin + WENB_int[119] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB118 begin + WENB_int[118] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB117 begin + WENB_int[117] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB116 begin + WENB_int[116] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB115 begin + WENB_int[115] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB114 begin + WENB_int[114] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB113 begin + WENB_int[113] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB112 begin + WENB_int[112] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB111 begin + WENB_int[111] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB110 begin + WENB_int[110] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB109 begin + WENB_int[109] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB108 begin + WENB_int[108] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB107 begin + WENB_int[107] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB106 begin + WENB_int[106] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB105 begin + WENB_int[105] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB104 begin + WENB_int[104] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB103 begin + WENB_int[103] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB102 begin + WENB_int[102] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB101 begin + WENB_int[101] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB100 begin + WENB_int[100] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB99 begin + WENB_int[99] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB98 begin + WENB_int[98] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB97 begin + WENB_int[97] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB96 begin + WENB_int[96] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB95 begin + WENB_int[95] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB94 begin + WENB_int[94] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB93 begin + WENB_int[93] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB92 begin + WENB_int[92] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB91 begin + WENB_int[91] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB90 begin + WENB_int[90] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB89 begin + WENB_int[89] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB88 begin + WENB_int[88] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB87 begin + WENB_int[87] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB86 begin + WENB_int[86] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB85 begin + WENB_int[85] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB84 begin + WENB_int[84] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB83 begin + WENB_int[83] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB82 begin + WENB_int[82] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB81 begin + WENB_int[81] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB80 begin + WENB_int[80] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB79 begin + WENB_int[79] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB78 begin + WENB_int[78] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB77 begin + WENB_int[77] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB76 begin + WENB_int[76] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB75 begin + WENB_int[75] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB74 begin + WENB_int[74] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB73 begin + WENB_int[73] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB72 begin + WENB_int[72] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB71 begin + WENB_int[71] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB70 begin + WENB_int[70] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB69 begin + WENB_int[69] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB68 begin + WENB_int[68] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB67 begin + WENB_int[67] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB66 begin + WENB_int[66] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB65 begin + WENB_int[65] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB64 begin + WENB_int[64] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB63 begin + WENB_int[63] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB62 begin + WENB_int[62] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB61 begin + WENB_int[61] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB60 begin + WENB_int[60] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB59 begin + WENB_int[59] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB58 begin + WENB_int[58] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB57 begin + WENB_int[57] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB56 begin + WENB_int[56] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB55 begin + WENB_int[55] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB54 begin + WENB_int[54] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB53 begin + WENB_int[53] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB52 begin + WENB_int[52] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB51 begin + WENB_int[51] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB50 begin + WENB_int[50] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB49 begin + WENB_int[49] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB48 begin + WENB_int[48] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB47 begin + WENB_int[47] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB46 begin + WENB_int[46] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB45 begin + WENB_int[45] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB44 begin + WENB_int[44] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB43 begin + WENB_int[43] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB42 begin + WENB_int[42] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB41 begin + WENB_int[41] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB40 begin + WENB_int[40] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB39 begin + WENB_int[39] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB38 begin + WENB_int[38] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB37 begin + WENB_int[37] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB36 begin + WENB_int[36] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB35 begin + WENB_int[35] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB34 begin + WENB_int[34] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB33 begin + WENB_int[33] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB32 begin + WENB_int[32] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB31 begin + WENB_int[31] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB30 begin + WENB_int[30] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB29 begin + WENB_int[29] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB28 begin + WENB_int[28] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB27 begin + WENB_int[27] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB26 begin + WENB_int[26] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB25 begin + WENB_int[25] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB24 begin + WENB_int[24] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB23 begin + WENB_int[23] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB22 begin + WENB_int[22] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB21 begin + WENB_int[21] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB20 begin + WENB_int[20] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB19 begin + WENB_int[19] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB18 begin + WENB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB17 begin + WENB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB16 begin + WENB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB15 begin + WENB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB14 begin + WENB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB13 begin + WENB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB12 begin + WENB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB11 begin + WENB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB10 begin + WENB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB9 begin + WENB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB8 begin + WENB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB7 begin + WENB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB6 begin + WENB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB5 begin + WENB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB4 begin + WENB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB3 begin + WENB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB2 begin + WENB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB1 begin + WENB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TWENB0 begin + WENB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB4 begin + AB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB3 begin + AB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB2 begin + AB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB1 begin + AB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB0 begin + AB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB127 begin + DB_int[127] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB126 begin + DB_int[126] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB125 begin + DB_int[125] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB124 begin + DB_int[124] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB123 begin + DB_int[123] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB122 begin + DB_int[122] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB121 begin + DB_int[121] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB120 begin + DB_int[120] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB119 begin + DB_int[119] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB118 begin + DB_int[118] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB117 begin + DB_int[117] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB116 begin + DB_int[116] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB115 begin + DB_int[115] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB114 begin + DB_int[114] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB113 begin + DB_int[113] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB112 begin + DB_int[112] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB111 begin + DB_int[111] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB110 begin + DB_int[110] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB109 begin + DB_int[109] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB108 begin + DB_int[108] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB107 begin + DB_int[107] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB106 begin + DB_int[106] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB105 begin + DB_int[105] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB104 begin + DB_int[104] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB103 begin + DB_int[103] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB102 begin + DB_int[102] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB101 begin + DB_int[101] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB100 begin + DB_int[100] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB99 begin + DB_int[99] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB98 begin + DB_int[98] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB97 begin + DB_int[97] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB96 begin + DB_int[96] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB95 begin + DB_int[95] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB94 begin + DB_int[94] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB93 begin + DB_int[93] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB92 begin + DB_int[92] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB91 begin + DB_int[91] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB90 begin + DB_int[90] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB89 begin + DB_int[89] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB88 begin + DB_int[88] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB87 begin + DB_int[87] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB86 begin + DB_int[86] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB85 begin + DB_int[85] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB84 begin + DB_int[84] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB83 begin + DB_int[83] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB82 begin + DB_int[82] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB81 begin + DB_int[81] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB80 begin + DB_int[80] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB79 begin + DB_int[79] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB78 begin + DB_int[78] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB77 begin + DB_int[77] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB76 begin + DB_int[76] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB75 begin + DB_int[75] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB74 begin + DB_int[74] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB73 begin + DB_int[73] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB72 begin + DB_int[72] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB71 begin + DB_int[71] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB70 begin + DB_int[70] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB69 begin + DB_int[69] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB68 begin + DB_int[68] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB67 begin + DB_int[67] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB66 begin + DB_int[66] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB65 begin + DB_int[65] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB64 begin + DB_int[64] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB63 begin + DB_int[63] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB62 begin + DB_int[62] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB61 begin + DB_int[61] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB60 begin + DB_int[60] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB59 begin + DB_int[59] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB58 begin + DB_int[58] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB57 begin + DB_int[57] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB56 begin + DB_int[56] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB55 begin + DB_int[55] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB54 begin + DB_int[54] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB53 begin + DB_int[53] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB52 begin + DB_int[52] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB51 begin + DB_int[51] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB50 begin + DB_int[50] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB49 begin + DB_int[49] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB48 begin + DB_int[48] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB47 begin + DB_int[47] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB46 begin + DB_int[46] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB45 begin + DB_int[45] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB44 begin + DB_int[44] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB43 begin + DB_int[43] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB42 begin + DB_int[42] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB41 begin + DB_int[41] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB40 begin + DB_int[40] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB39 begin + DB_int[39] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB38 begin + DB_int[38] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB37 begin + DB_int[37] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB36 begin + DB_int[36] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB35 begin + DB_int[35] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB34 begin + DB_int[34] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB33 begin + DB_int[33] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB32 begin + DB_int[32] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB31 begin + DB_int[31] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB30 begin + DB_int[30] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB29 begin + DB_int[29] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB28 begin + DB_int[28] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB27 begin + DB_int[27] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB26 begin + DB_int[26] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB25 begin + DB_int[25] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB24 begin + DB_int[24] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB23 begin + DB_int[23] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB22 begin + DB_int[22] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB21 begin + DB_int[21] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB20 begin + DB_int[20] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB19 begin + DB_int[19] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB18 begin + DB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB17 begin + DB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB16 begin + DB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB15 begin + DB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB14 begin + DB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB13 begin + DB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB12 begin + DB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB11 begin + DB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB10 begin + DB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB9 begin + DB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB8 begin + DB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB7 begin + DB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB6 begin + DB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB5 begin + DB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB4 begin + DB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB3 begin + DB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB2 begin + DB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB1 begin + DB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB0 begin + DB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIA1 begin + SIA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_SIA0 begin + SIA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_SEA begin + SEA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_DFTRAMBYP_CLKA begin + DFTRAMBYP_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_DFTRAMBYP_CLKB begin + DFTRAMBYP_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_RET1N begin + RET1N_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIB1 begin + SIB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIB0 begin + SIB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SEB begin + SEB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_COLLDISN begin + COLLDISN_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + + always @ NOT_CONTA begin + cont_flag0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_PER begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_MINH begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_MINL begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CONTB begin + cont_flag1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_PER begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_MINH begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_MINL begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + + + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp; + wire RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp; + + wire RET1Neq1aTENAeq1, RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0; + wire RET1Neq1aTENBeq1, RET1Neq1aTENBeq1aCENBeq0, RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1; + wire RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, RET1Neq1aTENAeq0, RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1; + wire RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, RET1Neq1aTENBeq0, RET1Neq1aTENBeq0aTCENBeq0; + wire RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0; + wire RET1Neq1aSEAeq1, RET1Neq1aSEBeq1, RET1Neq1, RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp; + wire RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp; + + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&!EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&!EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&!EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&!EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&EMAB[1]&&EMAB[0]; + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[127])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[126])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[125])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[124])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[123])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[122])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[121])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[120])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[119])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[118])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[117])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[116])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[115])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[114])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[113])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[112])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[111])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[110])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[109])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[108])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[107])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[106])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[105])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[104])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[103])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[102])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[101])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[100])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[99])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[98])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[97])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[96])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[95])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[94])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[93])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[92])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[91])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[90])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[89])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[88])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[87])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[86])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[85])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[84])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[83])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[82])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[81])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[80])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[79])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[78])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[77])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[76])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[75])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[74])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[73])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[72])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[71])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[70])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[69])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[68])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[67])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[66])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[65])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[64])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[63])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[62])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[61])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[60])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[59])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[58])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[57])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[56])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[55])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[54])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[53])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[52])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[51])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[50])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[49])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[48])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[47])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[46])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[45])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[44])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[43])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[42])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[41])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[40])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[39])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[38])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[37])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[36])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[35])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[34])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[33])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[32])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[31])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[30])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[29])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[28])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[27])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[26])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[25])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[24])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[23])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[22])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[21])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[20])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[19])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[18])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[17])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[16])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[15])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[14])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[13])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[12])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[11])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[10])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[9])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[8])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[7])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[6])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[5])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[4])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[3])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[2])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[1])); + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB&&!WENB[0])); + assign RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp = + RET1N&&(((TENA&&!CENA&&!DFTRAMBYP)||(!TENA&&!TCENA&&!DFTRAMBYP))||DFTRAMBYP); + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[127])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[126])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[125])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[124])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[123])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[122])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[121])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[120])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[119])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[118])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[117])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[116])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[115])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[114])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[113])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[112])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[111])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[110])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[109])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[108])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[107])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[106])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[105])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[104])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[103])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[102])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[101])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[100])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[99])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[98])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[97])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[96])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[95])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[94])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[93])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[92])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[91])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[90])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[89])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[88])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[87])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[86])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[85])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[84])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[83])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[82])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[81])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[80])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[79])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[78])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[77])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[76])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[75])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[74])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[73])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[72])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[71])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[70])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[69])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[68])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[67])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[66])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[65])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[64])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[63])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[62])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[61])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[60])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[59])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[58])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[57])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[56])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[55])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[54])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[53])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[52])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[51])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[50])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[49])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[48])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[47])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[46])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[45])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[44])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[43])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[42])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[41])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[40])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[39])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[38])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[37])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[36])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[35])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[34])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[33])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[32])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[31])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[30])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[29])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[28])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[27])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[26])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[25])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[24])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[23])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[22])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[21])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[20])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[19])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[18])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[17])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[16])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[15])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[14])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[13])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[12])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[11])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[10])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[9])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[8])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[7])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[6])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[5])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[4])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[3])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[2])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[1])); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP&&!TWENB[0])); + + assign RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1 = RET1N&&TENA&&!CENA&&COLLDISN; + assign RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0 = RET1N&&TENA&&!CENA&&!COLLDISN; + assign RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1 = RET1N&&TENB&&!CENB&&COLLDISN; + assign RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0 = RET1N&&TENB&&!CENB&&!COLLDISN; + assign RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1 = RET1N&&!TENA&&!TCENA&&COLLDISN; + assign RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0 = RET1N&&!TENA&&!TCENA&&!COLLDISN; + assign RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1 = RET1N&&!TENB&&!TCENB&&COLLDISN; + assign RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0 = RET1N&&!TENB&&!TCENB&&!COLLDISN; + assign RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp = RET1N&&((TENA&&!CENA)||(!TENA&&!TCENA)); + assign RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp = RET1N&&((TENB&&!CENB)||(!TENB&&!TCENB)); + + assign RET1Neq1aTENBeq1aCENBeq0 = RET1N&&TENB&&!CENB; + assign RET1Neq1aTENBeq0aTCENBeq0 = RET1N&&!TENB&&!TCENB; + + assign RET1Neq1aTENAeq1 = RET1N&&TENA; + assign RET1Neq1aTENBeq1 = RET1N&&TENB; + assign RET1Neq1aTENAeq0 = RET1N&&!TENA; + assign RET1Neq1aTENBeq0 = RET1N&&!TENB; + assign RET1Neq1aSEAeq1 = RET1N&&SEA; + assign RET1Neq1aSEBeq1 = RET1N&&SEB; + assign RET1Neq1 = RET1N; + + specify + + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (CENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TCENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1) + (TENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0) + (TENA -=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[4] +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[3] +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[2] +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[1] +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[0] +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[4] +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[3] +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[2] +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[1] +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[0] +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1) + (TENA +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1) + (TENA +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1) + (TENA +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1) + (TENA +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1) + (TENA +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0) + (TENA -=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0) + (TENA -=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0) + (TENA -=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0) + (TENA -=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0) + (TENA -=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (CENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TCENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1) + (TENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0) + (TENB -=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[127] +=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[126] +=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[125] +=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[124] +=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[123] +=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[122] +=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[121] +=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[120] +=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[119] +=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[118] +=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[117] +=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[116] +=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[115] +=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[114] +=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[113] +=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[112] +=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[111] +=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[110] +=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[109] +=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[108] +=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[107] +=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[106] +=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[105] +=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[104] +=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[103] +=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[102] +=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[101] +=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[100] +=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[99] +=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[98] +=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[97] +=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[96] +=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[95] +=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[94] +=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[93] +=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[92] +=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[91] +=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[90] +=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[89] +=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[88] +=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[87] +=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[86] +=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[85] +=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[84] +=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[83] +=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[82] +=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[81] +=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[80] +=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[79] +=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[78] +=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[77] +=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[76] +=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[75] +=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[74] +=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[73] +=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[72] +=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[71] +=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[70] +=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[69] +=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[68] +=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[67] +=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[66] +=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[65] +=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[64] +=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[63] +=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[62] +=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[61] +=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[60] +=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[59] +=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[58] +=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[57] +=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[56] +=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[55] +=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[54] +=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[53] +=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[52] +=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[51] +=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[50] +=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[49] +=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[48] +=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[47] +=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[46] +=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[45] +=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[44] +=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[43] +=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[42] +=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[41] +=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[40] +=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[39] +=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[38] +=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[37] +=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[36] +=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[35] +=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[34] +=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[33] +=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[32] +=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[31] +=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[30] +=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[29] +=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[28] +=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[27] +=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[26] +=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[25] +=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[24] +=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[23] +=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[22] +=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[21] +=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[20] +=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[19] +=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[18] +=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[17] +=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[16] +=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[15] +=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[14] +=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[13] +=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[12] +=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[11] +=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[10] +=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[9] +=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[8] +=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[7] +=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[6] +=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[5] +=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[4] +=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[3] +=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[2] +=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[1] +=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (WENB[0] +=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[127] +=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[126] +=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[125] +=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[124] +=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[123] +=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[122] +=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[121] +=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[120] +=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[119] +=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[118] +=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[117] +=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[116] +=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[115] +=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[114] +=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[113] +=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[112] +=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[111] +=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[110] +=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[109] +=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[108] +=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[107] +=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[106] +=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[105] +=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[104] +=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[103] +=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[102] +=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[101] +=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[100] +=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[99] +=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[98] +=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[97] +=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[96] +=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[95] +=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[94] +=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[93] +=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[92] +=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[91] +=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[90] +=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[89] +=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[88] +=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[87] +=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[86] +=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[85] +=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[84] +=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[83] +=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[82] +=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[81] +=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[80] +=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[79] +=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[78] +=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[77] +=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[76] +=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[75] +=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[74] +=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[73] +=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[72] +=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[71] +=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[70] +=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[69] +=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[68] +=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[67] +=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[66] +=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[65] +=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[64] +=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[63] +=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[62] +=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[61] +=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[60] +=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[59] +=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[58] +=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[57] +=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[56] +=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[55] +=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[54] +=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[53] +=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[52] +=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[51] +=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[50] +=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[49] +=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[48] +=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[47] +=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[46] +=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[45] +=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[44] +=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[43] +=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[42] +=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[41] +=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[40] +=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[39] +=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[38] +=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[37] +=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[36] +=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[35] +=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[34] +=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[33] +=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[32] +=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[31] +=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[30] +=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[29] +=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[28] +=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[27] +=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[26] +=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[25] +=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[24] +=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[23] +=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[22] +=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[21] +=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[20] +=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[19] +=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[18] +=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[17] +=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[16] +=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[15] +=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[14] +=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[13] +=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[12] +=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[11] +=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[10] +=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[9] +=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[8] +=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[7] +=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[6] +=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[5] +=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[4] +=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[3] +=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[2] +=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[1] +=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TWENB[0] +=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[127] == 1'b0 && WENB[127] == 1'b1) + (TENB +=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[126] == 1'b0 && WENB[126] == 1'b1) + (TENB +=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[125] == 1'b0 && WENB[125] == 1'b1) + (TENB +=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[124] == 1'b0 && WENB[124] == 1'b1) + (TENB +=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[123] == 1'b0 && WENB[123] == 1'b1) + (TENB +=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[122] == 1'b0 && WENB[122] == 1'b1) + (TENB +=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[121] == 1'b0 && WENB[121] == 1'b1) + (TENB +=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[120] == 1'b0 && WENB[120] == 1'b1) + (TENB +=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[119] == 1'b0 && WENB[119] == 1'b1) + (TENB +=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[118] == 1'b0 && WENB[118] == 1'b1) + (TENB +=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[117] == 1'b0 && WENB[117] == 1'b1) + (TENB +=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[116] == 1'b0 && WENB[116] == 1'b1) + (TENB +=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[115] == 1'b0 && WENB[115] == 1'b1) + (TENB +=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[114] == 1'b0 && WENB[114] == 1'b1) + (TENB +=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[113] == 1'b0 && WENB[113] == 1'b1) + (TENB +=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[112] == 1'b0 && WENB[112] == 1'b1) + (TENB +=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[111] == 1'b0 && WENB[111] == 1'b1) + (TENB +=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[110] == 1'b0 && WENB[110] == 1'b1) + (TENB +=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[109] == 1'b0 && WENB[109] == 1'b1) + (TENB +=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[108] == 1'b0 && WENB[108] == 1'b1) + (TENB +=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[107] == 1'b0 && WENB[107] == 1'b1) + (TENB +=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[106] == 1'b0 && WENB[106] == 1'b1) + (TENB +=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[105] == 1'b0 && WENB[105] == 1'b1) + (TENB +=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[104] == 1'b0 && WENB[104] == 1'b1) + (TENB +=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[103] == 1'b0 && WENB[103] == 1'b1) + (TENB +=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[102] == 1'b0 && WENB[102] == 1'b1) + (TENB +=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[101] == 1'b0 && WENB[101] == 1'b1) + (TENB +=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[100] == 1'b0 && WENB[100] == 1'b1) + (TENB +=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[99] == 1'b0 && WENB[99] == 1'b1) + (TENB +=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[98] == 1'b0 && WENB[98] == 1'b1) + (TENB +=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[97] == 1'b0 && WENB[97] == 1'b1) + (TENB +=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[96] == 1'b0 && WENB[96] == 1'b1) + (TENB +=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[95] == 1'b0 && WENB[95] == 1'b1) + (TENB +=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[94] == 1'b0 && WENB[94] == 1'b1) + (TENB +=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[93] == 1'b0 && WENB[93] == 1'b1) + (TENB +=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[92] == 1'b0 && WENB[92] == 1'b1) + (TENB +=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[91] == 1'b0 && WENB[91] == 1'b1) + (TENB +=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[90] == 1'b0 && WENB[90] == 1'b1) + (TENB +=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[89] == 1'b0 && WENB[89] == 1'b1) + (TENB +=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[88] == 1'b0 && WENB[88] == 1'b1) + (TENB +=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[87] == 1'b0 && WENB[87] == 1'b1) + (TENB +=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[86] == 1'b0 && WENB[86] == 1'b1) + (TENB +=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[85] == 1'b0 && WENB[85] == 1'b1) + (TENB +=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[84] == 1'b0 && WENB[84] == 1'b1) + (TENB +=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[83] == 1'b0 && WENB[83] == 1'b1) + (TENB +=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[82] == 1'b0 && WENB[82] == 1'b1) + (TENB +=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[81] == 1'b0 && WENB[81] == 1'b1) + (TENB +=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[80] == 1'b0 && WENB[80] == 1'b1) + (TENB +=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[79] == 1'b0 && WENB[79] == 1'b1) + (TENB +=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[78] == 1'b0 && WENB[78] == 1'b1) + (TENB +=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[77] == 1'b0 && WENB[77] == 1'b1) + (TENB +=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[76] == 1'b0 && WENB[76] == 1'b1) + (TENB +=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[75] == 1'b0 && WENB[75] == 1'b1) + (TENB +=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[74] == 1'b0 && WENB[74] == 1'b1) + (TENB +=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[73] == 1'b0 && WENB[73] == 1'b1) + (TENB +=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[72] == 1'b0 && WENB[72] == 1'b1) + (TENB +=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[71] == 1'b0 && WENB[71] == 1'b1) + (TENB +=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[70] == 1'b0 && WENB[70] == 1'b1) + (TENB +=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[69] == 1'b0 && WENB[69] == 1'b1) + (TENB +=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[68] == 1'b0 && WENB[68] == 1'b1) + (TENB +=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[67] == 1'b0 && WENB[67] == 1'b1) + (TENB +=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[66] == 1'b0 && WENB[66] == 1'b1) + (TENB +=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[65] == 1'b0 && WENB[65] == 1'b1) + (TENB +=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[64] == 1'b0 && WENB[64] == 1'b1) + (TENB +=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[63] == 1'b0 && WENB[63] == 1'b1) + (TENB +=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[62] == 1'b0 && WENB[62] == 1'b1) + (TENB +=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[61] == 1'b0 && WENB[61] == 1'b1) + (TENB +=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[60] == 1'b0 && WENB[60] == 1'b1) + (TENB +=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[59] == 1'b0 && WENB[59] == 1'b1) + (TENB +=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[58] == 1'b0 && WENB[58] == 1'b1) + (TENB +=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[57] == 1'b0 && WENB[57] == 1'b1) + (TENB +=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[56] == 1'b0 && WENB[56] == 1'b1) + (TENB +=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[55] == 1'b0 && WENB[55] == 1'b1) + (TENB +=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[54] == 1'b0 && WENB[54] == 1'b1) + (TENB +=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[53] == 1'b0 && WENB[53] == 1'b1) + (TENB +=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[52] == 1'b0 && WENB[52] == 1'b1) + (TENB +=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[51] == 1'b0 && WENB[51] == 1'b1) + (TENB +=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[50] == 1'b0 && WENB[50] == 1'b1) + (TENB +=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[49] == 1'b0 && WENB[49] == 1'b1) + (TENB +=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[48] == 1'b0 && WENB[48] == 1'b1) + (TENB +=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[47] == 1'b0 && WENB[47] == 1'b1) + (TENB +=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[46] == 1'b0 && WENB[46] == 1'b1) + (TENB +=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[45] == 1'b0 && WENB[45] == 1'b1) + (TENB +=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[44] == 1'b0 && WENB[44] == 1'b1) + (TENB +=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[43] == 1'b0 && WENB[43] == 1'b1) + (TENB +=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[42] == 1'b0 && WENB[42] == 1'b1) + (TENB +=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[41] == 1'b0 && WENB[41] == 1'b1) + (TENB +=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[40] == 1'b0 && WENB[40] == 1'b1) + (TENB +=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[39] == 1'b0 && WENB[39] == 1'b1) + (TENB +=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[38] == 1'b0 && WENB[38] == 1'b1) + (TENB +=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[37] == 1'b0 && WENB[37] == 1'b1) + (TENB +=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[36] == 1'b0 && WENB[36] == 1'b1) + (TENB +=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[35] == 1'b0 && WENB[35] == 1'b1) + (TENB +=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[34] == 1'b0 && WENB[34] == 1'b1) + (TENB +=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[33] == 1'b0 && WENB[33] == 1'b1) + (TENB +=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[32] == 1'b0 && WENB[32] == 1'b1) + (TENB +=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[31] == 1'b0 && WENB[31] == 1'b1) + (TENB +=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[30] == 1'b0 && WENB[30] == 1'b1) + (TENB +=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[29] == 1'b0 && WENB[29] == 1'b1) + (TENB +=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[28] == 1'b0 && WENB[28] == 1'b1) + (TENB +=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[27] == 1'b0 && WENB[27] == 1'b1) + (TENB +=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[26] == 1'b0 && WENB[26] == 1'b1) + (TENB +=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[25] == 1'b0 && WENB[25] == 1'b1) + (TENB +=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[24] == 1'b0 && WENB[24] == 1'b1) + (TENB +=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[23] == 1'b0 && WENB[23] == 1'b1) + (TENB +=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[22] == 1'b0 && WENB[22] == 1'b1) + (TENB +=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[21] == 1'b0 && WENB[21] == 1'b1) + (TENB +=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[20] == 1'b0 && WENB[20] == 1'b1) + (TENB +=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[19] == 1'b0 && WENB[19] == 1'b1) + (TENB +=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[18] == 1'b0 && WENB[18] == 1'b1) + (TENB +=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[17] == 1'b0 && WENB[17] == 1'b1) + (TENB +=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[16] == 1'b0 && WENB[16] == 1'b1) + (TENB +=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[15] == 1'b0 && WENB[15] == 1'b1) + (TENB +=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[14] == 1'b0 && WENB[14] == 1'b1) + (TENB +=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[13] == 1'b0 && WENB[13] == 1'b1) + (TENB +=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[12] == 1'b0 && WENB[12] == 1'b1) + (TENB +=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[11] == 1'b0 && WENB[11] == 1'b1) + (TENB +=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[10] == 1'b0 && WENB[10] == 1'b1) + (TENB +=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[9] == 1'b0 && WENB[9] == 1'b1) + (TENB +=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[8] == 1'b0 && WENB[8] == 1'b1) + (TENB +=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[7] == 1'b0 && WENB[7] == 1'b1) + (TENB +=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[6] == 1'b0 && WENB[6] == 1'b1) + (TENB +=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[5] == 1'b0 && WENB[5] == 1'b1) + (TENB +=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[4] == 1'b0 && WENB[4] == 1'b1) + (TENB +=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[3] == 1'b0 && WENB[3] == 1'b1) + (TENB +=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[2] == 1'b0 && WENB[2] == 1'b1) + (TENB +=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[1] == 1'b0 && WENB[1] == 1'b1) + (TENB +=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[0] == 1'b0 && WENB[0] == 1'b1) + (TENB +=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[127] == 1'b1 && WENB[127] == 1'b0) + (TENB -=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[126] == 1'b1 && WENB[126] == 1'b0) + (TENB -=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[125] == 1'b1 && WENB[125] == 1'b0) + (TENB -=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[124] == 1'b1 && WENB[124] == 1'b0) + (TENB -=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[123] == 1'b1 && WENB[123] == 1'b0) + (TENB -=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[122] == 1'b1 && WENB[122] == 1'b0) + (TENB -=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[121] == 1'b1 && WENB[121] == 1'b0) + (TENB -=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[120] == 1'b1 && WENB[120] == 1'b0) + (TENB -=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[119] == 1'b1 && WENB[119] == 1'b0) + (TENB -=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[118] == 1'b1 && WENB[118] == 1'b0) + (TENB -=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[117] == 1'b1 && WENB[117] == 1'b0) + (TENB -=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[116] == 1'b1 && WENB[116] == 1'b0) + (TENB -=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[115] == 1'b1 && WENB[115] == 1'b0) + (TENB -=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[114] == 1'b1 && WENB[114] == 1'b0) + (TENB -=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[113] == 1'b1 && WENB[113] == 1'b0) + (TENB -=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[112] == 1'b1 && WENB[112] == 1'b0) + (TENB -=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[111] == 1'b1 && WENB[111] == 1'b0) + (TENB -=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[110] == 1'b1 && WENB[110] == 1'b0) + (TENB -=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[109] == 1'b1 && WENB[109] == 1'b0) + (TENB -=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[108] == 1'b1 && WENB[108] == 1'b0) + (TENB -=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[107] == 1'b1 && WENB[107] == 1'b0) + (TENB -=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[106] == 1'b1 && WENB[106] == 1'b0) + (TENB -=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[105] == 1'b1 && WENB[105] == 1'b0) + (TENB -=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[104] == 1'b1 && WENB[104] == 1'b0) + (TENB -=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[103] == 1'b1 && WENB[103] == 1'b0) + (TENB -=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[102] == 1'b1 && WENB[102] == 1'b0) + (TENB -=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[101] == 1'b1 && WENB[101] == 1'b0) + (TENB -=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[100] == 1'b1 && WENB[100] == 1'b0) + (TENB -=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[99] == 1'b1 && WENB[99] == 1'b0) + (TENB -=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[98] == 1'b1 && WENB[98] == 1'b0) + (TENB -=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[97] == 1'b1 && WENB[97] == 1'b0) + (TENB -=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[96] == 1'b1 && WENB[96] == 1'b0) + (TENB -=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[95] == 1'b1 && WENB[95] == 1'b0) + (TENB -=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[94] == 1'b1 && WENB[94] == 1'b0) + (TENB -=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[93] == 1'b1 && WENB[93] == 1'b0) + (TENB -=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[92] == 1'b1 && WENB[92] == 1'b0) + (TENB -=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[91] == 1'b1 && WENB[91] == 1'b0) + (TENB -=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[90] == 1'b1 && WENB[90] == 1'b0) + (TENB -=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[89] == 1'b1 && WENB[89] == 1'b0) + (TENB -=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[88] == 1'b1 && WENB[88] == 1'b0) + (TENB -=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[87] == 1'b1 && WENB[87] == 1'b0) + (TENB -=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[86] == 1'b1 && WENB[86] == 1'b0) + (TENB -=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[85] == 1'b1 && WENB[85] == 1'b0) + (TENB -=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[84] == 1'b1 && WENB[84] == 1'b0) + (TENB -=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[83] == 1'b1 && WENB[83] == 1'b0) + (TENB -=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[82] == 1'b1 && WENB[82] == 1'b0) + (TENB -=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[81] == 1'b1 && WENB[81] == 1'b0) + (TENB -=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[80] == 1'b1 && WENB[80] == 1'b0) + (TENB -=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[79] == 1'b1 && WENB[79] == 1'b0) + (TENB -=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[78] == 1'b1 && WENB[78] == 1'b0) + (TENB -=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[77] == 1'b1 && WENB[77] == 1'b0) + (TENB -=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[76] == 1'b1 && WENB[76] == 1'b0) + (TENB -=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[75] == 1'b1 && WENB[75] == 1'b0) + (TENB -=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[74] == 1'b1 && WENB[74] == 1'b0) + (TENB -=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[73] == 1'b1 && WENB[73] == 1'b0) + (TENB -=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[72] == 1'b1 && WENB[72] == 1'b0) + (TENB -=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[71] == 1'b1 && WENB[71] == 1'b0) + (TENB -=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[70] == 1'b1 && WENB[70] == 1'b0) + (TENB -=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[69] == 1'b1 && WENB[69] == 1'b0) + (TENB -=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[68] == 1'b1 && WENB[68] == 1'b0) + (TENB -=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[67] == 1'b1 && WENB[67] == 1'b0) + (TENB -=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[66] == 1'b1 && WENB[66] == 1'b0) + (TENB -=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[65] == 1'b1 && WENB[65] == 1'b0) + (TENB -=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[64] == 1'b1 && WENB[64] == 1'b0) + (TENB -=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[63] == 1'b1 && WENB[63] == 1'b0) + (TENB -=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[62] == 1'b1 && WENB[62] == 1'b0) + (TENB -=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[61] == 1'b1 && WENB[61] == 1'b0) + (TENB -=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[60] == 1'b1 && WENB[60] == 1'b0) + (TENB -=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[59] == 1'b1 && WENB[59] == 1'b0) + (TENB -=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[58] == 1'b1 && WENB[58] == 1'b0) + (TENB -=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[57] == 1'b1 && WENB[57] == 1'b0) + (TENB -=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[56] == 1'b1 && WENB[56] == 1'b0) + (TENB -=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[55] == 1'b1 && WENB[55] == 1'b0) + (TENB -=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[54] == 1'b1 && WENB[54] == 1'b0) + (TENB -=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[53] == 1'b1 && WENB[53] == 1'b0) + (TENB -=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[52] == 1'b1 && WENB[52] == 1'b0) + (TENB -=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[51] == 1'b1 && WENB[51] == 1'b0) + (TENB -=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[50] == 1'b1 && WENB[50] == 1'b0) + (TENB -=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[49] == 1'b1 && WENB[49] == 1'b0) + (TENB -=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[48] == 1'b1 && WENB[48] == 1'b0) + (TENB -=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[47] == 1'b1 && WENB[47] == 1'b0) + (TENB -=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[46] == 1'b1 && WENB[46] == 1'b0) + (TENB -=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[45] == 1'b1 && WENB[45] == 1'b0) + (TENB -=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[44] == 1'b1 && WENB[44] == 1'b0) + (TENB -=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[43] == 1'b1 && WENB[43] == 1'b0) + (TENB -=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[42] == 1'b1 && WENB[42] == 1'b0) + (TENB -=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[41] == 1'b1 && WENB[41] == 1'b0) + (TENB -=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[40] == 1'b1 && WENB[40] == 1'b0) + (TENB -=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[39] == 1'b1 && WENB[39] == 1'b0) + (TENB -=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[38] == 1'b1 && WENB[38] == 1'b0) + (TENB -=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[37] == 1'b1 && WENB[37] == 1'b0) + (TENB -=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[36] == 1'b1 && WENB[36] == 1'b0) + (TENB -=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[35] == 1'b1 && WENB[35] == 1'b0) + (TENB -=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[34] == 1'b1 && WENB[34] == 1'b0) + (TENB -=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[33] == 1'b1 && WENB[33] == 1'b0) + (TENB -=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[32] == 1'b1 && WENB[32] == 1'b0) + (TENB -=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[31] == 1'b1 && WENB[31] == 1'b0) + (TENB -=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[30] == 1'b1 && WENB[30] == 1'b0) + (TENB -=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[29] == 1'b1 && WENB[29] == 1'b0) + (TENB -=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[28] == 1'b1 && WENB[28] == 1'b0) + (TENB -=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[27] == 1'b1 && WENB[27] == 1'b0) + (TENB -=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[26] == 1'b1 && WENB[26] == 1'b0) + (TENB -=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[25] == 1'b1 && WENB[25] == 1'b0) + (TENB -=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[24] == 1'b1 && WENB[24] == 1'b0) + (TENB -=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[23] == 1'b1 && WENB[23] == 1'b0) + (TENB -=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[22] == 1'b1 && WENB[22] == 1'b0) + (TENB -=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[21] == 1'b1 && WENB[21] == 1'b0) + (TENB -=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[20] == 1'b1 && WENB[20] == 1'b0) + (TENB -=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[19] == 1'b1 && WENB[19] == 1'b0) + (TENB -=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[18] == 1'b1 && WENB[18] == 1'b0) + (TENB -=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[17] == 1'b1 && WENB[17] == 1'b0) + (TENB -=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[16] == 1'b1 && WENB[16] == 1'b0) + (TENB -=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[15] == 1'b1 && WENB[15] == 1'b0) + (TENB -=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[14] == 1'b1 && WENB[14] == 1'b0) + (TENB -=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[13] == 1'b1 && WENB[13] == 1'b0) + (TENB -=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[12] == 1'b1 && WENB[12] == 1'b0) + (TENB -=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[11] == 1'b1 && WENB[11] == 1'b0) + (TENB -=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[10] == 1'b1 && WENB[10] == 1'b0) + (TENB -=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[9] == 1'b1 && WENB[9] == 1'b0) + (TENB -=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[8] == 1'b1 && WENB[8] == 1'b0) + (TENB -=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[7] == 1'b1 && WENB[7] == 1'b0) + (TENB -=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[6] == 1'b1 && WENB[6] == 1'b0) + (TENB -=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[5] == 1'b1 && WENB[5] == 1'b0) + (TENB -=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[4] == 1'b1 && WENB[4] == 1'b0) + (TENB -=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[3] == 1'b1 && WENB[3] == 1'b0) + (TENB -=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[2] == 1'b1 && WENB[2] == 1'b0) + (TENB -=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[1] == 1'b1 && WENB[1] == 1'b0) + (TENB -=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TWENB[0] == 1'b1 && WENB[0] == 1'b0) + (TENB -=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[127]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[126]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[125]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[124]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[123]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[122]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[121]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[120]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[119]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[118]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[117]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[116]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[115]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[114]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[113]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[112]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[111]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[110]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[109]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[108]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[107]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[106]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[105]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[104]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[103]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[102]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[101]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[100]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[99]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[98]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[97]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[96]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[95]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[94]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[93]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[92]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[91]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[90]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[89]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[88]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[87]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[86]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[85]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[84]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[83]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[82]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[81]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[80]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[79]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[78]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[77]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[76]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[75]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[74]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[73]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[72]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[71]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[70]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[69]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[68]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[67]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[66]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[65]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[64]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[63]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[62]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[61]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[60]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[59]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[58]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[57]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[56]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[55]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[54]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[53]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[52]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[51]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[50]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[49]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[48]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[47]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[46]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[45]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[44]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[43]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[42]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[41]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[40]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[39]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[38]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[37]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[36]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[35]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[34]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[33]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[32]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[31]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[30]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[29]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[28]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[27]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[26]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[25]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[24]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[23]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[22]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[21]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[20]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[19]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[18]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[17]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[16]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[15]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[14]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[13]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[12]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[11]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[10]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[9]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[8]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[7]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[6]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[5]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> WENYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[4] +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[3] +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[2] +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[1] +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[0] +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[4] +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[3] +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[2] +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[1] +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[0] +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1) + (TENB +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1) + (TENB +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1) + (TENB +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1) + (TENB +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1) + (TENB +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0) + (TENB -=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0) + (TENB -=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0) + (TENB -=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0) + (TENB -=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0) + (TENB -=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[127] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[126] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[125] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[124] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[123] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[122] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[121] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[120] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[119] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[118] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[117] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[116] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[115] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[114] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[113] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[112] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[111] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[110] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[109] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[108] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[107] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[106] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[105] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[104] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[103] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[102] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[101] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[100] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[99] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[98] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[97] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[96] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[95] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[94] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[93] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[92] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[91] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[90] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[89] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[88] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[87] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[86] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[85] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[84] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[83] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[82] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[81] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[80] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[79] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[78] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[77] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[76] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[75] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[74] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[73] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[72] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[71] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[70] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[69] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[68] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[67] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[66] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[65] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[64] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (posedge CLKB => (SOB[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (posedge CLKB => (SOB[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $period(posedge CLKA, `ARM_MEM_PERIOD, NOT_CLKA_PER); + `else + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + `endif + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $period(posedge CLKB, `ARM_MEM_PERIOD, NOT_CLKB_PER); + `else + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + `endif + + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $width(posedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH); + $width(negedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL); + `else + $width(posedge CLKA &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH); + $width(negedge CLKA &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL); + `endif + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $width(posedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH); + $width(negedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL); + `else + $width(posedge CLKB &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH); + $width(negedge CLKB &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL); + `endif + + + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1, posedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1, negedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1, posedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1, negedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, posedge WENB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0, negedge WENB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_WENB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp, posedge DB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp, posedge DB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp, posedge DB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp, posedge DB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp, posedge DB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp, posedge DB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp, posedge DB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp, posedge DB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp, posedge DB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp, posedge DB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp, posedge DB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp, posedge DB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp, posedge DB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp, posedge DB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp, posedge DB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp, posedge DB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp, posedge DB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp, posedge DB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp, posedge DB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp, posedge DB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp, posedge DB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp, posedge DB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp, posedge DB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp, posedge DB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp, posedge DB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp, posedge DB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp, posedge DB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp, posedge DB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp, posedge DB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp, posedge DB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp, posedge DB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp, posedge DB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp, posedge DB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp, posedge DB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp, posedge DB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp, posedge DB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp, posedge DB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp, posedge DB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp, posedge DB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp, posedge DB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp, posedge DB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp, posedge DB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp, posedge DB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp, posedge DB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp, posedge DB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp, posedge DB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp, posedge DB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp, posedge DB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp, posedge DB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp, posedge DB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp, posedge DB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp, posedge DB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp, posedge DB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp, posedge DB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp, posedge DB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp, posedge DB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp, posedge DB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp, posedge DB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp, posedge DB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp, posedge DB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp, posedge DB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp, posedge DB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp, posedge DB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp, posedge DB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp, posedge DB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp, posedge DB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp, posedge DB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp, posedge DB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp, posedge DB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp, posedge DB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp, posedge DB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp, posedge DB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp, posedge DB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp, posedge DB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp, posedge DB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp, posedge DB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp, posedge DB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp, posedge DB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp, posedge DB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp, posedge DB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp, posedge DB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp, posedge DB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp, posedge DB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp, posedge DB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp, posedge DB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp, posedge DB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp, posedge DB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp, posedge DB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp, posedge DB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp, posedge DB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp, posedge DB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp, posedge DB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp, posedge DB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp, posedge DB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp, posedge DB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp, posedge DB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp, posedge DB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp, posedge DB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp, posedge DB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp, posedge DB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp, posedge DB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp, posedge DB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp, posedge DB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp, posedge DB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp, posedge DB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp, posedge DB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp, posedge DB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp, posedge DB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp, posedge DB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp, posedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp, posedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp, posedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp, posedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp, posedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp, posedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp, posedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp, posedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp, posedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp, posedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp, posedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp, posedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp, posedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp, posedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp, posedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp, posedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp, posedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp, posedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp, posedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp, negedge DB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp, negedge DB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp, negedge DB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp, negedge DB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp, negedge DB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp, negedge DB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp, negedge DB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp, negedge DB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp, negedge DB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp, negedge DB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp, negedge DB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp, negedge DB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp, negedge DB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp, negedge DB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp, negedge DB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp, negedge DB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp, negedge DB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp, negedge DB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp, negedge DB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp, negedge DB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp, negedge DB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp, negedge DB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp, negedge DB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp, negedge DB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp, negedge DB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp, negedge DB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp, negedge DB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp, negedge DB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp, negedge DB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp, negedge DB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp, negedge DB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp, negedge DB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp, negedge DB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp, negedge DB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp, negedge DB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp, negedge DB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp, negedge DB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp, negedge DB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp, negedge DB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp, negedge DB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp, negedge DB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp, negedge DB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp, negedge DB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp, negedge DB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp, negedge DB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp, negedge DB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp, negedge DB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp, negedge DB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp, negedge DB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp, negedge DB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp, negedge DB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp, negedge DB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp, negedge DB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp, negedge DB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp, negedge DB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp, negedge DB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp, negedge DB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp, negedge DB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp, negedge DB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp, negedge DB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp, negedge DB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp, negedge DB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp, negedge DB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp, negedge DB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp, negedge DB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp, negedge DB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp, negedge DB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp, negedge DB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp, negedge DB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp, negedge DB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp, negedge DB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp, negedge DB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp, negedge DB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp, negedge DB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp, negedge DB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp, negedge DB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp, negedge DB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp, negedge DB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp, negedge DB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp, negedge DB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp, negedge DB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp, negedge DB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp, negedge DB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp, negedge DB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp, negedge DB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp, negedge DB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp, negedge DB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp, negedge DB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp, negedge DB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp, negedge DB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp, negedge DB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp, negedge DB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp, negedge DB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp, negedge DB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp, negedge DB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp, negedge DB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp, negedge DB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp, negedge DB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp, negedge DB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp, negedge DB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp, negedge DB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp, negedge DB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp, negedge DB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp, negedge DB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp, negedge DB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp, negedge DB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp, negedge DB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp, negedge DB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp, negedge DB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp, negedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp, negedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp, negedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp, negedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp, negedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp, negedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp, negedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp, negedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp, negedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp, negedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp, negedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp, negedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp, negedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp, negedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp, negedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp, negedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp, negedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp, negedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp, negedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0); + $setuphold(posedge CLKA &&& RET1Neq1, posedge TENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge TENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0, posedge TCENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0, negedge TCENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKB &&& RET1Neq1, posedge TENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge TENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0, posedge TCENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0, negedge TCENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, posedge TWENB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0, negedge TWENB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TWENB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp, posedge TDB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp, posedge TDB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp, posedge TDB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp, posedge TDB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp, posedge TDB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp, posedge TDB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp, posedge TDB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp, posedge TDB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp, posedge TDB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp, posedge TDB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp, posedge TDB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp, posedge TDB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp, posedge TDB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp, posedge TDB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp, posedge TDB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp, posedge TDB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp, posedge TDB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp, posedge TDB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp, posedge TDB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp, posedge TDB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp, posedge TDB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp, posedge TDB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp, posedge TDB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp, posedge TDB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp, posedge TDB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp, posedge TDB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp, posedge TDB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp, posedge TDB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp, posedge TDB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp, posedge TDB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp, posedge TDB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp, posedge TDB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp, posedge TDB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp, posedge TDB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp, posedge TDB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp, posedge TDB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp, posedge TDB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp, posedge TDB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp, posedge TDB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp, posedge TDB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp, posedge TDB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp, posedge TDB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp, posedge TDB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp, posedge TDB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp, posedge TDB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp, posedge TDB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp, posedge TDB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp, posedge TDB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp, posedge TDB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp, posedge TDB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp, posedge TDB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp, posedge TDB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp, posedge TDB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp, posedge TDB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp, posedge TDB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp, posedge TDB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp, posedge TDB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp, posedge TDB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp, posedge TDB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp, posedge TDB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp, posedge TDB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp, posedge TDB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp, posedge TDB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp, posedge TDB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp, posedge TDB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp, posedge TDB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp, posedge TDB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp, posedge TDB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp, posedge TDB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp, posedge TDB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp, posedge TDB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp, posedge TDB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp, posedge TDB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp, posedge TDB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp, posedge TDB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp, posedge TDB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp, posedge TDB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp, posedge TDB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp, posedge TDB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp, posedge TDB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp, posedge TDB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp, posedge TDB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp, posedge TDB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp, posedge TDB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp, posedge TDB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp, posedge TDB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp, posedge TDB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp, posedge TDB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp, posedge TDB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp, posedge TDB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp, posedge TDB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp, posedge TDB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp, posedge TDB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp, posedge TDB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp, posedge TDB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp, posedge TDB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp, posedge TDB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp, posedge TDB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp, posedge TDB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp, posedge TDB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp, posedge TDB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp, posedge TDB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp, posedge TDB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp, posedge TDB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp, posedge TDB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp, posedge TDB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp, posedge TDB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp, posedge TDB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp, posedge TDB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp, posedge TDB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp, posedge TDB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp, posedge TDB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp, posedge TDB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp, posedge TDB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp, posedge TDB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp, posedge TDB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp, posedge TDB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp, posedge TDB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp, posedge TDB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp, posedge TDB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp, posedge TDB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp, posedge TDB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp, posedge TDB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp, posedge TDB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp, posedge TDB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp, posedge TDB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp, posedge TDB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp, posedge TDB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp, negedge TDB[127], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB127); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp, negedge TDB[126], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB126); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp, negedge TDB[125], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB125); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp, negedge TDB[124], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB124); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp, negedge TDB[123], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB123); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp, negedge TDB[122], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB122); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp, negedge TDB[121], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB121); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp, negedge TDB[120], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB120); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp, negedge TDB[119], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB119); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp, negedge TDB[118], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB118); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp, negedge TDB[117], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB117); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp, negedge TDB[116], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB116); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp, negedge TDB[115], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB115); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp, negedge TDB[114], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB114); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp, negedge TDB[113], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB113); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp, negedge TDB[112], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB112); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp, negedge TDB[111], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB111); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp, negedge TDB[110], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB110); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp, negedge TDB[109], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB109); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp, negedge TDB[108], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB108); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp, negedge TDB[107], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB107); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp, negedge TDB[106], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB106); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp, negedge TDB[105], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB105); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp, negedge TDB[104], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB104); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp, negedge TDB[103], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB103); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp, negedge TDB[102], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB102); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp, negedge TDB[101], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB101); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp, negedge TDB[100], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB100); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp, negedge TDB[99], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB99); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp, negedge TDB[98], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB98); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp, negedge TDB[97], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB97); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp, negedge TDB[96], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB96); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp, negedge TDB[95], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB95); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp, negedge TDB[94], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB94); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp, negedge TDB[93], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB93); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp, negedge TDB[92], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB92); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp, negedge TDB[91], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB91); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp, negedge TDB[90], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB90); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp, negedge TDB[89], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB89); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp, negedge TDB[88], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB88); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp, negedge TDB[87], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB87); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp, negedge TDB[86], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB86); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp, negedge TDB[85], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB85); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp, negedge TDB[84], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB84); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp, negedge TDB[83], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB83); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp, negedge TDB[82], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB82); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp, negedge TDB[81], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB81); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp, negedge TDB[80], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB80); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp, negedge TDB[79], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB79); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp, negedge TDB[78], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB78); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp, negedge TDB[77], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB77); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp, negedge TDB[76], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB76); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp, negedge TDB[75], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB75); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp, negedge TDB[74], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB74); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp, negedge TDB[73], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB73); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp, negedge TDB[72], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB72); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp, negedge TDB[71], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB71); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp, negedge TDB[70], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB70); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp, negedge TDB[69], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB69); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp, negedge TDB[68], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB68); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp, negedge TDB[67], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB67); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp, negedge TDB[66], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB66); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp, negedge TDB[65], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB65); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp, negedge TDB[64], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB64); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp, negedge TDB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB63); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp, negedge TDB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB62); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp, negedge TDB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB61); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp, negedge TDB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB60); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp, negedge TDB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB59); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp, negedge TDB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB58); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp, negedge TDB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB57); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp, negedge TDB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB56); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp, negedge TDB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB55); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp, negedge TDB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB54); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp, negedge TDB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB53); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp, negedge TDB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB52); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp, negedge TDB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB51); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp, negedge TDB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB50); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp, negedge TDB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB49); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp, negedge TDB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB48); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp, negedge TDB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB47); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp, negedge TDB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB46); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp, negedge TDB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB45); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp, negedge TDB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB44); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp, negedge TDB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB43); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp, negedge TDB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB42); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp, negedge TDB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB41); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp, negedge TDB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB40); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp, negedge TDB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB39); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp, negedge TDB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB38); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp, negedge TDB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB37); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp, negedge TDB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB36); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp, negedge TDB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB35); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp, negedge TDB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB34); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp, negedge TDB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB33); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp, negedge TDB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB32); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp, negedge TDB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB31); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp, negedge TDB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB30); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp, negedge TDB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB29); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp, negedge TDB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB28); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp, negedge TDB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB27); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp, negedge TDB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB26); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp, negedge TDB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB25); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp, negedge TDB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB24); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp, negedge TDB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB23); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp, negedge TDB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB22); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp, negedge TDB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB21); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp, negedge TDB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB20); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp, negedge TDB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB19); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp, negedge TDB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp, negedge TDB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp, negedge TDB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp, negedge TDB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp, negedge TDB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp, negedge TDB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp, negedge TDB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp, negedge TDB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp, negedge TDB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp, negedge TDB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp, negedge TDB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp, negedge TDB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp, negedge TDB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp, negedge TDB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp, negedge TDB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp, negedge TDB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp, negedge TDB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp, negedge TDB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp, negedge TDB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB0); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, posedge SIA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA1); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, posedge SIA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA0); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, negedge SIA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA1); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, negedge SIA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA0); + $setuphold(posedge CLKA &&& RET1Neq1, posedge SEA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge SEA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEA); + $setuphold(posedge CLKA &&& RET1Neq1, posedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKA); + $setuphold(posedge CLKB &&& RET1Neq1, posedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKB); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, posedge SIB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB1); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, posedge SIB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB0); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, negedge SIB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB1); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, negedge SIB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB0); + $setuphold(posedge CLKB &&& RET1Neq1, posedge SEB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge SEB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEB); + $setuphold(posedge CLKA &&& RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp, posedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKA &&& RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp, negedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKB &&& RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp, posedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKB &&& RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp, negedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(negedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge TCENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge TCENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge TCENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge TCENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge DFTRAMBYP, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge DFTRAMBYP, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, posedge DFTRAMBYP, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, posedge DFTRAMBYP, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + endspecify + + +endmodule +`endcelldefine + `endif +`endif +`timescale 1ns/1ps +module rf2_32x128_wm1_error_injection (Q_out, Q_in, CLK, A, CEN, DFTRAMBYP, SE); + output [127:0] Q_out; + input [127:0] Q_in; + input CLK; + input [4:0] A; + input CEN; + input DFTRAMBYP; + input SE; + parameter LEFT_RED_COLUMN_FAULT = 2'd1; + parameter RIGHT_RED_COLUMN_FAULT = 2'd2; + parameter NO_RED_FAULT = 2'd0; + reg [127:0] Q_out; + reg entry_found; + reg list_complete; + reg [16:0] fault_table [15:0]; + reg [16:0] fault_entry; +initial +begin + `ifdef DUT + `define pre_pend_path TB.DUT_inst.CHIP + `else + `define pre_pend_path TB.CHIP + `endif + `ifdef ARM_NONREPAIRABLE_FAULT + `pre_pend_path.SMARCHCHKBVCD_LVISION_MBISTPG_ASSEMBLY_UNDER_TEST_INST.MEM0_MEM_INST.u1.add_fault(5'd10,7'd70,2'd1,2'd0); + `endif +end + task add_fault; + //This task injects fault in memory + input [4:0] address; + input [6:0] bitPlace; + input [1:0] fault_type; + input [1:0] red_fault; + + integer i; + reg done; + begin + done = 1'b0; + i = 0; + while ((!done) && i < 15) + begin + fault_entry = fault_table[i]; + if (fault_entry[0] === 1'b0 || fault_entry[0] === 1'bx) + begin + fault_entry[0] = 1'b1; + fault_entry[2:1] = red_fault; + fault_entry[4:3] = fault_type; + fault_entry[11:5] = bitPlace; + fault_entry[16:12] = address; + fault_table[i] = fault_entry; + done = 1'b1; + end + i = i+1; + end + end + endtask +//This task removes all fault entries injected by user +task remove_all_faults; + integer i; +begin + for (i = 0; i < 16; i=i+1) + begin + fault_entry = fault_table[i]; + fault_entry[0] = 1'b0; + fault_table[i] = fault_entry; + end +end +endtask +task bit_error; +// This task is used to inject error in memory and should be called +// only from current module. +// +// This task injects error depending upon fault type to particular bit +// of the output + inout [127:0] q_int; + input [1:0] fault_type; + input [6:0] bitLoc; +begin + if (fault_type === 2'd0) + q_int[bitLoc] = 1'b0; + else if (fault_type === 2'd1) + q_int[bitLoc] = 1'b1; + else + q_int[bitLoc] = ~q_int[bitLoc]; +end +endtask +task error_injection_on_output; +// This function goes through error injection table for every +// read cycle and corrupts Q output if fault for the particular +// address is present in fault table +// +// If fault is redundant column is detected, this task corrupts +// Q output in read cycle +// +// If fault is repaired using repair bus, this task does not +// courrpt Q output in read cycle +// + output [127:0] Q_output; + reg list_complete; + integer i; + reg [3:0] row_address; + reg [0:0] column_address; + reg [6:0] bitPlace; + reg [1:0] fault_type; + reg [1:0] red_fault; + reg valid; + reg [5:0] msb_bit_calc; +begin + entry_found = 1'b0; + list_complete = 1'b0; + i = 0; + Q_output = Q_in; + while(!list_complete) + begin + fault_entry = fault_table[i]; + {row_address, column_address, bitPlace, fault_type, red_fault, valid} = fault_entry; + i = i + 1; + if (valid == 1'b1) + begin + if (red_fault === NO_RED_FAULT) + begin + if (row_address == A[4:1] && column_address == A[0:0]) + begin + if (bitPlace < 64) + bit_error(Q_output,fault_type, bitPlace); + else if (bitPlace >= 64 ) + bit_error(Q_output,fault_type, bitPlace); + end + end + end + else + list_complete = 1'b1; + end + end + endtask + always @ (Q_in or CLK or A or CEN) + begin + if (CEN === 1'b0 && DFTRAMBYP === 1'b0 && SE === 1'b0) + error_injection_on_output(Q_out); + else + Q_out = Q_in; + end +endmodule diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_antenna.clf b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_antenna.clf new file mode 100644 index 00000000..aa5920b4 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_antenna.clf @@ -0,0 +1,1121 @@ +# Copyright (c) 1993 - 2019 ARM Limited. All Rights Reserved. +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Limited. + +# PhyVGen V 8.3.0 +# ARM Version r4p0 +# Creation Date: Thu Oct 17 15:30:20 2019 + + +defineGateSize "rf2_32x128_wm1" "AA[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AA[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AA[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AA[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AA[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AA[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AA[3]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AA[3]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AA[4]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AA[4]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AB[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AB[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AB[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AB[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AB[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AB[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AB[3]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AB[3]" '(0.018) +defineGateSize "rf2_32x128_wm1" "AB[4]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "AB[4]" '(0.018) +defineGateSize "rf2_32x128_wm1" "CENA" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "CENA" '(0.018) +defineGateSize "rf2_32x128_wm1" "CENB" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "CENB" '(0.018) +defineGateSize "rf2_32x128_wm1" "CLKA" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "CLKA" '(0.018) +defineGateSize "rf2_32x128_wm1" "CLKB" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "CLKB" '(0.018) +defineGateSize "rf2_32x128_wm1" "COLLDISN" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "COLLDISN" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[100]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[100]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[101]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[101]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[102]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[102]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[103]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[103]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[104]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[104]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[105]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[105]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[106]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[106]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[107]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[107]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[108]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[108]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[109]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[109]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[10]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[10]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[110]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[110]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[111]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[111]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[112]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[112]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[113]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[113]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[114]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[114]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[115]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[115]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[116]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[116]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[117]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[117]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[118]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[118]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[119]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[119]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[11]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[11]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[120]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[120]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[121]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[121]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[122]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[122]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[123]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[123]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[124]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[124]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[125]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[125]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[126]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[126]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[127]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[127]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[12]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[12]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[13]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[13]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[14]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[14]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[15]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[15]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[16]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[16]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[17]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[17]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[18]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[18]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[19]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[19]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[20]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[20]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[21]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[21]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[22]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[22]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[23]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[23]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[24]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[24]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[25]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[25]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[26]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[26]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[27]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[27]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[28]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[28]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[29]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[29]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[30]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[30]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[31]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[31]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[32]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[32]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[33]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[33]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[34]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[34]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[35]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[35]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[36]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[36]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[37]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[37]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[38]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[38]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[39]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[39]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[3]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[3]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[40]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[40]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[41]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[41]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[42]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[42]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[43]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[43]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[44]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[44]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[45]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[45]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[46]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[46]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[47]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[47]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[48]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[48]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[49]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[49]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[4]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[4]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[50]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[50]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[51]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[51]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[52]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[52]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[53]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[53]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[54]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[54]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[55]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[55]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[56]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[56]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[57]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[57]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[58]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[58]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[59]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[59]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[5]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[5]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[60]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[60]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[61]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[61]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[62]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[62]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[63]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[63]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[64]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[64]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[65]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[65]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[66]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[66]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[67]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[67]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[68]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[68]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[69]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[69]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[6]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[6]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[70]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[70]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[71]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[71]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[72]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[72]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[73]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[73]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[74]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[74]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[75]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[75]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[76]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[76]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[77]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[77]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[78]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[78]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[79]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[79]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[7]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[7]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[80]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[80]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[81]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[81]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[82]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[82]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[83]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[83]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[84]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[84]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[85]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[85]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[86]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[86]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[87]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[87]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[88]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[88]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[89]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[89]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[8]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[8]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[90]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[90]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[91]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[91]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[92]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[92]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[93]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[93]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[94]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[94]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[95]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[95]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[96]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[96]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[97]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[97]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[98]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[98]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[99]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[99]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DB[9]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DB[9]" '(0.018) +defineGateSize "rf2_32x128_wm1" "DFTRAMBYP" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "DFTRAMBYP" '(0.018) +defineGateSize "rf2_32x128_wm1" "EMAA[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "EMAA[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "EMAA[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "EMAA[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "EMAA[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "EMAA[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "EMAB[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "EMAB[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "EMAB[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "EMAB[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "EMAB[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "EMAB[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "EMASA" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "EMASA" '(0.018) +defineGateSize "rf2_32x128_wm1" "RET1N" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "RET1N" '(0.018) +defineGateSize "rf2_32x128_wm1" "SEA" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "SEA" '(0.018) +defineGateSize "rf2_32x128_wm1" "SEB" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "SEB" '(0.018) +defineGateSize "rf2_32x128_wm1" "SIA[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "SIA[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "SIA[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "SIA[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "SIB[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "SIB[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "SIB[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "SIB[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAA[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAA[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAA[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAA[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAA[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAA[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAA[3]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAA[3]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAA[4]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAA[4]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAB[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAB[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAB[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAB[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAB[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAB[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAB[3]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAB[3]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TAB[4]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TAB[4]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TCENA" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TCENA" '(0.018) +defineGateSize "rf2_32x128_wm1" "TCENB" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TCENB" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[100]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[100]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[101]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[101]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[102]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[102]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[103]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[103]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[104]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[104]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[105]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[105]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[106]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[106]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[107]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[107]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[108]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[108]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[109]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[109]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[10]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[10]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[110]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[110]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[111]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[111]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[112]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[112]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[113]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[113]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[114]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[114]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[115]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[115]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[116]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[116]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[117]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[117]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[118]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[118]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[119]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[119]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[11]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[11]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[120]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[120]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[121]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[121]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[122]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[122]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[123]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[123]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[124]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[124]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[125]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[125]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[126]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[126]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[127]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[127]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[12]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[12]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[13]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[13]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[14]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[14]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[15]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[15]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[16]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[16]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[17]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[17]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[18]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[18]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[19]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[19]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[20]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[20]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[21]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[21]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[22]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[22]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[23]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[23]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[24]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[24]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[25]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[25]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[26]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[26]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[27]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[27]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[28]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[28]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[29]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[29]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[30]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[30]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[31]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[31]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[32]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[32]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[33]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[33]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[34]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[34]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[35]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[35]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[36]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[36]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[37]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[37]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[38]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[38]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[39]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[39]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[3]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[3]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[40]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[40]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[41]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[41]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[42]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[42]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[43]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[43]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[44]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[44]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[45]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[45]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[46]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[46]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[47]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[47]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[48]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[48]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[49]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[49]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[4]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[4]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[50]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[50]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[51]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[51]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[52]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[52]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[53]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[53]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[54]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[54]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[55]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[55]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[56]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[56]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[57]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[57]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[58]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[58]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[59]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[59]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[5]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[5]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[60]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[60]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[61]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[61]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[62]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[62]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[63]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[63]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[64]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[64]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[65]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[65]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[66]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[66]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[67]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[67]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[68]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[68]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[69]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[69]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[6]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[6]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[70]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[70]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[71]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[71]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[72]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[72]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[73]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[73]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[74]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[74]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[75]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[75]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[76]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[76]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[77]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[77]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[78]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[78]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[79]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[79]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[7]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[7]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[80]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[80]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[81]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[81]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[82]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[82]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[83]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[83]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[84]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[84]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[85]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[85]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[86]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[86]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[87]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[87]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[88]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[88]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[89]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[89]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[8]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[8]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[90]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[90]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[91]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[91]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[92]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[92]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[93]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[93]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[94]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[94]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[95]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[95]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[96]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[96]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[97]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[97]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[98]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[98]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[99]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[99]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TDB[9]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TDB[9]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TENA" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TENA" '(0.018) +defineGateSize "rf2_32x128_wm1" "TENB" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TENB" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[100]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[100]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[101]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[101]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[102]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[102]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[103]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[103]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[104]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[104]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[105]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[105]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[106]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[106]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[107]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[107]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[108]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[108]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[109]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[109]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[10]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[10]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[110]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[110]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[111]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[111]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[112]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[112]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[113]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[113]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[114]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[114]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[115]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[115]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[116]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[116]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[117]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[117]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[118]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[118]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[119]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[119]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[11]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[11]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[120]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[120]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[121]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[121]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[122]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[122]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[123]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[123]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[124]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[124]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[125]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[125]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[126]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[126]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[127]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[127]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[12]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[12]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[13]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[13]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[14]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[14]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[15]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[15]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[16]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[16]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[17]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[17]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[18]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[18]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[19]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[19]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[20]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[20]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[21]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[21]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[22]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[22]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[23]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[23]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[24]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[24]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[25]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[25]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[26]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[26]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[27]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[27]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[28]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[28]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[29]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[29]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[30]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[30]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[31]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[31]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[32]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[32]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[33]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[33]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[34]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[34]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[35]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[35]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[36]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[36]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[37]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[37]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[38]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[38]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[39]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[39]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[3]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[3]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[40]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[40]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[41]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[41]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[42]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[42]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[43]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[43]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[44]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[44]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[45]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[45]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[46]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[46]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[47]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[47]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[48]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[48]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[49]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[49]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[4]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[4]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[50]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[50]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[51]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[51]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[52]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[52]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[53]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[53]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[54]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[54]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[55]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[55]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[56]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[56]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[57]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[57]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[58]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[58]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[59]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[59]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[5]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[5]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[60]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[60]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[61]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[61]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[62]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[62]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[63]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[63]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[64]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[64]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[65]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[65]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[66]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[66]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[67]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[67]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[68]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[68]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[69]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[69]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[6]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[6]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[70]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[70]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[71]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[71]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[72]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[72]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[73]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[73]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[74]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[74]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[75]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[75]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[76]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[76]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[77]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[77]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[78]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[78]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[79]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[79]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[7]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[7]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[80]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[80]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[81]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[81]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[82]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[82]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[83]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[83]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[84]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[84]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[85]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[85]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[86]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[86]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[87]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[87]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[88]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[88]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[89]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[89]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[8]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[8]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[90]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[90]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[91]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[91]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[92]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[92]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[93]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[93]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[94]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[94]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[95]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[95]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[96]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[96]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[97]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[97]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[98]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[98]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[99]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[99]" '(0.018) +defineGateSize "rf2_32x128_wm1" "TWENB[9]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "TWENB[9]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[0]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[0]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[100]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[100]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[101]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[101]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[102]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[102]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[103]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[103]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[104]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[104]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[105]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[105]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[106]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[106]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[107]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[107]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[108]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[108]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[109]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[109]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[10]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[10]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[110]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[110]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[111]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[111]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[112]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[112]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[113]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[113]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[114]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[114]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[115]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[115]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[116]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[116]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[117]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[117]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[118]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[118]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[119]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[119]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[11]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[11]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[120]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[120]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[121]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[121]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[122]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[122]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[123]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[123]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[124]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[124]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[125]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[125]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[126]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[126]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[127]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[127]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[12]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[12]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[13]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[13]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[14]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[14]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[15]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[15]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[16]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[16]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[17]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[17]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[18]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[18]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[19]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[19]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[1]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[1]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[20]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[20]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[21]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[21]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[22]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[22]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[23]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[23]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[24]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[24]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[25]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[25]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[26]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[26]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[27]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[27]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[28]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[28]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[29]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[29]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[2]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[2]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[30]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[30]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[31]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[31]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[32]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[32]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[33]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[33]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[34]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[34]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[35]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[35]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[36]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[36]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[37]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[37]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[38]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[38]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[39]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[39]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[3]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[3]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[40]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[40]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[41]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[41]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[42]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[42]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[43]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[43]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[44]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[44]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[45]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[45]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[46]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[46]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[47]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[47]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[48]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[48]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[49]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[49]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[4]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[4]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[50]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[50]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[51]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[51]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[52]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[52]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[53]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[53]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[54]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[54]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[55]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[55]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[56]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[56]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[57]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[57]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[58]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[58]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[59]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[59]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[5]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[5]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[60]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[60]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[61]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[61]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[62]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[62]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[63]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[63]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[64]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[64]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[65]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[65]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[66]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[66]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[67]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[67]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[68]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[68]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[69]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[69]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[6]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[6]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[70]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[70]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[71]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[71]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[72]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[72]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[73]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[73]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[74]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[74]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[75]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[75]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[76]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[76]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[77]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[77]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[78]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[78]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[79]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[79]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[7]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[7]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[80]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[80]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[81]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[81]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[82]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[82]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[83]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[83]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[84]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[84]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[85]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[85]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[86]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[86]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[87]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[87]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[88]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[88]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[89]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[89]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[8]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[8]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[90]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[90]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[91]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[91]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[92]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[92]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[93]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[93]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[94]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[94]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[95]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[95]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[96]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[96]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[97]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[97]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[98]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[98]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[99]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[99]" '(0.018) +defineGateSize "rf2_32x128_wm1" "WENB[9]" 0.014 +defineDiodeProtection "rf2_32x128_wm1" "WENB[9]" '(0.018) diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.avm b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.avm new file mode 100644 index 00000000..67ecedcf --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.avm @@ -0,0 +1,162 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Thu Oct 17 15:29:13 2019 +# +# Instance Options: +# Instance Name: rf2_32x128_wm1 +# Number of Words: 32 +# Number of Bits: 128 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: on +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: avm +# AMCI Version: 1.4.3-EAC +# avm_memcomp Version: 2.1.1-EAC +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +rf2_32x128_wm1 { + MEMORY_TYPE RegFile + EQUIV_GATE_COUNT 4506 + VDD_PIN VDDCE VDDPE + GND_PIN VSSE + #This file is for PROCESS FF, CORNER FF_0P99V_0P99V_125C + #However, RedHawk needs the process to be specified as 'PROCESS XX' + PROCESS XX + Cload 3.5e-05nF + VDD 0.99 0.99 + + state_boolean avm_into_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!RET1N&!DFTRAMBYP)" "!RET1N" "NA" + state_boolean avm_outof_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&RET1N&!DFTRAMBYP)" "RET1N" "NA" + state_boolean avm_read_write "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_read_desel "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&CENB)|(CLKB&!TENB&TCENB))" "CLKA CLKB" "NA" + state_boolean avm_desel_write "RET1N&!DFTRAMBYP&((CLKA&TENA&CENA)|(CLKA&!TENA&TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_scan_capture "((CLKA&!SEA&RET1N&DFTRAMBYP)&(CLKB&!SEB&RET1N&DFTRAMBYP))" "DFTRAMBYP" "NA" + state_boolean avm_scan_shift "(CLKA&SEA&RET1N&DFTRAMBYP)&(CLKB&SEB&RET1N&DFTRAMBYP)" "DFTRAMBYP" "NA" + state_boolean standby_trig "RET1N&((CLKA&CENA&TENA)|(CLKA&TCENA&!TENA))&((CLKB&CENB&TENB)|(CLKB&TCENB&!TENB))&!DFTRAMBYP" "CLKA CLKB" "NA" + state_boolean standby_ntrig "RET1N&((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!DFTRAMBYP" "!CLKA !CLKB" "NA" + + Cpd avm_into_lowpwr { + VDDCE VSSE 5.89011e-05nF + VDDPE VSSE 6.00360e-04nF + } + PEAK_I avm_into_lowpwr { + VDDCE VSSE 2.37212mA + VDDPE VSSE 8.16093mA + } + Cpd avm_outof_lowpwr { + VDDCE VSSE 6.47912e-05nF + VDDPE VSSE 4.32324e-03nF + } + PEAK_I avm_outof_lowpwr { + VDDCE VSSE 2.60933mA + VDDPE VSSE 51.02643mA + } + Cpd avm_read_write { + VDDCE VSSE 3.55697e-04nF + VDDPE VSSE 8.20194e-03nF + } + PEAK_I avm_read_write { + VDDCE VSSE 5.29939mA + VDDPE VSSE 66.82583mA + } + Cpd avm_read_desel { + VDDCE VSSE 9.34000e-05nF + VDDPE VSSE 3.67589e-03nF + } + PEAK_I avm_read_desel { + VDDCE VSSE 1.90281mA + VDDPE VSSE 41.50860mA + } + Cpd avm_desel_write { + VDDCE VSSE 2.62297e-04nF + VDDPE VSSE 4.52606e-03nF + } + PEAK_I avm_desel_write { + VDDCE VSSE 4.36243mA + VDDPE VSSE 63.64365mA + } + Cpd avm_scan_capture { + VDDCE VSSE 8.09457e-06nF + VDDPE VSSE 1.07376e-02nF + } + PEAK_I avm_scan_capture { + VDDCE VSSE 0.43640mA + VDDPE VSSE 39.07064mA + } + Cpd avm_scan_shift { + VDDCE VSSE 8.09457e-06nF + VDDPE VSSE 1.07376e-02nF + } + PEAK_I avm_scan_shift { + VDDCE VSSE 0.43640mA + VDDPE VSSE 39.07064mA + } + Cpd standby_trig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.95501e-05nF + } + Cpd standby_ntrig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 2.17223e-05nF + } + LEAKAGE_I { + VDDCE VSSE 0.23098mA + VDDPE VSSE 1.17816mA + } + tsu 0.092778ns + ck2q_delay 0.530131ns + tr_q 0.01373ns + tf_q 0.01596ns + CHARACTERIZATION_MODE accurate +} diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.dat b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.dat new file mode 100644 index 00000000..24acec95 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.dat @@ -0,0 +1,334 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Thu Oct 17 15:29:37 2019 +# +# Instance Options: +# Instance Name: rf2_32x128_wm1 +# Number of Words: 32 +# Number of Bits: 128 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: on +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: datatable +# AMCI Version: 1.4.3-EAC +# datatable_memcomp Version: 1.3.0-amci +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +# Units used in Datatable : +# geomx: micron +# geomy: micron +# Voltage: volts +# Temprature: Degree Celsius +# Current: mA +# Time: ns +# +name ff_0p99v_0p99v_125c +S N +geomx 21.1650 +geomy 414.8600 +volt 0.9900 +temp 125.0000 +# High Density Two Port Register File SVT MVT Compiler : Propagation Delay specific information. +tcenacenya 0.0917 +ttcenacenya 0.0905 +ttenacenyapu 0.1191 +ttenacenyanu 0.1400 +tdftrambypcenya 0.1299 +taaaya 0.0751 +ttaaaya 0.0751 +ttenaayapu 0.1377 +ttenaayanu 0.1338 +tdftrambypaya 0.1197 +tcenbcenyb 0.0947 +ttcenbcenyb 0.0939 +ttenbcenybpu 0.1236 +ttenbcenybnu 0.1996 +tdftrambypcenyb 0.1226 +twenbwenyb 0.0927 +ttwenbwenyb 0.0930 +ttenbwenybpu 0.2539 +ttenbwenybnu 0.2667 +tdftrambypwenyb 0.1651 +tabayb 0.0753 +ttabayb 0.0779 +ttenbaybpu 0.1929 +ttenbaybnu 0.1969 +tdftrambypayb 0.1194 +taccqa_rd0 0.5293 +taccqa_rd1 0.5288 +taccqa_rd2 0.5295 +taccqa_rd3 0.5301 +taccqa_rd4 0.5711 +taccqa_rd5 0.6083 +taccqa_rd6 0.6469 +taccqa_rd7 0.6841 +taccqa_scan0 0.5293 +taccqa_scan1 0.5288 +taccqa_scan2 0.5295 +taccqa_scan3 0.5301 +taccqa_scan4 0.5711 +taccqa_scan5 0.6083 +taccqa_scan6 0.6469 +taccqa_scan7 0.6841 +tclkasoa_rd0 0.5408 +tclkasoa_rd1 0.5402 +tclkasoa_rd2 0.5410 +tclkasoa_rd3 0.5416 +tclkasoa_rd4 0.5826 +tclkasoa_rd5 0.6198 +tclkasoa_rd6 0.6584 +tclkasoa_rd7 0.6955 +tclkasoa_scan0 0.5408 +tclkasoa_scan1 0.5402 +tclkasoa_scan2 0.5410 +tclkasoa_scan3 0.5416 +tclkasoa_scan4 0.5826 +tclkasoa_scan5 0.6198 +tclkasoa_scan6 0.6584 +tclkasoa_scan7 0.6955 +tclkbsob 0.2275 +# High Density Two Port Register File SVT MVT Compiler : Kload specific information. +kload_cenya 1.7116 +kload_aya 1.4236 +kload_cenyb 1.6712 +kload_wenyb 1.4498 +kload_ayb 1.4006 +kload_qa 0.5053 +kload_soa 1.3720 +kload_sob 1.4400 +# High Density Two Port Register File SVT MVT Compiler : Cycle time specific information. +tcyca_ema0 0.7407 +tcyca_ema1 0.7401 +tcyca_ema2 0.7410 +tcyca_ema3 0.7415 +tcyca_ema4 0.7832 +tcyca_ema5 0.8209 +tcyca_ema6 0.8601 +tcyca_ema7 0.8978 +tcycb_ema0 0.8193 +tcycb_ema1 0.8263 +tcycb_ema2 0.8338 +tcycb_ema3 0.8472 +tcycb_ema4 0.8976 +tcycb_ema5 0.9345 +tcycb_ema6 0.9817 +tcycb_ema7 1.0185 +# High Density Two Port Register File SVT MVT Compiler : Clock collision specific information. +tcracwb_rd0 0.5429 +tcracwb_rd1 0.5424 +tcracwb_rd2 0.5432 +tcracwb_rd3 0.5437 +tcracwb_rd4 0.5847 +tcracwb_rd5 0.6219 +tcracwb_rd6 0.6605 +tcracwb_rd7 0.6977 +tcwbcra_wr0 0.6171 +tcwbcra_wr1 0.6240 +tcwbcra_wr2 0.6314 +tcwbcra_wr3 0.6446 +tcwbcra_wr4 0.6942 +tcwbcra_wr5 0.7306 +tcwbcra_wr6 0.7771 +tcwbcra_wr7 0.8134 +# High Density Two Port Register File SVT MVT Compiler : Pulse width specific information. +tckah 0.0926 +tckal 0.0897 +tckbh 0.0958 +tckbl 0.0907 +# High Density Two Port Register File SVT MVT Compiler : Setup time specific information. +tcenas 0.0902 +taas 0.0928 +tcenbs 0.0960 +twenbs 0.0150 +tabs 0.0993 +tdbs 0.0228 +temaas 0.7668 +temasas 0.7668 +temabs 0.8724 +ttenas 0.1737 +ttcenas 0.0905 +ttaas 0.0948 +ttenbs 0.3774 +ttcenbs 0.0965 +ttwenbs 0.0151 +ttabs 0.1030 +ttdbs 0.0237 +tsias 0.1911 +tseas 0.1911 +tdftrambypas 0.2243 +tdftrambypbs 0.2243 +tsibs 0.0228 +tsebs 0.3774 +tcolldisnas 0.7668 +tcolldisnbs 0.8724 +# High Density Two Port Register File SVT MVT Compiler : Hold time specific information. +tcenah 0.0398 +tcenaf_ret1nfh 0.8821 +tcenaf_ret1nrh 0.3064 +taah 0.0695 +tcenbh 0.0422 +tcenbf_ret1nfh 0.8821 +tcenbf_ret1nrh 0.3064 +twenbh 0.1736 +tabh 0.0637 +tdbh 0.1710 +temaah 0.9921 +temasah 0.9921 +temabh 1.0535 +ttenah 0.0764 +ttcenah 0.0410 +ttcenaf_ret1nfh 0.8821 +ttcenaf_ret1nrh 0.3064 +ttaah 0.0695 +ttenbh 0.1918 +ttcenbh 0.0435 +ttcenbf_ret1nfh 0.8821 +ttcenbf_ret1nrh 0.3064 +ttwenbh 0.1743 +ttabh 0.0637 +ttdbh 0.1710 +tret1nf_dftrambypfh 0.0241 +tret1nr_dftrambypfh 0.8821 +tret1nf_cenbrh 0.0241 +tret1nf_cenarh 0.0226 +tret1nf_tcenarh 0.0226 +tret1nf_tcenbrh 0.0241 +tret1nr_tcenbrh 0.8821 +tret1nr_tcenarh 0.7765 +tret1nr_cenbrh 0.8821 +tret1nr_cenarh 0.7765 +tsiah 0.0756 +tseah 0.9921 +tdftrambypah 0.9921 +tdftrambypbh 0.8821 +tdftrambypr_ret1nfh 0.8821 +tdftrambypr_ret1nrh 0.3064 +tsibh 0.1710 +tsebh 0.1918 +tcolldisnah 0.9921 +tcolldisnbh 1.0535 +# High Density Two Port Register File SVT MVT Compiler : Input Capacitance specific information. +icap_clka 0.0105 +icap_cena 0.0018 +icap_aa 0.0012 +icap_clkb 0.0106 +icap_cenb 0.0015 +icap_wenb 0.0017 +icap_ab 0.0012 +icap_db 0.0019 +icap_emaa 0.0059 +icap_emasa 0.0021 +icap_emab 0.0057 +icap_tena 0.0010 +icap_tcena 0.0016 +icap_taa 0.0014 +icap_tenb 0.0012 +icap_tcenb 0.0016 +icap_twenb 0.0015 +icap_tab 0.0014 +icap_tdb 0.0016 +icap_sia 0.0015 +icap_sea 0.0019 +icap_dftrambyp 0.0021 +icap_sib 0.0056 +icap_seb 0.0019 +icap_colldisn 0.0024 +icap_ret1n 0.0035 +# High Density Two Port Register File SVT MVT Compiler : current specific information. +icc_standby_c_chipdisable 0.230985 +icc_standby_p_chipdisable 1.178165 +icc_standby_c_ret1 0.265746 +icc_standby_p_ret1 0.111473 +icc_standby_c_selective_precharge 0.227337 +icc_standby_p_selective_precharge 1.096501 +icc_c_rd0_a 9.188e-05 +icc_c_rd1_a 9.229e-05 +icc_c_rd2_a 9.229e-05 +icc_c_rd3_a 9.247e-05 +icc_c_rd4_a 9.517e-05 +icc_c_rd5_a 9.683e-05 +icc_c_rd6_a 9.809e-05 +icc_c_rd7_a 9.975e-05 +icc_p_rd0_a 3.638e-03 +icc_p_rd1_a 3.638e-03 +icc_p_rd2_a 3.638e-03 +icc_p_rd3_a 3.639e-03 +icc_p_rd4_a 3.653e-03 +icc_p_rd5_a 3.669e-03 +icc_p_rd6_a 3.674e-03 +icc_p_rd7_a 3.674e-03 +icc_c_wr0_b 2.591e-04 +icc_c_wr1_b 2.595e-04 +icc_c_wr2_b 2.595e-04 +icc_c_wr3_b 2.597e-04 +icc_c_wr4_b 2.624e-04 +icc_c_wr5_b 2.640e-04 +icc_c_wr6_b 2.653e-04 +icc_c_wr7_b 2.670e-04 +icc_p_wr0_b 4.479e-03 +icc_p_wr1_b 4.479e-03 +icc_p_wr2_b 4.479e-03 +icc_p_wr3_b 4.481e-03 +icc_p_wr4_b 4.494e-03 +icc_p_wr5_b 4.511e-03 +icc_p_wr6_b 4.516e-03 +icc_p_wr7_b 4.516e-03 +icc_c_desela 0.000e+00 +icc_p_desela 6.071e-05 +icc_c_deselb 0.000e+00 +icc_p_deselb 1.156e-03 +icc_c_peak 5.299387 +icc_p_peak 66.825833 +icc_c_inrush 2.617944 +icc_p_inrush 51.02643 diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.lib b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.lib new file mode 100644 index 00000000..fb846867 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.lib @@ -0,0 +1,71102 @@ +/* + * CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. + * + * Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. + * + * Use of this Software is subject to the terms and conditions of the + * applicable license agreement with ARM Physical IP, Inc. + * In addition, this Software is protected by patents, copyright law + * and international treaties. + * + * The copyright notice(s) in this Software does not indicate actual or + * intended publication of this Software. + * + * Compiler Name: High Density Two Port Register File SVT MVT Compiler + * + * Creation Date: Thu Oct 17 15:30:31 2019 + * + * Instance Options: + * Instance Name: rf2_32x128_wm1 + * Number of Words: 32 + * Number of Bits: 128 + * Multiplexer Width: 2 + * Multi-Vt selection: BASE + * Frequency : 1 + * Activity Factor <%>: 50 + * Pipeline: off + * Word-Write Mask: on + * Word Partition Size: 1 + * Write through: off + * Top Metal Layer: m5-m10 + * Power Type: otc + * Redundancy: off + * Redundant Columns: 2 + * Redundant Rows: 0 + * BIST MUXes: on + * Soft Error Repair (SER): none + * Power Gating: off + * Back Biasing: off + * Retention: on + * Extra Margin Adjustment: on + * Advanced Test Features: off + * Customer Comment: This is a memory instance + * Bus-notation: on + * Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE + * Name Case: upper + * Check Instance Name: off + * Diodes: on + * Drive Strength: 6 + * Site Definitions: off + * Library Name: USERLIB + * Liberty setting: nldm + * + * Compiler Versions: + * Memory Version: r4p0 + * Lang compiler Version: 4.1.6-EAC2 + * View Name: Liberty + * AMCI Version: 1.4.3-EAC + * RTE Version: 2.1.0-EAC + * liberty_memcomp Version: 2.2.1-EAC + * + * Verified With: + * Synopsys Primetime, Cadence Encounter Timing System, Synopsys Design Compiler, + * Cadence RTL Compiler. + * + * Modeling Assumptions: + * This library contains a black box description for a memory element. At + * the library level, a default_max_transition constraint is set to the + * maximum characterized input slew. Each output has a max_capacitance + * constraint set to the highest characterized output load. These two + * constraints force Design Compiler to synthesize circuits that operate + * within the characterization space. The user can tighten these constraints, + * if desired. When writing SDF from Synopsys Design Compiler or Synopsys + * Primetime, use the version 3.0 or 2.1 option. This ensures the SDF will + * annotate to simulation models provided with this generator. + * + * Modeling Limitations: + * Due to limitations of the .lib format, some data reduction was necessary. + * When reducing data, minimum values were chosen for the fast case corner + * and maximum values were used for the typical and best case corners. It + * is recommended that critical timing and setup and hold times be checked + * at all corners. + * + * Known Bugs: N/A + * + * Known Work Arounds: N/A + * +*/ + +library(USERLIB_ff_0p99v_0p99v_125c) { + delay_model : table_lookup; + library_features(report_delay_calculation,report_power_calculation); + revision : 1.1; + date : "Thu Oct 17 15:30:31 2019"; + comment : "Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved."; + + /* unit attributes */ + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1mA"; + leakage_power_unit : "1mW"; + nom_process : 1; + nom_temperature : 125; + nom_voltage : 0.99; + capacitive_load_unit(1,pf); + pulling_resistance_unit : "1kohm"; + + /* default attributes */ + default_fanout_load : 1.000; + default_cell_leakage_power : 0.000; + default_inout_pin_cap : 0.005; + default_input_pin_cap : 0.005; + default_output_pin_cap : 0.000; + + /* threshold definitions */ + default_leakage_power_density : 0.000; + slew_derate_from_library : 0.500; + slew_lower_threshold_pct_fall : 30.000; + slew_upper_threshold_pct_fall : 70.000; + slew_lower_threshold_pct_rise : 30.000; + slew_upper_threshold_pct_rise : 70.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + /* k-factors */ + k_process_cell_fall : 0.000; + k_process_cell_leakage_power : 0.000; + k_process_cell_rise : 0.000; + k_process_fall_transition : 0.000; + k_process_hold_fall : 0.000; + k_process_hold_rise : 0.000; + k_process_internal_power : 0.000; + k_process_min_pulse_width_high : 0.000; + k_process_min_pulse_width_low : 0.000; + k_process_pin_cap : 0.000; + k_process_recovery_fall : 0.000; + k_process_recovery_rise : 0.000; + k_process_rise_transition : 0.000; + k_process_setup_fall : 0.000; + k_process_setup_rise : 0.000; + k_process_wire_cap : 0.000; + k_process_wire_res : 0.000; + k_temp_cell_fall : 0.000; + k_temp_cell_rise : 0.000; + k_temp_hold_fall : 0.000; + k_temp_hold_rise : 0.000; + k_temp_min_pulse_width_high : 0.000; + k_temp_min_pulse_width_low : 0.000; + k_temp_min_period : 0.000; + k_temp_rise_propagation : 0.000; + k_temp_fall_propagation : 0.000; + k_temp_rise_transition : 0.000; + k_temp_fall_transition : 0.000; + k_temp_recovery_fall : 0.000; + k_temp_recovery_rise : 0.000; + k_temp_setup_fall : 0.000; + k_temp_setup_rise : 0.000; + k_volt_cell_fall : 0.000; + k_volt_cell_rise : 0.000; + k_volt_hold_fall : 0.000; + k_volt_hold_rise : 0.000; + k_volt_min_pulse_width_high : 0.000; + k_volt_min_pulse_width_low : 0.000; + k_volt_min_period : 0.000; + k_volt_rise_propagation : 0.000; + k_volt_fall_propagation : 0.000; + k_volt_rise_transition : 0.000; + k_volt_fall_transition : 0.000; + k_volt_recovery_fall : 0.000; + k_volt_recovery_rise : 0.000; + k_volt_setup_fall : 0.000; + k_volt_setup_rise : 0.000; + + /* Additional instance information */ + define ("peak_current", "cell", "float"); + define ("retention_current", "cell", "float"); + define ("inrush_current", "cell", "float"); + + /* templates */ + lu_table_template(rf2_32x128_wm1_inputslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_inputslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_inputslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_outputload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_bistload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + + type (rf2_32x128_wm1_AYA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_WENYB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AYB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_QA) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SOA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SOB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_WENB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_DB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_EMAA) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_EMAB) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TAA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TWENB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TAB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TDB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SIA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SIB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + + /* voltage-maps */ + voltage_map (VDDCE, 0.99); + voltage_map (VDDPE, 0.99); + voltage_map (VSSE, 0.0); + + /* operating-conditions */ + operating_conditions(ff_0p99v_0p99v_125c) { + process : 1; + temperature : 125; + voltage : 0.99; + tree_type : balanced_tree; + } + default_operating_conditions : ff_0p99v_0p99v_125c; + + /* wire-loads */ + wire_load("sample") { + resistance : 1.6e-05; + capacitance : 0.0002; + area : 1.7; + slope : 500; + fanout_length(1,500); + } + + cell(rf2_32x128_wm1) { + area : 8780.511900; + dont_use : true; + dont_touch : true; + interface_timing : true; + is_memory_cell : true; + /* Peak current of all modes. */ + peak_current : 72.125219; + /* Peak current when entering or exiting the power modes. */ + inrush_current : 53.644374; + /* leakage current in retention mode (RET1N=0) */ + retention_current : 0.377218; + memory() { + type : ram; + address_width : 5; + word_width : 128; + } + pg_pin(VDDCE) { + voltage_name : VDDCE; + pg_type : backup_power; + direction : inout; + } + pg_pin(VDDPE) { + voltage_name : VDDPE; + pg_type : primary_power; + direction : inout; + } + pg_pin(VSSE) { + voltage_name : VSSE; + pg_type : primary_ground; + direction : inout; + } + pin(CENYA) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : CENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.051836, 0.054638, 0.057189, 0.063491, 0.079276, 0.103875, 0.156245", \ + "0.052200, 0.055480, 0.058323, 0.063994, 0.079775, 0.105271, 0.158528", \ + "0.054084, 0.056892, 0.059593, 0.065761, 0.081427, 0.107020, 0.158302", \ + "0.056717, 0.059817, 0.062587, 0.068432, 0.084150, 0.109659, 0.160336", \ + "0.068053, 0.070796, 0.073683, 0.079740, 0.095366, 0.121859, 0.172302", \ + "0.070713, 0.073718, 0.076272, 0.082184, 0.098196, 0.123181, 0.175557", \ + "0.079224, 0.082328, 0.085053, 0.090953, 0.106599, 0.130922, 0.180958" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045001, 0.047704, 0.050165, 0.056244, 0.071470, 0.095198, 0.145714", \ + "0.045352, 0.048516, 0.051258, 0.056729, 0.071951, 0.096544, 0.147916", \ + "0.047169, 0.049878, 0.052483, 0.058433, 0.073544, 0.098232, 0.147698", \ + "0.049709, 0.052699, 0.055372, 0.061009, 0.076171, 0.100777, 0.149660", \ + "0.060644, 0.063289, 0.066074, 0.071917, 0.086990, 0.112545, 0.161203", \ + "0.063210, 0.066108, 0.068572, 0.074274, 0.089720, 0.113821, 0.164342", \ + "0.071420, 0.074414, 0.077042, 0.082733, 0.097825, 0.121287, 0.169552" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.057050, 0.061333, 0.064739, 0.073219, 0.097329, 0.138131, 0.216564", \ + "0.058142, 0.062578, 0.066123, 0.074091, 0.098021, 0.139758, 0.220294", \ + "0.059806, 0.063900, 0.067336, 0.075578, 0.099798, 0.141047, 0.222949", \ + "0.063503, 0.067837, 0.071354, 0.079708, 0.103380, 0.145363, 0.225627", \ + "0.075769, 0.079821, 0.083108, 0.091666, 0.115170, 0.157341, 0.240950", \ + "0.080355, 0.084214, 0.087878, 0.096287, 0.120243, 0.161330, 0.238859", \ + "0.094962, 0.098990, 0.102680, 0.111035, 0.136188, 0.175489, 0.255425" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.049528, 0.053659, 0.056944, 0.065125, 0.088381, 0.127739, 0.203395", \ + "0.050581, 0.054860, 0.058279, 0.065965, 0.089048, 0.129308, 0.206992", \ + "0.052186, 0.056135, 0.059449, 0.067399, 0.090762, 0.130551, 0.209554", \ + "0.055752, 0.059933, 0.063325, 0.071383, 0.094218, 0.134715, 0.212137", \ + "0.067584, 0.071492, 0.074663, 0.082918, 0.105590, 0.146269, 0.226918", \ + "0.072008, 0.075730, 0.079264, 0.087376, 0.110484, 0.150116, 0.224901", \ + "0.086097, 0.089983, 0.093542, 0.101601, 0.125864, 0.163774, 0.240881" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.052413, 0.055124, 0.057589, 0.063970, 0.079665, 0.103987, 0.155511", \ + "0.052495, 0.055558, 0.058158, 0.064108, 0.080112, 0.105092, 0.158607", \ + "0.053967, 0.057044, 0.059991, 0.066176, 0.081601, 0.106483, 0.159059", \ + "0.056920, 0.060191, 0.062829, 0.068758, 0.084314, 0.109161, 0.161759", \ + "0.067251, 0.070496, 0.073957, 0.078982, 0.095347, 0.120029, 0.171692", \ + "0.070590, 0.073617, 0.076337, 0.082149, 0.098294, 0.122933, 0.172370", \ + "0.079578, 0.082593, 0.085358, 0.091166, 0.106654, 0.131430, 0.181207" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045502, 0.048117, 0.050495, 0.056650, 0.071789, 0.095250, 0.144950", \ + "0.045581, 0.048535, 0.051043, 0.056783, 0.072221, 0.096316, 0.147937", \ + "0.047000, 0.049969, 0.052811, 0.058778, 0.073656, 0.097658, 0.148373", \ + "0.049850, 0.053004, 0.055549, 0.061269, 0.076274, 0.100242, 0.150978", \ + "0.059815, 0.062945, 0.066284, 0.071131, 0.086916, 0.110724, 0.160559", \ + "0.063035, 0.065956, 0.068579, 0.074185, 0.089759, 0.113525, 0.161213", \ + "0.071705, 0.074613, 0.077281, 0.082883, 0.097823, 0.121722, 0.169737" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056125, 0.059841, 0.063386, 0.071692, 0.095552, 0.136414, 0.214237", \ + "0.057036, 0.061460, 0.065004, 0.072973, 0.096903, 0.138640, 0.218395", \ + "0.058722, 0.062744, 0.066256, 0.074491, 0.098713, 0.139950, 0.221864", \ + "0.062503, 0.066823, 0.070323, 0.078481, 0.102262, 0.144030, 0.223932", \ + "0.074322, 0.078638, 0.082158, 0.090497, 0.114130, 0.156222, 0.237967", \ + "0.079219, 0.083041, 0.086602, 0.094932, 0.119113, 0.160324, 0.239300", \ + "0.094373, 0.098366, 0.101891, 0.110385, 0.134368, 0.173579, 0.253583" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.048724, 0.052309, 0.055729, 0.063740, 0.086755, 0.126171, 0.201239", \ + "0.049603, 0.053870, 0.057290, 0.064976, 0.088059, 0.128318, 0.205250", \ + "0.051229, 0.055110, 0.058497, 0.066440, 0.089805, 0.129583, 0.208597", \ + "0.054876, 0.059043, 0.062420, 0.070289, 0.093228, 0.133518, 0.210591", \ + "0.066278, 0.070440, 0.073836, 0.081880, 0.104676, 0.145279, 0.224129", \ + "0.071001, 0.074688, 0.078123, 0.086158, 0.109483, 0.149235, 0.225415", \ + "0.085619, 0.089471, 0.092870, 0.101064, 0.124198, 0.162021, 0.239193" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENA&CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.080418, 0.083270, 0.085756, 0.091356, 0.106111, 0.129590, 0.176340", \ + "0.080736, 0.083588, 0.086074, 0.091674, 0.106429, 0.129908, 0.176658", \ + "0.081754, 0.084606, 0.087092, 0.092692, 0.107447, 0.130926, 0.177676", \ + "0.083269, 0.086121, 0.088607, 0.094207, 0.108962, 0.132441, 0.179191", \ + "0.086279, 0.089131, 0.091617, 0.097217, 0.111972, 0.135451, 0.182201", \ + "0.086484, 0.089336, 0.091822, 0.097422, 0.112177, 0.135656, 0.182406", \ + "0.088300, 0.091152, 0.093638, 0.099238, 0.113993, 0.137472, 0.184222" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069375, 0.072227, 0.074713, 0.080313, 0.095068, 0.118547, 0.165297", \ + "0.069693, 0.072545, 0.075031, 0.080631, 0.095386, 0.118865, 0.165615", \ + "0.070711, 0.073563, 0.076049, 0.081649, 0.096404, 0.119883, 0.166633", \ + "0.072226, 0.075078, 0.077564, 0.083164, 0.097919, 0.121398, 0.168148", \ + "0.075236, 0.078088, 0.080574, 0.086174, 0.100929, 0.124408, 0.171158", \ + "0.075441, 0.078293, 0.080779, 0.086379, 0.101134, 0.124613, 0.171363", \ + "0.077257, 0.080109, 0.082595, 0.088195, 0.102950, 0.126429, 0.173179" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090611, 0.094372, 0.097709, 0.105460, 0.127824, 0.164894, 0.238974", \ + "0.091187, 0.094948, 0.098285, 0.106036, 0.128400, 0.165470, 0.239550", \ + "0.092554, 0.096315, 0.099652, 0.107403, 0.129767, 0.166837, 0.240917", \ + "0.095129, 0.098890, 0.102227, 0.109978, 0.132342, 0.169412, 0.243492", \ + "0.104241, 0.108002, 0.111339, 0.119090, 0.141454, 0.178524, 0.252604", \ + "0.108083, 0.111844, 0.115181, 0.122932, 0.145296, 0.182366, 0.256446", \ + "0.117314, 0.121075, 0.124412, 0.132163, 0.154527, 0.191597, 0.265677" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.078047, 0.081808, 0.085145, 0.092896, 0.115260, 0.152330, 0.226410", \ + "0.078623, 0.082384, 0.085721, 0.093472, 0.115836, 0.152906, 0.226986", \ + "0.079990, 0.083751, 0.087088, 0.094839, 0.117203, 0.154273, 0.228353", \ + "0.082565, 0.086326, 0.089663, 0.097414, 0.119778, 0.156848, 0.230928", \ + "0.091677, 0.095438, 0.098775, 0.106526, 0.128890, 0.165960, 0.240040", \ + "0.095519, 0.099280, 0.102617, 0.110368, 0.132732, 0.169802, 0.243882", \ + "0.104750, 0.108511, 0.111848, 0.119599, 0.141963, 0.179033, 0.253113" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENA&!CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119686, 0.123446, 0.126816, 0.134596, 0.156976, 0.194046, 0.268286", \ + "0.120186, 0.123946, 0.127316, 0.135096, 0.157476, 0.194546, 0.268786", \ + "0.121166, 0.124926, 0.128296, 0.136076, 0.158456, 0.195526, 0.269766", \ + "0.123176, 0.126936, 0.130306, 0.138086, 0.160466, 0.197536, 0.271776", \ + "0.125126, 0.128886, 0.132256, 0.140036, 0.162416, 0.199486, 0.273726", \ + "0.126136, 0.129896, 0.133266, 0.141046, 0.163426, 0.200496, 0.274736", \ + "0.125186, 0.128946, 0.132316, 0.140096, 0.162476, 0.199546, 0.273786" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.103318, 0.107078, 0.110448, 0.118228, 0.140608, 0.177678, 0.251918", \ + "0.103818, 0.107578, 0.110948, 0.118728, 0.141108, 0.178178, 0.252418", \ + "0.104798, 0.108558, 0.111928, 0.119708, 0.142088, 0.179158, 0.253398", \ + "0.106808, 0.110568, 0.113938, 0.121718, 0.144098, 0.181168, 0.255408", \ + "0.108758, 0.112518, 0.115888, 0.123668, 0.146048, 0.183118, 0.257358", \ + "0.109768, 0.113528, 0.116898, 0.124678, 0.147058, 0.184128, 0.258368", \ + "0.108818, 0.112578, 0.115948, 0.123728, 0.146108, 0.183178, 0.257418" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.109787, 0.112563, 0.115083, 0.120703, 0.135453, 0.158953, 0.205683", \ + "0.110629, 0.113405, 0.115925, 0.121545, 0.136295, 0.159795, 0.206525", \ + "0.111501, 0.114277, 0.116797, 0.122417, 0.137167, 0.160667, 0.207397", \ + "0.113633, 0.116409, 0.118929, 0.124549, 0.139299, 0.162799, 0.209529", \ + "0.123523, 0.126299, 0.128819, 0.134439, 0.149189, 0.172689, 0.219419", \ + "0.127203, 0.129979, 0.132499, 0.138119, 0.152869, 0.176369, 0.223099", \ + "0.140023, 0.142799, 0.145319, 0.150939, 0.165689, 0.189189, 0.235919" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.094840, 0.097616, 0.100136, 0.105756, 0.120506, 0.144006, 0.190736", \ + "0.095682, 0.098458, 0.100978, 0.106598, 0.121348, 0.144848, 0.191578", \ + "0.096554, 0.099330, 0.101850, 0.107470, 0.122220, 0.145720, 0.192450", \ + "0.098686, 0.101462, 0.103982, 0.109602, 0.124352, 0.147852, 0.194582", \ + "0.108576, 0.111352, 0.113872, 0.119492, 0.134242, 0.157742, 0.204472", \ + "0.112256, 0.115032, 0.117552, 0.123172, 0.137922, 0.161422, 0.208152", \ + "0.125076, 0.127852, 0.130372, 0.135992, 0.150742, 0.174242, 0.220972" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.078486, 0.081791, 0.083902, 0.089360, 0.104718, 0.127990, 0.174351", \ + "0.079173, 0.082478, 0.084589, 0.090047, 0.105405, 0.128677, 0.175038", \ + "0.081086, 0.084391, 0.086502, 0.091960, 0.107318, 0.130590, 0.176951", \ + "0.083228, 0.086533, 0.088644, 0.094102, 0.109460, 0.132732, 0.179093", \ + "0.090686, 0.093991, 0.096102, 0.101560, 0.116918, 0.140190, 0.186551", \ + "0.093415, 0.096720, 0.098831, 0.104289, 0.119647, 0.142919, 0.189280", \ + "0.097789, 0.101094, 0.103205, 0.108663, 0.124021, 0.147293, 0.193654" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.067639, 0.070944, 0.073055, 0.078513, 0.093871, 0.117143, 0.163504", \ + "0.068326, 0.071631, 0.073742, 0.079200, 0.094558, 0.117830, 0.164191", \ + "0.070239, 0.073544, 0.075655, 0.081113, 0.096471, 0.119743, 0.166104", \ + "0.072381, 0.075686, 0.077797, 0.083255, 0.098613, 0.121885, 0.168246", \ + "0.079839, 0.083144, 0.085255, 0.090713, 0.106071, 0.129343, 0.175704", \ + "0.082568, 0.085873, 0.087984, 0.093442, 0.108800, 0.132072, 0.178433", \ + "0.086942, 0.090247, 0.092358, 0.097816, 0.113174, 0.136446, 0.182807" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.102446, 0.106167, 0.109537, 0.117117, 0.139350, 0.176382, 0.250332", \ + "0.103254, 0.106975, 0.110345, 0.117925, 0.140158, 0.177190, 0.251140", \ + "0.104494, 0.108215, 0.111585, 0.119165, 0.141398, 0.178430, 0.252380", \ + "0.107324, 0.111045, 0.114415, 0.121995, 0.144228, 0.181260, 0.255210", \ + "0.115227, 0.118948, 0.122318, 0.129898, 0.152131, 0.189163, 0.263113", \ + "0.116841, 0.120562, 0.123932, 0.131512, 0.153745, 0.190777, 0.264727", \ + "0.124113, 0.127834, 0.131204, 0.138784, 0.161017, 0.198049, 0.271999" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.088315, 0.092036, 0.095406, 0.102986, 0.125219, 0.162251, 0.236201", \ + "0.089123, 0.092844, 0.096214, 0.103794, 0.126027, 0.163059, 0.237009", \ + "0.090363, 0.094084, 0.097454, 0.105034, 0.127267, 0.164299, 0.238249", \ + "0.093193, 0.096914, 0.100284, 0.107864, 0.130097, 0.167129, 0.241079", \ + "0.101096, 0.104817, 0.108187, 0.115767, 0.138000, 0.175032, 0.248982", \ + "0.102710, 0.106431, 0.109801, 0.117381, 0.139614, 0.176646, 0.250596", \ + "0.109982, 0.113703, 0.117073, 0.124653, 0.146886, 0.183918, 0.257868" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + } + internal_power() { + related_pin : CENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TCENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENA&CENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENA&!CENA"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007036, 0.007043, 0.007050, 0.007057, 0.007064, 0.007071, 0.007078", \ + "0.007078, 0.007085, 0.007092, 0.007099, 0.007106, 0.007113, 0.007120", \ + "0.007085, 0.007092, 0.007099, 0.007106, 0.007113, 0.007120, 0.007128", \ + "0.007092, 0.007099, 0.007106, 0.007113, 0.007120, 0.007128, 0.007135", \ + "0.007168, 0.007175, 0.007182, 0.007190, 0.007197, 0.007204, 0.007211", \ + "0.007175, 0.007182, 0.007190, 0.007197, 0.007204, 0.007211, 0.007218", \ + "0.007182, 0.007190, 0.007197, 0.007204, 0.007211, 0.007218, 0.007226" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007205, 0.007212, 0.007219, 0.007226, 0.007233, 0.007241, 0.007248", \ + "0.007889, 0.007897, 0.007905, 0.007913, 0.007921, 0.007929, 0.007937", \ + "0.007897, 0.007905, 0.007913, 0.007921, 0.007929, 0.007937, 0.007945", \ + "0.007905, 0.007913, 0.007921, 0.007929, 0.007937, 0.007945, 0.007953", \ + "0.007913, 0.007921, 0.007929, 0.007937, 0.007945, 0.007953, 0.007961", \ + "0.007921, 0.007929, 0.007937, 0.007945, 0.007953, 0.007961, 0.007969", \ + "0.009026, 0.009035, 0.009044, 0.009053, 0.009062, 0.009071, 0.009081" \ + ); + } + } + } + bus(AYA) { + bus_type : rf2_32x128_wm1_AYA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : AA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047701, 0.050578, 0.052816, 0.058001, 0.071459, 0.092957, 0.136425", \ + "0.048671, 0.051455, 0.053728, 0.058720, 0.072546, 0.094169, 0.140120", \ + "0.050875, 0.053600, 0.056014, 0.061023, 0.074770, 0.096471, 0.142640", \ + "0.053520, 0.056170, 0.058494, 0.063654, 0.077208, 0.098580, 0.142199", \ + "0.064189, 0.066841, 0.068912, 0.074160, 0.087818, 0.108987, 0.152143", \ + "0.069784, 0.072530, 0.074841, 0.080070, 0.093409, 0.115000, 0.157771", \ + "0.081937, 0.084591, 0.087025, 0.092165, 0.105370, 0.125498, 0.168155" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.041411, 0.044186, 0.046345, 0.051346, 0.064328, 0.085065, 0.126994", \ + "0.042347, 0.045032, 0.047225, 0.052041, 0.065377, 0.086234, 0.130559", \ + "0.044473, 0.047102, 0.049430, 0.054262, 0.067522, 0.088455, 0.132989", \ + "0.047024, 0.049581, 0.051823, 0.056800, 0.069874, 0.090489, 0.132564", \ + "0.057315, 0.059873, 0.061871, 0.066933, 0.080108, 0.100528, 0.142156", \ + "0.062713, 0.065362, 0.067591, 0.072634, 0.085501, 0.106328, 0.147585", \ + "0.074436, 0.076995, 0.079343, 0.084301, 0.097039, 0.116454, 0.157602" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.043233, 0.046824, 0.049824, 0.056934, 0.077248, 0.111569, 0.178461", \ + "0.043706, 0.047280, 0.050130, 0.057297, 0.076932, 0.111609, 0.178924", \ + "0.045686, 0.049200, 0.052155, 0.059265, 0.079074, 0.114571, 0.184653", \ + "0.048938, 0.052518, 0.055515, 0.062617, 0.082937, 0.117192, 0.182970", \ + "0.061669, 0.065117, 0.068171, 0.075078, 0.095018, 0.129577, 0.200044", \ + "0.067174, 0.070619, 0.073631, 0.080562, 0.100849, 0.134413, 0.204304", \ + "0.083687, 0.087046, 0.090266, 0.096996, 0.117147, 0.149917, 0.216158" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.037532, 0.040996, 0.043890, 0.050748, 0.070343, 0.103450, 0.167973", \ + "0.037989, 0.041436, 0.044185, 0.051098, 0.070038, 0.103488, 0.168420", \ + "0.039898, 0.043288, 0.046139, 0.052997, 0.072105, 0.106345, 0.173947", \ + "0.043035, 0.046489, 0.049379, 0.056230, 0.075831, 0.108874, 0.172323", \ + "0.055315, 0.058642, 0.061587, 0.068250, 0.087485, 0.120820, 0.188792", \ + "0.060626, 0.063949, 0.066854, 0.073540, 0.093109, 0.125485, 0.192902", \ + "0.076554, 0.079795, 0.082900, 0.089392, 0.108830, 0.140440, 0.204336" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + } + timing() { + related_pin : TAA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.049688, 0.052318, 0.054521, 0.059653, 0.072909, 0.094732, 0.140617", \ + "0.050514, 0.053360, 0.055912, 0.060939, 0.074322, 0.096000, 0.141340", \ + "0.052459, 0.055203, 0.057522, 0.062687, 0.076243, 0.097426, 0.143578", \ + "0.055256, 0.057906, 0.060227, 0.065264, 0.079158, 0.100133, 0.144787", \ + "0.065104, 0.067748, 0.070142, 0.075082, 0.088997, 0.109894, 0.154855", \ + "0.071825, 0.074504, 0.076833, 0.082297, 0.095521, 0.117407, 0.161974", \ + "0.084692, 0.087350, 0.089705, 0.094832, 0.108459, 0.127984, 0.170743" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.043137, 0.045673, 0.047798, 0.052748, 0.065535, 0.086586, 0.130847", \ + "0.043933, 0.046678, 0.049140, 0.053989, 0.066899, 0.087809, 0.131544", \ + "0.045809, 0.048456, 0.050692, 0.055675, 0.068752, 0.089185, 0.133702", \ + "0.048507, 0.051063, 0.053302, 0.058161, 0.071563, 0.091795, 0.134869", \ + "0.058006, 0.060557, 0.062867, 0.067631, 0.081053, 0.101211, 0.144581", \ + "0.064490, 0.067074, 0.069321, 0.074591, 0.087347, 0.108458, 0.151448", \ + "0.076901, 0.079465, 0.081737, 0.086682, 0.099826, 0.118660, 0.159906" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.044794, 0.048135, 0.051187, 0.058293, 0.077898, 0.112194, 0.179297", \ + "0.045757, 0.048995, 0.052220, 0.059053, 0.079169, 0.113169, 0.180167", \ + "0.047878, 0.051232, 0.054301, 0.061204, 0.080898, 0.115949, 0.183828", \ + "0.050937, 0.054617, 0.057535, 0.064673, 0.084478, 0.119859, 0.190620", \ + "0.061245, 0.064618, 0.067559, 0.074677, 0.094897, 0.130266, 0.197128", \ + "0.068428, 0.071863, 0.074878, 0.081823, 0.102276, 0.136063, 0.206813", \ + "0.084810, 0.088264, 0.091271, 0.098386, 0.118300, 0.151126, 0.217841" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.038888, 0.042110, 0.045054, 0.051909, 0.070819, 0.103902, 0.168629", \ + "0.039817, 0.042939, 0.046050, 0.052641, 0.072046, 0.104843, 0.169469", \ + "0.041862, 0.045098, 0.048058, 0.054717, 0.073713, 0.107524, 0.173000", \ + "0.044813, 0.048363, 0.051178, 0.058063, 0.077166, 0.111295, 0.179551", \ + "0.054756, 0.058010, 0.060847, 0.067713, 0.087217, 0.121334, 0.185830", \ + "0.061685, 0.064999, 0.067907, 0.074606, 0.094335, 0.126926, 0.195171", \ + "0.077487, 0.080819, 0.083720, 0.090582, 0.109791, 0.141456, 0.205809" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.071755, 0.074833, 0.076726, 0.081607, 0.095232, 0.115863, 0.156881", \ + "0.072414, 0.075492, 0.077385, 0.082266, 0.095891, 0.116522, 0.157540", \ + "0.074308, 0.077386, 0.079279, 0.084160, 0.097785, 0.118416, 0.159434", \ + "0.076428, 0.079506, 0.081399, 0.086280, 0.099905, 0.120536, 0.161554", \ + "0.083744, 0.086822, 0.088715, 0.093596, 0.107221, 0.127852, 0.168870", \ + "0.086635, 0.089713, 0.091606, 0.096487, 0.110112, 0.130743, 0.171761", \ + "0.090514, 0.093592, 0.095485, 0.100366, 0.113991, 0.134622, 0.175640" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061413, 0.064450, 0.066218, 0.070872, 0.083738, 0.103108, 0.141626", \ + "0.062096, 0.065133, 0.066901, 0.071555, 0.084421, 0.103791, 0.142309", \ + "0.063991, 0.067028, 0.068796, 0.073450, 0.086316, 0.105686, 0.144204", \ + "0.066117, 0.069154, 0.070922, 0.075576, 0.088442, 0.107812, 0.146330", \ + "0.073501, 0.076538, 0.078306, 0.082960, 0.095826, 0.115196, 0.153714", \ + "0.076319, 0.079356, 0.081124, 0.085778, 0.098644, 0.118014, 0.156532", \ + "0.080330, 0.083367, 0.085135, 0.089789, 0.102655, 0.122025, 0.160543" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.094311, 0.097523, 0.100443, 0.106772, 0.125385, 0.156480, 0.218680", \ + "0.095121, 0.098333, 0.101253, 0.107582, 0.126195, 0.157290, 0.219490", \ + "0.096462, 0.099674, 0.102594, 0.108923, 0.127536, 0.158631, 0.220831", \ + "0.099286, 0.102498, 0.105418, 0.111747, 0.130360, 0.161455, 0.223655", \ + "0.107192, 0.110404, 0.113324, 0.119653, 0.138266, 0.169361, 0.231561", \ + "0.108592, 0.111804, 0.114724, 0.121053, 0.139666, 0.170761, 0.232961", \ + "0.115949, 0.119161, 0.122081, 0.128410, 0.147023, 0.178118, 0.240318" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.080001, 0.083175, 0.085955, 0.092186, 0.110352, 0.140817, 0.201827", \ + "0.080836, 0.084010, 0.086790, 0.093021, 0.111187, 0.141652, 0.202662", \ + "0.082069, 0.085243, 0.088023, 0.094254, 0.112420, 0.142885, 0.203895", \ + "0.084867, 0.088041, 0.090821, 0.097052, 0.115218, 0.145683, 0.206693", \ + "0.092872, 0.096046, 0.098826, 0.105057, 0.123223, 0.153688, 0.214698", \ + "0.094163, 0.097337, 0.100117, 0.106348, 0.124514, 0.154979, 0.215989", \ + "0.101454, 0.104628, 0.107408, 0.113639, 0.131805, 0.162270, 0.223280" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + } + internal_power() { + related_pin : AA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TAA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007036, 0.007043, 0.007050, 0.007057, 0.007064, 0.007071, 0.007078", \ + "0.007078, 0.007085, 0.007092, 0.007099, 0.007106, 0.007113, 0.007120", \ + "0.007085, 0.007092, 0.007099, 0.007106, 0.007113, 0.007120, 0.007128", \ + "0.007092, 0.007099, 0.007106, 0.007113, 0.007120, 0.007128, 0.007135", \ + "0.007168, 0.007175, 0.007182, 0.007190, 0.007197, 0.007204, 0.007211", \ + "0.007175, 0.007182, 0.007190, 0.007197, 0.007204, 0.007211, 0.007218", \ + "0.007182, 0.007190, 0.007197, 0.007204, 0.007211, 0.007218, 0.007226" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007205, 0.007212, 0.007219, 0.007226, 0.007233, 0.007241, 0.007248", \ + "0.007889, 0.007897, 0.007905, 0.007913, 0.007921, 0.007929, 0.007937", \ + "0.007897, 0.007905, 0.007913, 0.007921, 0.007929, 0.007937, 0.007945", \ + "0.007905, 0.007913, 0.007921, 0.007929, 0.007937, 0.007945, 0.007953", \ + "0.007913, 0.007921, 0.007929, 0.007937, 0.007945, 0.007953, 0.007961", \ + "0.007921, 0.007929, 0.007937, 0.007945, 0.007953, 0.007961, 0.007969", \ + "0.009026, 0.009035, 0.009044, 0.009053, 0.009062, 0.009071, 0.009081" \ + ); + } + } + pin(AYA[4]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116635, 0.119205, 0.121465, 0.126495, 0.139635, 0.160455, 0.201855", \ + "0.117155, 0.119725, 0.121985, 0.127015, 0.140155, 0.160975, 0.202375", \ + "0.117935, 0.120505, 0.122765, 0.127795, 0.140935, 0.161755, 0.203155", \ + "0.119785, 0.122355, 0.124615, 0.129645, 0.142785, 0.163605, 0.205005", \ + "0.122495, 0.125065, 0.127325, 0.132355, 0.145495, 0.166315, 0.207715", \ + "0.122685, 0.125255, 0.127515, 0.132545, 0.145685, 0.166505, 0.207905", \ + "0.124785, 0.127355, 0.129615, 0.134645, 0.147785, 0.168605, 0.210005" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099246, 0.101686, 0.103796, 0.108536, 0.120906, 0.140526, 0.179376", \ + "0.099666, 0.102106, 0.104216, 0.108956, 0.121326, 0.140946, 0.179796", \ + "0.100546, 0.102986, 0.105096, 0.109836, 0.122206, 0.141826, 0.180676", \ + "0.102286, 0.104726, 0.106836, 0.111576, 0.123946, 0.143566, 0.182416", \ + "0.104946, 0.107386, 0.109496, 0.114236, 0.126606, 0.146226, 0.185076", \ + "0.105216, 0.107656, 0.109766, 0.114506, 0.126876, 0.146496, 0.185346", \ + "0.107266, 0.109706, 0.111816, 0.116556, 0.128926, 0.148546, 0.187396" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111099, 0.114244, 0.117054, 0.123594, 0.142354, 0.173494, 0.235864", \ + "0.111683, 0.114828, 0.117638, 0.124178, 0.142938, 0.174078, 0.236448", \ + "0.113104, 0.116249, 0.119059, 0.125599, 0.144359, 0.175499, 0.237869", \ + "0.115794, 0.118939, 0.121749, 0.128289, 0.147049, 0.178189, 0.240559", \ + "0.125224, 0.128369, 0.131179, 0.137719, 0.156479, 0.187619, 0.249989", \ + "0.128974, 0.132119, 0.134929, 0.141469, 0.160229, 0.191369, 0.253739", \ + "0.138474, 0.141619, 0.144429, 0.150969, 0.169729, 0.200869, 0.263239" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093648, 0.096723, 0.099470, 0.105790, 0.124130, 0.154680, 0.215880", \ + "0.094096, 0.097171, 0.099918, 0.106238, 0.124578, 0.155128, 0.216328", \ + "0.095683, 0.098758, 0.101505, 0.107825, 0.126165, 0.156715, 0.217915", \ + "0.098290, 0.101365, 0.104112, 0.110432, 0.128772, 0.159322, 0.220522", \ + "0.107750, 0.110825, 0.113572, 0.119892, 0.138232, 0.168782, 0.229982", \ + "0.111470, 0.114545, 0.117292, 0.123612, 0.141952, 0.172502, 0.233702", \ + "0.120940, 0.124015, 0.126762, 0.133082, 0.151422, 0.181972, 0.243172" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107918, 0.111072, 0.113893, 0.120423, 0.139153, 0.170273, 0.232663", \ + "0.108495, 0.111649, 0.114470, 0.121000, 0.139730, 0.170850, 0.233240", \ + "0.109260, 0.112414, 0.115235, 0.121765, 0.140495, 0.171615, 0.234005", \ + "0.111433, 0.114587, 0.117408, 0.123938, 0.142668, 0.173788, 0.236178", \ + "0.113493, 0.116647, 0.119468, 0.125998, 0.144728, 0.175848, 0.238238", \ + "0.114343, 0.117497, 0.120318, 0.126848, 0.145578, 0.176698, 0.239088", \ + "0.113743, 0.116897, 0.119718, 0.126248, 0.144978, 0.176098, 0.238488" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090771, 0.093833, 0.096583, 0.102894, 0.121214, 0.151744, 0.212844", \ + "0.091316, 0.094378, 0.097128, 0.103439, 0.121759, 0.152289, 0.213389", \ + "0.092275, 0.095337, 0.098087, 0.104398, 0.122718, 0.153248, 0.214348", \ + "0.094127, 0.097189, 0.099939, 0.106250, 0.124570, 0.155100, 0.216200", \ + "0.096405, 0.099467, 0.102217, 0.108528, 0.126848, 0.157378, 0.218478", \ + "0.097301, 0.100363, 0.103113, 0.109424, 0.127744, 0.158274, 0.219374", \ + "0.096598, 0.099660, 0.102410, 0.108721, 0.127041, 0.157571, 0.218671" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.110173, 0.112745, 0.115035, 0.120085, 0.133215, 0.154075, 0.195405", \ + "0.110995, 0.113567, 0.115857, 0.120907, 0.134037, 0.154897, 0.196227", \ + "0.111805, 0.114377, 0.116667, 0.121717, 0.134847, 0.155707, 0.197037", \ + "0.113925, 0.116497, 0.118787, 0.123837, 0.136967, 0.157827, 0.199157", \ + "0.123845, 0.126417, 0.128707, 0.133757, 0.146887, 0.167747, 0.209077", \ + "0.127395, 0.129967, 0.132257, 0.137307, 0.150437, 0.171297, 0.212627", \ + "0.140235, 0.142807, 0.145097, 0.150147, 0.163277, 0.184137, 0.225467" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093647, 0.096093, 0.098226, 0.102976, 0.115356, 0.134896, 0.173806", \ + "0.094335, 0.096781, 0.098914, 0.103664, 0.116044, 0.135584, 0.174494", \ + "0.095239, 0.097685, 0.099818, 0.104568, 0.116948, 0.136488, 0.175398", \ + "0.097266, 0.099712, 0.101845, 0.106595, 0.118975, 0.138515, 0.177425", \ + "0.107236, 0.109682, 0.111815, 0.116565, 0.128945, 0.148485, 0.187395", \ + "0.110786, 0.113232, 0.115365, 0.120115, 0.132495, 0.152035, 0.190945", \ + "0.123616, 0.126062, 0.128195, 0.132945, 0.145325, 0.164865, 0.203775" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + pin(AYA[3]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116635, 0.119205, 0.121465, 0.126495, 0.139635, 0.160455, 0.201855", \ + "0.117155, 0.119725, 0.121985, 0.127015, 0.140155, 0.160975, 0.202375", \ + "0.117935, 0.120505, 0.122765, 0.127795, 0.140935, 0.161755, 0.203155", \ + "0.119785, 0.122355, 0.124615, 0.129645, 0.142785, 0.163605, 0.205005", \ + "0.122495, 0.125065, 0.127325, 0.132355, 0.145495, 0.166315, 0.207715", \ + "0.122685, 0.125255, 0.127515, 0.132545, 0.145685, 0.166505, 0.207905", \ + "0.124785, 0.127355, 0.129615, 0.134645, 0.147785, 0.168605, 0.210005" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099246, 0.101686, 0.103796, 0.108536, 0.120906, 0.140526, 0.179376", \ + "0.099666, 0.102106, 0.104216, 0.108956, 0.121326, 0.140946, 0.179796", \ + "0.100546, 0.102986, 0.105096, 0.109836, 0.122206, 0.141826, 0.180676", \ + "0.102286, 0.104726, 0.106836, 0.111576, 0.123946, 0.143566, 0.182416", \ + "0.104946, 0.107386, 0.109496, 0.114236, 0.126606, 0.146226, 0.185076", \ + "0.105216, 0.107656, 0.109766, 0.114506, 0.126876, 0.146496, 0.185346", \ + "0.107266, 0.109706, 0.111816, 0.116556, 0.128926, 0.148546, 0.187396" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111099, 0.114244, 0.117054, 0.123594, 0.142354, 0.173494, 0.235864", \ + "0.111683, 0.114828, 0.117638, 0.124178, 0.142938, 0.174078, 0.236448", \ + "0.113104, 0.116249, 0.119059, 0.125599, 0.144359, 0.175499, 0.237869", \ + "0.115794, 0.118939, 0.121749, 0.128289, 0.147049, 0.178189, 0.240559", \ + "0.125224, 0.128369, 0.131179, 0.137719, 0.156479, 0.187619, 0.249989", \ + "0.128974, 0.132119, 0.134929, 0.141469, 0.160229, 0.191369, 0.253739", \ + "0.138474, 0.141619, 0.144429, 0.150969, 0.169729, 0.200869, 0.263239" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093648, 0.096723, 0.099470, 0.105790, 0.124130, 0.154680, 0.215880", \ + "0.094096, 0.097171, 0.099918, 0.106238, 0.124578, 0.155128, 0.216328", \ + "0.095683, 0.098758, 0.101505, 0.107825, 0.126165, 0.156715, 0.217915", \ + "0.098290, 0.101365, 0.104112, 0.110432, 0.128772, 0.159322, 0.220522", \ + "0.107750, 0.110825, 0.113572, 0.119892, 0.138232, 0.168782, 0.229982", \ + "0.111470, 0.114545, 0.117292, 0.123612, 0.141952, 0.172502, 0.233702", \ + "0.120940, 0.124015, 0.126762, 0.133082, 0.151422, 0.181972, 0.243172" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107918, 0.111072, 0.113893, 0.120423, 0.139153, 0.170273, 0.232663", \ + "0.108495, 0.111649, 0.114470, 0.121000, 0.139730, 0.170850, 0.233240", \ + "0.109260, 0.112414, 0.115235, 0.121765, 0.140495, 0.171615, 0.234005", \ + "0.111433, 0.114587, 0.117408, 0.123938, 0.142668, 0.173788, 0.236178", \ + "0.113493, 0.116647, 0.119468, 0.125998, 0.144728, 0.175848, 0.238238", \ + "0.114343, 0.117497, 0.120318, 0.126848, 0.145578, 0.176698, 0.239088", \ + "0.113743, 0.116897, 0.119718, 0.126248, 0.144978, 0.176098, 0.238488" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090771, 0.093833, 0.096583, 0.102894, 0.121214, 0.151744, 0.212844", \ + "0.091316, 0.094378, 0.097128, 0.103439, 0.121759, 0.152289, 0.213389", \ + "0.092275, 0.095337, 0.098087, 0.104398, 0.122718, 0.153248, 0.214348", \ + "0.094127, 0.097189, 0.099939, 0.106250, 0.124570, 0.155100, 0.216200", \ + "0.096405, 0.099467, 0.102217, 0.108528, 0.126848, 0.157378, 0.218478", \ + "0.097301, 0.100363, 0.103113, 0.109424, 0.127744, 0.158274, 0.219374", \ + "0.096598, 0.099660, 0.102410, 0.108721, 0.127041, 0.157571, 0.218671" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.110173, 0.112745, 0.115035, 0.120085, 0.133215, 0.154075, 0.195405", \ + "0.110995, 0.113567, 0.115857, 0.120907, 0.134037, 0.154897, 0.196227", \ + "0.111805, 0.114377, 0.116667, 0.121717, 0.134847, 0.155707, 0.197037", \ + "0.113925, 0.116497, 0.118787, 0.123837, 0.136967, 0.157827, 0.199157", \ + "0.123845, 0.126417, 0.128707, 0.133757, 0.146887, 0.167747, 0.209077", \ + "0.127395, 0.129967, 0.132257, 0.137307, 0.150437, 0.171297, 0.212627", \ + "0.140235, 0.142807, 0.145097, 0.150147, 0.163277, 0.184137, 0.225467" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093647, 0.096093, 0.098226, 0.102976, 0.115356, 0.134896, 0.173806", \ + "0.094335, 0.096781, 0.098914, 0.103664, 0.116044, 0.135584, 0.174494", \ + "0.095239, 0.097685, 0.099818, 0.104568, 0.116948, 0.136488, 0.175398", \ + "0.097266, 0.099712, 0.101845, 0.106595, 0.118975, 0.138515, 0.177425", \ + "0.107236, 0.109682, 0.111815, 0.116565, 0.128945, 0.148485, 0.187395", \ + "0.110786, 0.113232, 0.115365, 0.120115, 0.132495, 0.152035, 0.190945", \ + "0.123616, 0.126062, 0.128195, 0.132945, 0.145325, 0.164865, 0.203775" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + pin(AYA[2]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116635, 0.119205, 0.121465, 0.126495, 0.139635, 0.160455, 0.201855", \ + "0.117155, 0.119725, 0.121985, 0.127015, 0.140155, 0.160975, 0.202375", \ + "0.117935, 0.120505, 0.122765, 0.127795, 0.140935, 0.161755, 0.203155", \ + "0.119785, 0.122355, 0.124615, 0.129645, 0.142785, 0.163605, 0.205005", \ + "0.122495, 0.125065, 0.127325, 0.132355, 0.145495, 0.166315, 0.207715", \ + "0.122685, 0.125255, 0.127515, 0.132545, 0.145685, 0.166505, 0.207905", \ + "0.124785, 0.127355, 0.129615, 0.134645, 0.147785, 0.168605, 0.210005" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099246, 0.101686, 0.103796, 0.108536, 0.120906, 0.140526, 0.179376", \ + "0.099666, 0.102106, 0.104216, 0.108956, 0.121326, 0.140946, 0.179796", \ + "0.100546, 0.102986, 0.105096, 0.109836, 0.122206, 0.141826, 0.180676", \ + "0.102286, 0.104726, 0.106836, 0.111576, 0.123946, 0.143566, 0.182416", \ + "0.104946, 0.107386, 0.109496, 0.114236, 0.126606, 0.146226, 0.185076", \ + "0.105216, 0.107656, 0.109766, 0.114506, 0.126876, 0.146496, 0.185346", \ + "0.107266, 0.109706, 0.111816, 0.116556, 0.128926, 0.148546, 0.187396" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111099, 0.114244, 0.117054, 0.123594, 0.142354, 0.173494, 0.235864", \ + "0.111683, 0.114828, 0.117638, 0.124178, 0.142938, 0.174078, 0.236448", \ + "0.113104, 0.116249, 0.119059, 0.125599, 0.144359, 0.175499, 0.237869", \ + "0.115794, 0.118939, 0.121749, 0.128289, 0.147049, 0.178189, 0.240559", \ + "0.125224, 0.128369, 0.131179, 0.137719, 0.156479, 0.187619, 0.249989", \ + "0.128974, 0.132119, 0.134929, 0.141469, 0.160229, 0.191369, 0.253739", \ + "0.138474, 0.141619, 0.144429, 0.150969, 0.169729, 0.200869, 0.263239" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093648, 0.096723, 0.099470, 0.105790, 0.124130, 0.154680, 0.215880", \ + "0.094096, 0.097171, 0.099918, 0.106238, 0.124578, 0.155128, 0.216328", \ + "0.095683, 0.098758, 0.101505, 0.107825, 0.126165, 0.156715, 0.217915", \ + "0.098290, 0.101365, 0.104112, 0.110432, 0.128772, 0.159322, 0.220522", \ + "0.107750, 0.110825, 0.113572, 0.119892, 0.138232, 0.168782, 0.229982", \ + "0.111470, 0.114545, 0.117292, 0.123612, 0.141952, 0.172502, 0.233702", \ + "0.120940, 0.124015, 0.126762, 0.133082, 0.151422, 0.181972, 0.243172" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107918, 0.111072, 0.113893, 0.120423, 0.139153, 0.170273, 0.232663", \ + "0.108495, 0.111649, 0.114470, 0.121000, 0.139730, 0.170850, 0.233240", \ + "0.109260, 0.112414, 0.115235, 0.121765, 0.140495, 0.171615, 0.234005", \ + "0.111433, 0.114587, 0.117408, 0.123938, 0.142668, 0.173788, 0.236178", \ + "0.113493, 0.116647, 0.119468, 0.125998, 0.144728, 0.175848, 0.238238", \ + "0.114343, 0.117497, 0.120318, 0.126848, 0.145578, 0.176698, 0.239088", \ + "0.113743, 0.116897, 0.119718, 0.126248, 0.144978, 0.176098, 0.238488" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090771, 0.093833, 0.096583, 0.102894, 0.121214, 0.151744, 0.212844", \ + "0.091316, 0.094378, 0.097128, 0.103439, 0.121759, 0.152289, 0.213389", \ + "0.092275, 0.095337, 0.098087, 0.104398, 0.122718, 0.153248, 0.214348", \ + "0.094127, 0.097189, 0.099939, 0.106250, 0.124570, 0.155100, 0.216200", \ + "0.096405, 0.099467, 0.102217, 0.108528, 0.126848, 0.157378, 0.218478", \ + "0.097301, 0.100363, 0.103113, 0.109424, 0.127744, 0.158274, 0.219374", \ + "0.096598, 0.099660, 0.102410, 0.108721, 0.127041, 0.157571, 0.218671" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.110173, 0.112745, 0.115035, 0.120085, 0.133215, 0.154075, 0.195405", \ + "0.110995, 0.113567, 0.115857, 0.120907, 0.134037, 0.154897, 0.196227", \ + "0.111805, 0.114377, 0.116667, 0.121717, 0.134847, 0.155707, 0.197037", \ + "0.113925, 0.116497, 0.118787, 0.123837, 0.136967, 0.157827, 0.199157", \ + "0.123845, 0.126417, 0.128707, 0.133757, 0.146887, 0.167747, 0.209077", \ + "0.127395, 0.129967, 0.132257, 0.137307, 0.150437, 0.171297, 0.212627", \ + "0.140235, 0.142807, 0.145097, 0.150147, 0.163277, 0.184137, 0.225467" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093647, 0.096093, 0.098226, 0.102976, 0.115356, 0.134896, 0.173806", \ + "0.094335, 0.096781, 0.098914, 0.103664, 0.116044, 0.135584, 0.174494", \ + "0.095239, 0.097685, 0.099818, 0.104568, 0.116948, 0.136488, 0.175398", \ + "0.097266, 0.099712, 0.101845, 0.106595, 0.118975, 0.138515, 0.177425", \ + "0.107236, 0.109682, 0.111815, 0.116565, 0.128945, 0.148485, 0.187395", \ + "0.110786, 0.113232, 0.115365, 0.120115, 0.132495, 0.152035, 0.190945", \ + "0.123616, 0.126062, 0.128195, 0.132945, 0.145325, 0.164865, 0.203775" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + pin(AYA[1]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116635, 0.119205, 0.121465, 0.126495, 0.139635, 0.160455, 0.201855", \ + "0.117155, 0.119725, 0.121985, 0.127015, 0.140155, 0.160975, 0.202375", \ + "0.117935, 0.120505, 0.122765, 0.127795, 0.140935, 0.161755, 0.203155", \ + "0.119785, 0.122355, 0.124615, 0.129645, 0.142785, 0.163605, 0.205005", \ + "0.122495, 0.125065, 0.127325, 0.132355, 0.145495, 0.166315, 0.207715", \ + "0.122685, 0.125255, 0.127515, 0.132545, 0.145685, 0.166505, 0.207905", \ + "0.124785, 0.127355, 0.129615, 0.134645, 0.147785, 0.168605, 0.210005" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099246, 0.101686, 0.103796, 0.108536, 0.120906, 0.140526, 0.179376", \ + "0.099666, 0.102106, 0.104216, 0.108956, 0.121326, 0.140946, 0.179796", \ + "0.100546, 0.102986, 0.105096, 0.109836, 0.122206, 0.141826, 0.180676", \ + "0.102286, 0.104726, 0.106836, 0.111576, 0.123946, 0.143566, 0.182416", \ + "0.104946, 0.107386, 0.109496, 0.114236, 0.126606, 0.146226, 0.185076", \ + "0.105216, 0.107656, 0.109766, 0.114506, 0.126876, 0.146496, 0.185346", \ + "0.107266, 0.109706, 0.111816, 0.116556, 0.128926, 0.148546, 0.187396" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111099, 0.114244, 0.117054, 0.123594, 0.142354, 0.173494, 0.235864", \ + "0.111683, 0.114828, 0.117638, 0.124178, 0.142938, 0.174078, 0.236448", \ + "0.113104, 0.116249, 0.119059, 0.125599, 0.144359, 0.175499, 0.237869", \ + "0.115794, 0.118939, 0.121749, 0.128289, 0.147049, 0.178189, 0.240559", \ + "0.125224, 0.128369, 0.131179, 0.137719, 0.156479, 0.187619, 0.249989", \ + "0.128974, 0.132119, 0.134929, 0.141469, 0.160229, 0.191369, 0.253739", \ + "0.138474, 0.141619, 0.144429, 0.150969, 0.169729, 0.200869, 0.263239" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093648, 0.096723, 0.099470, 0.105790, 0.124130, 0.154680, 0.215880", \ + "0.094096, 0.097171, 0.099918, 0.106238, 0.124578, 0.155128, 0.216328", \ + "0.095683, 0.098758, 0.101505, 0.107825, 0.126165, 0.156715, 0.217915", \ + "0.098290, 0.101365, 0.104112, 0.110432, 0.128772, 0.159322, 0.220522", \ + "0.107750, 0.110825, 0.113572, 0.119892, 0.138232, 0.168782, 0.229982", \ + "0.111470, 0.114545, 0.117292, 0.123612, 0.141952, 0.172502, 0.233702", \ + "0.120940, 0.124015, 0.126762, 0.133082, 0.151422, 0.181972, 0.243172" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107918, 0.111072, 0.113893, 0.120423, 0.139153, 0.170273, 0.232663", \ + "0.108495, 0.111649, 0.114470, 0.121000, 0.139730, 0.170850, 0.233240", \ + "0.109260, 0.112414, 0.115235, 0.121765, 0.140495, 0.171615, 0.234005", \ + "0.111433, 0.114587, 0.117408, 0.123938, 0.142668, 0.173788, 0.236178", \ + "0.113493, 0.116647, 0.119468, 0.125998, 0.144728, 0.175848, 0.238238", \ + "0.114343, 0.117497, 0.120318, 0.126848, 0.145578, 0.176698, 0.239088", \ + "0.113743, 0.116897, 0.119718, 0.126248, 0.144978, 0.176098, 0.238488" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090771, 0.093833, 0.096583, 0.102894, 0.121214, 0.151744, 0.212844", \ + "0.091316, 0.094378, 0.097128, 0.103439, 0.121759, 0.152289, 0.213389", \ + "0.092275, 0.095337, 0.098087, 0.104398, 0.122718, 0.153248, 0.214348", \ + "0.094127, 0.097189, 0.099939, 0.106250, 0.124570, 0.155100, 0.216200", \ + "0.096405, 0.099467, 0.102217, 0.108528, 0.126848, 0.157378, 0.218478", \ + "0.097301, 0.100363, 0.103113, 0.109424, 0.127744, 0.158274, 0.219374", \ + "0.096598, 0.099660, 0.102410, 0.108721, 0.127041, 0.157571, 0.218671" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.110173, 0.112745, 0.115035, 0.120085, 0.133215, 0.154075, 0.195405", \ + "0.110995, 0.113567, 0.115857, 0.120907, 0.134037, 0.154897, 0.196227", \ + "0.111805, 0.114377, 0.116667, 0.121717, 0.134847, 0.155707, 0.197037", \ + "0.113925, 0.116497, 0.118787, 0.123837, 0.136967, 0.157827, 0.199157", \ + "0.123845, 0.126417, 0.128707, 0.133757, 0.146887, 0.167747, 0.209077", \ + "0.127395, 0.129967, 0.132257, 0.137307, 0.150437, 0.171297, 0.212627", \ + "0.140235, 0.142807, 0.145097, 0.150147, 0.163277, 0.184137, 0.225467" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093647, 0.096093, 0.098226, 0.102976, 0.115356, 0.134896, 0.173806", \ + "0.094335, 0.096781, 0.098914, 0.103664, 0.116044, 0.135584, 0.174494", \ + "0.095239, 0.097685, 0.099818, 0.104568, 0.116948, 0.136488, 0.175398", \ + "0.097266, 0.099712, 0.101845, 0.106595, 0.118975, 0.138515, 0.177425", \ + "0.107236, 0.109682, 0.111815, 0.116565, 0.128945, 0.148485, 0.187395", \ + "0.110786, 0.113232, 0.115365, 0.120115, 0.132495, 0.152035, 0.190945", \ + "0.123616, 0.126062, 0.128195, 0.132945, 0.145325, 0.164865, 0.203775" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + pin(AYA[0]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116635, 0.119205, 0.121465, 0.126495, 0.139635, 0.160455, 0.201855", \ + "0.117155, 0.119725, 0.121985, 0.127015, 0.140155, 0.160975, 0.202375", \ + "0.117935, 0.120505, 0.122765, 0.127795, 0.140935, 0.161755, 0.203155", \ + "0.119785, 0.122355, 0.124615, 0.129645, 0.142785, 0.163605, 0.205005", \ + "0.122495, 0.125065, 0.127325, 0.132355, 0.145495, 0.166315, 0.207715", \ + "0.122685, 0.125255, 0.127515, 0.132545, 0.145685, 0.166505, 0.207905", \ + "0.124785, 0.127355, 0.129615, 0.134645, 0.147785, 0.168605, 0.210005" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099246, 0.101686, 0.103796, 0.108536, 0.120906, 0.140526, 0.179376", \ + "0.099666, 0.102106, 0.104216, 0.108956, 0.121326, 0.140946, 0.179796", \ + "0.100546, 0.102986, 0.105096, 0.109836, 0.122206, 0.141826, 0.180676", \ + "0.102286, 0.104726, 0.106836, 0.111576, 0.123946, 0.143566, 0.182416", \ + "0.104946, 0.107386, 0.109496, 0.114236, 0.126606, 0.146226, 0.185076", \ + "0.105216, 0.107656, 0.109766, 0.114506, 0.126876, 0.146496, 0.185346", \ + "0.107266, 0.109706, 0.111816, 0.116556, 0.128926, 0.148546, 0.187396" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111099, 0.114244, 0.117054, 0.123594, 0.142354, 0.173494, 0.235864", \ + "0.111683, 0.114828, 0.117638, 0.124178, 0.142938, 0.174078, 0.236448", \ + "0.113104, 0.116249, 0.119059, 0.125599, 0.144359, 0.175499, 0.237869", \ + "0.115794, 0.118939, 0.121749, 0.128289, 0.147049, 0.178189, 0.240559", \ + "0.125224, 0.128369, 0.131179, 0.137719, 0.156479, 0.187619, 0.249989", \ + "0.128974, 0.132119, 0.134929, 0.141469, 0.160229, 0.191369, 0.253739", \ + "0.138474, 0.141619, 0.144429, 0.150969, 0.169729, 0.200869, 0.263239" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093648, 0.096723, 0.099470, 0.105790, 0.124130, 0.154680, 0.215880", \ + "0.094096, 0.097171, 0.099918, 0.106238, 0.124578, 0.155128, 0.216328", \ + "0.095683, 0.098758, 0.101505, 0.107825, 0.126165, 0.156715, 0.217915", \ + "0.098290, 0.101365, 0.104112, 0.110432, 0.128772, 0.159322, 0.220522", \ + "0.107750, 0.110825, 0.113572, 0.119892, 0.138232, 0.168782, 0.229982", \ + "0.111470, 0.114545, 0.117292, 0.123612, 0.141952, 0.172502, 0.233702", \ + "0.120940, 0.124015, 0.126762, 0.133082, 0.151422, 0.181972, 0.243172" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107918, 0.111072, 0.113893, 0.120423, 0.139153, 0.170273, 0.232663", \ + "0.108495, 0.111649, 0.114470, 0.121000, 0.139730, 0.170850, 0.233240", \ + "0.109260, 0.112414, 0.115235, 0.121765, 0.140495, 0.171615, 0.234005", \ + "0.111433, 0.114587, 0.117408, 0.123938, 0.142668, 0.173788, 0.236178", \ + "0.113493, 0.116647, 0.119468, 0.125998, 0.144728, 0.175848, 0.238238", \ + "0.114343, 0.117497, 0.120318, 0.126848, 0.145578, 0.176698, 0.239088", \ + "0.113743, 0.116897, 0.119718, 0.126248, 0.144978, 0.176098, 0.238488" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090771, 0.093833, 0.096583, 0.102894, 0.121214, 0.151744, 0.212844", \ + "0.091316, 0.094378, 0.097128, 0.103439, 0.121759, 0.152289, 0.213389", \ + "0.092275, 0.095337, 0.098087, 0.104398, 0.122718, 0.153248, 0.214348", \ + "0.094127, 0.097189, 0.099939, 0.106250, 0.124570, 0.155100, 0.216200", \ + "0.096405, 0.099467, 0.102217, 0.108528, 0.126848, 0.157378, 0.218478", \ + "0.097301, 0.100363, 0.103113, 0.109424, 0.127744, 0.158274, 0.219374", \ + "0.096598, 0.099660, 0.102410, 0.108721, 0.127041, 0.157571, 0.218671" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.110173, 0.112745, 0.115035, 0.120085, 0.133215, 0.154075, 0.195405", \ + "0.110995, 0.113567, 0.115857, 0.120907, 0.134037, 0.154897, 0.196227", \ + "0.111805, 0.114377, 0.116667, 0.121717, 0.134847, 0.155707, 0.197037", \ + "0.113925, 0.116497, 0.118787, 0.123837, 0.136967, 0.157827, 0.199157", \ + "0.123845, 0.126417, 0.128707, 0.133757, 0.146887, 0.167747, 0.209077", \ + "0.127395, 0.129967, 0.132257, 0.137307, 0.150437, 0.171297, 0.212627", \ + "0.140235, 0.142807, 0.145097, 0.150147, 0.163277, 0.184137, 0.225467" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093647, 0.096093, 0.098226, 0.102976, 0.115356, 0.134896, 0.173806", \ + "0.094335, 0.096781, 0.098914, 0.103664, 0.116044, 0.135584, 0.174494", \ + "0.095239, 0.097685, 0.099818, 0.104568, 0.116948, 0.136488, 0.175398", \ + "0.097266, 0.099712, 0.101845, 0.106595, 0.118975, 0.138515, 0.177425", \ + "0.107236, 0.109682, 0.111815, 0.116565, 0.128945, 0.148485, 0.187395", \ + "0.110786, 0.113232, 0.115365, 0.120115, 0.132495, 0.152035, 0.190945", \ + "0.123616, 0.126062, 0.128195, 0.132945, 0.145325, 0.164865, 0.203775" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + } + pin(CENYB) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : CENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.055840, 0.058914, 0.061892, 0.068298, 0.085208, 0.112659, 0.165398", \ + "0.056526, 0.060083, 0.063131, 0.068950, 0.085510, 0.111498, 0.163127", \ + "0.058087, 0.061682, 0.064526, 0.070489, 0.086937, 0.113203, 0.168133", \ + "0.061147, 0.064491, 0.067408, 0.073621, 0.090095, 0.116887, 0.168980", \ + "0.072850, 0.076168, 0.079538, 0.085608, 0.102314, 0.128074, 0.180687", \ + "0.075851, 0.079326, 0.080497, 0.088367, 0.105246, 0.131249, 0.182676", \ + "0.082869, 0.086035, 0.089169, 0.095669, 0.112280, 0.138448, 0.190111" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.048477, 0.051442, 0.054315, 0.060494, 0.076805, 0.103284, 0.154157", \ + "0.049139, 0.052570, 0.055510, 0.061123, 0.077097, 0.102165, 0.151966", \ + "0.050644, 0.054112, 0.056856, 0.062608, 0.078473, 0.103810, 0.156795", \ + "0.053596, 0.056822, 0.059635, 0.065628, 0.081519, 0.107363, 0.157612", \ + "0.064885, 0.068085, 0.071337, 0.077191, 0.093306, 0.118154, 0.168905", \ + "0.067780, 0.071132, 0.072261, 0.079853, 0.096134, 0.121217, 0.170823", \ + "0.074549, 0.077603, 0.080627, 0.086896, 0.102919, 0.128160, 0.177995" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.060140, 0.064261, 0.067764, 0.076407, 0.100360, 0.140538, 0.222870", \ + "0.061736, 0.065302, 0.069075, 0.077277, 0.101533, 0.142504, 0.219389", \ + "0.063288, 0.067415, 0.070871, 0.079465, 0.103341, 0.143578, 0.225943", \ + "0.066647, 0.070740, 0.074062, 0.082370, 0.105978, 0.144922, 0.225684", \ + "0.078664, 0.082849, 0.086383, 0.094738, 0.118819, 0.157714, 0.239967", \ + "0.083315, 0.087446, 0.091259, 0.099703, 0.123565, 0.164121, 0.246340", \ + "0.098654, 0.102967, 0.106585, 0.115102, 0.139159, 0.178065, 0.257437" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.052210, 0.056185, 0.059564, 0.067901, 0.091006, 0.129762, 0.209180", \ + "0.053750, 0.057189, 0.060828, 0.068741, 0.092138, 0.131659, 0.205822", \ + "0.055247, 0.059227, 0.062562, 0.070851, 0.093882, 0.132694, 0.212144", \ + "0.058487, 0.062435, 0.065640, 0.073653, 0.096426, 0.133991, 0.211894", \ + "0.070078, 0.074116, 0.077524, 0.085583, 0.108812, 0.146330, 0.225671", \ + "0.074565, 0.078550, 0.082227, 0.090373, 0.113390, 0.152511, 0.231819", \ + "0.089360, 0.093521, 0.097011, 0.105226, 0.128432, 0.165961, 0.242523" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056217, 0.059330, 0.062265, 0.068850, 0.085271, 0.111676, 0.164912", \ + "0.056850, 0.060209, 0.063343, 0.069937, 0.086466, 0.112595, 0.166246", \ + "0.058507, 0.061968, 0.064757, 0.071006, 0.087574, 0.113463, 0.165048", \ + "0.061644, 0.065063, 0.067832, 0.074068, 0.090810, 0.117418, 0.169251", \ + "0.072782, 0.075979, 0.078938, 0.085305, 0.102101, 0.129261, 0.184213", \ + "0.076066, 0.079345, 0.082207, 0.088426, 0.105093, 0.131781, 0.186292", \ + "0.083830, 0.086973, 0.089916, 0.096262, 0.112594, 0.138482, 0.190767" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.048805, 0.051807, 0.054638, 0.060990, 0.076830, 0.102300, 0.153652", \ + "0.049415, 0.052655, 0.055678, 0.062038, 0.077983, 0.103187, 0.154938", \ + "0.051013, 0.054352, 0.057042, 0.063070, 0.079051, 0.104024, 0.153783", \ + "0.054039, 0.057337, 0.060008, 0.066023, 0.082173, 0.107839, 0.157837", \ + "0.064783, 0.067867, 0.070721, 0.076862, 0.093064, 0.119262, 0.172269", \ + "0.067951, 0.071114, 0.073875, 0.079873, 0.095951, 0.121693, 0.174275", \ + "0.075440, 0.078471, 0.081311, 0.087432, 0.103186, 0.128157, 0.178591" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.058607, 0.062699, 0.066523, 0.074693, 0.098909, 0.137815, 0.216237", \ + "0.060184, 0.063395, 0.067287, 0.075234, 0.098778, 0.138820, 0.218113", \ + "0.062143, 0.065686, 0.069445, 0.077480, 0.101758, 0.141092, 0.219909", \ + "0.064897, 0.069017, 0.072535, 0.081061, 0.105101, 0.143860, 0.227322", \ + "0.077290, 0.081398, 0.085583, 0.093939, 0.117588, 0.157658, 0.236656", \ + "0.081845, 0.086012, 0.090189, 0.098629, 0.121870, 0.163454, 0.243153", \ + "0.096752, 0.100819, 0.104550, 0.113734, 0.138199, 0.176788, 0.255030" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.050880, 0.054826, 0.058515, 0.066396, 0.089754, 0.127283, 0.202929", \ + "0.052400, 0.055498, 0.059252, 0.066918, 0.089628, 0.128253, 0.204739", \ + "0.054290, 0.057707, 0.061334, 0.069084, 0.092502, 0.130444, 0.206472", \ + "0.056947, 0.060921, 0.064314, 0.072538, 0.095728, 0.133115, 0.213622", \ + "0.068901, 0.072864, 0.076900, 0.084961, 0.107772, 0.146424, 0.222625", \ + "0.073294, 0.077314, 0.081343, 0.089484, 0.111903, 0.152015, 0.228893", \ + "0.087674, 0.091597, 0.095196, 0.104055, 0.127654, 0.164877, 0.240349" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENB&CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.087142, 0.089958, 0.092563, 0.098368, 0.113883, 0.138733, 0.188553", \ + "0.087695, 0.090511, 0.093116, 0.098921, 0.114436, 0.139286, 0.189106", \ + "0.088461, 0.091277, 0.093882, 0.099687, 0.115202, 0.140052, 0.189872", \ + "0.090085, 0.092901, 0.095506, 0.101311, 0.116826, 0.141676, 0.191496", \ + "0.098495, 0.101311, 0.103916, 0.109721, 0.125236, 0.150086, 0.199906", \ + "0.101761, 0.104577, 0.107182, 0.112987, 0.128502, 0.153352, 0.203172", \ + "0.110973, 0.113789, 0.116394, 0.122199, 0.137714, 0.162564, 0.212384" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.075200, 0.078016, 0.080621, 0.086426, 0.101941, 0.126791, 0.176611", \ + "0.075753, 0.078569, 0.081174, 0.086979, 0.102494, 0.127344, 0.177164", \ + "0.076519, 0.079335, 0.081940, 0.087745, 0.103260, 0.128110, 0.177930", \ + "0.078143, 0.080959, 0.083564, 0.089369, 0.104884, 0.129734, 0.179554", \ + "0.086553, 0.089369, 0.091974, 0.097779, 0.113294, 0.138144, 0.187964", \ + "0.089819, 0.092635, 0.095240, 0.101045, 0.116560, 0.141410, 0.191230", \ + "0.099031, 0.101847, 0.104452, 0.110257, 0.125772, 0.150622, 0.200442" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.095934, 0.100258, 0.103474, 0.111122, 0.133747, 0.170387, 0.244067", \ + "0.097030, 0.101354, 0.104570, 0.112218, 0.134843, 0.171483, 0.245163", \ + "0.098473, 0.102797, 0.106013, 0.113661, 0.136286, 0.172926, 0.246606", \ + "0.101089, 0.105413, 0.108629, 0.116277, 0.138902, 0.175542, 0.249222", \ + "0.108437, 0.112761, 0.115977, 0.123625, 0.146250, 0.182890, 0.256570", \ + "0.109196, 0.113520, 0.116736, 0.124384, 0.147009, 0.183649, 0.257329", \ + "0.114247, 0.118571, 0.121787, 0.129435, 0.152060, 0.188700, 0.262380" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.082636, 0.086960, 0.090176, 0.097824, 0.120449, 0.157089, 0.230769", \ + "0.083732, 0.088056, 0.091272, 0.098920, 0.121545, 0.158185, 0.231865", \ + "0.085175, 0.089499, 0.092715, 0.100363, 0.122988, 0.159628, 0.233308", \ + "0.087791, 0.092115, 0.095331, 0.102979, 0.125604, 0.162244, 0.235924", \ + "0.095139, 0.099463, 0.102679, 0.110327, 0.132952, 0.169592, 0.243272", \ + "0.095898, 0.100222, 0.103438, 0.111086, 0.133711, 0.170351, 0.244031", \ + "0.100949, 0.105273, 0.108489, 0.116137, 0.138762, 0.175402, 0.249082" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENB&!CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.172128, 0.175958, 0.179918, 0.187108, 0.209218, 0.246248, 0.320398", \ + "0.172878, 0.176708, 0.180668, 0.187858, 0.209968, 0.246998, 0.321148", \ + "0.173608, 0.177438, 0.181398, 0.188588, 0.210698, 0.247728, 0.321878", \ + "0.176928, 0.180758, 0.184718, 0.191908, 0.214018, 0.251048, 0.325198", \ + "0.184598, 0.188428, 0.192388, 0.199578, 0.221688, 0.258718, 0.332868", \ + "0.188198, 0.192028, 0.195988, 0.203178, 0.225288, 0.262318, 0.336468", \ + "0.195458, 0.199288, 0.203248, 0.210438, 0.232548, 0.269578, 0.343728" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.148801, 0.152631, 0.156591, 0.163781, 0.185891, 0.222921, 0.297071", \ + "0.149551, 0.153381, 0.157341, 0.164531, 0.186641, 0.223671, 0.297821", \ + "0.150281, 0.154111, 0.158071, 0.165261, 0.187371, 0.224401, 0.298551", \ + "0.153601, 0.157431, 0.161391, 0.168581, 0.190691, 0.227721, 0.301871", \ + "0.161271, 0.165101, 0.169061, 0.176251, 0.198361, 0.235391, 0.309541", \ + "0.164871, 0.168701, 0.172661, 0.179851, 0.201961, 0.238991, 0.313141", \ + "0.172131, 0.175961, 0.179921, 0.187111, 0.209221, 0.246251, 0.320401" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.152020, 0.155171, 0.157656, 0.163436, 0.179086, 0.203976, 0.253656", \ + "0.152669, 0.155820, 0.158305, 0.164085, 0.179735, 0.204625, 0.254305", \ + "0.153351, 0.156502, 0.158987, 0.164767, 0.180417, 0.205307, 0.254987", \ + "0.156016, 0.159167, 0.161652, 0.167432, 0.183082, 0.207972, 0.257652", \ + "0.163056, 0.166207, 0.168692, 0.174472, 0.190122, 0.215012, 0.264692", \ + "0.165336, 0.168487, 0.170972, 0.176752, 0.192402, 0.217292, 0.266972", \ + "0.172076, 0.175227, 0.177712, 0.183492, 0.199142, 0.224032, 0.273712" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.131484, 0.134635, 0.137120, 0.142900, 0.158550, 0.183440, 0.233120", \ + "0.132133, 0.135284, 0.137769, 0.143549, 0.159199, 0.184089, 0.233769", \ + "0.132815, 0.135966, 0.138451, 0.144231, 0.159881, 0.184771, 0.234451", \ + "0.135480, 0.138631, 0.141116, 0.146896, 0.162546, 0.187436, 0.237116", \ + "0.142520, 0.145671, 0.148156, 0.153936, 0.169586, 0.194476, 0.244156", \ + "0.144800, 0.147951, 0.150436, 0.156216, 0.171866, 0.196756, 0.246436", \ + "0.151540, 0.154691, 0.157176, 0.162956, 0.178606, 0.203496, 0.253176" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.071080, 0.073956, 0.076110, 0.082539, 0.098069, 0.122314, 0.172354", \ + "0.071858, 0.074734, 0.076888, 0.083317, 0.098847, 0.123092, 0.173132", \ + "0.072858, 0.075734, 0.077888, 0.084317, 0.099847, 0.124092, 0.174132", \ + "0.075756, 0.078632, 0.080786, 0.087215, 0.102745, 0.126990, 0.177030", \ + "0.083398, 0.086274, 0.088428, 0.094857, 0.110387, 0.134632, 0.184672", \ + "0.086366, 0.089242, 0.091396, 0.097825, 0.113355, 0.137600, 0.187640", \ + "0.091380, 0.094256, 0.096410, 0.102839, 0.118369, 0.142614, 0.192654" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061193, 0.064069, 0.066223, 0.072652, 0.088182, 0.112427, 0.162467", \ + "0.061971, 0.064847, 0.067001, 0.073430, 0.088960, 0.113205, 0.163245", \ + "0.062971, 0.065847, 0.068001, 0.074430, 0.089960, 0.114205, 0.164245", \ + "0.065869, 0.068745, 0.070899, 0.077328, 0.092858, 0.117103, 0.167143", \ + "0.073511, 0.076387, 0.078541, 0.084970, 0.100500, 0.124745, 0.174785", \ + "0.076479, 0.079355, 0.081509, 0.087938, 0.103468, 0.127713, 0.177753", \ + "0.081493, 0.084369, 0.086523, 0.092952, 0.108482, 0.132727, 0.182767" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093991, 0.098006, 0.100985, 0.108922, 0.130895, 0.167755, 0.241515", \ + "0.094786, 0.098801, 0.101780, 0.109717, 0.131690, 0.168550, 0.242310", \ + "0.096505, 0.100520, 0.103499, 0.111436, 0.133409, 0.170269, 0.244029", \ + "0.098736, 0.102751, 0.105730, 0.113667, 0.135640, 0.172500, 0.246260", \ + "0.107716, 0.111731, 0.114710, 0.122647, 0.144620, 0.181480, 0.255240", \ + "0.109383, 0.113398, 0.116377, 0.124314, 0.146287, 0.183147, 0.256907", \ + "0.116790, 0.120805, 0.123784, 0.131721, 0.153694, 0.190554, 0.264314" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.080970, 0.084985, 0.087964, 0.095901, 0.117874, 0.154734, 0.228494", \ + "0.081765, 0.085780, 0.088759, 0.096696, 0.118669, 0.155529, 0.229289", \ + "0.083484, 0.087499, 0.090478, 0.098415, 0.120388, 0.157248, 0.231008", \ + "0.085715, 0.089730, 0.092709, 0.100646, 0.122619, 0.159479, 0.233239", \ + "0.094695, 0.098710, 0.101689, 0.109626, 0.131599, 0.168459, 0.242219", \ + "0.096362, 0.100377, 0.103356, 0.111293, 0.133266, 0.170126, 0.243886", \ + "0.103769, 0.107784, 0.110763, 0.118700, 0.140673, 0.177533, 0.251293" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + } + internal_power() { + related_pin : CENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TCENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENB&CENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENB&!CENB"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005936, 0.005942, 0.005948, 0.005954, 0.005960, 0.005966, 0.005972", \ + "0.006463, 0.006469, 0.006476, 0.006482, 0.006488, 0.006495, 0.006501", \ + "0.007354, 0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413", \ + "0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421", \ + "0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421, 0.007428" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006695, 0.006702, 0.006708, 0.006715, 0.006722, 0.006729, 0.006735", \ + "0.006759, 0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800", \ + "0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800, 0.006807", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.007170, 0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213", \ + "0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213, 0.007220", \ + "0.007875, 0.007883, 0.007891, 0.007899, 0.007907, 0.007914, 0.007922" \ + ); + } + } + } + bus(WENYB) { + bus_type : rf2_32x128_wm1_WENYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : WENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.065091, 0.068365, 0.071112, 0.076758, 0.091768, 0.114989, 0.161703", \ + "0.065879, 0.069007, 0.071924, 0.077944, 0.092922, 0.117350, 0.166483", \ + "0.067589, 0.070721, 0.073641, 0.079657, 0.094774, 0.118209, 0.166087", \ + "0.070434, 0.073657, 0.076376, 0.082240, 0.097209, 0.120288, 0.167997", \ + "0.081005, 0.084180, 0.086726, 0.092674, 0.107579, 0.130628, 0.177116", \ + "0.085736, 0.088955, 0.091591, 0.097478, 0.112408, 0.135713, 0.181489", \ + "0.098734, 0.102211, 0.104815, 0.110511, 0.125306, 0.148527, 0.195558" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056509, 0.059666, 0.062316, 0.067762, 0.082241, 0.104640, 0.149700", \ + "0.057268, 0.060285, 0.063100, 0.068906, 0.083354, 0.106918, 0.154311", \ + "0.058917, 0.061939, 0.064755, 0.070559, 0.085141, 0.107746, 0.153929", \ + "0.061662, 0.064771, 0.067393, 0.073050, 0.087490, 0.109752, 0.155772", \ + "0.071859, 0.074922, 0.077378, 0.083114, 0.097493, 0.119725, 0.164568", \ + "0.076423, 0.079527, 0.082070, 0.087749, 0.102150, 0.124630, 0.168786", \ + "0.088960, 0.092314, 0.094826, 0.100320, 0.114591, 0.136991, 0.182357" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.063261, 0.066951, 0.070303, 0.077399, 0.098005, 0.134809, 0.201535", \ + "0.063359, 0.066882, 0.070332, 0.077275, 0.098292, 0.134911, 0.203750", \ + "0.066151, 0.069434, 0.072543, 0.079799, 0.100446, 0.135645, 0.207513", \ + "0.067869, 0.071770, 0.074991, 0.082196, 0.103247, 0.138764, 0.207762", \ + "0.077867, 0.081913, 0.085148, 0.092397, 0.113576, 0.148934, 0.218361", \ + "0.085635, 0.089415, 0.092701, 0.100320, 0.120808, 0.157047, 0.230000", \ + "0.102491, 0.106753, 0.108981, 0.116266, 0.137012, 0.171150, 0.242261" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.054919, 0.058479, 0.061712, 0.068557, 0.088434, 0.123935, 0.188299", \ + "0.055014, 0.058413, 0.061741, 0.068438, 0.088710, 0.124033, 0.190436", \ + "0.057708, 0.060874, 0.063873, 0.070873, 0.090788, 0.124741, 0.194065", \ + "0.059364, 0.063127, 0.066235, 0.073184, 0.093490, 0.127750, 0.194305", \ + "0.069009, 0.072911, 0.076032, 0.083024, 0.103454, 0.137560, 0.204529", \ + "0.076501, 0.080147, 0.083317, 0.090667, 0.110430, 0.145386, 0.215756", \ + "0.092761, 0.096872, 0.099021, 0.106048, 0.126060, 0.158989, 0.227583" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697" \ + ); + } + } + timing() { + related_pin : TWENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.065161, 0.068518, 0.071254, 0.076960, 0.092217, 0.115407, 0.163997", \ + "0.065922, 0.069441, 0.072014, 0.077706, 0.092629, 0.115814, 0.164099", \ + "0.067716, 0.071128, 0.074094, 0.079570, 0.094748, 0.118514, 0.168381", \ + "0.070156, 0.073364, 0.076301, 0.082297, 0.097408, 0.121012, 0.170709", \ + "0.080871, 0.084179, 0.087117, 0.092975, 0.107987, 0.131080, 0.179952", \ + "0.086628, 0.089845, 0.092620, 0.098463, 0.113249, 0.136402, 0.184348", \ + "0.099425, 0.102572, 0.105128, 0.111142, 0.126063, 0.149250, 0.196371" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056569, 0.059807, 0.062447, 0.067950, 0.082667, 0.105036, 0.151906", \ + "0.057303, 0.060697, 0.063179, 0.068669, 0.083065, 0.105429, 0.152004", \ + "0.059034, 0.062325, 0.065186, 0.070468, 0.085109, 0.108034, 0.156135", \ + "0.061387, 0.064482, 0.067315, 0.073098, 0.087675, 0.110443, 0.158381", \ + "0.071723, 0.074914, 0.077748, 0.083399, 0.097879, 0.120155, 0.167297", \ + "0.077276, 0.080379, 0.083056, 0.088692, 0.102954, 0.125288, 0.171537", \ + "0.089620, 0.092656, 0.095122, 0.100923, 0.115315, 0.137682, 0.183135" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061758, 0.065428, 0.068609, 0.075908, 0.096371, 0.132492, 0.203287", \ + "0.062734, 0.066365, 0.069898, 0.076800, 0.097618, 0.133080, 0.202937", \ + "0.064599, 0.068688, 0.071678, 0.079147, 0.100391, 0.136504, 0.204666", \ + "0.067464, 0.071028, 0.074307, 0.081467, 0.102416, 0.138945, 0.211502", \ + "0.077407, 0.081379, 0.084697, 0.091864, 0.112845, 0.149612, 0.218485", \ + "0.084890, 0.088926, 0.091974, 0.099273, 0.119735, 0.156132, 0.225412", \ + "0.101551, 0.105719, 0.107877, 0.115170, 0.135928, 0.170155, 0.239741" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.053615, 0.057155, 0.060223, 0.067264, 0.087002, 0.121845, 0.190134", \ + "0.054556, 0.058059, 0.061467, 0.068125, 0.088206, 0.122412, 0.189796", \ + "0.056355, 0.060300, 0.063184, 0.070389, 0.090881, 0.125715, 0.191464", \ + "0.059119, 0.062557, 0.065719, 0.072626, 0.092834, 0.128069, 0.198058", \ + "0.068710, 0.072541, 0.075742, 0.082655, 0.102893, 0.138359, 0.204794", \ + "0.075928, 0.079821, 0.082761, 0.089802, 0.109539, 0.144648, 0.211476", \ + "0.091999, 0.096020, 0.098101, 0.105136, 0.125159, 0.158175, 0.225297" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124575, 0.127862, 0.130158, 0.135643, 0.150252, 0.172051, 0.215233", \ + "0.125280, 0.128567, 0.130863, 0.136348, 0.150957, 0.172756, 0.215938", \ + "0.127147, 0.130434, 0.132730, 0.138215, 0.152824, 0.174623, 0.217805", \ + "0.129391, 0.132678, 0.134974, 0.140459, 0.155068, 0.176867, 0.220049", \ + "0.137083, 0.140370, 0.142666, 0.148151, 0.162760, 0.184559, 0.227741", \ + "0.139823, 0.143110, 0.145406, 0.150891, 0.165500, 0.187299, 0.230481", \ + "0.145602, 0.148889, 0.151185, 0.156670, 0.171279, 0.193078, 0.236260" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.068766, 0.071871, 0.074305, 0.079773, 0.093933, 0.115690, 0.159399", \ + "0.069473, 0.072578, 0.075012, 0.080480, 0.094640, 0.116397, 0.160106", \ + "0.070713, 0.073818, 0.076252, 0.081720, 0.095880, 0.117637, 0.161346", \ + "0.073478, 0.076583, 0.079017, 0.084485, 0.098645, 0.120402, 0.164111", \ + "0.081080, 0.084185, 0.086619, 0.092087, 0.106247, 0.128004, 0.171713", \ + "0.083937, 0.087042, 0.089476, 0.094944, 0.109104, 0.130861, 0.174570", \ + "0.088661, 0.091766, 0.094200, 0.099668, 0.113828, 0.135585, 0.179294" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323", \ + "0.011259, 0.014448, 0.017094, 0.024163, 0.046282, 0.084629, 0.163323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138677, 0.142008, 0.145156, 0.151822, 0.171113, 0.203445, 0.267995", \ + "0.139461, 0.142792, 0.145940, 0.152606, 0.171897, 0.204229, 0.268779", \ + "0.140785, 0.144116, 0.147264, 0.153930, 0.173221, 0.205553, 0.270103", \ + "0.143620, 0.146951, 0.150099, 0.156765, 0.176056, 0.208388, 0.272938", \ + "0.151915, 0.155246, 0.158394, 0.165060, 0.184351, 0.216683, 0.281233", \ + "0.153478, 0.156809, 0.159957, 0.166623, 0.185914, 0.218246, 0.282796", \ + "0.160645, 0.163976, 0.167124, 0.173790, 0.193081, 0.225413, 0.289963" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.080281, 0.083581, 0.086635, 0.093253, 0.112619, 0.144913, 0.209513", \ + "0.081073, 0.084373, 0.087427, 0.094045, 0.113411, 0.145705, 0.210305", \ + "0.082380, 0.085680, 0.088734, 0.095352, 0.114718, 0.147012, 0.211612", \ + "0.085227, 0.088527, 0.091581, 0.098199, 0.117565, 0.149859, 0.214459", \ + "0.093093, 0.096393, 0.099447, 0.106065, 0.125431, 0.157725, 0.222325", \ + "0.094537, 0.097837, 0.100891, 0.107509, 0.126875, 0.159169, 0.223769", \ + "0.101638, 0.104938, 0.107992, 0.114610, 0.133976, 0.166270, 0.230870" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697", \ + "0.010235, 0.013962, 0.017729, 0.028530, 0.062482, 0.121137, 0.238697" \ + ); + } + } + internal_power() { + related_pin : WENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TWENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005368, 0.005368, 0.005368, 0.005368, 0.005368, 0.005368, 0.005368", \ + "0.005374, 0.005374, 0.005374, 0.005374, 0.005374, 0.005374, 0.005374", \ + "0.005379, 0.005379, 0.005379, 0.005379, 0.005379, 0.005379, 0.005379", \ + "0.005385, 0.005385, 0.005385, 0.005385, 0.005385, 0.005385, 0.005385", \ + "0.005447, 0.005447, 0.005447, 0.005447, 0.005447, 0.005447, 0.005447", \ + "0.005665, 0.005665, 0.005665, 0.005665, 0.005665, 0.005665, 0.005665", \ + "0.006062, 0.006062, 0.006062, 0.006062, 0.006062, 0.006062, 0.006062" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006629, 0.006629, 0.006629, 0.006629, 0.006629, 0.006629, 0.006629", \ + "0.006636, 0.006636, 0.006636, 0.006636, 0.006636, 0.006636, 0.006636", \ + "0.006642, 0.006642, 0.006642, 0.006642, 0.006642, 0.006642, 0.006642", \ + "0.006649, 0.006649, 0.006649, 0.006649, 0.006649, 0.006649, 0.006649", \ + "0.006667, 0.006667, 0.006667, 0.006667, 0.006667, 0.006667, 0.006667", \ + "0.006996, 0.006996, 0.006996, 0.006996, 0.006996, 0.006996, 0.006996", \ + "0.007270, 0.007270, 0.007270, 0.007270, 0.007270, 0.007270, 0.007270" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005936, 0.005942, 0.005948, 0.005954, 0.005960, 0.005966, 0.005972", \ + "0.006463, 0.006469, 0.006476, 0.006482, 0.006488, 0.006495, 0.006501", \ + "0.007354, 0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413", \ + "0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421", \ + "0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421, 0.007428" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006695, 0.006702, 0.006708, 0.006715, 0.006722, 0.006729, 0.006735", \ + "0.006759, 0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800", \ + "0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800, 0.006807", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.007170, 0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213", \ + "0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213, 0.007220", \ + "0.007875, 0.007883, 0.007891, 0.007899, 0.007907, 0.007914, 0.007922" \ + ); + } + } + pin(WENYB[127]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[127]&WENB[127]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[127] == 1'b0 && WENB[127] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[127]&!WENB[127]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[127] == 1'b1 && WENB[127] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[127]&WENB[127]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[127]&!WENB[127]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[126]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[126]&WENB[126]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[126] == 1'b0 && WENB[126] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[126]&!WENB[126]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[126] == 1'b1 && WENB[126] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[126]&WENB[126]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[126]&!WENB[126]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[125]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[125]&WENB[125]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[125] == 1'b0 && WENB[125] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[125]&!WENB[125]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[125] == 1'b1 && WENB[125] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[125]&WENB[125]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[125]&!WENB[125]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[124]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[124]&WENB[124]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[124] == 1'b0 && WENB[124] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[124]&!WENB[124]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[124] == 1'b1 && WENB[124] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[124]&WENB[124]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[124]&!WENB[124]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[123]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[123]&WENB[123]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[123] == 1'b0 && WENB[123] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[123]&!WENB[123]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[123] == 1'b1 && WENB[123] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[123]&WENB[123]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[123]&!WENB[123]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[122]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[122]&WENB[122]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[122] == 1'b0 && WENB[122] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[122]&!WENB[122]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[122] == 1'b1 && WENB[122] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[122]&WENB[122]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[122]&!WENB[122]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[121]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[121]&WENB[121]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[121] == 1'b0 && WENB[121] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[121]&!WENB[121]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[121] == 1'b1 && WENB[121] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[121]&WENB[121]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[121]&!WENB[121]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[120]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[120]&WENB[120]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[120] == 1'b0 && WENB[120] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[120]&!WENB[120]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[120] == 1'b1 && WENB[120] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[120]&WENB[120]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[120]&!WENB[120]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[119]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[119]&WENB[119]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[119] == 1'b0 && WENB[119] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[119]&!WENB[119]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[119] == 1'b1 && WENB[119] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[119]&WENB[119]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[119]&!WENB[119]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[118]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[118]&WENB[118]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[118] == 1'b0 && WENB[118] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[118]&!WENB[118]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[118] == 1'b1 && WENB[118] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[118]&WENB[118]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[118]&!WENB[118]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[117]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[117]&WENB[117]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[117] == 1'b0 && WENB[117] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[117]&!WENB[117]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[117] == 1'b1 && WENB[117] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[117]&WENB[117]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[117]&!WENB[117]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[116]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[116]&WENB[116]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[116] == 1'b0 && WENB[116] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[116]&!WENB[116]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[116] == 1'b1 && WENB[116] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[116]&WENB[116]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[116]&!WENB[116]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[115]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[115]&WENB[115]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[115] == 1'b0 && WENB[115] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[115]&!WENB[115]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[115] == 1'b1 && WENB[115] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[115]&WENB[115]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[115]&!WENB[115]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[114]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[114]&WENB[114]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[114] == 1'b0 && WENB[114] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[114]&!WENB[114]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[114] == 1'b1 && WENB[114] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[114]&WENB[114]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[114]&!WENB[114]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[113]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[113]&WENB[113]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[113] == 1'b0 && WENB[113] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[113]&!WENB[113]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[113] == 1'b1 && WENB[113] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[113]&WENB[113]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[113]&!WENB[113]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[112]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[112]&WENB[112]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[112] == 1'b0 && WENB[112] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[112]&!WENB[112]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[112] == 1'b1 && WENB[112] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[112]&WENB[112]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[112]&!WENB[112]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[111]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[111]&WENB[111]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[111] == 1'b0 && WENB[111] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[111]&!WENB[111]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[111] == 1'b1 && WENB[111] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[111]&WENB[111]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[111]&!WENB[111]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[110]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[110]&WENB[110]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[110] == 1'b0 && WENB[110] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[110]&!WENB[110]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[110] == 1'b1 && WENB[110] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[110]&WENB[110]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[110]&!WENB[110]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[109]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[109]&WENB[109]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[109] == 1'b0 && WENB[109] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[109]&!WENB[109]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[109] == 1'b1 && WENB[109] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[109]&WENB[109]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[109]&!WENB[109]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[108]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[108]&WENB[108]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[108] == 1'b0 && WENB[108] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[108]&!WENB[108]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[108] == 1'b1 && WENB[108] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[108]&WENB[108]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[108]&!WENB[108]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[107]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[107]&WENB[107]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[107] == 1'b0 && WENB[107] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[107]&!WENB[107]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[107] == 1'b1 && WENB[107] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[107]&WENB[107]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[107]&!WENB[107]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[106]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[106]&WENB[106]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[106] == 1'b0 && WENB[106] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[106]&!WENB[106]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[106] == 1'b1 && WENB[106] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[106]&WENB[106]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[106]&!WENB[106]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[105]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[105]&WENB[105]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[105] == 1'b0 && WENB[105] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[105]&!WENB[105]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[105] == 1'b1 && WENB[105] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[105]&WENB[105]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[105]&!WENB[105]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[104]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[104]&WENB[104]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[104] == 1'b0 && WENB[104] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[104]&!WENB[104]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[104] == 1'b1 && WENB[104] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[104]&WENB[104]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[104]&!WENB[104]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[103]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[103]&WENB[103]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[103] == 1'b0 && WENB[103] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[103]&!WENB[103]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[103] == 1'b1 && WENB[103] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[103]&WENB[103]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[103]&!WENB[103]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[102]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[102]&WENB[102]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[102] == 1'b0 && WENB[102] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[102]&!WENB[102]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[102] == 1'b1 && WENB[102] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[102]&WENB[102]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[102]&!WENB[102]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[101]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[101]&WENB[101]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[101] == 1'b0 && WENB[101] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[101]&!WENB[101]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[101] == 1'b1 && WENB[101] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[101]&WENB[101]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[101]&!WENB[101]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[100]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[100]&WENB[100]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[100] == 1'b0 && WENB[100] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[100]&!WENB[100]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[100] == 1'b1 && WENB[100] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[100]&WENB[100]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[100]&!WENB[100]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[99]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[99]&WENB[99]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[99] == 1'b0 && WENB[99] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[99]&!WENB[99]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[99] == 1'b1 && WENB[99] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[99]&WENB[99]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[99]&!WENB[99]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[98]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[98]&WENB[98]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[98] == 1'b0 && WENB[98] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[98]&!WENB[98]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[98] == 1'b1 && WENB[98] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[98]&WENB[98]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[98]&!WENB[98]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[97]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[97]&WENB[97]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[97] == 1'b0 && WENB[97] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[97]&!WENB[97]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[97] == 1'b1 && WENB[97] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[97]&WENB[97]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[97]&!WENB[97]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[96]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[96]&WENB[96]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[96] == 1'b0 && WENB[96] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[96]&!WENB[96]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[96] == 1'b1 && WENB[96] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[96]&WENB[96]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[96]&!WENB[96]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[95]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[95]&WENB[95]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[95] == 1'b0 && WENB[95] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[95]&!WENB[95]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[95] == 1'b1 && WENB[95] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[95]&WENB[95]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[95]&!WENB[95]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[94]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[94]&WENB[94]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[94] == 1'b0 && WENB[94] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[94]&!WENB[94]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[94] == 1'b1 && WENB[94] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[94]&WENB[94]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[94]&!WENB[94]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[93]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[93]&WENB[93]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[93] == 1'b0 && WENB[93] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[93]&!WENB[93]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[93] == 1'b1 && WENB[93] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[93]&WENB[93]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[93]&!WENB[93]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[92]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[92]&WENB[92]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[92] == 1'b0 && WENB[92] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[92]&!WENB[92]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[92] == 1'b1 && WENB[92] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[92]&WENB[92]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[92]&!WENB[92]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[91]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[91]&WENB[91]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[91] == 1'b0 && WENB[91] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[91]&!WENB[91]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[91] == 1'b1 && WENB[91] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[91]&WENB[91]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[91]&!WENB[91]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[90]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[90]&WENB[90]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[90] == 1'b0 && WENB[90] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[90]&!WENB[90]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[90] == 1'b1 && WENB[90] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[90]&WENB[90]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[90]&!WENB[90]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[89]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[89]&WENB[89]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[89] == 1'b0 && WENB[89] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[89]&!WENB[89]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[89] == 1'b1 && WENB[89] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[89]&WENB[89]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[89]&!WENB[89]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[88]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[88]&WENB[88]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[88] == 1'b0 && WENB[88] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[88]&!WENB[88]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[88] == 1'b1 && WENB[88] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[88]&WENB[88]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[88]&!WENB[88]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[87]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[87]&WENB[87]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[87] == 1'b0 && WENB[87] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[87]&!WENB[87]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[87] == 1'b1 && WENB[87] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[87]&WENB[87]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[87]&!WENB[87]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[86]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[86]&WENB[86]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[86] == 1'b0 && WENB[86] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[86]&!WENB[86]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[86] == 1'b1 && WENB[86] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[86]&WENB[86]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[86]&!WENB[86]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[85]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[85]&WENB[85]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[85] == 1'b0 && WENB[85] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[85]&!WENB[85]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[85] == 1'b1 && WENB[85] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[85]&WENB[85]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[85]&!WENB[85]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[84]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[84]&WENB[84]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[84] == 1'b0 && WENB[84] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[84]&!WENB[84]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[84] == 1'b1 && WENB[84] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[84]&WENB[84]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[84]&!WENB[84]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[83]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[83]&WENB[83]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[83] == 1'b0 && WENB[83] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[83]&!WENB[83]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[83] == 1'b1 && WENB[83] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[83]&WENB[83]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[83]&!WENB[83]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[82]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[82]&WENB[82]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[82] == 1'b0 && WENB[82] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[82]&!WENB[82]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[82] == 1'b1 && WENB[82] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[82]&WENB[82]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[82]&!WENB[82]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[81]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[81]&WENB[81]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[81] == 1'b0 && WENB[81] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[81]&!WENB[81]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[81] == 1'b1 && WENB[81] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[81]&WENB[81]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[81]&!WENB[81]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[80]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[80]&WENB[80]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[80] == 1'b0 && WENB[80] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[80]&!WENB[80]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[80] == 1'b1 && WENB[80] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[80]&WENB[80]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[80]&!WENB[80]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[79]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[79]&WENB[79]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[79] == 1'b0 && WENB[79] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[79]&!WENB[79]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[79] == 1'b1 && WENB[79] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[79]&WENB[79]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[79]&!WENB[79]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[78]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[78]&WENB[78]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[78] == 1'b0 && WENB[78] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[78]&!WENB[78]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[78] == 1'b1 && WENB[78] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[78]&WENB[78]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[78]&!WENB[78]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[77]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[77]&WENB[77]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[77] == 1'b0 && WENB[77] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[77]&!WENB[77]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[77] == 1'b1 && WENB[77] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[77]&WENB[77]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[77]&!WENB[77]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[76]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[76]&WENB[76]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[76] == 1'b0 && WENB[76] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[76]&!WENB[76]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[76] == 1'b1 && WENB[76] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[76]&WENB[76]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[76]&!WENB[76]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[75]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[75]&WENB[75]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[75] == 1'b0 && WENB[75] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[75]&!WENB[75]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[75] == 1'b1 && WENB[75] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[75]&WENB[75]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[75]&!WENB[75]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[74]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[74]&WENB[74]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[74] == 1'b0 && WENB[74] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[74]&!WENB[74]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[74] == 1'b1 && WENB[74] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[74]&WENB[74]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[74]&!WENB[74]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[73]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[73]&WENB[73]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[73] == 1'b0 && WENB[73] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[73]&!WENB[73]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[73] == 1'b1 && WENB[73] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[73]&WENB[73]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[73]&!WENB[73]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[72]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[72]&WENB[72]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[72] == 1'b0 && WENB[72] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[72]&!WENB[72]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[72] == 1'b1 && WENB[72] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[72]&WENB[72]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[72]&!WENB[72]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[71]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[71]&WENB[71]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[71] == 1'b0 && WENB[71] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[71]&!WENB[71]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[71] == 1'b1 && WENB[71] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[71]&WENB[71]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[71]&!WENB[71]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[70]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[70]&WENB[70]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[70] == 1'b0 && WENB[70] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[70]&!WENB[70]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[70] == 1'b1 && WENB[70] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[70]&WENB[70]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[70]&!WENB[70]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[69]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[69]&WENB[69]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[69] == 1'b0 && WENB[69] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[69]&!WENB[69]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[69] == 1'b1 && WENB[69] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[69]&WENB[69]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[69]&!WENB[69]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[68]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[68]&WENB[68]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[68] == 1'b0 && WENB[68] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[68]&!WENB[68]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[68] == 1'b1 && WENB[68] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[68]&WENB[68]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[68]&!WENB[68]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[67]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[67]&WENB[67]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[67] == 1'b0 && WENB[67] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[67]&!WENB[67]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[67] == 1'b1 && WENB[67] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[67]&WENB[67]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[67]&!WENB[67]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[66]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[66]&WENB[66]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[66] == 1'b0 && WENB[66] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[66]&!WENB[66]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[66] == 1'b1 && WENB[66] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[66]&WENB[66]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[66]&!WENB[66]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[65]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[65]&WENB[65]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[65] == 1'b0 && WENB[65] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[65]&!WENB[65]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[65] == 1'b1 && WENB[65] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[65]&WENB[65]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[65]&!WENB[65]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[64]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[64]&WENB[64]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[64] == 1'b0 && WENB[64] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[64]&!WENB[64]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[64] == 1'b1 && WENB[64] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[64]&WENB[64]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[64]&!WENB[64]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[63]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[63]&WENB[63]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[63] == 1'b0 && WENB[63] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[63]&!WENB[63]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[63] == 1'b1 && WENB[63] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[63]&WENB[63]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[63]&!WENB[63]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[62]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[62]&WENB[62]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[62] == 1'b0 && WENB[62] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[62]&!WENB[62]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[62] == 1'b1 && WENB[62] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[62]&WENB[62]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[62]&!WENB[62]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[61]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[61]&WENB[61]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[61] == 1'b0 && WENB[61] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[61]&!WENB[61]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[61] == 1'b1 && WENB[61] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[61]&WENB[61]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[61]&!WENB[61]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[60]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[60]&WENB[60]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[60] == 1'b0 && WENB[60] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[60]&!WENB[60]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[60] == 1'b1 && WENB[60] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[60]&WENB[60]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[60]&!WENB[60]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[59]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[59]&WENB[59]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[59] == 1'b0 && WENB[59] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[59]&!WENB[59]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[59] == 1'b1 && WENB[59] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[59]&WENB[59]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[59]&!WENB[59]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[58]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[58]&WENB[58]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[58] == 1'b0 && WENB[58] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[58]&!WENB[58]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[58] == 1'b1 && WENB[58] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[58]&WENB[58]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[58]&!WENB[58]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[57]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[57]&WENB[57]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[57] == 1'b0 && WENB[57] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[57]&!WENB[57]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[57] == 1'b1 && WENB[57] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[57]&WENB[57]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[57]&!WENB[57]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[56]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[56]&WENB[56]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[56] == 1'b0 && WENB[56] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[56]&!WENB[56]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[56] == 1'b1 && WENB[56] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[56]&WENB[56]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[56]&!WENB[56]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[55]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[55]&WENB[55]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[55] == 1'b0 && WENB[55] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[55]&!WENB[55]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[55] == 1'b1 && WENB[55] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[55]&WENB[55]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[55]&!WENB[55]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[54]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[54]&WENB[54]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[54] == 1'b0 && WENB[54] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[54]&!WENB[54]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[54] == 1'b1 && WENB[54] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[54]&WENB[54]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[54]&!WENB[54]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[53]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[53]&WENB[53]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[53] == 1'b0 && WENB[53] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[53]&!WENB[53]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[53] == 1'b1 && WENB[53] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[53]&WENB[53]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[53]&!WENB[53]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[52]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[52]&WENB[52]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[52] == 1'b0 && WENB[52] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[52]&!WENB[52]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[52] == 1'b1 && WENB[52] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[52]&WENB[52]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[52]&!WENB[52]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[51]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[51]&WENB[51]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[51] == 1'b0 && WENB[51] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[51]&!WENB[51]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[51] == 1'b1 && WENB[51] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[51]&WENB[51]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[51]&!WENB[51]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[50]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[50]&WENB[50]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[50] == 1'b0 && WENB[50] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[50]&!WENB[50]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[50] == 1'b1 && WENB[50] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[50]&WENB[50]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[50]&!WENB[50]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[49]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[49]&WENB[49]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[49] == 1'b0 && WENB[49] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[49]&!WENB[49]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[49] == 1'b1 && WENB[49] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[49]&WENB[49]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[49]&!WENB[49]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[48]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[48]&WENB[48]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[48] == 1'b0 && WENB[48] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[48]&!WENB[48]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[48] == 1'b1 && WENB[48] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[48]&WENB[48]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[48]&!WENB[48]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[47]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[47]&WENB[47]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[47] == 1'b0 && WENB[47] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[47]&!WENB[47]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[47] == 1'b1 && WENB[47] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[47]&WENB[47]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[47]&!WENB[47]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[46]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[46]&WENB[46]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[46] == 1'b0 && WENB[46] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[46]&!WENB[46]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[46] == 1'b1 && WENB[46] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[46]&WENB[46]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[46]&!WENB[46]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[45]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[45]&WENB[45]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[45] == 1'b0 && WENB[45] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[45]&!WENB[45]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[45] == 1'b1 && WENB[45] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[45]&WENB[45]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[45]&!WENB[45]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[44]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[44]&WENB[44]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[44] == 1'b0 && WENB[44] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[44]&!WENB[44]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[44] == 1'b1 && WENB[44] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[44]&WENB[44]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[44]&!WENB[44]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[43]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[43]&WENB[43]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[43] == 1'b0 && WENB[43] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[43]&!WENB[43]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[43] == 1'b1 && WENB[43] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[43]&WENB[43]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[43]&!WENB[43]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[42]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[42]&WENB[42]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[42] == 1'b0 && WENB[42] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[42]&!WENB[42]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[42] == 1'b1 && WENB[42] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[42]&WENB[42]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[42]&!WENB[42]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[41]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[41]&WENB[41]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[41] == 1'b0 && WENB[41] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[41]&!WENB[41]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[41] == 1'b1 && WENB[41] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[41]&WENB[41]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[41]&!WENB[41]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[40]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[40]&WENB[40]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[40] == 1'b0 && WENB[40] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[40]&!WENB[40]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[40] == 1'b1 && WENB[40] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[40]&WENB[40]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[40]&!WENB[40]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[39]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[39]&WENB[39]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[39] == 1'b0 && WENB[39] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[39]&!WENB[39]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[39] == 1'b1 && WENB[39] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[39]&WENB[39]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[39]&!WENB[39]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[38]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[38]&WENB[38]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[38] == 1'b0 && WENB[38] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[38]&!WENB[38]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[38] == 1'b1 && WENB[38] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[38]&WENB[38]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[38]&!WENB[38]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[37]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[37]&WENB[37]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[37] == 1'b0 && WENB[37] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[37]&!WENB[37]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[37] == 1'b1 && WENB[37] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[37]&WENB[37]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[37]&!WENB[37]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[36]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[36]&WENB[36]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[36] == 1'b0 && WENB[36] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[36]&!WENB[36]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[36] == 1'b1 && WENB[36] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[36]&WENB[36]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[36]&!WENB[36]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[35]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[35]&WENB[35]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[35] == 1'b0 && WENB[35] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[35]&!WENB[35]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[35] == 1'b1 && WENB[35] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[35]&WENB[35]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[35]&!WENB[35]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[34]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[34]&WENB[34]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[34] == 1'b0 && WENB[34] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[34]&!WENB[34]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[34] == 1'b1 && WENB[34] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[34]&WENB[34]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[34]&!WENB[34]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[33]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[33]&WENB[33]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[33] == 1'b0 && WENB[33] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[33]&!WENB[33]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[33] == 1'b1 && WENB[33] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[33]&WENB[33]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[33]&!WENB[33]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[32]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[32]&WENB[32]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[32] == 1'b0 && WENB[32] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[32]&!WENB[32]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[32] == 1'b1 && WENB[32] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[32]&WENB[32]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[32]&!WENB[32]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[31]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[31]&WENB[31]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[31] == 1'b0 && WENB[31] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[31]&!WENB[31]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[31] == 1'b1 && WENB[31] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[31]&WENB[31]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[31]&!WENB[31]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[30]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[30]&WENB[30]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[30] == 1'b0 && WENB[30] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[30]&!WENB[30]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[30] == 1'b1 && WENB[30] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[30]&WENB[30]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[30]&!WENB[30]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[29]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[29]&WENB[29]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[29] == 1'b0 && WENB[29] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[29]&!WENB[29]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[29] == 1'b1 && WENB[29] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[29]&WENB[29]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[29]&!WENB[29]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[28]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[28]&WENB[28]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[28] == 1'b0 && WENB[28] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[28]&!WENB[28]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[28] == 1'b1 && WENB[28] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[28]&WENB[28]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[28]&!WENB[28]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[27]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[27]&WENB[27]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[27] == 1'b0 && WENB[27] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[27]&!WENB[27]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[27] == 1'b1 && WENB[27] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[27]&WENB[27]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[27]&!WENB[27]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[26]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[26]&WENB[26]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[26] == 1'b0 && WENB[26] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[26]&!WENB[26]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[26] == 1'b1 && WENB[26] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[26]&WENB[26]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[26]&!WENB[26]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[25]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[25]&WENB[25]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[25] == 1'b0 && WENB[25] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[25]&!WENB[25]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[25] == 1'b1 && WENB[25] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[25]&WENB[25]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[25]&!WENB[25]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[24]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[24]&WENB[24]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[24] == 1'b0 && WENB[24] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[24]&!WENB[24]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[24] == 1'b1 && WENB[24] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[24]&WENB[24]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[24]&!WENB[24]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[23]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[23]&WENB[23]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[23] == 1'b0 && WENB[23] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[23]&!WENB[23]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[23] == 1'b1 && WENB[23] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[23]&WENB[23]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[23]&!WENB[23]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[22]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[22]&WENB[22]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[22] == 1'b0 && WENB[22] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[22]&!WENB[22]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[22] == 1'b1 && WENB[22] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[22]&WENB[22]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[22]&!WENB[22]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[21]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[21]&WENB[21]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[21] == 1'b0 && WENB[21] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[21]&!WENB[21]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[21] == 1'b1 && WENB[21] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[21]&WENB[21]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[21]&!WENB[21]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[20]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[20]&WENB[20]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[20] == 1'b0 && WENB[20] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[20]&!WENB[20]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[20] == 1'b1 && WENB[20] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[20]&WENB[20]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[20]&!WENB[20]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[19]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[19]&WENB[19]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[19] == 1'b0 && WENB[19] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[19]&!WENB[19]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[19] == 1'b1 && WENB[19] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[19]&WENB[19]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[19]&!WENB[19]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[18]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[18]&WENB[18]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[18] == 1'b0 && WENB[18] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[18]&!WENB[18]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[18] == 1'b1 && WENB[18] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[18]&WENB[18]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[18]&!WENB[18]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[17]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[17]&WENB[17]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[17] == 1'b0 && WENB[17] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[17]&!WENB[17]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[17] == 1'b1 && WENB[17] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[17]&WENB[17]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[17]&!WENB[17]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[16]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[16]&WENB[16]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[16] == 1'b0 && WENB[16] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[16]&!WENB[16]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[16] == 1'b1 && WENB[16] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[16]&WENB[16]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[16]&!WENB[16]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[15]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[15]&WENB[15]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[15] == 1'b0 && WENB[15] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[15]&!WENB[15]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[15] == 1'b1 && WENB[15] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[15]&WENB[15]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[15]&!WENB[15]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[14]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[14]&WENB[14]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[14] == 1'b0 && WENB[14] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[14]&!WENB[14]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[14] == 1'b1 && WENB[14] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[14]&WENB[14]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[14]&!WENB[14]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[13]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[13]&WENB[13]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[13] == 1'b0 && WENB[13] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[13]&!WENB[13]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[13] == 1'b1 && WENB[13] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[13]&WENB[13]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[13]&!WENB[13]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[12]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[12]&WENB[12]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[12] == 1'b0 && WENB[12] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[12]&!WENB[12]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[12] == 1'b1 && WENB[12] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[12]&WENB[12]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[12]&!WENB[12]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[11]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[11]&WENB[11]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[11] == 1'b0 && WENB[11] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[11]&!WENB[11]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[11] == 1'b1 && WENB[11] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[11]&WENB[11]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[11]&!WENB[11]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[10]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[10]&WENB[10]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[10] == 1'b0 && WENB[10] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[10]&!WENB[10]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[10] == 1'b1 && WENB[10] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[10]&WENB[10]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[10]&!WENB[10]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[9]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[9]&WENB[9]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[9] == 1'b0 && WENB[9] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[9]&!WENB[9]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[9] == 1'b1 && WENB[9] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[9]&WENB[9]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[9]&!WENB[9]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[8]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[8]&WENB[8]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[8] == 1'b0 && WENB[8] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[8]&!WENB[8]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[8] == 1'b1 && WENB[8] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[8]&WENB[8]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[8]&!WENB[8]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[7]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[7]&WENB[7]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[7] == 1'b0 && WENB[7] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[7]&!WENB[7]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[7] == 1'b1 && WENB[7] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[7]&WENB[7]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[7]&!WENB[7]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[6]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[6]&WENB[6]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[6] == 1'b0 && WENB[6] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[6]&!WENB[6]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[6] == 1'b1 && WENB[6] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[6]&WENB[6]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[6]&!WENB[6]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[5]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[5]&WENB[5]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[5] == 1'b0 && WENB[5] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[5]&!WENB[5]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[5] == 1'b1 && WENB[5] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[5]&WENB[5]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[5]&!WENB[5]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[4]&WENB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[4] == 1'b0 && WENB[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[4]&!WENB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[4] == 1'b1 && WENB[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[4]&WENB[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[4]&!WENB[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[3]&WENB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[3] == 1'b0 && WENB[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[3]&!WENB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[3] == 1'b1 && WENB[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[3]&WENB[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[3]&!WENB[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[2]&WENB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[2] == 1'b0 && WENB[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[2]&!WENB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[2] == 1'b1 && WENB[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[2]&WENB[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[2]&!WENB[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[1]&WENB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[1] == 1'b0 && WENB[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[1]&!WENB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[1] == 1'b1 && WENB[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[1]&WENB[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[1]&!WENB[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + pin(WENYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[0]&WENB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[0] == 1'b0 && WENB[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231213, 0.234263, 0.236743, 0.242293, 0.256553, 0.278683, 0.322393", \ + "0.231943, 0.234993, 0.237473, 0.243023, 0.257283, 0.279413, 0.323123", \ + "0.233733, 0.236783, 0.239263, 0.244813, 0.259073, 0.281203, 0.324913", \ + "0.235983, 0.239033, 0.241513, 0.247063, 0.261323, 0.283453, 0.327163", \ + "0.242813, 0.245863, 0.248343, 0.253893, 0.268153, 0.290283, 0.333993", \ + "0.246213, 0.249263, 0.251743, 0.257293, 0.271553, 0.293683, 0.337393", \ + "0.255733, 0.258783, 0.261263, 0.266813, 0.281073, 0.303203, 0.346913" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151622, 0.154712, 0.157192, 0.162722, 0.176972, 0.199032, 0.242672", \ + "0.152222, 0.155312, 0.157792, 0.163322, 0.177572, 0.199632, 0.243272", \ + "0.154052, 0.157142, 0.159622, 0.165152, 0.179402, 0.201462, 0.245102", \ + "0.156252, 0.159342, 0.161822, 0.167352, 0.181602, 0.203662, 0.247302", \ + "0.162912, 0.166002, 0.168482, 0.174012, 0.188262, 0.210322, 0.253962", \ + "0.166402, 0.169492, 0.171972, 0.177502, 0.191752, 0.213812, 0.257452", \ + "0.175942, 0.179032, 0.181512, 0.187042, 0.201292, 0.223352, 0.266992" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459", \ + "0.011940, 0.014382, 0.017412, 0.024331, 0.046071, 0.083812, 0.163459" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216925, 0.220325, 0.223265, 0.230135, 0.249695, 0.282035, 0.346975", \ + "0.217395, 0.220795, 0.223735, 0.230605, 0.250165, 0.282505, 0.347445", \ + "0.218785, 0.222185, 0.225125, 0.231995, 0.251555, 0.283895, 0.348835", \ + "0.221525, 0.224925, 0.227865, 0.234735, 0.254295, 0.286635, 0.351575", \ + "0.227745, 0.231145, 0.234085, 0.240955, 0.260515, 0.292855, 0.357795", \ + "0.230345, 0.233745, 0.236685, 0.243555, 0.263115, 0.295455, 0.360395", \ + "0.232865, 0.236265, 0.239205, 0.246075, 0.265635, 0.297975, 0.362915" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141520, 0.144790, 0.147770, 0.154620, 0.174140, 0.206510, 0.271420", \ + "0.142000, 0.145270, 0.148250, 0.155100, 0.174620, 0.206990, 0.271900", \ + "0.143330, 0.146600, 0.149580, 0.156430, 0.175950, 0.208320, 0.273230", \ + "0.146110, 0.149380, 0.152360, 0.159210, 0.178730, 0.211100, 0.276010", \ + "0.152020, 0.155290, 0.158270, 0.165120, 0.184640, 0.217010, 0.281920", \ + "0.154900, 0.158170, 0.161150, 0.168000, 0.187520, 0.219890, 0.284800", \ + "0.157350, 0.160620, 0.163600, 0.170450, 0.189970, 0.222340, 0.287250" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945", \ + "0.010402, 0.014467, 0.018102, 0.029215, 0.062378, 0.121109, 0.240945" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[0]&!WENB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[0] == 1'b1 && WENB[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.242012, 0.245422, 0.248392, 0.255232, 0.274692, 0.307092, 0.372012", \ + "0.242712, 0.246122, 0.249092, 0.255932, 0.275392, 0.307792, 0.372712", \ + "0.244062, 0.247472, 0.250442, 0.257282, 0.276742, 0.309142, 0.374062", \ + "0.246872, 0.250282, 0.253252, 0.260092, 0.279552, 0.311952, 0.376872", \ + "0.253512, 0.256922, 0.259892, 0.266732, 0.286192, 0.318592, 0.383512", \ + "0.256722, 0.260132, 0.263102, 0.269942, 0.289402, 0.321802, 0.386722", \ + "0.264512, 0.267922, 0.270892, 0.277732, 0.297192, 0.329592, 0.394512" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151705, 0.155095, 0.158045, 0.164885, 0.184325, 0.216625, 0.281565", \ + "0.152435, 0.155825, 0.158775, 0.165615, 0.185055, 0.217355, 0.282295", \ + "0.153695, 0.157085, 0.160035, 0.166875, 0.186315, 0.218615, 0.283555", \ + "0.156615, 0.160005, 0.162955, 0.169795, 0.189235, 0.221535, 0.286475", \ + "0.163185, 0.166575, 0.169525, 0.176365, 0.195805, 0.228105, 0.293045", \ + "0.166505, 0.169895, 0.172845, 0.179685, 0.199125, 0.231425, 0.296365", \ + "0.174325, 0.177715, 0.180665, 0.187505, 0.206945, 0.239245, 0.304185" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713", \ + "0.010056, 0.013991, 0.018107, 0.028900, 0.063380, 0.121302, 0.240713" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.227353, 0.230353, 0.232883, 0.238433, 0.252663, 0.274853, 0.318193", \ + "0.228053, 0.231053, 0.233583, 0.239133, 0.253363, 0.275553, 0.318893", \ + "0.228943, 0.231943, 0.234473, 0.240023, 0.254253, 0.276443, 0.319783", \ + "0.231373, 0.234373, 0.236903, 0.242453, 0.256683, 0.278873, 0.322213", \ + "0.237853, 0.240853, 0.243383, 0.248933, 0.263163, 0.285353, 0.328693", \ + "0.240363, 0.243363, 0.245893, 0.251443, 0.265673, 0.287863, 0.331203", \ + "0.247623, 0.250623, 0.253153, 0.258703, 0.272933, 0.295123, 0.338463" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142882, 0.145822, 0.148332, 0.153882, 0.168142, 0.190332, 0.233692", \ + "0.143612, 0.146552, 0.149062, 0.154612, 0.168872, 0.191062, 0.234422", \ + "0.144452, 0.147392, 0.149902, 0.155452, 0.169712, 0.191902, 0.235262", \ + "0.147132, 0.150072, 0.152582, 0.158132, 0.172392, 0.194582, 0.237942", \ + "0.153422, 0.156362, 0.158872, 0.164422, 0.178682, 0.200872, 0.244232", \ + "0.156142, 0.159082, 0.161592, 0.167142, 0.181402, 0.203592, 0.246952", \ + "0.163322, 0.166262, 0.168772, 0.174322, 0.188582, 0.210772, 0.254132" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432", \ + "0.011387, 0.014389, 0.017262, 0.024156, 0.045861, 0.084138, 0.163432" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[0]&WENB[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[0]&!WENB[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637, 0.006637", \ + "0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644, 0.006644", \ + "0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651, 0.006651", \ + "0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657, 0.006657", \ + "0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672, 0.006672", \ + "0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771, 0.006771", \ + "0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493, 0.007493" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388, 0.005388", \ + "0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393, 0.005393", \ + "0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399, 0.005399", \ + "0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404, 0.005404", \ + "0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553, 0.005553", \ + "0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629, 0.005629", \ + "0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059, 0.006059" \ + ); + } + } + } + } + bus(AYB) { + bus_type : rf2_32x128_wm1_AYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : AB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047737, 0.050612, 0.052938, 0.057990, 0.071468, 0.092902, 0.136459", \ + "0.048667, 0.051597, 0.054022, 0.058980, 0.072575, 0.093868, 0.137216", \ + "0.051023, 0.053663, 0.055995, 0.061197, 0.074726, 0.095832, 0.139691", \ + "0.053676, 0.056414, 0.058926, 0.064018, 0.077654, 0.098911, 0.143872", \ + "0.064233, 0.066867, 0.068974, 0.074227, 0.087852, 0.108960, 0.151928", \ + "0.069923, 0.072705, 0.075043, 0.080442, 0.093809, 0.115192, 0.158369", \ + "0.082109, 0.084816, 0.087508, 0.092425, 0.106001, 0.125826, 0.168212" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.041442, 0.044215, 0.046460, 0.051333, 0.064333, 0.085009, 0.127024", \ + "0.042339, 0.045166, 0.047505, 0.052288, 0.065402, 0.085941, 0.127754", \ + "0.044612, 0.047158, 0.049408, 0.054426, 0.067476, 0.087835, 0.130141", \ + "0.047171, 0.049812, 0.052236, 0.057147, 0.070300, 0.090805, 0.134174", \ + "0.057354, 0.059895, 0.061928, 0.066995, 0.080137, 0.100499, 0.141946", \ + "0.062843, 0.065527, 0.067782, 0.072990, 0.085884, 0.106510, 0.148159", \ + "0.074598, 0.077209, 0.079806, 0.084549, 0.097644, 0.116767, 0.157653" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.043085, 0.046663, 0.049670, 0.056767, 0.076631, 0.110767, 0.180540", \ + "0.043545, 0.047144, 0.049992, 0.057149, 0.076825, 0.110367, 0.181670", \ + "0.045521, 0.049100, 0.052056, 0.059139, 0.079011, 0.113102, 0.180506", \ + "0.048761, 0.052368, 0.055382, 0.062473, 0.082350, 0.117882, 0.187230", \ + "0.061786, 0.065234, 0.068341, 0.075287, 0.095338, 0.128357, 0.197162", \ + "0.066946, 0.070442, 0.073456, 0.080390, 0.100691, 0.134289, 0.204247", \ + "0.083036, 0.086471, 0.089558, 0.096479, 0.116209, 0.149329, 0.216305" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.037404, 0.040856, 0.043756, 0.050601, 0.069762, 0.102690, 0.169993", \ + "0.037847, 0.041319, 0.044067, 0.050970, 0.069950, 0.102304, 0.171083", \ + "0.039754, 0.043206, 0.046057, 0.052889, 0.072058, 0.104942, 0.169961", \ + "0.042879, 0.046358, 0.049266, 0.056106, 0.075279, 0.109553, 0.176446", \ + "0.055443, 0.058769, 0.061766, 0.068466, 0.087807, 0.119657, 0.186027", \ + "0.060420, 0.063792, 0.066699, 0.073389, 0.092971, 0.125380, 0.192862", \ + "0.075941, 0.079254, 0.082232, 0.088908, 0.107940, 0.139888, 0.204492" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + } + timing() { + related_pin : TAB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.052078, 0.054730, 0.057064, 0.062268, 0.075729, 0.096917, 0.141431", \ + "0.053035, 0.055532, 0.057879, 0.063245, 0.077023, 0.098224, 0.143600", \ + "0.054158, 0.056909, 0.059479, 0.064586, 0.078136, 0.099376, 0.144877", \ + "0.057567, 0.060255, 0.062548, 0.067718, 0.081125, 0.102362, 0.145985", \ + "0.067325, 0.070321, 0.072520, 0.077877, 0.091087, 0.112546, 0.155703", \ + "0.073278, 0.076031, 0.078405, 0.083423, 0.097022, 0.118661, 0.161680", \ + "0.086921, 0.089580, 0.092019, 0.094975, 0.108464, 0.129735, 0.172381" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045211, 0.047770, 0.050020, 0.055040, 0.068025, 0.088463, 0.131401", \ + "0.046135, 0.048542, 0.050806, 0.055983, 0.069273, 0.089724, 0.133494", \ + "0.047217, 0.049871, 0.052350, 0.057277, 0.070347, 0.090834, 0.134725", \ + "0.050505, 0.053099, 0.055310, 0.060297, 0.073230, 0.093715, 0.135794", \ + "0.059919, 0.062808, 0.064929, 0.070097, 0.082839, 0.103538, 0.145168", \ + "0.065661, 0.068316, 0.070606, 0.075447, 0.088564, 0.109437, 0.150934", \ + "0.078820, 0.081385, 0.083738, 0.086590, 0.099601, 0.120119, 0.161256" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045303, 0.048989, 0.052036, 0.058971, 0.078877, 0.114266, 0.182755", \ + "0.046339, 0.049934, 0.052861, 0.060037, 0.079815, 0.115011, 0.186032", \ + "0.048031, 0.051742, 0.054613, 0.061732, 0.081568, 0.115802, 0.185320", \ + "0.051944, 0.055301, 0.058454, 0.065183, 0.085335, 0.119181, 0.184642", \ + "0.063134, 0.066751, 0.069803, 0.076806, 0.096806, 0.130843, 0.201592", \ + "0.067214, 0.070779, 0.073719, 0.080713, 0.101089, 0.134165, 0.200790", \ + "0.085461, 0.089038, 0.092020, 0.099177, 0.119034, 0.151962, 0.218700" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.039329, 0.042885, 0.045825, 0.052514, 0.071715, 0.105851, 0.171916", \ + "0.040329, 0.043796, 0.046620, 0.053542, 0.072620, 0.106570, 0.175077", \ + "0.041961, 0.045540, 0.048310, 0.055177, 0.074311, 0.107333, 0.174390", \ + "0.045735, 0.048974, 0.052015, 0.058506, 0.077945, 0.110592, 0.173736", \ + "0.056529, 0.060019, 0.062963, 0.069717, 0.089009, 0.121841, 0.190086", \ + "0.060464, 0.063903, 0.066740, 0.073486, 0.093140, 0.125046, 0.189312", \ + "0.078066, 0.081517, 0.084393, 0.091296, 0.110451, 0.142213, 0.206589" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.070964, 0.074044, 0.075933, 0.080825, 0.094390, 0.115032, 0.156043", \ + "0.071620, 0.074700, 0.076589, 0.081481, 0.095046, 0.115688, 0.156699", \ + "0.073493, 0.076573, 0.078462, 0.083354, 0.096919, 0.117561, 0.158572", \ + "0.075637, 0.078717, 0.080606, 0.085498, 0.099063, 0.119705, 0.160716", \ + "0.082960, 0.086040, 0.087929, 0.092821, 0.106386, 0.127028, 0.168039", \ + "0.085813, 0.088893, 0.090782, 0.095674, 0.109239, 0.129881, 0.170892", \ + "0.089720, 0.092800, 0.094689, 0.099581, 0.113146, 0.133788, 0.174799" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.057259, 0.060328, 0.062104, 0.066777, 0.079611, 0.098966, 0.137345", \ + "0.057934, 0.061003, 0.062779, 0.067452, 0.080286, 0.099641, 0.138020", \ + "0.059829, 0.062898, 0.064674, 0.069347, 0.082181, 0.101536, 0.139915", \ + "0.061952, 0.065021, 0.066797, 0.071470, 0.084304, 0.103659, 0.142038", \ + "0.069304, 0.072373, 0.074149, 0.078822, 0.091656, 0.111011, 0.149390", \ + "0.072134, 0.075203, 0.076979, 0.081652, 0.094486, 0.113841, 0.152220", \ + "0.076056, 0.079125, 0.080901, 0.085574, 0.098408, 0.117763, 0.156142" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093984, 0.097252, 0.100180, 0.106556, 0.125167, 0.156285, 0.218545", \ + "0.094771, 0.098039, 0.100967, 0.107343, 0.125954, 0.157072, 0.219332", \ + "0.096077, 0.099345, 0.102273, 0.108649, 0.127260, 0.158378, 0.220638", \ + "0.098944, 0.102212, 0.105140, 0.111516, 0.130127, 0.161245, 0.223505", \ + "0.106859, 0.110127, 0.113055, 0.119431, 0.138042, 0.169160, 0.231420", \ + "0.108192, 0.111460, 0.114388, 0.120764, 0.139375, 0.170493, 0.232753", \ + "0.115594, 0.118862, 0.121790, 0.128166, 0.146777, 0.177895, 0.240155" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.074490, 0.077686, 0.080511, 0.086724, 0.104941, 0.135497, 0.196687", \ + "0.075325, 0.078521, 0.081346, 0.087559, 0.105776, 0.136332, 0.197522", \ + "0.076585, 0.079781, 0.082606, 0.088819, 0.107036, 0.137592, 0.198782", \ + "0.079363, 0.082559, 0.085384, 0.091597, 0.109814, 0.140370, 0.201560", \ + "0.087388, 0.090584, 0.093409, 0.099622, 0.117839, 0.148395, 0.209585", \ + "0.088654, 0.091850, 0.094675, 0.100888, 0.119105, 0.149661, 0.210851", \ + "0.095948, 0.099144, 0.101969, 0.108182, 0.126399, 0.156955, 0.218145" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + } + internal_power() { + related_pin : AB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TAB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005936, 0.005942, 0.005948, 0.005954, 0.005960, 0.005966, 0.005972", \ + "0.006463, 0.006469, 0.006476, 0.006482, 0.006488, 0.006495, 0.006501", \ + "0.007354, 0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413", \ + "0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421", \ + "0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421, 0.007428" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006695, 0.006702, 0.006708, 0.006715, 0.006722, 0.006729, 0.006735", \ + "0.006759, 0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800", \ + "0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800, 0.006807", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.007170, 0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213", \ + "0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213, 0.007220", \ + "0.007875, 0.007883, 0.007891, 0.007899, 0.007907, 0.007914, 0.007922" \ + ); + } + } + pin(AYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.171435, 0.173985, 0.176245, 0.181305, 0.194515, 0.215435, 0.257035", \ + "0.171895, 0.174445, 0.176705, 0.181765, 0.194975, 0.215895, 0.257495", \ + "0.173715, 0.176265, 0.178525, 0.183585, 0.196795, 0.217715, 0.259315", \ + "0.176105, 0.178655, 0.180915, 0.185975, 0.199185, 0.220105, 0.261705", \ + "0.182985, 0.185535, 0.187795, 0.192855, 0.206065, 0.226985, 0.268585", \ + "0.186165, 0.188715, 0.190975, 0.196035, 0.209245, 0.230165, 0.271765", \ + "0.195645, 0.198195, 0.200455, 0.205515, 0.218725, 0.239645, 0.281245" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146462, 0.148972, 0.151102, 0.155802, 0.168152, 0.187672, 0.226642", \ + "0.147042, 0.149552, 0.151682, 0.156382, 0.168732, 0.188252, 0.227222", \ + "0.148762, 0.151272, 0.153402, 0.158102, 0.170452, 0.189972, 0.228942", \ + "0.151152, 0.153662, 0.155792, 0.160492, 0.172842, 0.192362, 0.231332", \ + "0.158142, 0.160652, 0.162782, 0.167482, 0.179832, 0.199352, 0.238322", \ + "0.161352, 0.163862, 0.165992, 0.170692, 0.183042, 0.202562, 0.241532", \ + "0.170792, 0.173302, 0.175432, 0.180132, 0.192482, 0.212002, 0.250972" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153055, 0.156261, 0.159121, 0.165731, 0.184551, 0.215721, 0.278101", \ + "0.153359, 0.156565, 0.159425, 0.166035, 0.184855, 0.216025, 0.278405", \ + "0.155041, 0.158247, 0.161107, 0.167717, 0.186537, 0.217707, 0.280087", \ + "0.157931, 0.161137, 0.163997, 0.170607, 0.189427, 0.220597, 0.282977", \ + "0.164151, 0.167357, 0.170217, 0.176827, 0.195647, 0.226817, 0.289197", \ + "0.166501, 0.169707, 0.172567, 0.179177, 0.197997, 0.229167, 0.291547", \ + "0.168901, 0.172107, 0.174967, 0.181577, 0.200397, 0.231567, 0.293947" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.129717, 0.132828, 0.135576, 0.141936, 0.160326, 0.190946, 0.252296", \ + "0.129908, 0.133019, 0.135767, 0.142127, 0.160517, 0.191137, 0.252487", \ + "0.131716, 0.134827, 0.137575, 0.143935, 0.162325, 0.192945, 0.254295", \ + "0.134426, 0.137537, 0.140285, 0.146645, 0.165035, 0.195655, 0.257005", \ + "0.140826, 0.143937, 0.146685, 0.153045, 0.171435, 0.202055, 0.263405", \ + "0.143196, 0.146307, 0.149055, 0.155415, 0.173805, 0.204425, 0.265775", \ + "0.145496, 0.148607, 0.151355, 0.157715, 0.176105, 0.206725, 0.268075" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.172844, 0.176024, 0.178877, 0.185467, 0.204247, 0.235367, 0.297717", \ + "0.173435, 0.176615, 0.179468, 0.186058, 0.204838, 0.235958, 0.298308", \ + "0.174845, 0.178025, 0.180878, 0.187468, 0.206248, 0.237368, 0.299718", \ + "0.177567, 0.180747, 0.183600, 0.190190, 0.208970, 0.240090, 0.302440", \ + "0.184297, 0.187477, 0.190330, 0.196920, 0.215700, 0.246820, 0.309170", \ + "0.187587, 0.190767, 0.193620, 0.200210, 0.218990, 0.250110, 0.312460", \ + "0.195257, 0.198437, 0.201290, 0.207880, 0.226660, 0.257780, 0.320130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.145621, 0.148685, 0.151433, 0.157765, 0.176125, 0.206735, 0.268015", \ + "0.146279, 0.149343, 0.152091, 0.158423, 0.176783, 0.207393, 0.268673", \ + "0.147550, 0.150614, 0.153362, 0.159694, 0.178054, 0.208664, 0.269944", \ + "0.150403, 0.153467, 0.156215, 0.162547, 0.180907, 0.211517, 0.272797", \ + "0.157095, 0.160159, 0.162907, 0.169239, 0.187599, 0.218209, 0.279489", \ + "0.160225, 0.163289, 0.166037, 0.172369, 0.190729, 0.221339, 0.282619", \ + "0.168095, 0.171159, 0.173907, 0.180239, 0.198599, 0.229209, 0.290489" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.162245, 0.164855, 0.167145, 0.172245, 0.185455, 0.206345, 0.247695", \ + "0.163045, 0.165655, 0.167945, 0.173045, 0.186255, 0.207145, 0.248495", \ + "0.163975, 0.166585, 0.168875, 0.173975, 0.187185, 0.208075, 0.249425", \ + "0.166325, 0.168935, 0.171225, 0.176325, 0.189535, 0.210425, 0.251775", \ + "0.173125, 0.175735, 0.178025, 0.183125, 0.196335, 0.217225, 0.258575", \ + "0.175425, 0.178035, 0.180325, 0.185425, 0.198635, 0.219525, 0.260875", \ + "0.182815, 0.185425, 0.187715, 0.192815, 0.206025, 0.226915, 0.268265" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138322, 0.140741, 0.142875, 0.147625, 0.159995, 0.179495, 0.218275", \ + "0.139021, 0.141440, 0.143574, 0.148324, 0.160694, 0.180194, 0.218974", \ + "0.139962, 0.142381, 0.144515, 0.149265, 0.161635, 0.181135, 0.219915", \ + "0.142305, 0.144724, 0.146858, 0.151608, 0.163978, 0.183478, 0.222258", \ + "0.148975, 0.151394, 0.153528, 0.158278, 0.170648, 0.190148, 0.228928", \ + "0.151445, 0.153864, 0.155998, 0.160748, 0.173118, 0.192618, 0.231398", \ + "0.158745, 0.161164, 0.163298, 0.168048, 0.180418, 0.199918, 0.238698" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + pin(AYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.171435, 0.173985, 0.176245, 0.181305, 0.194515, 0.215435, 0.257035", \ + "0.171895, 0.174445, 0.176705, 0.181765, 0.194975, 0.215895, 0.257495", \ + "0.173715, 0.176265, 0.178525, 0.183585, 0.196795, 0.217715, 0.259315", \ + "0.176105, 0.178655, 0.180915, 0.185975, 0.199185, 0.220105, 0.261705", \ + "0.182985, 0.185535, 0.187795, 0.192855, 0.206065, 0.226985, 0.268585", \ + "0.186165, 0.188715, 0.190975, 0.196035, 0.209245, 0.230165, 0.271765", \ + "0.195645, 0.198195, 0.200455, 0.205515, 0.218725, 0.239645, 0.281245" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146462, 0.148972, 0.151102, 0.155802, 0.168152, 0.187672, 0.226642", \ + "0.147042, 0.149552, 0.151682, 0.156382, 0.168732, 0.188252, 0.227222", \ + "0.148762, 0.151272, 0.153402, 0.158102, 0.170452, 0.189972, 0.228942", \ + "0.151152, 0.153662, 0.155792, 0.160492, 0.172842, 0.192362, 0.231332", \ + "0.158142, 0.160652, 0.162782, 0.167482, 0.179832, 0.199352, 0.238322", \ + "0.161352, 0.163862, 0.165992, 0.170692, 0.183042, 0.202562, 0.241532", \ + "0.170792, 0.173302, 0.175432, 0.180132, 0.192482, 0.212002, 0.250972" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153055, 0.156261, 0.159121, 0.165731, 0.184551, 0.215721, 0.278101", \ + "0.153359, 0.156565, 0.159425, 0.166035, 0.184855, 0.216025, 0.278405", \ + "0.155041, 0.158247, 0.161107, 0.167717, 0.186537, 0.217707, 0.280087", \ + "0.157931, 0.161137, 0.163997, 0.170607, 0.189427, 0.220597, 0.282977", \ + "0.164151, 0.167357, 0.170217, 0.176827, 0.195647, 0.226817, 0.289197", \ + "0.166501, 0.169707, 0.172567, 0.179177, 0.197997, 0.229167, 0.291547", \ + "0.168901, 0.172107, 0.174967, 0.181577, 0.200397, 0.231567, 0.293947" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.129717, 0.132828, 0.135576, 0.141936, 0.160326, 0.190946, 0.252296", \ + "0.129908, 0.133019, 0.135767, 0.142127, 0.160517, 0.191137, 0.252487", \ + "0.131716, 0.134827, 0.137575, 0.143935, 0.162325, 0.192945, 0.254295", \ + "0.134426, 0.137537, 0.140285, 0.146645, 0.165035, 0.195655, 0.257005", \ + "0.140826, 0.143937, 0.146685, 0.153045, 0.171435, 0.202055, 0.263405", \ + "0.143196, 0.146307, 0.149055, 0.155415, 0.173805, 0.204425, 0.265775", \ + "0.145496, 0.148607, 0.151355, 0.157715, 0.176105, 0.206725, 0.268075" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.172844, 0.176024, 0.178877, 0.185467, 0.204247, 0.235367, 0.297717", \ + "0.173435, 0.176615, 0.179468, 0.186058, 0.204838, 0.235958, 0.298308", \ + "0.174845, 0.178025, 0.180878, 0.187468, 0.206248, 0.237368, 0.299718", \ + "0.177567, 0.180747, 0.183600, 0.190190, 0.208970, 0.240090, 0.302440", \ + "0.184297, 0.187477, 0.190330, 0.196920, 0.215700, 0.246820, 0.309170", \ + "0.187587, 0.190767, 0.193620, 0.200210, 0.218990, 0.250110, 0.312460", \ + "0.195257, 0.198437, 0.201290, 0.207880, 0.226660, 0.257780, 0.320130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.145621, 0.148685, 0.151433, 0.157765, 0.176125, 0.206735, 0.268015", \ + "0.146279, 0.149343, 0.152091, 0.158423, 0.176783, 0.207393, 0.268673", \ + "0.147550, 0.150614, 0.153362, 0.159694, 0.178054, 0.208664, 0.269944", \ + "0.150403, 0.153467, 0.156215, 0.162547, 0.180907, 0.211517, 0.272797", \ + "0.157095, 0.160159, 0.162907, 0.169239, 0.187599, 0.218209, 0.279489", \ + "0.160225, 0.163289, 0.166037, 0.172369, 0.190729, 0.221339, 0.282619", \ + "0.168095, 0.171159, 0.173907, 0.180239, 0.198599, 0.229209, 0.290489" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.162245, 0.164855, 0.167145, 0.172245, 0.185455, 0.206345, 0.247695", \ + "0.163045, 0.165655, 0.167945, 0.173045, 0.186255, 0.207145, 0.248495", \ + "0.163975, 0.166585, 0.168875, 0.173975, 0.187185, 0.208075, 0.249425", \ + "0.166325, 0.168935, 0.171225, 0.176325, 0.189535, 0.210425, 0.251775", \ + "0.173125, 0.175735, 0.178025, 0.183125, 0.196335, 0.217225, 0.258575", \ + "0.175425, 0.178035, 0.180325, 0.185425, 0.198635, 0.219525, 0.260875", \ + "0.182815, 0.185425, 0.187715, 0.192815, 0.206025, 0.226915, 0.268265" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138322, 0.140741, 0.142875, 0.147625, 0.159995, 0.179495, 0.218275", \ + "0.139021, 0.141440, 0.143574, 0.148324, 0.160694, 0.180194, 0.218974", \ + "0.139962, 0.142381, 0.144515, 0.149265, 0.161635, 0.181135, 0.219915", \ + "0.142305, 0.144724, 0.146858, 0.151608, 0.163978, 0.183478, 0.222258", \ + "0.148975, 0.151394, 0.153528, 0.158278, 0.170648, 0.190148, 0.228928", \ + "0.151445, 0.153864, 0.155998, 0.160748, 0.173118, 0.192618, 0.231398", \ + "0.158745, 0.161164, 0.163298, 0.168048, 0.180418, 0.199918, 0.238698" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + pin(AYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.171435, 0.173985, 0.176245, 0.181305, 0.194515, 0.215435, 0.257035", \ + "0.171895, 0.174445, 0.176705, 0.181765, 0.194975, 0.215895, 0.257495", \ + "0.173715, 0.176265, 0.178525, 0.183585, 0.196795, 0.217715, 0.259315", \ + "0.176105, 0.178655, 0.180915, 0.185975, 0.199185, 0.220105, 0.261705", \ + "0.182985, 0.185535, 0.187795, 0.192855, 0.206065, 0.226985, 0.268585", \ + "0.186165, 0.188715, 0.190975, 0.196035, 0.209245, 0.230165, 0.271765", \ + "0.195645, 0.198195, 0.200455, 0.205515, 0.218725, 0.239645, 0.281245" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146462, 0.148972, 0.151102, 0.155802, 0.168152, 0.187672, 0.226642", \ + "0.147042, 0.149552, 0.151682, 0.156382, 0.168732, 0.188252, 0.227222", \ + "0.148762, 0.151272, 0.153402, 0.158102, 0.170452, 0.189972, 0.228942", \ + "0.151152, 0.153662, 0.155792, 0.160492, 0.172842, 0.192362, 0.231332", \ + "0.158142, 0.160652, 0.162782, 0.167482, 0.179832, 0.199352, 0.238322", \ + "0.161352, 0.163862, 0.165992, 0.170692, 0.183042, 0.202562, 0.241532", \ + "0.170792, 0.173302, 0.175432, 0.180132, 0.192482, 0.212002, 0.250972" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153055, 0.156261, 0.159121, 0.165731, 0.184551, 0.215721, 0.278101", \ + "0.153359, 0.156565, 0.159425, 0.166035, 0.184855, 0.216025, 0.278405", \ + "0.155041, 0.158247, 0.161107, 0.167717, 0.186537, 0.217707, 0.280087", \ + "0.157931, 0.161137, 0.163997, 0.170607, 0.189427, 0.220597, 0.282977", \ + "0.164151, 0.167357, 0.170217, 0.176827, 0.195647, 0.226817, 0.289197", \ + "0.166501, 0.169707, 0.172567, 0.179177, 0.197997, 0.229167, 0.291547", \ + "0.168901, 0.172107, 0.174967, 0.181577, 0.200397, 0.231567, 0.293947" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.129717, 0.132828, 0.135576, 0.141936, 0.160326, 0.190946, 0.252296", \ + "0.129908, 0.133019, 0.135767, 0.142127, 0.160517, 0.191137, 0.252487", \ + "0.131716, 0.134827, 0.137575, 0.143935, 0.162325, 0.192945, 0.254295", \ + "0.134426, 0.137537, 0.140285, 0.146645, 0.165035, 0.195655, 0.257005", \ + "0.140826, 0.143937, 0.146685, 0.153045, 0.171435, 0.202055, 0.263405", \ + "0.143196, 0.146307, 0.149055, 0.155415, 0.173805, 0.204425, 0.265775", \ + "0.145496, 0.148607, 0.151355, 0.157715, 0.176105, 0.206725, 0.268075" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.172844, 0.176024, 0.178877, 0.185467, 0.204247, 0.235367, 0.297717", \ + "0.173435, 0.176615, 0.179468, 0.186058, 0.204838, 0.235958, 0.298308", \ + "0.174845, 0.178025, 0.180878, 0.187468, 0.206248, 0.237368, 0.299718", \ + "0.177567, 0.180747, 0.183600, 0.190190, 0.208970, 0.240090, 0.302440", \ + "0.184297, 0.187477, 0.190330, 0.196920, 0.215700, 0.246820, 0.309170", \ + "0.187587, 0.190767, 0.193620, 0.200210, 0.218990, 0.250110, 0.312460", \ + "0.195257, 0.198437, 0.201290, 0.207880, 0.226660, 0.257780, 0.320130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.145621, 0.148685, 0.151433, 0.157765, 0.176125, 0.206735, 0.268015", \ + "0.146279, 0.149343, 0.152091, 0.158423, 0.176783, 0.207393, 0.268673", \ + "0.147550, 0.150614, 0.153362, 0.159694, 0.178054, 0.208664, 0.269944", \ + "0.150403, 0.153467, 0.156215, 0.162547, 0.180907, 0.211517, 0.272797", \ + "0.157095, 0.160159, 0.162907, 0.169239, 0.187599, 0.218209, 0.279489", \ + "0.160225, 0.163289, 0.166037, 0.172369, 0.190729, 0.221339, 0.282619", \ + "0.168095, 0.171159, 0.173907, 0.180239, 0.198599, 0.229209, 0.290489" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.162245, 0.164855, 0.167145, 0.172245, 0.185455, 0.206345, 0.247695", \ + "0.163045, 0.165655, 0.167945, 0.173045, 0.186255, 0.207145, 0.248495", \ + "0.163975, 0.166585, 0.168875, 0.173975, 0.187185, 0.208075, 0.249425", \ + "0.166325, 0.168935, 0.171225, 0.176325, 0.189535, 0.210425, 0.251775", \ + "0.173125, 0.175735, 0.178025, 0.183125, 0.196335, 0.217225, 0.258575", \ + "0.175425, 0.178035, 0.180325, 0.185425, 0.198635, 0.219525, 0.260875", \ + "0.182815, 0.185425, 0.187715, 0.192815, 0.206025, 0.226915, 0.268265" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138322, 0.140741, 0.142875, 0.147625, 0.159995, 0.179495, 0.218275", \ + "0.139021, 0.141440, 0.143574, 0.148324, 0.160694, 0.180194, 0.218974", \ + "0.139962, 0.142381, 0.144515, 0.149265, 0.161635, 0.181135, 0.219915", \ + "0.142305, 0.144724, 0.146858, 0.151608, 0.163978, 0.183478, 0.222258", \ + "0.148975, 0.151394, 0.153528, 0.158278, 0.170648, 0.190148, 0.228928", \ + "0.151445, 0.153864, 0.155998, 0.160748, 0.173118, 0.192618, 0.231398", \ + "0.158745, 0.161164, 0.163298, 0.168048, 0.180418, 0.199918, 0.238698" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + pin(AYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.171435, 0.173985, 0.176245, 0.181305, 0.194515, 0.215435, 0.257035", \ + "0.171895, 0.174445, 0.176705, 0.181765, 0.194975, 0.215895, 0.257495", \ + "0.173715, 0.176265, 0.178525, 0.183585, 0.196795, 0.217715, 0.259315", \ + "0.176105, 0.178655, 0.180915, 0.185975, 0.199185, 0.220105, 0.261705", \ + "0.182985, 0.185535, 0.187795, 0.192855, 0.206065, 0.226985, 0.268585", \ + "0.186165, 0.188715, 0.190975, 0.196035, 0.209245, 0.230165, 0.271765", \ + "0.195645, 0.198195, 0.200455, 0.205515, 0.218725, 0.239645, 0.281245" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146462, 0.148972, 0.151102, 0.155802, 0.168152, 0.187672, 0.226642", \ + "0.147042, 0.149552, 0.151682, 0.156382, 0.168732, 0.188252, 0.227222", \ + "0.148762, 0.151272, 0.153402, 0.158102, 0.170452, 0.189972, 0.228942", \ + "0.151152, 0.153662, 0.155792, 0.160492, 0.172842, 0.192362, 0.231332", \ + "0.158142, 0.160652, 0.162782, 0.167482, 0.179832, 0.199352, 0.238322", \ + "0.161352, 0.163862, 0.165992, 0.170692, 0.183042, 0.202562, 0.241532", \ + "0.170792, 0.173302, 0.175432, 0.180132, 0.192482, 0.212002, 0.250972" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153055, 0.156261, 0.159121, 0.165731, 0.184551, 0.215721, 0.278101", \ + "0.153359, 0.156565, 0.159425, 0.166035, 0.184855, 0.216025, 0.278405", \ + "0.155041, 0.158247, 0.161107, 0.167717, 0.186537, 0.217707, 0.280087", \ + "0.157931, 0.161137, 0.163997, 0.170607, 0.189427, 0.220597, 0.282977", \ + "0.164151, 0.167357, 0.170217, 0.176827, 0.195647, 0.226817, 0.289197", \ + "0.166501, 0.169707, 0.172567, 0.179177, 0.197997, 0.229167, 0.291547", \ + "0.168901, 0.172107, 0.174967, 0.181577, 0.200397, 0.231567, 0.293947" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.129717, 0.132828, 0.135576, 0.141936, 0.160326, 0.190946, 0.252296", \ + "0.129908, 0.133019, 0.135767, 0.142127, 0.160517, 0.191137, 0.252487", \ + "0.131716, 0.134827, 0.137575, 0.143935, 0.162325, 0.192945, 0.254295", \ + "0.134426, 0.137537, 0.140285, 0.146645, 0.165035, 0.195655, 0.257005", \ + "0.140826, 0.143937, 0.146685, 0.153045, 0.171435, 0.202055, 0.263405", \ + "0.143196, 0.146307, 0.149055, 0.155415, 0.173805, 0.204425, 0.265775", \ + "0.145496, 0.148607, 0.151355, 0.157715, 0.176105, 0.206725, 0.268075" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.172844, 0.176024, 0.178877, 0.185467, 0.204247, 0.235367, 0.297717", \ + "0.173435, 0.176615, 0.179468, 0.186058, 0.204838, 0.235958, 0.298308", \ + "0.174845, 0.178025, 0.180878, 0.187468, 0.206248, 0.237368, 0.299718", \ + "0.177567, 0.180747, 0.183600, 0.190190, 0.208970, 0.240090, 0.302440", \ + "0.184297, 0.187477, 0.190330, 0.196920, 0.215700, 0.246820, 0.309170", \ + "0.187587, 0.190767, 0.193620, 0.200210, 0.218990, 0.250110, 0.312460", \ + "0.195257, 0.198437, 0.201290, 0.207880, 0.226660, 0.257780, 0.320130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.145621, 0.148685, 0.151433, 0.157765, 0.176125, 0.206735, 0.268015", \ + "0.146279, 0.149343, 0.152091, 0.158423, 0.176783, 0.207393, 0.268673", \ + "0.147550, 0.150614, 0.153362, 0.159694, 0.178054, 0.208664, 0.269944", \ + "0.150403, 0.153467, 0.156215, 0.162547, 0.180907, 0.211517, 0.272797", \ + "0.157095, 0.160159, 0.162907, 0.169239, 0.187599, 0.218209, 0.279489", \ + "0.160225, 0.163289, 0.166037, 0.172369, 0.190729, 0.221339, 0.282619", \ + "0.168095, 0.171159, 0.173907, 0.180239, 0.198599, 0.229209, 0.290489" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.162245, 0.164855, 0.167145, 0.172245, 0.185455, 0.206345, 0.247695", \ + "0.163045, 0.165655, 0.167945, 0.173045, 0.186255, 0.207145, 0.248495", \ + "0.163975, 0.166585, 0.168875, 0.173975, 0.187185, 0.208075, 0.249425", \ + "0.166325, 0.168935, 0.171225, 0.176325, 0.189535, 0.210425, 0.251775", \ + "0.173125, 0.175735, 0.178025, 0.183125, 0.196335, 0.217225, 0.258575", \ + "0.175425, 0.178035, 0.180325, 0.185425, 0.198635, 0.219525, 0.260875", \ + "0.182815, 0.185425, 0.187715, 0.192815, 0.206025, 0.226915, 0.268265" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138322, 0.140741, 0.142875, 0.147625, 0.159995, 0.179495, 0.218275", \ + "0.139021, 0.141440, 0.143574, 0.148324, 0.160694, 0.180194, 0.218974", \ + "0.139962, 0.142381, 0.144515, 0.149265, 0.161635, 0.181135, 0.219915", \ + "0.142305, 0.144724, 0.146858, 0.151608, 0.163978, 0.183478, 0.222258", \ + "0.148975, 0.151394, 0.153528, 0.158278, 0.170648, 0.190148, 0.228928", \ + "0.151445, 0.153864, 0.155998, 0.160748, 0.173118, 0.192618, 0.231398", \ + "0.158745, 0.161164, 0.163298, 0.168048, 0.180418, 0.199918, 0.238698" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + pin(AYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.171435, 0.173985, 0.176245, 0.181305, 0.194515, 0.215435, 0.257035", \ + "0.171895, 0.174445, 0.176705, 0.181765, 0.194975, 0.215895, 0.257495", \ + "0.173715, 0.176265, 0.178525, 0.183585, 0.196795, 0.217715, 0.259315", \ + "0.176105, 0.178655, 0.180915, 0.185975, 0.199185, 0.220105, 0.261705", \ + "0.182985, 0.185535, 0.187795, 0.192855, 0.206065, 0.226985, 0.268585", \ + "0.186165, 0.188715, 0.190975, 0.196035, 0.209245, 0.230165, 0.271765", \ + "0.195645, 0.198195, 0.200455, 0.205515, 0.218725, 0.239645, 0.281245" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146462, 0.148972, 0.151102, 0.155802, 0.168152, 0.187672, 0.226642", \ + "0.147042, 0.149552, 0.151682, 0.156382, 0.168732, 0.188252, 0.227222", \ + "0.148762, 0.151272, 0.153402, 0.158102, 0.170452, 0.189972, 0.228942", \ + "0.151152, 0.153662, 0.155792, 0.160492, 0.172842, 0.192362, 0.231332", \ + "0.158142, 0.160652, 0.162782, 0.167482, 0.179832, 0.199352, 0.238322", \ + "0.161352, 0.163862, 0.165992, 0.170692, 0.183042, 0.202562, 0.241532", \ + "0.170792, 0.173302, 0.175432, 0.180132, 0.192482, 0.212002, 0.250972" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153055, 0.156261, 0.159121, 0.165731, 0.184551, 0.215721, 0.278101", \ + "0.153359, 0.156565, 0.159425, 0.166035, 0.184855, 0.216025, 0.278405", \ + "0.155041, 0.158247, 0.161107, 0.167717, 0.186537, 0.217707, 0.280087", \ + "0.157931, 0.161137, 0.163997, 0.170607, 0.189427, 0.220597, 0.282977", \ + "0.164151, 0.167357, 0.170217, 0.176827, 0.195647, 0.226817, 0.289197", \ + "0.166501, 0.169707, 0.172567, 0.179177, 0.197997, 0.229167, 0.291547", \ + "0.168901, 0.172107, 0.174967, 0.181577, 0.200397, 0.231567, 0.293947" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.129717, 0.132828, 0.135576, 0.141936, 0.160326, 0.190946, 0.252296", \ + "0.129908, 0.133019, 0.135767, 0.142127, 0.160517, 0.191137, 0.252487", \ + "0.131716, 0.134827, 0.137575, 0.143935, 0.162325, 0.192945, 0.254295", \ + "0.134426, 0.137537, 0.140285, 0.146645, 0.165035, 0.195655, 0.257005", \ + "0.140826, 0.143937, 0.146685, 0.153045, 0.171435, 0.202055, 0.263405", \ + "0.143196, 0.146307, 0.149055, 0.155415, 0.173805, 0.204425, 0.265775", \ + "0.145496, 0.148607, 0.151355, 0.157715, 0.176105, 0.206725, 0.268075" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.172844, 0.176024, 0.178877, 0.185467, 0.204247, 0.235367, 0.297717", \ + "0.173435, 0.176615, 0.179468, 0.186058, 0.204838, 0.235958, 0.298308", \ + "0.174845, 0.178025, 0.180878, 0.187468, 0.206248, 0.237368, 0.299718", \ + "0.177567, 0.180747, 0.183600, 0.190190, 0.208970, 0.240090, 0.302440", \ + "0.184297, 0.187477, 0.190330, 0.196920, 0.215700, 0.246820, 0.309170", \ + "0.187587, 0.190767, 0.193620, 0.200210, 0.218990, 0.250110, 0.312460", \ + "0.195257, 0.198437, 0.201290, 0.207880, 0.226660, 0.257780, 0.320130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.145621, 0.148685, 0.151433, 0.157765, 0.176125, 0.206735, 0.268015", \ + "0.146279, 0.149343, 0.152091, 0.158423, 0.176783, 0.207393, 0.268673", \ + "0.147550, 0.150614, 0.153362, 0.159694, 0.178054, 0.208664, 0.269944", \ + "0.150403, 0.153467, 0.156215, 0.162547, 0.180907, 0.211517, 0.272797", \ + "0.157095, 0.160159, 0.162907, 0.169239, 0.187599, 0.218209, 0.279489", \ + "0.160225, 0.163289, 0.166037, 0.172369, 0.190729, 0.221339, 0.282619", \ + "0.168095, 0.171159, 0.173907, 0.180239, 0.198599, 0.229209, 0.290489" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.162245, 0.164855, 0.167145, 0.172245, 0.185455, 0.206345, 0.247695", \ + "0.163045, 0.165655, 0.167945, 0.173045, 0.186255, 0.207145, 0.248495", \ + "0.163975, 0.166585, 0.168875, 0.173975, 0.187185, 0.208075, 0.249425", \ + "0.166325, 0.168935, 0.171225, 0.176325, 0.189535, 0.210425, 0.251775", \ + "0.173125, 0.175735, 0.178025, 0.183125, 0.196335, 0.217225, 0.258575", \ + "0.175425, 0.178035, 0.180325, 0.185425, 0.198635, 0.219525, 0.260875", \ + "0.182815, 0.185425, 0.187715, 0.192815, 0.206025, 0.226915, 0.268265" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138322, 0.140741, 0.142875, 0.147625, 0.159995, 0.179495, 0.218275", \ + "0.139021, 0.141440, 0.143574, 0.148324, 0.160694, 0.180194, 0.218974", \ + "0.139962, 0.142381, 0.144515, 0.149265, 0.161635, 0.181135, 0.219915", \ + "0.142305, 0.144724, 0.146858, 0.151608, 0.163978, 0.183478, 0.222258", \ + "0.148975, 0.151394, 0.153528, 0.158278, 0.170648, 0.190148, 0.228928", \ + "0.151445, 0.153864, 0.155998, 0.160748, 0.173118, 0.192618, 0.231398", \ + "0.158745, 0.161164, 0.163298, 0.168048, 0.180418, 0.199918, 0.238698" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + } + bus(QA) { + bus_type : rf2_32x128_wm1_QA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + memory_read() { + address : AA; + } + max_capacitance : 0.300000; + max_transition : 0.262800; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.504869, 0.507939, 0.512479, 0.519639, 0.533949, 0.558399, 0.606359", \ + "0.505349, 0.508419, 0.512959, 0.520119, 0.534429, 0.558879, 0.606839", \ + "0.506359, 0.509429, 0.513969, 0.521129, 0.535439, 0.559889, 0.607849", \ + "0.508329, 0.511399, 0.515939, 0.523099, 0.537409, 0.561859, 0.609819", \ + "0.514559, 0.517629, 0.522169, 0.529329, 0.543639, 0.568089, 0.616049", \ + "0.517649, 0.520719, 0.525259, 0.532419, 0.546729, 0.571179, 0.619139", \ + "0.524529, 0.527599, 0.532139, 0.539299, 0.553609, 0.578059, 0.626019" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.361999, 0.365089, 0.369909, 0.376999, 0.391379, 0.415819, 0.463989", \ + "0.362409, 0.365499, 0.370319, 0.377409, 0.391789, 0.416229, 0.464399", \ + "0.363529, 0.366619, 0.371439, 0.378529, 0.392909, 0.417349, 0.465519", \ + "0.365489, 0.368579, 0.373399, 0.380489, 0.394869, 0.419309, 0.467479", \ + "0.371909, 0.374999, 0.379819, 0.386909, 0.401289, 0.425729, 0.473899", \ + "0.374899, 0.377989, 0.382809, 0.389899, 0.404279, 0.428719, 0.476889", \ + "0.381779, 0.384869, 0.389689, 0.396779, 0.411159, 0.435599, 0.483769" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.486826, 0.490596, 0.496156, 0.504746, 0.522296, 0.553136, 0.614116", \ + "0.487626, 0.491396, 0.496956, 0.505546, 0.523096, 0.553936, 0.614916", \ + "0.488926, 0.492696, 0.498256, 0.506846, 0.524396, 0.555236, 0.616216", \ + "0.490546, 0.494316, 0.499876, 0.508466, 0.526016, 0.556856, 0.617836", \ + "0.497056, 0.500826, 0.506386, 0.514976, 0.532526, 0.563366, 0.624346", \ + "0.500046, 0.503816, 0.509376, 0.517966, 0.535516, 0.566356, 0.627336", \ + "0.506416, 0.510186, 0.515746, 0.524336, 0.541886, 0.572726, 0.633706" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.348391, 0.351911, 0.357231, 0.366051, 0.383481, 0.414301, 0.474961", \ + "0.348741, 0.352261, 0.357581, 0.366401, 0.383831, 0.414651, 0.475311", \ + "0.350081, 0.353601, 0.358921, 0.367741, 0.385171, 0.415991, 0.476651", \ + "0.352041, 0.355561, 0.360881, 0.369701, 0.387131, 0.417951, 0.478611", \ + "0.358311, 0.361831, 0.367151, 0.375971, 0.393401, 0.424221, 0.484881", \ + "0.361201, 0.364721, 0.370041, 0.378861, 0.396291, 0.427111, 0.487771", \ + "0.367051, 0.370571, 0.375891, 0.384711, 0.402141, 0.432961, 0.493621" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.504293, 0.507363, 0.511903, 0.519063, 0.533373, 0.557823, 0.605783", \ + "0.504773, 0.507843, 0.512383, 0.519543, 0.533853, 0.558303, 0.606263", \ + "0.505783, 0.508853, 0.513393, 0.520553, 0.534863, 0.559313, 0.607273", \ + "0.507753, 0.510823, 0.515363, 0.522523, 0.536833, 0.561283, 0.609243", \ + "0.513983, 0.517053, 0.521593, 0.528753, 0.543063, 0.567513, 0.615473", \ + "0.517073, 0.520143, 0.524683, 0.531843, 0.546153, 0.570603, 0.618563", \ + "0.523953, 0.527023, 0.531563, 0.538723, 0.553033, 0.577483, 0.625443" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.361527, 0.364617, 0.369437, 0.376527, 0.390907, 0.415347, 0.463517", \ + "0.361937, 0.365027, 0.369847, 0.376937, 0.391317, 0.415757, 0.463927", \ + "0.363057, 0.366147, 0.370967, 0.378057, 0.392437, 0.416877, 0.465047", \ + "0.365017, 0.368107, 0.372927, 0.380017, 0.394397, 0.418837, 0.467007", \ + "0.371437, 0.374527, 0.379347, 0.386437, 0.400817, 0.425257, 0.473427", \ + "0.374427, 0.377517, 0.382337, 0.389427, 0.403807, 0.428247, 0.476417", \ + "0.381307, 0.384397, 0.389217, 0.396307, 0.410687, 0.435127, 0.483297" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.486249, 0.490019, 0.495579, 0.504169, 0.521719, 0.552559, 0.613539", \ + "0.487049, 0.490819, 0.496379, 0.504969, 0.522519, 0.553359, 0.614339", \ + "0.488349, 0.492119, 0.497679, 0.506269, 0.523819, 0.554659, 0.615639", \ + "0.489969, 0.493739, 0.499299, 0.507889, 0.525439, 0.556279, 0.617259", \ + "0.496479, 0.500249, 0.505809, 0.514399, 0.531949, 0.562789, 0.623769", \ + "0.499469, 0.503239, 0.508799, 0.517389, 0.534939, 0.565779, 0.626759", \ + "0.505839, 0.509609, 0.515169, 0.523759, 0.541309, 0.572149, 0.633129" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.347919, 0.351439, 0.356759, 0.365579, 0.383009, 0.413829, 0.474489", \ + "0.348269, 0.351789, 0.357109, 0.365929, 0.383359, 0.414179, 0.474839", \ + "0.349609, 0.353129, 0.358449, 0.367269, 0.384699, 0.415519, 0.476179", \ + "0.351569, 0.355089, 0.360409, 0.369229, 0.386659, 0.417479, 0.478139", \ + "0.357839, 0.361359, 0.366679, 0.375499, 0.392929, 0.423749, 0.484409", \ + "0.360729, 0.364249, 0.369569, 0.378389, 0.395819, 0.426639, 0.487299", \ + "0.366579, 0.370099, 0.375419, 0.384239, 0.401669, 0.432489, 0.493149" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.505084, 0.508154, 0.512694, 0.519854, 0.534164, 0.558614, 0.606574", \ + "0.505564, 0.508634, 0.513174, 0.520334, 0.534644, 0.559094, 0.607054", \ + "0.506574, 0.509644, 0.514184, 0.521344, 0.535654, 0.560104, 0.608064", \ + "0.508544, 0.511614, 0.516154, 0.523314, 0.537624, 0.562074, 0.610034", \ + "0.514774, 0.517844, 0.522384, 0.529544, 0.543854, 0.568304, 0.616264", \ + "0.517864, 0.520934, 0.525474, 0.532634, 0.546944, 0.571394, 0.619354", \ + "0.524744, 0.527814, 0.532354, 0.539514, 0.553824, 0.578274, 0.626234" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.362175, 0.365265, 0.370085, 0.377175, 0.391555, 0.415995, 0.464165", \ + "0.362585, 0.365675, 0.370495, 0.377585, 0.391965, 0.416405, 0.464575", \ + "0.363705, 0.366795, 0.371615, 0.378705, 0.393085, 0.417525, 0.465695", \ + "0.365665, 0.368755, 0.373575, 0.380665, 0.395045, 0.419485, 0.467655", \ + "0.372085, 0.375175, 0.379995, 0.387085, 0.401465, 0.425905, 0.474075", \ + "0.375075, 0.378165, 0.382985, 0.390075, 0.404455, 0.428895, 0.477065", \ + "0.381955, 0.385045, 0.389865, 0.396955, 0.411335, 0.435775, 0.483945" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.487040, 0.490810, 0.496370, 0.504960, 0.522510, 0.553350, 0.614330", \ + "0.487840, 0.491610, 0.497170, 0.505760, 0.523310, 0.554150, 0.615130", \ + "0.489140, 0.492910, 0.498470, 0.507060, 0.524610, 0.555450, 0.616430", \ + "0.490760, 0.494530, 0.500090, 0.508680, 0.526230, 0.557070, 0.618050", \ + "0.497270, 0.501040, 0.506600, 0.515190, 0.532740, 0.563580, 0.624560", \ + "0.500260, 0.504030, 0.509590, 0.518180, 0.535730, 0.566570, 0.627550", \ + "0.506630, 0.510400, 0.515960, 0.524550, 0.542100, 0.572940, 0.633920" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.348567, 0.352087, 0.357407, 0.366227, 0.383657, 0.414477, 0.475137", \ + "0.348917, 0.352437, 0.357757, 0.366577, 0.384007, 0.414827, 0.475487", \ + "0.350257, 0.353777, 0.359097, 0.367917, 0.385347, 0.416167, 0.476827", \ + "0.352217, 0.355737, 0.361057, 0.369877, 0.387307, 0.418127, 0.478787", \ + "0.358487, 0.362007, 0.367327, 0.376147, 0.393577, 0.424397, 0.485057", \ + "0.361377, 0.364897, 0.370217, 0.379037, 0.396467, 0.427287, 0.487947", \ + "0.367227, 0.370747, 0.376067, 0.384887, 0.402317, 0.433137, 0.493797" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.505671, 0.508741, 0.513281, 0.520441, 0.534751, 0.559201, 0.607161", \ + "0.506151, 0.509221, 0.513761, 0.520921, 0.535231, 0.559681, 0.607641", \ + "0.507161, 0.510231, 0.514771, 0.521931, 0.536241, 0.560691, 0.608651", \ + "0.509131, 0.512201, 0.516741, 0.523901, 0.538211, 0.562661, 0.610621", \ + "0.515361, 0.518431, 0.522971, 0.530131, 0.544441, 0.568891, 0.616851", \ + "0.518451, 0.521521, 0.526061, 0.533221, 0.547531, 0.571981, 0.619941", \ + "0.525331, 0.528401, 0.532941, 0.540101, 0.554411, 0.578861, 0.626821" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.362657, 0.365747, 0.370567, 0.377657, 0.392037, 0.416477, 0.464647", \ + "0.363067, 0.366157, 0.370977, 0.378067, 0.392447, 0.416887, 0.465057", \ + "0.364187, 0.367277, 0.372097, 0.379187, 0.393567, 0.418007, 0.466177", \ + "0.366147, 0.369237, 0.374057, 0.381147, 0.395527, 0.419967, 0.468137", \ + "0.372567, 0.375657, 0.380477, 0.387567, 0.401947, 0.426387, 0.474557", \ + "0.375557, 0.378647, 0.383467, 0.390557, 0.404937, 0.429377, 0.477547", \ + "0.382437, 0.385527, 0.390347, 0.397437, 0.411817, 0.436257, 0.484427" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.487628, 0.491398, 0.496958, 0.505548, 0.523098, 0.553938, 0.614918", \ + "0.488428, 0.492198, 0.497758, 0.506348, 0.523898, 0.554738, 0.615718", \ + "0.489728, 0.493498, 0.499058, 0.507648, 0.525198, 0.556038, 0.617018", \ + "0.491348, 0.495118, 0.500678, 0.509268, 0.526818, 0.557658, 0.618638", \ + "0.497858, 0.501628, 0.507188, 0.515778, 0.533328, 0.564168, 0.625148", \ + "0.500848, 0.504618, 0.510178, 0.518768, 0.536318, 0.567158, 0.628138", \ + "0.507218, 0.510988, 0.516548, 0.525138, 0.542688, 0.573528, 0.634508" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.349049, 0.352569, 0.357889, 0.366709, 0.384139, 0.414959, 0.475619", \ + "0.349399, 0.352919, 0.358239, 0.367059, 0.384489, 0.415309, 0.475969", \ + "0.350739, 0.354259, 0.359579, 0.368399, 0.385829, 0.416649, 0.477309", \ + "0.352699, 0.356219, 0.361539, 0.370359, 0.387789, 0.418609, 0.479269", \ + "0.358969, 0.362489, 0.367809, 0.376629, 0.394059, 0.424879, 0.485539", \ + "0.361859, 0.365379, 0.370699, 0.379519, 0.396949, 0.427769, 0.488429", \ + "0.367709, 0.371229, 0.376549, 0.385369, 0.402799, 0.433619, 0.494279" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.546679, 0.549749, 0.554289, 0.561449, 0.575759, 0.600209, 0.648169", \ + "0.547159, 0.550229, 0.554769, 0.561929, 0.576239, 0.600689, 0.648649", \ + "0.548169, 0.551239, 0.555779, 0.562939, 0.577249, 0.601699, 0.649659", \ + "0.550139, 0.553209, 0.557749, 0.564909, 0.579219, 0.603669, 0.651629", \ + "0.556369, 0.559439, 0.563979, 0.571139, 0.585449, 0.609899, 0.657859", \ + "0.559459, 0.562529, 0.567069, 0.574229, 0.588539, 0.612989, 0.660949", \ + "0.566339, 0.569409, 0.573949, 0.581109, 0.595419, 0.619869, 0.667829" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.396270, 0.399360, 0.404180, 0.411270, 0.425650, 0.450090, 0.498260", \ + "0.396680, 0.399770, 0.404590, 0.411680, 0.426060, 0.450500, 0.498670", \ + "0.397800, 0.400890, 0.405710, 0.412800, 0.427180, 0.451620, 0.499790", \ + "0.399760, 0.402850, 0.407670, 0.414760, 0.429140, 0.453580, 0.501750", \ + "0.406180, 0.409270, 0.414090, 0.421180, 0.435560, 0.460000, 0.508170", \ + "0.409170, 0.412260, 0.417080, 0.424170, 0.438550, 0.462990, 0.511160", \ + "0.416050, 0.419140, 0.423960, 0.431050, 0.445430, 0.469870, 0.518040" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.528636, 0.532406, 0.537966, 0.546556, 0.564106, 0.594946, 0.655926", \ + "0.529436, 0.533206, 0.538766, 0.547356, 0.564906, 0.595746, 0.656726", \ + "0.530736, 0.534506, 0.540066, 0.548656, 0.566206, 0.597046, 0.658026", \ + "0.532356, 0.536126, 0.541686, 0.550276, 0.567826, 0.598666, 0.659646", \ + "0.538866, 0.542636, 0.548196, 0.556786, 0.574336, 0.605176, 0.666156", \ + "0.541856, 0.545626, 0.551186, 0.559776, 0.577326, 0.608166, 0.669146", \ + "0.548226, 0.551996, 0.557556, 0.566146, 0.583696, 0.614536, 0.675516" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.382672, 0.386192, 0.391512, 0.400332, 0.417762, 0.448582, 0.509242", \ + "0.383022, 0.386542, 0.391862, 0.400682, 0.418112, 0.448932, 0.509592", \ + "0.384362, 0.387882, 0.393202, 0.402022, 0.419452, 0.450272, 0.510932", \ + "0.386322, 0.389842, 0.395162, 0.403982, 0.421412, 0.452232, 0.512892", \ + "0.392592, 0.396112, 0.401432, 0.410252, 0.427682, 0.458502, 0.519162", \ + "0.395482, 0.399002, 0.404322, 0.413142, 0.430572, 0.461392, 0.522052", \ + "0.401332, 0.404852, 0.410172, 0.418992, 0.436422, 0.467242, 0.527902" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.583879, 0.586949, 0.591489, 0.598649, 0.612959, 0.637409, 0.685369", \ + "0.584359, 0.587429, 0.591969, 0.599129, 0.613439, 0.637889, 0.685849", \ + "0.585369, 0.588439, 0.592979, 0.600139, 0.614449, 0.638899, 0.686859", \ + "0.587339, 0.590409, 0.594949, 0.602109, 0.616419, 0.640869, 0.688829", \ + "0.593569, 0.596639, 0.601179, 0.608339, 0.622649, 0.647099, 0.695059", \ + "0.596659, 0.599729, 0.604269, 0.611429, 0.625739, 0.650189, 0.698149", \ + "0.603539, 0.606609, 0.611149, 0.618309, 0.632619, 0.657069, 0.705029" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.426780, 0.429870, 0.434690, 0.441780, 0.456160, 0.480600, 0.528770", \ + "0.427190, 0.430280, 0.435100, 0.442190, 0.456570, 0.481010, 0.529180", \ + "0.428310, 0.431400, 0.436220, 0.443310, 0.457690, 0.482130, 0.530300", \ + "0.430270, 0.433360, 0.438180, 0.445270, 0.459650, 0.484090, 0.532260", \ + "0.436690, 0.439780, 0.444600, 0.451690, 0.466070, 0.490510, 0.538680", \ + "0.439680, 0.442770, 0.447590, 0.454680, 0.469060, 0.493500, 0.541670", \ + "0.446560, 0.449650, 0.454470, 0.461560, 0.475940, 0.500380, 0.548550" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.565835, 0.569605, 0.575165, 0.583755, 0.601305, 0.632145, 0.693125", \ + "0.566635, 0.570405, 0.575965, 0.584555, 0.602105, 0.632945, 0.693925", \ + "0.567935, 0.571705, 0.577265, 0.585855, 0.603405, 0.634245, 0.695225", \ + "0.569555, 0.573325, 0.578885, 0.587475, 0.605025, 0.635865, 0.696845", \ + "0.576065, 0.579835, 0.585395, 0.593985, 0.611535, 0.642375, 0.703355", \ + "0.579055, 0.582825, 0.588385, 0.596975, 0.614525, 0.645365, 0.706345", \ + "0.585425, 0.589195, 0.594755, 0.603345, 0.620895, 0.651735, 0.712715" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.413172, 0.416692, 0.422012, 0.430832, 0.448262, 0.479082, 0.539742", \ + "0.413522, 0.417042, 0.422362, 0.431182, 0.448612, 0.479432, 0.540092", \ + "0.414862, 0.418382, 0.423702, 0.432522, 0.449952, 0.480772, 0.541432", \ + "0.416822, 0.420342, 0.425662, 0.434482, 0.451912, 0.482732, 0.543392", \ + "0.423092, 0.426612, 0.431932, 0.440752, 0.458182, 0.489002, 0.549662", \ + "0.425982, 0.429502, 0.434822, 0.443642, 0.461072, 0.491892, 0.552552", \ + "0.431832, 0.435352, 0.440672, 0.449492, 0.466922, 0.497742, 0.558402" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.622480, 0.625549, 0.630090, 0.637250, 0.651560, 0.676010, 0.723970", \ + "0.622959, 0.626030, 0.630569, 0.637730, 0.652040, 0.676489, 0.724449", \ + "0.623970, 0.627039, 0.631580, 0.638740, 0.653050, 0.677500, 0.725460", \ + "0.625940, 0.629009, 0.633549, 0.640710, 0.655020, 0.679470, 0.727430", \ + "0.632170, 0.635240, 0.639780, 0.646939, 0.661250, 0.685700, 0.733660", \ + "0.635260, 0.638329, 0.642869, 0.650030, 0.664340, 0.688790, 0.736750", \ + "0.642140, 0.645209, 0.649749, 0.656910, 0.671220, 0.695670, 0.743630" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.458429, 0.461519, 0.466339, 0.473429, 0.487809, 0.512249, 0.560419", \ + "0.458839, 0.461929, 0.466749, 0.473839, 0.488219, 0.512659, 0.560829", \ + "0.459959, 0.463049, 0.467869, 0.474959, 0.489339, 0.513779, 0.561949", \ + "0.461919, 0.465009, 0.469829, 0.476919, 0.491299, 0.515739, 0.563909", \ + "0.468339, 0.471429, 0.476249, 0.483339, 0.497719, 0.522159, 0.570329", \ + "0.471329, 0.474419, 0.479239, 0.486329, 0.500709, 0.525149, 0.573319", \ + "0.478209, 0.481299, 0.486119, 0.493209, 0.507589, 0.532029, 0.580199" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.604436, 0.608206, 0.613766, 0.622356, 0.639906, 0.670746, 0.731726", \ + "0.605236, 0.609006, 0.614566, 0.623156, 0.640706, 0.671546, 0.732526", \ + "0.606536, 0.610306, 0.615866, 0.624456, 0.642006, 0.672846, 0.733826", \ + "0.608156, 0.611926, 0.617486, 0.626076, 0.643626, 0.674466, 0.735446", \ + "0.614666, 0.618436, 0.623996, 0.632586, 0.650136, 0.680976, 0.741956", \ + "0.617656, 0.621426, 0.626986, 0.635576, 0.653126, 0.683966, 0.744946", \ + "0.624026, 0.627796, 0.633356, 0.641946, 0.659496, 0.690336, 0.751316" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.444821, 0.448341, 0.453661, 0.462481, 0.479911, 0.510731, 0.571391", \ + "0.445171, 0.448691, 0.454011, 0.462831, 0.480261, 0.511081, 0.571741", \ + "0.446511, 0.450031, 0.455351, 0.464171, 0.481601, 0.512421, 0.573081", \ + "0.448471, 0.451991, 0.457311, 0.466131, 0.483561, 0.514381, 0.575041", \ + "0.454741, 0.458261, 0.463581, 0.472401, 0.489831, 0.520651, 0.581311", \ + "0.457631, 0.461151, 0.466471, 0.475291, 0.492721, 0.523541, 0.584201", \ + "0.463481, 0.467001, 0.472321, 0.481141, 0.498571, 0.529391, 0.590051" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.659611, 0.662681, 0.667221, 0.674381, 0.688691, 0.713141, 0.761101", \ + "0.660091, 0.663161, 0.667701, 0.674861, 0.689171, 0.713621, 0.761581", \ + "0.661101, 0.664171, 0.668711, 0.675871, 0.690181, 0.714631, 0.762591", \ + "0.663071, 0.666141, 0.670681, 0.677841, 0.692151, 0.716601, 0.764561", \ + "0.669301, 0.672371, 0.676911, 0.684071, 0.698381, 0.722831, 0.770791", \ + "0.672391, 0.675461, 0.680001, 0.687161, 0.701471, 0.725921, 0.773881", \ + "0.679271, 0.682341, 0.686881, 0.694041, 0.708351, 0.732801, 0.780761" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.488865, 0.491955, 0.496775, 0.503865, 0.518245, 0.542685, 0.590855", \ + "0.489275, 0.492365, 0.497185, 0.504275, 0.518655, 0.543095, 0.591265", \ + "0.490395, 0.493485, 0.498305, 0.505395, 0.519775, 0.544215, 0.592385", \ + "0.492355, 0.495445, 0.500265, 0.507355, 0.521735, 0.546175, 0.594345", \ + "0.498775, 0.501865, 0.506685, 0.513775, 0.528155, 0.552595, 0.600765", \ + "0.501765, 0.504855, 0.509675, 0.516765, 0.531145, 0.555585, 0.603755", \ + "0.508645, 0.511735, 0.516555, 0.523645, 0.538025, 0.562465, 0.610635" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.641568, 0.645338, 0.650898, 0.659488, 0.677038, 0.707878, 0.768858", \ + "0.642368, 0.646138, 0.651698, 0.660288, 0.677838, 0.708678, 0.769658", \ + "0.643668, 0.647438, 0.652998, 0.661588, 0.679138, 0.709978, 0.770958", \ + "0.645288, 0.649058, 0.654618, 0.663208, 0.680758, 0.711598, 0.772578", \ + "0.651798, 0.655568, 0.661128, 0.669718, 0.687268, 0.718108, 0.779088", \ + "0.654788, 0.658558, 0.664118, 0.672708, 0.690258, 0.721098, 0.782078", \ + "0.661158, 0.664928, 0.670488, 0.679078, 0.696628, 0.727468, 0.788448" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.475266, 0.478786, 0.484106, 0.492926, 0.510356, 0.541176, 0.601836", \ + "0.475616, 0.479136, 0.484456, 0.493276, 0.510706, 0.541526, 0.602186", \ + "0.476956, 0.480476, 0.485796, 0.494616, 0.512046, 0.542866, 0.603526", \ + "0.478916, 0.482436, 0.487756, 0.496576, 0.514006, 0.544826, 0.605486", \ + "0.485186, 0.488706, 0.494026, 0.502846, 0.520276, 0.551096, 0.611756", \ + "0.488076, 0.491596, 0.496916, 0.505736, 0.523166, 0.553986, 0.614646", \ + "0.493926, 0.497446, 0.502766, 0.511586, 0.529016, 0.559836, 0.620496" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.504869, 0.507939, 0.512479, 0.519639, 0.533949, 0.558399, 0.606359", \ + "0.505349, 0.508419, 0.512959, 0.520119, 0.534429, 0.558879, 0.606839", \ + "0.506359, 0.509429, 0.513969, 0.521129, 0.535439, 0.559889, 0.607849", \ + "0.508329, 0.511399, 0.515939, 0.523099, 0.537409, 0.561859, 0.609819", \ + "0.514559, 0.517629, 0.522169, 0.529329, 0.543639, 0.568089, 0.616049", \ + "0.517649, 0.520719, 0.525259, 0.532419, 0.546729, 0.571179, 0.619139", \ + "0.524529, 0.527599, 0.532139, 0.539299, 0.553609, 0.578059, 0.626019" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.361999, 0.365089, 0.369909, 0.376999, 0.391379, 0.415819, 0.463989", \ + "0.362409, 0.365499, 0.370319, 0.377409, 0.391789, 0.416229, 0.464399", \ + "0.363529, 0.366619, 0.371439, 0.378529, 0.392909, 0.417349, 0.465519", \ + "0.365489, 0.368579, 0.373399, 0.380489, 0.394869, 0.419309, 0.467479", \ + "0.371909, 0.374999, 0.379819, 0.386909, 0.401289, 0.425729, 0.473899", \ + "0.374899, 0.377989, 0.382809, 0.389899, 0.404279, 0.428719, 0.476889", \ + "0.381779, 0.384869, 0.389689, 0.396779, 0.411159, 0.435599, 0.483769" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.486826, 0.490596, 0.496156, 0.504746, 0.522296, 0.553136, 0.614116", \ + "0.487626, 0.491396, 0.496956, 0.505546, 0.523096, 0.553936, 0.614916", \ + "0.488926, 0.492696, 0.498256, 0.506846, 0.524396, 0.555236, 0.616216", \ + "0.490546, 0.494316, 0.499876, 0.508466, 0.526016, 0.556856, 0.617836", \ + "0.497056, 0.500826, 0.506386, 0.514976, 0.532526, 0.563366, 0.624346", \ + "0.500046, 0.503816, 0.509376, 0.517966, 0.535516, 0.566356, 0.627336", \ + "0.506416, 0.510186, 0.515746, 0.524336, 0.541886, 0.572726, 0.633706" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.348391, 0.351911, 0.357231, 0.366051, 0.383481, 0.414301, 0.474961", \ + "0.348741, 0.352261, 0.357581, 0.366401, 0.383831, 0.414651, 0.475311", \ + "0.350081, 0.353601, 0.358921, 0.367741, 0.385171, 0.415991, 0.476651", \ + "0.352041, 0.355561, 0.360881, 0.369701, 0.387131, 0.417951, 0.478611", \ + "0.358311, 0.361831, 0.367151, 0.375971, 0.393401, 0.424221, 0.484881", \ + "0.361201, 0.364721, 0.370041, 0.378861, 0.396291, 0.427111, 0.487771", \ + "0.367051, 0.370571, 0.375891, 0.384711, 0.402141, 0.432961, 0.493621" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.504293, 0.507363, 0.511903, 0.519063, 0.533373, 0.557823, 0.605783", \ + "0.504773, 0.507843, 0.512383, 0.519543, 0.533853, 0.558303, 0.606263", \ + "0.505783, 0.508853, 0.513393, 0.520553, 0.534863, 0.559313, 0.607273", \ + "0.507753, 0.510823, 0.515363, 0.522523, 0.536833, 0.561283, 0.609243", \ + "0.513983, 0.517053, 0.521593, 0.528753, 0.543063, 0.567513, 0.615473", \ + "0.517073, 0.520143, 0.524683, 0.531843, 0.546153, 0.570603, 0.618563", \ + "0.523953, 0.527023, 0.531563, 0.538723, 0.553033, 0.577483, 0.625443" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.361527, 0.364617, 0.369437, 0.376527, 0.390907, 0.415347, 0.463517", \ + "0.361937, 0.365027, 0.369847, 0.376937, 0.391317, 0.415757, 0.463927", \ + "0.363057, 0.366147, 0.370967, 0.378057, 0.392437, 0.416877, 0.465047", \ + "0.365017, 0.368107, 0.372927, 0.380017, 0.394397, 0.418837, 0.467007", \ + "0.371437, 0.374527, 0.379347, 0.386437, 0.400817, 0.425257, 0.473427", \ + "0.374427, 0.377517, 0.382337, 0.389427, 0.403807, 0.428247, 0.476417", \ + "0.381307, 0.384397, 0.389217, 0.396307, 0.410687, 0.435127, 0.483297" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.486249, 0.490019, 0.495579, 0.504169, 0.521719, 0.552559, 0.613539", \ + "0.487049, 0.490819, 0.496379, 0.504969, 0.522519, 0.553359, 0.614339", \ + "0.488349, 0.492119, 0.497679, 0.506269, 0.523819, 0.554659, 0.615639", \ + "0.489969, 0.493739, 0.499299, 0.507889, 0.525439, 0.556279, 0.617259", \ + "0.496479, 0.500249, 0.505809, 0.514399, 0.531949, 0.562789, 0.623769", \ + "0.499469, 0.503239, 0.508799, 0.517389, 0.534939, 0.565779, 0.626759", \ + "0.505839, 0.509609, 0.515169, 0.523759, 0.541309, 0.572149, 0.633129" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.347919, 0.351439, 0.356759, 0.365579, 0.383009, 0.413829, 0.474489", \ + "0.348269, 0.351789, 0.357109, 0.365929, 0.383359, 0.414179, 0.474839", \ + "0.349609, 0.353129, 0.358449, 0.367269, 0.384699, 0.415519, 0.476179", \ + "0.351569, 0.355089, 0.360409, 0.369229, 0.386659, 0.417479, 0.478139", \ + "0.357839, 0.361359, 0.366679, 0.375499, 0.392929, 0.423749, 0.484409", \ + "0.360729, 0.364249, 0.369569, 0.378389, 0.395819, 0.426639, 0.487299", \ + "0.366579, 0.370099, 0.375419, 0.384239, 0.401669, 0.432489, 0.493149" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.505084, 0.508154, 0.512694, 0.519854, 0.534164, 0.558614, 0.606574", \ + "0.505564, 0.508634, 0.513174, 0.520334, 0.534644, 0.559094, 0.607054", \ + "0.506574, 0.509644, 0.514184, 0.521344, 0.535654, 0.560104, 0.608064", \ + "0.508544, 0.511614, 0.516154, 0.523314, 0.537624, 0.562074, 0.610034", \ + "0.514774, 0.517844, 0.522384, 0.529544, 0.543854, 0.568304, 0.616264", \ + "0.517864, 0.520934, 0.525474, 0.532634, 0.546944, 0.571394, 0.619354", \ + "0.524744, 0.527814, 0.532354, 0.539514, 0.553824, 0.578274, 0.626234" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.362175, 0.365265, 0.370085, 0.377175, 0.391555, 0.415995, 0.464165", \ + "0.362585, 0.365675, 0.370495, 0.377585, 0.391965, 0.416405, 0.464575", \ + "0.363705, 0.366795, 0.371615, 0.378705, 0.393085, 0.417525, 0.465695", \ + "0.365665, 0.368755, 0.373575, 0.380665, 0.395045, 0.419485, 0.467655", \ + "0.372085, 0.375175, 0.379995, 0.387085, 0.401465, 0.425905, 0.474075", \ + "0.375075, 0.378165, 0.382985, 0.390075, 0.404455, 0.428895, 0.477065", \ + "0.381955, 0.385045, 0.389865, 0.396955, 0.411335, 0.435775, 0.483945" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.487040, 0.490810, 0.496370, 0.504960, 0.522510, 0.553350, 0.614330", \ + "0.487840, 0.491610, 0.497170, 0.505760, 0.523310, 0.554150, 0.615130", \ + "0.489140, 0.492910, 0.498470, 0.507060, 0.524610, 0.555450, 0.616430", \ + "0.490760, 0.494530, 0.500090, 0.508680, 0.526230, 0.557070, 0.618050", \ + "0.497270, 0.501040, 0.506600, 0.515190, 0.532740, 0.563580, 0.624560", \ + "0.500260, 0.504030, 0.509590, 0.518180, 0.535730, 0.566570, 0.627550", \ + "0.506630, 0.510400, 0.515960, 0.524550, 0.542100, 0.572940, 0.633920" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.348567, 0.352087, 0.357407, 0.366227, 0.383657, 0.414477, 0.475137", \ + "0.348917, 0.352437, 0.357757, 0.366577, 0.384007, 0.414827, 0.475487", \ + "0.350257, 0.353777, 0.359097, 0.367917, 0.385347, 0.416167, 0.476827", \ + "0.352217, 0.355737, 0.361057, 0.369877, 0.387307, 0.418127, 0.478787", \ + "0.358487, 0.362007, 0.367327, 0.376147, 0.393577, 0.424397, 0.485057", \ + "0.361377, 0.364897, 0.370217, 0.379037, 0.396467, 0.427287, 0.487947", \ + "0.367227, 0.370747, 0.376067, 0.384887, 0.402317, 0.433137, 0.493797" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.505671, 0.508741, 0.513281, 0.520441, 0.534751, 0.559201, 0.607161", \ + "0.506151, 0.509221, 0.513761, 0.520921, 0.535231, 0.559681, 0.607641", \ + "0.507161, 0.510231, 0.514771, 0.521931, 0.536241, 0.560691, 0.608651", \ + "0.509131, 0.512201, 0.516741, 0.523901, 0.538211, 0.562661, 0.610621", \ + "0.515361, 0.518431, 0.522971, 0.530131, 0.544441, 0.568891, 0.616851", \ + "0.518451, 0.521521, 0.526061, 0.533221, 0.547531, 0.571981, 0.619941", \ + "0.525331, 0.528401, 0.532941, 0.540101, 0.554411, 0.578861, 0.626821" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.362657, 0.365747, 0.370567, 0.377657, 0.392037, 0.416477, 0.464647", \ + "0.363067, 0.366157, 0.370977, 0.378067, 0.392447, 0.416887, 0.465057", \ + "0.364187, 0.367277, 0.372097, 0.379187, 0.393567, 0.418007, 0.466177", \ + "0.366147, 0.369237, 0.374057, 0.381147, 0.395527, 0.419967, 0.468137", \ + "0.372567, 0.375657, 0.380477, 0.387567, 0.401947, 0.426387, 0.474557", \ + "0.375557, 0.378647, 0.383467, 0.390557, 0.404937, 0.429377, 0.477547", \ + "0.382437, 0.385527, 0.390347, 0.397437, 0.411817, 0.436257, 0.484427" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.487628, 0.491398, 0.496958, 0.505548, 0.523098, 0.553938, 0.614918", \ + "0.488428, 0.492198, 0.497758, 0.506348, 0.523898, 0.554738, 0.615718", \ + "0.489728, 0.493498, 0.499058, 0.507648, 0.525198, 0.556038, 0.617018", \ + "0.491348, 0.495118, 0.500678, 0.509268, 0.526818, 0.557658, 0.618638", \ + "0.497858, 0.501628, 0.507188, 0.515778, 0.533328, 0.564168, 0.625148", \ + "0.500848, 0.504618, 0.510178, 0.518768, 0.536318, 0.567158, 0.628138", \ + "0.507218, 0.510988, 0.516548, 0.525138, 0.542688, 0.573528, 0.634508" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.349049, 0.352569, 0.357889, 0.366709, 0.384139, 0.414959, 0.475619", \ + "0.349399, 0.352919, 0.358239, 0.367059, 0.384489, 0.415309, 0.475969", \ + "0.350739, 0.354259, 0.359579, 0.368399, 0.385829, 0.416649, 0.477309", \ + "0.352699, 0.356219, 0.361539, 0.370359, 0.387789, 0.418609, 0.479269", \ + "0.358969, 0.362489, 0.367809, 0.376629, 0.394059, 0.424879, 0.485539", \ + "0.361859, 0.365379, 0.370699, 0.379519, 0.396949, 0.427769, 0.488429", \ + "0.367709, 0.371229, 0.376549, 0.385369, 0.402799, 0.433619, 0.494279" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.546679, 0.549749, 0.554289, 0.561449, 0.575759, 0.600209, 0.648169", \ + "0.547159, 0.550229, 0.554769, 0.561929, 0.576239, 0.600689, 0.648649", \ + "0.548169, 0.551239, 0.555779, 0.562939, 0.577249, 0.601699, 0.649659", \ + "0.550139, 0.553209, 0.557749, 0.564909, 0.579219, 0.603669, 0.651629", \ + "0.556369, 0.559439, 0.563979, 0.571139, 0.585449, 0.609899, 0.657859", \ + "0.559459, 0.562529, 0.567069, 0.574229, 0.588539, 0.612989, 0.660949", \ + "0.566339, 0.569409, 0.573949, 0.581109, 0.595419, 0.619869, 0.667829" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.396270, 0.399360, 0.404180, 0.411270, 0.425650, 0.450090, 0.498260", \ + "0.396680, 0.399770, 0.404590, 0.411680, 0.426060, 0.450500, 0.498670", \ + "0.397800, 0.400890, 0.405710, 0.412800, 0.427180, 0.451620, 0.499790", \ + "0.399760, 0.402850, 0.407670, 0.414760, 0.429140, 0.453580, 0.501750", \ + "0.406180, 0.409270, 0.414090, 0.421180, 0.435560, 0.460000, 0.508170", \ + "0.409170, 0.412260, 0.417080, 0.424170, 0.438550, 0.462990, 0.511160", \ + "0.416050, 0.419140, 0.423960, 0.431050, 0.445430, 0.469870, 0.518040" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.528636, 0.532406, 0.537966, 0.546556, 0.564106, 0.594946, 0.655926", \ + "0.529436, 0.533206, 0.538766, 0.547356, 0.564906, 0.595746, 0.656726", \ + "0.530736, 0.534506, 0.540066, 0.548656, 0.566206, 0.597046, 0.658026", \ + "0.532356, 0.536126, 0.541686, 0.550276, 0.567826, 0.598666, 0.659646", \ + "0.538866, 0.542636, 0.548196, 0.556786, 0.574336, 0.605176, 0.666156", \ + "0.541856, 0.545626, 0.551186, 0.559776, 0.577326, 0.608166, 0.669146", \ + "0.548226, 0.551996, 0.557556, 0.566146, 0.583696, 0.614536, 0.675516" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.382672, 0.386192, 0.391512, 0.400332, 0.417762, 0.448582, 0.509242", \ + "0.383022, 0.386542, 0.391862, 0.400682, 0.418112, 0.448932, 0.509592", \ + "0.384362, 0.387882, 0.393202, 0.402022, 0.419452, 0.450272, 0.510932", \ + "0.386322, 0.389842, 0.395162, 0.403982, 0.421412, 0.452232, 0.512892", \ + "0.392592, 0.396112, 0.401432, 0.410252, 0.427682, 0.458502, 0.519162", \ + "0.395482, 0.399002, 0.404322, 0.413142, 0.430572, 0.461392, 0.522052", \ + "0.401332, 0.404852, 0.410172, 0.418992, 0.436422, 0.467242, 0.527902" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.583879, 0.586949, 0.591489, 0.598649, 0.612959, 0.637409, 0.685369", \ + "0.584359, 0.587429, 0.591969, 0.599129, 0.613439, 0.637889, 0.685849", \ + "0.585369, 0.588439, 0.592979, 0.600139, 0.614449, 0.638899, 0.686859", \ + "0.587339, 0.590409, 0.594949, 0.602109, 0.616419, 0.640869, 0.688829", \ + "0.593569, 0.596639, 0.601179, 0.608339, 0.622649, 0.647099, 0.695059", \ + "0.596659, 0.599729, 0.604269, 0.611429, 0.625739, 0.650189, 0.698149", \ + "0.603539, 0.606609, 0.611149, 0.618309, 0.632619, 0.657069, 0.705029" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.426780, 0.429870, 0.434690, 0.441780, 0.456160, 0.480600, 0.528770", \ + "0.427190, 0.430280, 0.435100, 0.442190, 0.456570, 0.481010, 0.529180", \ + "0.428310, 0.431400, 0.436220, 0.443310, 0.457690, 0.482130, 0.530300", \ + "0.430270, 0.433360, 0.438180, 0.445270, 0.459650, 0.484090, 0.532260", \ + "0.436690, 0.439780, 0.444600, 0.451690, 0.466070, 0.490510, 0.538680", \ + "0.439680, 0.442770, 0.447590, 0.454680, 0.469060, 0.493500, 0.541670", \ + "0.446560, 0.449650, 0.454470, 0.461560, 0.475940, 0.500380, 0.548550" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.565835, 0.569605, 0.575165, 0.583755, 0.601305, 0.632145, 0.693125", \ + "0.566635, 0.570405, 0.575965, 0.584555, 0.602105, 0.632945, 0.693925", \ + "0.567935, 0.571705, 0.577265, 0.585855, 0.603405, 0.634245, 0.695225", \ + "0.569555, 0.573325, 0.578885, 0.587475, 0.605025, 0.635865, 0.696845", \ + "0.576065, 0.579835, 0.585395, 0.593985, 0.611535, 0.642375, 0.703355", \ + "0.579055, 0.582825, 0.588385, 0.596975, 0.614525, 0.645365, 0.706345", \ + "0.585425, 0.589195, 0.594755, 0.603345, 0.620895, 0.651735, 0.712715" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.413172, 0.416692, 0.422012, 0.430832, 0.448262, 0.479082, 0.539742", \ + "0.413522, 0.417042, 0.422362, 0.431182, 0.448612, 0.479432, 0.540092", \ + "0.414862, 0.418382, 0.423702, 0.432522, 0.449952, 0.480772, 0.541432", \ + "0.416822, 0.420342, 0.425662, 0.434482, 0.451912, 0.482732, 0.543392", \ + "0.423092, 0.426612, 0.431932, 0.440752, 0.458182, 0.489002, 0.549662", \ + "0.425982, 0.429502, 0.434822, 0.443642, 0.461072, 0.491892, 0.552552", \ + "0.431832, 0.435352, 0.440672, 0.449492, 0.466922, 0.497742, 0.558402" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.622480, 0.625549, 0.630090, 0.637250, 0.651560, 0.676010, 0.723970", \ + "0.622959, 0.626030, 0.630569, 0.637730, 0.652040, 0.676489, 0.724449", \ + "0.623970, 0.627039, 0.631580, 0.638740, 0.653050, 0.677500, 0.725460", \ + "0.625940, 0.629009, 0.633549, 0.640710, 0.655020, 0.679470, 0.727430", \ + "0.632170, 0.635240, 0.639780, 0.646939, 0.661250, 0.685700, 0.733660", \ + "0.635260, 0.638329, 0.642869, 0.650030, 0.664340, 0.688790, 0.736750", \ + "0.642140, 0.645209, 0.649749, 0.656910, 0.671220, 0.695670, 0.743630" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.458429, 0.461519, 0.466339, 0.473429, 0.487809, 0.512249, 0.560419", \ + "0.458839, 0.461929, 0.466749, 0.473839, 0.488219, 0.512659, 0.560829", \ + "0.459959, 0.463049, 0.467869, 0.474959, 0.489339, 0.513779, 0.561949", \ + "0.461919, 0.465009, 0.469829, 0.476919, 0.491299, 0.515739, 0.563909", \ + "0.468339, 0.471429, 0.476249, 0.483339, 0.497719, 0.522159, 0.570329", \ + "0.471329, 0.474419, 0.479239, 0.486329, 0.500709, 0.525149, 0.573319", \ + "0.478209, 0.481299, 0.486119, 0.493209, 0.507589, 0.532029, 0.580199" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.604436, 0.608206, 0.613766, 0.622356, 0.639906, 0.670746, 0.731726", \ + "0.605236, 0.609006, 0.614566, 0.623156, 0.640706, 0.671546, 0.732526", \ + "0.606536, 0.610306, 0.615866, 0.624456, 0.642006, 0.672846, 0.733826", \ + "0.608156, 0.611926, 0.617486, 0.626076, 0.643626, 0.674466, 0.735446", \ + "0.614666, 0.618436, 0.623996, 0.632586, 0.650136, 0.680976, 0.741956", \ + "0.617656, 0.621426, 0.626986, 0.635576, 0.653126, 0.683966, 0.744946", \ + "0.624026, 0.627796, 0.633356, 0.641946, 0.659496, 0.690336, 0.751316" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.444821, 0.448341, 0.453661, 0.462481, 0.479911, 0.510731, 0.571391", \ + "0.445171, 0.448691, 0.454011, 0.462831, 0.480261, 0.511081, 0.571741", \ + "0.446511, 0.450031, 0.455351, 0.464171, 0.481601, 0.512421, 0.573081", \ + "0.448471, 0.451991, 0.457311, 0.466131, 0.483561, 0.514381, 0.575041", \ + "0.454741, 0.458261, 0.463581, 0.472401, 0.489831, 0.520651, 0.581311", \ + "0.457631, 0.461151, 0.466471, 0.475291, 0.492721, 0.523541, 0.584201", \ + "0.463481, 0.467001, 0.472321, 0.481141, 0.498571, 0.529391, 0.590051" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.659611, 0.662681, 0.667221, 0.674381, 0.688691, 0.713141, 0.761101", \ + "0.660091, 0.663161, 0.667701, 0.674861, 0.689171, 0.713621, 0.761581", \ + "0.661101, 0.664171, 0.668711, 0.675871, 0.690181, 0.714631, 0.762591", \ + "0.663071, 0.666141, 0.670681, 0.677841, 0.692151, 0.716601, 0.764561", \ + "0.669301, 0.672371, 0.676911, 0.684071, 0.698381, 0.722831, 0.770791", \ + "0.672391, 0.675461, 0.680001, 0.687161, 0.701471, 0.725921, 0.773881", \ + "0.679271, 0.682341, 0.686881, 0.694041, 0.708351, 0.732801, 0.780761" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.488865, 0.491955, 0.496775, 0.503865, 0.518245, 0.542685, 0.590855", \ + "0.489275, 0.492365, 0.497185, 0.504275, 0.518655, 0.543095, 0.591265", \ + "0.490395, 0.493485, 0.498305, 0.505395, 0.519775, 0.544215, 0.592385", \ + "0.492355, 0.495445, 0.500265, 0.507355, 0.521735, 0.546175, 0.594345", \ + "0.498775, 0.501865, 0.506685, 0.513775, 0.528155, 0.552595, 0.600765", \ + "0.501765, 0.504855, 0.509675, 0.516765, 0.531145, 0.555585, 0.603755", \ + "0.508645, 0.511735, 0.516555, 0.523645, 0.538025, 0.562465, 0.610635" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.641568, 0.645338, 0.650898, 0.659488, 0.677038, 0.707878, 0.768858", \ + "0.642368, 0.646138, 0.651698, 0.660288, 0.677838, 0.708678, 0.769658", \ + "0.643668, 0.647438, 0.652998, 0.661588, 0.679138, 0.709978, 0.770958", \ + "0.645288, 0.649058, 0.654618, 0.663208, 0.680758, 0.711598, 0.772578", \ + "0.651798, 0.655568, 0.661128, 0.669718, 0.687268, 0.718108, 0.779088", \ + "0.654788, 0.658558, 0.664118, 0.672708, 0.690258, 0.721098, 0.782078", \ + "0.661158, 0.664928, 0.670488, 0.679078, 0.696628, 0.727468, 0.788448" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.475266, 0.478786, 0.484106, 0.492926, 0.510356, 0.541176, 0.601836", \ + "0.475616, 0.479136, 0.484456, 0.493276, 0.510706, 0.541526, 0.602186", \ + "0.476956, 0.480476, 0.485796, 0.494616, 0.512046, 0.542866, 0.603526", \ + "0.478916, 0.482436, 0.487756, 0.496576, 0.514006, 0.544826, 0.605486", \ + "0.485186, 0.488706, 0.494026, 0.502846, 0.520276, 0.551096, 0.611756", \ + "0.488076, 0.491596, 0.496916, 0.505736, 0.523166, 0.553986, 0.614646", \ + "0.493926, 0.497446, 0.502766, 0.511586, 0.529016, 0.559836, 0.620496" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013734, 0.014267, 0.014281, 0.014295, 0.014310, 0.014324, 0.014338", \ + "0.013748, 0.014281, 0.014295, 0.014310, 0.014324, 0.014338, 0.014353", \ + "0.013762, 0.014295, 0.014310, 0.014324, 0.014338, 0.014353, 0.014367", \ + "0.013775, 0.014310, 0.014324, 0.014338, 0.014353, 0.014367, 0.014381", \ + "0.013789, 0.014324, 0.014338, 0.014353, 0.014367, 0.014381, 0.014396", \ + "0.014205, 0.014737, 0.014752, 0.014767, 0.014782, 0.014796, 0.014811", \ + "0.014219, 0.014752, 0.014767, 0.014782, 0.014796, 0.014811, 0.014826" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.008956, 0.009213, 0.009222, 0.009231, 0.009240, 0.009250, 0.009259", \ + "0.009094, 0.009352, 0.009361, 0.009370, 0.009380, 0.009389, 0.009398", \ + "0.009419, 0.009676, 0.009685, 0.009695, 0.009705, 0.009714, 0.009724", \ + "0.009428, 0.009685, 0.009695, 0.009705, 0.009714, 0.009724, 0.009734", \ + "0.009437, 0.009695, 0.009705, 0.009714, 0.009724, 0.009734, 0.009744", \ + "0.009447, 0.009705, 0.009714, 0.009724, 0.009734, 0.009744, 0.009753", \ + "0.009456, 0.009714, 0.009724, 0.009734, 0.009744, 0.009753, 0.009763" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013734, 0.014267, 0.014281, 0.014295, 0.014310, 0.014324, 0.014338", \ + "0.013748, 0.014281, 0.014295, 0.014310, 0.014324, 0.014338, 0.014353", \ + "0.013762, 0.014295, 0.014310, 0.014324, 0.014338, 0.014353, 0.014367", \ + "0.013775, 0.014310, 0.014324, 0.014338, 0.014353, 0.014367, 0.014381", \ + "0.013789, 0.014324, 0.014338, 0.014353, 0.014367, 0.014381, 0.014396", \ + "0.014205, 0.014737, 0.014752, 0.014767, 0.014782, 0.014796, 0.014811", \ + "0.014219, 0.014752, 0.014767, 0.014782, 0.014796, 0.014811, 0.014826" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.008956, 0.009213, 0.009222, 0.009231, 0.009240, 0.009250, 0.009259", \ + "0.009094, 0.009352, 0.009361, 0.009370, 0.009380, 0.009389, 0.009398", \ + "0.009419, 0.009676, 0.009685, 0.009695, 0.009705, 0.009714, 0.009724", \ + "0.009428, 0.009685, 0.009695, 0.009705, 0.009714, 0.009724, 0.009734", \ + "0.009437, 0.009695, 0.009705, 0.009714, 0.009724, 0.009734, 0.009744", \ + "0.009447, 0.009705, 0.009714, 0.009724, 0.009734, 0.009744, 0.009753", \ + "0.009456, 0.009714, 0.009724, 0.009734, 0.009744, 0.009753, 0.009763" \ + ); + } + } + } + bus(SOA) { + bus_type : rf2_32x128_wm1_SOA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.522801, 0.524501, 0.526321, 0.531111, 0.545221, 0.568701, 0.615711", \ + "0.523171, 0.524871, 0.526691, 0.531481, 0.545591, 0.569071, 0.616081", \ + "0.523911, 0.525611, 0.527431, 0.532221, 0.546331, 0.569811, 0.616821", \ + "0.526101, 0.527801, 0.529621, 0.534411, 0.548521, 0.572001, 0.619011", \ + "0.532481, 0.534181, 0.536001, 0.540791, 0.554901, 0.578381, 0.625391", \ + "0.535581, 0.537281, 0.539101, 0.543891, 0.558001, 0.581481, 0.628491", \ + "0.542411, 0.544111, 0.545931, 0.550721, 0.564831, 0.588311, 0.635321" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.422383, 0.424583, 0.426253, 0.431043, 0.445093, 0.468383, 0.515333", \ + "0.422973, 0.425173, 0.426843, 0.431633, 0.445683, 0.468973, 0.515923", \ + "0.423943, 0.426143, 0.427813, 0.432603, 0.446653, 0.469943, 0.516893", \ + "0.426083, 0.428283, 0.429953, 0.434743, 0.448793, 0.472083, 0.519033", \ + "0.432123, 0.434323, 0.435993, 0.440783, 0.454833, 0.478123, 0.525073", \ + "0.435713, 0.437913, 0.439583, 0.444373, 0.458423, 0.481713, 0.528663", \ + "0.442543, 0.444743, 0.446413, 0.451203, 0.465253, 0.488543, 0.535493" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.508384, 0.511064, 0.513604, 0.520464, 0.541374, 0.575944, 0.645374", \ + "0.508884, 0.511564, 0.514104, 0.520964, 0.541874, 0.576444, 0.645874", \ + "0.510194, 0.512874, 0.515414, 0.522274, 0.543184, 0.577754, 0.647184", \ + "0.512104, 0.514784, 0.517324, 0.524184, 0.545094, 0.579664, 0.649094", \ + "0.518474, 0.521154, 0.523694, 0.530554, 0.551464, 0.586034, 0.655464", \ + "0.521334, 0.524014, 0.526554, 0.533414, 0.554324, 0.588894, 0.658324", \ + "0.527974, 0.530654, 0.533194, 0.540054, 0.560964, 0.595534, 0.664964" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.406628, 0.409398, 0.411778, 0.418908, 0.439528, 0.474228, 0.543638", \ + "0.407188, 0.409958, 0.412338, 0.419468, 0.440088, 0.474788, 0.544198", \ + "0.408248, 0.411018, 0.413398, 0.420528, 0.441148, 0.475848, 0.545258", \ + "0.410288, 0.413058, 0.415438, 0.422568, 0.443188, 0.477888, 0.547298", \ + "0.416568, 0.419338, 0.421718, 0.428848, 0.449468, 0.484168, 0.553578", \ + "0.419468, 0.422238, 0.424618, 0.431748, 0.452368, 0.487068, 0.556478", \ + "0.425468, 0.428238, 0.430618, 0.437748, 0.458368, 0.493068, 0.562478" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.522225, 0.523925, 0.525745, 0.530535, 0.544645, 0.568125, 0.615135", \ + "0.522595, 0.524295, 0.526115, 0.530905, 0.545015, 0.568495, 0.615505", \ + "0.523335, 0.525035, 0.526855, 0.531645, 0.545755, 0.569235, 0.616245", \ + "0.525525, 0.527225, 0.529045, 0.533835, 0.547945, 0.571425, 0.618435", \ + "0.531905, 0.533605, 0.535425, 0.540215, 0.554325, 0.577805, 0.624815", \ + "0.535005, 0.536705, 0.538525, 0.543315, 0.557425, 0.580905, 0.627915", \ + "0.541835, 0.543535, 0.545355, 0.550145, 0.564255, 0.587735, 0.634745" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.421910, 0.424110, 0.425780, 0.430570, 0.444620, 0.467910, 0.514860", \ + "0.422500, 0.424700, 0.426370, 0.431160, 0.445210, 0.468500, 0.515450", \ + "0.423470, 0.425670, 0.427340, 0.432130, 0.446180, 0.469470, 0.516420", \ + "0.425610, 0.427810, 0.429480, 0.434270, 0.448320, 0.471610, 0.518560", \ + "0.431650, 0.433850, 0.435520, 0.440310, 0.454360, 0.477650, 0.524600", \ + "0.435240, 0.437440, 0.439110, 0.443900, 0.457950, 0.481240, 0.528190", \ + "0.442070, 0.444270, 0.445940, 0.450730, 0.464780, 0.488070, 0.535020" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.507797, 0.510477, 0.513017, 0.519877, 0.540787, 0.575357, 0.644787", \ + "0.508297, 0.510977, 0.513517, 0.520377, 0.541287, 0.575857, 0.645287", \ + "0.509607, 0.512287, 0.514827, 0.521687, 0.542597, 0.577167, 0.646597", \ + "0.511517, 0.514197, 0.516737, 0.523597, 0.544507, 0.579077, 0.648507", \ + "0.517887, 0.520567, 0.523107, 0.529967, 0.550877, 0.585447, 0.654877", \ + "0.520747, 0.523427, 0.525967, 0.532827, 0.553737, 0.588307, 0.657737", \ + "0.527387, 0.530067, 0.532607, 0.539467, 0.560377, 0.594947, 0.664377" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.406156, 0.408926, 0.411306, 0.418436, 0.439056, 0.473756, 0.543166", \ + "0.406716, 0.409486, 0.411866, 0.418996, 0.439616, 0.474316, 0.543726", \ + "0.407776, 0.410546, 0.412926, 0.420056, 0.440676, 0.475376, 0.544786", \ + "0.409815, 0.412586, 0.414966, 0.422096, 0.442716, 0.477416, 0.546826", \ + "0.416096, 0.418866, 0.421246, 0.428376, 0.448995, 0.483696, 0.553106", \ + "0.418996, 0.421766, 0.424146, 0.431276, 0.451896, 0.486596, 0.556006", \ + "0.424996, 0.427766, 0.430146, 0.437276, 0.457896, 0.492596, 0.562006" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.523027, 0.524727, 0.526547, 0.531337, 0.545447, 0.568927, 0.615937", \ + "0.523397, 0.525097, 0.526917, 0.531707, 0.545817, 0.569297, 0.616307", \ + "0.524137, 0.525837, 0.527657, 0.532447, 0.546557, 0.570037, 0.617047", \ + "0.526327, 0.528027, 0.529847, 0.534637, 0.548747, 0.572227, 0.619237", \ + "0.532707, 0.534407, 0.536227, 0.541017, 0.555127, 0.578607, 0.625617", \ + "0.535807, 0.537507, 0.539327, 0.544117, 0.558227, 0.581707, 0.628717", \ + "0.542637, 0.544337, 0.546157, 0.550947, 0.565057, 0.588537, 0.635547" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.422559, 0.424759, 0.426429, 0.431219, 0.445269, 0.468559, 0.515509", \ + "0.423149, 0.425349, 0.427019, 0.431809, 0.445859, 0.469149, 0.516099", \ + "0.424119, 0.426319, 0.427989, 0.432779, 0.446829, 0.470119, 0.517069", \ + "0.426259, 0.428459, 0.430129, 0.434919, 0.448969, 0.472259, 0.519209", \ + "0.432299, 0.434499, 0.436169, 0.440959, 0.455009, 0.478299, 0.525249", \ + "0.435889, 0.438089, 0.439759, 0.444549, 0.458599, 0.481889, 0.528839", \ + "0.442719, 0.444919, 0.446589, 0.451379, 0.465429, 0.488719, 0.535669" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.508599, 0.511279, 0.513819, 0.520679, 0.541589, 0.576159, 0.645589", \ + "0.509099, 0.511779, 0.514319, 0.521179, 0.542089, 0.576659, 0.646089", \ + "0.510409, 0.513089, 0.515629, 0.522489, 0.543399, 0.577969, 0.647399", \ + "0.512319, 0.514999, 0.517539, 0.524399, 0.545309, 0.579879, 0.649309", \ + "0.518689, 0.521369, 0.523909, 0.530769, 0.551679, 0.586249, 0.655679", \ + "0.521549, 0.524229, 0.526769, 0.533629, 0.554539, 0.589109, 0.658539", \ + "0.528189, 0.530869, 0.533409, 0.540269, 0.561179, 0.595749, 0.665179" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.406804, 0.409574, 0.411954, 0.419084, 0.439704, 0.474404, 0.543814", \ + "0.407364, 0.410134, 0.412514, 0.419644, 0.440264, 0.474964, 0.544374", \ + "0.408424, 0.411194, 0.413574, 0.420704, 0.441324, 0.476024, 0.545434", \ + "0.410464, 0.413234, 0.415614, 0.422744, 0.443364, 0.478064, 0.547474", \ + "0.416744, 0.419514, 0.421894, 0.429024, 0.449644, 0.484344, 0.553754", \ + "0.419644, 0.422414, 0.424794, 0.431924, 0.452544, 0.487244, 0.556654", \ + "0.425644, 0.428414, 0.430794, 0.437924, 0.458544, 0.493244, 0.562654" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.523603, 0.525303, 0.527123, 0.531913, 0.546023, 0.569503, 0.616513", \ + "0.523973, 0.525673, 0.527493, 0.532283, 0.546393, 0.569873, 0.616883", \ + "0.524713, 0.526413, 0.528233, 0.533023, 0.547133, 0.570613, 0.617623", \ + "0.526903, 0.528603, 0.530423, 0.535213, 0.549323, 0.572803, 0.619813", \ + "0.533283, 0.534983, 0.536803, 0.541593, 0.555703, 0.579183, 0.626193", \ + "0.536383, 0.538083, 0.539903, 0.544693, 0.558803, 0.582283, 0.629293", \ + "0.543213, 0.544913, 0.546733, 0.551523, 0.565633, 0.589113, 0.636123" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.423040, 0.425240, 0.426910, 0.431700, 0.445750, 0.469040, 0.515990", \ + "0.423630, 0.425830, 0.427500, 0.432290, 0.446340, 0.469630, 0.516580", \ + "0.424600, 0.426800, 0.428470, 0.433260, 0.447310, 0.470600, 0.517550", \ + "0.426740, 0.428940, 0.430610, 0.435400, 0.449450, 0.472740, 0.519690", \ + "0.432780, 0.434980, 0.436650, 0.441440, 0.455490, 0.478780, 0.525730", \ + "0.436370, 0.438570, 0.440240, 0.445030, 0.459080, 0.482370, 0.529320", \ + "0.443200, 0.445400, 0.447070, 0.451860, 0.465910, 0.489200, 0.536150" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.509175, 0.511855, 0.514395, 0.521255, 0.542165, 0.576735, 0.646165", \ + "0.509675, 0.512355, 0.514895, 0.521755, 0.542665, 0.577235, 0.646665", \ + "0.510985, 0.513665, 0.516205, 0.523065, 0.543975, 0.578545, 0.647975", \ + "0.512895, 0.515575, 0.518115, 0.524975, 0.545885, 0.580455, 0.649885", \ + "0.519265, 0.521945, 0.524485, 0.531345, 0.552255, 0.586825, 0.656255", \ + "0.522125, 0.524805, 0.527345, 0.534205, 0.555115, 0.589685, 0.659115", \ + "0.528765, 0.531445, 0.533985, 0.540845, 0.561755, 0.596325, 0.665755" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.407277, 0.410047, 0.412427, 0.419557, 0.440177, 0.474877, 0.544287", \ + "0.407837, 0.410607, 0.412987, 0.420117, 0.440737, 0.475437, 0.544847", \ + "0.408897, 0.411667, 0.414047, 0.421177, 0.441797, 0.476497, 0.545907", \ + "0.410937, 0.413707, 0.416087, 0.423217, 0.443837, 0.478537, 0.547947", \ + "0.417217, 0.419987, 0.422367, 0.429497, 0.450117, 0.484817, 0.554227", \ + "0.420117, 0.422887, 0.425267, 0.432397, 0.453017, 0.487717, 0.557127", \ + "0.426117, 0.428887, 0.431267, 0.438397, 0.459017, 0.493717, 0.563127" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.564611, 0.566311, 0.568131, 0.572921, 0.587031, 0.610511, 0.657521", \ + "0.564981, 0.566681, 0.568501, 0.573291, 0.587401, 0.610881, 0.657891", \ + "0.565721, 0.567421, 0.569241, 0.574031, 0.588141, 0.611621, 0.658631", \ + "0.567911, 0.569611, 0.571431, 0.576221, 0.590331, 0.613811, 0.660821", \ + "0.574291, 0.575991, 0.577811, 0.582601, 0.596711, 0.620191, 0.667201", \ + "0.577391, 0.579091, 0.580911, 0.585701, 0.599811, 0.623291, 0.670301", \ + "0.584221, 0.585921, 0.587741, 0.592531, 0.606641, 0.630121, 0.677131" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.456663, 0.458863, 0.460533, 0.465323, 0.479373, 0.502663, 0.549613", \ + "0.457253, 0.459453, 0.461123, 0.465913, 0.479963, 0.503253, 0.550203", \ + "0.458223, 0.460423, 0.462093, 0.466883, 0.480933, 0.504223, 0.551173", \ + "0.460363, 0.462563, 0.464233, 0.469023, 0.483073, 0.506363, 0.553313", \ + "0.466403, 0.468603, 0.470273, 0.475063, 0.489113, 0.512403, 0.559353", \ + "0.469993, 0.472193, 0.473863, 0.478653, 0.492703, 0.515993, 0.562943", \ + "0.476823, 0.479023, 0.480693, 0.485483, 0.499533, 0.522823, 0.569773" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.550183, 0.552863, 0.555403, 0.562263, 0.583173, 0.617743, 0.687173", \ + "0.550683, 0.553363, 0.555903, 0.562763, 0.583673, 0.618243, 0.687673", \ + "0.551993, 0.554673, 0.557213, 0.564073, 0.584983, 0.619553, 0.688983", \ + "0.553903, 0.556583, 0.559123, 0.565983, 0.586893, 0.621463, 0.690893", \ + "0.560273, 0.562953, 0.565493, 0.572353, 0.593263, 0.627833, 0.697263", \ + "0.563133, 0.565813, 0.568353, 0.575213, 0.596123, 0.630693, 0.700123", \ + "0.569773, 0.572453, 0.574993, 0.581853, 0.602763, 0.637333, 0.706763" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.440899, 0.443669, 0.446049, 0.453179, 0.473799, 0.508499, 0.577909", \ + "0.441459, 0.444229, 0.446609, 0.453739, 0.474359, 0.509059, 0.578469", \ + "0.442519, 0.445289, 0.447669, 0.454799, 0.475419, 0.510119, 0.579529", \ + "0.444559, 0.447329, 0.449709, 0.456839, 0.477459, 0.512159, 0.581569", \ + "0.450839, 0.453609, 0.455989, 0.463119, 0.483739, 0.518439, 0.587849", \ + "0.453739, 0.456509, 0.458889, 0.466019, 0.486639, 0.521339, 0.590749", \ + "0.459739, 0.462509, 0.464889, 0.472019, 0.492639, 0.527339, 0.596749" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.601811, 0.603511, 0.605331, 0.610121, 0.624231, 0.647711, 0.694721", \ + "0.602181, 0.603881, 0.605701, 0.610491, 0.624601, 0.648081, 0.695091", \ + "0.602921, 0.604621, 0.606441, 0.611231, 0.625341, 0.648821, 0.695831", \ + "0.605111, 0.606811, 0.608631, 0.613421, 0.627531, 0.651011, 0.698021", \ + "0.611491, 0.613191, 0.615011, 0.619801, 0.633911, 0.657391, 0.704401", \ + "0.614591, 0.616291, 0.618111, 0.622901, 0.637011, 0.660491, 0.707501", \ + "0.621421, 0.623121, 0.624941, 0.629731, 0.643841, 0.667321, 0.714331" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.487163, 0.489363, 0.491033, 0.495823, 0.509873, 0.533163, 0.580113", \ + "0.487753, 0.489953, 0.491623, 0.496413, 0.510463, 0.533753, 0.580703", \ + "0.488723, 0.490923, 0.492593, 0.497383, 0.511433, 0.534723, 0.581673", \ + "0.490863, 0.493063, 0.494733, 0.499523, 0.513573, 0.536863, 0.583813", \ + "0.496903, 0.499103, 0.500773, 0.505563, 0.519613, 0.542903, 0.589853", \ + "0.500493, 0.502693, 0.504363, 0.509153, 0.523203, 0.546493, 0.593443", \ + "0.507323, 0.509523, 0.511193, 0.515983, 0.530033, 0.553323, 0.600273" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.587394, 0.590074, 0.592614, 0.599474, 0.620384, 0.654954, 0.724384", \ + "0.587894, 0.590574, 0.593114, 0.599974, 0.620884, 0.655454, 0.724884", \ + "0.589204, 0.591884, 0.594424, 0.601284, 0.622194, 0.656764, 0.726194", \ + "0.591114, 0.593794, 0.596334, 0.603194, 0.624104, 0.658674, 0.728104", \ + "0.597484, 0.600164, 0.602704, 0.609564, 0.630474, 0.665044, 0.734474", \ + "0.600344, 0.603024, 0.605564, 0.612424, 0.633334, 0.667904, 0.737334", \ + "0.606984, 0.609664, 0.612204, 0.619064, 0.639974, 0.674544, 0.743974" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.471409, 0.474179, 0.476559, 0.483689, 0.504309, 0.539009, 0.608419", \ + "0.471969, 0.474739, 0.477119, 0.484249, 0.504869, 0.539569, 0.608979", \ + "0.473029, 0.475799, 0.478179, 0.485309, 0.505929, 0.540629, 0.610039", \ + "0.475069, 0.477839, 0.480219, 0.487349, 0.507969, 0.542669, 0.612079", \ + "0.481349, 0.484119, 0.486499, 0.493629, 0.514249, 0.548949, 0.618359", \ + "0.484249, 0.487019, 0.489399, 0.496529, 0.517149, 0.551849, 0.621259", \ + "0.490249, 0.493019, 0.495399, 0.502529, 0.523149, 0.557849, 0.627259" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.640411, 0.642111, 0.643931, 0.648721, 0.662831, 0.686311, 0.733321", \ + "0.640781, 0.642481, 0.644301, 0.649091, 0.663201, 0.686681, 0.733691", \ + "0.641521, 0.643221, 0.645041, 0.649831, 0.663941, 0.687421, 0.734431", \ + "0.643711, 0.645411, 0.647231, 0.652021, 0.666131, 0.689611, 0.736621", \ + "0.650091, 0.651791, 0.653611, 0.658401, 0.672511, 0.695991, 0.743001", \ + "0.653191, 0.654891, 0.656711, 0.661501, 0.675611, 0.699091, 0.746101", \ + "0.660021, 0.661721, 0.663541, 0.668331, 0.682441, 0.705921, 0.752931" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.518813, 0.521013, 0.522683, 0.527473, 0.541523, 0.564813, 0.611763", \ + "0.519403, 0.521603, 0.523273, 0.528063, 0.542113, 0.565403, 0.612353", \ + "0.520373, 0.522573, 0.524243, 0.529033, 0.543083, 0.566373, 0.613323", \ + "0.522513, 0.524713, 0.526383, 0.531173, 0.545223, 0.568513, 0.615463", \ + "0.528553, 0.530753, 0.532423, 0.537213, 0.551263, 0.574553, 0.621503", \ + "0.532143, 0.534343, 0.536013, 0.540803, 0.554853, 0.578143, 0.625093", \ + "0.538973, 0.541173, 0.542843, 0.547633, 0.561683, 0.584973, 0.631923" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.625983, 0.628663, 0.631203, 0.638063, 0.658973, 0.693543, 0.762973", \ + "0.626483, 0.629163, 0.631703, 0.638563, 0.659473, 0.694043, 0.763473", \ + "0.627793, 0.630473, 0.633013, 0.639873, 0.660783, 0.695353, 0.764783", \ + "0.629703, 0.632383, 0.634923, 0.641783, 0.662693, 0.697263, 0.766693", \ + "0.636073, 0.638753, 0.641293, 0.648153, 0.669063, 0.703633, 0.773063", \ + "0.638933, 0.641613, 0.644153, 0.651013, 0.671923, 0.706493, 0.775923", \ + "0.645573, 0.648253, 0.650793, 0.657653, 0.678563, 0.713133, 0.782563" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.503049, 0.505819, 0.508199, 0.515329, 0.535949, 0.570649, 0.640059", \ + "0.503609, 0.506379, 0.508759, 0.515889, 0.536509, 0.571209, 0.640619", \ + "0.504669, 0.507439, 0.509819, 0.516949, 0.537569, 0.572269, 0.641679", \ + "0.506709, 0.509479, 0.511859, 0.518989, 0.539609, 0.574309, 0.643719", \ + "0.512989, 0.515759, 0.518139, 0.525269, 0.545889, 0.580589, 0.649999", \ + "0.515889, 0.518659, 0.521039, 0.528169, 0.548789, 0.583489, 0.652899", \ + "0.521889, 0.524659, 0.527039, 0.534169, 0.554789, 0.589489, 0.658899" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.677543, 0.679243, 0.681063, 0.685853, 0.699963, 0.723443, 0.770453", \ + "0.677913, 0.679613, 0.681433, 0.686223, 0.700333, 0.723813, 0.770823", \ + "0.678653, 0.680353, 0.682173, 0.686963, 0.701073, 0.724553, 0.771563", \ + "0.680843, 0.682543, 0.684363, 0.689153, 0.703263, 0.726743, 0.773753", \ + "0.687223, 0.688923, 0.690743, 0.695533, 0.709643, 0.733123, 0.780133", \ + "0.690323, 0.692023, 0.693843, 0.698633, 0.712743, 0.736223, 0.783233", \ + "0.697153, 0.698853, 0.700673, 0.705463, 0.719573, 0.743053, 0.790063" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.549258, 0.551458, 0.553128, 0.557918, 0.571968, 0.595258, 0.642208", \ + "0.549848, 0.552048, 0.553718, 0.558508, 0.572558, 0.595848, 0.642798", \ + "0.550818, 0.553018, 0.554688, 0.559478, 0.573528, 0.596818, 0.643768", \ + "0.552958, 0.555158, 0.556828, 0.561618, 0.575668, 0.598958, 0.645908", \ + "0.558998, 0.561198, 0.562868, 0.567658, 0.581708, 0.604998, 0.651948", \ + "0.562588, 0.564788, 0.566458, 0.571248, 0.585298, 0.608588, 0.655538", \ + "0.569418, 0.571618, 0.573288, 0.578078, 0.592128, 0.615418, 0.662368" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.663115, 0.665795, 0.668335, 0.675195, 0.696105, 0.730675, 0.800105", \ + "0.663615, 0.666295, 0.668835, 0.675695, 0.696605, 0.731175, 0.800605", \ + "0.664925, 0.667605, 0.670145, 0.677005, 0.697915, 0.732485, 0.801915", \ + "0.666835, 0.669515, 0.672055, 0.678915, 0.699825, 0.734395, 0.803825", \ + "0.673205, 0.675885, 0.678425, 0.685285, 0.706195, 0.740765, 0.810195", \ + "0.676065, 0.678745, 0.681285, 0.688145, 0.709055, 0.743625, 0.813055", \ + "0.682705, 0.685385, 0.687925, 0.694785, 0.715695, 0.750265, 0.819695" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.533494, 0.536264, 0.538644, 0.545774, 0.566394, 0.601094, 0.670504", \ + "0.534054, 0.536824, 0.539204, 0.546334, 0.566954, 0.601654, 0.671064", \ + "0.535114, 0.537884, 0.540264, 0.547394, 0.568014, 0.602714, 0.672124", \ + "0.537154, 0.539924, 0.542304, 0.549434, 0.570054, 0.604754, 0.674164", \ + "0.543434, 0.546204, 0.548584, 0.555714, 0.576334, 0.611034, 0.680444", \ + "0.546334, 0.549104, 0.551484, 0.558614, 0.579234, 0.613934, 0.683344", \ + "0.552334, 0.555104, 0.557484, 0.564614, 0.585234, 0.619934, 0.689344" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.522801, 0.524501, 0.526321, 0.531111, 0.545221, 0.568701, 0.615711", \ + "0.523171, 0.524871, 0.526691, 0.531481, 0.545591, 0.569071, 0.616081", \ + "0.523911, 0.525611, 0.527431, 0.532221, 0.546331, 0.569811, 0.616821", \ + "0.526101, 0.527801, 0.529621, 0.534411, 0.548521, 0.572001, 0.619011", \ + "0.532481, 0.534181, 0.536001, 0.540791, 0.554901, 0.578381, 0.625391", \ + "0.535581, 0.537281, 0.539101, 0.543891, 0.558001, 0.581481, 0.628491", \ + "0.542411, 0.544111, 0.545931, 0.550721, 0.564831, 0.588311, 0.635321" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.422383, 0.424583, 0.426253, 0.431043, 0.445093, 0.468383, 0.515333", \ + "0.422973, 0.425173, 0.426843, 0.431633, 0.445683, 0.468973, 0.515923", \ + "0.423943, 0.426143, 0.427813, 0.432603, 0.446653, 0.469943, 0.516893", \ + "0.426083, 0.428283, 0.429953, 0.434743, 0.448793, 0.472083, 0.519033", \ + "0.432123, 0.434323, 0.435993, 0.440783, 0.454833, 0.478123, 0.525073", \ + "0.435713, 0.437913, 0.439583, 0.444373, 0.458423, 0.481713, 0.528663", \ + "0.442543, 0.444743, 0.446413, 0.451203, 0.465253, 0.488543, 0.535493" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.508384, 0.511064, 0.513604, 0.520464, 0.541374, 0.575944, 0.645374", \ + "0.508884, 0.511564, 0.514104, 0.520964, 0.541874, 0.576444, 0.645874", \ + "0.510194, 0.512874, 0.515414, 0.522274, 0.543184, 0.577754, 0.647184", \ + "0.512104, 0.514784, 0.517324, 0.524184, 0.545094, 0.579664, 0.649094", \ + "0.518474, 0.521154, 0.523694, 0.530554, 0.551464, 0.586034, 0.655464", \ + "0.521334, 0.524014, 0.526554, 0.533414, 0.554324, 0.588894, 0.658324", \ + "0.527974, 0.530654, 0.533194, 0.540054, 0.560964, 0.595534, 0.664964" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.406628, 0.409398, 0.411778, 0.418908, 0.439528, 0.474228, 0.543638", \ + "0.407188, 0.409958, 0.412338, 0.419468, 0.440088, 0.474788, 0.544198", \ + "0.408248, 0.411018, 0.413398, 0.420528, 0.441148, 0.475848, 0.545258", \ + "0.410288, 0.413058, 0.415438, 0.422568, 0.443188, 0.477888, 0.547298", \ + "0.416568, 0.419338, 0.421718, 0.428848, 0.449468, 0.484168, 0.553578", \ + "0.419468, 0.422238, 0.424618, 0.431748, 0.452368, 0.487068, 0.556478", \ + "0.425468, 0.428238, 0.430618, 0.437748, 0.458368, 0.493068, 0.562478" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.522225, 0.523925, 0.525745, 0.530535, 0.544645, 0.568125, 0.615135", \ + "0.522595, 0.524295, 0.526115, 0.530905, 0.545015, 0.568495, 0.615505", \ + "0.523335, 0.525035, 0.526855, 0.531645, 0.545755, 0.569235, 0.616245", \ + "0.525525, 0.527225, 0.529045, 0.533835, 0.547945, 0.571425, 0.618435", \ + "0.531905, 0.533605, 0.535425, 0.540215, 0.554325, 0.577805, 0.624815", \ + "0.535005, 0.536705, 0.538525, 0.543315, 0.557425, 0.580905, 0.627915", \ + "0.541835, 0.543535, 0.545355, 0.550145, 0.564255, 0.587735, 0.634745" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.421910, 0.424110, 0.425780, 0.430570, 0.444620, 0.467910, 0.514860", \ + "0.422500, 0.424700, 0.426370, 0.431160, 0.445210, 0.468500, 0.515450", \ + "0.423470, 0.425670, 0.427340, 0.432130, 0.446180, 0.469470, 0.516420", \ + "0.425610, 0.427810, 0.429480, 0.434270, 0.448320, 0.471610, 0.518560", \ + "0.431650, 0.433850, 0.435520, 0.440310, 0.454360, 0.477650, 0.524600", \ + "0.435240, 0.437440, 0.439110, 0.443900, 0.457950, 0.481240, 0.528190", \ + "0.442070, 0.444270, 0.445940, 0.450730, 0.464780, 0.488070, 0.535020" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.507797, 0.510477, 0.513017, 0.519877, 0.540787, 0.575357, 0.644787", \ + "0.508297, 0.510977, 0.513517, 0.520377, 0.541287, 0.575857, 0.645287", \ + "0.509607, 0.512287, 0.514827, 0.521687, 0.542597, 0.577167, 0.646597", \ + "0.511517, 0.514197, 0.516737, 0.523597, 0.544507, 0.579077, 0.648507", \ + "0.517887, 0.520567, 0.523107, 0.529967, 0.550877, 0.585447, 0.654877", \ + "0.520747, 0.523427, 0.525967, 0.532827, 0.553737, 0.588307, 0.657737", \ + "0.527387, 0.530067, 0.532607, 0.539467, 0.560377, 0.594947, 0.664377" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.406156, 0.408926, 0.411306, 0.418436, 0.439056, 0.473756, 0.543166", \ + "0.406716, 0.409486, 0.411866, 0.418996, 0.439616, 0.474316, 0.543726", \ + "0.407776, 0.410546, 0.412926, 0.420056, 0.440676, 0.475376, 0.544786", \ + "0.409815, 0.412586, 0.414966, 0.422096, 0.442716, 0.477416, 0.546826", \ + "0.416096, 0.418866, 0.421246, 0.428376, 0.448995, 0.483696, 0.553106", \ + "0.418996, 0.421766, 0.424146, 0.431276, 0.451896, 0.486596, 0.556006", \ + "0.424996, 0.427766, 0.430146, 0.437276, 0.457896, 0.492596, 0.562006" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.523027, 0.524727, 0.526547, 0.531337, 0.545447, 0.568927, 0.615937", \ + "0.523397, 0.525097, 0.526917, 0.531707, 0.545817, 0.569297, 0.616307", \ + "0.524137, 0.525837, 0.527657, 0.532447, 0.546557, 0.570037, 0.617047", \ + "0.526327, 0.528027, 0.529847, 0.534637, 0.548747, 0.572227, 0.619237", \ + "0.532707, 0.534407, 0.536227, 0.541017, 0.555127, 0.578607, 0.625617", \ + "0.535807, 0.537507, 0.539327, 0.544117, 0.558227, 0.581707, 0.628717", \ + "0.542637, 0.544337, 0.546157, 0.550947, 0.565057, 0.588537, 0.635547" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.422559, 0.424759, 0.426429, 0.431219, 0.445269, 0.468559, 0.515509", \ + "0.423149, 0.425349, 0.427019, 0.431809, 0.445859, 0.469149, 0.516099", \ + "0.424119, 0.426319, 0.427989, 0.432779, 0.446829, 0.470119, 0.517069", \ + "0.426259, 0.428459, 0.430129, 0.434919, 0.448969, 0.472259, 0.519209", \ + "0.432299, 0.434499, 0.436169, 0.440959, 0.455009, 0.478299, 0.525249", \ + "0.435889, 0.438089, 0.439759, 0.444549, 0.458599, 0.481889, 0.528839", \ + "0.442719, 0.444919, 0.446589, 0.451379, 0.465429, 0.488719, 0.535669" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.508599, 0.511279, 0.513819, 0.520679, 0.541589, 0.576159, 0.645589", \ + "0.509099, 0.511779, 0.514319, 0.521179, 0.542089, 0.576659, 0.646089", \ + "0.510409, 0.513089, 0.515629, 0.522489, 0.543399, 0.577969, 0.647399", \ + "0.512319, 0.514999, 0.517539, 0.524399, 0.545309, 0.579879, 0.649309", \ + "0.518689, 0.521369, 0.523909, 0.530769, 0.551679, 0.586249, 0.655679", \ + "0.521549, 0.524229, 0.526769, 0.533629, 0.554539, 0.589109, 0.658539", \ + "0.528189, 0.530869, 0.533409, 0.540269, 0.561179, 0.595749, 0.665179" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.406804, 0.409574, 0.411954, 0.419084, 0.439704, 0.474404, 0.543814", \ + "0.407364, 0.410134, 0.412514, 0.419644, 0.440264, 0.474964, 0.544374", \ + "0.408424, 0.411194, 0.413574, 0.420704, 0.441324, 0.476024, 0.545434", \ + "0.410464, 0.413234, 0.415614, 0.422744, 0.443364, 0.478064, 0.547474", \ + "0.416744, 0.419514, 0.421894, 0.429024, 0.449644, 0.484344, 0.553754", \ + "0.419644, 0.422414, 0.424794, 0.431924, 0.452544, 0.487244, 0.556654", \ + "0.425644, 0.428414, 0.430794, 0.437924, 0.458544, 0.493244, 0.562654" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.523603, 0.525303, 0.527123, 0.531913, 0.546023, 0.569503, 0.616513", \ + "0.523973, 0.525673, 0.527493, 0.532283, 0.546393, 0.569873, 0.616883", \ + "0.524713, 0.526413, 0.528233, 0.533023, 0.547133, 0.570613, 0.617623", \ + "0.526903, 0.528603, 0.530423, 0.535213, 0.549323, 0.572803, 0.619813", \ + "0.533283, 0.534983, 0.536803, 0.541593, 0.555703, 0.579183, 0.626193", \ + "0.536383, 0.538083, 0.539903, 0.544693, 0.558803, 0.582283, 0.629293", \ + "0.543213, 0.544913, 0.546733, 0.551523, 0.565633, 0.589113, 0.636123" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.423040, 0.425240, 0.426910, 0.431700, 0.445750, 0.469040, 0.515990", \ + "0.423630, 0.425830, 0.427500, 0.432290, 0.446340, 0.469630, 0.516580", \ + "0.424600, 0.426800, 0.428470, 0.433260, 0.447310, 0.470600, 0.517550", \ + "0.426740, 0.428940, 0.430610, 0.435400, 0.449450, 0.472740, 0.519690", \ + "0.432780, 0.434980, 0.436650, 0.441440, 0.455490, 0.478780, 0.525730", \ + "0.436370, 0.438570, 0.440240, 0.445030, 0.459080, 0.482370, 0.529320", \ + "0.443200, 0.445400, 0.447070, 0.451860, 0.465910, 0.489200, 0.536150" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.509175, 0.511855, 0.514395, 0.521255, 0.542165, 0.576735, 0.646165", \ + "0.509675, 0.512355, 0.514895, 0.521755, 0.542665, 0.577235, 0.646665", \ + "0.510985, 0.513665, 0.516205, 0.523065, 0.543975, 0.578545, 0.647975", \ + "0.512895, 0.515575, 0.518115, 0.524975, 0.545885, 0.580455, 0.649885", \ + "0.519265, 0.521945, 0.524485, 0.531345, 0.552255, 0.586825, 0.656255", \ + "0.522125, 0.524805, 0.527345, 0.534205, 0.555115, 0.589685, 0.659115", \ + "0.528765, 0.531445, 0.533985, 0.540845, 0.561755, 0.596325, 0.665755" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.407277, 0.410047, 0.412427, 0.419557, 0.440177, 0.474877, 0.544287", \ + "0.407837, 0.410607, 0.412987, 0.420117, 0.440737, 0.475437, 0.544847", \ + "0.408897, 0.411667, 0.414047, 0.421177, 0.441797, 0.476497, 0.545907", \ + "0.410937, 0.413707, 0.416087, 0.423217, 0.443837, 0.478537, 0.547947", \ + "0.417217, 0.419987, 0.422367, 0.429497, 0.450117, 0.484817, 0.554227", \ + "0.420117, 0.422887, 0.425267, 0.432397, 0.453017, 0.487717, 0.557127", \ + "0.426117, 0.428887, 0.431267, 0.438397, 0.459017, 0.493717, 0.563127" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.564611, 0.566311, 0.568131, 0.572921, 0.587031, 0.610511, 0.657521", \ + "0.564981, 0.566681, 0.568501, 0.573291, 0.587401, 0.610881, 0.657891", \ + "0.565721, 0.567421, 0.569241, 0.574031, 0.588141, 0.611621, 0.658631", \ + "0.567911, 0.569611, 0.571431, 0.576221, 0.590331, 0.613811, 0.660821", \ + "0.574291, 0.575991, 0.577811, 0.582601, 0.596711, 0.620191, 0.667201", \ + "0.577391, 0.579091, 0.580911, 0.585701, 0.599811, 0.623291, 0.670301", \ + "0.584221, 0.585921, 0.587741, 0.592531, 0.606641, 0.630121, 0.677131" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.456663, 0.458863, 0.460533, 0.465323, 0.479373, 0.502663, 0.549613", \ + "0.457253, 0.459453, 0.461123, 0.465913, 0.479963, 0.503253, 0.550203", \ + "0.458223, 0.460423, 0.462093, 0.466883, 0.480933, 0.504223, 0.551173", \ + "0.460363, 0.462563, 0.464233, 0.469023, 0.483073, 0.506363, 0.553313", \ + "0.466403, 0.468603, 0.470273, 0.475063, 0.489113, 0.512403, 0.559353", \ + "0.469993, 0.472193, 0.473863, 0.478653, 0.492703, 0.515993, 0.562943", \ + "0.476823, 0.479023, 0.480693, 0.485483, 0.499533, 0.522823, 0.569773" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.550183, 0.552863, 0.555403, 0.562263, 0.583173, 0.617743, 0.687173", \ + "0.550683, 0.553363, 0.555903, 0.562763, 0.583673, 0.618243, 0.687673", \ + "0.551993, 0.554673, 0.557213, 0.564073, 0.584983, 0.619553, 0.688983", \ + "0.553903, 0.556583, 0.559123, 0.565983, 0.586893, 0.621463, 0.690893", \ + "0.560273, 0.562953, 0.565493, 0.572353, 0.593263, 0.627833, 0.697263", \ + "0.563133, 0.565813, 0.568353, 0.575213, 0.596123, 0.630693, 0.700123", \ + "0.569773, 0.572453, 0.574993, 0.581853, 0.602763, 0.637333, 0.706763" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.440899, 0.443669, 0.446049, 0.453179, 0.473799, 0.508499, 0.577909", \ + "0.441459, 0.444229, 0.446609, 0.453739, 0.474359, 0.509059, 0.578469", \ + "0.442519, 0.445289, 0.447669, 0.454799, 0.475419, 0.510119, 0.579529", \ + "0.444559, 0.447329, 0.449709, 0.456839, 0.477459, 0.512159, 0.581569", \ + "0.450839, 0.453609, 0.455989, 0.463119, 0.483739, 0.518439, 0.587849", \ + "0.453739, 0.456509, 0.458889, 0.466019, 0.486639, 0.521339, 0.590749", \ + "0.459739, 0.462509, 0.464889, 0.472019, 0.492639, 0.527339, 0.596749" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.601811, 0.603511, 0.605331, 0.610121, 0.624231, 0.647711, 0.694721", \ + "0.602181, 0.603881, 0.605701, 0.610491, 0.624601, 0.648081, 0.695091", \ + "0.602921, 0.604621, 0.606441, 0.611231, 0.625341, 0.648821, 0.695831", \ + "0.605111, 0.606811, 0.608631, 0.613421, 0.627531, 0.651011, 0.698021", \ + "0.611491, 0.613191, 0.615011, 0.619801, 0.633911, 0.657391, 0.704401", \ + "0.614591, 0.616291, 0.618111, 0.622901, 0.637011, 0.660491, 0.707501", \ + "0.621421, 0.623121, 0.624941, 0.629731, 0.643841, 0.667321, 0.714331" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.487163, 0.489363, 0.491033, 0.495823, 0.509873, 0.533163, 0.580113", \ + "0.487753, 0.489953, 0.491623, 0.496413, 0.510463, 0.533753, 0.580703", \ + "0.488723, 0.490923, 0.492593, 0.497383, 0.511433, 0.534723, 0.581673", \ + "0.490863, 0.493063, 0.494733, 0.499523, 0.513573, 0.536863, 0.583813", \ + "0.496903, 0.499103, 0.500773, 0.505563, 0.519613, 0.542903, 0.589853", \ + "0.500493, 0.502693, 0.504363, 0.509153, 0.523203, 0.546493, 0.593443", \ + "0.507323, 0.509523, 0.511193, 0.515983, 0.530033, 0.553323, 0.600273" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.587394, 0.590074, 0.592614, 0.599474, 0.620384, 0.654954, 0.724384", \ + "0.587894, 0.590574, 0.593114, 0.599974, 0.620884, 0.655454, 0.724884", \ + "0.589204, 0.591884, 0.594424, 0.601284, 0.622194, 0.656764, 0.726194", \ + "0.591114, 0.593794, 0.596334, 0.603194, 0.624104, 0.658674, 0.728104", \ + "0.597484, 0.600164, 0.602704, 0.609564, 0.630474, 0.665044, 0.734474", \ + "0.600344, 0.603024, 0.605564, 0.612424, 0.633334, 0.667904, 0.737334", \ + "0.606984, 0.609664, 0.612204, 0.619064, 0.639974, 0.674544, 0.743974" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.471409, 0.474179, 0.476559, 0.483689, 0.504309, 0.539009, 0.608419", \ + "0.471969, 0.474739, 0.477119, 0.484249, 0.504869, 0.539569, 0.608979", \ + "0.473029, 0.475799, 0.478179, 0.485309, 0.505929, 0.540629, 0.610039", \ + "0.475069, 0.477839, 0.480219, 0.487349, 0.507969, 0.542669, 0.612079", \ + "0.481349, 0.484119, 0.486499, 0.493629, 0.514249, 0.548949, 0.618359", \ + "0.484249, 0.487019, 0.489399, 0.496529, 0.517149, 0.551849, 0.621259", \ + "0.490249, 0.493019, 0.495399, 0.502529, 0.523149, 0.557849, 0.627259" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.640411, 0.642111, 0.643931, 0.648721, 0.662831, 0.686311, 0.733321", \ + "0.640781, 0.642481, 0.644301, 0.649091, 0.663201, 0.686681, 0.733691", \ + "0.641521, 0.643221, 0.645041, 0.649831, 0.663941, 0.687421, 0.734431", \ + "0.643711, 0.645411, 0.647231, 0.652021, 0.666131, 0.689611, 0.736621", \ + "0.650091, 0.651791, 0.653611, 0.658401, 0.672511, 0.695991, 0.743001", \ + "0.653191, 0.654891, 0.656711, 0.661501, 0.675611, 0.699091, 0.746101", \ + "0.660021, 0.661721, 0.663541, 0.668331, 0.682441, 0.705921, 0.752931" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.518813, 0.521013, 0.522683, 0.527473, 0.541523, 0.564813, 0.611763", \ + "0.519403, 0.521603, 0.523273, 0.528063, 0.542113, 0.565403, 0.612353", \ + "0.520373, 0.522573, 0.524243, 0.529033, 0.543083, 0.566373, 0.613323", \ + "0.522513, 0.524713, 0.526383, 0.531173, 0.545223, 0.568513, 0.615463", \ + "0.528553, 0.530753, 0.532423, 0.537213, 0.551263, 0.574553, 0.621503", \ + "0.532143, 0.534343, 0.536013, 0.540803, 0.554853, 0.578143, 0.625093", \ + "0.538973, 0.541173, 0.542843, 0.547633, 0.561683, 0.584973, 0.631923" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.625983, 0.628663, 0.631203, 0.638063, 0.658973, 0.693543, 0.762973", \ + "0.626483, 0.629163, 0.631703, 0.638563, 0.659473, 0.694043, 0.763473", \ + "0.627793, 0.630473, 0.633013, 0.639873, 0.660783, 0.695353, 0.764783", \ + "0.629703, 0.632383, 0.634923, 0.641783, 0.662693, 0.697263, 0.766693", \ + "0.636073, 0.638753, 0.641293, 0.648153, 0.669063, 0.703633, 0.773063", \ + "0.638933, 0.641613, 0.644153, 0.651013, 0.671923, 0.706493, 0.775923", \ + "0.645573, 0.648253, 0.650793, 0.657653, 0.678563, 0.713133, 0.782563" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.503049, 0.505819, 0.508199, 0.515329, 0.535949, 0.570649, 0.640059", \ + "0.503609, 0.506379, 0.508759, 0.515889, 0.536509, 0.571209, 0.640619", \ + "0.504669, 0.507439, 0.509819, 0.516949, 0.537569, 0.572269, 0.641679", \ + "0.506709, 0.509479, 0.511859, 0.518989, 0.539609, 0.574309, 0.643719", \ + "0.512989, 0.515759, 0.518139, 0.525269, 0.545889, 0.580589, 0.649999", \ + "0.515889, 0.518659, 0.521039, 0.528169, 0.548789, 0.583489, 0.652899", \ + "0.521889, 0.524659, 0.527039, 0.534169, 0.554789, 0.589489, 0.658899" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.677543, 0.679243, 0.681063, 0.685853, 0.699963, 0.723443, 0.770453", \ + "0.677913, 0.679613, 0.681433, 0.686223, 0.700333, 0.723813, 0.770823", \ + "0.678653, 0.680353, 0.682173, 0.686963, 0.701073, 0.724553, 0.771563", \ + "0.680843, 0.682543, 0.684363, 0.689153, 0.703263, 0.726743, 0.773753", \ + "0.687223, 0.688923, 0.690743, 0.695533, 0.709643, 0.733123, 0.780133", \ + "0.690323, 0.692023, 0.693843, 0.698633, 0.712743, 0.736223, 0.783233", \ + "0.697153, 0.698853, 0.700673, 0.705463, 0.719573, 0.743053, 0.790063" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.549258, 0.551458, 0.553128, 0.557918, 0.571968, 0.595258, 0.642208", \ + "0.549848, 0.552048, 0.553718, 0.558508, 0.572558, 0.595848, 0.642798", \ + "0.550818, 0.553018, 0.554688, 0.559478, 0.573528, 0.596818, 0.643768", \ + "0.552958, 0.555158, 0.556828, 0.561618, 0.575668, 0.598958, 0.645908", \ + "0.558998, 0.561198, 0.562868, 0.567658, 0.581708, 0.604998, 0.651948", \ + "0.562588, 0.564788, 0.566458, 0.571248, 0.585298, 0.608588, 0.655538", \ + "0.569418, 0.571618, 0.573288, 0.578078, 0.592128, 0.615418, 0.662368" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.663115, 0.665795, 0.668335, 0.675195, 0.696105, 0.730675, 0.800105", \ + "0.663615, 0.666295, 0.668835, 0.675695, 0.696605, 0.731175, 0.800605", \ + "0.664925, 0.667605, 0.670145, 0.677005, 0.697915, 0.732485, 0.801915", \ + "0.666835, 0.669515, 0.672055, 0.678915, 0.699825, 0.734395, 0.803825", \ + "0.673205, 0.675885, 0.678425, 0.685285, 0.706195, 0.740765, 0.810195", \ + "0.676065, 0.678745, 0.681285, 0.688145, 0.709055, 0.743625, 0.813055", \ + "0.682705, 0.685385, 0.687925, 0.694785, 0.715695, 0.750265, 0.819695" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.533494, 0.536264, 0.538644, 0.545774, 0.566394, 0.601094, 0.670504", \ + "0.534054, 0.536824, 0.539204, 0.546334, 0.566954, 0.601654, 0.671064", \ + "0.535114, 0.537884, 0.540264, 0.547394, 0.568014, 0.602714, 0.672124", \ + "0.537154, 0.539924, 0.542304, 0.549434, 0.570054, 0.604754, 0.674164", \ + "0.543434, 0.546204, 0.548584, 0.555714, 0.576334, 0.611034, 0.680444", \ + "0.546334, 0.549104, 0.551484, 0.558614, 0.579234, 0.613934, 0.683344", \ + "0.552334, 0.555104, 0.557484, 0.564614, 0.585234, 0.619934, 0.689344" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838" \ + ); + } + } + } + bus(SOB) { + bus_type : rf2_32x128_wm1_SOB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : CLKB; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.209659, 0.212139, 0.214219, 0.219179, 0.232809, 0.255149, 0.299739", \ + "0.209929, 0.212409, 0.214489, 0.219449, 0.233079, 0.255419, 0.300009", \ + "0.211099, 0.213579, 0.215659, 0.220619, 0.234249, 0.256589, 0.301179", \ + "0.213079, 0.215559, 0.217639, 0.222599, 0.236229, 0.258569, 0.303159", \ + "0.217999, 0.220479, 0.222559, 0.227519, 0.241149, 0.263489, 0.308079", \ + "0.221419, 0.223899, 0.225979, 0.230939, 0.244569, 0.266909, 0.311499", \ + "0.227589, 0.230069, 0.232149, 0.237109, 0.250739, 0.273079, 0.317669" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.170882, 0.173362, 0.175452, 0.180402, 0.194022, 0.216372, 0.260952", \ + "0.171092, 0.173572, 0.175662, 0.180612, 0.194232, 0.216582, 0.261162", \ + "0.172202, 0.174682, 0.176772, 0.181722, 0.195342, 0.217692, 0.262272", \ + "0.174302, 0.176782, 0.178872, 0.183822, 0.197442, 0.219792, 0.264372", \ + "0.179232, 0.181712, 0.183802, 0.188752, 0.202372, 0.224722, 0.269302", \ + "0.182632, 0.185112, 0.187202, 0.192152, 0.205772, 0.228122, 0.272702", \ + "0.188602, 0.191082, 0.193172, 0.198122, 0.211742, 0.234092, 0.278672" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.203086, 0.206386, 0.209426, 0.216626, 0.237876, 0.273266, 0.344036", \ + "0.203366, 0.206666, 0.209706, 0.216906, 0.238156, 0.273546, 0.344316", \ + "0.204796, 0.208096, 0.211136, 0.218336, 0.239586, 0.274976, 0.345746", \ + "0.206256, 0.209556, 0.212596, 0.219796, 0.241046, 0.276436, 0.347206", \ + "0.211936, 0.215236, 0.218276, 0.225476, 0.246726, 0.282116, 0.352886", \ + "0.215016, 0.218316, 0.221356, 0.228556, 0.249806, 0.285196, 0.355966", \ + "0.220756, 0.224056, 0.227096, 0.234296, 0.255546, 0.290936, 0.361706" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.165545, 0.168845, 0.171885, 0.179085, 0.200345, 0.235725, 0.306495", \ + "0.165825, 0.169125, 0.172165, 0.179365, 0.200625, 0.236005, 0.306775", \ + "0.167265, 0.170565, 0.173605, 0.180805, 0.202065, 0.237445, 0.308215", \ + "0.168695, 0.171995, 0.175035, 0.182235, 0.203495, 0.238875, 0.309645", \ + "0.174345, 0.177645, 0.180685, 0.187885, 0.209145, 0.244525, 0.315295", \ + "0.177475, 0.180775, 0.183815, 0.191015, 0.212275, 0.247655, 0.318425", \ + "0.183215, 0.186515, 0.189555, 0.196755, 0.218015, 0.253395, 0.324165" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236" \ + ); + } + } + internal_power() { + related_pin : CLKB; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838" \ + ); + } + } + } + pin(CLKA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.010482; + clock : true; + max_transition : 0.219000; + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("6.486320, 6.488403, 6.488693, 6.495181, 6.501678, 6.508177, 6.514685"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("6.487134, 6.489217, 6.489508, 6.495997, 6.502496, 6.508995, 6.515504"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("6.487134, 6.489217, 6.489508, 6.495997, 6.502496, 6.508995, 6.515504"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("6.490187, 6.492270, 6.492571, 6.499060, 6.505559, 6.512069, 6.518578"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("6.522302, 6.524385, 6.524682, 6.531216, 6.537740, 6.544284, 6.550829"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("6.557886, 6.559969, 6.560279, 6.566835, 6.573402, 6.579980, 6.586557"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("6.571150, 6.573233, 6.573546, 6.580115, 6.586695, 6.593284, 6.599874"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("6.574420, 6.576503, 6.576818, 6.583391, 6.589974, 6.596567, 6.603159"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENA&TENA)|(TCENA&!TENA))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.009028, 0.009037, 0.009046, 0.009549, 0.011381, 0.012714, 0.017934"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.010031, 0.010041, 0.010051, 0.010610, 0.012646, 0.014126, 0.019927"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.009028, 0.009037, 0.009046, 0.009549, 0.011381, 0.012714, 0.017934"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.010031, 0.010041, 0.010051, 0.010610, 0.012646, 0.014126, 0.019927"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("5.996670, 5.997548, 6.003542, 6.009546, 6.015560, 6.021574, 6.027597"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014600, 0.014614, 0.014789, 0.015368, 0.017246, 0.018897, 0.024430"); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.541684, 0.542084, 0.543904, 0.545324, 0.551884, 0.554544, 0.615994", \ + "0.541439, 0.541839, 0.543659, 0.545079, 0.551639, 0.554299, 0.615749", \ + "0.540238, 0.540638, 0.542458, 0.543878, 0.550438, 0.553098, 0.614548", \ + "0.537856, 0.538256, 0.540076, 0.541496, 0.548056, 0.550716, 0.612166", \ + "0.532735, 0.533135, 0.534955, 0.536375, 0.542935, 0.545595, 0.607045", \ + "0.530075, 0.530475, 0.532295, 0.533715, 0.540275, 0.542935, 0.604385", \ + "0.578416, 0.578816, 0.580636, 0.582056, 0.588616, 0.591276, 0.652726" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.541108, 0.541508, 0.543328, 0.544748, 0.551308, 0.553968, 0.615418", \ + "0.540863, 0.541263, 0.543083, 0.544503, 0.551063, 0.553723, 0.615173", \ + "0.539662, 0.540062, 0.541882, 0.543302, 0.549862, 0.552522, 0.613972", \ + "0.537280, 0.537680, 0.539500, 0.540920, 0.547480, 0.550140, 0.611590", \ + "0.532159, 0.532559, 0.534379, 0.535799, 0.542359, 0.545019, 0.606469", \ + "0.529499, 0.529899, 0.531719, 0.533139, 0.539699, 0.542359, 0.603809", \ + "0.577840, 0.578240, 0.580060, 0.581480, 0.588040, 0.590700, 0.652150" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.541899, 0.542299, 0.544119, 0.545539, 0.552099, 0.554759, 0.616209", \ + "0.541654, 0.542054, 0.543874, 0.545294, 0.551854, 0.554514, 0.615964", \ + "0.540453, 0.540853, 0.542673, 0.544093, 0.550653, 0.553313, 0.614763", \ + "0.538071, 0.538471, 0.540291, 0.541711, 0.548271, 0.550931, 0.612381", \ + "0.532950, 0.533350, 0.535170, 0.536590, 0.543150, 0.545810, 0.607260", \ + "0.530290, 0.530690, 0.532510, 0.533930, 0.540490, 0.543150, 0.604600", \ + "0.578631, 0.579031, 0.580851, 0.582271, 0.588831, 0.591491, 0.652941" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.542486, 0.542886, 0.544706, 0.546126, 0.552686, 0.555346, 0.616796", \ + "0.542241, 0.542641, 0.544461, 0.545881, 0.552441, 0.555101, 0.616551", \ + "0.541040, 0.541440, 0.543260, 0.544680, 0.551240, 0.553900, 0.615350", \ + "0.538658, 0.539058, 0.540878, 0.542298, 0.548858, 0.551518, 0.612968", \ + "0.533537, 0.533937, 0.535757, 0.537177, 0.543737, 0.546397, 0.607847", \ + "0.530877, 0.531277, 0.533097, 0.534517, 0.541077, 0.543737, 0.605187", \ + "0.579218, 0.579618, 0.581438, 0.582858, 0.589418, 0.592078, 0.653528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.583483, 0.583883, 0.585703, 0.587123, 0.593683, 0.596343, 0.657793", \ + "0.583238, 0.583638, 0.585458, 0.586878, 0.593438, 0.596098, 0.657548", \ + "0.582037, 0.582437, 0.584257, 0.585677, 0.592237, 0.594897, 0.656347", \ + "0.579655, 0.580055, 0.581875, 0.583295, 0.589855, 0.592515, 0.653965", \ + "0.574534, 0.574934, 0.576754, 0.578174, 0.584734, 0.587394, 0.648844", \ + "0.571874, 0.572274, 0.574094, 0.575514, 0.582074, 0.584734, 0.646184", \ + "0.620215, 0.620615, 0.622435, 0.623855, 0.630415, 0.633075, 0.694525" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.620694, 0.621094, 0.622914, 0.624334, 0.630894, 0.633554, 0.695004", \ + "0.620449, 0.620849, 0.622669, 0.624089, 0.630649, 0.633309, 0.694759", \ + "0.619248, 0.619648, 0.621468, 0.622888, 0.629448, 0.632108, 0.693558", \ + "0.616866, 0.617266, 0.619086, 0.620506, 0.627066, 0.629726, 0.691176", \ + "0.611745, 0.612145, 0.613965, 0.615385, 0.621945, 0.624605, 0.686055", \ + "0.609085, 0.609485, 0.611305, 0.612725, 0.619285, 0.621945, 0.683395", \ + "0.657426, 0.657826, 0.659646, 0.661066, 0.667626, 0.670286, 0.731736" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.659294, 0.659694, 0.661514, 0.662934, 0.669494, 0.672154, 0.733604", \ + "0.659049, 0.659449, 0.661269, 0.662689, 0.669249, 0.671909, 0.733359", \ + "0.657848, 0.658248, 0.660068, 0.661488, 0.668048, 0.670708, 0.732158", \ + "0.655466, 0.655866, 0.657686, 0.659106, 0.665666, 0.668326, 0.729776", \ + "0.650345, 0.650745, 0.652565, 0.653985, 0.660545, 0.663205, 0.724655", \ + "0.647685, 0.648085, 0.649905, 0.651325, 0.657885, 0.660545, 0.721995", \ + "0.696026, 0.696426, 0.698246, 0.699666, 0.706226, 0.708886, 0.770336" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.696415, 0.696815, 0.698635, 0.700055, 0.706615, 0.709275, 0.770725", \ + "0.696170, 0.696570, 0.698390, 0.699810, 0.706370, 0.709030, 0.770480", \ + "0.694969, 0.695369, 0.697189, 0.698609, 0.705169, 0.707829, 0.769279", \ + "0.692587, 0.692987, 0.694807, 0.696227, 0.702787, 0.705447, 0.766897", \ + "0.687466, 0.687866, 0.689686, 0.691106, 0.697666, 0.700326, 0.761776", \ + "0.684806, 0.685206, 0.687026, 0.688446, 0.695006, 0.697666, 0.759116", \ + "0.733147, 0.733547, 0.735367, 0.736787, 0.743347, 0.746007, 0.807457" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.740743; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.740147; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.740961; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.741546; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.783169; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.820938; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.860106; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.897795; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.800051; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.799467; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.800281; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.800866; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.842490; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.880247; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.919427; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.957116; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + } + min_pulse_width_high : 0.092608; + min_pulse_width_low : 0.089655; + } + pin(CENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001808; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.073467, 0.074005, 0.074951, 0.077414, 0.084228, 0.086231, 0.148646", \ + "0.073539, 0.074077, 0.075023, 0.077486, 0.084300, 0.086303, 0.148718", \ + "0.073586, 0.074124, 0.075070, 0.077533, 0.084347, 0.086350, 0.148765", \ + "0.074880, 0.075418, 0.076364, 0.078827, 0.085641, 0.087644, 0.150059", \ + "0.079408, 0.079946, 0.080892, 0.083355, 0.090169, 0.092172, 0.154587", \ + "0.081423, 0.081961, 0.082907, 0.085370, 0.092184, 0.094187, 0.156602", \ + "0.147348, 0.147886, 0.148832, 0.151295, 0.158109, 0.160112, 0.222527" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.072971, 0.073586, 0.074998, 0.077333, 0.085110, 0.088868, 0.152617", \ + "0.072714, 0.073329, 0.074741, 0.077076, 0.084853, 0.088611, 0.152360", \ + "0.071479, 0.072094, 0.073506, 0.075841, 0.083618, 0.087376, 0.151125", \ + "0.069561, 0.070176, 0.071588, 0.073923, 0.081700, 0.085458, 0.149207", \ + "0.068554, 0.069583, 0.071078, 0.073047, 0.080396, 0.084821, 0.146596", \ + "0.070569, 0.071598, 0.073093, 0.075062, 0.082411, 0.086836, 0.148611", \ + "0.136494, 0.137523, 0.139018, 0.140987, 0.148336, 0.152761, 0.214536" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.040459, 0.039839, 0.038685, 0.036443, 0.031390, 0.029596, 0.081513", \ + "0.040807, 0.040187, 0.039033, 0.036791, 0.031691, 0.029897, 0.081814", \ + "0.041932, 0.041312, 0.040158, 0.037916, 0.032978, 0.031184, 0.083101", \ + "0.044002, 0.043382, 0.042228, 0.039986, 0.034714, 0.032920, 0.084837", \ + "0.050019, 0.049399, 0.048245, 0.046003, 0.039810, 0.038016, 0.089933", \ + "0.052799, 0.052179, 0.051025, 0.048783, 0.042401, 0.040347, 0.091964", \ + "0.114377, 0.113757, 0.112603, 0.110361, 0.103979, 0.101925, 0.152029" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.040034, 0.039334, 0.037908, 0.035679, 0.028594, 0.024129, 0.075782", \ + "0.040382, 0.039682, 0.038256, 0.036027, 0.028942, 0.024477, 0.076130", \ + "0.041507, 0.040807, 0.039381, 0.037152, 0.030067, 0.025602, 0.077255", \ + "0.043577, 0.042877, 0.041451, 0.039222, 0.032137, 0.027672, 0.079325", \ + "0.049594, 0.048894, 0.047468, 0.045239, 0.038154, 0.033689, 0.085342", \ + "0.052374, 0.051674, 0.050248, 0.048019, 0.040934, 0.036469, 0.088122", \ + "0.113952, 0.113252, 0.111826, 0.109597, 0.102512, 0.098047, 0.149700" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.885024", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.885285", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.886593", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.888342", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.894606", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.896783", \ + "0.886215, 0.885627, 0.885283, 0.885281, 0.888728, 0.890884, 0.901203" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.293757, 0.292137, 0.290737, 0.289837, 0.281157, 0.278487, 0.268037", \ + "0.296997, 0.295377, 0.293977, 0.293077, 0.284397, 0.281727, 0.271277", \ + "0.299807, 0.298187, 0.296787, 0.295887, 0.287207, 0.284537, 0.274087", \ + "0.301607, 0.299987, 0.298587, 0.297687, 0.289007, 0.286337, 0.275887", \ + "0.318957, 0.317337, 0.315937, 0.315037, 0.306357, 0.303687, 0.293237", \ + "0.324297, 0.322677, 0.321277, 0.320377, 0.311697, 0.309027, 0.298577", \ + "0.345197, 0.343577, 0.342177, 0.341277, 0.332597, 0.329927, 0.319477" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.039784, 0.040266, 0.040577, 0.040617, 0.040658, 0.040699, 0.041411"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.071846, 0.072208, 0.073170, 0.073282, 0.073352, 0.073426, 0.073971"); + } + } + } + bus(AA) { + bus_type : rf2_32x128_wm1_AA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001223; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088908, 0.088968, 0.090375, 0.092863, 0.102637, 0.108714, 0.175425", \ + "0.088602, 0.088662, 0.090069, 0.092557, 0.102331, 0.108408, 0.175119", \ + "0.087361, 0.087421, 0.088828, 0.091316, 0.101090, 0.107167, 0.173878", \ + "0.085437, 0.085497, 0.086904, 0.089392, 0.099166, 0.105243, 0.171954", \ + "0.079049, 0.079109, 0.080516, 0.083004, 0.092778, 0.098855, 0.165566", \ + "0.076705, 0.076765, 0.078172, 0.080660, 0.090434, 0.096511, 0.163222", \ + "0.125119, 0.125179, 0.126586, 0.129074, 0.138848, 0.144925, 0.211636" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088908, 0.088968, 0.090375, 0.092863, 0.102637, 0.108714, 0.175425", \ + "0.088602, 0.088662, 0.090069, 0.092557, 0.102331, 0.108408, 0.175119", \ + "0.087361, 0.087421, 0.088828, 0.091316, 0.101090, 0.107167, 0.173878", \ + "0.085437, 0.085497, 0.086904, 0.089392, 0.099166, 0.105243, 0.171954", \ + "0.079049, 0.079109, 0.080516, 0.083004, 0.092778, 0.098855, 0.165566", \ + "0.076705, 0.076765, 0.078172, 0.080660, 0.090434, 0.096511, 0.163222", \ + "0.125119, 0.125179, 0.126586, 0.129074, 0.138848, 0.144925, 0.211636" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062069, 0.061373, 0.060122, 0.058863, 0.059493, 0.060906, 0.120167", \ + "0.062418, 0.061722, 0.060471, 0.059212, 0.059842, 0.061255, 0.120516", \ + "0.063544, 0.062848, 0.061597, 0.060338, 0.060968, 0.062381, 0.121642", \ + "0.065612, 0.064916, 0.063665, 0.062406, 0.063036, 0.064449, 0.123710", \ + "0.071774, 0.071078, 0.069827, 0.068568, 0.069198, 0.070611, 0.129872", \ + "0.074398, 0.073702, 0.072451, 0.071192, 0.071822, 0.073235, 0.132496", \ + "0.134976, 0.134280, 0.133029, 0.131770, 0.132400, 0.133813, 0.193074" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.063163, 0.062419, 0.061320, 0.060018, 0.059767, 0.058994, 0.117650", \ + "0.063513, 0.062769, 0.061670, 0.060368, 0.060117, 0.059344, 0.118000", \ + "0.064638, 0.063894, 0.062795, 0.061493, 0.061242, 0.060469, 0.119125", \ + "0.066706, 0.065962, 0.064863, 0.063561, 0.063310, 0.062537, 0.121193", \ + "0.072869, 0.072125, 0.071026, 0.069724, 0.069473, 0.068700, 0.127356", \ + "0.075492, 0.074748, 0.073649, 0.072347, 0.072096, 0.071323, 0.129979", \ + "0.136071, 0.135327, 0.134228, 0.132926, 0.132675, 0.131902, 0.190558" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088908, 0.088968, 0.090375, 0.092863, 0.102637, 0.108714, 0.175425", \ + "0.088602, 0.088662, 0.090069, 0.092557, 0.102331, 0.108408, 0.175119", \ + "0.087361, 0.087421, 0.088828, 0.091316, 0.101090, 0.107167, 0.173878", \ + "0.085437, 0.085497, 0.086904, 0.089392, 0.099166, 0.105243, 0.171954", \ + "0.079049, 0.079109, 0.080516, 0.083004, 0.092778, 0.098855, 0.165566", \ + "0.076705, 0.076765, 0.078172, 0.080660, 0.090434, 0.096511, 0.163222", \ + "0.125119, 0.125179, 0.126586, 0.129074, 0.138848, 0.144925, 0.211636" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088908, 0.088968, 0.090375, 0.092863, 0.102637, 0.108714, 0.175425", \ + "0.088602, 0.088662, 0.090069, 0.092557, 0.102331, 0.108408, 0.175119", \ + "0.087361, 0.087421, 0.088828, 0.091316, 0.101090, 0.107167, 0.173878", \ + "0.085437, 0.085497, 0.086904, 0.089392, 0.099166, 0.105243, 0.171954", \ + "0.079049, 0.079109, 0.080516, 0.083004, 0.092778, 0.098855, 0.165566", \ + "0.076705, 0.076765, 0.078172, 0.080660, 0.090434, 0.096511, 0.163222", \ + "0.125119, 0.125179, 0.126586, 0.129074, 0.138848, 0.144925, 0.211636" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062069, 0.061373, 0.060122, 0.058863, 0.059493, 0.060906, 0.120167", \ + "0.062418, 0.061722, 0.060471, 0.059212, 0.059842, 0.061255, 0.120516", \ + "0.063544, 0.062848, 0.061597, 0.060338, 0.060968, 0.062381, 0.121642", \ + "0.065612, 0.064916, 0.063665, 0.062406, 0.063036, 0.064449, 0.123710", \ + "0.071774, 0.071078, 0.069827, 0.068568, 0.069198, 0.070611, 0.129872", \ + "0.074398, 0.073702, 0.072451, 0.071192, 0.071822, 0.073235, 0.132496", \ + "0.134976, 0.134280, 0.133029, 0.131770, 0.132400, 0.133813, 0.193074" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.063163, 0.062419, 0.061320, 0.060018, 0.059767, 0.058994, 0.117650", \ + "0.063513, 0.062769, 0.061670, 0.060368, 0.060117, 0.059344, 0.118000", \ + "0.064638, 0.063894, 0.062795, 0.061493, 0.061242, 0.060469, 0.119125", \ + "0.066706, 0.065962, 0.064863, 0.063561, 0.063310, 0.062537, 0.121193", \ + "0.072869, 0.072125, 0.071026, 0.069724, 0.069473, 0.068700, 0.127356", \ + "0.075492, 0.074748, 0.073649, 0.072347, 0.072096, 0.071323, 0.129979", \ + "0.136071, 0.135327, 0.134228, 0.132926, 0.132675, 0.131902, 0.190558" \ + ); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019225, 0.019244, 0.019263, 0.019282, 0.019302, 0.019418, 0.020007"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.016535, 0.016555, 0.016583, 0.016599, 0.016772, 0.016938, 0.017644"); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019225, 0.019244, 0.019263, 0.019282, 0.019302, 0.019418, 0.020007"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.016535, 0.016555, 0.016583, 0.016599, 0.016772, 0.016938, 0.017644"); + } + } + } + pin(CLKB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.010551; + clock : true; + max_transition : 0.219000; + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("7.078251, 7.079150, 7.086236, 7.093321, 7.100408, 7.107514, 7.114621"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("7.079055, 7.079956, 7.087042, 7.094128, 7.101216, 7.108323, 7.115430"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("7.079055, 7.079956, 7.087042, 7.094128, 7.101216, 7.108323, 7.115430"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("7.082108, 7.083018, 7.090095, 7.097191, 7.104289, 7.111386, 7.118504"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("7.114233, 7.115134, 7.122255, 7.129376, 7.136509, 7.143641, 7.150785"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("7.149906, 7.150816, 7.157960, 7.165125, 7.172290, 7.179455, 7.186642"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("7.163071, 7.163982, 7.171138, 7.178315, 7.185492, 7.192681, 7.199869"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("7.166351, 7.167260, 7.174421, 7.181601, 7.188782, 7.195973, 7.203165"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENB&TENB)|(TCENB&!TENB))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.009015, 0.009024, 0.009033, 0.009612, 0.011302, 0.012587, 0.017689"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.010016, 0.010026, 0.010036, 0.010680, 0.012557, 0.013985, 0.019654"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.009015, 0.009024, 0.009033, 0.009612, 0.011302, 0.012587, 0.017689"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.010016, 0.010026, 0.010036, 0.010680, 0.012557, 0.013985, 0.019654"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("4.477988, 4.482477, 4.486979, 4.491467, 4.495955, 4.500473, 4.504981"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014447, 0.014457, 0.014970, 0.015513, 0.017437, 0.018798, 0.024357"); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.616596, 0.616706, 0.618386, 0.620536, 0.626246, 0.628866, 0.688956", \ + "0.616357, 0.616467, 0.618147, 0.620297, 0.626007, 0.628627, 0.688717", \ + "0.615401, 0.615511, 0.617191, 0.619341, 0.625051, 0.627671, 0.687761", \ + "0.613203, 0.613313, 0.614993, 0.617143, 0.622853, 0.625473, 0.685563", \ + "0.607431, 0.607541, 0.609221, 0.611371, 0.617081, 0.619701, 0.679791", \ + "0.604487, 0.604597, 0.606277, 0.608427, 0.614137, 0.616757, 0.676847", \ + "0.653920, 0.654030, 0.655710, 0.657860, 0.663570, 0.666190, 0.726280" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.623557, 0.623667, 0.625347, 0.627497, 0.633207, 0.635827, 0.695917", \ + "0.623318, 0.623428, 0.625108, 0.627258, 0.632968, 0.635588, 0.695678", \ + "0.622362, 0.622472, 0.624152, 0.626302, 0.632012, 0.634632, 0.694722", \ + "0.620164, 0.620274, 0.621954, 0.624104, 0.629814, 0.632434, 0.692524", \ + "0.614392, 0.614502, 0.616182, 0.618332, 0.624042, 0.626662, 0.686752", \ + "0.611448, 0.611558, 0.613238, 0.615388, 0.621098, 0.623718, 0.683808", \ + "0.660881, 0.660991, 0.662671, 0.664821, 0.670531, 0.673151, 0.733241" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.630924, 0.631034, 0.632714, 0.634864, 0.640574, 0.643194, 0.703284", \ + "0.630685, 0.630795, 0.632475, 0.634625, 0.640335, 0.642955, 0.703045", \ + "0.629729, 0.629839, 0.631519, 0.633669, 0.639379, 0.641999, 0.702089", \ + "0.627531, 0.627641, 0.629321, 0.631471, 0.637181, 0.639801, 0.699891", \ + "0.621759, 0.621869, 0.623549, 0.625699, 0.631409, 0.634029, 0.694119", \ + "0.618815, 0.618925, 0.620605, 0.622755, 0.628465, 0.631085, 0.691175", \ + "0.668248, 0.668358, 0.670038, 0.672188, 0.677898, 0.680518, 0.740608" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.644066, 0.644176, 0.645856, 0.648006, 0.653716, 0.656336, 0.716426", \ + "0.643827, 0.643937, 0.645617, 0.647767, 0.653477, 0.656097, 0.716187", \ + "0.642871, 0.642981, 0.644661, 0.646811, 0.652521, 0.655141, 0.715231", \ + "0.640673, 0.640783, 0.642463, 0.644613, 0.650323, 0.652943, 0.713033", \ + "0.634901, 0.635011, 0.636691, 0.638841, 0.644551, 0.647171, 0.707261", \ + "0.631957, 0.632067, 0.633747, 0.635897, 0.641607, 0.644227, 0.704317", \ + "0.681390, 0.681500, 0.683180, 0.685330, 0.691040, 0.693660, 0.753750" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.693718, 0.693828, 0.695508, 0.697658, 0.703368, 0.705988, 0.766078", \ + "0.693479, 0.693589, 0.695269, 0.697419, 0.703129, 0.705749, 0.765839", \ + "0.692523, 0.692633, 0.694313, 0.696463, 0.702173, 0.704793, 0.764883", \ + "0.690325, 0.690435, 0.692115, 0.694265, 0.699975, 0.702595, 0.762685", \ + "0.684553, 0.684663, 0.686343, 0.688493, 0.694203, 0.696823, 0.756913", \ + "0.681609, 0.681719, 0.683399, 0.685549, 0.691259, 0.693879, 0.753969", \ + "0.731042, 0.731152, 0.732832, 0.734982, 0.740692, 0.743312, 0.803402" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.730161, 0.730271, 0.731951, 0.734101, 0.739811, 0.742431, 0.802521", \ + "0.729922, 0.730032, 0.731712, 0.733862, 0.739572, 0.742192, 0.802282", \ + "0.728966, 0.729076, 0.730756, 0.732906, 0.738616, 0.741236, 0.801326", \ + "0.726768, 0.726878, 0.728558, 0.730708, 0.736418, 0.739038, 0.799128", \ + "0.720996, 0.721106, 0.722786, 0.724936, 0.730646, 0.733266, 0.793356", \ + "0.718052, 0.718162, 0.719842, 0.721992, 0.727702, 0.730322, 0.790412", \ + "0.767485, 0.767595, 0.769275, 0.771425, 0.777135, 0.779755, 0.839845" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.776581, 0.776691, 0.778371, 0.780521, 0.786231, 0.788851, 0.848941", \ + "0.776342, 0.776452, 0.778132, 0.780282, 0.785992, 0.788612, 0.848702", \ + "0.775386, 0.775496, 0.777176, 0.779326, 0.785036, 0.787656, 0.847746", \ + "0.773188, 0.773298, 0.774978, 0.777128, 0.782838, 0.785458, 0.845548", \ + "0.767416, 0.767526, 0.769206, 0.771356, 0.777066, 0.779686, 0.839776", \ + "0.764472, 0.764582, 0.766262, 0.768412, 0.774122, 0.776742, 0.836832", \ + "0.813905, 0.814015, 0.815695, 0.817845, 0.823555, 0.826175, 0.886265" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.812899, 0.813009, 0.814689, 0.816839, 0.822549, 0.825169, 0.885259", \ + "0.812660, 0.812770, 0.814450, 0.816600, 0.822310, 0.824930, 0.885020", \ + "0.811704, 0.811814, 0.813494, 0.815644, 0.821354, 0.823974, 0.884064", \ + "0.809506, 0.809616, 0.811296, 0.813446, 0.819156, 0.821776, 0.881866", \ + "0.803734, 0.803844, 0.805524, 0.807674, 0.813384, 0.816004, 0.876094", \ + "0.800790, 0.800900, 0.802580, 0.804730, 0.810440, 0.813060, 0.873150", \ + "0.850223, 0.850333, 0.852013, 0.854163, 0.859873, 0.862493, 0.922583" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.819272; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 0.826337; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 0.833815; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 0.847155; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + } + minimum_period() { + constraint : 0.897551; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 0.934541; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 0.981657; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 1.018520; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.053194, 0.053443, 0.054783, 0.056678, 0.062505, 0.065145, 0.069949"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.053194, 0.053443, 0.054783, 0.056678, 0.062505, 0.065145, 0.069949"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.053194, 0.053443, 0.054783, 0.056678, 0.062505, 0.065145, 0.069949"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.053194, 0.053443, 0.054783, 0.056678, 0.062505, 0.065145, 0.069949"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.164159, 0.164453, 0.165812, 0.167660, 0.173128, 0.175626, 0.180226"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.164159, 0.164453, 0.165812, 0.167660, 0.173128, 0.175626, 0.180226"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.164159, 0.164453, 0.165812, 0.167660, 0.173128, 0.175626, 0.180226"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.164159, 0.164453, 0.165812, 0.167660, 0.173128, 0.175626, 0.180226"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + } + min_pulse_width_high : 0.095807; + min_pulse_width_low : 0.090684; + } + pin(CENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001463; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.077497, 0.078529, 0.079059, 0.081941, 0.089144, 0.091965, 0.154650", \ + "0.077670, 0.078702, 0.079232, 0.082114, 0.089317, 0.092138, 0.154823", \ + "0.078005, 0.079037, 0.079567, 0.082449, 0.089652, 0.092473, 0.155158", \ + "0.079629, 0.080661, 0.081191, 0.084073, 0.091276, 0.094097, 0.156782", \ + "0.084359, 0.085391, 0.085921, 0.088803, 0.096006, 0.098827, 0.161512", \ + "0.086802, 0.087834, 0.088364, 0.091246, 0.098449, 0.101270, 0.163955", \ + "0.152375, 0.153407, 0.153937, 0.156819, 0.164022, 0.166843, 0.229528" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.075509, 0.076743, 0.077879, 0.080879, 0.088856, 0.092874, 0.156309", \ + "0.075273, 0.076507, 0.077643, 0.080643, 0.088620, 0.092638, 0.156073", \ + "0.074014, 0.075248, 0.076384, 0.079384, 0.087361, 0.091379, 0.154814", \ + "0.071863, 0.073097, 0.074233, 0.077233, 0.085210, 0.089228, 0.152663", \ + "0.074066, 0.075174, 0.076095, 0.079059, 0.087212, 0.091366, 0.155029", \ + "0.076511, 0.077619, 0.078540, 0.081504, 0.089657, 0.093811, 0.157474", \ + "0.142082, 0.143190, 0.144111, 0.147075, 0.155228, 0.159382, 0.223045" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.042558, 0.041879, 0.040936, 0.038505, 0.034399, 0.031193, 0.081304", \ + "0.042792, 0.042113, 0.041170, 0.038739, 0.034633, 0.031427, 0.081538", \ + "0.044088, 0.043409, 0.042466, 0.040035, 0.035929, 0.032723, 0.082834", \ + "0.045627, 0.044948, 0.044005, 0.041574, 0.037468, 0.034262, 0.084373", \ + "0.050328, 0.049649, 0.048706, 0.046275, 0.042169, 0.038963, 0.089074", \ + "0.052315, 0.051636, 0.050693, 0.048262, 0.044156, 0.040950, 0.091061", \ + "0.111228, 0.110549, 0.109606, 0.107175, 0.103069, 0.099863, 0.149974" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.034747, 0.034100, 0.033061, 0.030148, 0.022467, 0.018463, 0.069750", \ + "0.035021, 0.034374, 0.033335, 0.030422, 0.022741, 0.018737, 0.069750", \ + "0.036365, 0.035718, 0.034679, 0.031766, 0.024085, 0.020081, 0.069750", \ + "0.038259, 0.037612, 0.036573, 0.033660, 0.025979, 0.021975, 0.070060", \ + "0.044069, 0.043422, 0.042383, 0.039470, 0.031789, 0.027785, 0.075870", \ + "0.046789, 0.046142, 0.045103, 0.042190, 0.034509, 0.030505, 0.078590", \ + "0.107937, 0.107290, 0.106251, 0.103338, 0.095657, 0.091653, 0.139738" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.885024", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.885285", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.886593", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.888342", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.894606", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.896783", \ + "0.886215, 0.885627, 0.885283, 0.885281, 0.888728, 0.890884, 0.901203" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.293757, 0.292137, 0.290737, 0.289837, 0.281157, 0.278487, 0.268037", \ + "0.296997, 0.295377, 0.293977, 0.293077, 0.284397, 0.281727, 0.271277", \ + "0.299807, 0.298187, 0.296787, 0.295887, 0.287207, 0.284537, 0.274087", \ + "0.301607, 0.299987, 0.298587, 0.297687, 0.289007, 0.286337, 0.275887", \ + "0.318957, 0.317337, 0.315937, 0.315037, 0.306357, 0.303687, 0.293237", \ + "0.324297, 0.322677, 0.321277, 0.320377, 0.311697, 0.309027, 0.298577", \ + "0.345197, 0.343577, 0.342177, 0.341277, 0.332597, 0.329927, 0.319477" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.039784, 0.040266, 0.040577, 0.040617, 0.040658, 0.040699, 0.041411"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.071846, 0.072208, 0.073170, 0.073282, 0.073352, 0.073426, 0.073971"); + } + } + } + bus(WENB) { + bus_type : rf2_32x128_wm1_WENB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001684; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015000, 0.015000, 0.015000, 0.015000, 0.021691, 0.024823, 0.091967", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.021472, 0.024604, 0.091748", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.020152, 0.023284, 0.090428", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.018287, 0.021419, 0.088563", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.016208, 0.083352", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.080525", \ + "0.069750, 0.069750, 0.069750, 0.069750, 0.069750, 0.069750, 0.130712" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015000, 0.015000, 0.015000, 0.015000, 0.018006, 0.022685, 0.091847", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.017778, 0.022457, 0.091619", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.016413, 0.021092, 0.090254", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.019291, 0.088453", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.083172", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.080405", \ + "0.069750, 0.069750, 0.069750, 0.069750, 0.069750, 0.069750, 0.130591" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166195, 0.165697, 0.164673, 0.163569, 0.164365, 0.168965, 0.228881", \ + "0.166489, 0.165991, 0.164967, 0.163863, 0.164659, 0.169259, 0.229175", \ + "0.167850, 0.167352, 0.166328, 0.165224, 0.166020, 0.170620, 0.230536", \ + "0.169706, 0.169208, 0.168184, 0.167080, 0.167876, 0.172476, 0.232392", \ + "0.175165, 0.174667, 0.173643, 0.172539, 0.173335, 0.177935, 0.237851", \ + "0.177701, 0.177203, 0.176179, 0.175075, 0.175871, 0.180471, 0.240387", \ + "0.237018, 0.236520, 0.235496, 0.234392, 0.235188, 0.239788, 0.299704" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.165200, 0.164757, 0.163732, 0.162389, 0.164621, 0.161635, 0.217307", \ + "0.165494, 0.165051, 0.164026, 0.162683, 0.164915, 0.161929, 0.217601", \ + "0.166853, 0.166410, 0.165385, 0.164042, 0.166274, 0.163288, 0.218960", \ + "0.168701, 0.168258, 0.167233, 0.165890, 0.168122, 0.165136, 0.220808", \ + "0.174169, 0.173726, 0.172701, 0.171358, 0.173590, 0.170604, 0.226276", \ + "0.176669, 0.176226, 0.175201, 0.173858, 0.176090, 0.173104, 0.228776", \ + "0.236017, 0.235574, 0.234549, 0.233206, 0.235438, 0.232452, 0.288124" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.004490, 0.004494, 0.004499, 0.004503, 0.004628, 0.004691, 0.005050"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.005531, 0.005537, 0.005542, 0.005548, 0.005560, 0.005643, 0.006244"); + } + } + } + bus(AB) { + bus_type : rf2_32x128_wm1_AB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001226; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.093256, 0.093871, 0.095194, 0.097790, 0.108421, 0.112564, 0.181634", \ + "0.093030, 0.093645, 0.094968, 0.097564, 0.108195, 0.112338, 0.181408", \ + "0.091792, 0.092407, 0.093730, 0.096326, 0.106957, 0.111100, 0.180170", \ + "0.089635, 0.090250, 0.091573, 0.094169, 0.104800, 0.108943, 0.178013", \ + "0.084173, 0.084788, 0.086111, 0.088707, 0.099338, 0.103481, 0.172551", \ + "0.081490, 0.082105, 0.083428, 0.086024, 0.096655, 0.100798, 0.169868", \ + "0.132119, 0.132734, 0.134057, 0.136653, 0.147284, 0.151427, 0.220497" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.093256, 0.093871, 0.095194, 0.097790, 0.108421, 0.112564, 0.181634", \ + "0.093030, 0.093645, 0.094968, 0.097564, 0.108195, 0.112338, 0.181408", \ + "0.091792, 0.092407, 0.093730, 0.096326, 0.106957, 0.111100, 0.180170", \ + "0.089635, 0.090250, 0.091573, 0.094169, 0.104800, 0.108943, 0.178013", \ + "0.084173, 0.084788, 0.086111, 0.088707, 0.099338, 0.103481, 0.172551", \ + "0.081490, 0.082105, 0.083428, 0.086024, 0.096655, 0.100798, 0.169868", \ + "0.132119, 0.132734, 0.134057, 0.136653, 0.147284, 0.151427, 0.220497" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.056593, 0.055888, 0.054634, 0.053398, 0.053707, 0.055456, 0.117654", \ + "0.056842, 0.056137, 0.054883, 0.053647, 0.053956, 0.055705, 0.117903", \ + "0.058182, 0.057477, 0.056223, 0.054987, 0.055296, 0.057045, 0.119243", \ + "0.060077, 0.059372, 0.058118, 0.056882, 0.057191, 0.058940, 0.121138", \ + "0.065904, 0.065199, 0.063945, 0.062709, 0.063018, 0.064767, 0.126965", \ + "0.068540, 0.067835, 0.066581, 0.065345, 0.065654, 0.067403, 0.129601", \ + "0.128098, 0.127393, 0.126139, 0.124903, 0.125212, 0.126961, 0.189159" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.057847, 0.057105, 0.056003, 0.054685, 0.054379, 0.053606, 0.114775", \ + "0.058097, 0.057355, 0.056253, 0.054935, 0.054629, 0.053856, 0.115025", \ + "0.059438, 0.058696, 0.057594, 0.056276, 0.055970, 0.055197, 0.116366", \ + "0.061333, 0.060591, 0.059489, 0.058171, 0.057865, 0.057092, 0.118261", \ + "0.067160, 0.066418, 0.065316, 0.063998, 0.063692, 0.062919, 0.124088", \ + "0.069799, 0.069057, 0.067955, 0.066637, 0.066331, 0.065558, 0.126727", \ + "0.129354, 0.128612, 0.127510, 0.126192, 0.125886, 0.125113, 0.186282" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.093256, 0.093871, 0.095194, 0.097790, 0.108421, 0.112564, 0.181634", \ + "0.093030, 0.093645, 0.094968, 0.097564, 0.108195, 0.112338, 0.181408", \ + "0.091792, 0.092407, 0.093730, 0.096326, 0.106957, 0.111100, 0.180170", \ + "0.089635, 0.090250, 0.091573, 0.094169, 0.104800, 0.108943, 0.178013", \ + "0.084173, 0.084788, 0.086111, 0.088707, 0.099338, 0.103481, 0.172551", \ + "0.081490, 0.082105, 0.083428, 0.086024, 0.096655, 0.100798, 0.169868", \ + "0.132119, 0.132734, 0.134057, 0.136653, 0.147284, 0.151427, 0.220497" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.093256, 0.093871, 0.095194, 0.097790, 0.108421, 0.112564, 0.181634", \ + "0.093030, 0.093645, 0.094968, 0.097564, 0.108195, 0.112338, 0.181408", \ + "0.091792, 0.092407, 0.093730, 0.096326, 0.106957, 0.111100, 0.180170", \ + "0.089635, 0.090250, 0.091573, 0.094169, 0.104800, 0.108943, 0.178013", \ + "0.084173, 0.084788, 0.086111, 0.088707, 0.099338, 0.103481, 0.172551", \ + "0.081490, 0.082105, 0.083428, 0.086024, 0.096655, 0.100798, 0.169868", \ + "0.132119, 0.132734, 0.134057, 0.136653, 0.147284, 0.151427, 0.220497" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.056593, 0.055888, 0.054634, 0.053398, 0.053707, 0.055456, 0.117654", \ + "0.056842, 0.056137, 0.054883, 0.053647, 0.053956, 0.055705, 0.117903", \ + "0.058182, 0.057477, 0.056223, 0.054987, 0.055296, 0.057045, 0.119243", \ + "0.060077, 0.059372, 0.058118, 0.056882, 0.057191, 0.058940, 0.121138", \ + "0.065904, 0.065199, 0.063945, 0.062709, 0.063018, 0.064767, 0.126965", \ + "0.068540, 0.067835, 0.066581, 0.065345, 0.065654, 0.067403, 0.129601", \ + "0.128098, 0.127393, 0.126139, 0.124903, 0.125212, 0.126961, 0.189159" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.057847, 0.057105, 0.056003, 0.054685, 0.054379, 0.053606, 0.114775", \ + "0.058097, 0.057355, 0.056253, 0.054935, 0.054629, 0.053856, 0.115025", \ + "0.059438, 0.058696, 0.057594, 0.056276, 0.055970, 0.055197, 0.116366", \ + "0.061333, 0.060591, 0.059489, 0.058171, 0.057865, 0.057092, 0.118261", \ + "0.067160, 0.066418, 0.065316, 0.063998, 0.063692, 0.062919, 0.124088", \ + "0.069799, 0.069057, 0.067955, 0.066637, 0.066331, 0.065558, 0.126727", \ + "0.129354, 0.128612, 0.127510, 0.126192, 0.125886, 0.125113, 0.186282" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.022322, 0.022345, 0.022367, 0.022389, 0.022412, 0.022475, 0.023120"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019683, 0.019713, 0.019719, 0.019739, 0.019884, 0.020075, 0.020900"); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.022322, 0.022345, 0.022367, 0.022389, 0.022412, 0.022475, 0.023120"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019683, 0.019713, 0.019719, 0.019739, 0.019884, 0.020075, 0.020900"); + } + } + } + bus(DB) { + bus_type : rf2_32x128_wm1_DB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : AB; + clocked_on : CLKB; + } + capacitance : 0.001920; + max_transition : 0.219000; + pin(DB[127]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[127])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[126]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[126])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[125]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[125])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[124]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[124])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[123]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[123])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[122]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[122])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[121]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[121])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[120]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[120])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[119]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[119])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[118]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[118])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[117]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[117])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[116]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[116])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[115]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[115])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[114]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[114])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[113]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[113])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[112]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[112])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[111]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[111])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[110]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[110])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[109]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[109])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[108]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[108])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[107]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[107])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[106]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[106])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[105]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[105])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[104]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[104])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[103]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[103])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[102]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[102])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[101]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[101])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[100]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[100])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[99]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[99])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[98]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[98])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[97]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[97])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[96]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[96])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[95]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[95])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[94]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[94])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[93]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[93])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[92]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[92])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[91]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[91])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[90]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[90])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[89]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[89])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[88]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[88])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[87]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[87])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[86]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[86])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[85]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[85])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[84]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[84])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[83]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[83])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[82]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[82])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[81]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[81])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[80]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[80])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[79]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[79])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[78]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[78])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[77]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[77])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[76]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[76])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[75]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[75])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[74]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[74])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[73]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[73])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[72]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[72])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[71]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[71])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[70]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[70])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[69]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[69])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[68]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[68])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[67]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[67])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[66]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[66])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[65]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[65])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[64]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[64])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[63]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[63])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[62]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[62])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[61]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[61])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[60]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[60])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[59]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[59])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[58]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[58])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[57]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[57])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[56]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[56])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[55]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[55])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[54]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[54])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[53]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[53])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[52]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[52])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[51]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[51])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[50]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[50])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[49]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[49])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[48]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[48])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[47]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[47])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[46]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[46])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[45]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[45])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[44]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[44])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[43]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[43])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[42]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[42])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[41]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[41])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[40]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[40])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[39]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[39])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[38]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[38])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[37]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[37])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[36]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[36])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[35]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[35])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[34]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[34])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[33]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[33])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[32]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[32])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[31]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[31])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[30]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[30])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[29]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[29])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[28]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[28])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[27]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[27])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[26]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[26])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[25]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[25])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[24]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[24])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[23]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[23])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[22]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[22])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[21]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[21])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[20]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[20])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[19]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[19])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[18]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[18])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[17]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[17])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[16]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[16])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[15]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[15])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[14]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[14])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[13]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[13])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[12]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[12])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[11]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[11])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[10]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[10])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[9]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[9])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[8]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[8])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[7]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[7])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[6]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[6])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[5]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[5])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[4]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[4])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[3]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[3])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[2]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[2])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[1]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[1])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(DB[0]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[0])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + } + bus(EMAA) { + bus_type : rf2_32x128_wm1_EMAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005859; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.766151, 0.766449, 0.767833, 0.769831, 0.776012, 0.778243, 0.838276", \ + "0.765819, 0.766117, 0.767501, 0.769499, 0.775680, 0.777911, 0.837944", \ + "0.764549, 0.764847, 0.766231, 0.768229, 0.774410, 0.776641, 0.836674", \ + "0.762844, 0.763142, 0.764526, 0.766524, 0.772705, 0.774936, 0.834969", \ + "0.756968, 0.757266, 0.758650, 0.760648, 0.766829, 0.769060, 0.829093", \ + "0.754323, 0.754621, 0.756005, 0.758003, 0.764184, 0.766415, 0.826448", \ + "0.803163, 0.803461, 0.804845, 0.806843, 0.813024, 0.815255, 0.875288" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.766151, 0.766449, 0.767833, 0.769831, 0.776012, 0.778243, 0.838276", \ + "0.765819, 0.766117, 0.767501, 0.769499, 0.775680, 0.777911, 0.837944", \ + "0.764549, 0.764847, 0.766231, 0.768229, 0.774410, 0.776641, 0.836674", \ + "0.762844, 0.763142, 0.764526, 0.766524, 0.772705, 0.774936, 0.834969", \ + "0.756968, 0.757266, 0.758650, 0.760648, 0.766829, 0.769060, 0.829093", \ + "0.754323, 0.754621, 0.756005, 0.758003, 0.764184, 0.766415, 0.826448", \ + "0.803163, 0.803461, 0.804845, 0.806843, 0.813024, 0.815255, 0.875288" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + } + } + pin(EMASA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002146; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.766151, 0.766449, 0.767833, 0.769831, 0.776012, 0.778243, 0.838276", \ + "0.765819, 0.766117, 0.767501, 0.769499, 0.775680, 0.777911, 0.837944", \ + "0.764549, 0.764847, 0.766231, 0.768229, 0.774410, 0.776641, 0.836674", \ + "0.762844, 0.763142, 0.764526, 0.766524, 0.772705, 0.774936, 0.834969", \ + "0.756968, 0.757266, 0.758650, 0.760648, 0.766829, 0.769060, 0.829093", \ + "0.754323, 0.754621, 0.756005, 0.758003, 0.764184, 0.766415, 0.826448", \ + "0.803163, 0.803461, 0.804845, 0.806843, 0.813024, 0.815255, 0.875288" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.766151, 0.766449, 0.767833, 0.769831, 0.776012, 0.778243, 0.838276", \ + "0.765819, 0.766117, 0.767501, 0.769499, 0.775680, 0.777911, 0.837944", \ + "0.764549, 0.764847, 0.766231, 0.768229, 0.774410, 0.776641, 0.836674", \ + "0.762844, 0.763142, 0.764526, 0.766524, 0.772705, 0.774936, 0.834969", \ + "0.756968, 0.757266, 0.758650, 0.760648, 0.766829, 0.769060, 0.829093", \ + "0.754323, 0.754621, 0.756005, 0.758003, 0.764184, 0.766415, 0.826448", \ + "0.803163, 0.803461, 0.804845, 0.806843, 0.813024, 0.815255, 0.875288" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + } + } + bus(EMAB) { + bus_type : rf2_32x128_wm1_EMAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005712; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.871760, 0.872058, 0.873442, 0.875440, 0.881621, 0.883852, 0.943885", \ + "0.871428, 0.871726, 0.873110, 0.875108, 0.881289, 0.883520, 0.943553", \ + "0.870158, 0.870456, 0.871840, 0.873838, 0.880019, 0.882250, 0.942283", \ + "0.868453, 0.868751, 0.870135, 0.872133, 0.878314, 0.880545, 0.940578", \ + "0.862577, 0.862875, 0.864259, 0.866257, 0.872438, 0.874669, 0.934702", \ + "0.859932, 0.860230, 0.861614, 0.863612, 0.869793, 0.872024, 0.932057", \ + "0.908772, 0.909070, 0.910454, 0.912452, 0.918633, 0.920864, 0.980897" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.871760, 0.872058, 0.873442, 0.875440, 0.881621, 0.883852, 0.943885", \ + "0.871428, 0.871726, 0.873110, 0.875108, 0.881289, 0.883520, 0.943553", \ + "0.870158, 0.870456, 0.871840, 0.873838, 0.880019, 0.882250, 0.942283", \ + "0.868453, 0.868751, 0.870135, 0.872133, 0.878314, 0.880545, 0.940578", \ + "0.862577, 0.862875, 0.864259, 0.866257, 0.872438, 0.874669, 0.934702", \ + "0.859932, 0.860230, 0.861614, 0.863612, 0.869793, 0.872024, 0.932057", \ + "0.908772, 0.909070, 0.910454, 0.912452, 0.918633, 0.920864, 0.980897" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "1.041402, 1.040814, 1.040470, 1.040468, 1.043915, 1.046071, 1.111140", \ + "1.041663, 1.041075, 1.040731, 1.040729, 1.044176, 1.046332, 1.111401", \ + "1.042971, 1.042383, 1.042039, 1.042037, 1.045484, 1.047640, 1.112709", \ + "1.044720, 1.044132, 1.043788, 1.043786, 1.047233, 1.049389, 1.114458", \ + "1.050984, 1.050396, 1.050052, 1.050050, 1.053497, 1.055653, 1.120722", \ + "1.053161, 1.052573, 1.052229, 1.052227, 1.055674, 1.057830, 1.122899", \ + "1.112331, 1.111743, 1.111399, 1.111397, 1.114844, 1.117000, 1.182069" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "1.041402, 1.040814, 1.040470, 1.040468, 1.043915, 1.046071, 1.111140", \ + "1.041663, 1.041075, 1.040731, 1.040729, 1.044176, 1.046332, 1.111401", \ + "1.042971, 1.042383, 1.042039, 1.042037, 1.045484, 1.047640, 1.112709", \ + "1.044720, 1.044132, 1.043788, 1.043786, 1.047233, 1.049389, 1.114458", \ + "1.050984, 1.050396, 1.050052, 1.050050, 1.053497, 1.055653, 1.120722", \ + "1.053161, 1.052573, 1.052229, 1.052227, 1.055674, 1.057830, 1.122899", \ + "1.112331, 1.111743, 1.111399, 1.111397, 1.114844, 1.117000, 1.182069" \ + ); + } + } + } + pin(TENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.000972; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.158396, 0.159015, 0.161220, 0.165612, 0.183599, 0.194377, 0.273412", \ + "0.158089, 0.158708, 0.160913, 0.165305, 0.183451, 0.194229, 0.273264", \ + "0.157019, 0.157638, 0.159843, 0.164235, 0.182055, 0.192832, 0.271867", \ + "0.154923, 0.155542, 0.157747, 0.162139, 0.179940, 0.190718, 0.269753", \ + "0.148539, 0.149158, 0.151363, 0.155755, 0.173740, 0.184518, 0.263553", \ + "0.148932, 0.150029, 0.151773, 0.156140, 0.171325, 0.182083, 0.261118", \ + "0.215081, 0.216177, 0.217921, 0.222289, 0.237158, 0.243862, 0.318600" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.158396, 0.159015, 0.161220, 0.165612, 0.183599, 0.194377, 0.273412", \ + "0.158089, 0.158708, 0.160913, 0.165305, 0.183451, 0.194229, 0.273264", \ + "0.157019, 0.157638, 0.159843, 0.164235, 0.182055, 0.192832, 0.271867", \ + "0.154923, 0.155542, 0.157747, 0.162139, 0.179940, 0.190718, 0.269753", \ + "0.148539, 0.149158, 0.151363, 0.155755, 0.173740, 0.184518, 0.263553", \ + "0.148932, 0.150029, 0.151773, 0.156140, 0.171325, 0.182083, 0.261118", \ + "0.215081, 0.216177, 0.217921, 0.222289, 0.237158, 0.243862, 0.318600" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.069479, 0.068661, 0.067452, 0.066020, 0.065744, 0.066997, 0.126709", \ + "0.069864, 0.069046, 0.067837, 0.066405, 0.066129, 0.067381, 0.127093", \ + "0.071102, 0.070283, 0.069075, 0.067642, 0.067366, 0.068619, 0.128331", \ + "0.073377, 0.072558, 0.071349, 0.069917, 0.069641, 0.070894, 0.130606", \ + "0.080156, 0.079338, 0.078129, 0.076696, 0.076420, 0.077672, 0.137384", \ + "0.083041, 0.082223, 0.081014, 0.079582, 0.079306, 0.080559, 0.140271", \ + "0.144203, 0.143385, 0.142176, 0.140744, 0.140467, 0.141719, 0.201431" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.069479, 0.068661, 0.067452, 0.066020, 0.065744, 0.066997, 0.126709", \ + "0.069864, 0.069046, 0.067837, 0.066405, 0.066129, 0.067381, 0.127093", \ + "0.071102, 0.070283, 0.069075, 0.067642, 0.067366, 0.068619, 0.128331", \ + "0.073377, 0.072558, 0.071349, 0.069917, 0.069641, 0.070894, 0.130606", \ + "0.080156, 0.079338, 0.078129, 0.076696, 0.076420, 0.077672, 0.137384", \ + "0.083041, 0.082223, 0.081014, 0.079582, 0.079306, 0.080559, 0.140271", \ + "0.144203, 0.143385, 0.142176, 0.140744, 0.140467, 0.141719, 0.201431" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019566, 0.019586, 0.019605, 0.019625, 0.019644, 0.019664, 0.019995"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019107, 0.019126, 0.019145, 0.019165, 0.019206, 0.019225, 0.019427"); + } + } + } + pin(TCENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001582; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.073793, 0.074331, 0.075277, 0.077740, 0.084554, 0.086557, 0.148972", \ + "0.073865, 0.074403, 0.075349, 0.077812, 0.084626, 0.086629, 0.149044", \ + "0.073912, 0.074450, 0.075396, 0.077859, 0.084673, 0.086676, 0.149091", \ + "0.075206, 0.075744, 0.076690, 0.079153, 0.085967, 0.087970, 0.150385", \ + "0.079734, 0.080272, 0.081218, 0.083681, 0.090495, 0.092498, 0.154913", \ + "0.081749, 0.082287, 0.083233, 0.085696, 0.092510, 0.094513, 0.156928", \ + "0.147674, 0.148212, 0.149158, 0.151621, 0.158435, 0.160438, 0.222853" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.073297, 0.073912, 0.075324, 0.077659, 0.085436, 0.089194, 0.152943", \ + "0.073040, 0.073655, 0.075067, 0.077402, 0.085179, 0.088937, 0.152686", \ + "0.071805, 0.072420, 0.073832, 0.076167, 0.083944, 0.087702, 0.151451", \ + "0.069887, 0.070502, 0.071914, 0.074249, 0.082026, 0.085784, 0.149533", \ + "0.068880, 0.069909, 0.071404, 0.073373, 0.080722, 0.085147, 0.146922", \ + "0.070895, 0.071924, 0.073419, 0.075388, 0.082737, 0.087162, 0.148937", \ + "0.136820, 0.137849, 0.139344, 0.141313, 0.148662, 0.153087, 0.214862" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.041686, 0.041066, 0.039912, 0.037670, 0.032617, 0.030823, 0.082740", \ + "0.042034, 0.041414, 0.040260, 0.038018, 0.032918, 0.031124, 0.083041", \ + "0.043159, 0.042539, 0.041385, 0.039143, 0.034205, 0.032411, 0.084328", \ + "0.045229, 0.044609, 0.043455, 0.041213, 0.035941, 0.034147, 0.086064", \ + "0.051246, 0.050626, 0.049472, 0.047230, 0.041037, 0.039243, 0.091160", \ + "0.054026, 0.053406, 0.052252, 0.050010, 0.043628, 0.041574, 0.093191", \ + "0.115604, 0.114984, 0.113830, 0.111588, 0.105206, 0.103152, 0.153256" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.041261, 0.040561, 0.039135, 0.036906, 0.029821, 0.025356, 0.077009", \ + "0.041609, 0.040909, 0.039483, 0.037254, 0.030169, 0.025704, 0.077357", \ + "0.042734, 0.042034, 0.040608, 0.038379, 0.031294, 0.026829, 0.078482", \ + "0.044804, 0.044104, 0.042678, 0.040449, 0.033364, 0.028899, 0.080552", \ + "0.050821, 0.050121, 0.048695, 0.046466, 0.039381, 0.034916, 0.086569", \ + "0.053601, 0.052901, 0.051475, 0.049246, 0.042161, 0.037696, 0.089349", \ + "0.115179, 0.114479, 0.113053, 0.110824, 0.103739, 0.099274, 0.150927" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.885024", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.885285", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.886593", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.888342", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.894606", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.896783", \ + "0.886215, 0.885627, 0.885283, 0.885281, 0.888728, 0.890884, 0.901203" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.293757, 0.292137, 0.290737, 0.289837, 0.281157, 0.278487, 0.268037", \ + "0.296997, 0.295377, 0.293977, 0.293077, 0.284397, 0.281727, 0.271277", \ + "0.299807, 0.298187, 0.296787, 0.295887, 0.287207, 0.284537, 0.274087", \ + "0.301607, 0.299987, 0.298587, 0.297687, 0.289007, 0.286337, 0.275887", \ + "0.318957, 0.317337, 0.315937, 0.315037, 0.306357, 0.303687, 0.293237", \ + "0.324297, 0.322677, 0.321277, 0.320377, 0.311697, 0.309027, 0.298577", \ + "0.345197, 0.343577, 0.342177, 0.341277, 0.332597, 0.329927, 0.319477" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.039784, 0.040266, 0.040577, 0.040617, 0.040658, 0.040699, 0.041411"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.071846, 0.072208, 0.073170, 0.073282, 0.073352, 0.073426, 0.073971"); + } + } + } + bus(TAA) { + bus_type : rf2_32x128_wm1_TAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001358; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090964, 0.091024, 0.092431, 0.094919, 0.104693, 0.110770, 0.177481", \ + "0.090658, 0.090718, 0.092125, 0.094613, 0.104387, 0.110464, 0.177175", \ + "0.089417, 0.089477, 0.090884, 0.093372, 0.103146, 0.109223, 0.175934", \ + "0.087493, 0.087553, 0.088960, 0.091448, 0.101222, 0.107299, 0.174010", \ + "0.081105, 0.081165, 0.082572, 0.085060, 0.094834, 0.100911, 0.167622", \ + "0.078761, 0.078821, 0.080228, 0.082716, 0.092490, 0.098567, 0.165278", \ + "0.127175, 0.127235, 0.128642, 0.131130, 0.140904, 0.146981, 0.213692" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090964, 0.091024, 0.092431, 0.094919, 0.104693, 0.110770, 0.177481", \ + "0.090658, 0.090718, 0.092125, 0.094613, 0.104387, 0.110464, 0.177175", \ + "0.089417, 0.089477, 0.090884, 0.093372, 0.103146, 0.109223, 0.175934", \ + "0.087493, 0.087553, 0.088960, 0.091448, 0.101222, 0.107299, 0.174010", \ + "0.081105, 0.081165, 0.082572, 0.085060, 0.094834, 0.100911, 0.167622", \ + "0.078761, 0.078821, 0.080228, 0.082716, 0.092490, 0.098567, 0.165278", \ + "0.127175, 0.127235, 0.128642, 0.131130, 0.140904, 0.146981, 0.213692" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062069, 0.061373, 0.060122, 0.058863, 0.059493, 0.060906, 0.120167", \ + "0.062418, 0.061722, 0.060471, 0.059212, 0.059842, 0.061255, 0.120516", \ + "0.063544, 0.062848, 0.061597, 0.060338, 0.060968, 0.062381, 0.121642", \ + "0.065612, 0.064916, 0.063665, 0.062406, 0.063036, 0.064449, 0.123710", \ + "0.071774, 0.071078, 0.069827, 0.068568, 0.069198, 0.070611, 0.129872", \ + "0.074398, 0.073702, 0.072451, 0.071192, 0.071822, 0.073235, 0.132496", \ + "0.134976, 0.134280, 0.133029, 0.131770, 0.132400, 0.133813, 0.193074" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.063163, 0.062419, 0.061320, 0.060018, 0.059767, 0.058994, 0.117650", \ + "0.063513, 0.062769, 0.061670, 0.060368, 0.060117, 0.059344, 0.118000", \ + "0.064638, 0.063894, 0.062795, 0.061493, 0.061242, 0.060469, 0.119125", \ + "0.066706, 0.065962, 0.064863, 0.063561, 0.063310, 0.062537, 0.121193", \ + "0.072869, 0.072125, 0.071026, 0.069724, 0.069473, 0.068700, 0.127356", \ + "0.075492, 0.074748, 0.073649, 0.072347, 0.072096, 0.071323, 0.129979", \ + "0.136071, 0.135327, 0.134228, 0.132926, 0.132675, 0.131902, 0.190558" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090964, 0.091024, 0.092431, 0.094919, 0.104693, 0.110770, 0.177481", \ + "0.090658, 0.090718, 0.092125, 0.094613, 0.104387, 0.110464, 0.177175", \ + "0.089417, 0.089477, 0.090884, 0.093372, 0.103146, 0.109223, 0.175934", \ + "0.087493, 0.087553, 0.088960, 0.091448, 0.101222, 0.107299, 0.174010", \ + "0.081105, 0.081165, 0.082572, 0.085060, 0.094834, 0.100911, 0.167622", \ + "0.078761, 0.078821, 0.080228, 0.082716, 0.092490, 0.098567, 0.165278", \ + "0.127175, 0.127235, 0.128642, 0.131130, 0.140904, 0.146981, 0.213692" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090964, 0.091024, 0.092431, 0.094919, 0.104693, 0.110770, 0.177481", \ + "0.090658, 0.090718, 0.092125, 0.094613, 0.104387, 0.110464, 0.177175", \ + "0.089417, 0.089477, 0.090884, 0.093372, 0.103146, 0.109223, 0.175934", \ + "0.087493, 0.087553, 0.088960, 0.091448, 0.101222, 0.107299, 0.174010", \ + "0.081105, 0.081165, 0.082572, 0.085060, 0.094834, 0.100911, 0.167622", \ + "0.078761, 0.078821, 0.080228, 0.082716, 0.092490, 0.098567, 0.165278", \ + "0.127175, 0.127235, 0.128642, 0.131130, 0.140904, 0.146981, 0.213692" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062069, 0.061373, 0.060122, 0.058863, 0.059493, 0.060906, 0.120167", \ + "0.062418, 0.061722, 0.060471, 0.059212, 0.059842, 0.061255, 0.120516", \ + "0.063544, 0.062848, 0.061597, 0.060338, 0.060968, 0.062381, 0.121642", \ + "0.065612, 0.064916, 0.063665, 0.062406, 0.063036, 0.064449, 0.123710", \ + "0.071774, 0.071078, 0.069827, 0.068568, 0.069198, 0.070611, 0.129872", \ + "0.074398, 0.073702, 0.072451, 0.071192, 0.071822, 0.073235, 0.132496", \ + "0.134976, 0.134280, 0.133029, 0.131770, 0.132400, 0.133813, 0.193074" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.063163, 0.062419, 0.061320, 0.060018, 0.059767, 0.058994, 0.117650", \ + "0.063513, 0.062769, 0.061670, 0.060368, 0.060117, 0.059344, 0.118000", \ + "0.064638, 0.063894, 0.062795, 0.061493, 0.061242, 0.060469, 0.119125", \ + "0.066706, 0.065962, 0.064863, 0.063561, 0.063310, 0.062537, 0.121193", \ + "0.072869, 0.072125, 0.071026, 0.069724, 0.069473, 0.068700, 0.127356", \ + "0.075492, 0.074748, 0.073649, 0.072347, 0.072096, 0.071323, 0.129979", \ + "0.136071, 0.135327, 0.134228, 0.132926, 0.132675, 0.131902, 0.190558" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019225, 0.019244, 0.019263, 0.019282, 0.019302, 0.019418, 0.020007"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.016535, 0.016555, 0.016583, 0.016599, 0.016772, 0.016938, 0.017644"); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019225, 0.019244, 0.019263, 0.019282, 0.019302, 0.019418, 0.020007"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.016535, 0.016555, 0.016583, 0.016599, 0.016772, 0.016938, 0.017644"); + } + } + } + pin(TENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001188; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.358905, 0.359884, 0.363011, 0.368125, 0.386650, 0.393922, 0.471686", \ + "0.358450, 0.359429, 0.362556, 0.367670, 0.386195, 0.393467, 0.471231", \ + "0.357909, 0.358888, 0.362015, 0.367129, 0.385654, 0.392926, 0.470690", \ + "0.355208, 0.356187, 0.359314, 0.364428, 0.382953, 0.390225, 0.467989", \ + "0.349672, 0.350651, 0.353778, 0.358892, 0.377417, 0.384689, 0.462453", \ + "0.348715, 0.350111, 0.352445, 0.357845, 0.374401, 0.381673, 0.459437", \ + "0.414729, 0.416125, 0.418459, 0.423859, 0.438956, 0.444906, 0.516285" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.358905, 0.359884, 0.363011, 0.368125, 0.386650, 0.393922, 0.471686", \ + "0.358450, 0.359429, 0.362556, 0.367670, 0.386195, 0.393467, 0.471231", \ + "0.357909, 0.358888, 0.362015, 0.367129, 0.385654, 0.392926, 0.470690", \ + "0.355208, 0.356187, 0.359314, 0.364428, 0.382953, 0.390225, 0.467989", \ + "0.349672, 0.350651, 0.353778, 0.358892, 0.377417, 0.384689, 0.462453", \ + "0.348715, 0.350111, 0.352445, 0.357845, 0.374401, 0.381673, 0.459437", \ + "0.414729, 0.416125, 0.418459, 0.423859, 0.438956, 0.444906, 0.516285" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.183616, 0.183069, 0.181942, 0.180728, 0.181885, 0.186663, 0.247096", \ + "0.183940, 0.183392, 0.182266, 0.181051, 0.182208, 0.186987, 0.247419", \ + "0.185437, 0.184889, 0.183763, 0.182548, 0.183703, 0.188484, 0.248917", \ + "0.187479, 0.186931, 0.185804, 0.184590, 0.185736, 0.190526, 0.250958", \ + "0.193483, 0.192936, 0.191809, 0.190595, 0.191751, 0.196530, 0.256963", \ + "0.196273, 0.195725, 0.194599, 0.193384, 0.194501, 0.199320, 0.259753", \ + "0.256047, 0.255499, 0.254373, 0.253158, 0.254309, 0.259094, 0.319526" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.183616, 0.183069, 0.181942, 0.180728, 0.181885, 0.186663, 0.247096", \ + "0.183940, 0.183392, 0.182266, 0.181051, 0.182208, 0.186987, 0.247419", \ + "0.185437, 0.184889, 0.183763, 0.182548, 0.183703, 0.188484, 0.248917", \ + "0.187479, 0.186931, 0.185804, 0.184590, 0.185736, 0.190526, 0.250958", \ + "0.193483, 0.192936, 0.191809, 0.190595, 0.191751, 0.196530, 0.256963", \ + "0.196273, 0.195725, 0.194599, 0.193384, 0.194501, 0.199320, 0.259753", \ + "0.256047, 0.255499, 0.254373, 0.253158, 0.254309, 0.259094, 0.319526" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.603028, 0.603631, 0.604235, 0.604839, 0.605443, 0.606049, 0.606655"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.604085, 0.605152, 0.605279, 0.605884, 0.606443, 0.607616, 0.608199"); + } + } + } + pin(TCENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001576; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.077944, 0.078976, 0.079506, 0.082388, 0.089591, 0.092412, 0.155097", \ + "0.078117, 0.079149, 0.079679, 0.082561, 0.089764, 0.092585, 0.155270", \ + "0.078452, 0.079484, 0.080014, 0.082896, 0.090099, 0.092920, 0.155605", \ + "0.080076, 0.081108, 0.081638, 0.084520, 0.091723, 0.094544, 0.157229", \ + "0.084806, 0.085838, 0.086368, 0.089250, 0.096453, 0.099274, 0.161959", \ + "0.087249, 0.088281, 0.088811, 0.091693, 0.098896, 0.101717, 0.164402", \ + "0.152822, 0.153854, 0.154384, 0.157266, 0.164469, 0.167290, 0.229975" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.075956, 0.077190, 0.078326, 0.081326, 0.089303, 0.093321, 0.156756", \ + "0.075720, 0.076954, 0.078090, 0.081090, 0.089067, 0.093085, 0.156520", \ + "0.074461, 0.075695, 0.076831, 0.079831, 0.087808, 0.091826, 0.155261", \ + "0.072310, 0.073544, 0.074680, 0.077680, 0.085657, 0.089675, 0.153110", \ + "0.074513, 0.075621, 0.076542, 0.079506, 0.087659, 0.091813, 0.155476", \ + "0.076958, 0.078066, 0.078987, 0.081951, 0.090104, 0.094258, 0.157921", \ + "0.142529, 0.143637, 0.144558, 0.147522, 0.155675, 0.159829, 0.223492" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.043867, 0.043188, 0.042245, 0.039814, 0.035708, 0.032502, 0.082613", \ + "0.044101, 0.043422, 0.042479, 0.040048, 0.035942, 0.032736, 0.082847", \ + "0.045397, 0.044718, 0.043775, 0.041344, 0.037238, 0.034032, 0.084143", \ + "0.046936, 0.046257, 0.045314, 0.042883, 0.038777, 0.035571, 0.085682", \ + "0.051637, 0.050958, 0.050015, 0.047584, 0.043478, 0.040272, 0.090383", \ + "0.053624, 0.052945, 0.052002, 0.049571, 0.045465, 0.042259, 0.092370", \ + "0.112537, 0.111858, 0.110915, 0.108484, 0.104378, 0.101172, 0.151283" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.036056, 0.035409, 0.034370, 0.031457, 0.023776, 0.019772, 0.071059", \ + "0.036330, 0.035683, 0.034644, 0.031731, 0.024050, 0.020046, 0.071059", \ + "0.037674, 0.037027, 0.035988, 0.033075, 0.025394, 0.021390, 0.071059", \ + "0.039568, 0.038921, 0.037882, 0.034969, 0.027288, 0.023284, 0.071369", \ + "0.045378, 0.044731, 0.043692, 0.040779, 0.033098, 0.029094, 0.077179", \ + "0.048098, 0.047451, 0.046412, 0.043499, 0.035818, 0.031814, 0.079899", \ + "0.109246, 0.108599, 0.107560, 0.104647, 0.096966, 0.092962, 0.141047" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.039784, 0.040266, 0.040577, 0.040617, 0.040658, 0.040699, 0.041411"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.071846, 0.072208, 0.073170, 0.073282, 0.073352, 0.073426, 0.073971"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.885024", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.885285", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.886593", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.888342", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.894606", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.896783", \ + "0.886215, 0.885627, 0.885283, 0.885281, 0.888728, 0.890884, 0.901203" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.293757, 0.292137, 0.290737, 0.289837, 0.281157, 0.278487, 0.268037", \ + "0.296997, 0.295377, 0.293977, 0.293077, 0.284397, 0.281727, 0.271277", \ + "0.299807, 0.298187, 0.296787, 0.295887, 0.287207, 0.284537, 0.274087", \ + "0.301607, 0.299987, 0.298587, 0.297687, 0.289007, 0.286337, 0.275887", \ + "0.318957, 0.317337, 0.315937, 0.315037, 0.306357, 0.303687, 0.293237", \ + "0.324297, 0.322677, 0.321277, 0.320377, 0.311697, 0.309027, 0.298577", \ + "0.345197, 0.343577, 0.342177, 0.341277, 0.332597, 0.329927, 0.319477" \ + ); + } + } + } + bus(TWENB) { + bus_type : rf2_32x128_wm1_TWENB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001485; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015057, 0.015057, 0.015057, 0.015057, 0.021748, 0.024880, 0.092024", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.021529, 0.024661, 0.091805", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.020209, 0.023341, 0.090485", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.018344, 0.021476, 0.088620", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.015057, 0.016265, 0.083409", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.015057, 0.015057, 0.080582", \ + "0.069807, 0.069807, 0.069807, 0.069807, 0.069807, 0.069807, 0.130769" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015057, 0.015057, 0.015057, 0.015057, 0.018063, 0.022742, 0.091904", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.017835, 0.022514, 0.091676", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.016470, 0.021149, 0.090311", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.015057, 0.019348, 0.088510", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.015057, 0.015057, 0.083229", \ + "0.015057, 0.015057, 0.015057, 0.015057, 0.015057, 0.015057, 0.080462", \ + "0.069807, 0.069807, 0.069807, 0.069807, 0.069807, 0.069807, 0.130648" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166924, 0.166426, 0.165402, 0.164298, 0.165094, 0.169694, 0.229610", \ + "0.167218, 0.166720, 0.165696, 0.164592, 0.165388, 0.169988, 0.229904", \ + "0.168579, 0.168081, 0.167057, 0.165953, 0.166749, 0.171349, 0.231265", \ + "0.170435, 0.169937, 0.168913, 0.167809, 0.168605, 0.173205, 0.233121", \ + "0.175894, 0.175396, 0.174372, 0.173268, 0.174064, 0.178664, 0.238580", \ + "0.178430, 0.177932, 0.176908, 0.175804, 0.176600, 0.181200, 0.241116", \ + "0.237747, 0.237249, 0.236225, 0.235121, 0.235917, 0.240517, 0.300433" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.165929, 0.165486, 0.164461, 0.163118, 0.165350, 0.162364, 0.218036", \ + "0.166223, 0.165780, 0.164755, 0.163412, 0.165644, 0.162658, 0.218330", \ + "0.167582, 0.167139, 0.166114, 0.164771, 0.167003, 0.164017, 0.219689", \ + "0.169430, 0.168987, 0.167962, 0.166619, 0.168851, 0.165865, 0.221537", \ + "0.174898, 0.174455, 0.173430, 0.172087, 0.174319, 0.171333, 0.227005", \ + "0.177398, 0.176955, 0.175930, 0.174587, 0.176819, 0.173833, 0.229505", \ + "0.236746, 0.236303, 0.235278, 0.233935, 0.236167, 0.233181, 0.288853" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.004473, 0.004478, 0.004482, 0.004488, 0.004539, 0.004721, 0.005052"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.005524, 0.005530, 0.005535, 0.005541, 0.005556, 0.005830, 0.006059"); + } + } + } + bus(TAB) { + bus_type : rf2_32x128_wm1_TAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001369; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.096956, 0.097571, 0.098894, 0.101490, 0.112121, 0.116264, 0.185334", \ + "0.096730, 0.097345, 0.098668, 0.101264, 0.111895, 0.116038, 0.185108", \ + "0.095492, 0.096107, 0.097430, 0.100026, 0.110657, 0.114800, 0.183870", \ + "0.093335, 0.093950, 0.095273, 0.097869, 0.108500, 0.112643, 0.181713", \ + "0.087873, 0.088488, 0.089811, 0.092407, 0.103038, 0.107181, 0.176251", \ + "0.085190, 0.085805, 0.087128, 0.089724, 0.100355, 0.104498, 0.173568", \ + "0.135819, 0.136434, 0.137757, 0.140353, 0.150984, 0.155127, 0.224197" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.096956, 0.097571, 0.098894, 0.101490, 0.112121, 0.116264, 0.185334", \ + "0.096730, 0.097345, 0.098668, 0.101264, 0.111895, 0.116038, 0.185108", \ + "0.095492, 0.096107, 0.097430, 0.100026, 0.110657, 0.114800, 0.183870", \ + "0.093335, 0.093950, 0.095273, 0.097869, 0.108500, 0.112643, 0.181713", \ + "0.087873, 0.088488, 0.089811, 0.092407, 0.103038, 0.107181, 0.176251", \ + "0.085190, 0.085805, 0.087128, 0.089724, 0.100355, 0.104498, 0.173568", \ + "0.135819, 0.136434, 0.137757, 0.140353, 0.150984, 0.155127, 0.224197" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.056593, 0.055888, 0.054634, 0.053398, 0.053707, 0.055456, 0.117654", \ + "0.056842, 0.056137, 0.054883, 0.053647, 0.053956, 0.055705, 0.117903", \ + "0.058182, 0.057477, 0.056223, 0.054987, 0.055296, 0.057045, 0.119243", \ + "0.060077, 0.059372, 0.058118, 0.056882, 0.057191, 0.058940, 0.121138", \ + "0.065904, 0.065199, 0.063945, 0.062709, 0.063018, 0.064767, 0.126965", \ + "0.068540, 0.067835, 0.066581, 0.065345, 0.065654, 0.067403, 0.129601", \ + "0.128098, 0.127393, 0.126139, 0.124903, 0.125212, 0.126961, 0.189159" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.057847, 0.057105, 0.056003, 0.054685, 0.054379, 0.053606, 0.114775", \ + "0.058097, 0.057355, 0.056253, 0.054935, 0.054629, 0.053856, 0.115025", \ + "0.059438, 0.058696, 0.057594, 0.056276, 0.055970, 0.055197, 0.116366", \ + "0.061333, 0.060591, 0.059489, 0.058171, 0.057865, 0.057092, 0.118261", \ + "0.067160, 0.066418, 0.065316, 0.063998, 0.063692, 0.062919, 0.124088", \ + "0.069799, 0.069057, 0.067955, 0.066637, 0.066331, 0.065558, 0.126727", \ + "0.129354, 0.128612, 0.127510, 0.126192, 0.125886, 0.125113, 0.186282" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.096956, 0.097571, 0.098894, 0.101490, 0.112121, 0.116264, 0.185334", \ + "0.096730, 0.097345, 0.098668, 0.101264, 0.111895, 0.116038, 0.185108", \ + "0.095492, 0.096107, 0.097430, 0.100026, 0.110657, 0.114800, 0.183870", \ + "0.093335, 0.093950, 0.095273, 0.097869, 0.108500, 0.112643, 0.181713", \ + "0.087873, 0.088488, 0.089811, 0.092407, 0.103038, 0.107181, 0.176251", \ + "0.085190, 0.085805, 0.087128, 0.089724, 0.100355, 0.104498, 0.173568", \ + "0.135819, 0.136434, 0.137757, 0.140353, 0.150984, 0.155127, 0.224197" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.096956, 0.097571, 0.098894, 0.101490, 0.112121, 0.116264, 0.185334", \ + "0.096730, 0.097345, 0.098668, 0.101264, 0.111895, 0.116038, 0.185108", \ + "0.095492, 0.096107, 0.097430, 0.100026, 0.110657, 0.114800, 0.183870", \ + "0.093335, 0.093950, 0.095273, 0.097869, 0.108500, 0.112643, 0.181713", \ + "0.087873, 0.088488, 0.089811, 0.092407, 0.103038, 0.107181, 0.176251", \ + "0.085190, 0.085805, 0.087128, 0.089724, 0.100355, 0.104498, 0.173568", \ + "0.135819, 0.136434, 0.137757, 0.140353, 0.150984, 0.155127, 0.224197" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.056593, 0.055888, 0.054634, 0.053398, 0.053707, 0.055456, 0.117654", \ + "0.056842, 0.056137, 0.054883, 0.053647, 0.053956, 0.055705, 0.117903", \ + "0.058182, 0.057477, 0.056223, 0.054987, 0.055296, 0.057045, 0.119243", \ + "0.060077, 0.059372, 0.058118, 0.056882, 0.057191, 0.058940, 0.121138", \ + "0.065904, 0.065199, 0.063945, 0.062709, 0.063018, 0.064767, 0.126965", \ + "0.068540, 0.067835, 0.066581, 0.065345, 0.065654, 0.067403, 0.129601", \ + "0.128098, 0.127393, 0.126139, 0.124903, 0.125212, 0.126961, 0.189159" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.057847, 0.057105, 0.056003, 0.054685, 0.054379, 0.053606, 0.114775", \ + "0.058097, 0.057355, 0.056253, 0.054935, 0.054629, 0.053856, 0.115025", \ + "0.059438, 0.058696, 0.057594, 0.056276, 0.055970, 0.055197, 0.116366", \ + "0.061333, 0.060591, 0.059489, 0.058171, 0.057865, 0.057092, 0.118261", \ + "0.067160, 0.066418, 0.065316, 0.063998, 0.063692, 0.062919, 0.124088", \ + "0.069799, 0.069057, 0.067955, 0.066637, 0.066331, 0.065558, 0.126727", \ + "0.129354, 0.128612, 0.127510, 0.126192, 0.125886, 0.125113, 0.186282" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.022322, 0.022345, 0.022367, 0.022389, 0.022412, 0.022475, 0.023120"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019683, 0.019713, 0.019719, 0.019739, 0.019884, 0.020075, 0.020900"); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.022322, 0.022345, 0.022367, 0.022389, 0.022412, 0.022475, 0.023120"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019683, 0.019713, 0.019719, 0.019739, 0.019884, 0.020075, 0.020900"); + } + } + } + bus(TDB) { + bus_type : rf2_32x128_wm1_TDB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : TAB; + clocked_on : CLKB; + } + capacitance : 0.001590; + max_transition : 0.219000; + pin(TDB[127]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[127])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[126]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[126])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[125]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[125])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[124]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[124])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[123]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[123])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[122]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[122])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[121]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[121])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[120]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[120])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[119]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[119])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[118]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[118])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[117]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[117])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[116]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[116])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[115]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[115])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[114]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[114])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[113]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[113])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[112]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[112])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[111]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[111])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[110]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[110])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[109]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[109])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[108]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[108])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[107]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[107])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[106]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[106])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[105]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[105])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[104]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[104])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[103]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[103])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[102]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[102])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[101]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[101])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[100]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[100])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[99]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[99])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[98]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[98])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[97]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[97])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[96]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[96])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[95]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[95])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[94]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[94])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[93]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[93])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[92]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[92])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[91]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[91])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[90]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[90])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[89]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[89])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[88]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[88])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[87]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[87])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[86]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[86])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[85]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[85])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[84]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[84])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[83]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[83])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[82]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[82])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[81]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[81])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[80]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[80])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[79]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[79])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[78]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[78])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[77]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[77])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[76]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[76])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[75]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[75])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[74]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[74])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[73]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[73])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[72]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[72])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[71]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[71])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[70]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[70])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[69]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[69])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[68]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[68])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[67]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[67])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[66]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[66])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[65]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[65])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[64]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[64])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[63]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[63])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[62]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[62])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[61]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[61])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[60]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[60])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[59]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[59])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[58]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[58])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[57]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[57])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[56]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[56])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[55]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[55])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[54]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[54])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[53]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[53])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[52]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[52])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[51]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[51])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[50]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[50])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[49]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[49])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[48]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[48])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[47]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[47])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[46]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[46])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[45]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[45])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[44]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[44])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[43]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[43])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[42]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[42])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[41]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[41])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[40]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[40])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[39]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[39])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[38]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[38])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[37]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[37])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[36]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[36])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[35]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[35])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[34]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[34])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[33]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[33])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[32]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[32])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[31]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[31])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[30]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[30])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[29]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[29])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[28]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[28])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[27]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[27])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[26]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[26])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[25]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[25])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[24]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[24])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[23]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[23])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[22]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[22])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[21]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[21])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[20]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[20])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[19]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[19])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[18]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[18])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[17]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[17])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[16]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[16])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[15]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[15])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[14]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[14])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[13]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[13])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[12]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[12])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[11]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[11])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[10]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[10])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[9]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[9])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[8]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[8])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[7]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[7])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[6]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[6])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[5]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[5])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[4]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[4])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[3]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[3])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[2]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[2])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[1]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[1])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(TDB[0]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.015828, 0.016522, 0.018518, 0.019544, 0.025778, 0.029977, 0.094190", \ + "0.015583, 0.016277, 0.018273, 0.019299, 0.025533, 0.029732, 0.093945", \ + "0.014242, 0.014936, 0.016932, 0.017958, 0.024192, 0.028391, 0.092604", \ + "0.012436, 0.013130, 0.015126, 0.016152, 0.022386, 0.026585, 0.090798", \ + "0.007096, 0.007790, 0.009786, 0.010812, 0.017046, 0.021245, 0.085458", \ + "0.005915, 0.005915, 0.007020, 0.008046, 0.014280, 0.018479, 0.082692", \ + "0.060665, 0.060665, 0.060665, 0.060665, 0.064505, 0.068704, 0.132917" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.020028, 0.020113, 0.021727, 0.024263, 0.032416, 0.037432, 0.102832", \ + "0.019756, 0.019841, 0.021455, 0.023991, 0.032144, 0.037160, 0.102560", \ + "0.018433, 0.018518, 0.020132, 0.022668, 0.030821, 0.035837, 0.101237", \ + "0.016590, 0.016675, 0.018289, 0.020825, 0.028978, 0.033994, 0.099394", \ + "0.011352, 0.011437, 0.013051, 0.015587, 0.023740, 0.028756, 0.094156", \ + "0.008584, 0.008669, 0.010283, 0.012819, 0.020972, 0.025988, 0.091388", \ + "0.060665, 0.060665, 0.060665, 0.062959, 0.071112, 0.076128, 0.141528" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[0])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + } + pin(RET1N) { + direction : input; + always_on : true; + related_power_pin : "VDDCE"; + related_ground_pin : "VSSE"; + capacitance : 0.003513; + max_transition : 0.219000; + internal_power() { + when : "((!DFTRAMBYP&CENA&TENA)|(!DFTRAMBYP&TCENA&!TENA))&((!DFTRAMBYP&CENB&TENB)|(!DFTRAMBYP&TCENB&!TENB))"; + related_pg_pin : "VDDCE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("4.295793, 4.296223, 4.296425, 4.300714, 4.305018, 4.309323, 4.314587"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.645334, 0.645507, 0.645805, 0.646142, 0.646788, 0.647301, 0.648817"); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019486, 0.019744, 0.019876, 0.020597, 0.022398, 0.023330, 0.025501", \ + "0.019529, 0.019787, 0.019920, 0.020640, 0.022441, 0.023271, 0.025442", \ + "0.019613, 0.019871, 0.020003, 0.020724, 0.022525, 0.023230, 0.025214", \ + "0.020019, 0.020277, 0.020409, 0.021130, 0.022931, 0.023636, 0.025620", \ + "0.021201, 0.021459, 0.021592, 0.022312, 0.024113, 0.024818, 0.026802", \ + "0.021812, 0.022070, 0.022203, 0.022923, 0.024724, 0.025429, 0.027413", \ + "0.024518, 0.024776, 0.024908, 0.025629, 0.027430, 0.028135, 0.030119" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.885024", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.885285", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.886593", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.888342", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.894606", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.896783", \ + "0.886215, 0.885627, 0.885283, 0.885281, 0.888728, 0.890884, 0.901203" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019486, 0.019744, 0.019876, 0.020597, 0.022398, 0.023330, 0.025501", \ + "0.019529, 0.019787, 0.019920, 0.020640, 0.022441, 0.023271, 0.025442", \ + "0.019613, 0.019871, 0.020003, 0.020724, 0.022525, 0.023230, 0.025214", \ + "0.020019, 0.020277, 0.020409, 0.021130, 0.022931, 0.023636, 0.025620", \ + "0.021201, 0.021459, 0.021592, 0.022312, 0.024113, 0.024818, 0.026802", \ + "0.021812, 0.022070, 0.022203, 0.022923, 0.024724, 0.025429, 0.027413", \ + "0.024518, 0.024776, 0.024908, 0.025629, 0.027430, 0.028135, 0.030119" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.018448, 0.018583, 0.018831, 0.019435, 0.021359, 0.022298, 0.024548", \ + "0.018466, 0.018601, 0.018837, 0.019453, 0.021295, 0.022234, 0.024484", \ + "0.018478, 0.018612, 0.018849, 0.019465, 0.021168, 0.021925, 0.024175", \ + "0.018801, 0.018936, 0.019172, 0.019788, 0.021492, 0.021992, 0.023909", \ + "0.019933, 0.020068, 0.020304, 0.020920, 0.022624, 0.023124, 0.025041", \ + "0.020437, 0.020572, 0.020808, 0.021424, 0.023127, 0.023628, 0.025544", \ + "0.023231, 0.023365, 0.023602, 0.024218, 0.025921, 0.026422, 0.028338" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.018448, 0.018583, 0.018831, 0.019435, 0.021359, 0.022298, 0.024548", \ + "0.018466, 0.018601, 0.018837, 0.019453, 0.021295, 0.022234, 0.024484", \ + "0.018478, 0.018612, 0.018849, 0.019465, 0.021168, 0.021925, 0.024175", \ + "0.018801, 0.018936, 0.019172, 0.019788, 0.021492, 0.021992, 0.023909", \ + "0.019933, 0.020068, 0.020304, 0.020920, 0.022624, 0.023124, 0.025041", \ + "0.020437, 0.020572, 0.020808, 0.021424, 0.023127, 0.023628, 0.025544", \ + "0.023231, 0.023365, 0.023602, 0.024218, 0.025921, 0.026422, 0.028338" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019486, 0.019744, 0.019876, 0.020597, 0.022398, 0.023330, 0.025501", \ + "0.019529, 0.019787, 0.019920, 0.020640, 0.022441, 0.023271, 0.025442", \ + "0.019613, 0.019871, 0.020003, 0.020724, 0.022525, 0.023230, 0.025214", \ + "0.020019, 0.020277, 0.020409, 0.021130, 0.022931, 0.023636, 0.025620", \ + "0.021201, 0.021459, 0.021592, 0.022312, 0.024113, 0.024818, 0.026802", \ + "0.021812, 0.022070, 0.022203, 0.022923, 0.024724, 0.025429, 0.027413", \ + "0.024518, 0.024776, 0.024908, 0.025629, 0.027430, 0.028135, 0.030119" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.885024", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.885285", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.886593", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.888342", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.894606", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.896783", \ + "0.886215, 0.885627, 0.885283, 0.885281, 0.888728, 0.890884, 0.901203" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.764427, 0.763839, 0.763495, 0.763493, 0.766940, 0.769096, 0.779415", \ + "0.764688, 0.764100, 0.763756, 0.763754, 0.767201, 0.769357, 0.779676", \ + "0.765996, 0.765408, 0.765064, 0.765062, 0.768509, 0.770665, 0.780984", \ + "0.767745, 0.767157, 0.766813, 0.766811, 0.770258, 0.772414, 0.782733", \ + "0.774009, 0.773421, 0.773077, 0.773075, 0.776522, 0.778678, 0.788997", \ + "0.776186, 0.775598, 0.775254, 0.775252, 0.778699, 0.780855, 0.791174", \ + "0.780606, 0.780018, 0.779674, 0.779672, 0.783119, 0.785275, 0.795594" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.885024", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.885285", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.886593", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.888342", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.894606", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.896783", \ + "0.886215, 0.885627, 0.885283, 0.885281, 0.888728, 0.890884, 0.901203" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.764427, 0.763839, 0.763495, 0.763493, 0.766940, 0.769096, 0.779415", \ + "0.764688, 0.764100, 0.763756, 0.763754, 0.767201, 0.769357, 0.779676", \ + "0.765996, 0.765408, 0.765064, 0.765062, 0.768509, 0.770665, 0.780984", \ + "0.767745, 0.767157, 0.766813, 0.766811, 0.770258, 0.772414, 0.782733", \ + "0.774009, 0.773421, 0.773077, 0.773075, 0.776522, 0.778678, 0.788997", \ + "0.776186, 0.775598, 0.775254, 0.775252, 0.778699, 0.780855, 0.791174", \ + "0.780606, 0.780018, 0.779674, 0.779672, 0.783119, 0.785275, 0.795594" \ + ); + } + } + } + bus(SIA) { + bus_type : rf2_32x128_wm1_SIA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001516; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.174236, 0.174916, 0.177342, 0.182174, 0.201959, 0.213815, 0.295278", \ + "0.173898, 0.174578, 0.177004, 0.181836, 0.201796, 0.213652, 0.295115", \ + "0.172721, 0.173402, 0.175827, 0.180659, 0.200260, 0.212116, 0.293579", \ + "0.170415, 0.171096, 0.173521, 0.178353, 0.197935, 0.209790, 0.291254", \ + "0.163393, 0.164074, 0.166499, 0.171331, 0.191114, 0.202970, 0.284433", \ + "0.163825, 0.165032, 0.166950, 0.171755, 0.188458, 0.200291, 0.281755", \ + "0.231114, 0.232320, 0.234239, 0.239043, 0.255398, 0.262773, 0.339510" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.174236, 0.174916, 0.177342, 0.182174, 0.201959, 0.213815, 0.295278", \ + "0.173898, 0.174578, 0.177004, 0.181836, 0.201796, 0.213652, 0.295115", \ + "0.172721, 0.173402, 0.175827, 0.180659, 0.200260, 0.212116, 0.293579", \ + "0.170415, 0.171096, 0.173521, 0.178353, 0.197935, 0.209790, 0.291254", \ + "0.163393, 0.164074, 0.166499, 0.171331, 0.191114, 0.202970, 0.284433", \ + "0.163825, 0.165032, 0.166950, 0.171755, 0.188458, 0.200291, 0.281755", \ + "0.231114, 0.232320, 0.234239, 0.239043, 0.255398, 0.262773, 0.339510" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062836, 0.062389, 0.061657, 0.061436, 0.065143, 0.065943, 0.135702", \ + "0.063701, 0.063253, 0.062522, 0.062301, 0.066008, 0.066807, 0.136567", \ + "0.064359, 0.063911, 0.063180, 0.062959, 0.066666, 0.067465, 0.137225", \ + "0.066716, 0.066268, 0.065537, 0.065316, 0.069023, 0.069823, 0.139582", \ + "0.073337, 0.072889, 0.072158, 0.071937, 0.075644, 0.076443, 0.146203", \ + "0.076754, 0.076306, 0.075574, 0.075353, 0.079060, 0.079860, 0.149620", \ + "0.136048, 0.135600, 0.134869, 0.134647, 0.138354, 0.139154, 0.208914" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062221, 0.061890, 0.060697, 0.059795, 0.058831, 0.058336, 0.114317", \ + "0.062915, 0.062583, 0.061390, 0.060488, 0.059524, 0.059029, 0.115010", \ + "0.063776, 0.063445, 0.062251, 0.061349, 0.060386, 0.059891, 0.115872", \ + "0.065922, 0.065591, 0.064397, 0.063495, 0.062532, 0.062037, 0.118018", \ + "0.072728, 0.072397, 0.071203, 0.070301, 0.069337, 0.068842, 0.124823", \ + "0.075965, 0.075634, 0.074440, 0.073538, 0.072575, 0.072080, 0.128061", \ + "0.135261, 0.134930, 0.133737, 0.132835, 0.131871, 0.131376, 0.187357" \ + ); + } + } + internal_power() { + when : "SEA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.008057, 0.008230, 0.008238, 0.008246, 0.008254, 0.008309, 0.008591"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013811, 0.013825, 0.013838, 0.013852, 0.013866, 0.013955, 0.014308"); + } + } + } + pin(SEA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001888; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.174236, 0.174916, 0.177342, 0.182174, 0.201959, 0.213815, 0.295278", \ + "0.173898, 0.174578, 0.177004, 0.181836, 0.201796, 0.213652, 0.295115", \ + "0.172721, 0.173402, 0.175827, 0.180659, 0.200260, 0.212116, 0.293579", \ + "0.170415, 0.171096, 0.173521, 0.178353, 0.197935, 0.209790, 0.291254", \ + "0.163393, 0.164074, 0.166499, 0.171331, 0.191114, 0.202970, 0.284433", \ + "0.163825, 0.165032, 0.166950, 0.171755, 0.188458, 0.200291, 0.281755", \ + "0.231114, 0.232320, 0.234239, 0.239043, 0.255398, 0.262773, 0.339510" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.174236, 0.174916, 0.177342, 0.182174, 0.201959, 0.213815, 0.295278", \ + "0.173898, 0.174578, 0.177004, 0.181836, 0.201796, 0.213652, 0.295115", \ + "0.172721, 0.173402, 0.175827, 0.180659, 0.200260, 0.212116, 0.293579", \ + "0.170415, 0.171096, 0.173521, 0.178353, 0.197935, 0.209790, 0.291254", \ + "0.163393, 0.164074, 0.166499, 0.171331, 0.191114, 0.202970, 0.284433", \ + "0.163825, 0.165032, 0.166950, 0.171755, 0.188458, 0.200291, 0.281755", \ + "0.231114, 0.232320, 0.234239, 0.239043, 0.255398, 0.262773, 0.339510" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.008057, 0.008230, 0.008238, 0.008246, 0.008254, 0.008309, 0.008591"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013811, 0.013825, 0.013838, 0.013852, 0.013866, 0.013955, 0.014308"); + } + } + } + pin(DFTRAMBYP) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002073; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.181520, 0.182210, 0.183570, 0.185910, 0.193030, 0.197110, 0.259090", \ + "0.181230, 0.181920, 0.183280, 0.185620, 0.192740, 0.196820, 0.258800", \ + "0.180050, 0.180740, 0.182100, 0.184440, 0.191560, 0.195640, 0.257620", \ + "0.178060, 0.178750, 0.180110, 0.182450, 0.189570, 0.193650, 0.255630", \ + "0.172060, 0.172750, 0.174110, 0.176450, 0.183570, 0.187650, 0.249630", \ + "0.169363, 0.170053, 0.171413, 0.173753, 0.180873, 0.184953, 0.246933", \ + "0.217774, 0.218464, 0.219824, 0.222164, 0.229284, 0.233364, 0.295344" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.221425, 0.222095, 0.223855, 0.226445, 0.233845, 0.235635, 0.298905", \ + "0.221395, 0.222065, 0.223825, 0.226415, 0.233815, 0.235605, 0.298875", \ + "0.220365, 0.221035, 0.222795, 0.225385, 0.232785, 0.234575, 0.297845", \ + "0.217895, 0.218565, 0.220325, 0.222915, 0.230315, 0.232105, 0.295375", \ + "0.211895, 0.212565, 0.214325, 0.216915, 0.224315, 0.226105, 0.289375", \ + "0.209815, 0.210485, 0.212245, 0.214835, 0.222235, 0.224025, 0.287295", \ + "0.257605, 0.258275, 0.260035, 0.262625, 0.270025, 0.271815, 0.335085" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.181520, 0.182210, 0.183570, 0.185910, 0.193030, 0.197110, 0.259090", \ + "0.181230, 0.181920, 0.183280, 0.185620, 0.192740, 0.196820, 0.258800", \ + "0.180050, 0.180740, 0.182100, 0.184440, 0.191560, 0.195640, 0.257620", \ + "0.178060, 0.178750, 0.180110, 0.182450, 0.189570, 0.193650, 0.255630", \ + "0.172060, 0.172750, 0.174110, 0.176450, 0.183570, 0.187650, 0.249630", \ + "0.169363, 0.170053, 0.171413, 0.173753, 0.180873, 0.184953, 0.246933", \ + "0.217774, 0.218464, 0.219824, 0.222164, 0.229284, 0.233364, 0.295344" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.221425, 0.222095, 0.223855, 0.226445, 0.233845, 0.235635, 0.298905", \ + "0.221395, 0.222065, 0.223825, 0.226415, 0.233815, 0.235605, 0.298875", \ + "0.220365, 0.221035, 0.222795, 0.225385, 0.232785, 0.234575, 0.297845", \ + "0.217895, 0.218565, 0.220325, 0.222915, 0.230315, 0.232105, 0.295375", \ + "0.211895, 0.212565, 0.214325, 0.216915, 0.224315, 0.226105, 0.289375", \ + "0.209815, 0.210485, 0.212245, 0.214835, 0.222235, 0.224025, 0.287295", \ + "0.257605, 0.258275, 0.260035, 0.262625, 0.270025, 0.271815, 0.335085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.939774", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.940035", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.941343", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.943092", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.949356", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.951533", \ + "0.940965, 0.940377, 0.940033, 0.940031, 0.943478, 0.945634, 1.010703" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.939774", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.940035", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.941343", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.943092", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.949356", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.951533", \ + "0.940965, 0.940377, 0.940033, 0.940031, 0.943478, 0.945634, 1.010703" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.887553, 0.888437, 0.889329, 0.890213, 0.891163, 0.892055, 0.893182"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.047201, 1.048219, 1.049347, 1.050398, 1.051419, 1.052470, 1.053521"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.870036, 0.869448, 0.869104, 0.869102, 0.872549, 0.874705, 0.885024", \ + "0.870297, 0.869709, 0.869365, 0.869363, 0.872810, 0.874966, 0.885285", \ + "0.871605, 0.871017, 0.870673, 0.870671, 0.874118, 0.876274, 0.886593", \ + "0.873354, 0.872766, 0.872422, 0.872420, 0.875867, 0.878023, 0.888342", \ + "0.879618, 0.879030, 0.878686, 0.878684, 0.882131, 0.884287, 0.894606", \ + "0.881795, 0.881207, 0.880863, 0.880861, 0.884308, 0.886464, 0.896783", \ + "0.886215, 0.885627, 0.885283, 0.885281, 0.888728, 0.890884, 0.901203" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.293757, 0.292137, 0.290737, 0.289837, 0.281157, 0.278487, 0.268037", \ + "0.296997, 0.295377, 0.293977, 0.293077, 0.284397, 0.281727, 0.271277", \ + "0.299807, 0.298187, 0.296787, 0.295887, 0.287207, 0.284537, 0.274087", \ + "0.301607, 0.299987, 0.298587, 0.297687, 0.289007, 0.286337, 0.275887", \ + "0.318957, 0.317337, 0.315937, 0.315037, 0.306357, 0.303687, 0.293237", \ + "0.324297, 0.322677, 0.321277, 0.320377, 0.311697, 0.309027, 0.298577", \ + "0.345197, 0.343577, 0.342177, 0.341277, 0.332597, 0.329927, 0.319477" \ + ); + } + } + } + bus(SIB) { + bus_type : rf2_32x128_wm1_SIB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005557; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.014913, 0.015607, 0.017603, 0.018629, 0.024863, 0.029062, 0.093275", \ + "0.014668, 0.015362, 0.017358, 0.018384, 0.024618, 0.028817, 0.093030", \ + "0.013327, 0.014021, 0.016017, 0.017043, 0.023277, 0.027476, 0.091689", \ + "0.011521, 0.012215, 0.014211, 0.015237, 0.021471, 0.025670, 0.089883", \ + "0.006181, 0.006875, 0.008871, 0.009897, 0.016131, 0.020330, 0.084543", \ + "0.005000, 0.005000, 0.006105, 0.007131, 0.013365, 0.017564, 0.081777", \ + "0.059750, 0.059750, 0.059750, 0.059750, 0.063590, 0.067789, 0.132002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019113, 0.019198, 0.020812, 0.023348, 0.031501, 0.036517, 0.101917", \ + "0.018841, 0.018926, 0.020540, 0.023076, 0.031229, 0.036245, 0.101645", \ + "0.017518, 0.017603, 0.019217, 0.021753, 0.029906, 0.034922, 0.100322", \ + "0.015675, 0.015760, 0.017374, 0.019910, 0.028063, 0.033079, 0.098479", \ + "0.010437, 0.010522, 0.012136, 0.014672, 0.022825, 0.027841, 0.093241", \ + "0.007669, 0.007754, 0.009368, 0.011904, 0.020057, 0.025073, 0.090473", \ + "0.059750, 0.059750, 0.059750, 0.062044, 0.070197, 0.075213, 0.140613" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.164887, 0.164312, 0.163489, 0.162060, 0.161600, 0.161663, 0.221975", \ + "0.165183, 0.164608, 0.163785, 0.162356, 0.161896, 0.161959, 0.222271", \ + "0.166537, 0.165962, 0.165139, 0.163710, 0.163250, 0.163313, 0.223625", \ + "0.168387, 0.167812, 0.166989, 0.165560, 0.165100, 0.165163, 0.225475", \ + "0.173853, 0.173278, 0.172455, 0.171026, 0.170566, 0.170629, 0.230941", \ + "0.176354, 0.175779, 0.174956, 0.173527, 0.173067, 0.173130, 0.233442", \ + "0.235703, 0.235128, 0.234305, 0.232876, 0.232416, 0.232479, 0.292791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.166340, 0.165708, 0.164472, 0.162965, 0.162011, 0.161600, 0.216761", \ + "0.166634, 0.166002, 0.164766, 0.163259, 0.162305, 0.161894, 0.217055", \ + "0.167993, 0.167361, 0.166125, 0.164618, 0.163664, 0.163253, 0.218414", \ + "0.169845, 0.169213, 0.167977, 0.166470, 0.165516, 0.165105, 0.220266", \ + "0.175314, 0.174682, 0.173446, 0.171939, 0.170985, 0.170574, 0.225735", \ + "0.177807, 0.177175, 0.175939, 0.174432, 0.173478, 0.173067, 0.228228", \ + "0.237157, 0.236525, 0.235289, 0.233782, 0.232828, 0.232417, 0.287578" \ + ); + } + } + internal_power() { + when : "SEB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(SEB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001891; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.358905, 0.359884, 0.363011, 0.368125, 0.386650, 0.393922, 0.471686", \ + "0.358450, 0.359429, 0.362556, 0.367670, 0.386195, 0.393467, 0.471231", \ + "0.357909, 0.358888, 0.362015, 0.367129, 0.385654, 0.392926, 0.470690", \ + "0.355208, 0.356187, 0.359314, 0.364428, 0.382953, 0.390225, 0.467989", \ + "0.349672, 0.350651, 0.353778, 0.358892, 0.377417, 0.384689, 0.462453", \ + "0.348715, 0.350111, 0.352445, 0.357845, 0.374401, 0.381673, 0.459437", \ + "0.414729, 0.416125, 0.418459, 0.423859, 0.438956, 0.444906, 0.516285" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.358905, 0.359884, 0.363011, 0.368125, 0.386650, 0.393922, 0.471686", \ + "0.358450, 0.359429, 0.362556, 0.367670, 0.386195, 0.393467, 0.471231", \ + "0.357909, 0.358888, 0.362015, 0.367129, 0.385654, 0.392926, 0.470690", \ + "0.355208, 0.356187, 0.359314, 0.364428, 0.382953, 0.390225, 0.467989", \ + "0.349672, 0.350651, 0.353778, 0.358892, 0.377417, 0.384689, 0.462453", \ + "0.348715, 0.350111, 0.352445, 0.357845, 0.374401, 0.381673, 0.459437", \ + "0.414729, 0.416125, 0.418459, 0.423859, 0.438956, 0.444906, 0.516285" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.183616, 0.183069, 0.181942, 0.180728, 0.181885, 0.186663, 0.247096", \ + "0.183940, 0.183392, 0.182266, 0.181051, 0.182208, 0.186987, 0.247419", \ + "0.185437, 0.184889, 0.183763, 0.182548, 0.183703, 0.188484, 0.248917", \ + "0.187479, 0.186931, 0.185804, 0.184590, 0.185736, 0.190526, 0.250958", \ + "0.193483, 0.192936, 0.191809, 0.190595, 0.191751, 0.196530, 0.256963", \ + "0.196273, 0.195725, 0.194599, 0.193384, 0.194501, 0.199320, 0.259753", \ + "0.256047, 0.255499, 0.254373, 0.253158, 0.254309, 0.259094, 0.319526" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.183616, 0.183069, 0.181942, 0.180728, 0.181885, 0.186663, 0.247096", \ + "0.183940, 0.183392, 0.182266, 0.181051, 0.182208, 0.186987, 0.247419", \ + "0.185437, 0.184889, 0.183763, 0.182548, 0.183703, 0.188484, 0.248917", \ + "0.187479, 0.186931, 0.185804, 0.184590, 0.185736, 0.190526, 0.250958", \ + "0.193483, 0.192936, 0.191809, 0.190595, 0.191751, 0.196530, 0.256963", \ + "0.196273, 0.195725, 0.194599, 0.193384, 0.194501, 0.199320, 0.259753", \ + "0.256047, 0.255499, 0.254373, 0.253158, 0.254309, 0.259094, 0.319526" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.603028, 0.603631, 0.604235, 0.604839, 0.605443, 0.606049, 0.606655"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.604085, 0.605152, 0.605279, 0.605884, 0.606443, 0.607616, 0.608199"); + } + } + } + pin(COLLDISN) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002381; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.766151, 0.766449, 0.767833, 0.769831, 0.776012, 0.778243, 0.838276", \ + "0.765819, 0.766117, 0.767501, 0.769499, 0.775680, 0.777911, 0.837944", \ + "0.764549, 0.764847, 0.766231, 0.768229, 0.774410, 0.776641, 0.836674", \ + "0.762844, 0.763142, 0.764526, 0.766524, 0.772705, 0.774936, 0.834969", \ + "0.756968, 0.757266, 0.758650, 0.760648, 0.766829, 0.769060, 0.829093", \ + "0.754323, 0.754621, 0.756005, 0.758003, 0.764184, 0.766415, 0.826448", \ + "0.803163, 0.803461, 0.804845, 0.806843, 0.813024, 0.815255, 0.875288" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.766151, 0.766449, 0.767833, 0.769831, 0.776012, 0.778243, 0.838276", \ + "0.765819, 0.766117, 0.767501, 0.769499, 0.775680, 0.777911, 0.837944", \ + "0.764549, 0.764847, 0.766231, 0.768229, 0.774410, 0.776641, 0.836674", \ + "0.762844, 0.763142, 0.764526, 0.766524, 0.772705, 0.774936, 0.834969", \ + "0.756968, 0.757266, 0.758650, 0.760648, 0.766829, 0.769060, 0.829093", \ + "0.754323, 0.754621, 0.756005, 0.758003, 0.764184, 0.766415, 0.826448", \ + "0.803163, 0.803461, 0.804845, 0.806843, 0.813024, 0.815255, 0.875288" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.979997, 0.979409, 0.979065, 0.979063, 0.982510, 0.984666, 1.049735", \ + "0.980258, 0.979670, 0.979326, 0.979324, 0.982771, 0.984927, 1.049996", \ + "0.981566, 0.980978, 0.980634, 0.980632, 0.984079, 0.986235, 1.051304", \ + "0.983315, 0.982727, 0.982383, 0.982381, 0.985828, 0.987984, 1.053053", \ + "0.989579, 0.988991, 0.988647, 0.988645, 0.992092, 0.994248, 1.059317", \ + "0.991756, 0.991168, 0.990824, 0.990822, 0.994269, 0.996425, 1.061494", \ + "1.050926, 1.050338, 1.049994, 1.049992, 1.053439, 1.055595, 1.120664" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.871760, 0.872058, 0.873442, 0.875440, 0.881621, 0.883852, 0.943885", \ + "0.871428, 0.871726, 0.873110, 0.875108, 0.881289, 0.883520, 0.943553", \ + "0.870158, 0.870456, 0.871840, 0.873838, 0.880019, 0.882250, 0.942283", \ + "0.868453, 0.868751, 0.870135, 0.872133, 0.878314, 0.880545, 0.940578", \ + "0.862577, 0.862875, 0.864259, 0.866257, 0.872438, 0.874669, 0.934702", \ + "0.859932, 0.860230, 0.861614, 0.863612, 0.869793, 0.872024, 0.932057", \ + "0.908772, 0.909070, 0.910454, 0.912452, 0.918633, 0.920864, 0.980897" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.871760, 0.872058, 0.873442, 0.875440, 0.881621, 0.883852, 0.943885", \ + "0.871428, 0.871726, 0.873110, 0.875108, 0.881289, 0.883520, 0.943553", \ + "0.870158, 0.870456, 0.871840, 0.873838, 0.880019, 0.882250, 0.942283", \ + "0.868453, 0.868751, 0.870135, 0.872133, 0.878314, 0.880545, 0.940578", \ + "0.862577, 0.862875, 0.864259, 0.866257, 0.872438, 0.874669, 0.934702", \ + "0.859932, 0.860230, 0.861614, 0.863612, 0.869793, 0.872024, 0.932057", \ + "0.908772, 0.909070, 0.910454, 0.912452, 0.918633, 0.920864, 0.980897" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "1.041402, 1.040814, 1.040470, 1.040468, 1.043915, 1.046071, 1.111140", \ + "1.041663, 1.041075, 1.040731, 1.040729, 1.044176, 1.046332, 1.111401", \ + "1.042971, 1.042383, 1.042039, 1.042037, 1.045484, 1.047640, 1.112709", \ + "1.044720, 1.044132, 1.043788, 1.043786, 1.047233, 1.049389, 1.114458", \ + "1.050984, 1.050396, 1.050052, 1.050050, 1.053497, 1.055653, 1.120722", \ + "1.053161, 1.052573, 1.052229, 1.052227, 1.055674, 1.057830, 1.122899", \ + "1.112331, 1.111743, 1.111399, 1.111397, 1.114844, 1.117000, 1.182069" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "1.041402, 1.040814, 1.040470, 1.040468, 1.043915, 1.046071, 1.111140", \ + "1.041663, 1.041075, 1.040731, 1.040729, 1.044176, 1.046332, 1.111401", \ + "1.042971, 1.042383, 1.042039, 1.042037, 1.045484, 1.047640, 1.112709", \ + "1.044720, 1.044132, 1.043788, 1.043786, 1.047233, 1.049389, 1.114458", \ + "1.050984, 1.050396, 1.050052, 1.050050, 1.053497, 1.055653, 1.120722", \ + "1.053161, 1.052573, 1.052229, 1.052227, 1.055674, 1.057830, 1.122899", \ + "1.112331, 1.111743, 1.111399, 1.111397, 1.114844, 1.117000, 1.182069" \ + ); + } + } + } + leakage_power() { + related_pg_pin : "VDDCE"; + value : 0.228675; + } + leakage_power() { + related_pg_pin : "VDDPE"; + value : 1.166384; + } + leakage_power() { + related_pg_pin : "VDDCE"; + when :"!RET1N"; + value : 0.225064; + } + leakage_power() { + related_pg_pin : "VDDPE"; + when :"!RET1N"; + value : 1.085536; + } + } +} diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.ps b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.ps new file mode 100644 index 00000000..1972c422 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ff_0p99v_0p99v_125c.ps @@ -0,0 +1,5472 @@ +%!PS-Adobe-3.0 +% common_memcomp Version: c0.1.0-EAC +% lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +% CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +% +% Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +% +% Use of this Software is subject to the terms and conditions of the +% applicable license agreement with ARM Physical IP, Inc. +% In addition, this Software is protected by patents, copyright law +% and international treaties. +% +% The copyright notice(s) in this Software does not indicate actual or +% intended publication of this Software. +% +% Compiler Name: High Density Two Port Register File SVT MVT Compiler +% +% Creation Date: Thu Oct 17 15:31:52 2019 +% +% Instance Options: +% Instance Name: rf2_32x128_wm1 +% Number of Words: 32 +% Number of Bits: 128 +% Multiplexer Width: 2 +% Multi-Vt selection: BASE +% Frequency : 1 +% Activity Factor <%>: 50 +% Pipeline: off +% Word-Write Mask: on +% Word Partition Size: 1 +% Write through: off +% Top Metal Layer: m5-m10 +% Power Type: otc +% Redundancy: off +% Redundant Columns: 2 +% Redundant Rows: 0 +% BIST MUXes: on +% Soft Error Repair (SER): none +% Power Gating: off +% Back Biasing: off +% Retention: on +% Extra Margin Adjustment: on +% Advanced Test Features: off +% Customer Comment: This is a memory instance +% Bus-notation: on +% Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +% Name Case: upper +% Check Instance Name: off +% Diodes: on +% Drive Strength: 6 +% Site Definitions: off +% Library Name: USERLIB +% Liberty setting: nldm +% +% Compiler Versions: +% Memory Version: r4p0 +% Lang compiler Version: 4.1.6-EAC2 +% View Name: Postscript +% AMCI Version: 1.4.3-EAC +% RTE Version: 2.1.0-EAC +% datasheet_memcomp Version: 1.3.1-amci +% +% Modeling Assumptions: N/A +% +% Modeling Limitations: N/A +% +% Known Bugs: N/A +% +% Known Work Arounds: N/A +% +%%BoundingBox: 0 0 612 792 +%%Creator: post +%%DocumentData: Clean8Bit +%%DocumentPaperSizes: Letter +%%Orientation: Portrait +%%Pages: (atend) +%%PageOrder: Ascend +%%For: ARM +%%EndComments + +%%BeginProlog + +% TableRow sets the table row height +% Expects dy on the stack +/TableRow { + /tablerow exch def +} def + + +% ArrowRight prints an arrow pointing to the right +% Expects text x y on the stack +/ArrowRight { + newpath + moveto + -2.5 1 rmoveto + 2.5 -1 rlineto + -2.5 -1 rlineto + stroke +} def + + +% ArrowLeft prints an arrow pointing to the left +% Expects text x y on the stack +/ArrowLeft { + newpath + moveto + 2.5 1 rmoveto + -2.5 -1 rlineto + 2.5 -1 rlineto + stroke +} def + + +% ArrowUp prints an arrow pointing up +% Expects text x y on the stack +/ArrowUp { + newpath + moveto + 1 -2.5 rmoveto + -1 2.5 rlineto + -1 -2.5 rlineto + stroke +} def + + +% ArrowDown prints an arrow pointing down +% Expects text x y on the stack +/ArrowDown { + newpath + moveto + 1 2.5 rmoveto + -1 -2.5 rlineto + -1 2.5 rlineto + stroke +} def + + +% CenterLabel prints text centered at the x,y +% centers on x only +% Expects text subscript x y on the stack +/CenterLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 2 div 0 exch sub % 0-dx/2 on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% LeftLabel prints text to the left of the x,y +% centers on x only +% Expects text subscript x y on the stack +/LeftLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 0 exch sub % 0-dx on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% RightLabel prints text to the right of the x,y +% Expects text subscript x y on the stack +/RightLabel { + moveto + exch + show + 0 -2 rmoveto + show +} def + + +% CenterText prints text centered at the x,y +% centers on x only +% Expects text x y on the stack +/CenterText { + moveto + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% Table2start begins a 2 column table. +% Expects 5 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table2Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table2End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table2End { + 1 setlinewidth + tablex tabley + table1width table2width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table2DoubleLine doubles up the line at the bottom of a box +% Expects nothing on the stack +/Table2DoubleLine { + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 1.5 setlinewidth + stroke +} def + + +% Table2Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table2Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + + +% Table2CC prints centered strings at the top of a 2 column table. +% Expects string string on the stack +/Table2CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + + +% Table2LC prints one left aligned string and one centered string +% Expects 2 strings on the stack +/Table2LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LCMicron prints one left aligned string and one centered string +% The centered string has a micron symbol at the end of it. +% Expects 2 strings on the stack +/Table2LCMicron { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % col 2 width + TextFont setfont + dup stringwidth pop % dx of string on stack + /Symbol findfont 12 scalefont setfont + (\155) stringwidth pop % dx of symbol u on stack + add % dx of number with mu + TextFont setfont + (m) stringwidth pop % dx of m on stack + add % dx of entire box contents on stack + 2 div % dx/2 on stack + + % col 2 + tablex table1width add table2width 2 div add % xcenter of square on stack + exch sub + tabley 3 add % string x y+3 on stack + moveto + TextFont setfont + show + /Symbol findfont 12 scalefont setfont + (\155) show + TextFont setfont + (m) show + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LL prints two left aligned strings +% at the top of a 2 column table. +% Expects 2 string (text) on the stack +/Table2LL { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + + % col 1 + tablex + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + +} def + + +% Table2Header prints the header to the table +% Expects string string on the stack +/Table2Header { + tablex tabley moveto + table1width table2width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + Table2CC + 0 setgray +} def + + +/Table4Header { + tablex tabley moveto + table1width table2width add table3width add table4width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add table3width add table4width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + /TextSuperScriptFont /Helvetica findfont 8 scalefont def + Table4CC + 0 setgray +} def + + +/CenterTextSuperScript{ + moveto + /sqSuper exch def + /mUnit exch def + dup stringwidth pop % string x on stack + 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show + + mUnit () ne{ + 2 0 rmoveto + (\()show + /Symbol findfont 8 scalefont setfont + (\155) show + TextSuperScriptFont setfont + mUnit show + TextFont setfont + sqSuper () eq { + (\))show + }if + }if + + sqSuper () ne { + 0 4 rmoveto + TextSuperScriptFont setfont + sqSuper show + 0 -4 rmoveto + TextFont setfont + (\)) show + } if +} def + + +/Table4CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + % col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + +% Table4Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table4Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table2width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table3width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table4width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + +% Table4LC prints one left aligned string and one centered string +% Expects 4 strings on the stack +/Table4LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + %col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + %col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + +% Table4End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table4End { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + +% Table4Start begins a 4 column table. +% Expects 7 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table4Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4width exch def + /table3width exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerStart begins a 2 column table of 1 process corners. +% Expects 5 values on the stack: w1 ... wn xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table5width 0 def + /table4width 0 def + /table3width 0 def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table1CornerEnd { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add table5width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % between col 1 and 2 + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + table5width 0 rlineto + stroke + + 1 setlinewidth +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerTRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost thrice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner4Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost four times as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner5Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost five times as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% Table1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% Table1CornerCornerCol prints the header on the first column +% Expects string string string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerCornerCol { + /xc exch def + /temp exch def + /volt exch def + + % first line + TextFont setfont + xc tabley 3 add tablerow 2 div add % string xc y on stack + CenterText + + % next line width + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xc exch sub + tabley 5 add moveto + + % next line display + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + +} def + + +% Table1CornerHeader prints the header to the table +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/Table1CornerHeader { + (Pin) % column headings + (ff Process) (0.99) (125) + + /tablerow tablerow tablerow add def % Double the y size + + % make a box around the header area + tablex tabley moveto + table1width table2width add table3width add table4width add table5width add 0 rlineto + 0 0 tablerow sub rlineto + table1width table2width add table3width add table4width add table5width add 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray % gray fill the box + fill + + % White lines and text + 1.0 setgray + + /tabley tabley tablerow sub def + + % do the vertical lines between columns + Table1CornerVerticals + + % Column 1 header + tablex table1width add table2width 2 div add Table1CornerCornerCol + + % Pin column header + tablex table1width 2 div add Table1CornerFirstCol + + % back to black lines and text + 0 setgray + + % Restore the row height + /tablerow tablerow 2 div def +} def + + +% TableD1CornerStart begins a 2 column table of 1 double process corners. +% Expects values on the stack: pin_width corn1_1 corn1_2 +% corn2_1 corn2_2 corn3_1 corn3_2 corn4_1 corn4_2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/TableD1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4_2_width 0 def + /table4_1_width 0 def + /table3_2_width 0 def + /table3_1_width 0 def + /table2_2_width 0 def + /table2_1_width 0 def + /table1_2_width exch def + /table1_1_width exch def + /tablep_width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableD1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableD1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% TableD1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableD1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + % single between pin and first corner + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + + +% TableD1CornerRow prints centered strings +% Expects 3 strings on the stack +/TableD1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % pin name + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + +} def + + +% TableD1CornerDRow prints centered strings +% The pin description is broken into 2 rows for this one. +% Expects 10 strings on the stack +/TableD1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % pin name in two rows + tablex 5 add + tabley 3 add + moveto + TextFont setfont + show + tablex 5 add + tabley 13 add + moveto + show + + % restore the y height of the row + /tablerow olddy def + +} def + + +% TableD1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableD1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableD1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableD1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 4 div def + + % first line (Fast Process) + xct + tabley h add h add h add 3 add % string xc y on stack + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Pulse) xcl tabley h add 3 add CenterText + (Width) xcl tabley 5 add CenterText + + % Voltage display + (Voltage) xcr tabley 3 add h 2 div add CenterText + +} def + + +% Centers converts 3 values to the 3 needed centers +% Expects xleft width1 width2 on stack +% Returns xtc xlc xrc +/Centers { + /w2 exch def + /w1 exch def + /l exch def + + l w1 add % xtc on stack + l w1 2 div add % xtc xlc on stack + l w1 add w2 2 div add % xtc xlc xrc on stack +} def + + +% TableD1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableD1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (ff Process) (0.99) (125) + /tablerow tablerow 4 mul def % 4* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in almost white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableD1CornerVerticals + /tableheader 0 def + + tablex tablep_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableD1CornerCornerCol + + tablex tablep_width 2 div add TableD1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 4 div def +} def + + +% TableT1CornerStartHydra begins a 2 column table of 1 double process corners. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStartHydra { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 80 def + /tablep_width 115 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableT1CornerStart begins a 2 column table of 1 double process corners. Extend first and second cols. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStart { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 130 def + /tablep_width 165 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% EMAIlegalFootnote +% Expects nothing on the stack +% returns new page y +/EMAIllegalFootnote { + /tabley pagey 10 sub def + tablex tabley moveto + TextFont setfont + (Timing value of ** indicates illegal EMA setting for this corner.) show +} def + + +% TableT1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableT1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width tablet_width add + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + found999 (yes) eq + { EMAIllegalFootnote } if + tabley % return y +} def + + +% TableT1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableT1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + + % double between symbol and first corner + newpath + tablex tabley moveto + tablep_width tablet_width add 1 sub 0 rmoveto + 0 tablerow rlineto + stroke + newpath + tablex tabley moveto + tablep_width tablet_width add 1 add 0 rmoveto + 0 tablerow rlineto + stroke + + % single between pin and symbol + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + +% CenterText999 prints text centered at the x,y +% '999' is changed to ** +% centers on x only +% Expects text x y on the stack +/CenterText999 { + moveto + dup (999.000) eq + { % replace string if == '999.000' + pop + (**) + % found999 (yes) def + } if + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% TableT1CornerRow prints centered strings +% Expects 3 strings on the stack +% pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley 4 add % x y+4 on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner6Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 6 mul def % 6* the y size + /yup 45 def + /yupc tablerow 6 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 75 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerDRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley olddy add + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableT1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableT1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableT1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 3 div def + + % first line (Fast Process) + xct + tabley h add h add 3 add % string xc y on stack + TextFont setfont + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Min) xcl tabley 5 add CenterText + + % Voltage display + (Max) xcr tabley 5 add CenterText + +} def + + +% TableT1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Second string is over the symbol column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableT1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (ff Process) (0.99) (125) + + % Setup the fonts for the heading + /TextFont /Helvetica-Bold findfont text_size scalefont def + + /tablerow tablerow 3 mul def % 3* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableT1CornerVerticals + /tableheader 0 def + + tablex tablep_width add tablet_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableT1CornerCornerCol + + tablex tablep_width add tablet_width 2 div add TableT1CornerFirstCol + + tablex tablep_width 2 div add TableT1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 3 div def + + % Setup the fonts for the rest of the table + /TextFont /Helvetica findfont text_size scalefont def + /TextSuperscriptFont /Helvetica findfont 8 scalefont def +} def + + +% TextEnd ends a paragraph (or series of paragraphs) +% Expects nothing on the stack +% returns the new page y +/TextEnd { + text_y % return this +} def + + +% TextBulletOn sets bullets at start of para +% Expects nothing on the stack +/TextBulletOn { + /text_bullet true def + /Symbol findfont text_size scalefont setfont + (\267 ) stringwidth pop + /text_bullet_width exch def + TextFont setfont + /text_bullet true def +} def + + +% TextBulletOff sets bullets off at start of para +% Expects nothing on the stack +/TextBulletOff { + /text_bullet false def +} def + + +% TextStart initializes the paragraph stuff +% Expects left right margins y deltay on the stack +/TextStart { + /text_dy exch def + /text_y exch def + /text_right exch def + /text_left exch def + /text_starty text_y def + /text_bullet false def + /text_size 10 def + /text_indent_width 0 def +} def + + +% TextParaStart initializes one paragraph +% Expects nothing on the stack +/TextParaStart { + + % carrige return linefeed + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + + % if bullet show and step over in x + text_bullet { + /Symbol findfont text_size scalefont setfont + (\267 ) show + TextFont setfont + /text_x text_x text_bullet_width add def + } if + + % text_indent does not apply to the first line +} def + + +% TextParaEnd ends one paragraph. +% Expects nothing on the stack +/TextParaEnd { +} def + + +% TextIndent sets the indent string used at start of para +% all following lines space over the indent width +% Expects string on the stack +/TextIndent { + stringwidth pop + /text_indent_width exch def +} def + + +% TextNewline does a carrige return line feed +% Expects nothing on the stack +/TextNewline { + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + text_bullet { + text_bullet_width 0 rmoveto + /text_x text_x text_bullet_width add def + } if + text_indent_width 0 gt { + text_indent_width 0 rmoveto + /text_x text_x text_indent_width add def + } if +} def + + +% TextWord puts one word in the current paragraph +% Expects string on the stack +/TextWord { + dup stringwidth pop % dx on the stack + /text_dx exch def + text_dx text_x add % x pos at end of word on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true + dup ( ) eq + text_x text_left eq + and % if word is space and at left margin then pop + { + pop + } { + show + /text_x text_x text_dx add def + } ifelse % else show +} def + + +% TextSuperscript puts a superscript word in the current paragraph +% The routine does not test for too wide, the superscript MUST +% go with the previous word. +% Expects string on the stack +/TextSuperscript { + TextSuperscriptFont setfont + dup stringwidth pop % dx on the stack + /text_x exch text_x add def + 0 4 rmoveto + show + 0 0 text_size 2 div sub rmoveto + TextFont setfont +} def + + +% TextReserveSpace makes sure there is enough space on +% the current line for the given text to be printed. +% If there isnt enough, a newline is generated. +/TextReserveSpace { + stringwidth pop % dx on the stack + text_x add % x at end of work on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true +} def + + +% TextPiece puts words in the current paragraph +% Expects string on the stack +/TextPiece { + TextFont setfont + { + % expect string to search on stack + ( ) search % post match pre true or string false on stack + { TextWord TextWord } % true display pre, display space + { TextWord exit } % false display string break + ifelse + % go around loop again with string to search on stack + } loop +} def + + +% Expects string on the stack +% Uses c and s vars +/TextFourAdd { + s 1 eq { + % first one + TextPiece + } { + s c eq { + % last one + ( and ) TextPiece + TextPiece + } { + % a middle one + (, ) TextPiece + TextPiece + } ifelse + } ifelse +} def + + +% TextFourList prints from 1 to 4 things to the paragraph +% Expects 4 strings on the stack. (3 could be empty). +/TextFourList { + /s1 exch def + /s2 exch def + /s3 exch def + /s4 exch def + /c 0 def + + % count the number of items + s1 () ne { + /c c 1 add def + } if + s2 () ne { + /c c 1 add def + } if + s3 () ne { + /c c 1 add def + } if + s4 () ne { + /c c 1 add def + } if + + % display the items + /s 0 def + s1 () ne { + /s 1 s add def + s1 TextFourAdd + } if + s2 () ne { + /s 1 s add def + s2 TextFourAdd + } if + s3 () ne { + /s 1 s add def + s3 TextFourAdd + } if + s4 () ne { + /s 1 s add def + s4 TextFourAdd + } if + +} def + + +% TextLine puts a complete paragraph on the page +% Expects string on the stack +/TextLine { + dup () eq { + % Empty, go down 1/2 line. + pop + /text_y text_y text_dy 2 div sub def + } { + % Normal string, show it + TextParaStart + TextPiece + TextParaEnd + } ifelse +} def + + +% TextDegree prints a degree symbol +% Expects nothing on the stack +/TextDegree { + /TextFont /Symbol findfont text_size scalefont def + (\260) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextRegistered prints a copyright symbol +% Expects nothing on the stack +/TextRegistered { + /TextFont /Symbol findfont text_size scalefont def + (\342) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextTrademark prints a degree symbol +% Expects nothing on the stack +/TextTrademark { + /TextFont /Symbol findfont text_size scalefont def + (\344) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextCopyright prints a copyright symbol +% Expects nothing on the stack +/TextCopyright { + /TextFont /Symbol findfont text_size scalefont def + (\343) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% LeftShow prints text to the left of the point +% Expects string x y on the stack +/LeftShow { + moveto + dup stringwidth pop % string dx on stack + 0 exch sub % 0-x on stack + 0 rmoveto + show +} def + + +% LeftShowMicron prints text to the left of the point +% Expects two string x y on the stack +/LeftShowMicron { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /procString exch def + dup stringwidth pop + /techStringWidth exch def + /techString exch def + suffStringWidth techStringWidth add 20 add 0 exch sub 0 rmoveto + techString show + /Symbol findfont title_size scalefont setfont + (\155) show + /Helvetica-Bold findfont title_size scalefont setfont + (m) show + procString show +}def + +% LeftShowRedundancy prints text to the left of the point +% Expects two string x y on the stack +/LeftShowRedundancy { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /textRed exch def + suffStringWidth 20 add 0 exch sub 0 rmoveto + textRed show + title_size 2 div 0 exch rmoveto + /Helvetica-Bold findfont text_size scalefont setfont + (TM) show + /Helvetica-Bold findfont title_size scalefont setfont +} def + + + +% SectionLine does the line part of the section header +% Expects y on the stack +/SectionLine { + /y exch def + /y y line_above sub def + newpath + line_left y moveto + line_right y lineto + 1 setlinewidth + stroke +} def + + +% SectionStart prints a horizontal bar and a section header on the page +% Expects string string y on the stack +% returns the new page y +/SectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /text2 exch def % get the subtext + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + text2 () ne { + /Helvetica findfont text_size scalefont setfont + ( \() show % space over + text2 show % print the explanation + (\)) show + } if + y 10 add % return new y +} def + +% MicronSectionStart prints a horizontal bar and a section header on the page +% Expects string y on the stack +% returns the new page y +/MicronSectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + + y 10 add % return new y +} def + +/line_left 55 def +/line_right 550 def +/line_above 10 def +/line_below 10 def + +% EndingCopyright prints the copyright info at the end +% of the last page. The y location is set but the x size +% depends on the section line size. +% Expects xc y on the stack +/EndingCopyright { + SectionLine + /y y line_below sub def + /xc exch def + line_left line_right y 9 TextStart + /text_size 7 def + /TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(Words and logos marked with ) TextPiece +TextRegistered +( or ) TextPiece +TextTrademark +( are registered trademarks or trademarks of ARM) TextPiece +TextRegistered +( in the EU and other countries, except as otherwise stated below in this\ + proprietary notice. Other brands and names mentioned herein may be the trademarks\ + of their respective owners.) TextPiece +TextParaEnd +/text_y text_y 4 sub def +(Neither the whole nor any part of the information contained in, or the\ + product described in, this document may be adapted or reproduced in any\ + material form except with the prior written permission of the copyright holder.) TextLine +/text_y text_y 4 sub def +(The product described in this document is subject to continuous developments\ + and improvements. All particulars of the product and its use contained in this\ + document are given by ARM in good faith. However, all warranties implied or \ + expressed, including but not limited to implied warranties of merchantability, or\ + fitness for purpose, are excluded.) TextLine +/text_y text_y 4 sub def +(This document is intended only to assist the reader in the use of the product. \ + ARM shall not be liable for any loss or damage arising from the use of any \ + information in this document, or any error or omission in such information, or \ + any incorrect use of the product.) TextLine +/text_y text_y 4 sub def +(Where the term ARM is used it means "ARM or any of its subsidiaries as appropriate".) TextLine +/text_y text_y 4 sub def +(ARM reserves the right to make changes to any products and services\ + described herein, at any time without notice in order to make improvements\ + in design, performance, or presentation and to provide the best possible\ + products and services. Customers should obtain the latest specifications\ + before referencing any information, product, or service described herein,\ + except as expressly agreed in writing by and officer of ARM.) TextLine +/text_y text_y 4 sub def +(ARM does not assume any responsibility or liability arising out of the\ + application or use of any products or services described herein, except\ + as expressly agreed to in writing by and officer of ARM; nor does the\ + purchase, lease, or use of a product or service from ARM convey license\ + under any patent rights, copyrights, trademark rights, or any other of\ + the intellectual property rights of ARM or of third parties.) TextLine +} def + +% CenterTextMu prints two text strings centered at the x,y +% with a mu symbol between the text strings +% centers on x only +% Expects text text x y on the stack +/CenterTextMu { + moveto + /text2 exch def % save second string + /text1 exch def % save first string + /Helvetica findfont 7 scalefont setfont + text1 stringwidth pop % width of first string + text2 stringwidth pop % width of second string + (\155) stringwidth pop % width of mu + add add % width of 2 strings plus mu on stack + 2 div 0 exch sub % 0-x/2 on stack + 0 rmoveto + /Helvetica findfont 7 scalefont setfont + text1 show + /Symbol findfont 7 scalefont setfont + (\155) show + /Helvetica findfont 7 scalefont setfont + text2 show +} def + +% Expects x y scale on the stack +/ARMlogo { + gsave + translate + dup scale + 0.08 0.43 0.53 setrgbcolor + + newpath + 10 10 moveto + 50 10 lineto + 60 38 lineto + 70 62 lineto + 93 117 lineto + 117 62 lineto + 70 62 lineto + 60 38 lineto + 127 38 lineto + 140 10 lineto + 180 10 lineto + 113 150 lineto + 70 150 lineto + closepath + fill + + newpath + 188 10 moveto + 226 10 lineto + 226 125 lineto + 250 125 lineto + 250 109 16 90 270 arcn + 250 93 lineto + 226 93 lineto + 226 67 lineto + 245 67 254 56 12 arcto + 278 10 lineto + 318 10 lineto + 278 80 lineto + 260 109 41 270 90 arc + 188 150 lineto + closepath + fill + + newpath + 330 10 moveto + 367 10 lineto + 367 96 lineto + 407.5 53 lineto + 413.5 53 lineto + 454 96 lineto + 454 10 lineto + 490 10 lineto + 490 150 lineto + 454 150 lineto + 410.5 100 lineto + 367 150 lineto + 330 150 lineto + closepath + fill + + newpath + 1.5 setlinewidth + 507.5 142.5 7.5 0 360 arc + stroke + 503 138 moveto + /Helvetca-Bold findfont 12 scalefont setfont + (R) show + + grestore +} def + +% ShortCopyright will center a copyright message +% at the bottom of the page. +% Expects date page-string xcenter y on the stack +/ShortCopyright { + /y exch def + /xc exch def + /page exch def + /d exch def + /Helvetica findfont 7 scalefont setfont + ( CLN28HPM 28nm Process, RF-2P Datasheet, Version r4p0) xc y CenterText + /y y 10 sub def + (Copyright 1993-2019 ARM. All Rights Reserved.) xc y CenterText + /y y 10 sub def + page xc y CenterText + + % Instance name on left + line_left y 10 add moveto + (rf2_32x128_wm1 ) show + d show + + % Logo on right +} def + + +% SymbolStart begins the part symbol +% Expects xUpperLeft yUpperLeft inPins outPins on stack +/SymbolStart { + /symbolOutPins exch def + /symbolInPins exch def + /symbolY exch def + /symbolX exch def + /symbolCapHeight 20 def + /symbolWidth 90 def + /symbolPinLength 10 def + /symbolPinSpacing 12 def + /symbolInY symbolY symbolCapHeight sub def + /symbolOutY + symbolInPins symbolOutPins sub 2 div + symbolPinSpacing mul + symbolY exch sub symbolCapHeight sub + def + + % box of symbol + newpath + symbolX symbolY moveto + symbolWidth 0 rlineto + symbolCapHeight 2 mul + symbolInPins 1 sub symbolPinSpacing mul add + 0 exch sub + 0 exch rlineto + 0 symbolWidth sub 0 rlineto + closepath + 2 setlinewidth + stroke + + /symbolY symbolY symbolCapHeight 2 mul sub + symbolInPins 1 sub symbolPinSpacing mul sub + def + +} def + +% SymbolEnd completes the part symbol +% Expects nothing on the stack +% Returns bottom of the symbol on the stack +/SymbolEnd { + symbolY 12 sub symbolPinLength sub +} def + +% SymbolInput puts an input pin on the part +% Expects pinName on the stack +/SymbolInput { + dup () ne { + % print nonblank pin + newpath + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rmoveto + -2 -3 rmoveto + dup stringwidth pop 0 exch sub + 0 rmoveto + show + } { + % ignore blank pin + pop + } ifelse + /symbolInPins symbolInPins 1 sub def + /symbolInY symbolInY symbolPinSpacing sub def +} def + +% SymbolOutput puts an output pin on the part +% Expects pinName on the stack +/SymbolOutput { + dup () ne { + newpath + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rmoveto + 2 -3 rmoveto + show + } { + pop + } ifelse + /symbolOutPins symbolOutPins 1 sub def + /symbolOutY symbolOutY symbolPinSpacing sub def +} def + +% Put triangle inside, line down and string +% Expects string x y (left/right) on stack +/SymbolTriangle { + /l exch def + /y exch def + /x exch def + newpath + x y moveto + -3 0 rmoveto + 3 6 rlineto + 3 -6 rlineto + 0.5 setlinewidth + stroke + newpath + x y moveto + 0 0 symbolPinLength sub rlineto + stroke + x y moveto + 0 0 symbolPinLength sub rmoveto + 0 -12 rmoveto + l (left) eq { + dup stringwidth pop 0 exch sub 0 rmoveto + } if + l (center) eq { + dup stringwidth pop 2 div 0 exch sub 0 rmoveto + } if + show +} def + +% SymbolClocks puts two clock pins on the bottom of the part +% Expects pinName pinName on the stack +/SymbolClocks { + symbolX symbolWidth 2 mul 3 div add + symbolY (right) SymbolTriangle % string x y dir on stack + symbolX symbolWidth 3 div add + symbolY (left) SymbolTriangle % string x y dir on stack +} def + +% SymbolClock puts one clock pin on the bottom of the part +% Expects pinName on the stack +/SymbolClock { + symbolX symbolWidth 2 div add + symbolY (center) SymbolTriangle % string x y dir on stack +} def + +% Waves for frame number 1 +% 94 paths, 26 strings +% Expects x y on stack +% bounds: 0.0->347.714 0.0->207.416 +/Frame1 { + gsave + translate + newpath + 109.056 195.874 moveto + 109.056 173.503 lineto + 0.5 setlinewidth + stroke + newpath + 54.056 205.874 moveto + 54.056 138.242 lineto + stroke + newpath + 16.556 173.503 moveto + 49.056 173.503 lineto + 59.056 188.503 lineto + 104.056 188.503 lineto + 114.056 173.503 lineto + 159.056 173.503 lineto + 169.056 188.503 lineto + 214.056 188.503 lineto + 224.056 173.503 lineto + 269.056 173.503 lineto + 279.056 188.503 lineto + 324.056 188.503 lineto + 334.056 173.374 lineto + 346.556 173.374 lineto + stroke + newpath + 54.056 193.374 moveto + 109.056 193.374 lineto + stroke + 54.056 193.374 ArrowLeft + 109.056 193.374 ArrowRight + newpath + 109.056 193.374 moveto + 164.056 193.374 lineto + stroke + 109.056 193.374 ArrowLeft + 164.056 193.374 ArrowRight + newpath + 274.056 205.874 moveto + 274.056 160.116 lineto + stroke + newpath + 219.056 198.374 moveto + 219.056 173.503 lineto + stroke + newpath + 164.056 205.874 moveto + 164.056 167.238 lineto + stroke + newpath + 164.056 193.374 moveto + 219.056 193.374 lineto + stroke + 164.056 193.374 ArrowLeft + 219.056 193.374 ArrowRight + newpath + 219.056 193.374 moveto + 274.056 193.374 lineto + stroke + 219.056 193.374 ArrowLeft + 274.056 193.374 ArrowRight + newpath + 296.556 63.7808 moveto + 296.556 41.4104 lineto + stroke + newpath + 76.556 63.7808 moveto + 76.556 41.4104 lineto + stroke + newpath + 71.556 56.2808 moveto + 16.556 56.2808 lineto + stroke + newpath + 16.556 56.2808 moveto + 71.556 56.2808 lineto + 81.556 41.2808 lineto + 161.556 41.2808 lineto + stroke + newpath + 16.556 41.2808 moveto + 71.556 41.2808 lineto + 81.556 56.2808 lineto + 161.556 56.2808 lineto + stroke + newpath + 281.556 56.2808 moveto + 291.556 56.2808 lineto + 301.556 41.2808 lineto + 311.556 41.2808 lineto + stroke + newpath + 281.556 41.2808 moveto + 291.556 41.2808 lineto + 301.556 56.2808 lineto + 311.556 56.2808 lineto + stroke + newpath + 160.635 56.2808 moveto + 288.635 56.2808 lineto + stroke + newpath + 160.635 41.2808 moveto + 288.635 41.2808 lineto + stroke + newpath + 306.556 56.2808 moveto + 346.556 56.2808 lineto + stroke + newpath + 306.556 41.2808 moveto + 346.556 41.2808 lineto + stroke + newpath + 54.056 69.4576 moveto + 54.056 58.7808 lineto + stroke + newpath + 274.056 70.708 moveto + 274.056 58.7808 lineto + stroke + newpath + 274.068 61.3056 moveto + 296.548 61.3056 lineto + stroke + 274.068 61.3056 ArrowLeft + 296.548 61.3056 ArrowRight + newpath + 54.068 61.3056 moveto + 76.548 61.3056 lineto + stroke + 54.068 61.3056 ArrowLeft + 76.548 61.3056 ArrowRight + newpath + 164.1 203.374 moveto + 274.056 203.374 lineto + stroke + 164.1 203.374 ArrowLeft + 274.056 203.374 ArrowRight + newpath + 54.388 203.368 moveto + 164.344 203.368 lineto + stroke + 54.388 203.368 ArrowLeft + 164.344 203.368 ArrowRight + newpath + 44.58 22.3712 moveto + 44.58 0 lineto + stroke + newpath + 19.58 15 moveto + 29.58 0 lineto + stroke + newpath + 29.58 15 moveto + 39.58 0 lineto + stroke + newpath + 19.58 0 moveto + 29.58 15 lineto + stroke + newpath + 29.58 0 moveto + 39.58 15 lineto + stroke + newpath + 39.4744 0.3128 moveto + 44.6552 8.1304 lineto + stroke + newpath + 56.6336 22.3712 moveto + 56.6336 0.3208 lineto + stroke + newpath + 19.4472 15.112 moveto + 39.6552 15.112 lineto + stroke + newpath + 39.6552 14.904 moveto + 49.0304 0.3208 lineto + stroke + newpath + 49.2384 0.3208 moveto + 346.322 0.3208 lineto + stroke + newpath + 19.7944 0.0432 moveto + 39.3776 0.0432 lineto + stroke + newpath + 44.0936 19.1072 moveto + 56.5936 19.1072 lineto + stroke + 44.0936 19.1072 ArrowLeft + 56.5936 19.1072 ArrowRight + newpath + 17.0584 142.309 moveto + 27.0584 127.309 lineto + stroke + newpath + 27.0584 142.309 moveto + 37.0584 127.309 lineto + stroke + newpath + 17.0584 127.309 moveto + 27.0584 142.309 lineto + stroke + newpath + 27.0584 127.309 moveto + 37.0584 142.309 lineto + stroke + newpath + 42.0584 147.309 moveto + 54.7592 147.309 lineto + stroke + 42.0584 147.309 ArrowLeft + 54.7592 147.309 ArrowRight + newpath + 37.0512 142.145 moveto + 47.712 127.514 lineto + stroke + newpath + 280.423 127.352 moveto + 47.6088 127.352 lineto + stroke + newpath + 36.9128 142.076 moveto + 16.7032 142.076 lineto + stroke + newpath + 37.1552 127.354 moveto + 16.9456 127.354 lineto + stroke + newpath + 37.2592 127.353 moveto + 42.2952 134.18 lineto + stroke + newpath + 280.628 127.238 moveto + 293.337 143.14 lineto + stroke + newpath + 42.2496 155.602 moveto + 42.2496 124.337 lineto + stroke + newpath + 286.695 154.179 moveto + 286.695 126.264 lineto + stroke + newpath + 17.7008 93.3248 moveto + 27.7008 78.3248 lineto + stroke + newpath + 27.7008 93.3248 moveto + 37.7008 78.3248 lineto + stroke + newpath + 17.7008 78.3248 moveto + 27.7008 93.3248 lineto + stroke + newpath + 27.7008 78.3248 moveto + 37.7008 93.3248 lineto + stroke + newpath + 42.7008 98.3248 moveto + 55.2008 98.3248 lineto + stroke + 42.7008 98.3248 ArrowLeft + 55.2008 98.3248 ArrowRight + newpath + 55.2008 115.954 moveto + 55.2008 95.8248 lineto + stroke + newpath + 37.1032 93.0912 moveto + 16.8936 93.0912 lineto + stroke + newpath + 37.2424 78.7864 moveto + 17.0328 78.7864 lineto + stroke + newpath + 37.624 78.924 moveto + 47.9784 94.4352 lineto + stroke + newpath + 181.046 94.34 moveto + 47.8336 94.34 lineto + stroke + newpath + 37.4232 92.7688 moveto + 47.4232 77.7688 lineto + stroke + newpath + 180.63 78.368 moveto + 46.7224 78.368 lineto + stroke + newpath + 181.174 78.6232 moveto + 191.826 94.8952 lineto + stroke + newpath + 181.174 94.4248 moveto + 192.296 77.7912 lineto + stroke + newpath + 192.283 78.0568 moveto + 202.882 94.296 lineto + stroke + newpath + 213.481 78.0568 moveto + 224.08 94.296 lineto + stroke + newpath + 224.08 78.0568 moveto + 234.678 94.296 lineto + stroke + newpath + 234.678 78.0568 moveto + 245.278 94.156 lineto + stroke + newpath + 202.882 78.0568 moveto + 213.481 94.296 lineto + stroke + newpath + 192.283 94.296 moveto + 202.882 78.0568 lineto + stroke + newpath + 202.882 94.296 moveto + 213.481 78.0568 lineto + stroke + newpath + 213.481 94.296 moveto + 224.08 78.0568 lineto + stroke + newpath + 224.08 94.296 moveto + 234.678 78.0568 lineto + stroke + newpath + 234.678 94.4352 moveto + 245.278 78.0568 lineto + stroke + newpath + 257.435 77.6736 moveto + 191.602 77.6736 lineto + stroke + newpath + 256.879 94.4576 moveto + 191.462 94.4576 lineto + stroke + newpath + 41.9712 106.297 moveto + 41.9712 80.736 lineto + stroke + newpath + 273.962 157.514 moveto + 273.962 123.453 lineto + stroke + newpath + 333.028 142.932 moveto + 293.13 142.932 lineto + stroke + newpath + 266.046 94.664 moveto + 347.714 94.664 lineto + stroke + newpath + 267.296 78.3096 moveto + 346.88 78.3096 lineto + stroke + newpath + 163.778 110.17 moveto + 163.778 92.1296 lineto + stroke + newpath + 185.895 106.701 moveto + 185.895 83.368 lineto + stroke + newpath + 262.84 99.436 moveto + 275.34 99.436 lineto + stroke + 262.84 99.436 ArrowLeft + 275.34 99.436 ArrowRight + newpath + 275.34 117.065 moveto + 275.34 96.936 lineto + stroke + newpath + 262.111 107.408 moveto + 262.111 81.8464 lineto + stroke + newpath + 256.879 78.208 moveto + 267.001 94.7568 lineto + stroke + newpath + 257.146 94.2968 moveto + 267.435 78.0688 lineto + stroke + newpath + 245.291 78.208 moveto + 257.007 94.436 lineto + stroke + newpath + 245.428 94.0192 moveto + 255.979 78.208 lineto + stroke + newpath + 163.307 99.7368 moveto + 185.926 100.227 lineto + stroke + 163.307 99.7368 ArrowLeft + 185.926 100.227 ArrowRight + newpath + 273.326 140.852 moveto + 286.027 140.852 lineto + stroke + 273.326 140.852 ArrowLeft + 286.027 140.852 ArrowRight + /Times-Roman findfont 10 scalefont setfont + (CLKA) () 0 177.754 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (CENA) () 0.6944 132.111 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (AA[J]) () 0 85.532 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (QA[I]) () 0 44.9864 LeftLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckah) 81.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckal) 136.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckah) 191.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckal) 246.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cyca_ema3) 109.056 207.416 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cyca_ema3) 219.056 207.416 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (Q1) () 86.556 47.8232 RightLabel + /Times-Roman findfont 7 scalefont setfont + (Q2) () 306.556 48.5696 RightLabel + /Times-Roman findfont 7 scalefont setfont + (t) (accqa_rd3) 65.3056 64.9888 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (accqa_rd3) 285.306 64.86 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (dftrambypas) 50.628 25.8056 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cenas) 49.4192 152.925 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (ADDR1) () 108.951 85.484 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (aas) 48.9504 104.496 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (ADDR2) () 283.257 86.1784 CenterLabel + /Times-Roman findfont 6.432 scalefont setfont + (t) (aah) 174.506 102.84 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (aas) 269.09 105.607 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cenah) 280.687 146.468 CenterLabel + /Times-Roman findfont 10 scalefont setfont + (DFTRAMBYP) () 1.86 3.9536 LeftLabel + grestore +} def +% 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pagey 20 sub def +/text_size 10 def +(Overview) () pagey SectionStart +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(The High Density Two Port Register File SVT MVT Compiler is optimized for speed and density.\ + The memory is designed to take full advantage of the ) TextPiece + +(TSMC) TextPiece +( 28nmnm) TextReserveSpace +( 28nm) TextPiece +( CLN28HPM CMOS process.) TextPiece +TextParaEnd +() TextLine +TextParaStart +(The storage array is composed of eight-transistor\ + bit cells with fully static circuitry. The\ + register file\ + operates at a voltage of 0.99V) TextPiece +( and a junction temperature of ) TextPiece +(125.01C) TextReserveSpace +(125.0) TextPiece +TextDegree +(C.) TextPiece +TextParaEnd +TextEnd % returns new page y +/pagey exch def +% spaceLeft before Instance Settings 492 +/text_size 10 def +(Instance Settings) () pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +200 +(CLN28HPM) stringwidth pop 15 add 100 1 index 1 index + lt { exch pop } { pop } ifelse +leftmargin pagey 14 Table2Start +(Parameter) (Setting) Table2Header +Table2DoubleLine +/TextFont /Helvetica findfont text_size scalefont def +(Instance Name) (rf2_32x128_wm1) Table2LC +(Process) (CLN28HPM) Table2LC +(Number of Words ) (32) Table2LC +(Bits) (128) Table2LC +(Multiplexer Width ) (2) Table2LC +(Multi-Vt selection ) (BASE) Table2LC +(Frequency ) (1) Table2LC +(Activity Factor <%> ) (50) Table2LC +(Pipeline ) (off) Table2LC +(Word-Write Mask ) (on) Table2LC +(Word Partition Size ) (1) Table2LC +(Write through ) (off) Table2LC +(Top Metal Layer ) (m5-m10) Table2LC +(Power Type ) (otc) Table2LC +(Redundancy ) (off) Table2LC +(Redundant Columns ) (2) Table2LC +(Redundant Rows ) (0) Table2LC +(BIST MUXes ) (on) Table2LC +(Soft Error Repair (SER) ) (none) Table2LC +(Power Gating ) (off) Table2LC +(Back Biasing ) (off) Table2LC +(Retention ) (on) Table2LC +(Extra Margin Adjustment ) (on) Table2LC +(Advanced Test Features ) (off) Table2LC +(Name Case ) (upper) Table2LC +(Diodes ) (on) Table2LC +Table2End % returns the new y +/pagey exch def +% spaceLeft before description 94 +(Description) () pagey SectionStart +/pagey exch def +% spaceLeft before description text begins 74 + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +(Register file access is synchronous and is triggered by the rising-edge of the c\ +locks, CLKA and CLKB. The write port (port B) input address, input data, write \ +enable and chip enable are latched by the rising-edge of CLKB, respecting indivi\ +dual setup and hold times.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 26 +() (1) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 2 2 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Description) (cont) pagey SectionStart +/pagey exch def +/pagey pagey 6 sub def +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read port (port A) input address and chip enable are latched by the rising-e\ +dge of CLKA, respecting individual setup and hold times. The two ports can oper\ +ate completely asynchronous to each other.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 602 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A write cycle is initiated if the write port chip enable, CENB, is asserted at t\ +he rising-edge of CLKB. Input data, DB, is written at the address, AB. If the \ +word-write feature is implemented, via the compiler, data on the data input bus \ +is partitioned to the write enable bus, WENB[x:0]. Each WENB pin has a distinct \ +latched value, making each partition individually selectable. When the latched v\ +alue of a write enable pin, WENB[i], is low the corresponding data partition is \ +selected, and its data is written to the memory location specified on the addres\ +s bus.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 500 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A read cycle is initiated if the read port chip enable CENA is asserted at the r\ +ising-edge of CLKA. The contents of the location specified by the address, AA, a\ +re driven on the data output bus, QA. The register file is allowed to access non\ +-existing physical addresses, but the outputs will be unknown.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 446 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(In the event of a write/read collision, if COLLDISN is disabled then the write i\ +s guaranteed and the read data is undefined.However, if COLLDISN is enabled then\ + the write is not guaranteed if the read row address and write row address match\ +.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 392 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read address for any given memory cycle can be identical to the write addres\ +s of the previous memory cycle with the read data being identical to the data th\ +at was written from the previous memory write cycle.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 350 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( Partial read during a read/write collision through the use of WENB is not suppo\ +rted. For example, during a read/write collision, if WENB[] is set to disable th\ +e write operation to certain bits, these bits cannot be simultaneously read on p\ +ort A. This is independent of the setting of COLLDISN.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 296 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( A standby mode is provided for periods of non-operation (CENA=1 or CENB=1). The\ + ports A and B can enter standby mode independently. While in standby mode, add\ +ress and data inputs are disabled; data stored in the memory is retained, but th\ +e memory cannot be accessed for reads or writes.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 242 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(One of the inputs of the input BIST MUX is connected to system signals while the\ + other is connected to the test signals. The memory datapath will now include in\ +tegrated scan chains, with testability controlled by pins DFTRAMBYP, TENA, SEA, \ +TENB, and SEB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 188 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Memory normal mode is enabled (RET1N=1). In this mode the core and periphery pow\ +er are both connected to the chip level power grid through Artigrid There is a p\ +ower sequence when the memory is put from active to selective precharge and back\ + to active. Selective precharge is available for all compilers except for the RO\ +M. Before entering selective precharge, the memory must be put in standby mode b\ +y setting CENA=1, TCENA=1, CENB=1 and TCENB=1.In addition, DFTRAMBYP must be set\ + to 0.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 98 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Extra Margin Adjustment pins provide the option of adding delays into internal t\ +iming pulses. There are 3 different EMA pins: EMAA, EMAWA, EMASA to control Read\ +/Write internal timing pulses.) TextLine +TextEnd +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +% spaceLeft beginning paragraph 50 +(Refer to the user guide for a more detailed description\ + of memory operation.) TextLine +TextEnd +/pagey exch def +() (2) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 3 3 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Physical Dimensions) pagey MicronSectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 75 75 75 leftmargin pagey 14 Table4Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Area Type) (Width)(m)() (Height)(m)() (Area)(m)(2) Table4Header +/TextFont /Helvetica findfont text_size scalefont def +( Core) (21.165) (414.86) (8780.51) Table4LC +Table4End +/pagey exch def + +leftmargin rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +(All width, height, and area dimensions are in drawn dimensions.\ + For shrink processes, this will be larger than the final silicon\ + post-shrink dimensions.) TextLine +TextEnd +/pagey exch def +/pagey pagey 20 sub def +(Symbol) () pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +/Helvetica findfont text_size scalefont setfont +255 pagey 24 9 SymbolStart +(CENA) SymbolInput +(AA[4:0]) SymbolInput +(CENB) SymbolInput +(WENB[127:0]) SymbolInput +(AB[4:0]) SymbolInput +(DB[127:0]) SymbolInput +(EMAA[2:0]) SymbolInput +(EMASA) SymbolInput +(EMAB[2:0]) SymbolInput +(TENA) SymbolInput +(TCENA) SymbolInput +(TAA[4:0]) SymbolInput +(TENB) SymbolInput +(TCENB) SymbolInput +(TWENB[127:0]) SymbolInput +(TAB[4:0]) SymbolInput +(TDB[127:0]) SymbolInput +(RET1N) SymbolInput +(SIA[1:0]) SymbolInput +(SEA) SymbolInput +(DFTRAMBYP) SymbolInput +(SIB[1:0]) SymbolInput +(SEB) SymbolInput +(COLLDISN) SymbolInput +(CENYA) SymbolOutput +(AYA[4:0]) SymbolOutput +(WENYB[127:0]) SymbolOutput +(QA[127:0]) SymbolOutput +(SOA[1:0]) SymbolOutput +() SymbolOutput +(CENYB) SymbolOutput +(AYB[4:0]) SymbolOutput +(SOB[1:0]) SymbolOutput +(CLKA) (CLKB) SymbolClocks +SymbolEnd +/pagey exch def +() (3) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 4 4 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Pin Description) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def + +180 350 line_left pagey 14 Table2Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Pin) (Description) Table2Header +/TextFont /Helvetica findfont text_size scalefont def +(AA[4:0], AB[4:0]) (Read & Write Addresses \(AA[0],AB[0] = LSB\)) Table2LL +(DB[127:0]) (Data Inputs \(DB[0] = LSB\)) Table2LL +(CLKA, CLKB) (Read & Write Clocks) Table2LL +(CENA, CENB) (Read & Write Enables \(active low\)) Table2LL +(WENB[127:0]) (Write Enable \(active low, WENB[0] = LSB\)) Table2LL +(EMAA[2:0], EMAB[2:0]) (Read and Write Extra Margin Adjustment \(EMAA[0],EMAB[0] = LSB\)) Table2LL +(EMASA) (Read Extra Margin Adjustment) Table2LL +(TENA, TENB) (Port A & B Test Mode Enables \(active low\)) Table2LL +(TDB[127:0]) (Data Test Input \(TDB[0] = LSB\)) Table2LL +(TCENA, TCENB) (Read & Write Chip Enable Test Inputs \(active low\)) Table2LL +(TWENB[127:0]) (Write Enable Test Input \(active low, TWENB[0] = LSB\)) Table2LL +(TAA[4:0], TAB[4:0]) (Read & Write Address Test Inputs \(TAA[0],TAB[0] = LSB\)) Table2LL +(COLLDISN) (Allow the user to disable the internal collision detection circuitry\(active low\)) Table2LL +(RET1N) (Retention Input \(active low\)) Table2LL +(DFTRAMBYP) (Test Control Input \(active high\)) Table2LL +(SEA,SEB) (Scan Enable Input \(active high\)) Table2LL +(QA[127:0]) (Data Outputs \(QA[0] = LSB\)) Table2LL +(CENYA, CENYB) (Read & Write Chip Enable Mux Outputs) Table2LL +(WENYB[127:0]) (Write Enable Mux Output \(WENYB[0] = LSB\)) Table2LL +(AYA[4:0], AYB[4:0]) (Read & Write Address Mux Outputs \(AYA[0],AYB[0] = LSB\)) Table2LL +(SOA[1:0],SOB[1:0]) (Scan Output \(SOA[0],SOB[0] = LSB\)) Table2LL +(SIA[1:0],SIB[1:0]) (Scan Input \(SIA[0],SIB[0] = LSB\)) Table2LL +Table2End +/pagey exch def +() (4) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 5 5 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Read Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +(The retain timing arc is not shown in this diagram. \ +Please refer to the User Guide for this compiler for a detailed timing \ +diagram with the retain arc.) TextLine +TextEnd +/pagey pagey 10 sub def +leftmargin pagey 250 sub Frame1 +/pagey pagey 250 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Write Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 10 sub def +leftmargin pagey 290 sub Frame2 +/pagey pagey 280 sub def +() (5) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 6 6 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Write to Read Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 91 sub Frame1027 +/pagey pagey 96 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Read to Write Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 55 sub Frame1030 +/pagey pagey 85 sub def +% headerEstimate=182 +% estimate=238 +% tailEstimate=44 +% spaceLeft=384 +(Default Timing for Cycle and Access) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +(The timing tables shows delay values measured from\ + 50% of supply to\ + 50% of supply voltage.\ + The output pins are loaded with the standard load of 0.035pF.\ + Input pins are driven with a standard slew of 0.080ns from\ + 10% to\ + 90% of supply voltage.) TextLine +() TextLine +(The timing and power values are measured at input slew of 0.08ns on clock pin,\ + 0.08ns on signal pins and output load 0.035pF.) TextLine + +TextEnd +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader + +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.3876) (0.5301) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.4414) (0.5416) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.7415) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (0.8472) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.5437) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.6446) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.1888) (0.2275) TableT1CornerRow +(Min. High pulse width CLKA) () (t) (ckah) (0.0926) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (6) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 7 7 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Timing continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=568 after continuation +(Min. Low pulse width CLKA) () (t) (ckal) (0.0897) () TableT1CornerRow +(Min. High pulse width CLKB) () (t) (ckbh) (0.0958) () TableT1CornerRow +(Min. Low pulse width CLKB) () (t) (ckbl) (0.0907) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript + +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart + +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def + +% after table spaceLeft=482 +% headerEstimate=110 +% estimate=112 +% tailEstimate=64 +% spaceLeft=482 +(Load Timing) (units = ns/pF) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(CENYA load factor) () (K) (load_cenya) () (1.7116) TableT1CornerRow +(AYA load factor) () (K) (load_aya) () (1.4236) TableT1CornerRow +(CENYB load factor) () (K) (load_cenyb) () (1.6712) TableT1CornerRow +(WENYB load factor) () (K) (load_wenyb) () (1.4498) TableT1CornerRow +(AYB load factor) () (K) (load_ayb) () (1.4006) TableT1CornerRow +(QA load factor) () (K) (load_qa) () (0.5188) TableT1CornerRow +(SOA load factor) () (K) (load_soa) () (1.4260) TableT1CornerRow +(SOB load factor) () (K) (load_sob) () (1.4400) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The output load factor units are ns/pF.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% headerEstimate=110 +% estimate=1092 +% tailEstimate=14 +% spaceLeft=196 +(Setup and Hold Timing) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(Setup Btw. CLKA and AA) (COLLDISN=1) () (t) (aas) (0.0928) () TableT1CornerDRow +(Hold Btw. CLKA and AA) (COLLDISN=1) () (t) (aah) (0.0695) () TableT1CornerDRow +(Setup Btw. CLKB and AB) (COLLDISN=1) () (t) (abs) (0.0993) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (7) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 8 8 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. CLKB and AB) (COLLDISN=1) () (t) (abh) (0.0637) () TableT1CornerDRow +(Setup Btw. CLKA and TAA) (COLLDISN=1) () (t) (taas) (0.0948) () TableT1CornerDRow +(Hold Btw. CLKA and TAA) (COLLDISN=1) () (t) (taah) (0.0695) () TableT1CornerDRow +(Setup Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabs) (0.1030) () TableT1CornerDRow +(Hold Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabh) (0.0637) () TableT1CornerDRow +(Setup Btw. CLKA and CENA) () (t) (cenas) (0.0902) () TableT1CornerRow +(Hold Btw. CLKA and CENA) () (t) (cenah) (0.0398) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nfh) (0.8821) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nrh) (0.3064) () TableT1CornerRow +(Setup Btw. CLKB and CENB) () (t) (cenbs) (0.0960) () TableT1CornerRow +(Hold Btw. CLKB and CENB) () (t) (cenbh) (0.0422) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nfh) (0.8821) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nrh) (0.3064) () TableT1CornerRow +(Setup Btw. CLKB and WENB) () (t) (wenbs) (0.0150) () TableT1CornerRow +(Hold Btw. CLKB and WENB) () (t) (wenbh) (0.1736) () TableT1CornerRow +(Setup Btw. CLKB and DB) () (t) (dbs) (0.0228) () TableT1CornerRow +(Hold Btw. CLKB and DB) () (t) (dbh) (0.1710) () TableT1CornerRow +(Setup Btw. CLKA and EMAA) () (t) (emaas) (0.7668) () TableT1CornerRow +(Hold Btw. CLKA and EMAA) () (t) (emaah) (0.9921) () TableT1CornerRow +(Setup Btw. CLKA and EMASA) () (t) (emasas) (0.7668) () TableT1CornerRow +(Hold Btw. CLKA and EMASA) () (t) (emasah) (0.9921) () TableT1CornerRow +(Setup Btw. CLKB and EMAB) () (t) (emabs) (0.8724) () TableT1CornerRow +(Hold Btw. CLKB and EMAB) () (t) (emabh) (1.0535) () TableT1CornerRow +(Setup Btw. CLKA and TENA) () (t) (tenas) (0.1737) () TableT1CornerRow +(Hold Btw. CLKA and TENA) () (t) (tenah) (0.0764) () TableT1CornerRow +(Setup Btw. CLKA and TCENA) () (t) (tcenas) (0.0905) () TableT1CornerRow +(Hold Btw. CLKA and TCENA) () (t) (tcenah) (0.0410) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nfh) (0.8821) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nrh) (0.3064) () TableT1CornerRow +(Setup Btw. CLKB and TENB) () (t) (tenbs) (0.3774) () TableT1CornerRow +(Hold Btw. CLKB and TENB) () (t) (tenbh) (0.1918) () TableT1CornerRow +(Setup Btw. CLKB and TCENB) () (t) (tcenbs) (0.0965) () TableT1CornerRow +(Hold Btw. CLKB and TCENB) () (t) (tcenbh) (0.0435) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nfh) (0.8821) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (8) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 9 9 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nrh) (0.3064) () TableT1CornerRow +(Setup Btw. CLKB and TWENB) () (t) (twenbs) (0.0151) () TableT1CornerRow +(Hold Btw. CLKB and TWENB) () (t) (twenbh) (0.1743) () TableT1CornerRow +(Setup Btw. CLKB and TDB) () (t) (tdbs) (0.0237) () TableT1CornerRow +(Hold Btw. CLKB and TDB) () (t) (tdbh) (0.1710) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nf_dftrambypfh) (0.0241) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nr_dftrambypfh) (0.8821) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nf_cenbrh) (0.0241) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nf_cenarh) (0.0226) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nf_tcenarh) (0.0226) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nf_tcenbrh) (0.0241) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nr_tcenbrh) (0.8821) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nr_tcenarh) (0.7765) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nr_cenbrh) (0.8821) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nr_cenarh) (0.7765) () TableT1CornerRow +(Setup Btw. CLKA and SIA) () (t) (sias) (0.1911) () TableT1CornerRow +(Hold Btw. CLKA and SIA) () (t) (siah) (0.0756) () TableT1CornerRow +(Setup Btw. CLKA and SEA) () (t) (seas) (0.1911) () TableT1CornerRow +(Hold Btw. CLKA and SEA) () (t) (seah) (0.9921) () TableT1CornerRow +(Setup Btw. CLKA and DFTRAMBYP) () (t) (dftrambypas) (0.2243) () TableT1CornerRow +(Hold Btw. CLKA and DFTRAMBYP) () (t) (dftrambypah) (0.9921) () TableT1CornerRow +(Setup Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbs) (0.2243) () TableT1CornerRow +(Hold Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbh) (0.8821) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nfh) (0.8821) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nrh) (0.3064) () TableT1CornerRow +(Setup Btw. CLKB and SIB) () (t) (sibs) (0.0228) () TableT1CornerRow +(Hold Btw. CLKB and SIB) () (t) (sibh) (0.1710) () TableT1CornerRow +(Setup Btw. CLKB and SEB) () (t) (sebs) (0.3774) () TableT1CornerRow +(Hold Btw. CLKB and SEB) () (t) (sebh) (0.1918) () TableT1CornerRow +(Setup Btw. CLKA and COLLDISN) () (t) (colldisnas) (0.7668) () TableT1CornerRow +(Hold Btw. CLKA and COLLDISN) () (t) (colldisnah) (0.9921) () TableT1CornerRow +(Setup Btw. CLKB and COLLDISN) () (t) (colldisnbs) (0.8724) () TableT1CornerRow +(Hold Btw. CLKB and COLLDISN) () (t) (colldisnbh) (1.0535) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextEnd +/pagey exch def +% after table spaceLeft=78 +% headerEstimate=82 +% estimate=1862 +% tailEstimate=84 +% spaceLeft=78 +() (9) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 10 10 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment) +(units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (accqa_rd0) (0.3869) (0.5293) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (accqa_rd1) (0.3864) (0.5288) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (accqa_rd2) (0.3871) (0.5295) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.3876) (0.5301) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (accqa_rd4) (0.4212) (0.5711) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (accqa_rd5) (0.4517) (0.6083) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (accqa_rd6) (0.4833) (0.6469) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (accqa_rd7) (0.5138) (0.6841) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (accqa_scan0) (0.3869) (0.5293) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (accqa_scan1) (0.3864) (0.5288) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (accqa_scan2) (0.3871) (0.5295) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (accqa_scan3) (0.3876) (0.5301) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (accqa_scan4) (0.4212) (0.5711) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (accqa_scan5) (0.4517) (0.6083) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (accqa_scan6) (0.4833) (0.6469) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (accqa_scan7) (0.5138) (0.6841) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd0) (0.4408) (0.5408) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd1) (0.4403) (0.5402) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd2) (0.4410) (0.5410) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.4414) (0.5416) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (10) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 11 11 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd4) (0.4751) (0.5826) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd5) (0.5056) (0.6198) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd6) (0.5372) (0.6584) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd7) (0.5677) (0.6955) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan0) (0.4408) (0.5408) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan1) (0.4403) (0.5402) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan2) (0.4410) (0.5410) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan3) (0.4414) (0.5416) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan4) (0.4751) (0.5826) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan5) (0.5056) (0.6198) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan6) (0.5372) (0.6584) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan7) (0.5677) (0.6955) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=0 EMASA=0) () (t) (cyca_ema0) (0.7407) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=1 EMASA=0) () (t) (cyca_ema1) (0.7401) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=2 EMASA=0) () (t) (cyca_ema2) (0.7410) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.7415) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=4 EMASA=0) () (t) (cyca_ema4) (0.7832) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=5 EMASA=0) () (t) (cyca_ema5) (0.8209) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=6 EMASA=0) () (t) (cyca_ema6) (0.8601) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=7 EMASA=0) () (t) (cyca_ema7) (0.8978) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (11) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 12 12 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Min. Cycle CLKB) (EMAB=0) () (t) (cycb_ema0) (0.8193) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=1) () (t) (cycb_ema1) (0.8263) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=2) () (t) (cycb_ema2) (0.8338) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (0.8472) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=4) () (t) (cycb_ema4) (0.8976) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=5) () (t) (cycb_ema5) (0.9345) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=6) () (t) (cycb_ema6) (0.9817) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=7) () (t) (cycb_ema7) (1.0185) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=0) () (t) (cracwb_rd0) (0.5429) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=1) () (t) (cracwb_rd1) (0.5424) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=2) () (t) (cracwb_rd2) (0.5432) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.5437) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=4) () (t) (cracwb_rd4) (0.5847) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=5) () (t) (cracwb_rd5) (0.6219) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=6) () (t) (cracwb_rd6) (0.6605) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=7) () (t) (cracwb_rd7) (0.6977) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=0) () (t) (cwbcra_wr0) (0.6171) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=1) () (t) (cwbcra_wr1) (0.6240) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=2) () (t) (cwbcra_wr2) (0.6314) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.6446) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (12) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 13 13 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Clock Collision CLKB) (EMAB=4) () (t) (cwbcra_wr4) (0.6942) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=5) () (t) (cwbcra_wr5) (0.7306) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=6) () (t) (cwbcra_wr6) (0.7771) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=7) () (t) (cwbcra_wr7) (0.8134) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.1888) (0.2275) TableT1CornerRow +(High pulse width CLKA) () (t) (ckah) (0.0926) () TableT1CornerRow +(Low pulse width CLKA) () (t) (ckal) (0.0897) () TableT1CornerRow +(High pulse width CLKB) () (t) (ckbh) (0.0958) () TableT1CornerRow +(Low pulse width CLKB) () (t) (ckbl) (0.0907) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=308 +% headerEstimate=82 +% estimate=350 +% tailEstimate=84 +% spaceLeft=308 +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CENA to CENYA) (1,2) (t) (cenacenya) (0.0829) (0.0917) TableT1CornerRow +(Delay TCENA to CENYA) (1,2) (t) (tcenacenya) (0.0819) (0.0905) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyapu) (0.1065) (0.1191) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyanu) (0.1237) (0.1400) TableT1CornerRow +(Delay DFTRAMBYP to CENYA) (1,2) (t) (dftrambypcenya) (0.1158) (0.1299) TableT1CornerRow +(Delay AA to AYA) (1,2) (t) (aaaya) (0.0683) (0.0751) TableT1CornerRow +(Delay TAA to AYA) (1,2) (t) (taaaya) (0.0677) (0.0751) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayapu) (0.1199) (0.1377) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayanu) (0.1166) (0.1338) TableT1CornerRow +(Delay DFTRAMBYP to AYA) (1,2) (t) (dftrambypaya) (0.1051) (0.1197) TableT1CornerRow +(Delay CENB to CENYB) (1,2) (t) (cenbcenyb) (0.0856) (0.0947) TableT1CornerRow +(Delay TCENB to CENYB) (1,2) (t) (tcenbcenyb) (0.0850) (0.0939) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybpu) (0.1103) (0.1236) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybnu) (0.1763) (0.1996) TableT1CornerRow +(Delay DFTRAMBYP to CENYB) (1,2) (t) (dftrambypcenyb) (0.1096) (0.1226) TableT1CornerRow +(Delay WENB to WENYB) (1,2) (t) (wenbwenyb) (0.0831) (0.0927) TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (13) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 14 14 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=588 after continuation +(Delay TWENB to WENYB) (1,2) (t) (twenbwenyb) (0.0834) (0.0930) TableT1CornerRow +(Delay TENB to WENYB) (1,2) (t) (tenbwenybpu) (0.1740) (0.2539) TableT1CornerRow +(Delay TENB to WENYB) (1,2) (t) (tenbwenybnu) (0.1764) (0.2667) TableT1CornerRow +(Delay DFTRAMBYP to WENYB) (1,2) (t) (dftrambypwenyb) (0.1061) (0.1651) TableT1CornerRow +(Delay AB to AYB) (1,2) (t) (abayb) (0.0685) (0.0753) TableT1CornerRow +(Delay TAB to AYB) (1,2) (t) (tabayb) (0.0701) (0.0779) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybpu) (0.1675) (0.1929) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybnu) (0.1692) (0.1969) TableT1CornerRow +(Delay DFTRAMBYP to AYB) (1,2) (t) (dftrambypayb) (0.0996) (0.1194) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=378 +% headerEstimate=77 +% estimate=364 +% tailEstimate=0 +% spaceLeft=378 +/pagey pagey 5 sub def +(Pin Capacitance) (units = fF) pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +(CLKA) () (10.4820) Table1CornerRow +(CENA) () (1.8080) Table1CornerRow +(AA) () (1.2230) Table1CornerRow +(CLKB) () (10.5510) Table1CornerRow +(CENB) () (1.4630) Table1CornerRow +(WENB) () (1.6840) Table1CornerRow +(AB) () (1.2260) Table1CornerRow +(DB) () (1.9200) Table1CornerRow +(EMAA) () (5.8590) Table1CornerRow +(EMASA) () (2.1460) Table1CornerRow +(EMAB) () (5.7120) Table1CornerRow +(TENA) () (0.9716) Table1CornerRow +(TCENA) () (1.5820) Table1CornerRow +(TAA) () (1.3580) Table1CornerRow +(TENB) () (1.1880) Table1CornerRow +(TCENB) () (1.5760) Table1CornerRow +(TWENB) () (1.4850) Table1CornerRow +(TAB) () (1.3690) Table1CornerRow +(TDB) () (1.5900) Table1CornerRow +(SIA) () (1.5160) Table1CornerRow +(SEA) () (1.8880) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (14) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 15 15 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Pin Capacitance continued) (units = fF) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +/TextFont /Helvetica-Bold findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +% spaceLeft=511 after continuation +(DFTRAMBYP) () (2.0730) Table1CornerRow +(SIB) () (5.5570) Table1CornerRow +(SEB) () (1.8910) Table1CornerRow +(COLLDISN) () (2.3810) Table1CornerRow +(RET1N) () (3.5130) Table1CornerRow +Table1CornerEnd +/pagey exch def +% after table spaceLeft=441 +% headerEstimate=77 +% estimate=644 +% tailEstimate=94 +% spaceLeft=441 +/Helvetica-Bold findfont text_size scalefont setfont +(Current) (units = mA) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(Core Standby std Curr.) (3) (0.230985) Table1CornerRow +(Peri Standby std Curr.) (3) (1.178165) Table1CornerRow +(Core Standby Retention-1 Curr.) (3) (0.265746) Table1CornerRow +(Peri Standby Retention-1 Curr.) (3) (0.111473) Table1CornerRow +(Core Standby Selective Precharge Curr.) (3) (0.227337) Table1CornerRow +(Peri Standby Selective Precharge Curr.) (3) (1.096501) Table1CornerRow +(Core Read AC (EMAA=0) Curr.) (1,4) (9.188e-05) Table1CornerRow +(Core Read AC (EMAA=1) Curr.) (1,4) (9.229e-05) Table1CornerRow +(Core Read AC (EMAA=2) Curr.) (1,4) (9.229e-05) Table1CornerRow +(Core Read AC (EMAA=3) Curr.) (1,4) (9.247e-05) Table1CornerRow +(Core Read AC (EMAA=4) Curr.) (1,4) (9.517e-05) Table1CornerRow +(Core Read AC (EMAA=5) Curr.) (1,4) (9.683e-05) Table1CornerRow +(Core Read AC (EMAA=6) Curr.) (1,4) (9.809e-05) Table1CornerRow +(Core Read AC (EMAA=7) Curr.) (1,4) (9.975e-05) Table1CornerRow +(Peri Read AC (EMAA=0) Curr.) (1,4) (3.638e-03) Table1CornerRow +(Peri Read AC (EMAA=1) Curr.) (1,4) (3.638e-03) Table1CornerRow +(Peri Read AC (EMAA=2) Curr.) (1,4) (3.638e-03) Table1CornerRow +(Peri Read AC (EMAA=3) Curr.) (1,4) (3.639e-03) Table1CornerRow +(Peri Read AC (EMAA=4) Curr.) (1,4) (3.653e-03) Table1CornerRow +(Peri Read AC (EMAA=5) Curr.) (1,4) (3.669e-03) Table1CornerRow +(Peri Read AC (EMAA=6) Curr.) (1,4) (3.674e-03) Table1CornerRow +(Peri Read AC (EMAA=7) Curr.) (1,4) (3.674e-03) Table1CornerRow +(Core Write AC (EMAB=0) Curr.) (1,4) (2.591e-04) Table1CornerRow +(Core Write AC (EMAB=1) Curr.) (1,4) (2.595e-04) Table1CornerRow +(Core Write AC (EMAB=2) Curr.) (1,4) (2.595e-04) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (15) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 16 16 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Current continued) (units = mA) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +% spaceLeft=593 after continuation +(Core Write AC (EMAB=3) Curr.) (1,4) (2.597e-04) Table1CornerRow +(Core Write AC (EMAB=4) Curr.) (1,4) (2.624e-04) Table1CornerRow +(Core Write AC (EMAB=5) Curr.) (1,4) (2.640e-04) Table1CornerRow +(Core Write AC (EMAB=6) Curr.) (1,4) (2.653e-04) Table1CornerRow +(Core Write AC (EMAB=7) Curr.) (1,4) (2.670e-04) Table1CornerRow +(Peri Write AC (EMAB=0) Curr.) (1,4) (4.479e-03) Table1CornerRow +(Peri Write AC (EMAB=1) Curr.) (1,4) (4.479e-03) Table1CornerRow +(Peri Write AC (EMAB=2) Curr.) (1,4) (4.479e-03) Table1CornerRow +(Peri Write AC (EMAB=3) Curr.) (1,4) (4.481e-03) Table1CornerRow +(Peri Write AC (EMAB=4) Curr.) (1,4) (4.494e-03) Table1CornerRow +(Peri Write AC (EMAB=5) Curr.) (1,4) (4.511e-03) Table1CornerRow +(Peri Write AC (EMAB=6) Curr.) (1,4) (4.516e-03) Table1CornerRow +(Peri Write AC (EMAB=7) Curr.) (1,4) (4.516e-03) Table1CornerRow +(Core Deselect(A) (icc_c_desela) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(A) (icc_p_desela) Curr.) (2,4) (6.071e-05) Table1CornerRow +(Core Deselect(B) (icc_c_deselb) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(B) (icc_p_deselb) Curr.) (2,4) (1.156e-03) Table1CornerRow +(Core Peak (icc_c_peak) Curr.) () (5.299387) Table1CornerRow +(Peri Peak (icc_p_peak) Curr.) () (66.825833) Table1CornerRow +(Core Inrush (icc_c_inrush) Curr.) () (2.617944) Table1CornerRow +(Peri Inrush (icc_p_inrush) Curr.) () (51.02643) Table1CornerRow +Table1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 4 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The AC current value assumes 50% read and write\ + operations, where 50% addresses and 50% of input\ + and output pins switch at the user defined frequency of 1MHz\ + and user defined clock activity_factor of 50%.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The deselected current assumes the memory is deselected,\ + 50% addresses switch, and 50% of input pins switch\ + at the user defined frequency of 1MHz.\ + The logic switching component of deselected power becomes\ + negligbly small if the input pins are held stable by\ + externally controlling these signals with chip select.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(3) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The standby current value is independent of frequency\ + and assumes all inputs and outputs are stable.) TextPiece +TextParaEnd +TextParaStart +(4) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The leakage current component is not included in this value.) TextPiece +TextParaEnd +TextParaStart +(5) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Clock activity factor will affect total current.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=205 +() (16) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 17 17 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Clock Noise Limit) (Time-units = ns, Voltage-units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 45 45 leftmargin 55 sub pagey 14 TableD1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +TableD1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(CLKA) (0.0463) (0.1980) TableD1CornerRow +(CLKB) (0.0479) (0.1980) TableD1CornerRow +TableD1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The clock noise limit is the maximum voltage allowed \(for the\ + indicated pulse width\) that does not cause an unintentional\ + memory cycle or other memory failure.) TextLine +TextEnd +/pagey exch def +(Supply Noise Limit) (units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 90 leftmargin 55 sub pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(Power) () (0.0990) Table1CornerRow +(Ground) () (0.0990) Table1CornerRow +Table1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The power and ground noise limit is the maximum supply\ + voltage transition that is allowed without causing\ + a memory failure.) TextLine +TextEnd +/pagey exch def +centerx 300 EndingCopyright +() (17) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Trailer +%%Pages: 17 +%%EOF diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_rtl.v b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_rtl.v new file mode 100644 index 00000000..18bdf1c4 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_rtl.v @@ -0,0 +1,275 @@ +/* verilog_rtl_memcomp Version: 4.0.5-beta11 */ +/* common_memcomp Version: 4.0.5.2-amci */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// Repair Verilog RTL for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x128_wm1_rtl_top +// Words: 32 +// User Bits: 128 +// Mux: 2 +// Drive: 6 +// Write Mask: On +// Extra Margin Adjustment: On +// Redundancy: off +// Redundant Rows: 0 +// Redundant Columns: 2 +// Test Muxes On +// Ser: none +// Retention: on +// Power Gating: off +// +// Creation Date: Thu Oct 17 15:32:14 2019 +// Version: r4p0 +// +// Verified +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// +`timescale 1ns/1ps + +module rf2_32x128_wm1_rtl_top ( + CENYA, + AYA, + CENYB, + WENYB, + AYB, + QA, + SOA, + SOB, + CLKA, + CENA, + AA, + CLKB, + CENB, + WENB, + AB, + DB, + EMAA, + EMASA, + EMAB, + TENA, + TCENA, + TAA, + TENB, + TCENB, + TWENB, + TAB, + TDB, + RET1N, + SIA, + SEA, + DFTRAMBYP, + SIB, + SEB, + COLLDISN + ); + + output CENYA; + output [4:0] AYA; + output CENYB; + output [127:0] WENYB; + output [4:0] AYB; + output [127:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [127:0] WENB; + input [4:0] AB; + input [127:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [127:0] TWENB; + input [4:0] TAB; + input [127:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; + wire [127:0] QOA; + wire [127:0] DIB; + + assign QA = QOA; + assign DIB = DB; + rf2_32x128_wm1_fr_top u0 ( + .CENYA(CENYA), + .AYA(AYA), + .CENYB(CENYB), + .WENYB(WENYB), + .AYB(AYB), + .QOA(QOA), + .SOA(SOA), + .SOB(SOB), + .CLKA(CLKA), + .CENA(CENA), + .AA(AA), + .CLKB(CLKB), + .CENB(CENB), + .WENB(WENB), + .AB(AB), + .DIB(DIB), + .EMAA(EMAA), + .EMASA(EMASA), + .EMAB(EMAB), + .TENA(TENA), + .TCENA(TCENA), + .TAA(TAA), + .TENB(TENB), + .TCENB(TCENB), + .TWENB(TWENB), + .TAB(TAB), + .TDB(TDB), + .RET1N(RET1N), + .SIA(SIA), + .SEA(SEA), + .DFTRAMBYP(DFTRAMBYP), + .SIB(SIB), + .SEB(SEB), + .COLLDISN(COLLDISN) +); + +endmodule + +module rf2_32x128_wm1_fr_top ( + CENYA, + AYA, + CENYB, + WENYB, + AYB, + QOA, + SOA, + SOB, + CLKA, + CENA, + AA, + CLKB, + CENB, + WENB, + AB, + DIB, + EMAA, + EMASA, + EMAB, + TENA, + TCENA, + TAA, + TENB, + TCENB, + TWENB, + TAB, + TDB, + RET1N, + SIA, + SEA, + DFTRAMBYP, + SIB, + SEB, + COLLDISN + ); + + output CENYA; + output [4:0] AYA; + output CENYB; + output [127:0] WENYB; + output [4:0] AYB; + output [127:0] QOA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [127:0] WENB; + input [4:0] AB; + input [127:0] DIB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [127:0] TWENB; + input [4:0] TAB; + input [127:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; + + wire [127:0] DB; + wire [127:0] QA; + + assign DB=DIB; + assign QOA=QA; + rf2_32x128_wm1 u0 ( + .CENYA(CENYA), + .AYA(AYA), + .CENYB(CENYB), + .WENYB(WENYB), + .AYB(AYB), + .QA(QA), + .SOA(SOA), + .SOB(SOB), + .CLKA(CLKA), + .CENA(CENA), + .AA(AA), + .CLKB(CLKB), + .CENB(CENB), + .WENB(WENB), + .AB(AB), + .DB(DB), + .EMAA(EMAA), + .EMASA(EMASA), + .EMAB(EMAB), + .TENA(TENA), + .TCENA(TCENA), + .TAA(TAA), + .TENB(TENB), + .TCENB(TCENB), + .TWENB(TWENB), + .TAB(TAB), + .TDB(TDB), + .RET1N(RET1N), + .SIA(SIA), + .SEA(SEA), + .DFTRAMBYP(DFTRAMBYP), + .SIB(SIB), + .SEB(SEB), + .COLLDISN(COLLDISN) + ); + +endmodule // rf2_32x128_wm1_fr_top + diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.avm b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.avm new file mode 100644 index 00000000..a7e4ac1d --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.avm @@ -0,0 +1,162 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Thu Oct 17 15:29:19 2019 +# +# Instance Options: +# Instance Name: rf2_32x128_wm1 +# Number of Words: 32 +# Number of Bits: 128 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: on +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: avm +# AMCI Version: 1.4.3-EAC +# avm_memcomp Version: 2.1.1-EAC +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +rf2_32x128_wm1 { + MEMORY_TYPE RegFile + EQUIV_GATE_COUNT 4506 + VDD_PIN VDDCE VDDPE + GND_PIN VSSE + #This file is for PROCESS SS, CORNER SS_0P81V_0P81V_M40C + #However, RedHawk needs the process to be specified as 'PROCESS XX' + PROCESS XX + Cload 3.5e-05nF + VDD 0.81 0.81 + + state_boolean avm_into_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!RET1N&!DFTRAMBYP)" "!RET1N" "NA" + state_boolean avm_outof_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&RET1N&!DFTRAMBYP)" "RET1N" "NA" + state_boolean avm_read_write "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_read_desel "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&CENB)|(CLKB&!TENB&TCENB))" "CLKA CLKB" "NA" + state_boolean avm_desel_write "RET1N&!DFTRAMBYP&((CLKA&TENA&CENA)|(CLKA&!TENA&TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_scan_capture "((CLKA&!SEA&RET1N&DFTRAMBYP)&(CLKB&!SEB&RET1N&DFTRAMBYP))" "DFTRAMBYP" "NA" + state_boolean avm_scan_shift "(CLKA&SEA&RET1N&DFTRAMBYP)&(CLKB&SEB&RET1N&DFTRAMBYP)" "DFTRAMBYP" "NA" + state_boolean standby_trig "RET1N&((CLKA&CENA&TENA)|(CLKA&TCENA&!TENA))&((CLKB&CENB&TENB)|(CLKB&TCENB&!TENB))&!DFTRAMBYP" "CLKA CLKB" "NA" + state_boolean standby_ntrig "RET1N&((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!DFTRAMBYP" "!CLKA !CLKB" "NA" + + Cpd avm_into_lowpwr { + VDDCE VSSE 5.04933e-05nF + VDDPE VSSE 5.58322e-04nF + } + PEAK_I avm_into_lowpwr { + VDDCE VSSE 0.76442mA + VDDPE VSSE 2.79191mA + } + Cpd avm_outof_lowpwr { + VDDCE VSSE 5.55427e-05nF + VDDPE VSSE 4.44754e-03nF + } + PEAK_I avm_outof_lowpwr { + VDDCE VSSE 0.84086mA + VDDPE VSSE 21.80573mA + } + Cpd avm_read_write { + VDDCE VSSE 2.70708e-04nF + VDDPE VSSE 7.50580e-03nF + } + PEAK_I avm_read_write { + VDDCE VSSE 1.66815mA + VDDPE VSSE 23.32566mA + } + Cpd avm_read_desel { + VDDCE VSSE 9.30272e-05nF + VDDPE VSSE 3.36233e-03nF + } + PEAK_I avm_read_desel { + VDDCE VSSE 0.81027mA + VDDPE VSSE 15.06321mA + } + Cpd avm_desel_write { + VDDCE VSSE 1.77681e-04nF + VDDPE VSSE 4.14347e-03nF + } + PEAK_I avm_desel_write { + VDDCE VSSE 1.27866mA + VDDPE VSSE 20.73249mA + } + Cpd avm_scan_capture { + VDDCE VSSE 8.14454e-06nF + VDDPE VSSE 9.88468e-03nF + } + PEAK_I avm_scan_capture { + VDDCE VSSE 0.14129mA + VDDPE VSSE 13.03296mA + } + Cpd avm_scan_shift { + VDDCE VSSE 8.14454e-06nF + VDDPE VSSE 9.88468e-03nF + } + PEAK_I avm_scan_shift { + VDDCE VSSE 0.14129mA + VDDPE VSSE 13.03296mA + } + Cpd standby_trig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.69190e-05nF + } + Cpd standby_ntrig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.87989e-05nF + } + LEAKAGE_I { + VDDCE VSSE 1.86600e-04mA + VDDPE VSSE 3.12400e-04mA + } + tsu 0.25018ns + ck2q_delay 1.06727ns + tr_q 0.035168ns + tf_q 0.039641ns + CHARACTERIZATION_MODE accurate +} diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.dat b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.dat new file mode 100644 index 00000000..2a1c9063 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.dat @@ -0,0 +1,334 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Thu Oct 17 15:29:41 2019 +# +# Instance Options: +# Instance Name: rf2_32x128_wm1 +# Number of Words: 32 +# Number of Bits: 128 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: on +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: datatable +# AMCI Version: 1.4.3-EAC +# datatable_memcomp Version: 1.3.0-amci +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +# Units used in Datatable : +# geomx: micron +# geomy: micron +# Voltage: volts +# Temprature: Degree Celsius +# Current: mA +# Time: ns +# +name ss_0p81v_0p81v_m40c +S N +geomx 21.1650 +geomy 414.8600 +volt 0.8100 +temp -40.0000 +# High Density Two Port Register File SVT MVT Compiler : Propagation Delay specific information. +tcenacenya 0.2145 +ttcenacenya 0.2108 +ttenacenyapu 0.3026 +ttenacenyanu 0.3541 +tdftrambypcenya 0.3853 +taaaya 0.2110 +ttaaaya 0.2184 +ttenaayapu 0.3904 +ttenaayanu 0.3751 +tdftrambypaya 0.3736 +tcenbcenyb 0.2113 +ttcenbcenyb 0.2108 +ttenbcenybpu 0.3045 +ttenbcenybnu 0.5445 +tdftrambypcenyb 0.3738 +twenbwenyb 0.2952 +ttwenbwenyb 0.2956 +ttenbwenybpu 0.6920 +ttenbwenybnu 0.7096 +tdftrambypwenyb 0.4014 +tabayb 0.2105 +ttabayb 0.2161 +ttenbaybpu 0.5881 +ttenbaybnu 0.5463 +tdftrambypayb 0.3669 +taccqa_rd0 1.0376 +taccqa_rd1 1.0475 +taccqa_rd2 1.0539 +taccqa_rd3 1.0673 +taccqa_rd4 1.1793 +taccqa_rd5 1.3001 +taccqa_rd6 1.4271 +taccqa_rd7 1.5453 +taccqa_scan0 1.0376 +taccqa_scan1 1.0475 +taccqa_scan2 1.0539 +taccqa_scan3 1.0673 +taccqa_scan4 1.1793 +taccqa_scan5 1.3001 +taccqa_scan6 1.4271 +taccqa_scan7 1.5453 +tclkasoa_rd0 1.1411 +tclkasoa_rd1 1.1511 +tclkasoa_rd2 1.1575 +tclkasoa_rd3 1.1709 +tclkasoa_rd4 1.2829 +tclkasoa_rd5 1.4036 +tclkasoa_rd6 1.5307 +tclkasoa_rd7 1.6489 +tclkasoa_scan0 1.1411 +tclkasoa_scan1 1.1511 +tclkasoa_scan2 1.1575 +tclkasoa_scan3 1.1709 +tclkasoa_scan4 1.2829 +tclkasoa_scan5 1.4036 +tclkasoa_scan6 1.5307 +tclkasoa_scan7 1.6489 +tclkbsob 0.5242 +# High Density Two Port Register File SVT MVT Compiler : Kload specific information. +kload_cenya 3.3060 +kload_aya 2.7500 +kload_cenyb 3.3440 +kload_wenyb 3.0700 +kload_ayb 2.7720 +kload_qa 1.0935 +kload_soa 2.7600 +kload_sob 3.1660 +# High Density Two Port Register File SVT MVT Compiler : Cycle time specific information. +tcyca_ema0 1.5694 +tcyca_ema1 1.5795 +tcyca_ema2 1.5860 +tcyca_ema3 1.5996 +tcyca_ema4 1.7133 +tcyca_ema5 1.8358 +tcyca_ema6 1.9648 +tcyca_ema7 2.0848 +tcycb_ema0 1.7290 +tcycb_ema1 1.7502 +tcycb_ema2 1.7705 +tcycb_ema3 1.8027 +tcycb_ema4 1.9388 +tcycb_ema5 2.0557 +tcycb_ema6 2.2098 +tcycb_ema7 2.3243 +# High Density Two Port Register File SVT MVT Compiler : Clock collision specific information. +tcracwb_rd0 0.8419 +tcracwb_rd1 0.8519 +tcracwb_rd2 0.8583 +tcracwb_rd3 0.8717 +tcracwb_rd4 0.9837 +tcracwb_rd5 1.1044 +tcracwb_rd6 1.2315 +tcracwb_rd7 1.3497 +tcwbcra_wr0 1.1797 +tcwbcra_wr1 1.2006 +tcwbcra_wr2 1.2206 +tcwbcra_wr3 1.2523 +tcwbcra_wr4 1.3865 +tcwbcra_wr5 1.5016 +tcwbcra_wr6 1.6535 +tcwbcra_wr7 1.7662 +# High Density Two Port Register File SVT MVT Compiler : Pulse width specific information. +tckah 0.1790 +tckal 0.1936 +tckbh 0.1812 +tckbl 0.1760 +# High Density Two Port Register File SVT MVT Compiler : Setup time specific information. +tcenas 0.2125 +taas 0.2502 +tcenbs 0.2141 +twenbs 0.0857 +tabs 0.2561 +tdbs 0.1681 +temaas 1.6830 +temasas 1.6830 +temabs 1.8861 +ttenas 0.4407 +ttcenas 0.2138 +ttaas 0.2589 +ttenbs 0.7733 +ttcenbs 0.2147 +ttwenbs 0.0862 +ttabs 0.2633 +ttdbs 0.1738 +tsias 0.4848 +tseas 0.4848 +tdftrambypas 0.6768 +tdftrambypbs 0.6768 +tsibs 0.1681 +tsebs 0.7733 +tcolldisnas 1.6830 +tcolldisnbs 1.8861 +# High Density Two Port Register File SVT MVT Compiler : Hold time specific information. +tcenah 0.0854 +tcenaf_ret1nfh 1.8669 +tcenaf_ret1nrh 0.7170 +taah 0.1392 +tcenbh 0.0857 +tcenbf_ret1nfh 1.8669 +tcenbf_ret1nrh 0.7170 +twenbh 0.3114 +tabh 0.1263 +tdbh 0.3013 +temaah 2.3430 +temasah 2.3430 +temabh 2.3885 +ttenah 0.1531 +ttcenah 0.0871 +ttcenaf_ret1nfh 1.8669 +ttcenaf_ret1nrh 0.7170 +ttaah 0.1392 +ttenbh 0.3425 +ttcenbh 0.0870 +ttcenbf_ret1nfh 1.8669 +ttcenbf_ret1nrh 0.7170 +ttwenbh 0.3114 +ttabh 0.1263 +ttdbh 0.3013 +tret1nf_dftrambypfh 0.0537 +tret1nr_dftrambypfh 1.8669 +tret1nf_cenbrh 0.0537 +tret1nf_cenarh 0.0534 +tret1nf_tcenarh 0.0534 +tret1nf_tcenbrh 0.0537 +tret1nr_tcenbrh 1.8669 +tret1nr_tcenarh 1.6638 +tret1nr_cenbrh 1.8669 +tret1nr_cenarh 1.6638 +tsiah 0.1246 +tseah 2.3430 +tdftrambypah 2.3430 +tdftrambypbh 1.8669 +tdftrambypr_ret1nfh 1.8669 +tdftrambypr_ret1nrh 0.7170 +tsibh 0.3013 +tsebh 0.3425 +tcolldisnah 2.3430 +tcolldisnbh 2.3885 +# High Density Two Port Register File SVT MVT Compiler : Input Capacitance specific information. +icap_clka 0.0087 +icap_cena 0.0014 +icap_aa 0.0017 +icap_clkb 0.0088 +icap_cenb 0.0011 +icap_wenb 0.0016 +icap_ab 0.0015 +icap_db 0.0018 +icap_emaa 0.0056 +icap_emasa 0.0021 +icap_emab 0.0054 +icap_tena 0.0008 +icap_tcena 0.0012 +icap_taa 0.0016 +icap_tenb 0.0009 +icap_tcenb 0.0012 +icap_twenb 0.0014 +icap_tab 0.0014 +icap_tdb 0.0015 +icap_sia 0.0011 +icap_sea 0.0016 +icap_dftrambyp 0.0016 +icap_sib 0.0054 +icap_seb 0.0017 +icap_colldisn 0.0021 +icap_ret1n 0.0032 +# High Density Two Port Register File SVT MVT Compiler : current specific information. +icc_standby_c_chipdisable 1.866e-04 +icc_standby_p_chipdisable 3.124e-04 +icc_standby_c_ret1 1.865e-04 +icc_standby_p_ret1 2.048e-06 +icc_standby_c_selective_precharge 1.858e-04 +icc_standby_p_selective_precharge 2.330e-04 +icc_c_rd0_a 7.514e-05 +icc_c_rd1_a 7.518e-05 +icc_c_rd2_a 7.535e-05 +icc_c_rd3_a 7.535e-05 +icc_c_rd4_a 7.666e-05 +icc_c_rd5_a 7.775e-05 +icc_c_rd6_a 7.805e-05 +icc_c_rd7_a 7.823e-05 +icc_p_rd0_a 2.723e-03 +icc_p_rd1_a 2.723e-03 +icc_p_rd2_a 2.723e-03 +icc_p_rd3_a 2.723e-03 +icc_p_rd4_a 2.727e-03 +icc_p_rd5_a 2.731e-03 +icc_p_rd6_a 2.731e-03 +icc_p_rd7_a 2.734e-03 +icc_c_wr0_b 1.437e-04 +icc_c_wr1_b 1.438e-04 +icc_c_wr2_b 1.439e-04 +icc_c_wr3_b 1.439e-04 +icc_c_wr4_b 1.452e-04 +icc_c_wr5_b 1.463e-04 +icc_c_wr6_b 1.466e-04 +icc_c_wr7_b 1.468e-04 +icc_p_wr0_b 3.356e-03 +icc_p_wr1_b 3.356e-03 +icc_p_wr2_b 3.356e-03 +icc_p_wr3_b 3.356e-03 +icc_p_wr4_b 3.360e-03 +icc_p_wr5_b 3.364e-03 +icc_p_wr6_b 3.364e-03 +icc_p_wr7_b 3.367e-03 +icc_c_desela 0.000e+00 +icc_p_desela 4.150e-05 +icc_c_deselb 0.000e+00 +icc_p_deselb 8.715e-04 +icc_c_peak 1.668155 +icc_p_peak 23.325655 +icc_c_inrush 0.896531 +icc_p_inrush 21.74526 diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.lib b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.lib new file mode 100644 index 00000000..9d95c230 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.lib @@ -0,0 +1,71102 @@ +/* + * CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. + * + * Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. + * + * Use of this Software is subject to the terms and conditions of the + * applicable license agreement with ARM Physical IP, Inc. + * In addition, this Software is protected by patents, copyright law + * and international treaties. + * + * The copyright notice(s) in this Software does not indicate actual or + * intended publication of this Software. + * + * Compiler Name: High Density Two Port Register File SVT MVT Compiler + * + * Creation Date: Thu Oct 17 15:30:54 2019 + * + * Instance Options: + * Instance Name: rf2_32x128_wm1 + * Number of Words: 32 + * Number of Bits: 128 + * Multiplexer Width: 2 + * Multi-Vt selection: BASE + * Frequency : 1 + * Activity Factor <%>: 50 + * Pipeline: off + * Word-Write Mask: on + * Word Partition Size: 1 + * Write through: off + * Top Metal Layer: m5-m10 + * Power Type: otc + * Redundancy: off + * Redundant Columns: 2 + * Redundant Rows: 0 + * BIST MUXes: on + * Soft Error Repair (SER): none + * Power Gating: off + * Back Biasing: off + * Retention: on + * Extra Margin Adjustment: on + * Advanced Test Features: off + * Customer Comment: This is a memory instance + * Bus-notation: on + * Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE + * Name Case: upper + * Check Instance Name: off + * Diodes: on + * Drive Strength: 6 + * Site Definitions: off + * Library Name: USERLIB + * Liberty setting: nldm + * + * Compiler Versions: + * Memory Version: r4p0 + * Lang compiler Version: 4.1.6-EAC2 + * View Name: Liberty + * AMCI Version: 1.4.3-EAC + * RTE Version: 2.1.0-EAC + * liberty_memcomp Version: 2.2.1-EAC + * + * Verified With: + * Synopsys Primetime, Cadence Encounter Timing System, Synopsys Design Compiler, + * Cadence RTL Compiler. + * + * Modeling Assumptions: + * This library contains a black box description for a memory element. At + * the library level, a default_max_transition constraint is set to the + * maximum characterized input slew. Each output has a max_capacitance + * constraint set to the highest characterized output load. These two + * constraints force Design Compiler to synthesize circuits that operate + * within the characterization space. The user can tighten these constraints, + * if desired. When writing SDF from Synopsys Design Compiler or Synopsys + * Primetime, use the version 3.0 or 2.1 option. This ensures the SDF will + * annotate to simulation models provided with this generator. + * + * Modeling Limitations: + * Due to limitations of the .lib format, some data reduction was necessary. + * When reducing data, minimum values were chosen for the fast case corner + * and maximum values were used for the typical and best case corners. It + * is recommended that critical timing and setup and hold times be checked + * at all corners. + * + * Known Bugs: N/A + * + * Known Work Arounds: N/A + * +*/ + +library(USERLIB_ss_0p81v_0p81v_m40c) { + delay_model : table_lookup; + library_features(report_delay_calculation,report_power_calculation); + revision : 1.1; + date : "Thu Oct 17 15:30:54 2019"; + comment : "Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved."; + + /* unit attributes */ + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1mA"; + leakage_power_unit : "1mW"; + nom_process : 1; + nom_temperature : -40; + nom_voltage : 0.81; + capacitive_load_unit(1,pf); + pulling_resistance_unit : "1kohm"; + + /* default attributes */ + default_fanout_load : 1.000; + default_cell_leakage_power : 0.000; + default_inout_pin_cap : 0.005; + default_input_pin_cap : 0.005; + default_output_pin_cap : 0.000; + + /* threshold definitions */ + default_leakage_power_density : 0.000; + slew_derate_from_library : 0.500; + slew_lower_threshold_pct_fall : 30.000; + slew_upper_threshold_pct_fall : 70.000; + slew_lower_threshold_pct_rise : 30.000; + slew_upper_threshold_pct_rise : 70.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + /* k-factors */ + k_process_cell_fall : 0.000; + k_process_cell_leakage_power : 0.000; + k_process_cell_rise : 0.000; + k_process_fall_transition : 0.000; + k_process_hold_fall : 0.000; + k_process_hold_rise : 0.000; + k_process_internal_power : 0.000; + k_process_min_pulse_width_high : 0.000; + k_process_min_pulse_width_low : 0.000; + k_process_pin_cap : 0.000; + k_process_recovery_fall : 0.000; + k_process_recovery_rise : 0.000; + k_process_rise_transition : 0.000; + k_process_setup_fall : 0.000; + k_process_setup_rise : 0.000; + k_process_wire_cap : 0.000; + k_process_wire_res : 0.000; + k_temp_cell_fall : 0.000; + k_temp_cell_rise : 0.000; + k_temp_hold_fall : 0.000; + k_temp_hold_rise : 0.000; + k_temp_min_pulse_width_high : 0.000; + k_temp_min_pulse_width_low : 0.000; + k_temp_min_period : 0.000; + k_temp_rise_propagation : 0.000; + k_temp_fall_propagation : 0.000; + k_temp_rise_transition : 0.000; + k_temp_fall_transition : 0.000; + k_temp_recovery_fall : 0.000; + k_temp_recovery_rise : 0.000; + k_temp_setup_fall : 0.000; + k_temp_setup_rise : 0.000; + k_volt_cell_fall : 0.000; + k_volt_cell_rise : 0.000; + k_volt_hold_fall : 0.000; + k_volt_hold_rise : 0.000; + k_volt_min_pulse_width_high : 0.000; + k_volt_min_pulse_width_low : 0.000; + k_volt_min_period : 0.000; + k_volt_rise_propagation : 0.000; + k_volt_fall_propagation : 0.000; + k_volt_rise_transition : 0.000; + k_volt_fall_transition : 0.000; + k_volt_recovery_fall : 0.000; + k_volt_recovery_rise : 0.000; + k_volt_setup_fall : 0.000; + k_volt_setup_rise : 0.000; + + /* Additional instance information */ + define ("peak_current", "cell", "float"); + define ("retention_current", "cell", "float"); + define ("inrush_current", "cell", "float"); + + /* templates */ + lu_table_template(rf2_32x128_wm1_inputslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_inputslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_inputslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_outputload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_bistload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + + type (rf2_32x128_wm1_AYA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_WENYB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AYB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_QA) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SOA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SOB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_WENB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_DB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_EMAA) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_EMAB) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TAA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TWENB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TAB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TDB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SIA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SIB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + + /* voltage-maps */ + voltage_map (VDDCE, 0.81); + voltage_map (VDDPE, 0.81); + voltage_map (VSSE, 0.0); + + /* operating-conditions */ + operating_conditions(ss_0p81v_0p81v_m40c) { + process : 1; + temperature : -40; + voltage : 0.81; + tree_type : balanced_tree; + } + default_operating_conditions : ss_0p81v_0p81v_m40c; + + /* wire-loads */ + wire_load("sample") { + resistance : 1.6e-05; + capacitance : 0.0002; + area : 1.7; + slope : 500; + fanout_length(1,500); + } + + cell(rf2_32x128_wm1) { + area : 8780.511900; + dont_use : true; + dont_touch : true; + interface_timing : true; + is_memory_cell : true; + /* Peak current of all modes. */ + peak_current : 24.993810; + /* Peak current when entering or exiting the power modes. */ + inrush_current : 22.641791; + /* leakage current in retention mode (RET1N=0) */ + retention_current : 0.0001886; + memory() { + type : ram; + address_width : 5; + word_width : 128; + } + pg_pin(VDDCE) { + voltage_name : VDDCE; + pg_type : backup_power; + direction : inout; + } + pg_pin(VDDPE) { + voltage_name : VDDPE; + pg_type : primary_power; + direction : inout; + } + pg_pin(VSSE) { + voltage_name : VSSE; + pg_type : primary_ground; + direction : inout; + } + pin(CENYA) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : CENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151710, 0.158420, 0.164150, 0.176670, 0.209340, 0.257350, 0.354200", \ + "0.154470, 0.160890, 0.167030, 0.179250, 0.210810, 0.265460, 0.370920", \ + "0.157770, 0.163320, 0.168700, 0.180590, 0.212980, 0.262900, 0.360790", \ + "0.165520, 0.172180, 0.177590, 0.189490, 0.222660, 0.271740, 0.372840", \ + "0.176310, 0.182660, 0.188220, 0.200780, 0.232900, 0.283910, 0.378490", \ + "0.227210, 0.233880, 0.239590, 0.252130, 0.283410, 0.332720, 0.432500", \ + "0.293170, 0.300050, 0.305600, 0.318200, 0.349420, 0.399870, 0.505940" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136539, 0.143249, 0.148979, 0.161499, 0.194169, 0.242179, 0.339029", \ + "0.139299, 0.145719, 0.151859, 0.164079, 0.195639, 0.250289, 0.355749", \ + "0.142599, 0.148149, 0.153529, 0.165419, 0.197809, 0.247729, 0.345619", \ + "0.150349, 0.157009, 0.162419, 0.174319, 0.207489, 0.256569, 0.357669", \ + "0.161139, 0.167489, 0.173049, 0.185609, 0.217729, 0.268739, 0.363319", \ + "0.212039, 0.218709, 0.224419, 0.236959, 0.268239, 0.317549, 0.417329", \ + "0.277999, 0.284879, 0.290429, 0.303029, 0.334249, 0.384699, 0.490769" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150630, 0.158500, 0.165520, 0.182040, 0.229550, 0.303660, 0.462160", \ + "0.153560, 0.162450, 0.169740, 0.185510, 0.231940, 0.308550, 0.462370", \ + "0.157630, 0.165500, 0.172570, 0.189020, 0.236860, 0.314230, 0.467100", \ + "0.167320, 0.175010, 0.182030, 0.198780, 0.244720, 0.320980, 0.477200", \ + "0.181960, 0.190530, 0.198010, 0.214540, 0.260430, 0.339580, 0.499170", \ + "0.233610, 0.241440, 0.248430, 0.265060, 0.312210, 0.390030, 0.543210", \ + "0.313080, 0.321390, 0.328250, 0.344160, 0.390770, 0.469460, 0.629230" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.135567, 0.143437, 0.150457, 0.166977, 0.214487, 0.288597, 0.447097", \ + "0.138497, 0.147387, 0.154677, 0.170447, 0.216877, 0.293487, 0.447307", \ + "0.142567, 0.150437, 0.157507, 0.173957, 0.221797, 0.299167, 0.452037", \ + "0.152257, 0.159947, 0.166967, 0.183717, 0.229657, 0.305917, 0.462137", \ + "0.166897, 0.175467, 0.182947, 0.199477, 0.245367, 0.324517, 0.484107", \ + "0.218547, 0.226377, 0.233367, 0.249997, 0.297147, 0.374967, 0.528147", \ + "0.298017, 0.306327, 0.313187, 0.329097, 0.375707, 0.454397, 0.614167" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151800, 0.158730, 0.164390, 0.176660, 0.208210, 0.257430, 0.355790", \ + "0.155160, 0.162690, 0.167350, 0.179300, 0.213000, 0.265380, 0.368240", \ + "0.157950, 0.164920, 0.170700, 0.182210, 0.215150, 0.267490, 0.364080", \ + "0.166590, 0.173280, 0.178770, 0.190700, 0.221650, 0.272040, 0.377000", \ + "0.177010, 0.183470, 0.189210, 0.201270, 0.232530, 0.282500, 0.381080", \ + "0.229120, 0.235260, 0.240890, 0.252720, 0.283930, 0.335080, 0.434970", \ + "0.297930, 0.304370, 0.306140, 0.318380, 0.349640, 0.398440, 0.497540" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136620, 0.143550, 0.149210, 0.161480, 0.193030, 0.242250, 0.340610", \ + "0.139980, 0.147510, 0.152170, 0.164120, 0.197820, 0.250200, 0.353060", \ + "0.142770, 0.149740, 0.155520, 0.167030, 0.199970, 0.252310, 0.348900", \ + "0.151410, 0.158100, 0.163590, 0.175520, 0.206470, 0.256860, 0.361820", \ + "0.161830, 0.168290, 0.174030, 0.186090, 0.217350, 0.267320, 0.365900", \ + "0.213940, 0.220080, 0.225710, 0.237540, 0.268750, 0.319900, 0.419790", \ + "0.282750, 0.289190, 0.290960, 0.303200, 0.334460, 0.383260, 0.482360" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.149120, 0.157120, 0.164030, 0.181310, 0.229370, 0.306620, 0.458950", \ + "0.151760, 0.159980, 0.166950, 0.182720, 0.232140, 0.308880, 0.461580", \ + "0.157410, 0.164090, 0.171150, 0.187830, 0.234530, 0.311150, 0.462410", \ + "0.166410, 0.174930, 0.180480, 0.197110, 0.244020, 0.322450, 0.478510", \ + "0.179770, 0.187970, 0.195160, 0.210770, 0.257630, 0.336890, 0.493780", \ + "0.231950, 0.239930, 0.247120, 0.263610, 0.310510, 0.388730, 0.541610", \ + "0.314030, 0.322440, 0.330410, 0.347280, 0.392640, 0.466650, 0.622620" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134208, 0.142208, 0.149118, 0.166398, 0.214458, 0.291708, 0.444038", \ + "0.136848, 0.145068, 0.152038, 0.167808, 0.217228, 0.293968, 0.446668", \ + "0.142498, 0.149178, 0.156238, 0.172918, 0.219618, 0.296238, 0.447498", \ + "0.151498, 0.160018, 0.165568, 0.182198, 0.229108, 0.307538, 0.463598", \ + "0.164858, 0.173058, 0.180248, 0.195858, 0.242718, 0.321978, 0.478868", \ + "0.217038, 0.225018, 0.232208, 0.248698, 0.295598, 0.373818, 0.526698", \ + "0.299118, 0.307528, 0.315498, 0.332368, 0.377728, 0.451738, 0.607708" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENA&CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218770, 0.224930, 0.230230, 0.241920, 0.272450, 0.321350, 0.418340", \ + "0.220800, 0.226960, 0.232260, 0.243950, 0.274480, 0.323380, 0.420370", \ + "0.225770, 0.231930, 0.237230, 0.248920, 0.279450, 0.328350, 0.425340", \ + "0.234900, 0.241060, 0.246360, 0.258050, 0.288580, 0.337480, 0.434470", \ + "0.248180, 0.254340, 0.259640, 0.271330, 0.301860, 0.350760, 0.447750", \ + "0.298880, 0.305040, 0.310340, 0.322030, 0.352560, 0.401460, 0.498450", \ + "0.359480, 0.365640, 0.370940, 0.382630, 0.413160, 0.462060, 0.559050" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.196893, 0.203053, 0.208353, 0.220043, 0.250573, 0.299473, 0.396463", \ + "0.198923, 0.205083, 0.210383, 0.222073, 0.252603, 0.301503, 0.398493", \ + "0.203893, 0.210053, 0.215353, 0.227043, 0.257573, 0.306473, 0.403463", \ + "0.213023, 0.219183, 0.224483, 0.236173, 0.266703, 0.315603, 0.412593", \ + "0.226303, 0.232463, 0.237763, 0.249453, 0.279983, 0.328883, 0.425873", \ + "0.277003, 0.283163, 0.288463, 0.300153, 0.330683, 0.379583, 0.476573", \ + "0.337603, 0.343763, 0.349063, 0.360753, 0.391283, 0.440183, 0.537173" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.239620, 0.247230, 0.253990, 0.269620, 0.315130, 0.390730, 0.541710", \ + "0.242070, 0.249680, 0.256440, 0.272070, 0.317580, 0.393180, 0.544160", \ + "0.246480, 0.254090, 0.260850, 0.276480, 0.321990, 0.397590, 0.548570", \ + "0.257730, 0.265340, 0.272100, 0.287730, 0.333240, 0.408840, 0.559820", \ + "0.272600, 0.280210, 0.286970, 0.302600, 0.348110, 0.423710, 0.574690", \ + "0.333340, 0.340950, 0.347710, 0.363340, 0.408850, 0.484450, 0.635430", \ + "0.428960, 0.436570, 0.443330, 0.458960, 0.504470, 0.580070, 0.731050" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.215658, 0.223268, 0.230028, 0.245658, 0.291168, 0.366768, 0.517748", \ + "0.218108, 0.225718, 0.232478, 0.248108, 0.293618, 0.369218, 0.520198", \ + "0.222518, 0.230128, 0.236888, 0.252518, 0.298028, 0.373628, 0.524608", \ + "0.233768, 0.241378, 0.248138, 0.263768, 0.309278, 0.384878, 0.535858", \ + "0.248638, 0.256248, 0.263008, 0.278638, 0.324148, 0.399748, 0.550728", \ + "0.309378, 0.316988, 0.323748, 0.339378, 0.384888, 0.460488, 0.611468", \ + "0.404998, 0.412608, 0.419368, 0.434998, 0.480508, 0.556108, 0.707088" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENA&!CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.295490, 0.302800, 0.309430, 0.325110, 0.370780, 0.446450, 0.597400", \ + "0.298320, 0.305630, 0.312260, 0.327940, 0.373610, 0.449280, 0.600230", \ + "0.302990, 0.310300, 0.316930, 0.332610, 0.378280, 0.453950, 0.604900", \ + "0.312420, 0.319730, 0.326360, 0.342040, 0.387710, 0.463380, 0.614330", \ + "0.324440, 0.331750, 0.338380, 0.354060, 0.399730, 0.475400, 0.626350", \ + "0.373120, 0.380430, 0.387060, 0.402740, 0.448410, 0.524080, 0.675030", \ + "0.440590, 0.447900, 0.454530, 0.470210, 0.515880, 0.591550, 0.742500" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.265941, 0.273251, 0.279881, 0.295561, 0.341231, 0.416901, 0.567851", \ + "0.268771, 0.276081, 0.282711, 0.298391, 0.344061, 0.419731, 0.570681", \ + "0.273441, 0.280751, 0.287381, 0.303061, 0.348731, 0.424401, 0.575351", \ + "0.282871, 0.290181, 0.296811, 0.312491, 0.358161, 0.433831, 0.584781", \ + "0.294891, 0.302201, 0.308831, 0.324511, 0.370181, 0.445851, 0.596801", \ + "0.343571, 0.350881, 0.357511, 0.373191, 0.418861, 0.494531, 0.645481", \ + "0.411041, 0.418351, 0.424981, 0.440661, 0.486331, 0.562001, 0.712951" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.294040, 0.300260, 0.305460, 0.316950, 0.347480, 0.396480, 0.493800", \ + "0.297090, 0.303310, 0.308510, 0.320000, 0.350530, 0.399530, 0.496850", \ + "0.300600, 0.306820, 0.312020, 0.323510, 0.354040, 0.403040, 0.500360", \ + "0.313020, 0.319240, 0.324440, 0.335930, 0.366460, 0.415460, 0.512780", \ + "0.326160, 0.332380, 0.337580, 0.349070, 0.379600, 0.428600, 0.525920", \ + "0.388160, 0.394380, 0.399580, 0.411070, 0.441600, 0.490600, 0.587920", \ + "0.484160, 0.490380, 0.495580, 0.507070, 0.537600, 0.586600, 0.683920" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.264636, 0.270856, 0.276056, 0.287546, 0.318076, 0.367076, 0.464396", \ + "0.267686, 0.273906, 0.279106, 0.290596, 0.321126, 0.370126, 0.467446", \ + "0.271196, 0.277416, 0.282616, 0.294106, 0.324636, 0.373636, 0.470956", \ + "0.283616, 0.289836, 0.295036, 0.306526, 0.337056, 0.386056, 0.483376", \ + "0.296756, 0.302976, 0.308176, 0.319666, 0.350196, 0.399196, 0.496516", \ + "0.358756, 0.364976, 0.370176, 0.381666, 0.412196, 0.461196, 0.558516", \ + "0.454756, 0.460976, 0.466176, 0.477666, 0.508196, 0.557196, 0.654516" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.247190, 0.253650, 0.259190, 0.270620, 0.300710, 0.349770, 0.446530", \ + "0.249210, 0.255670, 0.261210, 0.272640, 0.302730, 0.351790, 0.448550", \ + "0.253820, 0.260280, 0.265820, 0.277250, 0.307340, 0.356400, 0.453160", \ + "0.263930, 0.270390, 0.275930, 0.287360, 0.317450, 0.366510, 0.463270", \ + "0.276950, 0.283410, 0.288950, 0.300380, 0.330470, 0.379530, 0.476290", \ + "0.327620, 0.334080, 0.339620, 0.351050, 0.381140, 0.430200, 0.526960", \ + "0.401380, 0.407840, 0.413380, 0.424810, 0.454900, 0.503960, 0.600720" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.222471, 0.228931, 0.234471, 0.245901, 0.275991, 0.325051, 0.421811", \ + "0.224491, 0.230951, 0.236491, 0.247921, 0.278011, 0.327071, 0.423831", \ + "0.229101, 0.235561, 0.241101, 0.252531, 0.282621, 0.331681, 0.428441", \ + "0.239211, 0.245671, 0.251211, 0.262641, 0.292731, 0.341791, 0.438551", \ + "0.252231, 0.258691, 0.264231, 0.275661, 0.305751, 0.354811, 0.451571", \ + "0.302901, 0.309361, 0.314901, 0.326331, 0.356421, 0.405481, 0.502241", \ + "0.376661, 0.383121, 0.388661, 0.400091, 0.430181, 0.479241, 0.576001" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.321770, 0.330380, 0.336470, 0.351630, 0.397250, 0.473060, 0.623870", \ + "0.324330, 0.332940, 0.339030, 0.354190, 0.399810, 0.475620, 0.626430", \ + "0.328920, 0.337530, 0.343620, 0.358780, 0.404400, 0.480210, 0.631020", \ + "0.339960, 0.348570, 0.354660, 0.369820, 0.415440, 0.491250, 0.642060", \ + "0.355430, 0.364040, 0.370130, 0.385290, 0.430910, 0.506720, 0.657530", \ + "0.412220, 0.420830, 0.426920, 0.442080, 0.487700, 0.563510, 0.714320", \ + "0.494290, 0.502900, 0.508990, 0.524150, 0.569770, 0.645580, 0.796390" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.289593, 0.298203, 0.304293, 0.319453, 0.365073, 0.440883, 0.591693", \ + "0.292153, 0.300763, 0.306853, 0.322013, 0.367633, 0.443443, 0.594253", \ + "0.296743, 0.305353, 0.311443, 0.326603, 0.372223, 0.448033, 0.598843", \ + "0.307783, 0.316393, 0.322483, 0.337643, 0.383263, 0.459073, 0.609883", \ + "0.323253, 0.331863, 0.337953, 0.353113, 0.398733, 0.474543, 0.625353", \ + "0.380043, 0.388653, 0.394743, 0.409903, 0.455523, 0.531333, 0.682143", \ + "0.462113, 0.470723, 0.476813, 0.491973, 0.537593, 0.613403, 0.764213" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + } + internal_power() { + related_pin : CENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TCENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENA&CENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENA&!CENA"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003618, 0.003621, 0.003625, 0.003629, 0.003632, 0.003636, 0.003640", \ + "0.003621, 0.003625, 0.003629, 0.003632, 0.003636, 0.003640, 0.003643", \ + "0.004305, 0.004309, 0.004314, 0.004318, 0.004322, 0.004327, 0.004331", \ + "0.004368, 0.004372, 0.004377, 0.004381, 0.004386, 0.004390, 0.004394", \ + "0.004416, 0.004420, 0.004424, 0.004429, 0.004433, 0.004438, 0.004442", \ + "0.004460, 0.004465, 0.004469, 0.004474, 0.004478, 0.004483, 0.004487", \ + "0.005876, 0.005882, 0.005888, 0.005894, 0.005900, 0.005906, 0.005911" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005342, 0.005348, 0.005353, 0.005358, 0.005364, 0.005369, 0.005374", \ + "0.005348, 0.005353, 0.005358, 0.005364, 0.005369, 0.005374, 0.005380", \ + "0.005353, 0.005358, 0.005364, 0.005369, 0.005374, 0.005380, 0.005385", \ + "0.005358, 0.005364, 0.005369, 0.005374, 0.005380, 0.005385, 0.005391", \ + "0.005409, 0.005414, 0.005420, 0.005425, 0.005431, 0.005436, 0.005442", \ + "0.005414, 0.005420, 0.005425, 0.005431, 0.005436, 0.005442, 0.005447", \ + "0.005420, 0.005425, 0.005431, 0.005436, 0.005442, 0.005447, 0.005452" \ + ); + } + } + } + bus(AYA) { + bus_type : rf2_32x128_wm1_AYA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : AA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.160700, 0.167050, 0.172150, 0.183210, 0.211750, 0.257420, 0.353950", \ + "0.162490, 0.169280, 0.174810, 0.186180, 0.214720, 0.260850, 0.358910", \ + "0.169370, 0.175150, 0.180310, 0.192750, 0.223570, 0.270260, 0.360390", \ + "0.178250, 0.184620, 0.190570, 0.200160, 0.231950, 0.280190, 0.371600", \ + "0.191520, 0.197120, 0.200350, 0.211020, 0.242270, 0.287140, 0.382980", \ + "0.239200, 0.245330, 0.247180, 0.257810, 0.290420, 0.333350, 0.425710", \ + "0.315550, 0.322170, 0.325330, 0.335870, 0.367790, 0.413340, 0.512100" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.144630, 0.150980, 0.156080, 0.167140, 0.195680, 0.241350, 0.337880", \ + "0.146420, 0.153210, 0.158740, 0.170110, 0.198650, 0.244780, 0.342840", \ + "0.153300, 0.159080, 0.164240, 0.176680, 0.207500, 0.254190, 0.344320", \ + "0.162180, 0.168550, 0.174500, 0.184090, 0.215880, 0.264120, 0.355530", \ + "0.175450, 0.181050, 0.184280, 0.194950, 0.226200, 0.271070, 0.366910", \ + "0.223130, 0.229260, 0.231110, 0.241740, 0.274350, 0.317280, 0.409640", \ + "0.299480, 0.306100, 0.309260, 0.319800, 0.351720, 0.397270, 0.496030" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134590, 0.142130, 0.148090, 0.161440, 0.199150, 0.264930, 0.399900", \ + "0.136780, 0.144470, 0.150770, 0.163640, 0.200980, 0.267320, 0.393440", \ + "0.140730, 0.147770, 0.154090, 0.167660, 0.205610, 0.272580, 0.409480", \ + "0.151100, 0.158540, 0.164550, 0.178180, 0.216850, 0.283250, 0.408670", \ + "0.161810, 0.169150, 0.175230, 0.188940, 0.227620, 0.294060, 0.419420", \ + "0.211280, 0.218380, 0.224380, 0.238390, 0.275780, 0.342320, 0.468550", \ + "0.299630, 0.306700, 0.312660, 0.321710, 0.360400, 0.427440, 0.563980" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.121131, 0.128671, 0.134631, 0.147981, 0.185691, 0.251471, 0.386441", \ + "0.123321, 0.131011, 0.137311, 0.150181, 0.187521, 0.253861, 0.379981", \ + "0.127271, 0.134311, 0.140631, 0.154201, 0.192151, 0.259121, 0.396021", \ + "0.137641, 0.145081, 0.151091, 0.164721, 0.203391, 0.269791, 0.395211", \ + "0.148351, 0.155691, 0.161771, 0.175481, 0.214161, 0.280601, 0.405961", \ + "0.197821, 0.204921, 0.210921, 0.224931, 0.262321, 0.328861, 0.455091", \ + "0.286171, 0.293241, 0.299201, 0.308251, 0.346941, 0.413981, 0.550521" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + } + timing() { + related_pin : TAA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.171490, 0.177210, 0.181340, 0.193210, 0.223010, 0.271470, 0.361650", \ + "0.172730, 0.178800, 0.183910, 0.196710, 0.226750, 0.274660, 0.364700", \ + "0.177510, 0.183860, 0.188300, 0.202190, 0.230660, 0.276330, 0.373300", \ + "0.186140, 0.192150, 0.199150, 0.208850, 0.237890, 0.285480, 0.383040", \ + "0.196810, 0.202570, 0.208200, 0.218410, 0.248110, 0.301220, 0.389960", \ + "0.243520, 0.249720, 0.254860, 0.265990, 0.294950, 0.341710, 0.439800", \ + "0.322610, 0.328470, 0.333040, 0.344190, 0.372580, 0.418670, 0.517050" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.154341, 0.160061, 0.164191, 0.176061, 0.205861, 0.254321, 0.344501", \ + "0.155581, 0.161651, 0.166761, 0.179561, 0.209601, 0.257511, 0.347551", \ + "0.160361, 0.166711, 0.171151, 0.185041, 0.213511, 0.259181, 0.356151", \ + "0.168991, 0.175001, 0.182001, 0.191701, 0.220741, 0.268331, 0.365891", \ + "0.179661, 0.185421, 0.191051, 0.201261, 0.230961, 0.284071, 0.372811", \ + "0.226371, 0.232571, 0.237711, 0.248841, 0.277801, 0.324561, 0.422651", \ + "0.305461, 0.311321, 0.315891, 0.327041, 0.355431, 0.401521, 0.499901" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138520, 0.145600, 0.151370, 0.165080, 0.202480, 0.270470, 0.403470", \ + "0.139470, 0.146600, 0.152640, 0.166340, 0.204810, 0.271560, 0.404520", \ + "0.145040, 0.152280, 0.158350, 0.171570, 0.210000, 0.278480, 0.410090", \ + "0.155490, 0.162720, 0.168520, 0.182630, 0.219710, 0.286400, 0.418770", \ + "0.165490, 0.172680, 0.178800, 0.192050, 0.230700, 0.297550, 0.429440", \ + "0.214520, 0.221730, 0.227360, 0.240960, 0.279420, 0.344000, 0.479790", \ + "0.303840, 0.310850, 0.312470, 0.326080, 0.364460, 0.432010, 0.558550" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124668, 0.131748, 0.137518, 0.151228, 0.188628, 0.256618, 0.389618", \ + "0.125618, 0.132748, 0.138788, 0.152488, 0.190958, 0.257708, 0.390668", \ + "0.131188, 0.138428, 0.144498, 0.157718, 0.196148, 0.264628, 0.396238", \ + "0.141638, 0.148868, 0.154668, 0.168778, 0.205858, 0.272548, 0.404918", \ + "0.151638, 0.158828, 0.164948, 0.178198, 0.216848, 0.283698, 0.415588", \ + "0.200668, 0.207878, 0.213508, 0.227108, 0.265568, 0.330148, 0.465938", \ + "0.289988, 0.296998, 0.298618, 0.312228, 0.350608, 0.418158, 0.544698" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.231730, 0.237920, 0.243340, 0.254060, 0.282270, 0.328540, 0.420250", \ + "0.233800, 0.239990, 0.245410, 0.256130, 0.284340, 0.330610, 0.422320", \ + "0.238250, 0.244440, 0.249860, 0.260580, 0.288790, 0.335060, 0.426770", \ + "0.248340, 0.254530, 0.259950, 0.270670, 0.298880, 0.345150, 0.436860", \ + "0.261480, 0.267670, 0.273090, 0.283810, 0.312020, 0.358290, 0.450000", \ + "0.312200, 0.318390, 0.323810, 0.334530, 0.362740, 0.409010, 0.500720", \ + "0.385900, 0.392090, 0.397510, 0.408230, 0.436440, 0.482710, 0.574420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.207297, 0.213417, 0.218857, 0.229487, 0.257607, 0.303687, 0.395067", \ + "0.209277, 0.215397, 0.220837, 0.231467, 0.259587, 0.305667, 0.397047", \ + "0.213857, 0.219977, 0.225417, 0.236047, 0.264167, 0.310247, 0.401627", \ + "0.223987, 0.230107, 0.235547, 0.246177, 0.274297, 0.320377, 0.411757", \ + "0.237037, 0.243157, 0.248597, 0.259227, 0.287347, 0.333427, 0.424807", \ + "0.287747, 0.293867, 0.299307, 0.309937, 0.338057, 0.384137, 0.475517", \ + "0.361517, 0.367637, 0.373077, 0.383707, 0.411827, 0.457907, 0.549287" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.313150, 0.321270, 0.326470, 0.340220, 0.379570, 0.445640, 0.577190", \ + "0.315430, 0.323550, 0.328750, 0.342500, 0.381850, 0.447920, 0.579470", \ + "0.320200, 0.328320, 0.333520, 0.347270, 0.386620, 0.452690, 0.584240", \ + "0.331320, 0.339440, 0.344640, 0.358390, 0.397740, 0.463810, 0.595360", \ + "0.346490, 0.354610, 0.359810, 0.373560, 0.412910, 0.478980, 0.610530", \ + "0.403230, 0.411350, 0.416550, 0.430300, 0.469650, 0.535720, 0.667270", \ + "0.485860, 0.493980, 0.499180, 0.512930, 0.552280, 0.618350, 0.749900" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.279801, 0.287591, 0.292781, 0.306011, 0.344191, 0.408131, 0.535341", \ + "0.282161, 0.289951, 0.295141, 0.308371, 0.346551, 0.410491, 0.537701", \ + "0.286911, 0.294701, 0.299891, 0.313121, 0.351301, 0.415241, 0.542451", \ + "0.297841, 0.305631, 0.310821, 0.324051, 0.362231, 0.426171, 0.553381", \ + "0.313181, 0.320971, 0.326161, 0.339391, 0.377571, 0.441511, 0.568721", \ + "0.369901, 0.377691, 0.382881, 0.396111, 0.434291, 0.498231, 0.625441", \ + "0.452571, 0.460361, 0.465551, 0.478781, 0.516961, 0.580901, 0.708111" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + } + internal_power() { + related_pin : AA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TAA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003618, 0.003621, 0.003625, 0.003629, 0.003632, 0.003636, 0.003640", \ + "0.003621, 0.003625, 0.003629, 0.003632, 0.003636, 0.003640, 0.003643", \ + "0.004305, 0.004309, 0.004314, 0.004318, 0.004322, 0.004327, 0.004331", \ + "0.004368, 0.004372, 0.004377, 0.004381, 0.004386, 0.004390, 0.004394", \ + "0.004416, 0.004420, 0.004424, 0.004429, 0.004433, 0.004438, 0.004442", \ + "0.004460, 0.004465, 0.004469, 0.004474, 0.004478, 0.004483, 0.004487", \ + "0.005876, 0.005882, 0.005888, 0.005894, 0.005900, 0.005906, 0.005911" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005342, 0.005348, 0.005353, 0.005358, 0.005364, 0.005369, 0.005374", \ + "0.005348, 0.005353, 0.005358, 0.005364, 0.005369, 0.005374, 0.005380", \ + "0.005353, 0.005358, 0.005364, 0.005369, 0.005374, 0.005380, 0.005385", \ + "0.005358, 0.005364, 0.005369, 0.005374, 0.005380, 0.005385, 0.005391", \ + "0.005409, 0.005414, 0.005420, 0.005425, 0.005431, 0.005436, 0.005442", \ + "0.005414, 0.005420, 0.005425, 0.005431, 0.005436, 0.005442, 0.005447", \ + "0.005420, 0.005425, 0.005431, 0.005436, 0.005442, 0.005447, 0.005452" \ + ); + } + } + pin(AYA[4]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339640, 0.345510, 0.350440, 0.361340, 0.389850, 0.435890, 0.527330", \ + "0.341570, 0.347440, 0.352370, 0.363270, 0.391780, 0.437820, 0.529260", \ + "0.346580, 0.352450, 0.357380, 0.368280, 0.396790, 0.442830, 0.534270", \ + "0.355950, 0.361820, 0.366750, 0.377650, 0.406160, 0.452200, 0.543640", \ + "0.368710, 0.374580, 0.379510, 0.390410, 0.418920, 0.464960, 0.556400", \ + "0.419440, 0.425310, 0.430240, 0.441140, 0.469650, 0.515690, 0.607130", \ + "0.480980, 0.486850, 0.491780, 0.502680, 0.531190, 0.577230, 0.668670" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302274, 0.308264, 0.313214, 0.323994, 0.352764, 0.398994, 0.490854", \ + "0.304324, 0.310314, 0.315264, 0.326044, 0.354814, 0.401044, 0.492904", \ + "0.309114, 0.315104, 0.320054, 0.330834, 0.359604, 0.405834, 0.497694", \ + "0.318554, 0.324544, 0.329494, 0.340274, 0.369044, 0.415274, 0.507134", \ + "0.331344, 0.337334, 0.342284, 0.353064, 0.381834, 0.428064, 0.519924", \ + "0.382124, 0.388114, 0.393064, 0.403844, 0.432614, 0.478844, 0.570704", \ + "0.443494, 0.449484, 0.454434, 0.465214, 0.493984, 0.540214, 0.632074" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311890, 0.318920, 0.325040, 0.338720, 0.378270, 0.444030, 0.575450", \ + "0.314100, 0.321130, 0.327250, 0.340930, 0.380480, 0.446240, 0.577660", \ + "0.318680, 0.325710, 0.331830, 0.345510, 0.385060, 0.450820, 0.582240", \ + "0.330090, 0.337120, 0.343240, 0.356920, 0.396470, 0.462230, 0.593650", \ + "0.345240, 0.352270, 0.358390, 0.372070, 0.411620, 0.477380, 0.608800", \ + "0.405060, 0.412090, 0.418210, 0.431890, 0.471440, 0.537200, 0.668620", \ + "0.500990, 0.508020, 0.514140, 0.527820, 0.567370, 0.633130, 0.764550" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275922, 0.282742, 0.288682, 0.301862, 0.340152, 0.403832, 0.531162", \ + "0.277852, 0.284672, 0.290612, 0.303792, 0.342082, 0.405762, 0.533092", \ + "0.282692, 0.289512, 0.295452, 0.308632, 0.346922, 0.410602, 0.537932", \ + "0.294012, 0.300832, 0.306772, 0.319952, 0.358242, 0.421922, 0.549252", \ + "0.308912, 0.315732, 0.321672, 0.334852, 0.373142, 0.436822, 0.564152", \ + "0.369202, 0.376022, 0.381962, 0.395142, 0.433432, 0.497112, 0.624442", \ + "0.464622, 0.471442, 0.477382, 0.490562, 0.528852, 0.592532, 0.719862" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.286060, 0.293210, 0.299200, 0.312880, 0.352410, 0.418010, 0.549350", \ + "0.288960, 0.296110, 0.302100, 0.315780, 0.355310, 0.420910, 0.552250", \ + "0.293780, 0.300930, 0.306920, 0.320600, 0.360130, 0.425730, 0.557070", \ + "0.302900, 0.310050, 0.316040, 0.329720, 0.369250, 0.434850, 0.566190", \ + "0.315090, 0.322240, 0.328230, 0.341910, 0.381440, 0.447040, 0.578380", \ + "0.363580, 0.370730, 0.376720, 0.390400, 0.429930, 0.495530, 0.626870", \ + "0.431130, 0.438280, 0.444270, 0.457950, 0.497480, 0.563080, 0.694420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.252306, 0.259366, 0.265196, 0.278426, 0.316666, 0.380166, 0.507346", \ + "0.255096, 0.262156, 0.267986, 0.281216, 0.319456, 0.382956, 0.510136", \ + "0.259936, 0.266996, 0.272826, 0.286056, 0.324296, 0.387796, 0.514976", \ + "0.269166, 0.276226, 0.282056, 0.295286, 0.333526, 0.397026, 0.524206", \ + "0.281196, 0.288256, 0.294086, 0.307316, 0.345556, 0.409056, 0.536236", \ + "0.329796, 0.336856, 0.342686, 0.355916, 0.394156, 0.457656, 0.584836", \ + "0.397446, 0.404506, 0.410336, 0.423566, 0.461806, 0.525306, 0.652486" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.321350, 0.327360, 0.332320, 0.343010, 0.371630, 0.417710, 0.509490", \ + "0.323980, 0.329990, 0.334950, 0.345640, 0.374260, 0.420340, 0.512120", \ + "0.327590, 0.333600, 0.338560, 0.349250, 0.377870, 0.423950, 0.515730", \ + "0.339980, 0.345990, 0.350950, 0.361640, 0.390260, 0.436340, 0.528120", \ + "0.353450, 0.359460, 0.364420, 0.375110, 0.403730, 0.449810, 0.541590", \ + "0.415340, 0.421350, 0.426310, 0.437000, 0.465620, 0.511700, 0.603480", \ + "0.511470, 0.517480, 0.522440, 0.533130, 0.561750, 0.607830, 0.699610" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285327, 0.291397, 0.296397, 0.307117, 0.335847, 0.382187, 0.474257", \ + "0.288207, 0.294277, 0.299277, 0.309997, 0.338727, 0.385067, 0.477137", \ + "0.291737, 0.297807, 0.302807, 0.313527, 0.342257, 0.388597, 0.480667", \ + "0.303967, 0.310037, 0.315037, 0.325757, 0.354487, 0.400827, 0.492897", \ + "0.317347, 0.323417, 0.328417, 0.339137, 0.367867, 0.414207, 0.506277", \ + "0.379357, 0.385427, 0.390427, 0.401147, 0.429877, 0.476217, 0.568287", \ + "0.475677, 0.481747, 0.486747, 0.497467, 0.526197, 0.572537, 0.664607" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + pin(AYA[3]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339640, 0.345510, 0.350440, 0.361340, 0.389850, 0.435890, 0.527330", \ + "0.341570, 0.347440, 0.352370, 0.363270, 0.391780, 0.437820, 0.529260", \ + "0.346580, 0.352450, 0.357380, 0.368280, 0.396790, 0.442830, 0.534270", \ + "0.355950, 0.361820, 0.366750, 0.377650, 0.406160, 0.452200, 0.543640", \ + "0.368710, 0.374580, 0.379510, 0.390410, 0.418920, 0.464960, 0.556400", \ + "0.419440, 0.425310, 0.430240, 0.441140, 0.469650, 0.515690, 0.607130", \ + "0.480980, 0.486850, 0.491780, 0.502680, 0.531190, 0.577230, 0.668670" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302274, 0.308264, 0.313214, 0.323994, 0.352764, 0.398994, 0.490854", \ + "0.304324, 0.310314, 0.315264, 0.326044, 0.354814, 0.401044, 0.492904", \ + "0.309114, 0.315104, 0.320054, 0.330834, 0.359604, 0.405834, 0.497694", \ + "0.318554, 0.324544, 0.329494, 0.340274, 0.369044, 0.415274, 0.507134", \ + "0.331344, 0.337334, 0.342284, 0.353064, 0.381834, 0.428064, 0.519924", \ + "0.382124, 0.388114, 0.393064, 0.403844, 0.432614, 0.478844, 0.570704", \ + "0.443494, 0.449484, 0.454434, 0.465214, 0.493984, 0.540214, 0.632074" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311890, 0.318920, 0.325040, 0.338720, 0.378270, 0.444030, 0.575450", \ + "0.314100, 0.321130, 0.327250, 0.340930, 0.380480, 0.446240, 0.577660", \ + "0.318680, 0.325710, 0.331830, 0.345510, 0.385060, 0.450820, 0.582240", \ + "0.330090, 0.337120, 0.343240, 0.356920, 0.396470, 0.462230, 0.593650", \ + "0.345240, 0.352270, 0.358390, 0.372070, 0.411620, 0.477380, 0.608800", \ + "0.405060, 0.412090, 0.418210, 0.431890, 0.471440, 0.537200, 0.668620", \ + "0.500990, 0.508020, 0.514140, 0.527820, 0.567370, 0.633130, 0.764550" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275922, 0.282742, 0.288682, 0.301862, 0.340152, 0.403832, 0.531162", \ + "0.277852, 0.284672, 0.290612, 0.303792, 0.342082, 0.405762, 0.533092", \ + "0.282692, 0.289512, 0.295452, 0.308632, 0.346922, 0.410602, 0.537932", \ + "0.294012, 0.300832, 0.306772, 0.319952, 0.358242, 0.421922, 0.549252", \ + "0.308912, 0.315732, 0.321672, 0.334852, 0.373142, 0.436822, 0.564152", \ + "0.369202, 0.376022, 0.381962, 0.395142, 0.433432, 0.497112, 0.624442", \ + "0.464622, 0.471442, 0.477382, 0.490562, 0.528852, 0.592532, 0.719862" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.286060, 0.293210, 0.299200, 0.312880, 0.352410, 0.418010, 0.549350", \ + "0.288960, 0.296110, 0.302100, 0.315780, 0.355310, 0.420910, 0.552250", \ + "0.293780, 0.300930, 0.306920, 0.320600, 0.360130, 0.425730, 0.557070", \ + "0.302900, 0.310050, 0.316040, 0.329720, 0.369250, 0.434850, 0.566190", \ + "0.315090, 0.322240, 0.328230, 0.341910, 0.381440, 0.447040, 0.578380", \ + "0.363580, 0.370730, 0.376720, 0.390400, 0.429930, 0.495530, 0.626870", \ + "0.431130, 0.438280, 0.444270, 0.457950, 0.497480, 0.563080, 0.694420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.252306, 0.259366, 0.265196, 0.278426, 0.316666, 0.380166, 0.507346", \ + "0.255096, 0.262156, 0.267986, 0.281216, 0.319456, 0.382956, 0.510136", \ + "0.259936, 0.266996, 0.272826, 0.286056, 0.324296, 0.387796, 0.514976", \ + "0.269166, 0.276226, 0.282056, 0.295286, 0.333526, 0.397026, 0.524206", \ + "0.281196, 0.288256, 0.294086, 0.307316, 0.345556, 0.409056, 0.536236", \ + "0.329796, 0.336856, 0.342686, 0.355916, 0.394156, 0.457656, 0.584836", \ + "0.397446, 0.404506, 0.410336, 0.423566, 0.461806, 0.525306, 0.652486" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.321350, 0.327360, 0.332320, 0.343010, 0.371630, 0.417710, 0.509490", \ + "0.323980, 0.329990, 0.334950, 0.345640, 0.374260, 0.420340, 0.512120", \ + "0.327590, 0.333600, 0.338560, 0.349250, 0.377870, 0.423950, 0.515730", \ + "0.339980, 0.345990, 0.350950, 0.361640, 0.390260, 0.436340, 0.528120", \ + "0.353450, 0.359460, 0.364420, 0.375110, 0.403730, 0.449810, 0.541590", \ + "0.415340, 0.421350, 0.426310, 0.437000, 0.465620, 0.511700, 0.603480", \ + "0.511470, 0.517480, 0.522440, 0.533130, 0.561750, 0.607830, 0.699610" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285327, 0.291397, 0.296397, 0.307117, 0.335847, 0.382187, 0.474257", \ + "0.288207, 0.294277, 0.299277, 0.309997, 0.338727, 0.385067, 0.477137", \ + "0.291737, 0.297807, 0.302807, 0.313527, 0.342257, 0.388597, 0.480667", \ + "0.303967, 0.310037, 0.315037, 0.325757, 0.354487, 0.400827, 0.492897", \ + "0.317347, 0.323417, 0.328417, 0.339137, 0.367867, 0.414207, 0.506277", \ + "0.379357, 0.385427, 0.390427, 0.401147, 0.429877, 0.476217, 0.568287", \ + "0.475677, 0.481747, 0.486747, 0.497467, 0.526197, 0.572537, 0.664607" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + pin(AYA[2]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339640, 0.345510, 0.350440, 0.361340, 0.389850, 0.435890, 0.527330", \ + "0.341570, 0.347440, 0.352370, 0.363270, 0.391780, 0.437820, 0.529260", \ + "0.346580, 0.352450, 0.357380, 0.368280, 0.396790, 0.442830, 0.534270", \ + "0.355950, 0.361820, 0.366750, 0.377650, 0.406160, 0.452200, 0.543640", \ + "0.368710, 0.374580, 0.379510, 0.390410, 0.418920, 0.464960, 0.556400", \ + "0.419440, 0.425310, 0.430240, 0.441140, 0.469650, 0.515690, 0.607130", \ + "0.480980, 0.486850, 0.491780, 0.502680, 0.531190, 0.577230, 0.668670" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302274, 0.308264, 0.313214, 0.323994, 0.352764, 0.398994, 0.490854", \ + "0.304324, 0.310314, 0.315264, 0.326044, 0.354814, 0.401044, 0.492904", \ + "0.309114, 0.315104, 0.320054, 0.330834, 0.359604, 0.405834, 0.497694", \ + "0.318554, 0.324544, 0.329494, 0.340274, 0.369044, 0.415274, 0.507134", \ + "0.331344, 0.337334, 0.342284, 0.353064, 0.381834, 0.428064, 0.519924", \ + "0.382124, 0.388114, 0.393064, 0.403844, 0.432614, 0.478844, 0.570704", \ + "0.443494, 0.449484, 0.454434, 0.465214, 0.493984, 0.540214, 0.632074" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311890, 0.318920, 0.325040, 0.338720, 0.378270, 0.444030, 0.575450", \ + "0.314100, 0.321130, 0.327250, 0.340930, 0.380480, 0.446240, 0.577660", \ + "0.318680, 0.325710, 0.331830, 0.345510, 0.385060, 0.450820, 0.582240", \ + "0.330090, 0.337120, 0.343240, 0.356920, 0.396470, 0.462230, 0.593650", \ + "0.345240, 0.352270, 0.358390, 0.372070, 0.411620, 0.477380, 0.608800", \ + "0.405060, 0.412090, 0.418210, 0.431890, 0.471440, 0.537200, 0.668620", \ + "0.500990, 0.508020, 0.514140, 0.527820, 0.567370, 0.633130, 0.764550" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275922, 0.282742, 0.288682, 0.301862, 0.340152, 0.403832, 0.531162", \ + "0.277852, 0.284672, 0.290612, 0.303792, 0.342082, 0.405762, 0.533092", \ + "0.282692, 0.289512, 0.295452, 0.308632, 0.346922, 0.410602, 0.537932", \ + "0.294012, 0.300832, 0.306772, 0.319952, 0.358242, 0.421922, 0.549252", \ + "0.308912, 0.315732, 0.321672, 0.334852, 0.373142, 0.436822, 0.564152", \ + "0.369202, 0.376022, 0.381962, 0.395142, 0.433432, 0.497112, 0.624442", \ + "0.464622, 0.471442, 0.477382, 0.490562, 0.528852, 0.592532, 0.719862" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.286060, 0.293210, 0.299200, 0.312880, 0.352410, 0.418010, 0.549350", \ + "0.288960, 0.296110, 0.302100, 0.315780, 0.355310, 0.420910, 0.552250", \ + "0.293780, 0.300930, 0.306920, 0.320600, 0.360130, 0.425730, 0.557070", \ + "0.302900, 0.310050, 0.316040, 0.329720, 0.369250, 0.434850, 0.566190", \ + "0.315090, 0.322240, 0.328230, 0.341910, 0.381440, 0.447040, 0.578380", \ + "0.363580, 0.370730, 0.376720, 0.390400, 0.429930, 0.495530, 0.626870", \ + "0.431130, 0.438280, 0.444270, 0.457950, 0.497480, 0.563080, 0.694420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.252306, 0.259366, 0.265196, 0.278426, 0.316666, 0.380166, 0.507346", \ + "0.255096, 0.262156, 0.267986, 0.281216, 0.319456, 0.382956, 0.510136", \ + "0.259936, 0.266996, 0.272826, 0.286056, 0.324296, 0.387796, 0.514976", \ + "0.269166, 0.276226, 0.282056, 0.295286, 0.333526, 0.397026, 0.524206", \ + "0.281196, 0.288256, 0.294086, 0.307316, 0.345556, 0.409056, 0.536236", \ + "0.329796, 0.336856, 0.342686, 0.355916, 0.394156, 0.457656, 0.584836", \ + "0.397446, 0.404506, 0.410336, 0.423566, 0.461806, 0.525306, 0.652486" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.321350, 0.327360, 0.332320, 0.343010, 0.371630, 0.417710, 0.509490", \ + "0.323980, 0.329990, 0.334950, 0.345640, 0.374260, 0.420340, 0.512120", \ + "0.327590, 0.333600, 0.338560, 0.349250, 0.377870, 0.423950, 0.515730", \ + "0.339980, 0.345990, 0.350950, 0.361640, 0.390260, 0.436340, 0.528120", \ + "0.353450, 0.359460, 0.364420, 0.375110, 0.403730, 0.449810, 0.541590", \ + "0.415340, 0.421350, 0.426310, 0.437000, 0.465620, 0.511700, 0.603480", \ + "0.511470, 0.517480, 0.522440, 0.533130, 0.561750, 0.607830, 0.699610" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285327, 0.291397, 0.296397, 0.307117, 0.335847, 0.382187, 0.474257", \ + "0.288207, 0.294277, 0.299277, 0.309997, 0.338727, 0.385067, 0.477137", \ + "0.291737, 0.297807, 0.302807, 0.313527, 0.342257, 0.388597, 0.480667", \ + "0.303967, 0.310037, 0.315037, 0.325757, 0.354487, 0.400827, 0.492897", \ + "0.317347, 0.323417, 0.328417, 0.339137, 0.367867, 0.414207, 0.506277", \ + "0.379357, 0.385427, 0.390427, 0.401147, 0.429877, 0.476217, 0.568287", \ + "0.475677, 0.481747, 0.486747, 0.497467, 0.526197, 0.572537, 0.664607" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + pin(AYA[1]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339640, 0.345510, 0.350440, 0.361340, 0.389850, 0.435890, 0.527330", \ + "0.341570, 0.347440, 0.352370, 0.363270, 0.391780, 0.437820, 0.529260", \ + "0.346580, 0.352450, 0.357380, 0.368280, 0.396790, 0.442830, 0.534270", \ + "0.355950, 0.361820, 0.366750, 0.377650, 0.406160, 0.452200, 0.543640", \ + "0.368710, 0.374580, 0.379510, 0.390410, 0.418920, 0.464960, 0.556400", \ + "0.419440, 0.425310, 0.430240, 0.441140, 0.469650, 0.515690, 0.607130", \ + "0.480980, 0.486850, 0.491780, 0.502680, 0.531190, 0.577230, 0.668670" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302274, 0.308264, 0.313214, 0.323994, 0.352764, 0.398994, 0.490854", \ + "0.304324, 0.310314, 0.315264, 0.326044, 0.354814, 0.401044, 0.492904", \ + "0.309114, 0.315104, 0.320054, 0.330834, 0.359604, 0.405834, 0.497694", \ + "0.318554, 0.324544, 0.329494, 0.340274, 0.369044, 0.415274, 0.507134", \ + "0.331344, 0.337334, 0.342284, 0.353064, 0.381834, 0.428064, 0.519924", \ + "0.382124, 0.388114, 0.393064, 0.403844, 0.432614, 0.478844, 0.570704", \ + "0.443494, 0.449484, 0.454434, 0.465214, 0.493984, 0.540214, 0.632074" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311890, 0.318920, 0.325040, 0.338720, 0.378270, 0.444030, 0.575450", \ + "0.314100, 0.321130, 0.327250, 0.340930, 0.380480, 0.446240, 0.577660", \ + "0.318680, 0.325710, 0.331830, 0.345510, 0.385060, 0.450820, 0.582240", \ + "0.330090, 0.337120, 0.343240, 0.356920, 0.396470, 0.462230, 0.593650", \ + "0.345240, 0.352270, 0.358390, 0.372070, 0.411620, 0.477380, 0.608800", \ + "0.405060, 0.412090, 0.418210, 0.431890, 0.471440, 0.537200, 0.668620", \ + "0.500990, 0.508020, 0.514140, 0.527820, 0.567370, 0.633130, 0.764550" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275922, 0.282742, 0.288682, 0.301862, 0.340152, 0.403832, 0.531162", \ + "0.277852, 0.284672, 0.290612, 0.303792, 0.342082, 0.405762, 0.533092", \ + "0.282692, 0.289512, 0.295452, 0.308632, 0.346922, 0.410602, 0.537932", \ + "0.294012, 0.300832, 0.306772, 0.319952, 0.358242, 0.421922, 0.549252", \ + "0.308912, 0.315732, 0.321672, 0.334852, 0.373142, 0.436822, 0.564152", \ + "0.369202, 0.376022, 0.381962, 0.395142, 0.433432, 0.497112, 0.624442", \ + "0.464622, 0.471442, 0.477382, 0.490562, 0.528852, 0.592532, 0.719862" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.286060, 0.293210, 0.299200, 0.312880, 0.352410, 0.418010, 0.549350", \ + "0.288960, 0.296110, 0.302100, 0.315780, 0.355310, 0.420910, 0.552250", \ + "0.293780, 0.300930, 0.306920, 0.320600, 0.360130, 0.425730, 0.557070", \ + "0.302900, 0.310050, 0.316040, 0.329720, 0.369250, 0.434850, 0.566190", \ + "0.315090, 0.322240, 0.328230, 0.341910, 0.381440, 0.447040, 0.578380", \ + "0.363580, 0.370730, 0.376720, 0.390400, 0.429930, 0.495530, 0.626870", \ + "0.431130, 0.438280, 0.444270, 0.457950, 0.497480, 0.563080, 0.694420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.252306, 0.259366, 0.265196, 0.278426, 0.316666, 0.380166, 0.507346", \ + "0.255096, 0.262156, 0.267986, 0.281216, 0.319456, 0.382956, 0.510136", \ + "0.259936, 0.266996, 0.272826, 0.286056, 0.324296, 0.387796, 0.514976", \ + "0.269166, 0.276226, 0.282056, 0.295286, 0.333526, 0.397026, 0.524206", \ + "0.281196, 0.288256, 0.294086, 0.307316, 0.345556, 0.409056, 0.536236", \ + "0.329796, 0.336856, 0.342686, 0.355916, 0.394156, 0.457656, 0.584836", \ + "0.397446, 0.404506, 0.410336, 0.423566, 0.461806, 0.525306, 0.652486" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.321350, 0.327360, 0.332320, 0.343010, 0.371630, 0.417710, 0.509490", \ + "0.323980, 0.329990, 0.334950, 0.345640, 0.374260, 0.420340, 0.512120", \ + "0.327590, 0.333600, 0.338560, 0.349250, 0.377870, 0.423950, 0.515730", \ + "0.339980, 0.345990, 0.350950, 0.361640, 0.390260, 0.436340, 0.528120", \ + "0.353450, 0.359460, 0.364420, 0.375110, 0.403730, 0.449810, 0.541590", \ + "0.415340, 0.421350, 0.426310, 0.437000, 0.465620, 0.511700, 0.603480", \ + "0.511470, 0.517480, 0.522440, 0.533130, 0.561750, 0.607830, 0.699610" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285327, 0.291397, 0.296397, 0.307117, 0.335847, 0.382187, 0.474257", \ + "0.288207, 0.294277, 0.299277, 0.309997, 0.338727, 0.385067, 0.477137", \ + "0.291737, 0.297807, 0.302807, 0.313527, 0.342257, 0.388597, 0.480667", \ + "0.303967, 0.310037, 0.315037, 0.325757, 0.354487, 0.400827, 0.492897", \ + "0.317347, 0.323417, 0.328417, 0.339137, 0.367867, 0.414207, 0.506277", \ + "0.379357, 0.385427, 0.390427, 0.401147, 0.429877, 0.476217, 0.568287", \ + "0.475677, 0.481747, 0.486747, 0.497467, 0.526197, 0.572537, 0.664607" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + pin(AYA[0]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339640, 0.345510, 0.350440, 0.361340, 0.389850, 0.435890, 0.527330", \ + "0.341570, 0.347440, 0.352370, 0.363270, 0.391780, 0.437820, 0.529260", \ + "0.346580, 0.352450, 0.357380, 0.368280, 0.396790, 0.442830, 0.534270", \ + "0.355950, 0.361820, 0.366750, 0.377650, 0.406160, 0.452200, 0.543640", \ + "0.368710, 0.374580, 0.379510, 0.390410, 0.418920, 0.464960, 0.556400", \ + "0.419440, 0.425310, 0.430240, 0.441140, 0.469650, 0.515690, 0.607130", \ + "0.480980, 0.486850, 0.491780, 0.502680, 0.531190, 0.577230, 0.668670" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302274, 0.308264, 0.313214, 0.323994, 0.352764, 0.398994, 0.490854", \ + "0.304324, 0.310314, 0.315264, 0.326044, 0.354814, 0.401044, 0.492904", \ + "0.309114, 0.315104, 0.320054, 0.330834, 0.359604, 0.405834, 0.497694", \ + "0.318554, 0.324544, 0.329494, 0.340274, 0.369044, 0.415274, 0.507134", \ + "0.331344, 0.337334, 0.342284, 0.353064, 0.381834, 0.428064, 0.519924", \ + "0.382124, 0.388114, 0.393064, 0.403844, 0.432614, 0.478844, 0.570704", \ + "0.443494, 0.449484, 0.454434, 0.465214, 0.493984, 0.540214, 0.632074" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311890, 0.318920, 0.325040, 0.338720, 0.378270, 0.444030, 0.575450", \ + "0.314100, 0.321130, 0.327250, 0.340930, 0.380480, 0.446240, 0.577660", \ + "0.318680, 0.325710, 0.331830, 0.345510, 0.385060, 0.450820, 0.582240", \ + "0.330090, 0.337120, 0.343240, 0.356920, 0.396470, 0.462230, 0.593650", \ + "0.345240, 0.352270, 0.358390, 0.372070, 0.411620, 0.477380, 0.608800", \ + "0.405060, 0.412090, 0.418210, 0.431890, 0.471440, 0.537200, 0.668620", \ + "0.500990, 0.508020, 0.514140, 0.527820, 0.567370, 0.633130, 0.764550" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275922, 0.282742, 0.288682, 0.301862, 0.340152, 0.403832, 0.531162", \ + "0.277852, 0.284672, 0.290612, 0.303792, 0.342082, 0.405762, 0.533092", \ + "0.282692, 0.289512, 0.295452, 0.308632, 0.346922, 0.410602, 0.537932", \ + "0.294012, 0.300832, 0.306772, 0.319952, 0.358242, 0.421922, 0.549252", \ + "0.308912, 0.315732, 0.321672, 0.334852, 0.373142, 0.436822, 0.564152", \ + "0.369202, 0.376022, 0.381962, 0.395142, 0.433432, 0.497112, 0.624442", \ + "0.464622, 0.471442, 0.477382, 0.490562, 0.528852, 0.592532, 0.719862" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.286060, 0.293210, 0.299200, 0.312880, 0.352410, 0.418010, 0.549350", \ + "0.288960, 0.296110, 0.302100, 0.315780, 0.355310, 0.420910, 0.552250", \ + "0.293780, 0.300930, 0.306920, 0.320600, 0.360130, 0.425730, 0.557070", \ + "0.302900, 0.310050, 0.316040, 0.329720, 0.369250, 0.434850, 0.566190", \ + "0.315090, 0.322240, 0.328230, 0.341910, 0.381440, 0.447040, 0.578380", \ + "0.363580, 0.370730, 0.376720, 0.390400, 0.429930, 0.495530, 0.626870", \ + "0.431130, 0.438280, 0.444270, 0.457950, 0.497480, 0.563080, 0.694420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.252306, 0.259366, 0.265196, 0.278426, 0.316666, 0.380166, 0.507346", \ + "0.255096, 0.262156, 0.267986, 0.281216, 0.319456, 0.382956, 0.510136", \ + "0.259936, 0.266996, 0.272826, 0.286056, 0.324296, 0.387796, 0.514976", \ + "0.269166, 0.276226, 0.282056, 0.295286, 0.333526, 0.397026, 0.524206", \ + "0.281196, 0.288256, 0.294086, 0.307316, 0.345556, 0.409056, 0.536236", \ + "0.329796, 0.336856, 0.342686, 0.355916, 0.394156, 0.457656, 0.584836", \ + "0.397446, 0.404506, 0.410336, 0.423566, 0.461806, 0.525306, 0.652486" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.321350, 0.327360, 0.332320, 0.343010, 0.371630, 0.417710, 0.509490", \ + "0.323980, 0.329990, 0.334950, 0.345640, 0.374260, 0.420340, 0.512120", \ + "0.327590, 0.333600, 0.338560, 0.349250, 0.377870, 0.423950, 0.515730", \ + "0.339980, 0.345990, 0.350950, 0.361640, 0.390260, 0.436340, 0.528120", \ + "0.353450, 0.359460, 0.364420, 0.375110, 0.403730, 0.449810, 0.541590", \ + "0.415340, 0.421350, 0.426310, 0.437000, 0.465620, 0.511700, 0.603480", \ + "0.511470, 0.517480, 0.522440, 0.533130, 0.561750, 0.607830, 0.699610" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285327, 0.291397, 0.296397, 0.307117, 0.335847, 0.382187, 0.474257", \ + "0.288207, 0.294277, 0.299277, 0.309997, 0.338727, 0.385067, 0.477137", \ + "0.291737, 0.297807, 0.302807, 0.313527, 0.342257, 0.388597, 0.480667", \ + "0.303967, 0.310037, 0.315037, 0.325757, 0.354487, 0.400827, 0.492897", \ + "0.317347, 0.323417, 0.328417, 0.339137, 0.367867, 0.414207, 0.506277", \ + "0.379357, 0.385427, 0.390427, 0.401147, 0.429877, 0.476217, 0.568287", \ + "0.475677, 0.481747, 0.486747, 0.497467, 0.526197, 0.572537, 0.664607" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + } + pin(CENYB) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : CENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.149360, 0.155950, 0.161630, 0.174070, 0.210100, 0.266400, 0.372000", \ + "0.152690, 0.158210, 0.163700, 0.175840, 0.209530, 0.260700, 0.367000", \ + "0.155990, 0.162210, 0.168170, 0.180410, 0.212960, 0.265980, 0.376790", \ + "0.163730, 0.169910, 0.175980, 0.189550, 0.222870, 0.274210, 0.376150", \ + "0.175000, 0.180930, 0.186270, 0.198580, 0.234040, 0.286840, 0.388840", \ + "0.224020, 0.230630, 0.236220, 0.248280, 0.281930, 0.336330, 0.438540", \ + "0.289750, 0.296480, 0.302440, 0.314820, 0.347100, 0.401400, 0.513870" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134424, 0.141014, 0.146694, 0.159134, 0.195164, 0.251464, 0.357064", \ + "0.137754, 0.143274, 0.148764, 0.160904, 0.194594, 0.245764, 0.352064", \ + "0.141054, 0.147274, 0.153234, 0.165474, 0.198024, 0.251044, 0.361854", \ + "0.148794, 0.154974, 0.161044, 0.174614, 0.207934, 0.259274, 0.361214", \ + "0.160064, 0.165994, 0.171334, 0.183644, 0.219104, 0.271904, 0.373904", \ + "0.209084, 0.215694, 0.221284, 0.233344, 0.266994, 0.321394, 0.423604", \ + "0.274814, 0.281544, 0.287504, 0.299884, 0.332164, 0.386464, 0.498934" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153570, 0.161320, 0.168300, 0.183810, 0.230730, 0.307080, 0.452930", \ + "0.155230, 0.163090, 0.169720, 0.186390, 0.233110, 0.308350, 0.469020", \ + "0.160710, 0.168580, 0.174980, 0.191450, 0.235650, 0.315170, 0.473380", \ + "0.170530, 0.179080, 0.186660, 0.201650, 0.245360, 0.318630, 0.475250", \ + "0.181230, 0.189060, 0.195690, 0.211340, 0.256530, 0.335310, 0.494220", \ + "0.236040, 0.244070, 0.251700, 0.268260, 0.311890, 0.390970, 0.541240", \ + "0.317020, 0.324300, 0.331290, 0.348080, 0.393460, 0.466800, 0.625630" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138213, 0.145963, 0.152943, 0.168453, 0.215373, 0.291723, 0.437573", \ + "0.139873, 0.147733, 0.154363, 0.171033, 0.217753, 0.292993, 0.453663", \ + "0.145353, 0.153223, 0.159623, 0.176093, 0.220293, 0.299813, 0.458023", \ + "0.155173, 0.163723, 0.171303, 0.186293, 0.230003, 0.303273, 0.459893", \ + "0.165873, 0.173703, 0.180333, 0.195983, 0.241173, 0.319953, 0.478863", \ + "0.220683, 0.228713, 0.236343, 0.252903, 0.296533, 0.375613, 0.525883", \ + "0.301663, 0.308943, 0.315933, 0.332723, 0.378103, 0.451443, 0.610273" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151130, 0.157600, 0.163400, 0.175990, 0.208060, 0.261690, 0.369060", \ + "0.152830, 0.159320, 0.165050, 0.177420, 0.211460, 0.264900, 0.369130", \ + "0.157240, 0.163980, 0.169490, 0.181250, 0.215320, 0.269590, 0.379680", \ + "0.165200, 0.171930, 0.177630, 0.190120, 0.222520, 0.276200, 0.382340", \ + "0.176740, 0.183060, 0.188360, 0.200380, 0.233100, 0.284880, 0.394140", \ + "0.224990, 0.231710, 0.237430, 0.250420, 0.283620, 0.334780, 0.442400", \ + "0.295040, 0.301540, 0.307330, 0.321140, 0.353780, 0.404070, 0.506730" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136017, 0.142487, 0.148287, 0.160877, 0.192947, 0.246577, 0.353947", \ + "0.137717, 0.144207, 0.149937, 0.162307, 0.196347, 0.249787, 0.354017", \ + "0.142127, 0.148867, 0.154377, 0.166137, 0.200207, 0.254477, 0.364567", \ + "0.150087, 0.156817, 0.162517, 0.175007, 0.207407, 0.261087, 0.367227", \ + "0.161627, 0.167947, 0.173247, 0.185267, 0.217987, 0.269767, 0.379027", \ + "0.209877, 0.216597, 0.222317, 0.235307, 0.268507, 0.319667, 0.427287", \ + "0.279927, 0.286427, 0.292217, 0.306027, 0.338667, 0.388957, 0.491617" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153650, 0.160740, 0.167480, 0.184300, 0.231120, 0.303750, 0.454710", \ + "0.154670, 0.162570, 0.169310, 0.185170, 0.229680, 0.309510, 0.460370", \ + "0.160100, 0.167910, 0.174540, 0.190400, 0.235550, 0.314450, 0.473470", \ + "0.169750, 0.177650, 0.184440, 0.200370, 0.246310, 0.324080, 0.483170", \ + "0.180780, 0.188530, 0.195420, 0.210800, 0.259620, 0.332780, 0.485840", \ + "0.236210, 0.244410, 0.251900, 0.268450, 0.312650, 0.390150, 0.544840", \ + "0.317820, 0.324950, 0.331900, 0.347690, 0.392490, 0.469420, 0.625510" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138285, 0.145375, 0.152115, 0.168935, 0.215755, 0.288385, 0.439345", \ + "0.139305, 0.147205, 0.153945, 0.169805, 0.214315, 0.294145, 0.445005", \ + "0.144735, 0.152545, 0.159175, 0.175035, 0.220185, 0.299085, 0.458105", \ + "0.154385, 0.162285, 0.169075, 0.185005, 0.230945, 0.308715, 0.467805", \ + "0.165415, 0.173165, 0.180055, 0.195435, 0.244255, 0.317415, 0.470475", \ + "0.220845, 0.229045, 0.236535, 0.253085, 0.297285, 0.374785, 0.529475", \ + "0.302455, 0.309585, 0.316535, 0.332325, 0.377125, 0.454055, 0.610145" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENB&CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.229760, 0.235860, 0.241400, 0.254100, 0.286460, 0.338720, 0.441110", \ + "0.232690, 0.238790, 0.244330, 0.257030, 0.289390, 0.341650, 0.444040", \ + "0.236500, 0.242600, 0.248140, 0.260840, 0.293200, 0.345460, 0.447850", \ + "0.246910, 0.253010, 0.258550, 0.271250, 0.303610, 0.355870, 0.458260", \ + "0.261040, 0.267140, 0.272680, 0.285380, 0.317740, 0.370000, 0.472390", \ + "0.316170, 0.322270, 0.327810, 0.340510, 0.372870, 0.425130, 0.527520", \ + "0.391170, 0.397270, 0.402810, 0.415510, 0.447870, 0.500130, 0.602520" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.206784, 0.212884, 0.218424, 0.231124, 0.263484, 0.315744, 0.418134", \ + "0.209714, 0.215814, 0.221354, 0.234054, 0.266414, 0.318674, 0.421064", \ + "0.213524, 0.219624, 0.225164, 0.237864, 0.270224, 0.322484, 0.424874", \ + "0.223934, 0.230034, 0.235574, 0.248274, 0.280634, 0.332894, 0.435284", \ + "0.238064, 0.244164, 0.249704, 0.262404, 0.294764, 0.347024, 0.449414", \ + "0.293194, 0.299294, 0.304834, 0.317534, 0.349894, 0.402154, 0.504544", \ + "0.368194, 0.374294, 0.379834, 0.392534, 0.424894, 0.477154, 0.579544" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.244050, 0.251630, 0.258010, 0.273350, 0.317980, 0.393000, 0.540910", \ + "0.244310, 0.251890, 0.258270, 0.273610, 0.318240, 0.393260, 0.541170", \ + "0.249920, 0.257500, 0.263880, 0.279220, 0.323850, 0.398870, 0.546780", \ + "0.260590, 0.268170, 0.274550, 0.289890, 0.334520, 0.409540, 0.557450", \ + "0.275230, 0.282810, 0.289190, 0.304530, 0.349160, 0.424180, 0.572090", \ + "0.332980, 0.340560, 0.346940, 0.362280, 0.406910, 0.481930, 0.629840", \ + "0.419600, 0.427180, 0.433560, 0.448900, 0.493530, 0.568550, 0.716460" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.219645, 0.227225, 0.233605, 0.248945, 0.293575, 0.368595, 0.516505", \ + "0.219905, 0.227485, 0.233865, 0.249205, 0.293835, 0.368855, 0.516765", \ + "0.225515, 0.233095, 0.239475, 0.254815, 0.299445, 0.374465, 0.522375", \ + "0.236185, 0.243765, 0.250145, 0.265485, 0.310115, 0.385135, 0.533045", \ + "0.250825, 0.258405, 0.264785, 0.280125, 0.324755, 0.399775, 0.547685", \ + "0.308575, 0.316155, 0.322535, 0.337875, 0.382505, 0.457525, 0.605435", \ + "0.395195, 0.402775, 0.409155, 0.424495, 0.469125, 0.544145, 0.692055" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENB&!CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.482280, 0.489810, 0.496720, 0.513440, 0.556710, 0.631350, 0.778120", \ + "0.485150, 0.492680, 0.499590, 0.516310, 0.559580, 0.634220, 0.780990", \ + "0.490340, 0.497870, 0.504780, 0.521500, 0.564770, 0.639410, 0.786180", \ + "0.498920, 0.506450, 0.513360, 0.530080, 0.573350, 0.647990, 0.794760", \ + "0.513310, 0.520840, 0.527750, 0.544470, 0.587740, 0.662380, 0.809150", \ + "0.568010, 0.575540, 0.582450, 0.599170, 0.642440, 0.717080, 0.863850", \ + "0.645110, 0.652640, 0.659550, 0.676270, 0.719540, 0.794180, 0.940950" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.434052, 0.441582, 0.448492, 0.465212, 0.508482, 0.583122, 0.729892", \ + "0.436922, 0.444452, 0.451362, 0.468082, 0.511352, 0.585992, 0.732762", \ + "0.442112, 0.449642, 0.456552, 0.473272, 0.516542, 0.591182, 0.737952", \ + "0.450692, 0.458222, 0.465132, 0.481852, 0.525122, 0.599762, 0.746532", \ + "0.465082, 0.472612, 0.479522, 0.496242, 0.539512, 0.614152, 0.760922", \ + "0.519782, 0.527312, 0.534222, 0.550942, 0.594212, 0.668852, 0.815622", \ + "0.596882, 0.604412, 0.611322, 0.628042, 0.671312, 0.745952, 0.892722" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.427080, 0.433730, 0.439480, 0.451300, 0.483380, 0.535850, 0.637700", \ + "0.430000, 0.436650, 0.442400, 0.454220, 0.486300, 0.538770, 0.640620", \ + "0.433900, 0.440550, 0.446300, 0.458120, 0.490200, 0.542670, 0.644520", \ + "0.445400, 0.452050, 0.457800, 0.469620, 0.501700, 0.554170, 0.656020", \ + "0.460220, 0.466870, 0.472620, 0.484440, 0.516520, 0.568990, 0.670840", \ + "0.516520, 0.523170, 0.528920, 0.540740, 0.572820, 0.625290, 0.727140", \ + "0.601900, 0.608550, 0.614300, 0.626120, 0.658200, 0.710670, 0.812520" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.384372, 0.391022, 0.396772, 0.408592, 0.440672, 0.493142, 0.594992", \ + "0.387292, 0.393942, 0.399692, 0.411512, 0.443592, 0.496062, 0.597912", \ + "0.391192, 0.397842, 0.403592, 0.415412, 0.447492, 0.499962, 0.601812", \ + "0.402692, 0.409342, 0.415092, 0.426912, 0.458992, 0.511462, 0.613312", \ + "0.417512, 0.424162, 0.429912, 0.441732, 0.473812, 0.526282, 0.628132", \ + "0.473812, 0.480462, 0.486212, 0.498032, 0.530112, 0.582582, 0.684432", \ + "0.559192, 0.565842, 0.571592, 0.583412, 0.615492, 0.667962, 0.769812" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233090, 0.239950, 0.245080, 0.258290, 0.290020, 0.341830, 0.443440", \ + "0.235770, 0.242630, 0.247760, 0.260970, 0.292700, 0.344510, 0.446120", \ + "0.239830, 0.246690, 0.251820, 0.265030, 0.296760, 0.348570, 0.450180", \ + "0.249940, 0.256800, 0.261930, 0.275140, 0.306870, 0.358680, 0.460290", \ + "0.263840, 0.270700, 0.275830, 0.289040, 0.320770, 0.372580, 0.474190", \ + "0.314240, 0.321100, 0.326230, 0.339440, 0.371170, 0.422980, 0.524590", \ + "0.388430, 0.395290, 0.400420, 0.413630, 0.445360, 0.497170, 0.598780" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.209781, 0.216641, 0.221771, 0.234981, 0.266711, 0.318521, 0.420131", \ + "0.212461, 0.219321, 0.224451, 0.237661, 0.269391, 0.321201, 0.422811", \ + "0.216521, 0.223381, 0.228511, 0.241721, 0.273451, 0.325261, 0.426871", \ + "0.226631, 0.233491, 0.238621, 0.251831, 0.283561, 0.335371, 0.436981", \ + "0.240531, 0.247391, 0.252521, 0.265731, 0.297461, 0.349271, 0.450881", \ + "0.290931, 0.297791, 0.302921, 0.316131, 0.347861, 0.399671, 0.501281", \ + "0.365121, 0.371981, 0.377111, 0.390321, 0.422051, 0.473861, 0.575471" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.313450, 0.321350, 0.327280, 0.342400, 0.386220, 0.462450, 0.611040", \ + "0.315670, 0.323570, 0.329500, 0.344620, 0.388440, 0.464670, 0.613260", \ + "0.319660, 0.327560, 0.333490, 0.348610, 0.392430, 0.468660, 0.617250", \ + "0.331190, 0.339090, 0.345020, 0.360140, 0.403960, 0.480190, 0.628780", \ + "0.344830, 0.352730, 0.358660, 0.373780, 0.417600, 0.493830, 0.642420", \ + "0.401750, 0.409650, 0.415580, 0.430700, 0.474520, 0.550750, 0.699340", \ + "0.485820, 0.493720, 0.499650, 0.514770, 0.558590, 0.634820, 0.783410" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.282105, 0.290005, 0.295935, 0.311055, 0.354875, 0.431105, 0.579695", \ + "0.284325, 0.292225, 0.298155, 0.313275, 0.357095, 0.433325, 0.581915", \ + "0.288315, 0.296215, 0.302145, 0.317265, 0.361085, 0.437315, 0.585905", \ + "0.299845, 0.307745, 0.313675, 0.328795, 0.372615, 0.448845, 0.597435", \ + "0.313485, 0.321385, 0.327315, 0.342435, 0.386255, 0.462485, 0.611075", \ + "0.370405, 0.378305, 0.384235, 0.399355, 0.443175, 0.519405, 0.667995", \ + "0.454475, 0.462375, 0.468305, 0.483425, 0.527245, 0.603475, 0.752065" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + } + internal_power() { + related_pin : CENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TCENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENB&CENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENB&!CENB"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003623, 0.003626, 0.003630, 0.003634, 0.003637, 0.003641, 0.003645", \ + "0.003722, 0.003725, 0.003729, 0.003733, 0.003737, 0.003740, 0.003744", \ + "0.004425, 0.004429, 0.004433, 0.004438, 0.004442, 0.004447, 0.004451", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.005813, 0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848", \ + "0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854", \ + "0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854, 0.005860" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004789, 0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817", \ + "0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822", \ + "0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832, 0.004837", \ + "0.004981, 0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011", \ + "0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011, 0.005016" \ + ); + } + } + } + bus(WENYB) { + bus_type : rf2_32x128_wm1_WENYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : WENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.245160, 0.252420, 0.258270, 0.271450, 0.301050, 0.355530, 0.456610", \ + "0.247230, 0.255160, 0.260690, 0.272480, 0.306140, 0.357480, 0.453790", \ + "0.251820, 0.260670, 0.265650, 0.277690, 0.310750, 0.361730, 0.459450", \ + "0.260890, 0.268280, 0.275260, 0.286620, 0.318090, 0.370990, 0.466680", \ + "0.269730, 0.278360, 0.283080, 0.295230, 0.326840, 0.373860, 0.467760", \ + "0.315880, 0.323970, 0.330230, 0.342960, 0.373840, 0.420980, 0.520800", \ + "0.400010, 0.407030, 0.412590, 0.423960, 0.457060, 0.506960, 0.600370" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.220644, 0.227904, 0.233754, 0.246934, 0.276534, 0.331014, 0.432094", \ + "0.222714, 0.230644, 0.236174, 0.247964, 0.281624, 0.332964, 0.429274", \ + "0.227304, 0.236154, 0.241134, 0.253174, 0.286234, 0.337214, 0.434934", \ + "0.236374, 0.243764, 0.250744, 0.262104, 0.293574, 0.346474, 0.442164", \ + "0.245214, 0.253844, 0.258564, 0.270714, 0.302324, 0.349344, 0.443244", \ + "0.291364, 0.299454, 0.305714, 0.318444, 0.349324, 0.396464, 0.496284", \ + "0.375494, 0.382514, 0.388074, 0.399444, 0.432544, 0.482444, 0.575854" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218940, 0.227300, 0.234290, 0.248110, 0.290510, 0.364860, 0.511120", \ + "0.221240, 0.229450, 0.236570, 0.251050, 0.293160, 0.365420, 0.515590", \ + "0.225720, 0.233650, 0.240840, 0.256470, 0.299530, 0.376480, 0.519410", \ + "0.231420, 0.239600, 0.246240, 0.260610, 0.303920, 0.378320, 0.523090", \ + "0.240560, 0.248500, 0.255030, 0.269640, 0.312500, 0.386450, 0.533450", \ + "0.294640, 0.302860, 0.309950, 0.325080, 0.366580, 0.440170, 0.590750", \ + "0.380360, 0.387940, 0.394400, 0.409480, 0.450860, 0.524670, 0.663940" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.197046, 0.205406, 0.212396, 0.226216, 0.268616, 0.342966, 0.489226", \ + "0.199346, 0.207556, 0.214676, 0.229156, 0.271266, 0.343526, 0.493696", \ + "0.203826, 0.211756, 0.218946, 0.234576, 0.277636, 0.354586, 0.497516", \ + "0.209526, 0.217706, 0.224346, 0.238716, 0.282026, 0.356426, 0.501196", \ + "0.218666, 0.226606, 0.233136, 0.247746, 0.290606, 0.364556, 0.511556", \ + "0.272746, 0.280966, 0.288056, 0.303186, 0.344686, 0.418276, 0.568856", \ + "0.358466, 0.366046, 0.372506, 0.387586, 0.428966, 0.502776, 0.642046" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477" \ + ); + } + } + timing() { + related_pin : TWENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.244830, 0.252960, 0.258100, 0.270210, 0.300480, 0.351950, 0.444480", \ + "0.246480, 0.253830, 0.259380, 0.272590, 0.305180, 0.355560, 0.452630", \ + "0.251360, 0.259310, 0.264500, 0.277270, 0.311260, 0.358770, 0.451380", \ + "0.259710, 0.267850, 0.275410, 0.287010, 0.317840, 0.364350, 0.459180", \ + "0.269940, 0.278350, 0.283640, 0.295600, 0.328510, 0.380610, 0.476240", \ + "0.315380, 0.322860, 0.329420, 0.342370, 0.375370, 0.422990, 0.523800", \ + "0.403660, 0.411390, 0.411940, 0.424770, 0.457350, 0.510860, 0.601630" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.220347, 0.228477, 0.233617, 0.245727, 0.275997, 0.327467, 0.419997", \ + "0.221997, 0.229347, 0.234897, 0.248107, 0.280697, 0.331077, 0.428147", \ + "0.226877, 0.234827, 0.240017, 0.252787, 0.286777, 0.334287, 0.426897", \ + "0.235227, 0.243367, 0.250927, 0.262527, 0.293357, 0.339867, 0.434697", \ + "0.245457, 0.253867, 0.259157, 0.271117, 0.304027, 0.356127, 0.451757", \ + "0.290897, 0.298377, 0.304937, 0.317887, 0.350887, 0.398507, 0.499317", \ + "0.379177, 0.386907, 0.387457, 0.400287, 0.432867, 0.486377, 0.577147" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218270, 0.226400, 0.233530, 0.247550, 0.289910, 0.362000, 0.511330", \ + "0.219890, 0.227830, 0.235050, 0.250800, 0.293760, 0.370590, 0.513740", \ + "0.225560, 0.232750, 0.239270, 0.254650, 0.296400, 0.370550, 0.516050", \ + "0.230770, 0.238720, 0.245970, 0.261110, 0.302530, 0.375480, 0.519960", \ + "0.239260, 0.247150, 0.253800, 0.268330, 0.311150, 0.383950, 0.532200", \ + "0.292790, 0.300980, 0.308040, 0.323230, 0.364750, 0.438340, 0.589080", \ + "0.382910, 0.390550, 0.397330, 0.412230, 0.453800, 0.527230, 0.669790" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.196443, 0.204573, 0.211703, 0.225723, 0.268083, 0.340173, 0.489503", \ + "0.198063, 0.206003, 0.213223, 0.228973, 0.271933, 0.348763, 0.491913", \ + "0.203733, 0.210923, 0.217443, 0.232823, 0.274573, 0.348723, 0.494223", \ + "0.208943, 0.216893, 0.224143, 0.239283, 0.280703, 0.353653, 0.498133", \ + "0.217433, 0.225323, 0.231973, 0.246503, 0.289323, 0.362123, 0.510373", \ + "0.270963, 0.279153, 0.286213, 0.301403, 0.342923, 0.416513, 0.567253", \ + "0.361083, 0.368723, 0.375503, 0.390403, 0.431973, 0.505403, 0.647963" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.303490, 0.309810, 0.316700, 0.328960, 0.358830, 0.406460, 0.499030", \ + "0.305650, 0.311970, 0.318860, 0.331120, 0.360990, 0.408620, 0.501190", \ + "0.310100, 0.316420, 0.323310, 0.335570, 0.365440, 0.413070, 0.505640", \ + "0.319910, 0.326230, 0.333120, 0.345380, 0.375250, 0.422880, 0.515450", \ + "0.333900, 0.340220, 0.347110, 0.359370, 0.389240, 0.436870, 0.529440", \ + "0.384510, 0.390830, 0.397720, 0.409980, 0.439850, 0.487480, 0.580050", \ + "0.458090, 0.464410, 0.471300, 0.483560, 0.513430, 0.561060, 0.653630" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233820, 0.240000, 0.246580, 0.259290, 0.289200, 0.336820, 0.429450", \ + "0.235990, 0.242170, 0.248750, 0.261460, 0.291370, 0.338990, 0.431620", \ + "0.239760, 0.245940, 0.252520, 0.265230, 0.295140, 0.342760, 0.435390", \ + "0.250380, 0.256560, 0.263140, 0.275850, 0.305760, 0.353380, 0.446010", \ + "0.263220, 0.269400, 0.275980, 0.288690, 0.318600, 0.366220, 0.458850", \ + "0.315060, 0.321240, 0.327820, 0.340530, 0.370440, 0.418060, 0.510690", \ + "0.388440, 0.394620, 0.401200, 0.413910, 0.443820, 0.491440, 0.584070" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990", \ + "0.031422, 0.038133, 0.044317, 0.059701, 0.109297, 0.191048, 0.364990" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.338400, 0.347040, 0.352220, 0.367570, 0.409490, 0.479330, 0.620040", \ + "0.340940, 0.349580, 0.354760, 0.370110, 0.412030, 0.481870, 0.622580", \ + "0.345340, 0.353980, 0.359160, 0.374510, 0.416430, 0.486270, 0.626980", \ + "0.356650, 0.365290, 0.370470, 0.385820, 0.427740, 0.497580, 0.638290", \ + "0.372190, 0.380830, 0.386010, 0.401360, 0.443280, 0.513120, 0.653830", \ + "0.428280, 0.436920, 0.442100, 0.457450, 0.499370, 0.569210, 0.709920", \ + "0.511690, 0.520330, 0.525510, 0.540860, 0.582780, 0.652620, 0.793330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.263223, 0.271993, 0.277293, 0.292583, 0.333293, 0.404003, 0.544663", \ + "0.265633, 0.274403, 0.279703, 0.294993, 0.335703, 0.406413, 0.547073", \ + "0.269403, 0.278173, 0.283473, 0.298763, 0.339473, 0.410183, 0.550843", \ + "0.281683, 0.290453, 0.295753, 0.311043, 0.351753, 0.422463, 0.563123", \ + "0.297213, 0.305983, 0.311283, 0.326573, 0.367283, 0.437993, 0.578653", \ + "0.352533, 0.361303, 0.366603, 0.381893, 0.422603, 0.493313, 0.633973", \ + "0.436303, 0.445073, 0.450373, 0.465663, 0.506373, 0.577083, 0.717743" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477", \ + "0.021853, 0.030802, 0.038924, 0.059883, 0.137174, 0.262944, 0.516477" \ + ); + } + } + internal_power() { + related_pin : WENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TWENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003367, 0.003367, 0.003367, 0.003367, 0.003367, 0.003367, 0.003367", \ + "0.003370, 0.003370, 0.003370, 0.003370, 0.003370, 0.003370, 0.003370", \ + "0.003374, 0.003374, 0.003374, 0.003374, 0.003374, 0.003374, 0.003374", \ + "0.003377, 0.003377, 0.003377, 0.003377, 0.003377, 0.003377, 0.003377", \ + "0.003380, 0.003380, 0.003380, 0.003380, 0.003380, 0.003380, 0.003380", \ + "0.003384, 0.003384, 0.003384, 0.003384, 0.003384, 0.003384, 0.003384", \ + "0.003387, 0.003387, 0.003387, 0.003387, 0.003387, 0.003387, 0.003387" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004114, 0.004114, 0.004114, 0.004114, 0.004114, 0.004114, 0.004114", \ + "0.004131, 0.004131, 0.004131, 0.004131, 0.004131, 0.004131, 0.004131", \ + "0.004135, 0.004135, 0.004135, 0.004135, 0.004135, 0.004135, 0.004135", \ + "0.004139, 0.004139, 0.004139, 0.004139, 0.004139, 0.004139, 0.004139", \ + "0.004143, 0.004143, 0.004143, 0.004143, 0.004143, 0.004143, 0.004143", \ + "0.004147, 0.004147, 0.004147, 0.004147, 0.004147, 0.004147, 0.004147", \ + "0.004151, 0.004151, 0.004151, 0.004151, 0.004151, 0.004151, 0.004151" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003623, 0.003626, 0.003630, 0.003634, 0.003637, 0.003641, 0.003645", \ + "0.003722, 0.003725, 0.003729, 0.003733, 0.003737, 0.003740, 0.003744", \ + "0.004425, 0.004429, 0.004433, 0.004438, 0.004442, 0.004447, 0.004451", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.005813, 0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848", \ + "0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854", \ + "0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854, 0.005860" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004789, 0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817", \ + "0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822", \ + "0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832, 0.004837", \ + "0.004981, 0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011", \ + "0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011, 0.005016" \ + ); + } + } + pin(WENYB[127]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[127]&WENB[127]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[127] == 1'b0 && WENB[127] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[127]&!WENB[127]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[127] == 1'b1 && WENB[127] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[127]&WENB[127]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[127]&!WENB[127]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[126]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[126]&WENB[126]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[126] == 1'b0 && WENB[126] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[126]&!WENB[126]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[126] == 1'b1 && WENB[126] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[126]&WENB[126]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[126]&!WENB[126]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[125]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[125]&WENB[125]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[125] == 1'b0 && WENB[125] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[125]&!WENB[125]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[125] == 1'b1 && WENB[125] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[125]&WENB[125]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[125]&!WENB[125]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[124]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[124]&WENB[124]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[124] == 1'b0 && WENB[124] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[124]&!WENB[124]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[124] == 1'b1 && WENB[124] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[124]&WENB[124]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[124]&!WENB[124]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[123]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[123]&WENB[123]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[123] == 1'b0 && WENB[123] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[123]&!WENB[123]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[123] == 1'b1 && WENB[123] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[123]&WENB[123]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[123]&!WENB[123]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[122]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[122]&WENB[122]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[122] == 1'b0 && WENB[122] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[122]&!WENB[122]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[122] == 1'b1 && WENB[122] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[122]&WENB[122]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[122]&!WENB[122]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[121]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[121]&WENB[121]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[121] == 1'b0 && WENB[121] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[121]&!WENB[121]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[121] == 1'b1 && WENB[121] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[121]&WENB[121]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[121]&!WENB[121]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[120]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[120]&WENB[120]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[120] == 1'b0 && WENB[120] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[120]&!WENB[120]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[120] == 1'b1 && WENB[120] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[120]&WENB[120]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[120]&!WENB[120]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[119]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[119]&WENB[119]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[119] == 1'b0 && WENB[119] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[119]&!WENB[119]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[119] == 1'b1 && WENB[119] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[119]&WENB[119]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[119]&!WENB[119]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[118]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[118]&WENB[118]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[118] == 1'b0 && WENB[118] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[118]&!WENB[118]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[118] == 1'b1 && WENB[118] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[118]&WENB[118]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[118]&!WENB[118]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[117]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[117]&WENB[117]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[117] == 1'b0 && WENB[117] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[117]&!WENB[117]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[117] == 1'b1 && WENB[117] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[117]&WENB[117]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[117]&!WENB[117]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[116]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[116]&WENB[116]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[116] == 1'b0 && WENB[116] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[116]&!WENB[116]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[116] == 1'b1 && WENB[116] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[116]&WENB[116]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[116]&!WENB[116]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[115]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[115]&WENB[115]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[115] == 1'b0 && WENB[115] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[115]&!WENB[115]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[115] == 1'b1 && WENB[115] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[115]&WENB[115]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[115]&!WENB[115]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[114]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[114]&WENB[114]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[114] == 1'b0 && WENB[114] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[114]&!WENB[114]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[114] == 1'b1 && WENB[114] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[114]&WENB[114]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[114]&!WENB[114]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[113]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[113]&WENB[113]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[113] == 1'b0 && WENB[113] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[113]&!WENB[113]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[113] == 1'b1 && WENB[113] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[113]&WENB[113]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[113]&!WENB[113]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[112]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[112]&WENB[112]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[112] == 1'b0 && WENB[112] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[112]&!WENB[112]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[112] == 1'b1 && WENB[112] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[112]&WENB[112]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[112]&!WENB[112]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[111]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[111]&WENB[111]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[111] == 1'b0 && WENB[111] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[111]&!WENB[111]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[111] == 1'b1 && WENB[111] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[111]&WENB[111]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[111]&!WENB[111]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[110]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[110]&WENB[110]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[110] == 1'b0 && WENB[110] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[110]&!WENB[110]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[110] == 1'b1 && WENB[110] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[110]&WENB[110]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[110]&!WENB[110]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[109]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[109]&WENB[109]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[109] == 1'b0 && WENB[109] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[109]&!WENB[109]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[109] == 1'b1 && WENB[109] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[109]&WENB[109]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[109]&!WENB[109]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[108]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[108]&WENB[108]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[108] == 1'b0 && WENB[108] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[108]&!WENB[108]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[108] == 1'b1 && WENB[108] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[108]&WENB[108]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[108]&!WENB[108]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[107]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[107]&WENB[107]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[107] == 1'b0 && WENB[107] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[107]&!WENB[107]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[107] == 1'b1 && WENB[107] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[107]&WENB[107]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[107]&!WENB[107]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[106]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[106]&WENB[106]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[106] == 1'b0 && WENB[106] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[106]&!WENB[106]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[106] == 1'b1 && WENB[106] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[106]&WENB[106]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[106]&!WENB[106]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[105]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[105]&WENB[105]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[105] == 1'b0 && WENB[105] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[105]&!WENB[105]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[105] == 1'b1 && WENB[105] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[105]&WENB[105]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[105]&!WENB[105]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[104]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[104]&WENB[104]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[104] == 1'b0 && WENB[104] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[104]&!WENB[104]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[104] == 1'b1 && WENB[104] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[104]&WENB[104]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[104]&!WENB[104]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[103]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[103]&WENB[103]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[103] == 1'b0 && WENB[103] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[103]&!WENB[103]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[103] == 1'b1 && WENB[103] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[103]&WENB[103]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[103]&!WENB[103]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[102]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[102]&WENB[102]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[102] == 1'b0 && WENB[102] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[102]&!WENB[102]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[102] == 1'b1 && WENB[102] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[102]&WENB[102]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[102]&!WENB[102]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[101]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[101]&WENB[101]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[101] == 1'b0 && WENB[101] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[101]&!WENB[101]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[101] == 1'b1 && WENB[101] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[101]&WENB[101]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[101]&!WENB[101]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[100]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[100]&WENB[100]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[100] == 1'b0 && WENB[100] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[100]&!WENB[100]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[100] == 1'b1 && WENB[100] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[100]&WENB[100]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[100]&!WENB[100]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[99]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[99]&WENB[99]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[99] == 1'b0 && WENB[99] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[99]&!WENB[99]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[99] == 1'b1 && WENB[99] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[99]&WENB[99]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[99]&!WENB[99]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[98]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[98]&WENB[98]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[98] == 1'b0 && WENB[98] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[98]&!WENB[98]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[98] == 1'b1 && WENB[98] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[98]&WENB[98]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[98]&!WENB[98]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[97]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[97]&WENB[97]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[97] == 1'b0 && WENB[97] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[97]&!WENB[97]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[97] == 1'b1 && WENB[97] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[97]&WENB[97]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[97]&!WENB[97]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[96]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[96]&WENB[96]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[96] == 1'b0 && WENB[96] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[96]&!WENB[96]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[96] == 1'b1 && WENB[96] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[96]&WENB[96]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[96]&!WENB[96]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[95]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[95]&WENB[95]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[95] == 1'b0 && WENB[95] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[95]&!WENB[95]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[95] == 1'b1 && WENB[95] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[95]&WENB[95]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[95]&!WENB[95]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[94]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[94]&WENB[94]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[94] == 1'b0 && WENB[94] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[94]&!WENB[94]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[94] == 1'b1 && WENB[94] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[94]&WENB[94]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[94]&!WENB[94]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[93]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[93]&WENB[93]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[93] == 1'b0 && WENB[93] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[93]&!WENB[93]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[93] == 1'b1 && WENB[93] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[93]&WENB[93]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[93]&!WENB[93]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[92]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[92]&WENB[92]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[92] == 1'b0 && WENB[92] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[92]&!WENB[92]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[92] == 1'b1 && WENB[92] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[92]&WENB[92]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[92]&!WENB[92]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[91]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[91]&WENB[91]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[91] == 1'b0 && WENB[91] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[91]&!WENB[91]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[91] == 1'b1 && WENB[91] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[91]&WENB[91]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[91]&!WENB[91]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[90]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[90]&WENB[90]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[90] == 1'b0 && WENB[90] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[90]&!WENB[90]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[90] == 1'b1 && WENB[90] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[90]&WENB[90]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[90]&!WENB[90]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[89]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[89]&WENB[89]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[89] == 1'b0 && WENB[89] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[89]&!WENB[89]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[89] == 1'b1 && WENB[89] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[89]&WENB[89]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[89]&!WENB[89]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[88]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[88]&WENB[88]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[88] == 1'b0 && WENB[88] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[88]&!WENB[88]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[88] == 1'b1 && WENB[88] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[88]&WENB[88]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[88]&!WENB[88]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[87]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[87]&WENB[87]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[87] == 1'b0 && WENB[87] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[87]&!WENB[87]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[87] == 1'b1 && WENB[87] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[87]&WENB[87]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[87]&!WENB[87]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[86]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[86]&WENB[86]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[86] == 1'b0 && WENB[86] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[86]&!WENB[86]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[86] == 1'b1 && WENB[86] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[86]&WENB[86]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[86]&!WENB[86]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[85]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[85]&WENB[85]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[85] == 1'b0 && WENB[85] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[85]&!WENB[85]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[85] == 1'b1 && WENB[85] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[85]&WENB[85]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[85]&!WENB[85]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[84]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[84]&WENB[84]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[84] == 1'b0 && WENB[84] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[84]&!WENB[84]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[84] == 1'b1 && WENB[84] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[84]&WENB[84]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[84]&!WENB[84]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[83]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[83]&WENB[83]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[83] == 1'b0 && WENB[83] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[83]&!WENB[83]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[83] == 1'b1 && WENB[83] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[83]&WENB[83]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[83]&!WENB[83]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[82]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[82]&WENB[82]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[82] == 1'b0 && WENB[82] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[82]&!WENB[82]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[82] == 1'b1 && WENB[82] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[82]&WENB[82]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[82]&!WENB[82]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[81]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[81]&WENB[81]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[81] == 1'b0 && WENB[81] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[81]&!WENB[81]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[81] == 1'b1 && WENB[81] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[81]&WENB[81]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[81]&!WENB[81]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[80]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[80]&WENB[80]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[80] == 1'b0 && WENB[80] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[80]&!WENB[80]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[80] == 1'b1 && WENB[80] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[80]&WENB[80]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[80]&!WENB[80]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[79]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[79]&WENB[79]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[79] == 1'b0 && WENB[79] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[79]&!WENB[79]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[79] == 1'b1 && WENB[79] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[79]&WENB[79]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[79]&!WENB[79]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[78]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[78]&WENB[78]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[78] == 1'b0 && WENB[78] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[78]&!WENB[78]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[78] == 1'b1 && WENB[78] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[78]&WENB[78]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[78]&!WENB[78]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[77]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[77]&WENB[77]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[77] == 1'b0 && WENB[77] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[77]&!WENB[77]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[77] == 1'b1 && WENB[77] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[77]&WENB[77]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[77]&!WENB[77]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[76]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[76]&WENB[76]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[76] == 1'b0 && WENB[76] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[76]&!WENB[76]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[76] == 1'b1 && WENB[76] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[76]&WENB[76]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[76]&!WENB[76]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[75]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[75]&WENB[75]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[75] == 1'b0 && WENB[75] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[75]&!WENB[75]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[75] == 1'b1 && WENB[75] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[75]&WENB[75]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[75]&!WENB[75]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[74]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[74]&WENB[74]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[74] == 1'b0 && WENB[74] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[74]&!WENB[74]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[74] == 1'b1 && WENB[74] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[74]&WENB[74]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[74]&!WENB[74]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[73]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[73]&WENB[73]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[73] == 1'b0 && WENB[73] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[73]&!WENB[73]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[73] == 1'b1 && WENB[73] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[73]&WENB[73]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[73]&!WENB[73]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[72]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[72]&WENB[72]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[72] == 1'b0 && WENB[72] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[72]&!WENB[72]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[72] == 1'b1 && WENB[72] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[72]&WENB[72]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[72]&!WENB[72]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[71]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[71]&WENB[71]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[71] == 1'b0 && WENB[71] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[71]&!WENB[71]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[71] == 1'b1 && WENB[71] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[71]&WENB[71]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[71]&!WENB[71]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[70]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[70]&WENB[70]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[70] == 1'b0 && WENB[70] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[70]&!WENB[70]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[70] == 1'b1 && WENB[70] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[70]&WENB[70]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[70]&!WENB[70]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[69]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[69]&WENB[69]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[69] == 1'b0 && WENB[69] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[69]&!WENB[69]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[69] == 1'b1 && WENB[69] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[69]&WENB[69]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[69]&!WENB[69]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[68]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[68]&WENB[68]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[68] == 1'b0 && WENB[68] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[68]&!WENB[68]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[68] == 1'b1 && WENB[68] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[68]&WENB[68]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[68]&!WENB[68]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[67]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[67]&WENB[67]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[67] == 1'b0 && WENB[67] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[67]&!WENB[67]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[67] == 1'b1 && WENB[67] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[67]&WENB[67]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[67]&!WENB[67]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[66]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[66]&WENB[66]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[66] == 1'b0 && WENB[66] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[66]&!WENB[66]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[66] == 1'b1 && WENB[66] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[66]&WENB[66]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[66]&!WENB[66]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[65]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[65]&WENB[65]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[65] == 1'b0 && WENB[65] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[65]&!WENB[65]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[65] == 1'b1 && WENB[65] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[65]&WENB[65]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[65]&!WENB[65]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[64]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[64]&WENB[64]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[64] == 1'b0 && WENB[64] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[64]&!WENB[64]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[64] == 1'b1 && WENB[64] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[64]&WENB[64]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[64]&!WENB[64]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[63]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[63]&WENB[63]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[63] == 1'b0 && WENB[63] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[63]&!WENB[63]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[63] == 1'b1 && WENB[63] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[63]&WENB[63]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[63]&!WENB[63]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[62]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[62]&WENB[62]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[62] == 1'b0 && WENB[62] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[62]&!WENB[62]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[62] == 1'b1 && WENB[62] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[62]&WENB[62]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[62]&!WENB[62]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[61]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[61]&WENB[61]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[61] == 1'b0 && WENB[61] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[61]&!WENB[61]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[61] == 1'b1 && WENB[61] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[61]&WENB[61]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[61]&!WENB[61]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[60]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[60]&WENB[60]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[60] == 1'b0 && WENB[60] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[60]&!WENB[60]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[60] == 1'b1 && WENB[60] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[60]&WENB[60]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[60]&!WENB[60]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[59]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[59]&WENB[59]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[59] == 1'b0 && WENB[59] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[59]&!WENB[59]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[59] == 1'b1 && WENB[59] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[59]&WENB[59]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[59]&!WENB[59]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[58]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[58]&WENB[58]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[58] == 1'b0 && WENB[58] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[58]&!WENB[58]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[58] == 1'b1 && WENB[58] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[58]&WENB[58]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[58]&!WENB[58]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[57]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[57]&WENB[57]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[57] == 1'b0 && WENB[57] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[57]&!WENB[57]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[57] == 1'b1 && WENB[57] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[57]&WENB[57]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[57]&!WENB[57]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[56]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[56]&WENB[56]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[56] == 1'b0 && WENB[56] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[56]&!WENB[56]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[56] == 1'b1 && WENB[56] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[56]&WENB[56]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[56]&!WENB[56]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[55]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[55]&WENB[55]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[55] == 1'b0 && WENB[55] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[55]&!WENB[55]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[55] == 1'b1 && WENB[55] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[55]&WENB[55]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[55]&!WENB[55]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[54]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[54]&WENB[54]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[54] == 1'b0 && WENB[54] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[54]&!WENB[54]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[54] == 1'b1 && WENB[54] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[54]&WENB[54]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[54]&!WENB[54]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[53]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[53]&WENB[53]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[53] == 1'b0 && WENB[53] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[53]&!WENB[53]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[53] == 1'b1 && WENB[53] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[53]&WENB[53]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[53]&!WENB[53]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[52]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[52]&WENB[52]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[52] == 1'b0 && WENB[52] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[52]&!WENB[52]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[52] == 1'b1 && WENB[52] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[52]&WENB[52]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[52]&!WENB[52]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[51]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[51]&WENB[51]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[51] == 1'b0 && WENB[51] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[51]&!WENB[51]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[51] == 1'b1 && WENB[51] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[51]&WENB[51]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[51]&!WENB[51]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[50]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[50]&WENB[50]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[50] == 1'b0 && WENB[50] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[50]&!WENB[50]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[50] == 1'b1 && WENB[50] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[50]&WENB[50]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[50]&!WENB[50]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[49]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[49]&WENB[49]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[49] == 1'b0 && WENB[49] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[49]&!WENB[49]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[49] == 1'b1 && WENB[49] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[49]&WENB[49]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[49]&!WENB[49]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[48]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[48]&WENB[48]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[48] == 1'b0 && WENB[48] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[48]&!WENB[48]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[48] == 1'b1 && WENB[48] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[48]&WENB[48]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[48]&!WENB[48]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[47]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[47]&WENB[47]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[47] == 1'b0 && WENB[47] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[47]&!WENB[47]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[47] == 1'b1 && WENB[47] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[47]&WENB[47]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[47]&!WENB[47]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[46]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[46]&WENB[46]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[46] == 1'b0 && WENB[46] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[46]&!WENB[46]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[46] == 1'b1 && WENB[46] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[46]&WENB[46]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[46]&!WENB[46]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[45]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[45]&WENB[45]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[45] == 1'b0 && WENB[45] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[45]&!WENB[45]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[45] == 1'b1 && WENB[45] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[45]&WENB[45]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[45]&!WENB[45]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[44]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[44]&WENB[44]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[44] == 1'b0 && WENB[44] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[44]&!WENB[44]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[44] == 1'b1 && WENB[44] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[44]&WENB[44]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[44]&!WENB[44]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[43]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[43]&WENB[43]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[43] == 1'b0 && WENB[43] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[43]&!WENB[43]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[43] == 1'b1 && WENB[43] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[43]&WENB[43]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[43]&!WENB[43]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[42]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[42]&WENB[42]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[42] == 1'b0 && WENB[42] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[42]&!WENB[42]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[42] == 1'b1 && WENB[42] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[42]&WENB[42]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[42]&!WENB[42]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[41]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[41]&WENB[41]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[41] == 1'b0 && WENB[41] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[41]&!WENB[41]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[41] == 1'b1 && WENB[41] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[41]&WENB[41]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[41]&!WENB[41]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[40]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[40]&WENB[40]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[40] == 1'b0 && WENB[40] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[40]&!WENB[40]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[40] == 1'b1 && WENB[40] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[40]&WENB[40]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[40]&!WENB[40]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[39]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[39]&WENB[39]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[39] == 1'b0 && WENB[39] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[39]&!WENB[39]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[39] == 1'b1 && WENB[39] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[39]&WENB[39]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[39]&!WENB[39]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[38]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[38]&WENB[38]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[38] == 1'b0 && WENB[38] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[38]&!WENB[38]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[38] == 1'b1 && WENB[38] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[38]&WENB[38]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[38]&!WENB[38]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[37]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[37]&WENB[37]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[37] == 1'b0 && WENB[37] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[37]&!WENB[37]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[37] == 1'b1 && WENB[37] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[37]&WENB[37]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[37]&!WENB[37]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[36]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[36]&WENB[36]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[36] == 1'b0 && WENB[36] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[36]&!WENB[36]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[36] == 1'b1 && WENB[36] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[36]&WENB[36]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[36]&!WENB[36]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[35]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[35]&WENB[35]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[35] == 1'b0 && WENB[35] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[35]&!WENB[35]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[35] == 1'b1 && WENB[35] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[35]&WENB[35]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[35]&!WENB[35]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[34]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[34]&WENB[34]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[34] == 1'b0 && WENB[34] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[34]&!WENB[34]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[34] == 1'b1 && WENB[34] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[34]&WENB[34]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[34]&!WENB[34]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[33]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[33]&WENB[33]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[33] == 1'b0 && WENB[33] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[33]&!WENB[33]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[33] == 1'b1 && WENB[33] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[33]&WENB[33]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[33]&!WENB[33]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[32]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[32]&WENB[32]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[32] == 1'b0 && WENB[32] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[32]&!WENB[32]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[32] == 1'b1 && WENB[32] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[32]&WENB[32]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[32]&!WENB[32]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[31]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[31]&WENB[31]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[31] == 1'b0 && WENB[31] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[31]&!WENB[31]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[31] == 1'b1 && WENB[31] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[31]&WENB[31]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[31]&!WENB[31]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[30]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[30]&WENB[30]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[30] == 1'b0 && WENB[30] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[30]&!WENB[30]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[30] == 1'b1 && WENB[30] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[30]&WENB[30]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[30]&!WENB[30]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[29]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[29]&WENB[29]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[29] == 1'b0 && WENB[29] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[29]&!WENB[29]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[29] == 1'b1 && WENB[29] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[29]&WENB[29]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[29]&!WENB[29]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[28]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[28]&WENB[28]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[28] == 1'b0 && WENB[28] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[28]&!WENB[28]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[28] == 1'b1 && WENB[28] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[28]&WENB[28]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[28]&!WENB[28]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[27]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[27]&WENB[27]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[27] == 1'b0 && WENB[27] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[27]&!WENB[27]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[27] == 1'b1 && WENB[27] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[27]&WENB[27]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[27]&!WENB[27]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[26]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[26]&WENB[26]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[26] == 1'b0 && WENB[26] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[26]&!WENB[26]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[26] == 1'b1 && WENB[26] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[26]&WENB[26]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[26]&!WENB[26]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[25]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[25]&WENB[25]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[25] == 1'b0 && WENB[25] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[25]&!WENB[25]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[25] == 1'b1 && WENB[25] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[25]&WENB[25]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[25]&!WENB[25]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[24]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[24]&WENB[24]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[24] == 1'b0 && WENB[24] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[24]&!WENB[24]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[24] == 1'b1 && WENB[24] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[24]&WENB[24]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[24]&!WENB[24]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[23]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[23]&WENB[23]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[23] == 1'b0 && WENB[23] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[23]&!WENB[23]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[23] == 1'b1 && WENB[23] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[23]&WENB[23]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[23]&!WENB[23]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[22]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[22]&WENB[22]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[22] == 1'b0 && WENB[22] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[22]&!WENB[22]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[22] == 1'b1 && WENB[22] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[22]&WENB[22]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[22]&!WENB[22]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[21]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[21]&WENB[21]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[21] == 1'b0 && WENB[21] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[21]&!WENB[21]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[21] == 1'b1 && WENB[21] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[21]&WENB[21]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[21]&!WENB[21]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[20]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[20]&WENB[20]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[20] == 1'b0 && WENB[20] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[20]&!WENB[20]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[20] == 1'b1 && WENB[20] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[20]&WENB[20]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[20]&!WENB[20]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[19]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[19]&WENB[19]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[19] == 1'b0 && WENB[19] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[19]&!WENB[19]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[19] == 1'b1 && WENB[19] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[19]&WENB[19]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[19]&!WENB[19]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[18]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[18]&WENB[18]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[18] == 1'b0 && WENB[18] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[18]&!WENB[18]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[18] == 1'b1 && WENB[18] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[18]&WENB[18]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[18]&!WENB[18]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[17]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[17]&WENB[17]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[17] == 1'b0 && WENB[17] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[17]&!WENB[17]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[17] == 1'b1 && WENB[17] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[17]&WENB[17]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[17]&!WENB[17]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[16]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[16]&WENB[16]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[16] == 1'b0 && WENB[16] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[16]&!WENB[16]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[16] == 1'b1 && WENB[16] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[16]&WENB[16]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[16]&!WENB[16]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[15]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[15]&WENB[15]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[15] == 1'b0 && WENB[15] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[15]&!WENB[15]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[15] == 1'b1 && WENB[15] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[15]&WENB[15]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[15]&!WENB[15]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[14]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[14]&WENB[14]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[14] == 1'b0 && WENB[14] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[14]&!WENB[14]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[14] == 1'b1 && WENB[14] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[14]&WENB[14]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[14]&!WENB[14]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[13]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[13]&WENB[13]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[13] == 1'b0 && WENB[13] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[13]&!WENB[13]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[13] == 1'b1 && WENB[13] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[13]&WENB[13]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[13]&!WENB[13]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[12]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[12]&WENB[12]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[12] == 1'b0 && WENB[12] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[12]&!WENB[12]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[12] == 1'b1 && WENB[12] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[12]&WENB[12]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[12]&!WENB[12]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[11]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[11]&WENB[11]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[11] == 1'b0 && WENB[11] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[11]&!WENB[11]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[11] == 1'b1 && WENB[11] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[11]&WENB[11]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[11]&!WENB[11]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[10]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[10]&WENB[10]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[10] == 1'b0 && WENB[10] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[10]&!WENB[10]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[10] == 1'b1 && WENB[10] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[10]&WENB[10]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[10]&!WENB[10]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[9]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[9]&WENB[9]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[9] == 1'b0 && WENB[9] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[9]&!WENB[9]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[9] == 1'b1 && WENB[9] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[9]&WENB[9]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[9]&!WENB[9]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[8]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[8]&WENB[8]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[8] == 1'b0 && WENB[8] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[8]&!WENB[8]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[8] == 1'b1 && WENB[8] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[8]&WENB[8]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[8]&!WENB[8]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[7]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[7]&WENB[7]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[7] == 1'b0 && WENB[7] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[7]&!WENB[7]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[7] == 1'b1 && WENB[7] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[7]&WENB[7]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[7]&!WENB[7]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[6]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[6]&WENB[6]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[6] == 1'b0 && WENB[6] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[6]&!WENB[6]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[6] == 1'b1 && WENB[6] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[6]&WENB[6]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[6]&!WENB[6]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[5]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[5]&WENB[5]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[5] == 1'b0 && WENB[5] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[5]&!WENB[5]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[5] == 1'b1 && WENB[5] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[5]&WENB[5]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[5]&!WENB[5]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[4]&WENB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[4] == 1'b0 && WENB[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[4]&!WENB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[4] == 1'b1 && WENB[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[4]&WENB[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[4]&!WENB[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[3]&WENB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[3] == 1'b0 && WENB[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[3]&!WENB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[3] == 1'b1 && WENB[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[3]&WENB[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[3]&!WENB[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[2]&WENB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[2] == 1'b0 && WENB[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[2]&!WENB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[2] == 1'b1 && WENB[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[2]&WENB[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[2]&!WENB[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[1]&WENB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[1] == 1'b0 && WENB[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[1]&!WENB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[1] == 1'b1 && WENB[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[1]&WENB[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[1]&!WENB[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + pin(WENYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[0]&WENB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[0] == 1'b0 && WENB[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.636620, 0.643940, 0.649630, 0.661050, 0.692510, 0.738480, 0.833760", \ + "0.636660, 0.643980, 0.649670, 0.661090, 0.692550, 0.738520, 0.833800", \ + "0.641080, 0.648400, 0.654090, 0.665510, 0.696970, 0.742940, 0.838220", \ + "0.655460, 0.662780, 0.668470, 0.679890, 0.711350, 0.757320, 0.852600", \ + "0.667580, 0.674900, 0.680590, 0.692010, 0.723470, 0.769440, 0.864720", \ + "0.721550, 0.728870, 0.734560, 0.745980, 0.777440, 0.823410, 0.918690", \ + "0.796130, 0.803450, 0.809140, 0.820560, 0.852020, 0.897990, 0.993270" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.524556, 0.531516, 0.537206, 0.548956, 0.579496, 0.627466, 0.722026", \ + "0.525516, 0.532476, 0.538166, 0.549916, 0.580456, 0.628426, 0.722986", \ + "0.529866, 0.536826, 0.542516, 0.554266, 0.584806, 0.632776, 0.727336", \ + "0.540696, 0.547656, 0.553346, 0.565096, 0.595636, 0.643606, 0.738166", \ + "0.556396, 0.563356, 0.569046, 0.580796, 0.611336, 0.659306, 0.753866", \ + "0.609186, 0.616146, 0.621836, 0.633586, 0.664126, 0.712096, 0.806656", \ + "0.683606, 0.690566, 0.696256, 0.708006, 0.738546, 0.786516, 0.881076" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142", \ + "0.031261, 0.037814, 0.043886, 0.059167, 0.105802, 0.191556, 0.364142" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.571250, 0.579080, 0.585530, 0.599700, 0.641940, 0.713800, 0.855460", \ + "0.574100, 0.581930, 0.588380, 0.602550, 0.644790, 0.716650, 0.858310", \ + "0.577860, 0.585690, 0.592140, 0.606310, 0.648550, 0.720410, 0.862070", \ + "0.590960, 0.598790, 0.605240, 0.619410, 0.661650, 0.733510, 0.875170", \ + "0.605540, 0.613370, 0.619820, 0.633990, 0.676230, 0.748090, 0.889750", \ + "0.661710, 0.669540, 0.675990, 0.690160, 0.732400, 0.804260, 0.945920", \ + "0.747590, 0.755420, 0.761870, 0.776040, 0.818280, 0.890140, 1.031800" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.466551, 0.473981, 0.480371, 0.494901, 0.537181, 0.608261, 0.749561", \ + "0.469341, 0.476771, 0.483161, 0.497691, 0.539971, 0.611051, 0.752351", \ + "0.473081, 0.480511, 0.486901, 0.501431, 0.543711, 0.614791, 0.756091", \ + "0.485161, 0.492591, 0.498981, 0.513511, 0.555791, 0.626871, 0.768171", \ + "0.499161, 0.506591, 0.512981, 0.527511, 0.569791, 0.640871, 0.782171", \ + "0.556481, 0.563911, 0.570301, 0.584831, 0.627111, 0.698191, 0.839491", \ + "0.642501, 0.649931, 0.656321, 0.670851, 0.713131, 0.784211, 0.925511" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991", \ + "0.024201, 0.032413, 0.040982, 0.063915, 0.139301, 0.265494, 0.518991" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[0]&!WENB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[0] == 1'b1 && WENB[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.652010, 0.659410, 0.665570, 0.679790, 0.722150, 0.795400, 0.935080", \ + "0.657160, 0.664560, 0.670720, 0.684940, 0.727300, 0.800550, 0.940230", \ + "0.658900, 0.666300, 0.672460, 0.686680, 0.729040, 0.802290, 0.941970", \ + "0.669910, 0.677310, 0.683470, 0.697690, 0.740050, 0.813300, 0.952980", \ + "0.681850, 0.689250, 0.695410, 0.709630, 0.751990, 0.825240, 0.964920", \ + "0.739520, 0.746920, 0.753080, 0.767300, 0.809660, 0.882910, 1.022590", \ + "0.814260, 0.821660, 0.827820, 0.842040, 0.884400, 0.957650, 1.097330" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.520560, 0.528730, 0.534850, 0.549190, 0.591540, 0.662340, 0.801690", \ + "0.526600, 0.534770, 0.540890, 0.555230, 0.597580, 0.668380, 0.807730", \ + "0.527400, 0.535570, 0.541690, 0.556030, 0.598380, 0.669180, 0.808530", \ + "0.539170, 0.547340, 0.553460, 0.567800, 0.610150, 0.680950, 0.820300", \ + "0.550730, 0.558900, 0.565020, 0.579360, 0.621710, 0.692510, 0.831860", \ + "0.606190, 0.614360, 0.620480, 0.634820, 0.677170, 0.747970, 0.887320", \ + "0.682890, 0.691060, 0.697180, 0.711520, 0.753870, 0.824670, 0.964020" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141", \ + "0.024031, 0.032095, 0.040644, 0.064306, 0.138973, 0.265875, 0.520141" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.595480, 0.602710, 0.608580, 0.620650, 0.651000, 0.698770, 0.792650", \ + "0.598920, 0.606150, 0.612020, 0.624090, 0.654440, 0.702210, 0.796090", \ + "0.601840, 0.609070, 0.614940, 0.627010, 0.657360, 0.705130, 0.799010", \ + "0.614840, 0.622070, 0.627940, 0.640010, 0.670360, 0.718130, 0.812010", \ + "0.628370, 0.635600, 0.641470, 0.653540, 0.683890, 0.731660, 0.825540", \ + "0.685700, 0.692930, 0.698800, 0.710870, 0.741220, 0.788990, 0.882870", \ + "0.771150, 0.778380, 0.784250, 0.796320, 0.826670, 0.874440, 0.968320" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.481572, 0.488792, 0.494582, 0.506572, 0.536972, 0.585272, 0.679042", \ + "0.485612, 0.492832, 0.498622, 0.510612, 0.541012, 0.589312, 0.683082", \ + "0.488332, 0.495552, 0.501342, 0.513332, 0.543732, 0.592032, 0.685802", \ + "0.500492, 0.507712, 0.513502, 0.525492, 0.555892, 0.604192, 0.697962", \ + "0.514792, 0.522012, 0.527802, 0.539792, 0.570192, 0.618492, 0.712262", \ + "0.572182, 0.579402, 0.585192, 0.597182, 0.627582, 0.675882, 0.769652", \ + "0.657492, 0.664712, 0.670502, 0.682492, 0.712892, 0.761192, 0.854962" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695", \ + "0.032516, 0.038535, 0.044375, 0.059066, 0.106619, 0.191110, 0.364695" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[0]&WENB[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[0]&!WENB[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107, 0.004107", \ + "0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111, 0.004111", \ + "0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115, 0.004115", \ + "0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120, 0.004120", \ + "0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124, 0.004124", \ + "0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128, 0.004128", \ + "0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132, 0.004132" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282, 0.003282", \ + "0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286, 0.003286", \ + "0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331, 0.003331", \ + "0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334, 0.003334", \ + "0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338, 0.003338", \ + "0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341, 0.003341", \ + "0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344, 0.003344" \ + ); + } + } + } + } + bus(AYB) { + bus_type : rf2_32x128_wm1_AYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : AB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.160450, 0.166290, 0.171860, 0.183820, 0.213150, 0.258660, 0.349430", \ + "0.162600, 0.168420, 0.173720, 0.186190, 0.215760, 0.262170, 0.351380", \ + "0.169770, 0.175330, 0.180350, 0.191160, 0.220980, 0.267820, 0.368550", \ + "0.177770, 0.183740, 0.188540, 0.199090, 0.228780, 0.274010, 0.369640", \ + "0.188120, 0.193910, 0.199200, 0.210480, 0.240190, 0.284550, 0.380910", \ + "0.236870, 0.245810, 0.250910, 0.257970, 0.290460, 0.336930, 0.426040", \ + "0.313450, 0.321680, 0.327280, 0.335570, 0.364430, 0.409710, 0.508570" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.144405, 0.150245, 0.155815, 0.167775, 0.197105, 0.242615, 0.333385", \ + "0.146555, 0.152375, 0.157675, 0.170145, 0.199715, 0.246125, 0.335335", \ + "0.153725, 0.159285, 0.164305, 0.175115, 0.204935, 0.251775, 0.352505", \ + "0.161725, 0.167695, 0.172495, 0.183045, 0.212735, 0.257965, 0.353595", \ + "0.172075, 0.177865, 0.183155, 0.194435, 0.224145, 0.268505, 0.364865", \ + "0.220825, 0.229765, 0.234865, 0.241925, 0.274415, 0.320885, 0.409995", \ + "0.297405, 0.305635, 0.311235, 0.319525, 0.348385, 0.393665, 0.492525" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.132370, 0.139550, 0.145720, 0.159120, 0.196700, 0.262890, 0.398870", \ + "0.135430, 0.142360, 0.148750, 0.162690, 0.200150, 0.266740, 0.402090", \ + "0.139690, 0.146690, 0.152510, 0.166320, 0.204390, 0.271670, 0.408060", \ + "0.148490, 0.155710, 0.161860, 0.175250, 0.212960, 0.279160, 0.408950", \ + "0.160770, 0.167740, 0.174250, 0.188070, 0.225670, 0.292190, 0.428720", \ + "0.210400, 0.217430, 0.223560, 0.237000, 0.275240, 0.342070, 0.469060", \ + "0.297950, 0.304990, 0.311090, 0.321210, 0.359500, 0.423860, 0.561030" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119133, 0.126313, 0.132483, 0.145883, 0.183463, 0.249653, 0.385633", \ + "0.122193, 0.129123, 0.135513, 0.149453, 0.186913, 0.253503, 0.388853", \ + "0.126453, 0.133453, 0.139273, 0.153083, 0.191153, 0.258433, 0.394823", \ + "0.135253, 0.142473, 0.148623, 0.162013, 0.199723, 0.265923, 0.395713", \ + "0.147533, 0.154503, 0.161013, 0.174833, 0.212433, 0.278953, 0.415483", \ + "0.197163, 0.204193, 0.210323, 0.223763, 0.262003, 0.328833, 0.455823", \ + "0.284713, 0.291753, 0.297853, 0.307973, 0.346263, 0.410623, 0.547793" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + } + timing() { + related_pin : TAB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.167330, 0.176000, 0.180700, 0.189560, 0.218620, 0.264940, 0.361440", \ + "0.170800, 0.177520, 0.182660, 0.192830, 0.224750, 0.273640, 0.368100", \ + "0.175630, 0.181320, 0.186470, 0.199050, 0.229500, 0.275840, 0.365310", \ + "0.184350, 0.190390, 0.195150, 0.206210, 0.236100, 0.280480, 0.376650", \ + "0.194150, 0.199800, 0.204750, 0.216140, 0.245480, 0.292070, 0.392050", \ + "0.241420, 0.247650, 0.252640, 0.263860, 0.292630, 0.339380, 0.436210", \ + "0.319150, 0.325740, 0.331040, 0.342090, 0.371060, 0.416440, 0.512720" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150597, 0.159267, 0.163967, 0.172827, 0.201887, 0.248207, 0.344707", \ + "0.154067, 0.160787, 0.165927, 0.176097, 0.208017, 0.256907, 0.351367", \ + "0.158897, 0.164587, 0.169737, 0.182317, 0.212767, 0.259107, 0.348577", \ + "0.167617, 0.173657, 0.178417, 0.189477, 0.219367, 0.263747, 0.359917", \ + "0.177417, 0.183067, 0.188017, 0.199407, 0.228747, 0.275337, 0.375317", \ + "0.224687, 0.230917, 0.235907, 0.247127, 0.275897, 0.322647, 0.419477", \ + "0.302417, 0.309007, 0.314307, 0.325357, 0.354327, 0.399707, 0.495987" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136300, 0.143250, 0.149260, 0.163230, 0.200410, 0.266090, 0.397890", \ + "0.137950, 0.145100, 0.151010, 0.164920, 0.202600, 0.269010, 0.399340", \ + "0.143110, 0.150640, 0.156730, 0.170010, 0.207800, 0.273940, 0.408430", \ + "0.153970, 0.161120, 0.167290, 0.180830, 0.219020, 0.285820, 0.412470", \ + "0.161940, 0.169320, 0.175410, 0.188820, 0.226450, 0.292640, 0.422250", \ + "0.212890, 0.220470, 0.226550, 0.240120, 0.277680, 0.344060, 0.473760", \ + "0.301430, 0.308360, 0.314250, 0.323650, 0.362180, 0.429450, 0.565830" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.122670, 0.129620, 0.135630, 0.149600, 0.186780, 0.252460, 0.384260", \ + "0.124320, 0.131470, 0.137380, 0.151290, 0.188970, 0.255380, 0.385710", \ + "0.129480, 0.137010, 0.143100, 0.156380, 0.194170, 0.260310, 0.394800", \ + "0.140340, 0.147490, 0.153660, 0.167200, 0.205390, 0.272190, 0.398840", \ + "0.148310, 0.155690, 0.161780, 0.175190, 0.212820, 0.279010, 0.408620", \ + "0.199260, 0.206840, 0.212920, 0.226490, 0.264050, 0.330430, 0.460130", \ + "0.287800, 0.294730, 0.300620, 0.310020, 0.348550, 0.415820, 0.552200" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.226010, 0.232220, 0.237650, 0.248360, 0.276250, 0.322170, 0.413070", \ + "0.228020, 0.234230, 0.239660, 0.250370, 0.278260, 0.324180, 0.415080", \ + "0.232600, 0.238810, 0.244240, 0.254950, 0.282840, 0.328760, 0.419660", \ + "0.242660, 0.248870, 0.254300, 0.265010, 0.292900, 0.338820, 0.429720", \ + "0.255820, 0.262030, 0.267460, 0.278170, 0.306060, 0.351980, 0.442880", \ + "0.306540, 0.312750, 0.318180, 0.328890, 0.356780, 0.402700, 0.493600", \ + "0.380270, 0.386480, 0.391910, 0.402620, 0.430510, 0.476430, 0.567330" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.201402, 0.207612, 0.213002, 0.223722, 0.251832, 0.298002, 0.389322", \ + "0.203462, 0.209672, 0.215062, 0.225782, 0.253892, 0.300062, 0.391382", \ + "0.207942, 0.214152, 0.219542, 0.230262, 0.258372, 0.304542, 0.395862", \ + "0.218112, 0.224322, 0.229712, 0.240432, 0.268542, 0.314712, 0.406032", \ + "0.231132, 0.237342, 0.242732, 0.253452, 0.281562, 0.327732, 0.419052", \ + "0.281872, 0.288082, 0.293472, 0.304192, 0.332302, 0.378472, 0.469792", \ + "0.355662, 0.361872, 0.367262, 0.377982, 0.406092, 0.452262, 0.543582" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.306250, 0.314520, 0.319750, 0.333550, 0.372930, 0.439000, 0.570540", \ + "0.308510, 0.316780, 0.322010, 0.335810, 0.375190, 0.441260, 0.572800", \ + "0.313330, 0.321600, 0.326830, 0.340630, 0.380010, 0.446080, 0.577620", \ + "0.324380, 0.332650, 0.337880, 0.351680, 0.391060, 0.457130, 0.588670", \ + "0.339620, 0.347890, 0.353120, 0.366920, 0.406300, 0.472370, 0.603910", \ + "0.396320, 0.404590, 0.409820, 0.423620, 0.463000, 0.529070, 0.660610", \ + "0.478960, 0.487230, 0.492460, 0.506260, 0.545640, 0.611710, 0.743250" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.272358, 0.280348, 0.285468, 0.298648, 0.336918, 0.400698, 0.527808", \ + "0.274898, 0.282888, 0.288008, 0.301188, 0.339458, 0.403238, 0.530348", \ + "0.279608, 0.287598, 0.292718, 0.305898, 0.344168, 0.407948, 0.535058", \ + "0.290528, 0.298518, 0.303638, 0.316818, 0.355088, 0.418868, 0.545978", \ + "0.305918, 0.313908, 0.319028, 0.332208, 0.370478, 0.434258, 0.561368", \ + "0.362608, 0.370598, 0.375718, 0.388898, 0.427168, 0.490948, 0.618058", \ + "0.445298, 0.453288, 0.458408, 0.471588, 0.509858, 0.573638, 0.700748" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + } + internal_power() { + related_pin : AB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TAB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003623, 0.003626, 0.003630, 0.003634, 0.003637, 0.003641, 0.003645", \ + "0.003722, 0.003725, 0.003729, 0.003733, 0.003737, 0.003740, 0.003744", \ + "0.004425, 0.004429, 0.004433, 0.004438, 0.004442, 0.004447, 0.004451", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.005813, 0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848", \ + "0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854", \ + "0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854, 0.005860" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004789, 0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817", \ + "0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822", \ + "0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832, 0.004837", \ + "0.004981, 0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011", \ + "0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011, 0.005016" \ + ); + } + } + pin(AYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.532380, 0.538520, 0.543550, 0.554900, 0.583740, 0.629930, 0.721200", \ + "0.534090, 0.540230, 0.545260, 0.556610, 0.585450, 0.631640, 0.722910", \ + "0.538540, 0.544680, 0.549710, 0.561060, 0.589900, 0.636090, 0.727360", \ + "0.551120, 0.557260, 0.562290, 0.573640, 0.602480, 0.648670, 0.739940", \ + "0.565620, 0.571760, 0.576790, 0.588140, 0.616980, 0.663170, 0.754440", \ + "0.617180, 0.623320, 0.628350, 0.639700, 0.668540, 0.714730, 0.806000", \ + "0.692730, 0.698870, 0.703900, 0.715250, 0.744090, 0.790280, 0.881550" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.474723, 0.480773, 0.485643, 0.497113, 0.525623, 0.571513, 0.661903", \ + "0.476653, 0.482703, 0.487573, 0.499043, 0.527553, 0.573443, 0.663833", \ + "0.481193, 0.487243, 0.492113, 0.503583, 0.532093, 0.577983, 0.668373", \ + "0.493543, 0.499593, 0.504463, 0.515933, 0.544443, 0.590333, 0.680723", \ + "0.508163, 0.514213, 0.519083, 0.530553, 0.559063, 0.604953, 0.695343", \ + "0.559833, 0.565883, 0.570753, 0.582223, 0.610733, 0.656623, 0.747013", \ + "0.635153, 0.641203, 0.646073, 0.657543, 0.686053, 0.731943, 0.822333" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.436910, 0.444430, 0.450720, 0.464570, 0.504270, 0.570090, 0.701450", \ + "0.439250, 0.446770, 0.453060, 0.466910, 0.506610, 0.572430, 0.703790", \ + "0.443290, 0.450810, 0.457100, 0.470950, 0.510650, 0.576470, 0.707830", \ + "0.456340, 0.463860, 0.470150, 0.484000, 0.523700, 0.589520, 0.720880", \ + "0.470690, 0.478210, 0.484500, 0.498350, 0.538050, 0.603870, 0.735230", \ + "0.528150, 0.535670, 0.541960, 0.555810, 0.595510, 0.661330, 0.792690", \ + "0.612080, 0.619600, 0.625890, 0.639740, 0.679440, 0.745260, 0.876620" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.385947, 0.392947, 0.398907, 0.412177, 0.450357, 0.513987, 0.640967", \ + "0.388657, 0.395657, 0.401617, 0.414887, 0.453067, 0.516697, 0.643677", \ + "0.392547, 0.399547, 0.405507, 0.418777, 0.456957, 0.520587, 0.647567", \ + "0.405597, 0.412597, 0.418557, 0.431827, 0.470007, 0.533637, 0.660617", \ + "0.419927, 0.426927, 0.432887, 0.446157, 0.484337, 0.547967, 0.674947", \ + "0.477077, 0.484077, 0.490037, 0.503307, 0.541487, 0.605117, 0.732097", \ + "0.561117, 0.568117, 0.574077, 0.587347, 0.625527, 0.689157, 0.816137" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.487880, 0.495400, 0.501650, 0.515510, 0.555190, 0.622570, 0.753990", \ + "0.492870, 0.500390, 0.506640, 0.520500, 0.560180, 0.627560, 0.758980", \ + "0.495310, 0.502830, 0.509080, 0.522940, 0.562620, 0.630000, 0.761420", \ + "0.505370, 0.512890, 0.519140, 0.533000, 0.572680, 0.640060, 0.771480", \ + "0.518700, 0.526220, 0.532470, 0.546330, 0.586010, 0.653390, 0.784810", \ + "0.576060, 0.583580, 0.589830, 0.603690, 0.643370, 0.710750, 0.842170", \ + "0.650180, 0.657700, 0.663950, 0.677810, 0.717490, 0.784870, 0.916290" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.429777, 0.436827, 0.442667, 0.456017, 0.494107, 0.559047, 0.686067", \ + "0.434767, 0.441817, 0.447657, 0.461007, 0.499097, 0.564037, 0.691057", \ + "0.436897, 0.443947, 0.449787, 0.463137, 0.501227, 0.566167, 0.693187", \ + "0.447337, 0.454387, 0.460227, 0.473577, 0.511667, 0.576607, 0.703627", \ + "0.460357, 0.467407, 0.473247, 0.486597, 0.524687, 0.589627, 0.716647", \ + "0.517907, 0.524957, 0.530797, 0.544147, 0.582237, 0.647177, 0.774197", \ + "0.591857, 0.598907, 0.604747, 0.618097, 0.656187, 0.721127, 0.848147" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.467700, 0.473800, 0.478870, 0.489750, 0.518580, 0.564870, 0.656650", \ + "0.471180, 0.477280, 0.482350, 0.493230, 0.522060, 0.568350, 0.660130", \ + "0.475040, 0.481140, 0.486210, 0.497090, 0.525920, 0.572210, 0.663990", \ + "0.486860, 0.492960, 0.498030, 0.508910, 0.537740, 0.584030, 0.675810", \ + "0.500740, 0.506840, 0.511910, 0.522790, 0.551620, 0.597910, 0.689690", \ + "0.558720, 0.564820, 0.569890, 0.580770, 0.609600, 0.655890, 0.747670", \ + "0.644060, 0.650160, 0.655230, 0.666110, 0.694940, 0.741230, 0.833010" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.416493, 0.422503, 0.427453, 0.438163, 0.466683, 0.512543, 0.603803", \ + "0.419743, 0.425753, 0.430703, 0.441413, 0.469933, 0.515793, 0.607053", \ + "0.423633, 0.429643, 0.434593, 0.445303, 0.473823, 0.519683, 0.610943", \ + "0.435493, 0.441503, 0.446453, 0.457163, 0.485683, 0.531543, 0.622803", \ + "0.449343, 0.455353, 0.460303, 0.471013, 0.499533, 0.545393, 0.636653", \ + "0.507563, 0.513573, 0.518523, 0.529233, 0.557753, 0.603613, 0.694873", \ + "0.592853, 0.598863, 0.603813, 0.614523, 0.643043, 0.688903, 0.780163" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + pin(AYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.532380, 0.538520, 0.543550, 0.554900, 0.583740, 0.629930, 0.721200", \ + "0.534090, 0.540230, 0.545260, 0.556610, 0.585450, 0.631640, 0.722910", \ + "0.538540, 0.544680, 0.549710, 0.561060, 0.589900, 0.636090, 0.727360", \ + "0.551120, 0.557260, 0.562290, 0.573640, 0.602480, 0.648670, 0.739940", \ + "0.565620, 0.571760, 0.576790, 0.588140, 0.616980, 0.663170, 0.754440", \ + "0.617180, 0.623320, 0.628350, 0.639700, 0.668540, 0.714730, 0.806000", \ + "0.692730, 0.698870, 0.703900, 0.715250, 0.744090, 0.790280, 0.881550" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.474723, 0.480773, 0.485643, 0.497113, 0.525623, 0.571513, 0.661903", \ + "0.476653, 0.482703, 0.487573, 0.499043, 0.527553, 0.573443, 0.663833", \ + "0.481193, 0.487243, 0.492113, 0.503583, 0.532093, 0.577983, 0.668373", \ + "0.493543, 0.499593, 0.504463, 0.515933, 0.544443, 0.590333, 0.680723", \ + "0.508163, 0.514213, 0.519083, 0.530553, 0.559063, 0.604953, 0.695343", \ + "0.559833, 0.565883, 0.570753, 0.582223, 0.610733, 0.656623, 0.747013", \ + "0.635153, 0.641203, 0.646073, 0.657543, 0.686053, 0.731943, 0.822333" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.436910, 0.444430, 0.450720, 0.464570, 0.504270, 0.570090, 0.701450", \ + "0.439250, 0.446770, 0.453060, 0.466910, 0.506610, 0.572430, 0.703790", \ + "0.443290, 0.450810, 0.457100, 0.470950, 0.510650, 0.576470, 0.707830", \ + "0.456340, 0.463860, 0.470150, 0.484000, 0.523700, 0.589520, 0.720880", \ + "0.470690, 0.478210, 0.484500, 0.498350, 0.538050, 0.603870, 0.735230", \ + "0.528150, 0.535670, 0.541960, 0.555810, 0.595510, 0.661330, 0.792690", \ + "0.612080, 0.619600, 0.625890, 0.639740, 0.679440, 0.745260, 0.876620" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.385947, 0.392947, 0.398907, 0.412177, 0.450357, 0.513987, 0.640967", \ + "0.388657, 0.395657, 0.401617, 0.414887, 0.453067, 0.516697, 0.643677", \ + "0.392547, 0.399547, 0.405507, 0.418777, 0.456957, 0.520587, 0.647567", \ + "0.405597, 0.412597, 0.418557, 0.431827, 0.470007, 0.533637, 0.660617", \ + "0.419927, 0.426927, 0.432887, 0.446157, 0.484337, 0.547967, 0.674947", \ + "0.477077, 0.484077, 0.490037, 0.503307, 0.541487, 0.605117, 0.732097", \ + "0.561117, 0.568117, 0.574077, 0.587347, 0.625527, 0.689157, 0.816137" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.487880, 0.495400, 0.501650, 0.515510, 0.555190, 0.622570, 0.753990", \ + "0.492870, 0.500390, 0.506640, 0.520500, 0.560180, 0.627560, 0.758980", \ + "0.495310, 0.502830, 0.509080, 0.522940, 0.562620, 0.630000, 0.761420", \ + "0.505370, 0.512890, 0.519140, 0.533000, 0.572680, 0.640060, 0.771480", \ + "0.518700, 0.526220, 0.532470, 0.546330, 0.586010, 0.653390, 0.784810", \ + "0.576060, 0.583580, 0.589830, 0.603690, 0.643370, 0.710750, 0.842170", \ + "0.650180, 0.657700, 0.663950, 0.677810, 0.717490, 0.784870, 0.916290" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.429777, 0.436827, 0.442667, 0.456017, 0.494107, 0.559047, 0.686067", \ + "0.434767, 0.441817, 0.447657, 0.461007, 0.499097, 0.564037, 0.691057", \ + "0.436897, 0.443947, 0.449787, 0.463137, 0.501227, 0.566167, 0.693187", \ + "0.447337, 0.454387, 0.460227, 0.473577, 0.511667, 0.576607, 0.703627", \ + "0.460357, 0.467407, 0.473247, 0.486597, 0.524687, 0.589627, 0.716647", \ + "0.517907, 0.524957, 0.530797, 0.544147, 0.582237, 0.647177, 0.774197", \ + "0.591857, 0.598907, 0.604747, 0.618097, 0.656187, 0.721127, 0.848147" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.467700, 0.473800, 0.478870, 0.489750, 0.518580, 0.564870, 0.656650", \ + "0.471180, 0.477280, 0.482350, 0.493230, 0.522060, 0.568350, 0.660130", \ + "0.475040, 0.481140, 0.486210, 0.497090, 0.525920, 0.572210, 0.663990", \ + "0.486860, 0.492960, 0.498030, 0.508910, 0.537740, 0.584030, 0.675810", \ + "0.500740, 0.506840, 0.511910, 0.522790, 0.551620, 0.597910, 0.689690", \ + "0.558720, 0.564820, 0.569890, 0.580770, 0.609600, 0.655890, 0.747670", \ + "0.644060, 0.650160, 0.655230, 0.666110, 0.694940, 0.741230, 0.833010" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.416493, 0.422503, 0.427453, 0.438163, 0.466683, 0.512543, 0.603803", \ + "0.419743, 0.425753, 0.430703, 0.441413, 0.469933, 0.515793, 0.607053", \ + "0.423633, 0.429643, 0.434593, 0.445303, 0.473823, 0.519683, 0.610943", \ + "0.435493, 0.441503, 0.446453, 0.457163, 0.485683, 0.531543, 0.622803", \ + "0.449343, 0.455353, 0.460303, 0.471013, 0.499533, 0.545393, 0.636653", \ + "0.507563, 0.513573, 0.518523, 0.529233, 0.557753, 0.603613, 0.694873", \ + "0.592853, 0.598863, 0.603813, 0.614523, 0.643043, 0.688903, 0.780163" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + pin(AYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.532380, 0.538520, 0.543550, 0.554900, 0.583740, 0.629930, 0.721200", \ + "0.534090, 0.540230, 0.545260, 0.556610, 0.585450, 0.631640, 0.722910", \ + "0.538540, 0.544680, 0.549710, 0.561060, 0.589900, 0.636090, 0.727360", \ + "0.551120, 0.557260, 0.562290, 0.573640, 0.602480, 0.648670, 0.739940", \ + "0.565620, 0.571760, 0.576790, 0.588140, 0.616980, 0.663170, 0.754440", \ + "0.617180, 0.623320, 0.628350, 0.639700, 0.668540, 0.714730, 0.806000", \ + "0.692730, 0.698870, 0.703900, 0.715250, 0.744090, 0.790280, 0.881550" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.474723, 0.480773, 0.485643, 0.497113, 0.525623, 0.571513, 0.661903", \ + "0.476653, 0.482703, 0.487573, 0.499043, 0.527553, 0.573443, 0.663833", \ + "0.481193, 0.487243, 0.492113, 0.503583, 0.532093, 0.577983, 0.668373", \ + "0.493543, 0.499593, 0.504463, 0.515933, 0.544443, 0.590333, 0.680723", \ + "0.508163, 0.514213, 0.519083, 0.530553, 0.559063, 0.604953, 0.695343", \ + "0.559833, 0.565883, 0.570753, 0.582223, 0.610733, 0.656623, 0.747013", \ + "0.635153, 0.641203, 0.646073, 0.657543, 0.686053, 0.731943, 0.822333" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.436910, 0.444430, 0.450720, 0.464570, 0.504270, 0.570090, 0.701450", \ + "0.439250, 0.446770, 0.453060, 0.466910, 0.506610, 0.572430, 0.703790", \ + "0.443290, 0.450810, 0.457100, 0.470950, 0.510650, 0.576470, 0.707830", \ + "0.456340, 0.463860, 0.470150, 0.484000, 0.523700, 0.589520, 0.720880", \ + "0.470690, 0.478210, 0.484500, 0.498350, 0.538050, 0.603870, 0.735230", \ + "0.528150, 0.535670, 0.541960, 0.555810, 0.595510, 0.661330, 0.792690", \ + "0.612080, 0.619600, 0.625890, 0.639740, 0.679440, 0.745260, 0.876620" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.385947, 0.392947, 0.398907, 0.412177, 0.450357, 0.513987, 0.640967", \ + "0.388657, 0.395657, 0.401617, 0.414887, 0.453067, 0.516697, 0.643677", \ + "0.392547, 0.399547, 0.405507, 0.418777, 0.456957, 0.520587, 0.647567", \ + "0.405597, 0.412597, 0.418557, 0.431827, 0.470007, 0.533637, 0.660617", \ + "0.419927, 0.426927, 0.432887, 0.446157, 0.484337, 0.547967, 0.674947", \ + "0.477077, 0.484077, 0.490037, 0.503307, 0.541487, 0.605117, 0.732097", \ + "0.561117, 0.568117, 0.574077, 0.587347, 0.625527, 0.689157, 0.816137" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.487880, 0.495400, 0.501650, 0.515510, 0.555190, 0.622570, 0.753990", \ + "0.492870, 0.500390, 0.506640, 0.520500, 0.560180, 0.627560, 0.758980", \ + "0.495310, 0.502830, 0.509080, 0.522940, 0.562620, 0.630000, 0.761420", \ + "0.505370, 0.512890, 0.519140, 0.533000, 0.572680, 0.640060, 0.771480", \ + "0.518700, 0.526220, 0.532470, 0.546330, 0.586010, 0.653390, 0.784810", \ + "0.576060, 0.583580, 0.589830, 0.603690, 0.643370, 0.710750, 0.842170", \ + "0.650180, 0.657700, 0.663950, 0.677810, 0.717490, 0.784870, 0.916290" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.429777, 0.436827, 0.442667, 0.456017, 0.494107, 0.559047, 0.686067", \ + "0.434767, 0.441817, 0.447657, 0.461007, 0.499097, 0.564037, 0.691057", \ + "0.436897, 0.443947, 0.449787, 0.463137, 0.501227, 0.566167, 0.693187", \ + "0.447337, 0.454387, 0.460227, 0.473577, 0.511667, 0.576607, 0.703627", \ + "0.460357, 0.467407, 0.473247, 0.486597, 0.524687, 0.589627, 0.716647", \ + "0.517907, 0.524957, 0.530797, 0.544147, 0.582237, 0.647177, 0.774197", \ + "0.591857, 0.598907, 0.604747, 0.618097, 0.656187, 0.721127, 0.848147" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.467700, 0.473800, 0.478870, 0.489750, 0.518580, 0.564870, 0.656650", \ + "0.471180, 0.477280, 0.482350, 0.493230, 0.522060, 0.568350, 0.660130", \ + "0.475040, 0.481140, 0.486210, 0.497090, 0.525920, 0.572210, 0.663990", \ + "0.486860, 0.492960, 0.498030, 0.508910, 0.537740, 0.584030, 0.675810", \ + "0.500740, 0.506840, 0.511910, 0.522790, 0.551620, 0.597910, 0.689690", \ + "0.558720, 0.564820, 0.569890, 0.580770, 0.609600, 0.655890, 0.747670", \ + "0.644060, 0.650160, 0.655230, 0.666110, 0.694940, 0.741230, 0.833010" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.416493, 0.422503, 0.427453, 0.438163, 0.466683, 0.512543, 0.603803", \ + "0.419743, 0.425753, 0.430703, 0.441413, 0.469933, 0.515793, 0.607053", \ + "0.423633, 0.429643, 0.434593, 0.445303, 0.473823, 0.519683, 0.610943", \ + "0.435493, 0.441503, 0.446453, 0.457163, 0.485683, 0.531543, 0.622803", \ + "0.449343, 0.455353, 0.460303, 0.471013, 0.499533, 0.545393, 0.636653", \ + "0.507563, 0.513573, 0.518523, 0.529233, 0.557753, 0.603613, 0.694873", \ + "0.592853, 0.598863, 0.603813, 0.614523, 0.643043, 0.688903, 0.780163" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + pin(AYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.532380, 0.538520, 0.543550, 0.554900, 0.583740, 0.629930, 0.721200", \ + "0.534090, 0.540230, 0.545260, 0.556610, 0.585450, 0.631640, 0.722910", \ + "0.538540, 0.544680, 0.549710, 0.561060, 0.589900, 0.636090, 0.727360", \ + "0.551120, 0.557260, 0.562290, 0.573640, 0.602480, 0.648670, 0.739940", \ + "0.565620, 0.571760, 0.576790, 0.588140, 0.616980, 0.663170, 0.754440", \ + "0.617180, 0.623320, 0.628350, 0.639700, 0.668540, 0.714730, 0.806000", \ + "0.692730, 0.698870, 0.703900, 0.715250, 0.744090, 0.790280, 0.881550" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.474723, 0.480773, 0.485643, 0.497113, 0.525623, 0.571513, 0.661903", \ + "0.476653, 0.482703, 0.487573, 0.499043, 0.527553, 0.573443, 0.663833", \ + "0.481193, 0.487243, 0.492113, 0.503583, 0.532093, 0.577983, 0.668373", \ + "0.493543, 0.499593, 0.504463, 0.515933, 0.544443, 0.590333, 0.680723", \ + "0.508163, 0.514213, 0.519083, 0.530553, 0.559063, 0.604953, 0.695343", \ + "0.559833, 0.565883, 0.570753, 0.582223, 0.610733, 0.656623, 0.747013", \ + "0.635153, 0.641203, 0.646073, 0.657543, 0.686053, 0.731943, 0.822333" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.436910, 0.444430, 0.450720, 0.464570, 0.504270, 0.570090, 0.701450", \ + "0.439250, 0.446770, 0.453060, 0.466910, 0.506610, 0.572430, 0.703790", \ + "0.443290, 0.450810, 0.457100, 0.470950, 0.510650, 0.576470, 0.707830", \ + "0.456340, 0.463860, 0.470150, 0.484000, 0.523700, 0.589520, 0.720880", \ + "0.470690, 0.478210, 0.484500, 0.498350, 0.538050, 0.603870, 0.735230", \ + "0.528150, 0.535670, 0.541960, 0.555810, 0.595510, 0.661330, 0.792690", \ + "0.612080, 0.619600, 0.625890, 0.639740, 0.679440, 0.745260, 0.876620" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.385947, 0.392947, 0.398907, 0.412177, 0.450357, 0.513987, 0.640967", \ + "0.388657, 0.395657, 0.401617, 0.414887, 0.453067, 0.516697, 0.643677", \ + "0.392547, 0.399547, 0.405507, 0.418777, 0.456957, 0.520587, 0.647567", \ + "0.405597, 0.412597, 0.418557, 0.431827, 0.470007, 0.533637, 0.660617", \ + "0.419927, 0.426927, 0.432887, 0.446157, 0.484337, 0.547967, 0.674947", \ + "0.477077, 0.484077, 0.490037, 0.503307, 0.541487, 0.605117, 0.732097", \ + "0.561117, 0.568117, 0.574077, 0.587347, 0.625527, 0.689157, 0.816137" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.487880, 0.495400, 0.501650, 0.515510, 0.555190, 0.622570, 0.753990", \ + "0.492870, 0.500390, 0.506640, 0.520500, 0.560180, 0.627560, 0.758980", \ + "0.495310, 0.502830, 0.509080, 0.522940, 0.562620, 0.630000, 0.761420", \ + "0.505370, 0.512890, 0.519140, 0.533000, 0.572680, 0.640060, 0.771480", \ + "0.518700, 0.526220, 0.532470, 0.546330, 0.586010, 0.653390, 0.784810", \ + "0.576060, 0.583580, 0.589830, 0.603690, 0.643370, 0.710750, 0.842170", \ + "0.650180, 0.657700, 0.663950, 0.677810, 0.717490, 0.784870, 0.916290" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.429777, 0.436827, 0.442667, 0.456017, 0.494107, 0.559047, 0.686067", \ + "0.434767, 0.441817, 0.447657, 0.461007, 0.499097, 0.564037, 0.691057", \ + "0.436897, 0.443947, 0.449787, 0.463137, 0.501227, 0.566167, 0.693187", \ + "0.447337, 0.454387, 0.460227, 0.473577, 0.511667, 0.576607, 0.703627", \ + "0.460357, 0.467407, 0.473247, 0.486597, 0.524687, 0.589627, 0.716647", \ + "0.517907, 0.524957, 0.530797, 0.544147, 0.582237, 0.647177, 0.774197", \ + "0.591857, 0.598907, 0.604747, 0.618097, 0.656187, 0.721127, 0.848147" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.467700, 0.473800, 0.478870, 0.489750, 0.518580, 0.564870, 0.656650", \ + "0.471180, 0.477280, 0.482350, 0.493230, 0.522060, 0.568350, 0.660130", \ + "0.475040, 0.481140, 0.486210, 0.497090, 0.525920, 0.572210, 0.663990", \ + "0.486860, 0.492960, 0.498030, 0.508910, 0.537740, 0.584030, 0.675810", \ + "0.500740, 0.506840, 0.511910, 0.522790, 0.551620, 0.597910, 0.689690", \ + "0.558720, 0.564820, 0.569890, 0.580770, 0.609600, 0.655890, 0.747670", \ + "0.644060, 0.650160, 0.655230, 0.666110, 0.694940, 0.741230, 0.833010" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.416493, 0.422503, 0.427453, 0.438163, 0.466683, 0.512543, 0.603803", \ + "0.419743, 0.425753, 0.430703, 0.441413, 0.469933, 0.515793, 0.607053", \ + "0.423633, 0.429643, 0.434593, 0.445303, 0.473823, 0.519683, 0.610943", \ + "0.435493, 0.441503, 0.446453, 0.457163, 0.485683, 0.531543, 0.622803", \ + "0.449343, 0.455353, 0.460303, 0.471013, 0.499533, 0.545393, 0.636653", \ + "0.507563, 0.513573, 0.518523, 0.529233, 0.557753, 0.603613, 0.694873", \ + "0.592853, 0.598863, 0.603813, 0.614523, 0.643043, 0.688903, 0.780163" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + pin(AYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.532380, 0.538520, 0.543550, 0.554900, 0.583740, 0.629930, 0.721200", \ + "0.534090, 0.540230, 0.545260, 0.556610, 0.585450, 0.631640, 0.722910", \ + "0.538540, 0.544680, 0.549710, 0.561060, 0.589900, 0.636090, 0.727360", \ + "0.551120, 0.557260, 0.562290, 0.573640, 0.602480, 0.648670, 0.739940", \ + "0.565620, 0.571760, 0.576790, 0.588140, 0.616980, 0.663170, 0.754440", \ + "0.617180, 0.623320, 0.628350, 0.639700, 0.668540, 0.714730, 0.806000", \ + "0.692730, 0.698870, 0.703900, 0.715250, 0.744090, 0.790280, 0.881550" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.474723, 0.480773, 0.485643, 0.497113, 0.525623, 0.571513, 0.661903", \ + "0.476653, 0.482703, 0.487573, 0.499043, 0.527553, 0.573443, 0.663833", \ + "0.481193, 0.487243, 0.492113, 0.503583, 0.532093, 0.577983, 0.668373", \ + "0.493543, 0.499593, 0.504463, 0.515933, 0.544443, 0.590333, 0.680723", \ + "0.508163, 0.514213, 0.519083, 0.530553, 0.559063, 0.604953, 0.695343", \ + "0.559833, 0.565883, 0.570753, 0.582223, 0.610733, 0.656623, 0.747013", \ + "0.635153, 0.641203, 0.646073, 0.657543, 0.686053, 0.731943, 0.822333" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.436910, 0.444430, 0.450720, 0.464570, 0.504270, 0.570090, 0.701450", \ + "0.439250, 0.446770, 0.453060, 0.466910, 0.506610, 0.572430, 0.703790", \ + "0.443290, 0.450810, 0.457100, 0.470950, 0.510650, 0.576470, 0.707830", \ + "0.456340, 0.463860, 0.470150, 0.484000, 0.523700, 0.589520, 0.720880", \ + "0.470690, 0.478210, 0.484500, 0.498350, 0.538050, 0.603870, 0.735230", \ + "0.528150, 0.535670, 0.541960, 0.555810, 0.595510, 0.661330, 0.792690", \ + "0.612080, 0.619600, 0.625890, 0.639740, 0.679440, 0.745260, 0.876620" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.385947, 0.392947, 0.398907, 0.412177, 0.450357, 0.513987, 0.640967", \ + "0.388657, 0.395657, 0.401617, 0.414887, 0.453067, 0.516697, 0.643677", \ + "0.392547, 0.399547, 0.405507, 0.418777, 0.456957, 0.520587, 0.647567", \ + "0.405597, 0.412597, 0.418557, 0.431827, 0.470007, 0.533637, 0.660617", \ + "0.419927, 0.426927, 0.432887, 0.446157, 0.484337, 0.547967, 0.674947", \ + "0.477077, 0.484077, 0.490037, 0.503307, 0.541487, 0.605117, 0.732097", \ + "0.561117, 0.568117, 0.574077, 0.587347, 0.625527, 0.689157, 0.816137" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.487880, 0.495400, 0.501650, 0.515510, 0.555190, 0.622570, 0.753990", \ + "0.492870, 0.500390, 0.506640, 0.520500, 0.560180, 0.627560, 0.758980", \ + "0.495310, 0.502830, 0.509080, 0.522940, 0.562620, 0.630000, 0.761420", \ + "0.505370, 0.512890, 0.519140, 0.533000, 0.572680, 0.640060, 0.771480", \ + "0.518700, 0.526220, 0.532470, 0.546330, 0.586010, 0.653390, 0.784810", \ + "0.576060, 0.583580, 0.589830, 0.603690, 0.643370, 0.710750, 0.842170", \ + "0.650180, 0.657700, 0.663950, 0.677810, 0.717490, 0.784870, 0.916290" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.429777, 0.436827, 0.442667, 0.456017, 0.494107, 0.559047, 0.686067", \ + "0.434767, 0.441817, 0.447657, 0.461007, 0.499097, 0.564037, 0.691057", \ + "0.436897, 0.443947, 0.449787, 0.463137, 0.501227, 0.566167, 0.693187", \ + "0.447337, 0.454387, 0.460227, 0.473577, 0.511667, 0.576607, 0.703627", \ + "0.460357, 0.467407, 0.473247, 0.486597, 0.524687, 0.589627, 0.716647", \ + "0.517907, 0.524957, 0.530797, 0.544147, 0.582237, 0.647177, 0.774197", \ + "0.591857, 0.598907, 0.604747, 0.618097, 0.656187, 0.721127, 0.848147" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.467700, 0.473800, 0.478870, 0.489750, 0.518580, 0.564870, 0.656650", \ + "0.471180, 0.477280, 0.482350, 0.493230, 0.522060, 0.568350, 0.660130", \ + "0.475040, 0.481140, 0.486210, 0.497090, 0.525920, 0.572210, 0.663990", \ + "0.486860, 0.492960, 0.498030, 0.508910, 0.537740, 0.584030, 0.675810", \ + "0.500740, 0.506840, 0.511910, 0.522790, 0.551620, 0.597910, 0.689690", \ + "0.558720, 0.564820, 0.569890, 0.580770, 0.609600, 0.655890, 0.747670", \ + "0.644060, 0.650160, 0.655230, 0.666110, 0.694940, 0.741230, 0.833010" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.416493, 0.422503, 0.427453, 0.438163, 0.466683, 0.512543, 0.603803", \ + "0.419743, 0.425753, 0.430703, 0.441413, 0.469933, 0.515793, 0.607053", \ + "0.423633, 0.429643, 0.434593, 0.445303, 0.473823, 0.519683, 0.610943", \ + "0.435493, 0.441503, 0.446453, 0.457163, 0.485683, 0.531543, 0.622803", \ + "0.449343, 0.455353, 0.460303, 0.471013, 0.499533, 0.545393, 0.636653", \ + "0.507563, 0.513573, 0.518523, 0.529233, 0.557753, 0.603613, 0.694873", \ + "0.592853, 0.598863, 0.603813, 0.614523, 0.643043, 0.688903, 0.780163" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + } + bus(QA) { + bus_type : rf2_32x128_wm1_QA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + memory_read() { + address : AA; + } + max_capacitance : 0.300000; + max_transition : 0.502800; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.981280, 0.987060, 0.997010, 1.012380, 1.043950, 1.099140, 1.206830", \ + "0.981700, 0.987480, 0.997430, 1.012800, 1.044370, 1.099560, 1.207250", \ + "0.986320, 0.992100, 1.002050, 1.017420, 1.048990, 1.104180, 1.211870", \ + "0.995100, 1.000880, 1.010830, 1.026200, 1.057770, 1.112960, 1.220650", \ + "1.006470, 1.012250, 1.022200, 1.037570, 1.069140, 1.124330, 1.232020", \ + "1.052240, 1.058020, 1.067970, 1.083340, 1.114910, 1.170100, 1.277790", \ + "1.122050, 1.127830, 1.137780, 1.153150, 1.184720, 1.239910, 1.347600" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.769327, 0.776717, 0.787066, 0.802307, 0.834377, 0.888997, 0.997086", \ + "0.771486, 0.778876, 0.789227, 0.804466, 0.836537, 0.891157, 0.999246", \ + "0.775707, 0.783097, 0.793446, 0.808687, 0.840756, 0.895377, 1.003467", \ + "0.784936, 0.792326, 0.802677, 0.817916, 0.849986, 0.904607, 1.012697", \ + "0.795697, 0.803087, 0.813436, 0.828677, 0.860747, 0.915367, 1.023456", \ + "0.842966, 0.850356, 0.860707, 0.875946, 0.908017, 0.962636, 1.070727", \ + "0.910497, 0.917887, 0.928237, 0.943477, 0.975547, 1.030166, 1.138257" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.943250, 0.951860, 0.963790, 0.982380, 1.020400, 1.088650, 1.223710", \ + "0.944440, 0.953050, 0.964980, 0.983570, 1.021590, 1.089840, 1.224900", \ + "0.949450, 0.958060, 0.969990, 0.988580, 1.026600, 1.094850, 1.229910", \ + "0.958520, 0.967130, 0.979060, 0.997650, 1.035670, 1.103920, 1.238980", \ + "0.969130, 0.977740, 0.989670, 1.008260, 1.046280, 1.114530, 1.249590", \ + "1.016850, 1.025460, 1.037390, 1.055980, 1.094000, 1.162250, 1.297310", \ + "1.083790, 1.092400, 1.104330, 1.122920, 1.160940, 1.229190, 1.364250" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.735284, 0.743504, 0.755454, 0.774954, 0.813584, 0.880994, 1.016434", \ + "0.736594, 0.744814, 0.756764, 0.776264, 0.814894, 0.882304, 1.017744", \ + "0.741254, 0.749474, 0.761424, 0.780924, 0.819554, 0.886964, 1.022404", \ + "0.749834, 0.758054, 0.770004, 0.789504, 0.828134, 0.895544, 1.030984", \ + "0.760694, 0.768914, 0.780864, 0.800364, 0.838994, 0.906404, 1.041844", \ + "0.808634, 0.816854, 0.828804, 0.848304, 0.886934, 0.954344, 1.089784", \ + "0.875514, 0.883734, 0.895684, 0.915184, 0.953814, 1.021224, 1.156664" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.991180, 0.996960, 1.006910, 1.022280, 1.053850, 1.109040, 1.216730", \ + "0.991600, 0.997380, 1.007330, 1.022700, 1.054270, 1.109460, 1.217150", \ + "0.996220, 1.002000, 1.011950, 1.027320, 1.058890, 1.114080, 1.221770", \ + "1.005000, 1.010780, 1.020730, 1.036100, 1.067670, 1.122860, 1.230550", \ + "1.016370, 1.022150, 1.032100, 1.047470, 1.079040, 1.134230, 1.241920", \ + "1.062140, 1.067920, 1.077870, 1.093240, 1.124810, 1.180000, 1.287690", \ + "1.131950, 1.137730, 1.147680, 1.163050, 1.194620, 1.249810, 1.357500" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.777784, 0.785174, 0.795524, 0.810764, 0.842834, 0.897454, 1.005544", \ + "0.779944, 0.787334, 0.797684, 0.812924, 0.844994, 0.899614, 1.007704", \ + "0.784164, 0.791554, 0.801904, 0.817144, 0.849214, 0.903834, 1.011924", \ + "0.793394, 0.800784, 0.811134, 0.826374, 0.858444, 0.913064, 1.021154", \ + "0.804154, 0.811544, 0.821894, 0.837134, 0.869204, 0.923824, 1.031914", \ + "0.851424, 0.858814, 0.869164, 0.884404, 0.916474, 0.971094, 1.079184", \ + "0.918954, 0.926344, 0.936694, 0.951934, 0.984004, 1.038624, 1.146714" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.953200, 0.961810, 0.973740, 0.992330, 1.030350, 1.098600, 1.233660", \ + "0.954390, 0.963000, 0.974930, 0.993520, 1.031540, 1.099790, 1.234850", \ + "0.959400, 0.968010, 0.979940, 0.998530, 1.036550, 1.104800, 1.239860", \ + "0.968470, 0.977080, 0.989010, 1.007600, 1.045620, 1.113870, 1.248930", \ + "0.979080, 0.987690, 0.999620, 1.018210, 1.056230, 1.124480, 1.259540", \ + "1.026800, 1.035410, 1.047340, 1.065930, 1.103950, 1.172200, 1.307260", \ + "1.093740, 1.102350, 1.114280, 1.132870, 1.170890, 1.239140, 1.374200" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.743750, 0.751970, 0.763920, 0.783420, 0.822050, 0.889460, 1.024900", \ + "0.745060, 0.753280, 0.765230, 0.784730, 0.823360, 0.890770, 1.026210", \ + "0.749720, 0.757940, 0.769890, 0.789390, 0.828020, 0.895430, 1.030870", \ + "0.758300, 0.766520, 0.778470, 0.797970, 0.836600, 0.904010, 1.039450", \ + "0.769160, 0.777380, 0.789330, 0.808830, 0.847460, 0.914870, 1.050310", \ + "0.817100, 0.825320, 0.837270, 0.856770, 0.895400, 0.962810, 1.098250", \ + "0.883980, 0.892200, 0.904150, 0.923650, 0.962280, 1.029690, 1.165130" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.997580, 1.003360, 1.013310, 1.028680, 1.060250, 1.115440, 1.223130", \ + "0.998000, 1.003780, 1.013730, 1.029100, 1.060670, 1.115860, 1.223550", \ + "1.002620, 1.008400, 1.018350, 1.033720, 1.065290, 1.120480, 1.228170", \ + "1.011400, 1.017180, 1.027130, 1.042500, 1.074070, 1.129260, 1.236950", \ + "1.022770, 1.028550, 1.038500, 1.053870, 1.085440, 1.140630, 1.248320", \ + "1.068540, 1.074320, 1.084270, 1.099640, 1.131210, 1.186400, 1.294090", \ + "1.138350, 1.144130, 1.154080, 1.169450, 1.201020, 1.256210, 1.363900" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.783232, 0.790623, 0.800972, 0.816213, 0.848283, 0.902903, 1.010992", \ + "0.785393, 0.792783, 0.803133, 0.818373, 0.850442, 0.905062, 1.013152", \ + "0.789613, 0.797003, 0.807353, 0.822593, 0.854662, 0.909282, 1.017373", \ + "0.798843, 0.806233, 0.816582, 0.831823, 0.863893, 0.918512, 1.026603", \ + "0.809603, 0.816993, 0.827342, 0.842583, 0.874652, 0.929273, 1.037362", \ + "0.856873, 0.864263, 0.874613, 0.889853, 0.921923, 0.976542, 1.084633", \ + "0.924402, 0.931792, 0.942142, 0.957383, 0.989453, 1.044072, 1.152162" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.959600, 0.968210, 0.980140, 0.998730, 1.036750, 1.105000, 1.240060", \ + "0.960790, 0.969400, 0.981330, 0.999920, 1.037940, 1.106190, 1.241250", \ + "0.965800, 0.974410, 0.986340, 1.004930, 1.042950, 1.111200, 1.246260", \ + "0.974870, 0.983480, 0.995410, 1.014000, 1.052020, 1.120270, 1.255330", \ + "0.985480, 0.994090, 1.006020, 1.024610, 1.062630, 1.130880, 1.265940", \ + "1.033200, 1.041810, 1.053740, 1.072330, 1.110350, 1.178600, 1.313660", \ + "1.100140, 1.108750, 1.120680, 1.139270, 1.177290, 1.245540, 1.380600" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.749198, 0.757418, 0.769368, 0.788868, 0.827498, 0.894909, 1.030349", \ + "0.750509, 0.758728, 0.770679, 0.790178, 0.828808, 0.896219, 1.031659", \ + "0.755168, 0.763389, 0.775338, 0.794839, 0.833468, 0.900879, 1.036319", \ + "0.763748, 0.771968, 0.783918, 0.803419, 0.842048, 0.909458, 1.044898", \ + "0.774609, 0.782828, 0.794779, 0.814278, 0.852908, 0.920319, 1.055759", \ + "0.822548, 0.830769, 0.842718, 0.862218, 0.900848, 0.968259, 1.103699", \ + "0.889428, 0.897648, 0.909598, 0.929099, 0.967728, 1.035138, 1.170578" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.010980, 1.016760, 1.026710, 1.042080, 1.073650, 1.128840, 1.236530", \ + "1.011400, 1.017180, 1.027130, 1.042500, 1.074070, 1.129260, 1.236950", \ + "1.016020, 1.021800, 1.031750, 1.047120, 1.078690, 1.133880, 1.241570", \ + "1.024800, 1.030580, 1.040530, 1.055900, 1.087470, 1.142660, 1.250350", \ + "1.036170, 1.041950, 1.051900, 1.067270, 1.098840, 1.154030, 1.261720", \ + "1.081940, 1.087720, 1.097670, 1.113040, 1.144610, 1.199800, 1.307490", \ + "1.151750, 1.157530, 1.167480, 1.182850, 1.214420, 1.269610, 1.377300" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.794589, 0.801979, 0.812329, 0.827569, 0.859639, 0.914259, 1.022349", \ + "0.796749, 0.804139, 0.814489, 0.829729, 0.861798, 0.916419, 1.024509", \ + "0.800969, 0.808359, 0.818709, 0.833949, 0.866019, 0.920638, 1.028729", \ + "0.810199, 0.817589, 0.827939, 0.843179, 0.875249, 0.929868, 1.037959", \ + "0.820959, 0.828349, 0.838699, 0.853939, 0.886008, 0.940629, 1.048719", \ + "0.868229, 0.875619, 0.885969, 0.901209, 0.933279, 0.987899, 1.095989", \ + "0.935758, 0.943148, 0.953499, 0.968739, 1.000809, 1.055429, 1.163518" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.973000, 0.981610, 0.993540, 1.012130, 1.050150, 1.118400, 1.253460", \ + "0.974190, 0.982800, 0.994730, 1.013320, 1.051340, 1.119590, 1.254650", \ + "0.979200, 0.987810, 0.999740, 1.018330, 1.056350, 1.124600, 1.259660", \ + "0.988270, 0.996880, 1.008810, 1.027400, 1.065420, 1.133670, 1.268730", \ + "0.998880, 1.007490, 1.019420, 1.038010, 1.076030, 1.144280, 1.279340", \ + "1.046600, 1.055210, 1.067140, 1.085730, 1.123750, 1.192000, 1.327060", \ + "1.113540, 1.122150, 1.134080, 1.152670, 1.190690, 1.258940, 1.394000" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.760546, 0.768766, 0.780716, 0.800216, 0.838846, 0.906256, 1.041696", \ + "0.761856, 0.770076, 0.782026, 0.801526, 0.840156, 0.907566, 1.043006", \ + "0.766516, 0.774736, 0.786686, 0.806186, 0.844816, 0.912226, 1.047666", \ + "0.775096, 0.783316, 0.795266, 0.814766, 0.853396, 0.920806, 1.056246", \ + "0.785956, 0.794176, 0.806126, 0.825626, 0.864256, 0.931666, 1.067106", \ + "0.833896, 0.842116, 0.854066, 0.873566, 0.912196, 0.979606, 1.115046", \ + "0.900776, 0.908996, 0.920946, 0.940446, 0.979076, 1.046486, 1.181926" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.122980, 1.128760, 1.138710, 1.154080, 1.185650, 1.240840, 1.348530", \ + "1.123400, 1.129180, 1.139130, 1.154500, 1.186070, 1.241260, 1.348950", \ + "1.128020, 1.133800, 1.143750, 1.159120, 1.190690, 1.245880, 1.353570", \ + "1.136800, 1.142580, 1.152530, 1.167900, 1.199470, 1.254660, 1.362350", \ + "1.148170, 1.153950, 1.163900, 1.179270, 1.210840, 1.266030, 1.373720", \ + "1.193940, 1.199720, 1.209670, 1.225040, 1.256610, 1.311800, 1.419490", \ + "1.263750, 1.269530, 1.279480, 1.294850, 1.326420, 1.381610, 1.489300" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.889788, 0.897178, 0.907528, 0.922769, 0.954839, 1.009459, 1.117549", \ + "0.891949, 0.899339, 0.909689, 0.924929, 0.956999, 1.011618, 1.119708", \ + "0.896168, 0.903558, 0.913909, 0.929149, 0.961218, 1.015839, 1.123928", \ + "0.905398, 0.912789, 0.923138, 0.938379, 0.970449, 1.025069, 1.133158", \ + "0.916158, 0.923548, 0.933898, 0.949139, 0.981209, 1.035829, 1.143919", \ + "0.963429, 0.970819, 0.981168, 0.996409, 1.028478, 1.083098, 1.191188", \ + "1.030959, 1.038349, 1.048698, 1.063938, 1.096008, 1.150629, 1.258719" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.085000, 1.093610, 1.105540, 1.124130, 1.162150, 1.230400, 1.365460", \ + "1.086190, 1.094800, 1.106730, 1.125320, 1.163340, 1.231590, 1.366650", \ + "1.091200, 1.099810, 1.111740, 1.130330, 1.168350, 1.236600, 1.371660", \ + "1.100270, 1.108880, 1.120810, 1.139400, 1.177420, 1.245670, 1.380730", \ + "1.110880, 1.119490, 1.131420, 1.150010, 1.188030, 1.256280, 1.391340", \ + "1.158600, 1.167210, 1.179140, 1.197730, 1.235750, 1.304000, 1.439060", \ + "1.225540, 1.234150, 1.246080, 1.264670, 1.302690, 1.370940, 1.506000" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.855763, 0.863983, 0.875933, 0.895433, 0.934063, 1.001473, 1.136913", \ + "0.857073, 0.865293, 0.877243, 0.896743, 0.935373, 1.002783, 1.138223", \ + "0.861733, 0.869953, 0.881903, 0.901403, 0.940033, 1.007443, 1.142883", \ + "0.870313, 0.878533, 0.890483, 0.909983, 0.948613, 1.016023, 1.151463", \ + "0.881173, 0.889393, 0.901343, 0.920843, 0.959473, 1.026883, 1.162323", \ + "0.929113, 0.937333, 0.949283, 0.968783, 1.007413, 1.074823, 1.210263", \ + "0.995993, 1.004213, 1.016163, 1.035663, 1.074293, 1.141703, 1.277143" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.243780, 1.249560, 1.259510, 1.274880, 1.306450, 1.361640, 1.469330", \ + "1.244200, 1.249980, 1.259930, 1.275300, 1.306870, 1.362060, 1.469750", \ + "1.248820, 1.254600, 1.264550, 1.279920, 1.311490, 1.366680, 1.474370", \ + "1.257600, 1.263380, 1.273330, 1.288700, 1.320270, 1.375460, 1.483150", \ + "1.268970, 1.274750, 1.284700, 1.300070, 1.331640, 1.386830, 1.494520", \ + "1.314740, 1.320520, 1.330470, 1.345840, 1.377410, 1.432600, 1.540290", \ + "1.384550, 1.390330, 1.400280, 1.415650, 1.447220, 1.502410, 1.610100" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.992468, 0.999858, 1.010208, 1.025448, 1.057519, 1.112138, 1.220228", \ + "0.994629, 1.002018, 1.012369, 1.027608, 1.059678, 1.114298, 1.222388", \ + "0.998848, 1.006238, 1.016588, 1.031829, 1.063898, 1.118518, 1.226608", \ + "1.008078, 1.015468, 1.025818, 1.041058, 1.073128, 1.127749, 1.235838", \ + "1.018838, 1.026228, 1.036578, 1.051818, 1.083889, 1.138508, 1.246598", \ + "1.066108, 1.073498, 1.083848, 1.099088, 1.131158, 1.185778, 1.293868", \ + "1.133638, 1.141029, 1.151378, 1.166618, 1.198688, 1.253308, 1.361398" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.205700, 1.214310, 1.226240, 1.244830, 1.282850, 1.351100, 1.486160", \ + "1.206890, 1.215500, 1.227430, 1.246020, 1.284040, 1.352290, 1.487350", \ + "1.211900, 1.220510, 1.232440, 1.251030, 1.289050, 1.357300, 1.492360", \ + "1.220970, 1.229580, 1.241510, 1.260100, 1.298120, 1.366370, 1.501430", \ + "1.231580, 1.240190, 1.252120, 1.270710, 1.308730, 1.376980, 1.512040", \ + "1.279300, 1.287910, 1.299840, 1.318430, 1.356450, 1.424700, 1.559760", \ + "1.346240, 1.354850, 1.366780, 1.385370, 1.423390, 1.491640, 1.626700" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.958358, 0.966578, 0.978528, 0.998028, 1.036658, 1.104068, 1.239508", \ + "0.959668, 0.967888, 0.979838, 0.999338, 1.037968, 1.105378, 1.240818", \ + "0.964328, 0.972548, 0.984498, 1.003998, 1.042628, 1.110038, 1.245478", \ + "0.972908, 0.981128, 0.993078, 1.012578, 1.051208, 1.118618, 1.254058", \ + "0.983768, 0.991988, 1.003938, 1.023438, 1.062068, 1.129478, 1.264918", \ + "1.031708, 1.039928, 1.051878, 1.071378, 1.110008, 1.177418, 1.312858", \ + "1.098588, 1.106808, 1.118758, 1.138258, 1.176888, 1.244298, 1.379738" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.370780, 1.376560, 1.386510, 1.401880, 1.433450, 1.488640, 1.596330", \ + "1.371200, 1.376980, 1.386930, 1.402300, 1.433870, 1.489060, 1.596750", \ + "1.375820, 1.381600, 1.391550, 1.406920, 1.438490, 1.493680, 1.601370", \ + "1.384600, 1.390380, 1.400330, 1.415700, 1.447270, 1.502460, 1.610150", \ + "1.395970, 1.401750, 1.411700, 1.427070, 1.458640, 1.513830, 1.621520", \ + "1.441740, 1.447520, 1.457470, 1.472840, 1.504410, 1.559600, 1.667290", \ + "1.511550, 1.517330, 1.527280, 1.542650, 1.574220, 1.629410, 1.737100" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.100418, 1.107808, 1.118158, 1.133398, 1.165468, 1.220088, 1.328178", \ + "1.102578, 1.109968, 1.120318, 1.135558, 1.167628, 1.222248, 1.330338", \ + "1.106799, 1.114189, 1.124538, 1.139778, 1.171848, 1.226468, 1.334558", \ + "1.116028, 1.123418, 1.133768, 1.149008, 1.181078, 1.235698, 1.343788", \ + "1.126788, 1.134178, 1.144528, 1.159768, 1.191838, 1.246458, 1.354548", \ + "1.174058, 1.181448, 1.191798, 1.207038, 1.239108, 1.293728, 1.401818", \ + "1.241588, 1.248978, 1.259328, 1.274568, 1.306639, 1.361258, 1.469348" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.332800, 1.341410, 1.353340, 1.371930, 1.409950, 1.478200, 1.613260", \ + "1.333990, 1.342600, 1.354530, 1.373120, 1.411140, 1.479390, 1.614450", \ + "1.339000, 1.347610, 1.359540, 1.378130, 1.416150, 1.484400, 1.619460", \ + "1.348070, 1.356680, 1.368610, 1.387200, 1.425220, 1.493470, 1.628530", \ + "1.358680, 1.367290, 1.379220, 1.397810, 1.435830, 1.504080, 1.639140", \ + "1.406400, 1.415010, 1.426940, 1.445530, 1.483550, 1.551800, 1.686860", \ + "1.473340, 1.481950, 1.493880, 1.512470, 1.550490, 1.618740, 1.753800" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.066393, 1.074613, 1.086563, 1.106063, 1.144693, 1.212103, 1.347543", \ + "1.067703, 1.075923, 1.087873, 1.107373, 1.146003, 1.213413, 1.348853", \ + "1.072363, 1.080583, 1.092533, 1.112033, 1.150663, 1.218073, 1.353513", \ + "1.080943, 1.089163, 1.101113, 1.120613, 1.159243, 1.226653, 1.362093", \ + "1.091803, 1.100023, 1.111973, 1.131473, 1.170103, 1.237513, 1.372953", \ + "1.139743, 1.147963, 1.159913, 1.179413, 1.218043, 1.285453, 1.420893", \ + "1.206623, 1.214843, 1.226793, 1.246293, 1.284923, 1.352333, 1.487773" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.488980, 1.494760, 1.504710, 1.520080, 1.551650, 1.606840, 1.714530", \ + "1.489400, 1.495180, 1.505130, 1.520500, 1.552070, 1.607260, 1.714950", \ + "1.494020, 1.499800, 1.509750, 1.525120, 1.556690, 1.611880, 1.719570", \ + "1.502800, 1.508580, 1.518530, 1.533900, 1.565470, 1.620660, 1.728350", \ + "1.514170, 1.519950, 1.529900, 1.545270, 1.576840, 1.632030, 1.739720", \ + "1.559940, 1.565720, 1.575670, 1.591040, 1.622610, 1.677800, 1.785490", \ + "1.629750, 1.635530, 1.645480, 1.660850, 1.692420, 1.747610, 1.855300" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.200889, 1.208279, 1.218628, 1.233869, 1.265939, 1.320559, 1.428648", \ + "1.203048, 1.210438, 1.220789, 1.236029, 1.268099, 1.322719, 1.430808", \ + "1.207269, 1.214659, 1.225008, 1.240249, 1.272318, 1.326939, 1.435029", \ + "1.216499, 1.223889, 1.234239, 1.249478, 1.281548, 1.336169, 1.444259", \ + "1.227259, 1.234649, 1.244998, 1.260239, 1.292309, 1.346929, 1.455018", \ + "1.274529, 1.281919, 1.292269, 1.307508, 1.339579, 1.394198, 1.502289", \ + "1.342059, 1.349449, 1.359799, 1.375039, 1.407109, 1.461728, 1.569819" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.451000, 1.459610, 1.471540, 1.490130, 1.528150, 1.596400, 1.731460", \ + "1.452190, 1.460800, 1.472730, 1.491320, 1.529340, 1.597590, 1.732650", \ + "1.457200, 1.465810, 1.477740, 1.496330, 1.534350, 1.602600, 1.737660", \ + "1.466270, 1.474880, 1.486810, 1.505400, 1.543420, 1.611670, 1.746730", \ + "1.476880, 1.485490, 1.497420, 1.516010, 1.554030, 1.622280, 1.757340", \ + "1.524600, 1.533210, 1.545140, 1.563730, 1.601750, 1.670000, 1.805060", \ + "1.591540, 1.600150, 1.612080, 1.630670, 1.668690, 1.736940, 1.872000" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.166863, 1.175083, 1.187033, 1.206533, 1.245163, 1.312573, 1.448013", \ + "1.168173, 1.176393, 1.188343, 1.207843, 1.246473, 1.313883, 1.449323", \ + "1.172833, 1.181053, 1.193003, 1.212503, 1.251133, 1.318543, 1.453983", \ + "1.181413, 1.189633, 1.201583, 1.221083, 1.259713, 1.327123, 1.462563", \ + "1.192273, 1.200493, 1.212443, 1.231943, 1.270573, 1.337983, 1.473423", \ + "1.240213, 1.248433, 1.260383, 1.279883, 1.318513, 1.385923, 1.521363", \ + "1.307093, 1.315313, 1.327263, 1.346763, 1.385393, 1.452803, 1.588243" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.981280, 0.987060, 0.997010, 1.012380, 1.043950, 1.099140, 1.206830", \ + "0.981700, 0.987480, 0.997430, 1.012800, 1.044370, 1.099560, 1.207250", \ + "0.986320, 0.992100, 1.002050, 1.017420, 1.048990, 1.104180, 1.211870", \ + "0.995100, 1.000880, 1.010830, 1.026200, 1.057770, 1.112960, 1.220650", \ + "1.006470, 1.012250, 1.022200, 1.037570, 1.069140, 1.124330, 1.232020", \ + "1.052240, 1.058020, 1.067970, 1.083340, 1.114910, 1.170100, 1.277790", \ + "1.122050, 1.127830, 1.137780, 1.153150, 1.184720, 1.239910, 1.347600" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.769327, 0.776717, 0.787066, 0.802307, 0.834377, 0.888997, 0.997086", \ + "0.771486, 0.778876, 0.789227, 0.804466, 0.836537, 0.891157, 0.999246", \ + "0.775707, 0.783097, 0.793446, 0.808687, 0.840756, 0.895377, 1.003467", \ + "0.784936, 0.792326, 0.802677, 0.817916, 0.849986, 0.904607, 1.012697", \ + "0.795697, 0.803087, 0.813436, 0.828677, 0.860747, 0.915367, 1.023456", \ + "0.842966, 0.850356, 0.860707, 0.875946, 0.908017, 0.962636, 1.070727", \ + "0.910497, 0.917887, 0.928237, 0.943477, 0.975547, 1.030166, 1.138257" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.943250, 0.951860, 0.963790, 0.982380, 1.020400, 1.088650, 1.223710", \ + "0.944440, 0.953050, 0.964980, 0.983570, 1.021590, 1.089840, 1.224900", \ + "0.949450, 0.958060, 0.969990, 0.988580, 1.026600, 1.094850, 1.229910", \ + "0.958520, 0.967130, 0.979060, 0.997650, 1.035670, 1.103920, 1.238980", \ + "0.969130, 0.977740, 0.989670, 1.008260, 1.046280, 1.114530, 1.249590", \ + "1.016850, 1.025460, 1.037390, 1.055980, 1.094000, 1.162250, 1.297310", \ + "1.083790, 1.092400, 1.104330, 1.122920, 1.160940, 1.229190, 1.364250" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.735284, 0.743504, 0.755454, 0.774954, 0.813584, 0.880994, 1.016434", \ + "0.736594, 0.744814, 0.756764, 0.776264, 0.814894, 0.882304, 1.017744", \ + "0.741254, 0.749474, 0.761424, 0.780924, 0.819554, 0.886964, 1.022404", \ + "0.749834, 0.758054, 0.770004, 0.789504, 0.828134, 0.895544, 1.030984", \ + "0.760694, 0.768914, 0.780864, 0.800364, 0.838994, 0.906404, 1.041844", \ + "0.808634, 0.816854, 0.828804, 0.848304, 0.886934, 0.954344, 1.089784", \ + "0.875514, 0.883734, 0.895684, 0.915184, 0.953814, 1.021224, 1.156664" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.991180, 0.996960, 1.006910, 1.022280, 1.053850, 1.109040, 1.216730", \ + "0.991600, 0.997380, 1.007330, 1.022700, 1.054270, 1.109460, 1.217150", \ + "0.996220, 1.002000, 1.011950, 1.027320, 1.058890, 1.114080, 1.221770", \ + "1.005000, 1.010780, 1.020730, 1.036100, 1.067670, 1.122860, 1.230550", \ + "1.016370, 1.022150, 1.032100, 1.047470, 1.079040, 1.134230, 1.241920", \ + "1.062140, 1.067920, 1.077870, 1.093240, 1.124810, 1.180000, 1.287690", \ + "1.131950, 1.137730, 1.147680, 1.163050, 1.194620, 1.249810, 1.357500" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.777784, 0.785174, 0.795524, 0.810764, 0.842834, 0.897454, 1.005544", \ + "0.779944, 0.787334, 0.797684, 0.812924, 0.844994, 0.899614, 1.007704", \ + "0.784164, 0.791554, 0.801904, 0.817144, 0.849214, 0.903834, 1.011924", \ + "0.793394, 0.800784, 0.811134, 0.826374, 0.858444, 0.913064, 1.021154", \ + "0.804154, 0.811544, 0.821894, 0.837134, 0.869204, 0.923824, 1.031914", \ + "0.851424, 0.858814, 0.869164, 0.884404, 0.916474, 0.971094, 1.079184", \ + "0.918954, 0.926344, 0.936694, 0.951934, 0.984004, 1.038624, 1.146714" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.953200, 0.961810, 0.973740, 0.992330, 1.030350, 1.098600, 1.233660", \ + "0.954390, 0.963000, 0.974930, 0.993520, 1.031540, 1.099790, 1.234850", \ + "0.959400, 0.968010, 0.979940, 0.998530, 1.036550, 1.104800, 1.239860", \ + "0.968470, 0.977080, 0.989010, 1.007600, 1.045620, 1.113870, 1.248930", \ + "0.979080, 0.987690, 0.999620, 1.018210, 1.056230, 1.124480, 1.259540", \ + "1.026800, 1.035410, 1.047340, 1.065930, 1.103950, 1.172200, 1.307260", \ + "1.093740, 1.102350, 1.114280, 1.132870, 1.170890, 1.239140, 1.374200" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.743750, 0.751970, 0.763920, 0.783420, 0.822050, 0.889460, 1.024900", \ + "0.745060, 0.753280, 0.765230, 0.784730, 0.823360, 0.890770, 1.026210", \ + "0.749720, 0.757940, 0.769890, 0.789390, 0.828020, 0.895430, 1.030870", \ + "0.758300, 0.766520, 0.778470, 0.797970, 0.836600, 0.904010, 1.039450", \ + "0.769160, 0.777380, 0.789330, 0.808830, 0.847460, 0.914870, 1.050310", \ + "0.817100, 0.825320, 0.837270, 0.856770, 0.895400, 0.962810, 1.098250", \ + "0.883980, 0.892200, 0.904150, 0.923650, 0.962280, 1.029690, 1.165130" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.997580, 1.003360, 1.013310, 1.028680, 1.060250, 1.115440, 1.223130", \ + "0.998000, 1.003780, 1.013730, 1.029100, 1.060670, 1.115860, 1.223550", \ + "1.002620, 1.008400, 1.018350, 1.033720, 1.065290, 1.120480, 1.228170", \ + "1.011400, 1.017180, 1.027130, 1.042500, 1.074070, 1.129260, 1.236950", \ + "1.022770, 1.028550, 1.038500, 1.053870, 1.085440, 1.140630, 1.248320", \ + "1.068540, 1.074320, 1.084270, 1.099640, 1.131210, 1.186400, 1.294090", \ + "1.138350, 1.144130, 1.154080, 1.169450, 1.201020, 1.256210, 1.363900" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.783232, 0.790623, 0.800972, 0.816213, 0.848283, 0.902903, 1.010992", \ + "0.785393, 0.792783, 0.803133, 0.818373, 0.850442, 0.905062, 1.013152", \ + "0.789613, 0.797003, 0.807353, 0.822593, 0.854662, 0.909282, 1.017373", \ + "0.798843, 0.806233, 0.816582, 0.831823, 0.863893, 0.918512, 1.026603", \ + "0.809603, 0.816993, 0.827342, 0.842583, 0.874652, 0.929273, 1.037362", \ + "0.856873, 0.864263, 0.874613, 0.889853, 0.921923, 0.976542, 1.084633", \ + "0.924402, 0.931792, 0.942142, 0.957383, 0.989453, 1.044072, 1.152162" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.959600, 0.968210, 0.980140, 0.998730, 1.036750, 1.105000, 1.240060", \ + "0.960790, 0.969400, 0.981330, 0.999920, 1.037940, 1.106190, 1.241250", \ + "0.965800, 0.974410, 0.986340, 1.004930, 1.042950, 1.111200, 1.246260", \ + "0.974870, 0.983480, 0.995410, 1.014000, 1.052020, 1.120270, 1.255330", \ + "0.985480, 0.994090, 1.006020, 1.024610, 1.062630, 1.130880, 1.265940", \ + "1.033200, 1.041810, 1.053740, 1.072330, 1.110350, 1.178600, 1.313660", \ + "1.100140, 1.108750, 1.120680, 1.139270, 1.177290, 1.245540, 1.380600" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.749198, 0.757418, 0.769368, 0.788868, 0.827498, 0.894909, 1.030349", \ + "0.750509, 0.758728, 0.770679, 0.790178, 0.828808, 0.896219, 1.031659", \ + "0.755168, 0.763389, 0.775338, 0.794839, 0.833468, 0.900879, 1.036319", \ + "0.763748, 0.771968, 0.783918, 0.803419, 0.842048, 0.909458, 1.044898", \ + "0.774609, 0.782828, 0.794779, 0.814278, 0.852908, 0.920319, 1.055759", \ + "0.822548, 0.830769, 0.842718, 0.862218, 0.900848, 0.968259, 1.103699", \ + "0.889428, 0.897648, 0.909598, 0.929099, 0.967728, 1.035138, 1.170578" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.010980, 1.016760, 1.026710, 1.042080, 1.073650, 1.128840, 1.236530", \ + "1.011400, 1.017180, 1.027130, 1.042500, 1.074070, 1.129260, 1.236950", \ + "1.016020, 1.021800, 1.031750, 1.047120, 1.078690, 1.133880, 1.241570", \ + "1.024800, 1.030580, 1.040530, 1.055900, 1.087470, 1.142660, 1.250350", \ + "1.036170, 1.041950, 1.051900, 1.067270, 1.098840, 1.154030, 1.261720", \ + "1.081940, 1.087720, 1.097670, 1.113040, 1.144610, 1.199800, 1.307490", \ + "1.151750, 1.157530, 1.167480, 1.182850, 1.214420, 1.269610, 1.377300" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.794589, 0.801979, 0.812329, 0.827569, 0.859639, 0.914259, 1.022349", \ + "0.796749, 0.804139, 0.814489, 0.829729, 0.861798, 0.916419, 1.024509", \ + "0.800969, 0.808359, 0.818709, 0.833949, 0.866019, 0.920638, 1.028729", \ + "0.810199, 0.817589, 0.827939, 0.843179, 0.875249, 0.929868, 1.037959", \ + "0.820959, 0.828349, 0.838699, 0.853939, 0.886008, 0.940629, 1.048719", \ + "0.868229, 0.875619, 0.885969, 0.901209, 0.933279, 0.987899, 1.095989", \ + "0.935758, 0.943148, 0.953499, 0.968739, 1.000809, 1.055429, 1.163518" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.973000, 0.981610, 0.993540, 1.012130, 1.050150, 1.118400, 1.253460", \ + "0.974190, 0.982800, 0.994730, 1.013320, 1.051340, 1.119590, 1.254650", \ + "0.979200, 0.987810, 0.999740, 1.018330, 1.056350, 1.124600, 1.259660", \ + "0.988270, 0.996880, 1.008810, 1.027400, 1.065420, 1.133670, 1.268730", \ + "0.998880, 1.007490, 1.019420, 1.038010, 1.076030, 1.144280, 1.279340", \ + "1.046600, 1.055210, 1.067140, 1.085730, 1.123750, 1.192000, 1.327060", \ + "1.113540, 1.122150, 1.134080, 1.152670, 1.190690, 1.258940, 1.394000" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.760546, 0.768766, 0.780716, 0.800216, 0.838846, 0.906256, 1.041696", \ + "0.761856, 0.770076, 0.782026, 0.801526, 0.840156, 0.907566, 1.043006", \ + "0.766516, 0.774736, 0.786686, 0.806186, 0.844816, 0.912226, 1.047666", \ + "0.775096, 0.783316, 0.795266, 0.814766, 0.853396, 0.920806, 1.056246", \ + "0.785956, 0.794176, 0.806126, 0.825626, 0.864256, 0.931666, 1.067106", \ + "0.833896, 0.842116, 0.854066, 0.873566, 0.912196, 0.979606, 1.115046", \ + "0.900776, 0.908996, 0.920946, 0.940446, 0.979076, 1.046486, 1.181926" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.122980, 1.128760, 1.138710, 1.154080, 1.185650, 1.240840, 1.348530", \ + "1.123400, 1.129180, 1.139130, 1.154500, 1.186070, 1.241260, 1.348950", \ + "1.128020, 1.133800, 1.143750, 1.159120, 1.190690, 1.245880, 1.353570", \ + "1.136800, 1.142580, 1.152530, 1.167900, 1.199470, 1.254660, 1.362350", \ + "1.148170, 1.153950, 1.163900, 1.179270, 1.210840, 1.266030, 1.373720", \ + "1.193940, 1.199720, 1.209670, 1.225040, 1.256610, 1.311800, 1.419490", \ + "1.263750, 1.269530, 1.279480, 1.294850, 1.326420, 1.381610, 1.489300" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.889788, 0.897178, 0.907528, 0.922769, 0.954839, 1.009459, 1.117549", \ + "0.891949, 0.899339, 0.909689, 0.924929, 0.956999, 1.011618, 1.119708", \ + "0.896168, 0.903558, 0.913909, 0.929149, 0.961218, 1.015839, 1.123928", \ + "0.905398, 0.912789, 0.923138, 0.938379, 0.970449, 1.025069, 1.133158", \ + "0.916158, 0.923548, 0.933898, 0.949139, 0.981209, 1.035829, 1.143919", \ + "0.963429, 0.970819, 0.981168, 0.996409, 1.028478, 1.083098, 1.191188", \ + "1.030959, 1.038349, 1.048698, 1.063938, 1.096008, 1.150629, 1.258719" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.085000, 1.093610, 1.105540, 1.124130, 1.162150, 1.230400, 1.365460", \ + "1.086190, 1.094800, 1.106730, 1.125320, 1.163340, 1.231590, 1.366650", \ + "1.091200, 1.099810, 1.111740, 1.130330, 1.168350, 1.236600, 1.371660", \ + "1.100270, 1.108880, 1.120810, 1.139400, 1.177420, 1.245670, 1.380730", \ + "1.110880, 1.119490, 1.131420, 1.150010, 1.188030, 1.256280, 1.391340", \ + "1.158600, 1.167210, 1.179140, 1.197730, 1.235750, 1.304000, 1.439060", \ + "1.225540, 1.234150, 1.246080, 1.264670, 1.302690, 1.370940, 1.506000" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.855763, 0.863983, 0.875933, 0.895433, 0.934063, 1.001473, 1.136913", \ + "0.857073, 0.865293, 0.877243, 0.896743, 0.935373, 1.002783, 1.138223", \ + "0.861733, 0.869953, 0.881903, 0.901403, 0.940033, 1.007443, 1.142883", \ + "0.870313, 0.878533, 0.890483, 0.909983, 0.948613, 1.016023, 1.151463", \ + "0.881173, 0.889393, 0.901343, 0.920843, 0.959473, 1.026883, 1.162323", \ + "0.929113, 0.937333, 0.949283, 0.968783, 1.007413, 1.074823, 1.210263", \ + "0.995993, 1.004213, 1.016163, 1.035663, 1.074293, 1.141703, 1.277143" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.243780, 1.249560, 1.259510, 1.274880, 1.306450, 1.361640, 1.469330", \ + "1.244200, 1.249980, 1.259930, 1.275300, 1.306870, 1.362060, 1.469750", \ + "1.248820, 1.254600, 1.264550, 1.279920, 1.311490, 1.366680, 1.474370", \ + "1.257600, 1.263380, 1.273330, 1.288700, 1.320270, 1.375460, 1.483150", \ + "1.268970, 1.274750, 1.284700, 1.300070, 1.331640, 1.386830, 1.494520", \ + "1.314740, 1.320520, 1.330470, 1.345840, 1.377410, 1.432600, 1.540290", \ + "1.384550, 1.390330, 1.400280, 1.415650, 1.447220, 1.502410, 1.610100" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.992468, 0.999858, 1.010208, 1.025448, 1.057519, 1.112138, 1.220228", \ + "0.994629, 1.002018, 1.012369, 1.027608, 1.059678, 1.114298, 1.222388", \ + "0.998848, 1.006238, 1.016588, 1.031829, 1.063898, 1.118518, 1.226608", \ + "1.008078, 1.015468, 1.025818, 1.041058, 1.073128, 1.127749, 1.235838", \ + "1.018838, 1.026228, 1.036578, 1.051818, 1.083889, 1.138508, 1.246598", \ + "1.066108, 1.073498, 1.083848, 1.099088, 1.131158, 1.185778, 1.293868", \ + "1.133638, 1.141029, 1.151378, 1.166618, 1.198688, 1.253308, 1.361398" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.205700, 1.214310, 1.226240, 1.244830, 1.282850, 1.351100, 1.486160", \ + "1.206890, 1.215500, 1.227430, 1.246020, 1.284040, 1.352290, 1.487350", \ + "1.211900, 1.220510, 1.232440, 1.251030, 1.289050, 1.357300, 1.492360", \ + "1.220970, 1.229580, 1.241510, 1.260100, 1.298120, 1.366370, 1.501430", \ + "1.231580, 1.240190, 1.252120, 1.270710, 1.308730, 1.376980, 1.512040", \ + "1.279300, 1.287910, 1.299840, 1.318430, 1.356450, 1.424700, 1.559760", \ + "1.346240, 1.354850, 1.366780, 1.385370, 1.423390, 1.491640, 1.626700" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.958358, 0.966578, 0.978528, 0.998028, 1.036658, 1.104068, 1.239508", \ + "0.959668, 0.967888, 0.979838, 0.999338, 1.037968, 1.105378, 1.240818", \ + "0.964328, 0.972548, 0.984498, 1.003998, 1.042628, 1.110038, 1.245478", \ + "0.972908, 0.981128, 0.993078, 1.012578, 1.051208, 1.118618, 1.254058", \ + "0.983768, 0.991988, 1.003938, 1.023438, 1.062068, 1.129478, 1.264918", \ + "1.031708, 1.039928, 1.051878, 1.071378, 1.110008, 1.177418, 1.312858", \ + "1.098588, 1.106808, 1.118758, 1.138258, 1.176888, 1.244298, 1.379738" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.370780, 1.376560, 1.386510, 1.401880, 1.433450, 1.488640, 1.596330", \ + "1.371200, 1.376980, 1.386930, 1.402300, 1.433870, 1.489060, 1.596750", \ + "1.375820, 1.381600, 1.391550, 1.406920, 1.438490, 1.493680, 1.601370", \ + "1.384600, 1.390380, 1.400330, 1.415700, 1.447270, 1.502460, 1.610150", \ + "1.395970, 1.401750, 1.411700, 1.427070, 1.458640, 1.513830, 1.621520", \ + "1.441740, 1.447520, 1.457470, 1.472840, 1.504410, 1.559600, 1.667290", \ + "1.511550, 1.517330, 1.527280, 1.542650, 1.574220, 1.629410, 1.737100" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.100418, 1.107808, 1.118158, 1.133398, 1.165468, 1.220088, 1.328178", \ + "1.102578, 1.109968, 1.120318, 1.135558, 1.167628, 1.222248, 1.330338", \ + "1.106799, 1.114189, 1.124538, 1.139778, 1.171848, 1.226468, 1.334558", \ + "1.116028, 1.123418, 1.133768, 1.149008, 1.181078, 1.235698, 1.343788", \ + "1.126788, 1.134178, 1.144528, 1.159768, 1.191838, 1.246458, 1.354548", \ + "1.174058, 1.181448, 1.191798, 1.207038, 1.239108, 1.293728, 1.401818", \ + "1.241588, 1.248978, 1.259328, 1.274568, 1.306639, 1.361258, 1.469348" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.332800, 1.341410, 1.353340, 1.371930, 1.409950, 1.478200, 1.613260", \ + "1.333990, 1.342600, 1.354530, 1.373120, 1.411140, 1.479390, 1.614450", \ + "1.339000, 1.347610, 1.359540, 1.378130, 1.416150, 1.484400, 1.619460", \ + "1.348070, 1.356680, 1.368610, 1.387200, 1.425220, 1.493470, 1.628530", \ + "1.358680, 1.367290, 1.379220, 1.397810, 1.435830, 1.504080, 1.639140", \ + "1.406400, 1.415010, 1.426940, 1.445530, 1.483550, 1.551800, 1.686860", \ + "1.473340, 1.481950, 1.493880, 1.512470, 1.550490, 1.618740, 1.753800" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.066393, 1.074613, 1.086563, 1.106063, 1.144693, 1.212103, 1.347543", \ + "1.067703, 1.075923, 1.087873, 1.107373, 1.146003, 1.213413, 1.348853", \ + "1.072363, 1.080583, 1.092533, 1.112033, 1.150663, 1.218073, 1.353513", \ + "1.080943, 1.089163, 1.101113, 1.120613, 1.159243, 1.226653, 1.362093", \ + "1.091803, 1.100023, 1.111973, 1.131473, 1.170103, 1.237513, 1.372953", \ + "1.139743, 1.147963, 1.159913, 1.179413, 1.218043, 1.285453, 1.420893", \ + "1.206623, 1.214843, 1.226793, 1.246293, 1.284923, 1.352333, 1.487773" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.488980, 1.494760, 1.504710, 1.520080, 1.551650, 1.606840, 1.714530", \ + "1.489400, 1.495180, 1.505130, 1.520500, 1.552070, 1.607260, 1.714950", \ + "1.494020, 1.499800, 1.509750, 1.525120, 1.556690, 1.611880, 1.719570", \ + "1.502800, 1.508580, 1.518530, 1.533900, 1.565470, 1.620660, 1.728350", \ + "1.514170, 1.519950, 1.529900, 1.545270, 1.576840, 1.632030, 1.739720", \ + "1.559940, 1.565720, 1.575670, 1.591040, 1.622610, 1.677800, 1.785490", \ + "1.629750, 1.635530, 1.645480, 1.660850, 1.692420, 1.747610, 1.855300" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.200889, 1.208279, 1.218628, 1.233869, 1.265939, 1.320559, 1.428648", \ + "1.203048, 1.210438, 1.220789, 1.236029, 1.268099, 1.322719, 1.430808", \ + "1.207269, 1.214659, 1.225008, 1.240249, 1.272318, 1.326939, 1.435029", \ + "1.216499, 1.223889, 1.234239, 1.249478, 1.281548, 1.336169, 1.444259", \ + "1.227259, 1.234649, 1.244998, 1.260239, 1.292309, 1.346929, 1.455018", \ + "1.274529, 1.281919, 1.292269, 1.307508, 1.339579, 1.394198, 1.502289", \ + "1.342059, 1.349449, 1.359799, 1.375039, 1.407109, 1.461728, 1.569819" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.451000, 1.459610, 1.471540, 1.490130, 1.528150, 1.596400, 1.731460", \ + "1.452190, 1.460800, 1.472730, 1.491320, 1.529340, 1.597590, 1.732650", \ + "1.457200, 1.465810, 1.477740, 1.496330, 1.534350, 1.602600, 1.737660", \ + "1.466270, 1.474880, 1.486810, 1.505400, 1.543420, 1.611670, 1.746730", \ + "1.476880, 1.485490, 1.497420, 1.516010, 1.554030, 1.622280, 1.757340", \ + "1.524600, 1.533210, 1.545140, 1.563730, 1.601750, 1.670000, 1.805060", \ + "1.591540, 1.600150, 1.612080, 1.630670, 1.668690, 1.736940, 1.872000" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.166863, 1.175083, 1.187033, 1.206533, 1.245163, 1.312573, 1.448013", \ + "1.168173, 1.176393, 1.188343, 1.207843, 1.246473, 1.313883, 1.449323", \ + "1.172833, 1.181053, 1.193003, 1.212503, 1.251133, 1.318543, 1.453983", \ + "1.181413, 1.189633, 1.201583, 1.221083, 1.259713, 1.327123, 1.462563", \ + "1.192273, 1.200493, 1.212443, 1.231943, 1.270573, 1.337983, 1.473423", \ + "1.240213, 1.248433, 1.260383, 1.279883, 1.318513, 1.385923, 1.521363", \ + "1.307093, 1.315313, 1.327263, 1.346763, 1.385393, 1.452803, 1.588243" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.007224, 0.007291, 0.007298, 0.007361, 0.007369, 0.007376, 0.007383", \ + "0.007231, 0.007298, 0.007305, 0.007369, 0.007376, 0.007383, 0.007391", \ + "0.007238, 0.007305, 0.007313, 0.007376, 0.007383, 0.007391, 0.007398", \ + "0.007245, 0.007313, 0.007320, 0.007383, 0.007391, 0.007398, 0.007406", \ + "0.007252, 0.007320, 0.007327, 0.007391, 0.007398, 0.007406, 0.007413", \ + "0.007260, 0.007327, 0.007335, 0.007398, 0.007406, 0.007413, 0.007420", \ + "0.007267, 0.007335, 0.007342, 0.007406, 0.007413, 0.007420, 0.007428" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.006512, 0.006518, 0.006525, 0.006531, 0.006538, 0.006545, 0.006551", \ + "0.006518, 0.006525, 0.006531, 0.006538, 0.006545, 0.006551, 0.006558", \ + "0.006525, 0.006531, 0.006538, 0.006545, 0.006551, 0.006558, 0.006564", \ + "0.006531, 0.006538, 0.006545, 0.006551, 0.006558, 0.006564, 0.006571", \ + "0.006538, 0.006545, 0.006551, 0.006558, 0.006564, 0.006571, 0.006577", \ + "0.006545, 0.006551, 0.006558, 0.006564, 0.006571, 0.006577, 0.006584", \ + "0.006551, 0.006558, 0.006564, 0.006571, 0.006577, 0.006584, 0.006591" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.007224, 0.007291, 0.007298, 0.007361, 0.007369, 0.007376, 0.007383", \ + "0.007231, 0.007298, 0.007305, 0.007369, 0.007376, 0.007383, 0.007391", \ + "0.007238, 0.007305, 0.007313, 0.007376, 0.007383, 0.007391, 0.007398", \ + "0.007245, 0.007313, 0.007320, 0.007383, 0.007391, 0.007398, 0.007406", \ + "0.007252, 0.007320, 0.007327, 0.007391, 0.007398, 0.007406, 0.007413", \ + "0.007260, 0.007327, 0.007335, 0.007398, 0.007406, 0.007413, 0.007420", \ + "0.007267, 0.007335, 0.007342, 0.007406, 0.007413, 0.007420, 0.007428" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.006512, 0.006518, 0.006525, 0.006531, 0.006538, 0.006545, 0.006551", \ + "0.006518, 0.006525, 0.006531, 0.006538, 0.006545, 0.006551, 0.006558", \ + "0.006525, 0.006531, 0.006538, 0.006545, 0.006551, 0.006558, 0.006564", \ + "0.006531, 0.006538, 0.006545, 0.006551, 0.006558, 0.006564, 0.006571", \ + "0.006538, 0.006545, 0.006551, 0.006558, 0.006564, 0.006571, 0.006577", \ + "0.006545, 0.006551, 0.006558, 0.006564, 0.006571, 0.006577, 0.006584", \ + "0.006551, 0.006558, 0.006564, 0.006571, 0.006577, 0.006584, 0.006591" \ + ); + } + } + } + bus(SOA) { + bus_type : rf2_32x128_wm1_SOA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.096510, 1.100760, 1.105030, 1.115400, 1.148640, 1.209380, 1.330000", \ + "1.097200, 1.101450, 1.105720, 1.116090, 1.149330, 1.210070, 1.330690", \ + "1.102650, 1.106900, 1.111170, 1.121540, 1.154780, 1.215520, 1.336140", \ + "1.110810, 1.115060, 1.119330, 1.129700, 1.162940, 1.223680, 1.344300", \ + "1.122200, 1.126450, 1.130720, 1.141090, 1.174330, 1.235070, 1.355690", \ + "1.167130, 1.171380, 1.175650, 1.186020, 1.219260, 1.280000, 1.400620", \ + "1.237730, 1.241980, 1.246250, 1.256620, 1.289860, 1.350600, 1.471220" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.919726, 0.924505, 0.927786, 0.937286, 0.971666, 1.030135, 1.151305", \ + "0.920196, 0.924976, 0.928256, 0.937756, 0.972136, 1.030605, 1.151776", \ + "0.924946, 0.929725, 0.933006, 0.942506, 0.976886, 1.035355, 1.156525", \ + "0.932736, 0.937516, 0.940796, 0.950296, 0.984676, 1.043145, 1.164316", \ + "0.944365, 0.949146, 0.952426, 0.961925, 0.996305, 1.054775, 1.175945", \ + "0.991085, 0.995866, 0.999145, 1.008645, 1.043025, 1.101495, 1.222665", \ + "1.060415, 1.065195, 1.068475, 1.077975, 1.112355, 1.170826, 1.291995" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.040450, 1.044140, 1.048400, 1.062200, 1.108270, 1.183380, 1.334730", \ + "1.040710, 1.044400, 1.048660, 1.062460, 1.108530, 1.183640, 1.334990", \ + "1.045950, 1.049640, 1.053900, 1.067700, 1.113770, 1.188880, 1.340230", \ + "1.054350, 1.058040, 1.062300, 1.076100, 1.122170, 1.197280, 1.348630", \ + "1.065510, 1.069200, 1.073460, 1.087260, 1.133330, 1.208440, 1.359790", \ + "1.113220, 1.116910, 1.121170, 1.134970, 1.181040, 1.256150, 1.407500", \ + "1.180770, 1.184460, 1.188720, 1.202520, 1.248590, 1.323700, 1.475050" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.858483, 0.863413, 0.867223, 0.881543, 0.926833, 1.002263, 1.154373", \ + "0.860163, 0.865093, 0.868903, 0.883223, 0.928513, 1.003943, 1.156053", \ + "0.864943, 0.869873, 0.873683, 0.888003, 0.933293, 1.008723, 1.160833", \ + "0.873543, 0.878473, 0.882283, 0.896603, 0.941893, 1.017323, 1.169433", \ + "0.884913, 0.889843, 0.893653, 0.907973, 0.953263, 1.028693, 1.180803", \ + "0.932133, 0.937063, 0.940873, 0.955193, 1.000483, 1.075913, 1.228023", \ + "0.999073, 1.004003, 1.007813, 1.022133, 1.067423, 1.142853, 1.294963" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.106510, 1.110760, 1.115030, 1.125400, 1.158640, 1.219380, 1.340000", \ + "1.107200, 1.111450, 1.115720, 1.126090, 1.159330, 1.220070, 1.340690", \ + "1.112650, 1.116900, 1.121170, 1.131540, 1.164780, 1.225520, 1.346140", \ + "1.120810, 1.125060, 1.129330, 1.139700, 1.172940, 1.233680, 1.354300", \ + "1.132200, 1.136450, 1.140720, 1.151090, 1.184330, 1.245070, 1.365690", \ + "1.177130, 1.181380, 1.185650, 1.196020, 1.229260, 1.290000, 1.410620", \ + "1.247730, 1.251980, 1.256250, 1.266620, 1.299860, 1.360600, 1.481220" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.928141, 0.932920, 0.936200, 0.945701, 0.980081, 1.038550, 1.159720", \ + "0.928611, 0.933391, 0.936670, 0.946171, 0.980551, 1.039020, 1.160191", \ + "0.933361, 0.938140, 0.941420, 0.950921, 0.985301, 1.043770, 1.164940", \ + "0.941151, 0.945931, 0.949210, 0.958711, 0.993091, 1.051560, 1.172731", \ + "0.952780, 0.957561, 0.960840, 0.970340, 1.004720, 1.063190, 1.184360", \ + "0.999500, 1.004281, 1.007560, 1.017060, 1.051441, 1.109911, 1.231081", \ + "1.068831, 1.073611, 1.076890, 1.086390, 1.120770, 1.179241, 1.300410" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.050350, 1.054040, 1.058300, 1.072100, 1.118170, 1.193280, 1.344630", \ + "1.050610, 1.054300, 1.058560, 1.072360, 1.118430, 1.193540, 1.344890", \ + "1.055850, 1.059540, 1.063800, 1.077600, 1.123670, 1.198780, 1.350130", \ + "1.064250, 1.067940, 1.072200, 1.086000, 1.132070, 1.207180, 1.358530", \ + "1.075410, 1.079100, 1.083360, 1.097160, 1.143230, 1.218340, 1.369690", \ + "1.123120, 1.126810, 1.131070, 1.144870, 1.190940, 1.266050, 1.417400", \ + "1.190670, 1.194360, 1.198620, 1.212420, 1.258490, 1.333600, 1.484950" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.866898, 0.871828, 0.875638, 0.889958, 0.935248, 1.010678, 1.162788", \ + "0.868578, 0.873508, 0.877318, 0.891638, 0.936928, 1.012358, 1.164468", \ + "0.873358, 0.878288, 0.882098, 0.896418, 0.941708, 1.017138, 1.169248", \ + "0.881958, 0.886888, 0.890698, 0.905018, 0.950308, 1.025738, 1.177848", \ + "0.893328, 0.898258, 0.902068, 0.916388, 0.961678, 1.037108, 1.189218", \ + "0.940548, 0.945478, 0.949288, 0.963608, 1.008898, 1.084328, 1.236438", \ + "1.007488, 1.012418, 1.016228, 1.030548, 1.075838, 1.151268, 1.303378" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.112910, 1.117160, 1.121430, 1.131800, 1.165040, 1.225780, 1.346400", \ + "1.113600, 1.117850, 1.122120, 1.132490, 1.165730, 1.226470, 1.347090", \ + "1.119050, 1.123300, 1.127570, 1.137940, 1.171180, 1.231920, 1.352540", \ + "1.127210, 1.131460, 1.135730, 1.146100, 1.179340, 1.240080, 1.360700", \ + "1.138600, 1.142850, 1.147120, 1.157490, 1.190730, 1.251470, 1.372090", \ + "1.183530, 1.187780, 1.192050, 1.202420, 1.235660, 1.296400, 1.417020", \ + "1.254130, 1.258380, 1.262650, 1.273020, 1.306260, 1.367000, 1.487620" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.933580, 0.938361, 0.941640, 0.951140, 0.985520, 1.043991, 1.165161", \ + "0.934051, 0.938831, 0.942110, 0.951611, 0.985990, 1.044461, 1.165631", \ + "0.938800, 0.943581, 0.946860, 0.956360, 0.990740, 1.049211, 1.170381", \ + "0.946591, 0.951371, 0.954650, 0.964151, 0.998530, 1.057001, 1.178171", \ + "0.958221, 0.963000, 0.966280, 0.975781, 1.010161, 1.068631, 1.189801", \ + "1.004941, 1.009721, 1.013001, 1.022501, 1.056881, 1.115351, 1.236521", \ + "1.074271, 1.079051, 1.082331, 1.091831, 1.126211, 1.184681, 1.305851" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.056750, 1.060440, 1.064700, 1.078500, 1.124570, 1.199680, 1.351030", \ + "1.057010, 1.060700, 1.064960, 1.078760, 1.124830, 1.199940, 1.351290", \ + "1.062250, 1.065940, 1.070200, 1.084000, 1.130070, 1.205180, 1.356530", \ + "1.070650, 1.074340, 1.078600, 1.092400, 1.138470, 1.213580, 1.364930", \ + "1.081810, 1.085500, 1.089760, 1.103560, 1.149630, 1.224740, 1.376090", \ + "1.129520, 1.133210, 1.137470, 1.151270, 1.197340, 1.272450, 1.423800", \ + "1.197070, 1.200760, 1.205020, 1.218820, 1.264890, 1.340000, 1.491350" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.872338, 0.877268, 0.881078, 0.895398, 0.940688, 1.016118, 1.168228", \ + "0.874018, 0.878948, 0.882758, 0.897078, 0.942368, 1.017798, 1.169908", \ + "0.878798, 0.883728, 0.887538, 0.901858, 0.947148, 1.022578, 1.174688", \ + "0.887398, 0.892328, 0.896138, 0.910458, 0.955748, 1.031178, 1.183288", \ + "0.898768, 0.903698, 0.907508, 0.921828, 0.967118, 1.042548, 1.194658", \ + "0.945988, 0.950918, 0.954728, 0.969048, 1.014338, 1.089768, 1.241878", \ + "1.012928, 1.017858, 1.021668, 1.035988, 1.081278, 1.156708, 1.308818" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.126310, 1.130560, 1.134830, 1.145200, 1.178440, 1.239180, 1.359800", \ + "1.127000, 1.131250, 1.135520, 1.145890, 1.179130, 1.239870, 1.360490", \ + "1.132450, 1.136700, 1.140970, 1.151340, 1.184580, 1.245320, 1.365940", \ + "1.140610, 1.144860, 1.149130, 1.159500, 1.192740, 1.253480, 1.374100", \ + "1.152000, 1.156250, 1.160520, 1.170890, 1.204130, 1.264870, 1.385490", \ + "1.196930, 1.201180, 1.205450, 1.215820, 1.249060, 1.309800, 1.430420", \ + "1.267530, 1.271780, 1.276050, 1.286420, 1.319660, 1.380400, 1.501020" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.944971, 0.949750, 0.953031, 0.962531, 0.996911, 1.055381, 1.176551", \ + "0.945441, 0.950221, 0.953501, 0.963001, 0.997381, 1.055851, 1.177021", \ + "0.950191, 0.954970, 0.958251, 0.967751, 1.002131, 1.060601, 1.181771", \ + "0.957981, 0.962761, 0.966041, 0.975541, 1.009921, 1.068391, 1.189561", \ + "0.969610, 0.974391, 0.977671, 0.987170, 1.021551, 1.080021, 1.201191", \ + "1.016331, 1.021111, 1.024390, 1.033891, 1.068271, 1.126741, 1.247911", \ + "1.085661, 1.090441, 1.093721, 1.103220, 1.137601, 1.196071, 1.317241" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.070150, 1.073840, 1.078100, 1.091900, 1.137970, 1.213080, 1.364430", \ + "1.070410, 1.074100, 1.078360, 1.092160, 1.138230, 1.213340, 1.364690", \ + "1.075650, 1.079340, 1.083600, 1.097400, 1.143470, 1.218580, 1.369930", \ + "1.084050, 1.087740, 1.092000, 1.105800, 1.151870, 1.226980, 1.378330", \ + "1.095210, 1.098900, 1.103160, 1.116960, 1.163030, 1.238140, 1.389490", \ + "1.142920, 1.146610, 1.150870, 1.164670, 1.210740, 1.285850, 1.437200", \ + "1.210470, 1.214160, 1.218420, 1.232220, 1.278290, 1.353400, 1.504750" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.883728, 0.888658, 0.892468, 0.906788, 0.952078, 1.027508, 1.179618", \ + "0.885408, 0.890338, 0.894148, 0.908468, 0.953758, 1.029188, 1.181298", \ + "0.890188, 0.895118, 0.898928, 0.913248, 0.958538, 1.033968, 1.186078", \ + "0.898788, 0.903718, 0.907528, 0.921848, 0.967138, 1.042568, 1.194678", \ + "0.910158, 0.915088, 0.918898, 0.933218, 0.978508, 1.053938, 1.206048", \ + "0.957378, 0.962308, 0.966118, 0.980438, 1.025728, 1.101158, 1.253268", \ + "1.024318, 1.029248, 1.033058, 1.047378, 1.092668, 1.168098, 1.320208" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.238310, 1.242560, 1.246830, 1.257200, 1.290440, 1.351180, 1.471800", \ + "1.239000, 1.243250, 1.247520, 1.257890, 1.291130, 1.351870, 1.472490", \ + "1.244450, 1.248700, 1.252970, 1.263340, 1.296580, 1.357320, 1.477940", \ + "1.252610, 1.256860, 1.261130, 1.271500, 1.304740, 1.365480, 1.486100", \ + "1.264000, 1.268250, 1.272520, 1.282890, 1.316130, 1.376870, 1.497490", \ + "1.308930, 1.313180, 1.317450, 1.327820, 1.361060, 1.421800, 1.542420", \ + "1.379530, 1.383780, 1.388050, 1.398420, 1.431660, 1.492400, 1.613020" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.040255, 1.045035, 1.048315, 1.057816, 1.092196, 1.150665, 1.271835", \ + "1.040725, 1.045505, 1.048785, 1.058285, 1.092666, 1.151135, 1.272306", \ + "1.045476, 1.050255, 1.053535, 1.063036, 1.097416, 1.155885, 1.277055", \ + "1.053265, 1.058045, 1.061325, 1.070825, 1.105206, 1.163675, 1.284846", \ + "1.064895, 1.069676, 1.072955, 1.082455, 1.116835, 1.175305, 1.296475", \ + "1.111615, 1.116396, 1.119675, 1.129175, 1.163555, 1.222025, 1.343195", \ + "1.180945, 1.185725, 1.189005, 1.198505, 1.232885, 1.291356, 1.412525" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.182150, 1.185840, 1.190100, 1.203900, 1.249970, 1.325080, 1.476430", \ + "1.182410, 1.186100, 1.190360, 1.204160, 1.250230, 1.325340, 1.476690", \ + "1.187650, 1.191340, 1.195600, 1.209400, 1.255470, 1.330580, 1.481930", \ + "1.196050, 1.199740, 1.204000, 1.217800, 1.263870, 1.338980, 1.490330", \ + "1.207210, 1.210900, 1.215160, 1.228960, 1.275030, 1.350140, 1.501490", \ + "1.254920, 1.258610, 1.262870, 1.276670, 1.322740, 1.397850, 1.549200", \ + "1.322470, 1.326160, 1.330420, 1.344220, 1.390290, 1.465400, 1.616750" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.978928, 0.983858, 0.987668, 1.001988, 1.047278, 1.122708, 1.274818", \ + "0.980608, 0.985538, 0.989348, 1.003668, 1.048958, 1.124388, 1.276498", \ + "0.985388, 0.990318, 0.994128, 1.008448, 1.053738, 1.129168, 1.281278", \ + "0.993988, 0.998918, 1.002728, 1.017048, 1.062338, 1.137768, 1.289878", \ + "1.005358, 1.010288, 1.014098, 1.028418, 1.073708, 1.149138, 1.301248", \ + "1.052578, 1.057508, 1.061318, 1.075638, 1.120928, 1.196358, 1.348468", \ + "1.119518, 1.124448, 1.128258, 1.142578, 1.187868, 1.263298, 1.415408" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.359010, 1.363260, 1.367530, 1.377900, 1.411140, 1.471880, 1.592500", \ + "1.359700, 1.363950, 1.368220, 1.378590, 1.411830, 1.472570, 1.593190", \ + "1.365150, 1.369400, 1.373670, 1.384040, 1.417280, 1.478020, 1.598640", \ + "1.373310, 1.377560, 1.381830, 1.392200, 1.425440, 1.486180, 1.606800", \ + "1.384700, 1.388950, 1.393220, 1.403590, 1.436830, 1.497570, 1.618190", \ + "1.429630, 1.433880, 1.438150, 1.448520, 1.481760, 1.542500, 1.663120", \ + "1.500230, 1.504480, 1.508750, 1.519120, 1.552360, 1.613100, 1.733720" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.142850, 1.147630, 1.150910, 1.160410, 1.194790, 1.253260, 1.374430", \ + "1.143320, 1.148100, 1.151380, 1.160880, 1.195260, 1.253731, 1.374900", \ + "1.148070, 1.152851, 1.156130, 1.165630, 1.200010, 1.258480, 1.379650", \ + "1.155860, 1.160640, 1.163920, 1.173420, 1.207800, 1.266271, 1.387440", \ + "1.167490, 1.172270, 1.175550, 1.185051, 1.219431, 1.277900, 1.399070", \ + "1.214211, 1.218990, 1.222271, 1.231770, 1.266150, 1.324620, 1.445790", \ + "1.283540, 1.288320, 1.291600, 1.301100, 1.335481, 1.393950, 1.515120" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.302850, 1.306540, 1.310800, 1.324600, 1.370670, 1.445780, 1.597130", \ + "1.303110, 1.306800, 1.311060, 1.324860, 1.370930, 1.446040, 1.597390", \ + "1.308350, 1.312040, 1.316300, 1.330100, 1.376170, 1.451280, 1.602630", \ + "1.316750, 1.320440, 1.324700, 1.338500, 1.384570, 1.459680, 1.611030", \ + "1.327910, 1.331600, 1.335860, 1.349660, 1.395730, 1.470840, 1.622190", \ + "1.375620, 1.379310, 1.383570, 1.397370, 1.443440, 1.518550, 1.669900", \ + "1.443170, 1.446860, 1.451120, 1.464920, 1.510990, 1.586100, 1.737450" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.081608, 1.086538, 1.090348, 1.104668, 1.149958, 1.225388, 1.377498", \ + "1.083288, 1.088218, 1.092028, 1.106348, 1.151638, 1.227068, 1.379178", \ + "1.088068, 1.092998, 1.096808, 1.111128, 1.156418, 1.231848, 1.383958", \ + "1.096668, 1.101598, 1.105408, 1.119728, 1.165018, 1.240448, 1.392558", \ + "1.108038, 1.112968, 1.116778, 1.131098, 1.176388, 1.251818, 1.403928", \ + "1.155258, 1.160188, 1.163998, 1.178318, 1.223608, 1.299038, 1.451148", \ + "1.222198, 1.227128, 1.230938, 1.245258, 1.290548, 1.365978, 1.518088" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.486110, 1.490360, 1.494630, 1.505000, 1.538240, 1.598980, 1.719600", \ + "1.486800, 1.491050, 1.495320, 1.505690, 1.538930, 1.599670, 1.720290", \ + "1.492250, 1.496500, 1.500770, 1.511140, 1.544380, 1.605120, 1.725740", \ + "1.500410, 1.504660, 1.508930, 1.519300, 1.552540, 1.613280, 1.733900", \ + "1.511800, 1.516050, 1.520320, 1.530690, 1.563930, 1.624670, 1.745290", \ + "1.556730, 1.560980, 1.565250, 1.575620, 1.608860, 1.669600, 1.790220", \ + "1.627330, 1.631580, 1.635850, 1.646220, 1.679460, 1.740200, 1.860820" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.250800, 1.255580, 1.258860, 1.268361, 1.302741, 1.361210, 1.482380", \ + "1.251270, 1.256050, 1.259330, 1.268830, 1.303211, 1.361680, 1.482851", \ + "1.256020, 1.260800, 1.264080, 1.273581, 1.307961, 1.366430, 1.487600", \ + "1.263810, 1.268590, 1.271870, 1.281370, 1.315751, 1.374220, 1.495391", \ + "1.275440, 1.280220, 1.283500, 1.293000, 1.327380, 1.385850, 1.507020", \ + "1.322160, 1.326941, 1.330220, 1.339720, 1.374100, 1.432570, 1.553740", \ + "1.391490, 1.396270, 1.399550, 1.409050, 1.443430, 1.501901, 1.623070" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.429950, 1.433640, 1.437900, 1.451700, 1.497770, 1.572880, 1.724230", \ + "1.430210, 1.433900, 1.438160, 1.451960, 1.498030, 1.573140, 1.724490", \ + "1.435450, 1.439140, 1.443400, 1.457200, 1.503270, 1.578380, 1.729730", \ + "1.443850, 1.447540, 1.451800, 1.465600, 1.511670, 1.586780, 1.738130", \ + "1.455010, 1.458700, 1.462960, 1.476760, 1.522830, 1.597940, 1.749290", \ + "1.502720, 1.506410, 1.510670, 1.524470, 1.570540, 1.645650, 1.797000", \ + "1.570270, 1.573960, 1.578220, 1.592020, 1.638090, 1.713200, 1.864550" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.189558, 1.194488, 1.198298, 1.212618, 1.257908, 1.333338, 1.485448", \ + "1.191238, 1.196168, 1.199978, 1.214298, 1.259588, 1.335018, 1.487128", \ + "1.196018, 1.200948, 1.204758, 1.219078, 1.264368, 1.339798, 1.491908", \ + "1.204618, 1.209548, 1.213358, 1.227678, 1.272968, 1.348398, 1.500508", \ + "1.215988, 1.220918, 1.224728, 1.239048, 1.284338, 1.359768, 1.511878", \ + "1.263208, 1.268138, 1.271948, 1.286268, 1.331558, 1.406988, 1.559098", \ + "1.330148, 1.335078, 1.338888, 1.353208, 1.398498, 1.473928, 1.626038" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.604310, 1.608560, 1.612830, 1.623200, 1.656440, 1.717180, 1.837800", \ + "1.605000, 1.609250, 1.613520, 1.623890, 1.657130, 1.717870, 1.838490", \ + "1.610450, 1.614700, 1.618970, 1.629340, 1.662580, 1.723320, 1.843940", \ + "1.618610, 1.622860, 1.627130, 1.637500, 1.670740, 1.731480, 1.852100", \ + "1.630000, 1.634250, 1.638520, 1.648890, 1.682130, 1.742870, 1.863490", \ + "1.674930, 1.679180, 1.683450, 1.693820, 1.727060, 1.787800, 1.908420", \ + "1.745530, 1.749780, 1.754050, 1.764420, 1.797660, 1.858400, 1.979020" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.351270, 1.356051, 1.359330, 1.368830, 1.403210, 1.461680, 1.582850", \ + "1.351741, 1.356521, 1.359800, 1.369301, 1.403680, 1.462151, 1.583320", \ + "1.356490, 1.361271, 1.364550, 1.374050, 1.408430, 1.466900, 1.588070", \ + "1.364281, 1.369061, 1.372340, 1.381841, 1.416220, 1.474691, 1.595860", \ + "1.375911, 1.380690, 1.383970, 1.393471, 1.427851, 1.486320, 1.607490", \ + "1.422631, 1.427410, 1.430691, 1.440190, 1.474571, 1.533041, 1.654211", \ + "1.491961, 1.496741, 1.500020, 1.509521, 1.543901, 1.602370, 1.723540" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.548150, 1.551840, 1.556100, 1.569900, 1.615970, 1.691080, 1.842430", \ + "1.548410, 1.552100, 1.556360, 1.570160, 1.616230, 1.691340, 1.842690", \ + "1.553650, 1.557340, 1.561600, 1.575400, 1.621470, 1.696580, 1.847930", \ + "1.562050, 1.565740, 1.570000, 1.583800, 1.629870, 1.704980, 1.856330", \ + "1.573210, 1.576900, 1.581160, 1.594960, 1.641030, 1.716140, 1.867490", \ + "1.620920, 1.624610, 1.628870, 1.642670, 1.688740, 1.763850, 1.915200", \ + "1.688470, 1.692160, 1.696420, 1.710220, 1.756290, 1.831400, 1.982750" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.290028, 1.294958, 1.298768, 1.313088, 1.358378, 1.433808, 1.585918", \ + "1.291708, 1.296638, 1.300448, 1.314768, 1.360058, 1.435488, 1.587598", \ + "1.296488, 1.301418, 1.305228, 1.319548, 1.364838, 1.440268, 1.592378", \ + "1.305088, 1.310018, 1.313828, 1.328148, 1.373438, 1.448868, 1.600978", \ + "1.316458, 1.321388, 1.325198, 1.339518, 1.384808, 1.460238, 1.612348", \ + "1.363678, 1.368608, 1.372418, 1.386738, 1.432028, 1.507458, 1.659568", \ + "1.430618, 1.435548, 1.439358, 1.453678, 1.498968, 1.574398, 1.726508" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.096510, 1.100760, 1.105030, 1.115400, 1.148640, 1.209380, 1.330000", \ + "1.097200, 1.101450, 1.105720, 1.116090, 1.149330, 1.210070, 1.330690", \ + "1.102650, 1.106900, 1.111170, 1.121540, 1.154780, 1.215520, 1.336140", \ + "1.110810, 1.115060, 1.119330, 1.129700, 1.162940, 1.223680, 1.344300", \ + "1.122200, 1.126450, 1.130720, 1.141090, 1.174330, 1.235070, 1.355690", \ + "1.167130, 1.171380, 1.175650, 1.186020, 1.219260, 1.280000, 1.400620", \ + "1.237730, 1.241980, 1.246250, 1.256620, 1.289860, 1.350600, 1.471220" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.919726, 0.924505, 0.927786, 0.937286, 0.971666, 1.030135, 1.151305", \ + "0.920196, 0.924976, 0.928256, 0.937756, 0.972136, 1.030605, 1.151776", \ + "0.924946, 0.929725, 0.933006, 0.942506, 0.976886, 1.035355, 1.156525", \ + "0.932736, 0.937516, 0.940796, 0.950296, 0.984676, 1.043145, 1.164316", \ + "0.944365, 0.949146, 0.952426, 0.961925, 0.996305, 1.054775, 1.175945", \ + "0.991085, 0.995866, 0.999145, 1.008645, 1.043025, 1.101495, 1.222665", \ + "1.060415, 1.065195, 1.068475, 1.077975, 1.112355, 1.170826, 1.291995" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.040450, 1.044140, 1.048400, 1.062200, 1.108270, 1.183380, 1.334730", \ + "1.040710, 1.044400, 1.048660, 1.062460, 1.108530, 1.183640, 1.334990", \ + "1.045950, 1.049640, 1.053900, 1.067700, 1.113770, 1.188880, 1.340230", \ + "1.054350, 1.058040, 1.062300, 1.076100, 1.122170, 1.197280, 1.348630", \ + "1.065510, 1.069200, 1.073460, 1.087260, 1.133330, 1.208440, 1.359790", \ + "1.113220, 1.116910, 1.121170, 1.134970, 1.181040, 1.256150, 1.407500", \ + "1.180770, 1.184460, 1.188720, 1.202520, 1.248590, 1.323700, 1.475050" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.858483, 0.863413, 0.867223, 0.881543, 0.926833, 1.002263, 1.154373", \ + "0.860163, 0.865093, 0.868903, 0.883223, 0.928513, 1.003943, 1.156053", \ + "0.864943, 0.869873, 0.873683, 0.888003, 0.933293, 1.008723, 1.160833", \ + "0.873543, 0.878473, 0.882283, 0.896603, 0.941893, 1.017323, 1.169433", \ + "0.884913, 0.889843, 0.893653, 0.907973, 0.953263, 1.028693, 1.180803", \ + "0.932133, 0.937063, 0.940873, 0.955193, 1.000483, 1.075913, 1.228023", \ + "0.999073, 1.004003, 1.007813, 1.022133, 1.067423, 1.142853, 1.294963" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.106510, 1.110760, 1.115030, 1.125400, 1.158640, 1.219380, 1.340000", \ + "1.107200, 1.111450, 1.115720, 1.126090, 1.159330, 1.220070, 1.340690", \ + "1.112650, 1.116900, 1.121170, 1.131540, 1.164780, 1.225520, 1.346140", \ + "1.120810, 1.125060, 1.129330, 1.139700, 1.172940, 1.233680, 1.354300", \ + "1.132200, 1.136450, 1.140720, 1.151090, 1.184330, 1.245070, 1.365690", \ + "1.177130, 1.181380, 1.185650, 1.196020, 1.229260, 1.290000, 1.410620", \ + "1.247730, 1.251980, 1.256250, 1.266620, 1.299860, 1.360600, 1.481220" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.928141, 0.932920, 0.936200, 0.945701, 0.980081, 1.038550, 1.159720", \ + "0.928611, 0.933391, 0.936670, 0.946171, 0.980551, 1.039020, 1.160191", \ + "0.933361, 0.938140, 0.941420, 0.950921, 0.985301, 1.043770, 1.164940", \ + "0.941151, 0.945931, 0.949210, 0.958711, 0.993091, 1.051560, 1.172731", \ + "0.952780, 0.957561, 0.960840, 0.970340, 1.004720, 1.063190, 1.184360", \ + "0.999500, 1.004281, 1.007560, 1.017060, 1.051441, 1.109911, 1.231081", \ + "1.068831, 1.073611, 1.076890, 1.086390, 1.120770, 1.179241, 1.300410" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.050350, 1.054040, 1.058300, 1.072100, 1.118170, 1.193280, 1.344630", \ + "1.050610, 1.054300, 1.058560, 1.072360, 1.118430, 1.193540, 1.344890", \ + "1.055850, 1.059540, 1.063800, 1.077600, 1.123670, 1.198780, 1.350130", \ + "1.064250, 1.067940, 1.072200, 1.086000, 1.132070, 1.207180, 1.358530", \ + "1.075410, 1.079100, 1.083360, 1.097160, 1.143230, 1.218340, 1.369690", \ + "1.123120, 1.126810, 1.131070, 1.144870, 1.190940, 1.266050, 1.417400", \ + "1.190670, 1.194360, 1.198620, 1.212420, 1.258490, 1.333600, 1.484950" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.866898, 0.871828, 0.875638, 0.889958, 0.935248, 1.010678, 1.162788", \ + "0.868578, 0.873508, 0.877318, 0.891638, 0.936928, 1.012358, 1.164468", \ + "0.873358, 0.878288, 0.882098, 0.896418, 0.941708, 1.017138, 1.169248", \ + "0.881958, 0.886888, 0.890698, 0.905018, 0.950308, 1.025738, 1.177848", \ + "0.893328, 0.898258, 0.902068, 0.916388, 0.961678, 1.037108, 1.189218", \ + "0.940548, 0.945478, 0.949288, 0.963608, 1.008898, 1.084328, 1.236438", \ + "1.007488, 1.012418, 1.016228, 1.030548, 1.075838, 1.151268, 1.303378" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.112910, 1.117160, 1.121430, 1.131800, 1.165040, 1.225780, 1.346400", \ + "1.113600, 1.117850, 1.122120, 1.132490, 1.165730, 1.226470, 1.347090", \ + "1.119050, 1.123300, 1.127570, 1.137940, 1.171180, 1.231920, 1.352540", \ + "1.127210, 1.131460, 1.135730, 1.146100, 1.179340, 1.240080, 1.360700", \ + "1.138600, 1.142850, 1.147120, 1.157490, 1.190730, 1.251470, 1.372090", \ + "1.183530, 1.187780, 1.192050, 1.202420, 1.235660, 1.296400, 1.417020", \ + "1.254130, 1.258380, 1.262650, 1.273020, 1.306260, 1.367000, 1.487620" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.933580, 0.938361, 0.941640, 0.951140, 0.985520, 1.043991, 1.165161", \ + "0.934051, 0.938831, 0.942110, 0.951611, 0.985990, 1.044461, 1.165631", \ + "0.938800, 0.943581, 0.946860, 0.956360, 0.990740, 1.049211, 1.170381", \ + "0.946591, 0.951371, 0.954650, 0.964151, 0.998530, 1.057001, 1.178171", \ + "0.958221, 0.963000, 0.966280, 0.975781, 1.010161, 1.068631, 1.189801", \ + "1.004941, 1.009721, 1.013001, 1.022501, 1.056881, 1.115351, 1.236521", \ + "1.074271, 1.079051, 1.082331, 1.091831, 1.126211, 1.184681, 1.305851" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.056750, 1.060440, 1.064700, 1.078500, 1.124570, 1.199680, 1.351030", \ + "1.057010, 1.060700, 1.064960, 1.078760, 1.124830, 1.199940, 1.351290", \ + "1.062250, 1.065940, 1.070200, 1.084000, 1.130070, 1.205180, 1.356530", \ + "1.070650, 1.074340, 1.078600, 1.092400, 1.138470, 1.213580, 1.364930", \ + "1.081810, 1.085500, 1.089760, 1.103560, 1.149630, 1.224740, 1.376090", \ + "1.129520, 1.133210, 1.137470, 1.151270, 1.197340, 1.272450, 1.423800", \ + "1.197070, 1.200760, 1.205020, 1.218820, 1.264890, 1.340000, 1.491350" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.872338, 0.877268, 0.881078, 0.895398, 0.940688, 1.016118, 1.168228", \ + "0.874018, 0.878948, 0.882758, 0.897078, 0.942368, 1.017798, 1.169908", \ + "0.878798, 0.883728, 0.887538, 0.901858, 0.947148, 1.022578, 1.174688", \ + "0.887398, 0.892328, 0.896138, 0.910458, 0.955748, 1.031178, 1.183288", \ + "0.898768, 0.903698, 0.907508, 0.921828, 0.967118, 1.042548, 1.194658", \ + "0.945988, 0.950918, 0.954728, 0.969048, 1.014338, 1.089768, 1.241878", \ + "1.012928, 1.017858, 1.021668, 1.035988, 1.081278, 1.156708, 1.308818" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.126310, 1.130560, 1.134830, 1.145200, 1.178440, 1.239180, 1.359800", \ + "1.127000, 1.131250, 1.135520, 1.145890, 1.179130, 1.239870, 1.360490", \ + "1.132450, 1.136700, 1.140970, 1.151340, 1.184580, 1.245320, 1.365940", \ + "1.140610, 1.144860, 1.149130, 1.159500, 1.192740, 1.253480, 1.374100", \ + "1.152000, 1.156250, 1.160520, 1.170890, 1.204130, 1.264870, 1.385490", \ + "1.196930, 1.201180, 1.205450, 1.215820, 1.249060, 1.309800, 1.430420", \ + "1.267530, 1.271780, 1.276050, 1.286420, 1.319660, 1.380400, 1.501020" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.944971, 0.949750, 0.953031, 0.962531, 0.996911, 1.055381, 1.176551", \ + "0.945441, 0.950221, 0.953501, 0.963001, 0.997381, 1.055851, 1.177021", \ + "0.950191, 0.954970, 0.958251, 0.967751, 1.002131, 1.060601, 1.181771", \ + "0.957981, 0.962761, 0.966041, 0.975541, 1.009921, 1.068391, 1.189561", \ + "0.969610, 0.974391, 0.977671, 0.987170, 1.021551, 1.080021, 1.201191", \ + "1.016331, 1.021111, 1.024390, 1.033891, 1.068271, 1.126741, 1.247911", \ + "1.085661, 1.090441, 1.093721, 1.103220, 1.137601, 1.196071, 1.317241" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.070150, 1.073840, 1.078100, 1.091900, 1.137970, 1.213080, 1.364430", \ + "1.070410, 1.074100, 1.078360, 1.092160, 1.138230, 1.213340, 1.364690", \ + "1.075650, 1.079340, 1.083600, 1.097400, 1.143470, 1.218580, 1.369930", \ + "1.084050, 1.087740, 1.092000, 1.105800, 1.151870, 1.226980, 1.378330", \ + "1.095210, 1.098900, 1.103160, 1.116960, 1.163030, 1.238140, 1.389490", \ + "1.142920, 1.146610, 1.150870, 1.164670, 1.210740, 1.285850, 1.437200", \ + "1.210470, 1.214160, 1.218420, 1.232220, 1.278290, 1.353400, 1.504750" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.883728, 0.888658, 0.892468, 0.906788, 0.952078, 1.027508, 1.179618", \ + "0.885408, 0.890338, 0.894148, 0.908468, 0.953758, 1.029188, 1.181298", \ + "0.890188, 0.895118, 0.898928, 0.913248, 0.958538, 1.033968, 1.186078", \ + "0.898788, 0.903718, 0.907528, 0.921848, 0.967138, 1.042568, 1.194678", \ + "0.910158, 0.915088, 0.918898, 0.933218, 0.978508, 1.053938, 1.206048", \ + "0.957378, 0.962308, 0.966118, 0.980438, 1.025728, 1.101158, 1.253268", \ + "1.024318, 1.029248, 1.033058, 1.047378, 1.092668, 1.168098, 1.320208" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.238310, 1.242560, 1.246830, 1.257200, 1.290440, 1.351180, 1.471800", \ + "1.239000, 1.243250, 1.247520, 1.257890, 1.291130, 1.351870, 1.472490", \ + "1.244450, 1.248700, 1.252970, 1.263340, 1.296580, 1.357320, 1.477940", \ + "1.252610, 1.256860, 1.261130, 1.271500, 1.304740, 1.365480, 1.486100", \ + "1.264000, 1.268250, 1.272520, 1.282890, 1.316130, 1.376870, 1.497490", \ + "1.308930, 1.313180, 1.317450, 1.327820, 1.361060, 1.421800, 1.542420", \ + "1.379530, 1.383780, 1.388050, 1.398420, 1.431660, 1.492400, 1.613020" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.040255, 1.045035, 1.048315, 1.057816, 1.092196, 1.150665, 1.271835", \ + "1.040725, 1.045505, 1.048785, 1.058285, 1.092666, 1.151135, 1.272306", \ + "1.045476, 1.050255, 1.053535, 1.063036, 1.097416, 1.155885, 1.277055", \ + "1.053265, 1.058045, 1.061325, 1.070825, 1.105206, 1.163675, 1.284846", \ + "1.064895, 1.069676, 1.072955, 1.082455, 1.116835, 1.175305, 1.296475", \ + "1.111615, 1.116396, 1.119675, 1.129175, 1.163555, 1.222025, 1.343195", \ + "1.180945, 1.185725, 1.189005, 1.198505, 1.232885, 1.291356, 1.412525" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.182150, 1.185840, 1.190100, 1.203900, 1.249970, 1.325080, 1.476430", \ + "1.182410, 1.186100, 1.190360, 1.204160, 1.250230, 1.325340, 1.476690", \ + "1.187650, 1.191340, 1.195600, 1.209400, 1.255470, 1.330580, 1.481930", \ + "1.196050, 1.199740, 1.204000, 1.217800, 1.263870, 1.338980, 1.490330", \ + "1.207210, 1.210900, 1.215160, 1.228960, 1.275030, 1.350140, 1.501490", \ + "1.254920, 1.258610, 1.262870, 1.276670, 1.322740, 1.397850, 1.549200", \ + "1.322470, 1.326160, 1.330420, 1.344220, 1.390290, 1.465400, 1.616750" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.978928, 0.983858, 0.987668, 1.001988, 1.047278, 1.122708, 1.274818", \ + "0.980608, 0.985538, 0.989348, 1.003668, 1.048958, 1.124388, 1.276498", \ + "0.985388, 0.990318, 0.994128, 1.008448, 1.053738, 1.129168, 1.281278", \ + "0.993988, 0.998918, 1.002728, 1.017048, 1.062338, 1.137768, 1.289878", \ + "1.005358, 1.010288, 1.014098, 1.028418, 1.073708, 1.149138, 1.301248", \ + "1.052578, 1.057508, 1.061318, 1.075638, 1.120928, 1.196358, 1.348468", \ + "1.119518, 1.124448, 1.128258, 1.142578, 1.187868, 1.263298, 1.415408" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.359010, 1.363260, 1.367530, 1.377900, 1.411140, 1.471880, 1.592500", \ + "1.359700, 1.363950, 1.368220, 1.378590, 1.411830, 1.472570, 1.593190", \ + "1.365150, 1.369400, 1.373670, 1.384040, 1.417280, 1.478020, 1.598640", \ + "1.373310, 1.377560, 1.381830, 1.392200, 1.425440, 1.486180, 1.606800", \ + "1.384700, 1.388950, 1.393220, 1.403590, 1.436830, 1.497570, 1.618190", \ + "1.429630, 1.433880, 1.438150, 1.448520, 1.481760, 1.542500, 1.663120", \ + "1.500230, 1.504480, 1.508750, 1.519120, 1.552360, 1.613100, 1.733720" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.142850, 1.147630, 1.150910, 1.160410, 1.194790, 1.253260, 1.374430", \ + "1.143320, 1.148100, 1.151380, 1.160880, 1.195260, 1.253731, 1.374900", \ + "1.148070, 1.152851, 1.156130, 1.165630, 1.200010, 1.258480, 1.379650", \ + "1.155860, 1.160640, 1.163920, 1.173420, 1.207800, 1.266271, 1.387440", \ + "1.167490, 1.172270, 1.175550, 1.185051, 1.219431, 1.277900, 1.399070", \ + "1.214211, 1.218990, 1.222271, 1.231770, 1.266150, 1.324620, 1.445790", \ + "1.283540, 1.288320, 1.291600, 1.301100, 1.335481, 1.393950, 1.515120" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.302850, 1.306540, 1.310800, 1.324600, 1.370670, 1.445780, 1.597130", \ + "1.303110, 1.306800, 1.311060, 1.324860, 1.370930, 1.446040, 1.597390", \ + "1.308350, 1.312040, 1.316300, 1.330100, 1.376170, 1.451280, 1.602630", \ + "1.316750, 1.320440, 1.324700, 1.338500, 1.384570, 1.459680, 1.611030", \ + "1.327910, 1.331600, 1.335860, 1.349660, 1.395730, 1.470840, 1.622190", \ + "1.375620, 1.379310, 1.383570, 1.397370, 1.443440, 1.518550, 1.669900", \ + "1.443170, 1.446860, 1.451120, 1.464920, 1.510990, 1.586100, 1.737450" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.081608, 1.086538, 1.090348, 1.104668, 1.149958, 1.225388, 1.377498", \ + "1.083288, 1.088218, 1.092028, 1.106348, 1.151638, 1.227068, 1.379178", \ + "1.088068, 1.092998, 1.096808, 1.111128, 1.156418, 1.231848, 1.383958", \ + "1.096668, 1.101598, 1.105408, 1.119728, 1.165018, 1.240448, 1.392558", \ + "1.108038, 1.112968, 1.116778, 1.131098, 1.176388, 1.251818, 1.403928", \ + "1.155258, 1.160188, 1.163998, 1.178318, 1.223608, 1.299038, 1.451148", \ + "1.222198, 1.227128, 1.230938, 1.245258, 1.290548, 1.365978, 1.518088" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.486110, 1.490360, 1.494630, 1.505000, 1.538240, 1.598980, 1.719600", \ + "1.486800, 1.491050, 1.495320, 1.505690, 1.538930, 1.599670, 1.720290", \ + "1.492250, 1.496500, 1.500770, 1.511140, 1.544380, 1.605120, 1.725740", \ + "1.500410, 1.504660, 1.508930, 1.519300, 1.552540, 1.613280, 1.733900", \ + "1.511800, 1.516050, 1.520320, 1.530690, 1.563930, 1.624670, 1.745290", \ + "1.556730, 1.560980, 1.565250, 1.575620, 1.608860, 1.669600, 1.790220", \ + "1.627330, 1.631580, 1.635850, 1.646220, 1.679460, 1.740200, 1.860820" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.250800, 1.255580, 1.258860, 1.268361, 1.302741, 1.361210, 1.482380", \ + "1.251270, 1.256050, 1.259330, 1.268830, 1.303211, 1.361680, 1.482851", \ + "1.256020, 1.260800, 1.264080, 1.273581, 1.307961, 1.366430, 1.487600", \ + "1.263810, 1.268590, 1.271870, 1.281370, 1.315751, 1.374220, 1.495391", \ + "1.275440, 1.280220, 1.283500, 1.293000, 1.327380, 1.385850, 1.507020", \ + "1.322160, 1.326941, 1.330220, 1.339720, 1.374100, 1.432570, 1.553740", \ + "1.391490, 1.396270, 1.399550, 1.409050, 1.443430, 1.501901, 1.623070" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.429950, 1.433640, 1.437900, 1.451700, 1.497770, 1.572880, 1.724230", \ + "1.430210, 1.433900, 1.438160, 1.451960, 1.498030, 1.573140, 1.724490", \ + "1.435450, 1.439140, 1.443400, 1.457200, 1.503270, 1.578380, 1.729730", \ + "1.443850, 1.447540, 1.451800, 1.465600, 1.511670, 1.586780, 1.738130", \ + "1.455010, 1.458700, 1.462960, 1.476760, 1.522830, 1.597940, 1.749290", \ + "1.502720, 1.506410, 1.510670, 1.524470, 1.570540, 1.645650, 1.797000", \ + "1.570270, 1.573960, 1.578220, 1.592020, 1.638090, 1.713200, 1.864550" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.189558, 1.194488, 1.198298, 1.212618, 1.257908, 1.333338, 1.485448", \ + "1.191238, 1.196168, 1.199978, 1.214298, 1.259588, 1.335018, 1.487128", \ + "1.196018, 1.200948, 1.204758, 1.219078, 1.264368, 1.339798, 1.491908", \ + "1.204618, 1.209548, 1.213358, 1.227678, 1.272968, 1.348398, 1.500508", \ + "1.215988, 1.220918, 1.224728, 1.239048, 1.284338, 1.359768, 1.511878", \ + "1.263208, 1.268138, 1.271948, 1.286268, 1.331558, 1.406988, 1.559098", \ + "1.330148, 1.335078, 1.338888, 1.353208, 1.398498, 1.473928, 1.626038" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.604310, 1.608560, 1.612830, 1.623200, 1.656440, 1.717180, 1.837800", \ + "1.605000, 1.609250, 1.613520, 1.623890, 1.657130, 1.717870, 1.838490", \ + "1.610450, 1.614700, 1.618970, 1.629340, 1.662580, 1.723320, 1.843940", \ + "1.618610, 1.622860, 1.627130, 1.637500, 1.670740, 1.731480, 1.852100", \ + "1.630000, 1.634250, 1.638520, 1.648890, 1.682130, 1.742870, 1.863490", \ + "1.674930, 1.679180, 1.683450, 1.693820, 1.727060, 1.787800, 1.908420", \ + "1.745530, 1.749780, 1.754050, 1.764420, 1.797660, 1.858400, 1.979020" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.351270, 1.356051, 1.359330, 1.368830, 1.403210, 1.461680, 1.582850", \ + "1.351741, 1.356521, 1.359800, 1.369301, 1.403680, 1.462151, 1.583320", \ + "1.356490, 1.361271, 1.364550, 1.374050, 1.408430, 1.466900, 1.588070", \ + "1.364281, 1.369061, 1.372340, 1.381841, 1.416220, 1.474691, 1.595860", \ + "1.375911, 1.380690, 1.383970, 1.393471, 1.427851, 1.486320, 1.607490", \ + "1.422631, 1.427410, 1.430691, 1.440190, 1.474571, 1.533041, 1.654211", \ + "1.491961, 1.496741, 1.500020, 1.509521, 1.543901, 1.602370, 1.723540" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.548150, 1.551840, 1.556100, 1.569900, 1.615970, 1.691080, 1.842430", \ + "1.548410, 1.552100, 1.556360, 1.570160, 1.616230, 1.691340, 1.842690", \ + "1.553650, 1.557340, 1.561600, 1.575400, 1.621470, 1.696580, 1.847930", \ + "1.562050, 1.565740, 1.570000, 1.583800, 1.629870, 1.704980, 1.856330", \ + "1.573210, 1.576900, 1.581160, 1.594960, 1.641030, 1.716140, 1.867490", \ + "1.620920, 1.624610, 1.628870, 1.642670, 1.688740, 1.763850, 1.915200", \ + "1.688470, 1.692160, 1.696420, 1.710220, 1.756290, 1.831400, 1.982750" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.290028, 1.294958, 1.298768, 1.313088, 1.358378, 1.433808, 1.585918", \ + "1.291708, 1.296638, 1.300448, 1.314768, 1.360058, 1.435488, 1.587598", \ + "1.296488, 1.301418, 1.305228, 1.319548, 1.364838, 1.440268, 1.592378", \ + "1.305088, 1.310018, 1.313828, 1.328148, 1.373438, 1.448868, 1.600978", \ + "1.316458, 1.321388, 1.325198, 1.339518, 1.384808, 1.460238, 1.612348", \ + "1.363678, 1.368608, 1.372418, 1.386738, 1.432028, 1.507458, 1.659568", \ + "1.430618, 1.435548, 1.439358, 1.453678, 1.498968, 1.574398, 1.726508" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832" \ + ); + } + } + } + bus(SOB) { + bus_type : rf2_32x128_wm1_SOB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : CLKB; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.473140, 0.479520, 0.484190, 0.497030, 0.533230, 0.592860, 0.711990", \ + "0.475370, 0.481750, 0.486420, 0.499260, 0.535460, 0.595090, 0.714220", \ + "0.480040, 0.486420, 0.491090, 0.503930, 0.540130, 0.599760, 0.718890", \ + "0.490200, 0.496580, 0.501250, 0.514090, 0.550290, 0.609920, 0.729050", \ + "0.500350, 0.506730, 0.511400, 0.524240, 0.560440, 0.620070, 0.739200", \ + "0.547990, 0.554370, 0.559040, 0.571880, 0.608080, 0.667710, 0.786840", \ + "0.612810, 0.619190, 0.623860, 0.636700, 0.672900, 0.732530, 0.851660" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.401361, 0.407531, 0.412361, 0.425201, 0.461251, 0.521052, 0.640181", \ + "0.403551, 0.409721, 0.414551, 0.427391, 0.463442, 0.523242, 0.642372", \ + "0.408261, 0.414431, 0.419261, 0.432101, 0.468151, 0.527952, 0.647082", \ + "0.418361, 0.424531, 0.429361, 0.442201, 0.478251, 0.538052, 0.657182", \ + "0.428481, 0.434651, 0.439482, 0.452321, 0.488371, 0.548172, 0.667301", \ + "0.476101, 0.482271, 0.487102, 0.499941, 0.535991, 0.595792, 0.714921", \ + "0.541022, 0.547192, 0.552022, 0.564862, 0.600912, 0.660712, 0.779842" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.458610, 0.465670, 0.472470, 0.488300, 0.535310, 0.613140, 0.768500", \ + "0.460420, 0.467480, 0.474280, 0.490110, 0.537120, 0.614950, 0.770310", \ + "0.464980, 0.472040, 0.478840, 0.494670, 0.541680, 0.619510, 0.774870", \ + "0.475130, 0.482190, 0.488990, 0.504820, 0.551830, 0.629660, 0.785020", \ + "0.485130, 0.492190, 0.498990, 0.514820, 0.561830, 0.639660, 0.795020", \ + "0.531290, 0.538350, 0.545150, 0.560980, 0.607990, 0.685820, 0.841180", \ + "0.598450, 0.605510, 0.612310, 0.628140, 0.675150, 0.752980, 0.908340" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.389045, 0.396115, 0.402875, 0.418625, 0.465715, 0.543535, 0.698905", \ + "0.390855, 0.397925, 0.404685, 0.420435, 0.467525, 0.545345, 0.700715", \ + "0.395365, 0.402435, 0.409195, 0.424945, 0.472035, 0.549855, 0.705225", \ + "0.405585, 0.412655, 0.419415, 0.435165, 0.482255, 0.560075, 0.715445", \ + "0.415585, 0.422655, 0.429415, 0.445165, 0.492255, 0.570075, 0.725445", \ + "0.461705, 0.468775, 0.475535, 0.491285, 0.538375, 0.616195, 0.771565", \ + "0.528905, 0.535975, 0.542735, 0.558485, 0.605575, 0.683395, 0.838765" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909" \ + ); + } + } + internal_power() { + related_pin : CLKB; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832" \ + ); + } + } + } + pin(CLKA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.008689; + clock : true; + max_transition : 0.419000; + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.009241, 4.011023, 4.015040, 4.019050, 4.023068, 4.027093, 4.031120"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.009311, 4.011092, 4.015110, 4.019120, 4.023138, 4.027164, 4.031190"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.009583, 4.011365, 4.015383, 4.019393, 4.023411, 4.027437, 4.031464"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.009583, 4.011365, 4.015383, 4.019393, 4.023411, 4.027437, 4.031464"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.017223, 4.019007, 4.023027, 4.027047, 4.031075, 4.035103, 4.039140"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.026359, 4.028145, 4.032175, 4.036205, 4.040243, 4.044281, 4.048327"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.026841, 4.028628, 4.032658, 4.036688, 4.040727, 4.044766, 4.048813"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.031956, 4.033743, 4.037782, 4.041821, 4.045859, 4.049907, 4.053954"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENA&TENA)|(TCENA&!TENA))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005641, 0.005647, 0.005652, 0.005658, 0.005664, 0.005669, 0.005675"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.006268, 0.006274, 0.006280, 0.006287, 0.006293, 0.006299, 0.006306"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005641, 0.005647, 0.005652, 0.005658, 0.005664, 0.005669, 0.005675"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.006268, 0.006274, 0.006280, 0.006287, 0.006293, 0.006299, 0.006306"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("3.663270, 3.666941, 3.670605, 3.674277, 3.677949, 3.681630, 3.685310"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008960, 0.008969, 0.008978, 0.008987, 0.009021, 0.009030, 0.009039"); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.842600, 0.844120, 0.848680, 0.857270, 0.868540, 0.916320, 1.087070", \ + "0.837900, 0.839420, 0.843980, 0.852570, 0.863840, 0.911620, 1.082370", \ + "0.834190, 0.835710, 0.840270, 0.848860, 0.860130, 0.907910, 1.078660", \ + "0.823860, 0.825380, 0.829940, 0.838530, 0.849800, 0.897580, 1.068330", \ + "0.815980, 0.817500, 0.822060, 0.830650, 0.841920, 0.889700, 1.060450", \ + "0.765900, 0.767420, 0.771980, 0.780570, 0.791840, 0.839620, 1.010370", \ + "0.809100, 0.810620, 0.815180, 0.823770, 0.835040, 0.882820, 1.053570" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.852600, 0.854120, 0.858680, 0.867270, 0.878540, 0.926320, 1.097070", \ + "0.847900, 0.849420, 0.853980, 0.862570, 0.873840, 0.921620, 1.092370", \ + "0.844190, 0.845710, 0.850270, 0.858860, 0.870130, 0.917910, 1.088660", \ + "0.833860, 0.835380, 0.839940, 0.848530, 0.859800, 0.907580, 1.078330", \ + "0.825980, 0.827500, 0.832060, 0.840650, 0.851920, 0.899700, 1.070450", \ + "0.775900, 0.777420, 0.781980, 0.790570, 0.801840, 0.849620, 1.020370", \ + "0.819100, 0.820620, 0.825180, 0.833770, 0.845040, 0.892820, 1.063570" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.859000, 0.860520, 0.865080, 0.873670, 0.884940, 0.932720, 1.103470", \ + "0.854300, 0.855820, 0.860380, 0.868970, 0.880240, 0.928020, 1.098770", \ + "0.850590, 0.852110, 0.856670, 0.865260, 0.876530, 0.924310, 1.095060", \ + "0.840260, 0.841780, 0.846340, 0.854930, 0.866200, 0.913980, 1.084730", \ + "0.832380, 0.833900, 0.838460, 0.847050, 0.858320, 0.906100, 1.076850", \ + "0.782300, 0.783820, 0.788380, 0.796970, 0.808240, 0.856020, 1.026770", \ + "0.825500, 0.827020, 0.831580, 0.840170, 0.851440, 0.899220, 1.069970" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.872400, 0.873920, 0.878480, 0.887070, 0.898340, 0.946120, 1.116870", \ + "0.867700, 0.869220, 0.873780, 0.882370, 0.893640, 0.941420, 1.112170", \ + "0.863990, 0.865510, 0.870070, 0.878660, 0.889930, 0.937710, 1.108460", \ + "0.853660, 0.855180, 0.859740, 0.868330, 0.879600, 0.927380, 1.098130", \ + "0.845780, 0.847300, 0.851860, 0.860450, 0.871720, 0.919500, 1.090250", \ + "0.795700, 0.797220, 0.801780, 0.810370, 0.821640, 0.869420, 1.040170", \ + "0.838900, 0.840420, 0.844980, 0.853570, 0.864840, 0.912620, 1.083370" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.984400, 0.985920, 0.990480, 0.999070, 1.010340, 1.058120, 1.228870", \ + "0.979700, 0.981220, 0.985780, 0.994370, 1.005640, 1.053420, 1.224170", \ + "0.975990, 0.977510, 0.982070, 0.990660, 1.001930, 1.049710, 1.220460", \ + "0.965660, 0.967180, 0.971740, 0.980330, 0.991600, 1.039380, 1.210130", \ + "0.957780, 0.959300, 0.963860, 0.972450, 0.983720, 1.031500, 1.202250", \ + "0.907700, 0.909220, 0.913780, 0.922370, 0.933640, 0.981420, 1.152170", \ + "0.950900, 0.952420, 0.956980, 0.965570, 0.976840, 1.024620, 1.195370" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.105100, 1.106620, 1.111180, 1.119770, 1.131040, 1.178820, 1.349570", \ + "1.100400, 1.101920, 1.106480, 1.115070, 1.126340, 1.174120, 1.344870", \ + "1.096690, 1.098210, 1.102770, 1.111360, 1.122630, 1.170410, 1.341160", \ + "1.086360, 1.087880, 1.092440, 1.101030, 1.112300, 1.160080, 1.330830", \ + "1.078480, 1.080000, 1.084560, 1.093150, 1.104420, 1.152200, 1.322950", \ + "1.028400, 1.029920, 1.034480, 1.043070, 1.054340, 1.102120, 1.272870", \ + "1.071600, 1.073120, 1.077680, 1.086270, 1.097540, 1.145320, 1.316070" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.232200, 1.233720, 1.238280, 1.246870, 1.258140, 1.305920, 1.476670", \ + "1.227500, 1.229020, 1.233580, 1.242170, 1.253440, 1.301220, 1.471970", \ + "1.223790, 1.225310, 1.229870, 1.238460, 1.249730, 1.297510, 1.468260", \ + "1.213460, 1.214980, 1.219540, 1.228130, 1.239400, 1.287180, 1.457930", \ + "1.205580, 1.207100, 1.211660, 1.220250, 1.231520, 1.279300, 1.450050", \ + "1.155500, 1.157020, 1.161580, 1.170170, 1.181440, 1.229220, 1.399970", \ + "1.198700, 1.200220, 1.204780, 1.213370, 1.224640, 1.272420, 1.443170" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.350400, 1.351920, 1.356480, 1.365070, 1.376340, 1.424120, 1.594870", \ + "1.345700, 1.347220, 1.351780, 1.360370, 1.371640, 1.419420, 1.590170", \ + "1.341990, 1.343510, 1.348070, 1.356660, 1.367930, 1.415710, 1.586460", \ + "1.331660, 1.333180, 1.337740, 1.346330, 1.357600, 1.405380, 1.576130", \ + "1.323780, 1.325300, 1.329860, 1.338450, 1.349720, 1.397500, 1.568250", \ + "1.273700, 1.275220, 1.279780, 1.288370, 1.299640, 1.347420, 1.518170", \ + "1.316900, 1.318420, 1.322980, 1.331570, 1.342840, 1.390620, 1.561370" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 1.569352; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 1.579502; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.585998; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 1.599599; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.713279; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 1.835790; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.964796; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 2.084769; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.763522; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.773570; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 1.780066; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.793667; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 1.907449; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 2.029959; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 2.158864; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 2.278837; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + } + min_pulse_width_high : 0.179020; + min_pulse_width_low : 0.193580; + } + pin(CENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001414; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.186170, 0.187150, 0.191780, 0.199530, 0.209390, 0.256430, 0.428980", \ + "0.184870, 0.185850, 0.190480, 0.198230, 0.208090, 0.255130, 0.427680", \ + "0.181160, 0.182140, 0.186770, 0.194520, 0.204380, 0.251420, 0.423970", \ + "0.176090, 0.177070, 0.181700, 0.189450, 0.199310, 0.246350, 0.418900", \ + "0.174370, 0.175350, 0.179980, 0.187730, 0.197590, 0.244630, 0.417180", \ + "0.157350, 0.158330, 0.162960, 0.170710, 0.180570, 0.227610, 0.400160", \ + "0.270120, 0.271100, 0.275730, 0.283480, 0.293340, 0.340380, 0.512930" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.209610, 0.211080, 0.214700, 0.223440, 0.238500, 0.288740, 0.468340", \ + "0.208300, 0.209770, 0.213390, 0.222130, 0.237190, 0.287430, 0.467030", \ + "0.204190, 0.205660, 0.209280, 0.218020, 0.233080, 0.283320, 0.462920", \ + "0.194500, 0.195970, 0.199590, 0.208330, 0.223390, 0.273630, 0.453230", \ + "0.183650, 0.185120, 0.188740, 0.197480, 0.212540, 0.262780, 0.442380", \ + "0.139970, 0.141360, 0.145830, 0.154190, 0.168700, 0.218150, 0.404630", \ + "0.252740, 0.254130, 0.258600, 0.266960, 0.281470, 0.330920, 0.517400" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.084115, 0.082504, 0.077959, 0.069585, 0.060215, 0.016194, 0.119750", \ + "0.085075, 0.083464, 0.078919, 0.070545, 0.061175, 0.017154, 0.119750", \ + "0.089681, 0.088070, 0.083525, 0.075151, 0.065781, 0.021760, 0.119750", \ + "0.099317, 0.097706, 0.093161, 0.084787, 0.075417, 0.031396, 0.119750", \ + "0.109317, 0.107706, 0.103161, 0.094787, 0.085417, 0.041396, 0.119750", \ + "0.156944, 0.155333, 0.150788, 0.142414, 0.133044, 0.089023, 0.130219", \ + "0.324424, 0.322813, 0.318268, 0.309894, 0.300524, 0.256503, 0.297699" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.059535, 0.058313, 0.053200, 0.045329, 0.030815, 0.015000, 0.119750", \ + "0.060251, 0.059029, 0.053916, 0.046045, 0.031531, 0.015000, 0.119750", \ + "0.065022, 0.063800, 0.058687, 0.050816, 0.036302, 0.015000, 0.119750", \ + "0.074668, 0.073446, 0.068333, 0.060462, 0.045948, 0.015000, 0.119750", \ + "0.084550, 0.083328, 0.078215, 0.070344, 0.055830, 0.015000, 0.119750", \ + "0.132235, 0.131013, 0.125900, 0.118029, 0.103515, 0.054152, 0.119750", \ + "0.299915, 0.298693, 0.293580, 0.285709, 0.271195, 0.221832, 0.246525" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.793760", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.795150", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.799280", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.809170", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.819420", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.867440", \ + "1.996961, 1.994701, 1.991681, 1.983781, 1.979127, 1.958384, 1.931660" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.691980, 0.687820, 0.687170, 0.674780, 0.666990, 0.620550, 0.540290", \ + "0.700380, 0.696220, 0.695570, 0.683180, 0.675390, 0.628950, 0.548690", \ + "0.701680, 0.697520, 0.696870, 0.684480, 0.676690, 0.630250, 0.549990", \ + "0.726380, 0.722220, 0.721570, 0.709180, 0.701390, 0.654950, 0.574690", \ + "0.741980, 0.737820, 0.737170, 0.724780, 0.716990, 0.670550, 0.590290", \ + "0.834880, 0.830720, 0.830070, 0.817680, 0.809890, 0.763450, 0.683190", \ + "0.995380, 0.991220, 0.990570, 0.978180, 0.970390, 0.923950, 0.843690" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.021448, 0.021588, 0.021610, 0.021786, 0.021807, 0.021829, 0.021851"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.037609, 0.037647, 0.037685, 0.037722, 0.038222, 0.038260, 0.038298"); + } + } + } + bus(AA) { + bus_type : rf2_32x128_wm1_AA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001718; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.251950, 0.251690, 0.257060, 0.268440, 0.275150, 0.329520, 0.521350", \ + "0.250460, 0.250200, 0.255570, 0.266950, 0.273660, 0.328030, 0.519860", \ + "0.244480, 0.244220, 0.249590, 0.260970, 0.267680, 0.322050, 0.513880", \ + "0.235050, 0.234790, 0.240160, 0.251540, 0.258250, 0.312620, 0.504450", \ + "0.226980, 0.226720, 0.232090, 0.243470, 0.250180, 0.304550, 0.496380", \ + "0.179130, 0.178870, 0.184240, 0.195620, 0.202330, 0.256700, 0.448530", \ + "0.217150, 0.216890, 0.222260, 0.233640, 0.240350, 0.294720, 0.486550" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.251950, 0.251690, 0.257060, 0.268440, 0.275150, 0.329520, 0.521350", \ + "0.250460, 0.250200, 0.255570, 0.266950, 0.273660, 0.328030, 0.519860", \ + "0.244480, 0.244220, 0.249590, 0.260970, 0.267680, 0.322050, 0.513880", \ + "0.235050, 0.234790, 0.240160, 0.251540, 0.258250, 0.312620, 0.504450", \ + "0.226980, 0.226720, 0.232090, 0.243470, 0.250180, 0.304550, 0.496380", \ + "0.179130, 0.178870, 0.184240, 0.195620, 0.202330, 0.256700, 0.448530", \ + "0.217150, 0.216890, 0.222260, 0.233640, 0.240350, 0.294720, 0.486550" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129510, 0.127700, 0.123420, 0.115180, 0.113270, 0.080092, 0.155367", \ + "0.130930, 0.129120, 0.124840, 0.116600, 0.114690, 0.081512, 0.156787", \ + "0.135030, 0.133220, 0.128940, 0.120700, 0.118790, 0.085612, 0.160887", \ + "0.144630, 0.142820, 0.138540, 0.130300, 0.128390, 0.095212, 0.170487", \ + "0.155420, 0.153610, 0.149330, 0.141090, 0.139180, 0.106002, 0.181277", \ + "0.202430, 0.200620, 0.196340, 0.188100, 0.186190, 0.153012, 0.228287", \ + "0.373820, 0.372010, 0.367730, 0.359490, 0.357580, 0.324402, 0.399677" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129500, 0.127800, 0.123410, 0.114320, 0.105541, 0.078367, 0.126361", \ + "0.130910, 0.129210, 0.124820, 0.115730, 0.106951, 0.079777, 0.127771", \ + "0.135010, 0.133310, 0.128920, 0.119830, 0.111051, 0.083877, 0.131871", \ + "0.144610, 0.142910, 0.138520, 0.129430, 0.120651, 0.093477, 0.141471", \ + "0.155400, 0.153700, 0.149310, 0.140220, 0.131441, 0.104267, 0.152261", \ + "0.202420, 0.200720, 0.196330, 0.187240, 0.178461, 0.151287, 0.199281", \ + "0.373800, 0.372100, 0.367710, 0.358620, 0.349841, 0.322667, 0.370661" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.251950, 0.251690, 0.257060, 0.268440, 0.275150, 0.329520, 0.521350", \ + "0.250460, 0.250200, 0.255570, 0.266950, 0.273660, 0.328030, 0.519860", \ + "0.244480, 0.244220, 0.249590, 0.260970, 0.267680, 0.322050, 0.513880", \ + "0.235050, 0.234790, 0.240160, 0.251540, 0.258250, 0.312620, 0.504450", \ + "0.226980, 0.226720, 0.232090, 0.243470, 0.250180, 0.304550, 0.496380", \ + "0.179130, 0.178870, 0.184240, 0.195620, 0.202330, 0.256700, 0.448530", \ + "0.217150, 0.216890, 0.222260, 0.233640, 0.240350, 0.294720, 0.486550" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.251950, 0.251690, 0.257060, 0.268440, 0.275150, 0.329520, 0.521350", \ + "0.250460, 0.250200, 0.255570, 0.266950, 0.273660, 0.328030, 0.519860", \ + "0.244480, 0.244220, 0.249590, 0.260970, 0.267680, 0.322050, 0.513880", \ + "0.235050, 0.234790, 0.240160, 0.251540, 0.258250, 0.312620, 0.504450", \ + "0.226980, 0.226720, 0.232090, 0.243470, 0.250180, 0.304550, 0.496380", \ + "0.179130, 0.178870, 0.184240, 0.195620, 0.202330, 0.256700, 0.448530", \ + "0.217150, 0.216890, 0.222260, 0.233640, 0.240350, 0.294720, 0.486550" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129510, 0.127700, 0.123420, 0.115180, 0.113270, 0.080092, 0.155367", \ + "0.130930, 0.129120, 0.124840, 0.116600, 0.114690, 0.081512, 0.156787", \ + "0.135030, 0.133220, 0.128940, 0.120700, 0.118790, 0.085612, 0.160887", \ + "0.144630, 0.142820, 0.138540, 0.130300, 0.128390, 0.095212, 0.170487", \ + "0.155420, 0.153610, 0.149330, 0.141090, 0.139180, 0.106002, 0.181277", \ + "0.202430, 0.200620, 0.196340, 0.188100, 0.186190, 0.153012, 0.228287", \ + "0.373820, 0.372010, 0.367730, 0.359490, 0.357580, 0.324402, 0.399677" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129500, 0.127800, 0.123410, 0.114320, 0.105541, 0.078367, 0.126361", \ + "0.130910, 0.129210, 0.124820, 0.115730, 0.106951, 0.079777, 0.127771", \ + "0.135010, 0.133310, 0.128920, 0.119830, 0.111051, 0.083877, 0.131871", \ + "0.144610, 0.142910, 0.138520, 0.129430, 0.120651, 0.093477, 0.141471", \ + "0.155400, 0.153700, 0.149310, 0.140220, 0.131441, 0.104267, 0.152261", \ + "0.202420, 0.200720, 0.196330, 0.187240, 0.178461, 0.151287, 0.199281", \ + "0.373800, 0.372100, 0.367710, 0.358620, 0.349841, 0.322667, 0.370661" \ + ); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011463, 0.011464, 0.011476, 0.011487, 0.011499, 0.011510, 0.011522"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.010113, 0.010133, 0.010143, 0.010153, 0.010163, 0.010174, 0.010184"); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011463, 0.011464, 0.011476, 0.011487, 0.011499, 0.011510, 0.011522"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.010113, 0.010133, 0.010143, 0.010153, 0.010163, 0.010174, 0.010184"); + } + } + } + pin(CLKB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.008763; + clock : true; + max_transition : 0.419000; + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.245568, 4.247938, 4.252188, 4.256438, 4.260696, 4.264963, 4.269222"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.245638, 4.248009, 4.252258, 4.256508, 4.260767, 4.265033, 4.269292"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.245910, 4.248281, 4.252531, 4.256781, 4.261040, 4.265307, 4.269566"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.245910, 4.248281, 4.252531, 4.256781, 4.261040, 4.265307, 4.269566"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.253550, 4.255922, 4.260183, 4.264435, 4.268704, 4.272973, 4.277242"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.262759, 4.265134, 4.269396, 4.273666, 4.277937, 4.282216, 4.286503"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.263250, 4.265624, 4.269887, 4.274158, 4.278429, 4.282708, 4.286996"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("4.268284, 4.270659, 4.274930, 4.279209, 4.283488, 4.287768, 4.292056"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENB&TENB)|(TCENB&!TENB))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005426, 0.005432, 0.005437, 0.005443, 0.005472, 0.005478, 0.005483"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.006029, 0.006035, 0.006041, 0.006047, 0.006080, 0.006086, 0.006092"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005426, 0.005432, 0.005437, 0.005443, 0.005472, 0.005478, 0.005483"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.006029, 0.006035, 0.006041, 0.006047, 0.006080, 0.006086, 0.006092"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("2.792685, 2.792952, 2.795752, 2.798560, 2.801366, 2.804163, 2.806976"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008726, 0.008735, 0.008744, 0.008855, 0.009012, 0.009021, 0.009030"); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.179790, 1.181400, 1.185860, 1.194730, 1.205420, 1.253120, 1.422760", \ + "1.178360, 1.179970, 1.184430, 1.193300, 1.203990, 1.251690, 1.421330", \ + "1.172570, 1.174180, 1.178640, 1.187510, 1.198200, 1.245900, 1.415540", \ + "1.164660, 1.166270, 1.170730, 1.179600, 1.190290, 1.237990, 1.407630", \ + "1.154030, 1.155640, 1.160100, 1.168970, 1.179660, 1.227360, 1.397000", \ + "1.106310, 1.107920, 1.112380, 1.121250, 1.131940, 1.179640, 1.349280", \ + "1.146020, 1.147630, 1.152090, 1.160960, 1.171650, 1.219350, 1.388990" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.200690, 1.202300, 1.206760, 1.215630, 1.226320, 1.274020, 1.443660", \ + "1.199260, 1.200870, 1.205330, 1.214200, 1.224890, 1.272590, 1.442230", \ + "1.193470, 1.195080, 1.199540, 1.208410, 1.219100, 1.266800, 1.436440", \ + "1.185560, 1.187170, 1.191630, 1.200500, 1.211190, 1.258890, 1.428530", \ + "1.174930, 1.176540, 1.181000, 1.189870, 1.200560, 1.248260, 1.417900", \ + "1.127210, 1.128820, 1.133280, 1.142150, 1.152840, 1.200540, 1.370180", \ + "1.166920, 1.168530, 1.172990, 1.181860, 1.192550, 1.240250, 1.409890" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.220690, 1.222300, 1.226760, 1.235630, 1.246320, 1.294020, 1.463660", \ + "1.219260, 1.220870, 1.225330, 1.234200, 1.244890, 1.292590, 1.462230", \ + "1.213470, 1.215080, 1.219540, 1.228410, 1.239100, 1.286800, 1.456440", \ + "1.205560, 1.207170, 1.211630, 1.220500, 1.231190, 1.278890, 1.448530", \ + "1.194930, 1.196540, 1.201000, 1.209870, 1.220560, 1.268260, 1.437900", \ + "1.147210, 1.148820, 1.153280, 1.162150, 1.172840, 1.220540, 1.390180", \ + "1.186920, 1.188530, 1.192990, 1.201860, 1.212550, 1.260250, 1.429890" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.252390, 1.254000, 1.258460, 1.267330, 1.278020, 1.325720, 1.495360", \ + "1.250960, 1.252570, 1.257030, 1.265900, 1.276590, 1.324290, 1.493930", \ + "1.245170, 1.246780, 1.251240, 1.260110, 1.270800, 1.318500, 1.488140", \ + "1.237260, 1.238870, 1.243330, 1.252200, 1.262890, 1.310590, 1.480230", \ + "1.226630, 1.228240, 1.232700, 1.241570, 1.252260, 1.299960, 1.469600", \ + "1.178910, 1.180520, 1.184980, 1.193850, 1.204540, 1.252240, 1.421880", \ + "1.218620, 1.220230, 1.224690, 1.233560, 1.244250, 1.291950, 1.461590" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.386590, 1.388200, 1.392660, 1.401530, 1.412220, 1.459920, 1.629560", \ + "1.385160, 1.386770, 1.391230, 1.400100, 1.410790, 1.458490, 1.628130", \ + "1.379370, 1.380980, 1.385440, 1.394310, 1.405000, 1.452700, 1.622340", \ + "1.371460, 1.373070, 1.377530, 1.386400, 1.397090, 1.444790, 1.614430", \ + "1.360830, 1.362440, 1.366900, 1.375770, 1.386460, 1.434160, 1.603800", \ + "1.313110, 1.314720, 1.319180, 1.328050, 1.338740, 1.386440, 1.556080", \ + "1.352820, 1.354430, 1.358890, 1.367760, 1.378450, 1.426150, 1.595790" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.501690, 1.503300, 1.507760, 1.516630, 1.527320, 1.575020, 1.744660", \ + "1.500260, 1.501870, 1.506330, 1.515200, 1.525890, 1.573590, 1.743230", \ + "1.494470, 1.496080, 1.500540, 1.509410, 1.520100, 1.567800, 1.737440", \ + "1.486560, 1.488170, 1.492630, 1.501500, 1.512190, 1.559890, 1.729530", \ + "1.475930, 1.477540, 1.482000, 1.490870, 1.501560, 1.549260, 1.718900", \ + "1.428210, 1.429820, 1.434280, 1.443150, 1.453840, 1.501540, 1.671180", \ + "1.467920, 1.469530, 1.473990, 1.482860, 1.493550, 1.541250, 1.710890" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.653590, 1.655200, 1.659660, 1.668530, 1.679220, 1.726920, 1.896560", \ + "1.652160, 1.653770, 1.658230, 1.667100, 1.677790, 1.725490, 1.895130", \ + "1.646370, 1.647980, 1.652440, 1.661310, 1.672000, 1.719700, 1.889340", \ + "1.638460, 1.640070, 1.644530, 1.653400, 1.664090, 1.711790, 1.881430", \ + "1.627830, 1.629440, 1.633900, 1.642770, 1.653460, 1.701160, 1.870800", \ + "1.580110, 1.581720, 1.586180, 1.595050, 1.605740, 1.653440, 1.823080", \ + "1.619820, 1.621430, 1.625890, 1.634760, 1.645450, 1.693150, 1.862790" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.766290, 1.767900, 1.772360, 1.781230, 1.791920, 1.839620, 2.009260", \ + "1.764860, 1.766470, 1.770930, 1.779800, 1.790490, 1.838190, 2.007830", \ + "1.759070, 1.760680, 1.765140, 1.774010, 1.784700, 1.832400, 2.002040", \ + "1.751160, 1.752770, 1.757230, 1.766100, 1.776790, 1.824490, 1.994130", \ + "1.740530, 1.742140, 1.746600, 1.755470, 1.766160, 1.813860, 1.983500", \ + "1.692810, 1.694420, 1.698880, 1.707750, 1.718440, 1.766140, 1.935780", \ + "1.732520, 1.734130, 1.738590, 1.747460, 1.758150, 1.805850, 1.975490" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 1.729032; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 1.750246; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 1.770546; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 1.802721; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + } + minimum_period() { + constraint : 1.938833; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 2.055659; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 2.209838; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 2.324330; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.126620, 0.129360, 0.133140, 0.143360, 0.154130, 0.201400, 0.267310"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.126620, 0.129360, 0.133140, 0.143360, 0.154130, 0.201400, 0.267310"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.126620, 0.129360, 0.133140, 0.143360, 0.154130, 0.201400, 0.267310"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.126620, 0.129360, 0.133140, 0.143360, 0.154130, 0.201400, 0.267310"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.322270, 0.323320, 0.329120, 0.339070, 0.349380, 0.395640, 0.460180"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.322270, 0.323320, 0.329120, 0.339070, 0.349380, 0.395640, 0.460180"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.322270, 0.323320, 0.329120, 0.339070, 0.349380, 0.395640, 0.460180"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.322270, 0.323320, 0.329120, 0.339070, 0.349380, 0.395640, 0.460180"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + } + min_pulse_width_high : 0.181250; + min_pulse_width_low : 0.175960; + } + pin(CENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001143; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.193090, 0.194380, 0.198570, 0.208390, 0.217170, 0.264650, 0.431010", \ + "0.191750, 0.193040, 0.197230, 0.207050, 0.215830, 0.263310, 0.429670", \ + "0.188180, 0.189470, 0.193660, 0.203480, 0.212260, 0.259740, 0.426100", \ + "0.183040, 0.184330, 0.188520, 0.198340, 0.207120, 0.254600, 0.420960", \ + "0.181330, 0.182620, 0.186810, 0.196630, 0.205410, 0.252890, 0.419250", \ + "0.165400, 0.166690, 0.170880, 0.180700, 0.189480, 0.236960, 0.403320", \ + "0.278980, 0.280270, 0.284460, 0.294280, 0.303060, 0.350540, 0.516900" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.214130, 0.217020, 0.220530, 0.229670, 0.241040, 0.294870, 0.474800", \ + "0.211730, 0.214620, 0.218130, 0.227270, 0.238640, 0.292470, 0.472400", \ + "0.207320, 0.210210, 0.213720, 0.222860, 0.234230, 0.288060, 0.467990", \ + "0.197290, 0.200180, 0.203690, 0.212830, 0.224200, 0.278030, 0.457960", \ + "0.187170, 0.190060, 0.193570, 0.202710, 0.214080, 0.267910, 0.447840", \ + "0.146800, 0.148410, 0.154530, 0.163870, 0.175990, 0.226060, 0.412550", \ + "0.260370, 0.261980, 0.268100, 0.277440, 0.289560, 0.339630, 0.526120" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.084396, 0.082422, 0.077850, 0.068274, 0.058717, 0.015000, 0.119750", \ + "0.086341, 0.084367, 0.079795, 0.070219, 0.060662, 0.016255, 0.119750", \ + "0.091137, 0.089163, 0.084591, 0.075015, 0.065458, 0.021051, 0.119750", \ + "0.101094, 0.099120, 0.094548, 0.084972, 0.075415, 0.031008, 0.119750", \ + "0.111368, 0.109394, 0.104822, 0.095246, 0.085689, 0.041282, 0.119750", \ + "0.158628, 0.156654, 0.152082, 0.142506, 0.132949, 0.088542, 0.138388", \ + "0.325198, 0.323224, 0.318652, 0.309076, 0.299519, 0.255112, 0.304958" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.050347, 0.048834, 0.043232, 0.033858, 0.021832, 0.015000, 0.119750", \ + "0.052461, 0.050948, 0.045346, 0.035972, 0.023946, 0.015000, 0.119750", \ + "0.056877, 0.055364, 0.049762, 0.040388, 0.028362, 0.015000, 0.119750", \ + "0.067101, 0.065588, 0.059986, 0.050612, 0.038586, 0.015000, 0.119750", \ + "0.077236, 0.075723, 0.070121, 0.060747, 0.048721, 0.015000, 0.119750", \ + "0.124961, 0.123448, 0.117846, 0.108472, 0.096446, 0.045184, 0.119750", \ + "0.291631, 0.290118, 0.284516, 0.275142, 0.263116, 0.211854, 0.237555" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.793760", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.795150", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.799280", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.809170", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.819420", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.867440", \ + "1.996961, 1.994701, 1.991681, 1.983781, 1.979127, 1.958384, 1.931660" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.691980, 0.687820, 0.687170, 0.674780, 0.666990, 0.620550, 0.540290", \ + "0.700380, 0.696220, 0.695570, 0.683180, 0.675390, 0.628950, 0.548690", \ + "0.701680, 0.697520, 0.696870, 0.684480, 0.676690, 0.630250, 0.549990", \ + "0.726380, 0.722220, 0.721570, 0.709180, 0.701390, 0.654950, 0.574690", \ + "0.741980, 0.737820, 0.737170, 0.724780, 0.716990, 0.670550, 0.590290", \ + "0.834880, 0.830720, 0.830070, 0.817680, 0.809890, 0.763450, 0.683190", \ + "0.995380, 0.991220, 0.990570, 0.978180, 0.970390, 0.923950, 0.843690" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.021448, 0.021588, 0.021610, 0.021786, 0.021807, 0.021829, 0.021851"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.037609, 0.037647, 0.037685, 0.037722, 0.038222, 0.038260, 0.038298"); + } + } + } + bus(WENB) { + bus_type : rf2_32x128_wm1_WENB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001627; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.089391, 0.090351, 0.093671, 0.102421, 0.113271, 0.162481, 0.343351", \ + "0.087191, 0.088151, 0.091471, 0.100221, 0.111071, 0.160281, 0.341151", \ + "0.081651, 0.082611, 0.085931, 0.094681, 0.105531, 0.154741, 0.335611", \ + "0.071751, 0.072711, 0.076031, 0.084781, 0.095631, 0.144841, 0.325711", \ + "0.061851, 0.062811, 0.066131, 0.074881, 0.085731, 0.134941, 0.315811", \ + "0.015421, 0.016381, 0.019701, 0.028451, 0.039301, 0.088511, 0.269381", \ + "0.119750, 0.119750, 0.119750, 0.119750, 0.119750, 0.128131, 0.309001" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.085036, 0.085746, 0.090386, 0.100676, 0.111586, 0.164586, 0.360726", \ + "0.082856, 0.083566, 0.088206, 0.098496, 0.109406, 0.162406, 0.358546", \ + "0.077316, 0.078026, 0.082666, 0.092956, 0.103866, 0.156866, 0.353006", \ + "0.067386, 0.068096, 0.072736, 0.083026, 0.093936, 0.146936, 0.343076", \ + "0.057506, 0.058216, 0.062856, 0.073146, 0.084056, 0.137056, 0.333196", \ + "0.015000, 0.015000, 0.016442, 0.026732, 0.037642, 0.090642, 0.286782", \ + "0.119750, 0.119750, 0.119750, 0.119750, 0.119750, 0.130236, 0.326376" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.307540, 0.305880, 0.301550, 0.292840, 0.284350, 0.252240, 0.333769", \ + "0.308480, 0.306820, 0.302490, 0.293780, 0.285290, 0.253180, 0.334709", \ + "0.314280, 0.312620, 0.308290, 0.299580, 0.291090, 0.258980, 0.340509", \ + "0.324220, 0.322560, 0.318230, 0.309520, 0.301030, 0.268920, 0.350449", \ + "0.334540, 0.332880, 0.328550, 0.319840, 0.311350, 0.279240, 0.360769", \ + "0.380800, 0.379140, 0.374810, 0.366100, 0.357610, 0.325500, 0.407029", \ + "0.550080, 0.548420, 0.544090, 0.535380, 0.526890, 0.494780, 0.576309" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304130, 0.302270, 0.298000, 0.288290, 0.279550, 0.240240, 0.278803", \ + "0.305180, 0.303320, 0.299050, 0.289340, 0.280600, 0.241290, 0.279853", \ + "0.310980, 0.309120, 0.304850, 0.295140, 0.286400, 0.247090, 0.285653", \ + "0.320920, 0.319060, 0.314790, 0.305080, 0.296340, 0.257030, 0.295593", \ + "0.331230, 0.329370, 0.325100, 0.315390, 0.306650, 0.267340, 0.305903", \ + "0.377500, 0.375640, 0.371370, 0.361660, 0.352920, 0.313610, 0.352173", \ + "0.546780, 0.544920, 0.540650, 0.530940, 0.522200, 0.482890, 0.521453" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.002735, 0.002738, 0.002776, 0.002779, 0.002781, 0.002784, 0.002787"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003423, 0.003426, 0.003430, 0.003433, 0.003436, 0.003440, 0.003443"); + } + } + } + bus(AB) { + bus_type : rf2_32x128_wm1_AB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001473; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.256640, 0.258870, 0.263550, 0.272220, 0.282640, 0.332360, 0.527260", \ + "0.254990, 0.257220, 0.261900, 0.270570, 0.280990, 0.330710, 0.525610", \ + "0.251060, 0.253290, 0.257970, 0.266640, 0.277060, 0.326780, 0.521680", \ + "0.241030, 0.243260, 0.247940, 0.256610, 0.267030, 0.316750, 0.511650", \ + "0.230150, 0.232380, 0.237060, 0.245730, 0.256150, 0.305870, 0.500770", \ + "0.182790, 0.185020, 0.189700, 0.198370, 0.208790, 0.258510, 0.453410", \ + "0.222320, 0.224550, 0.229230, 0.237900, 0.248320, 0.298040, 0.492940" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.256640, 0.258870, 0.263550, 0.272220, 0.282640, 0.332360, 0.527260", \ + "0.254990, 0.257220, 0.261900, 0.270570, 0.280990, 0.330710, 0.525610", \ + "0.251060, 0.253290, 0.257970, 0.266640, 0.277060, 0.326780, 0.521680", \ + "0.241030, 0.243260, 0.247940, 0.256610, 0.267030, 0.316750, 0.511650", \ + "0.230150, 0.232380, 0.237060, 0.245730, 0.256150, 0.305870, 0.500770", \ + "0.182790, 0.185020, 0.189700, 0.198370, 0.208790, 0.258510, 0.453410", \ + "0.222320, 0.224550, 0.229230, 0.237900, 0.248320, 0.298040, 0.492940" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120561, 0.118751, 0.114461, 0.106210, 0.098763, 0.071555, 0.140846", \ + "0.123311, 0.121501, 0.117211, 0.108960, 0.101513, 0.074305, 0.143596", \ + "0.127091, 0.125281, 0.120991, 0.112740, 0.105293, 0.078085, 0.147376", \ + "0.137291, 0.135481, 0.131191, 0.122940, 0.115493, 0.088285, 0.157576", \ + "0.148071, 0.146261, 0.141971, 0.133720, 0.126273, 0.099065, 0.168356", \ + "0.195351, 0.193541, 0.189251, 0.181000, 0.173553, 0.146345, 0.215636", \ + "0.366001, 0.364191, 0.359901, 0.351650, 0.344203, 0.316995, 0.386286" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120360, 0.118670, 0.114300, 0.105270, 0.095091, 0.061692, 0.119750", \ + "0.123100, 0.121410, 0.117040, 0.108010, 0.097831, 0.064432, 0.119750", \ + "0.126880, 0.125190, 0.120820, 0.111790, 0.101611, 0.068212, 0.123368", \ + "0.137100, 0.135410, 0.131040, 0.122010, 0.111831, 0.078432, 0.133588", \ + "0.147880, 0.146190, 0.141820, 0.132790, 0.122611, 0.089212, 0.144368", \ + "0.195140, 0.193450, 0.189080, 0.180050, 0.169871, 0.136472, 0.191628", \ + "0.365810, 0.364120, 0.359750, 0.350720, 0.340541, 0.307142, 0.362298" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.256640, 0.258870, 0.263550, 0.272220, 0.282640, 0.332360, 0.527260", \ + "0.254990, 0.257220, 0.261900, 0.270570, 0.280990, 0.330710, 0.525610", \ + "0.251060, 0.253290, 0.257970, 0.266640, 0.277060, 0.326780, 0.521680", \ + "0.241030, 0.243260, 0.247940, 0.256610, 0.267030, 0.316750, 0.511650", \ + "0.230150, 0.232380, 0.237060, 0.245730, 0.256150, 0.305870, 0.500770", \ + "0.182790, 0.185020, 0.189700, 0.198370, 0.208790, 0.258510, 0.453410", \ + "0.222320, 0.224550, 0.229230, 0.237900, 0.248320, 0.298040, 0.492940" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.256640, 0.258870, 0.263550, 0.272220, 0.282640, 0.332360, 0.527260", \ + "0.254990, 0.257220, 0.261900, 0.270570, 0.280990, 0.330710, 0.525610", \ + "0.251060, 0.253290, 0.257970, 0.266640, 0.277060, 0.326780, 0.521680", \ + "0.241030, 0.243260, 0.247940, 0.256610, 0.267030, 0.316750, 0.511650", \ + "0.230150, 0.232380, 0.237060, 0.245730, 0.256150, 0.305870, 0.500770", \ + "0.182790, 0.185020, 0.189700, 0.198370, 0.208790, 0.258510, 0.453410", \ + "0.222320, 0.224550, 0.229230, 0.237900, 0.248320, 0.298040, 0.492940" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120561, 0.118751, 0.114461, 0.106210, 0.098763, 0.071555, 0.140846", \ + "0.123311, 0.121501, 0.117211, 0.108960, 0.101513, 0.074305, 0.143596", \ + "0.127091, 0.125281, 0.120991, 0.112740, 0.105293, 0.078085, 0.147376", \ + "0.137291, 0.135481, 0.131191, 0.122940, 0.115493, 0.088285, 0.157576", \ + "0.148071, 0.146261, 0.141971, 0.133720, 0.126273, 0.099065, 0.168356", \ + "0.195351, 0.193541, 0.189251, 0.181000, 0.173553, 0.146345, 0.215636", \ + "0.366001, 0.364191, 0.359901, 0.351650, 0.344203, 0.316995, 0.386286" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120360, 0.118670, 0.114300, 0.105270, 0.095091, 0.061692, 0.119750", \ + "0.123100, 0.121410, 0.117040, 0.108010, 0.097831, 0.064432, 0.119750", \ + "0.126880, 0.125190, 0.120820, 0.111790, 0.101611, 0.068212, 0.123368", \ + "0.137100, 0.135410, 0.131040, 0.122010, 0.111831, 0.078432, 0.133588", \ + "0.147880, 0.146190, 0.141820, 0.132790, 0.122611, 0.089212, 0.144368", \ + "0.195140, 0.193450, 0.189080, 0.180050, 0.169871, 0.136472, 0.191628", \ + "0.365810, 0.364120, 0.359750, 0.350720, 0.340541, 0.307142, 0.362298" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.013219, 0.013232, 0.013246, 0.013259, 0.013272, 0.013285, 0.013299"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011930, 0.011931, 0.011943, 0.011955, 0.011967, 0.011979, 0.011991"); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.013219, 0.013232, 0.013246, 0.013259, 0.013272, 0.013285, 0.013299"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011930, 0.011931, 0.011943, 0.011955, 0.011967, 0.011979, 0.011991"); + } + } + } + bus(DB) { + bus_type : rf2_32x128_wm1_DB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : AB; + clocked_on : CLKB; + } + capacitance : 0.001824; + max_transition : 0.419000; + pin(DB[127]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[127])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[126]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[126])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[125]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[125])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[124]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[124])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[123]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[123])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[122]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[122])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[121]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[121])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[120]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[120])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[119]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[119])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[118]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[118])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[117]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[117])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[116]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[116])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[115]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[115])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[114]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[114])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[113]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[113])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[112]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[112])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[111]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[111])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[110]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[110])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[109]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[109])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[108]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[108])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[107]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[107])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[106]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[106])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[105]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[105])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[104]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[104])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[103]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[103])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[102]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[102])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[101]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[101])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[100]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[100])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[99]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[99])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[98]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[98])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[97]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[97])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[96]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[96])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[95]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[95])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[94]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[94])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[93]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[93])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[92]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[92])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[91]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[91])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[90]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[90])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[89]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[89])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[88]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[88])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[87]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[87])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[86]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[86])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[85]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[85])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[84]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[84])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[83]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[83])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[82]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[82])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[81]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[81])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[80]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[80])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[79]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[79])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[78]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[78])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[77]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[77])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[76]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[76])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[75]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[75])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[74]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[74])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[73]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[73])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[72]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[72])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[71]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[71])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[70]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[70])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[69]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[69])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[68]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[68])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[67]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[67])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[66]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[66])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[65]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[65])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[64]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[64])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[63]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[63])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[62]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[62])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[61]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[61])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[60]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[60])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[59]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[59])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[58]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[58])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[57]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[57])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[56]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[56])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[55]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[55])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[54]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[54])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[53]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[53])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[52]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[52])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[51]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[51])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[50]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[50])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[49]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[49])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[48]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[48])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[47]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[47])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[46]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[46])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[45]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[45])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[44]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[44])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[43]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[43])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[42]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[42])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[41]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[41])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[40]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[40])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[39]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[39])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[38]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[38])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[37]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[37])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[36]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[36])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[35]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[35])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[34]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[34])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[33]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[33])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[32]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[32])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[31]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[31])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[30]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[30])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[29]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[29])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[28]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[28])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[27]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[27])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[26]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[26])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[25]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[25])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[24]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[24])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[23]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[23])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[22]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[22])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[21]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[21])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[20]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[20])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[19]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[19])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[18]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[18])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[17]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[17])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[16]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[16])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[15]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[15])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[14]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[14])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[13]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[13])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[12]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[12])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[11]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[11])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[10]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[10])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[9]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[9])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[8]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[8])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[7]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[7])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[6]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[6])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[5]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[5])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[4]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[4])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[3]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[3])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[2]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[2])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[1]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[1])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(DB[0]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[0])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + } + bus(EMAA) { + bus_type : rf2_32x128_wm1_EMAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005565; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682554, 1.683874, 1.688344, 1.700024, 1.709344, 1.757094, 1.929424", \ + "1.681024, 1.682344, 1.686814, 1.698494, 1.707814, 1.755564, 1.927894", \ + "1.676204, 1.677524, 1.681994, 1.693674, 1.702994, 1.750744, 1.923074", \ + "1.666804, 1.668124, 1.672594, 1.684274, 1.693594, 1.741344, 1.913674", \ + "1.656174, 1.657494, 1.661964, 1.673644, 1.682964, 1.730714, 1.903044", \ + "1.608030, 1.609350, 1.613820, 1.625500, 1.634820, 1.682570, 1.854900", \ + "1.649238, 1.650558, 1.655028, 1.666708, 1.676028, 1.723778, 1.896108" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682554, 1.683874, 1.688344, 1.700024, 1.709344, 1.757094, 1.929424", \ + "1.681024, 1.682344, 1.686814, 1.698494, 1.707814, 1.755564, 1.927894", \ + "1.676204, 1.677524, 1.681994, 1.693674, 1.702994, 1.750744, 1.923074", \ + "1.666804, 1.668124, 1.672594, 1.684274, 1.693594, 1.741344, 1.913674", \ + "1.656174, 1.657494, 1.661964, 1.673644, 1.682964, 1.730714, 1.903044", \ + "1.608030, 1.609350, 1.613820, 1.625500, 1.634820, 1.682570, 1.854900", \ + "1.649238, 1.650558, 1.655028, 1.666708, 1.676028, 1.723778, 1.896108" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + } + } + pin(EMASA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002060; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682554, 1.683874, 1.688344, 1.700024, 1.709344, 1.757094, 1.929424", \ + "1.681024, 1.682344, 1.686814, 1.698494, 1.707814, 1.755564, 1.927894", \ + "1.676204, 1.677524, 1.681994, 1.693674, 1.702994, 1.750744, 1.923074", \ + "1.666804, 1.668124, 1.672594, 1.684274, 1.693594, 1.741344, 1.913674", \ + "1.656174, 1.657494, 1.661964, 1.673644, 1.682964, 1.730714, 1.903044", \ + "1.608030, 1.609350, 1.613820, 1.625500, 1.634820, 1.682570, 1.854900", \ + "1.649238, 1.650558, 1.655028, 1.666708, 1.676028, 1.723778, 1.896108" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682554, 1.683874, 1.688344, 1.700024, 1.709344, 1.757094, 1.929424", \ + "1.681024, 1.682344, 1.686814, 1.698494, 1.707814, 1.755564, 1.927894", \ + "1.676204, 1.677524, 1.681994, 1.693674, 1.702994, 1.750744, 1.923074", \ + "1.666804, 1.668124, 1.672594, 1.684274, 1.693594, 1.741344, 1.913674", \ + "1.656174, 1.657494, 1.661964, 1.673644, 1.682964, 1.730714, 1.903044", \ + "1.608030, 1.609350, 1.613820, 1.625500, 1.634820, 1.682570, 1.854900", \ + "1.649238, 1.650558, 1.655028, 1.666708, 1.676028, 1.723778, 1.896108" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + } + } + bus(EMAB) { + bus_type : rf2_32x128_wm1_EMAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005386; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.885676, 1.886996, 1.891466, 1.903146, 1.912466, 1.960216, 2.132546", \ + "1.884146, 1.885466, 1.889936, 1.901616, 1.910936, 1.958686, 2.131016", \ + "1.879326, 1.880646, 1.885116, 1.896796, 1.906116, 1.953866, 2.126196", \ + "1.869926, 1.871246, 1.875716, 1.887396, 1.896716, 1.944466, 2.116796", \ + "1.859296, 1.860616, 1.865086, 1.876766, 1.886086, 1.933836, 2.106166", \ + "1.811152, 1.812472, 1.816942, 1.828622, 1.837942, 1.885692, 2.058022", \ + "1.852360, 1.853680, 1.858150, 1.869830, 1.879150, 1.926900, 2.099230" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.885676, 1.886996, 1.891466, 1.903146, 1.912466, 1.960216, 2.132546", \ + "1.884146, 1.885466, 1.889936, 1.901616, 1.910936, 1.958686, 2.131016", \ + "1.879326, 1.880646, 1.885116, 1.896796, 1.906116, 1.953866, 2.126196", \ + "1.869926, 1.871246, 1.875716, 1.887396, 1.896716, 1.944466, 2.116796", \ + "1.859296, 1.860616, 1.865086, 1.876766, 1.886086, 1.933836, 2.106166", \ + "1.811152, 1.812472, 1.816942, 1.828622, 1.837942, 1.885692, 2.058022", \ + "1.852360, 1.853680, 1.858150, 1.869830, 1.879150, 1.926900, 2.099230" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.380670, 2.378410, 2.375390, 2.367490, 2.362836, 2.342093, 2.420119", \ + "2.382060, 2.379800, 2.376780, 2.368880, 2.364226, 2.343483, 2.421509", \ + "2.386190, 2.383930, 2.380910, 2.373010, 2.368356, 2.347613, 2.425639", \ + "2.396080, 2.393820, 2.390800, 2.382900, 2.378246, 2.357503, 2.435529", \ + "2.406330, 2.404070, 2.401050, 2.393150, 2.388496, 2.367753, 2.445779", \ + "2.454350, 2.452090, 2.449070, 2.441170, 2.436516, 2.415773, 2.493799", \ + "2.623320, 2.621060, 2.618040, 2.610140, 2.605486, 2.584743, 2.662769" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.380670, 2.378410, 2.375390, 2.367490, 2.362836, 2.342093, 2.420119", \ + "2.382060, 2.379800, 2.376780, 2.368880, 2.364226, 2.343483, 2.421509", \ + "2.386190, 2.383930, 2.380910, 2.373010, 2.368356, 2.347613, 2.425639", \ + "2.396080, 2.393820, 2.390800, 2.382900, 2.378246, 2.357503, 2.435529", \ + "2.406330, 2.404070, 2.401050, 2.393150, 2.388496, 2.367753, 2.445779", \ + "2.454350, 2.452090, 2.449070, 2.441170, 2.436516, 2.415773, 2.493799", \ + "2.623320, 2.621060, 2.618040, 2.610140, 2.605486, 2.584743, 2.662769" \ + ); + } + } + } + pin(TENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.000831; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.408879, 0.410530, 0.420972, 0.445959, 0.465910, 0.584372, 0.878472", \ + "0.406906, 0.408557, 0.418999, 0.443987, 0.463937, 0.582399, 0.876499", \ + "0.400926, 0.402577, 0.413019, 0.438007, 0.457957, 0.576419, 0.870519", \ + "0.391958, 0.393609, 0.404050, 0.429038, 0.448989, 0.567451, 0.861551", \ + "0.383689, 0.385340, 0.395781, 0.420769, 0.440720, 0.559181, 0.853282", \ + "0.336164, 0.337815, 0.348257, 0.373245, 0.393195, 0.511657, 0.805757", \ + "0.419328, 0.422219, 0.431920, 0.453278, 0.476379, 0.587511, 0.866801" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.408879, 0.410530, 0.420972, 0.445959, 0.465910, 0.584372, 0.878472", \ + "0.406906, 0.408557, 0.418999, 0.443987, 0.463937, 0.582399, 0.876499", \ + "0.400926, 0.402577, 0.413019, 0.438007, 0.457957, 0.576419, 0.870519", \ + "0.391958, 0.393609, 0.404050, 0.429038, 0.448989, 0.567451, 0.861551", \ + "0.383689, 0.385340, 0.395781, 0.420769, 0.440720, 0.559181, 0.853282", \ + "0.336164, 0.337815, 0.348257, 0.373245, 0.393195, 0.511657, 0.805757", \ + "0.419328, 0.422219, 0.431920, 0.453278, 0.476379, 0.587511, 0.866801" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.142461, 0.140580, 0.135762, 0.126698, 0.124597, 0.088101, 0.160429", \ + "0.144023, 0.142131, 0.137324, 0.128260, 0.126159, 0.089663, 0.161991", \ + "0.148533, 0.146641, 0.141834, 0.132770, 0.130669, 0.094173, 0.166501", \ + "0.159093, 0.157201, 0.152394, 0.143330, 0.141229, 0.104733, 0.177061", \ + "0.170962, 0.169070, 0.164263, 0.155199, 0.153098, 0.116602, 0.188930", \ + "0.222673, 0.220792, 0.215974, 0.206910, 0.204809, 0.168313, 0.240641", \ + "0.400727, 0.398835, 0.394028, 0.384964, 0.382863, 0.346367, 0.418695" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.142461, 0.140580, 0.135762, 0.126698, 0.124597, 0.088101, 0.160429", \ + "0.144023, 0.142131, 0.137324, 0.128260, 0.126159, 0.089663, 0.161991", \ + "0.148533, 0.146641, 0.141834, 0.132770, 0.130669, 0.094173, 0.166501", \ + "0.159093, 0.157201, 0.152394, 0.143330, 0.141229, 0.104733, 0.177061", \ + "0.170962, 0.169070, 0.164263, 0.155199, 0.153098, 0.116602, 0.188930", \ + "0.222673, 0.220792, 0.215974, 0.206910, 0.204809, 0.168313, 0.240641", \ + "0.400727, 0.398835, 0.394028, 0.384964, 0.382863, 0.346367, 0.418695" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011473, 0.011485, 0.011496, 0.011508, 0.011519, 0.011531, 0.011543"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011470, 0.011534, 0.011546, 0.011557, 0.011569, 0.011580, 0.011592"); + } + } + } + pin(TCENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001231; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.187380, 0.188360, 0.192990, 0.200740, 0.210600, 0.257640, 0.430190", \ + "0.186080, 0.187060, 0.191690, 0.199440, 0.209300, 0.256340, 0.428890", \ + "0.182370, 0.183350, 0.187980, 0.195730, 0.205590, 0.252630, 0.425180", \ + "0.177300, 0.178280, 0.182910, 0.190660, 0.200520, 0.247560, 0.420110", \ + "0.175580, 0.176560, 0.181190, 0.188940, 0.198800, 0.245840, 0.418390", \ + "0.158560, 0.159540, 0.164170, 0.171920, 0.181780, 0.228820, 0.401370", \ + "0.271330, 0.272310, 0.276940, 0.284690, 0.294550, 0.341590, 0.514140" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.210820, 0.212290, 0.215910, 0.224650, 0.239710, 0.289950, 0.469550", \ + "0.209510, 0.210980, 0.214600, 0.223340, 0.238400, 0.288640, 0.468240", \ + "0.205400, 0.206870, 0.210490, 0.219230, 0.234290, 0.284530, 0.464130", \ + "0.195710, 0.197180, 0.200800, 0.209540, 0.224600, 0.274840, 0.454440", \ + "0.184860, 0.186330, 0.189950, 0.198690, 0.213750, 0.263990, 0.443590", \ + "0.141180, 0.142570, 0.147040, 0.155400, 0.169910, 0.219360, 0.405840", \ + "0.253950, 0.255340, 0.259810, 0.268170, 0.282680, 0.332130, 0.518610" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.085785, 0.084174, 0.079629, 0.071255, 0.061885, 0.017864, 0.121420", \ + "0.086745, 0.085134, 0.080589, 0.072215, 0.062845, 0.018824, 0.121420", \ + "0.091351, 0.089740, 0.085195, 0.076821, 0.067451, 0.023430, 0.121420", \ + "0.100987, 0.099376, 0.094831, 0.086457, 0.077087, 0.033066, 0.121420", \ + "0.110987, 0.109376, 0.104831, 0.096457, 0.087087, 0.043066, 0.121420", \ + "0.158614, 0.157003, 0.152458, 0.144084, 0.134714, 0.090693, 0.131889", \ + "0.326094, 0.324483, 0.319938, 0.311564, 0.302194, 0.258173, 0.299369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.061205, 0.059983, 0.054870, 0.046999, 0.032485, 0.016670, 0.121420", \ + "0.061921, 0.060699, 0.055586, 0.047715, 0.033201, 0.016670, 0.121420", \ + "0.066692, 0.065470, 0.060357, 0.052486, 0.037972, 0.016670, 0.121420", \ + "0.076338, 0.075116, 0.070003, 0.062132, 0.047618, 0.016670, 0.121420", \ + "0.086220, 0.084998, 0.079885, 0.072014, 0.057500, 0.016670, 0.121420", \ + "0.133905, 0.132683, 0.127570, 0.119699, 0.105185, 0.055822, 0.121420", \ + "0.301585, 0.300363, 0.295250, 0.287379, 0.272865, 0.223502, 0.248195" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.793760", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.795150", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.799280", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.809170", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.819420", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.867440", \ + "1.996961, 1.994701, 1.991681, 1.983781, 1.979127, 1.958384, 1.931660" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.691980, 0.687820, 0.687170, 0.674780, 0.666990, 0.620550, 0.540290", \ + "0.700380, 0.696220, 0.695570, 0.683180, 0.675390, 0.628950, 0.548690", \ + "0.701680, 0.697520, 0.696870, 0.684480, 0.676690, 0.630250, 0.549990", \ + "0.726380, 0.722220, 0.721570, 0.709180, 0.701390, 0.654950, 0.574690", \ + "0.741980, 0.737820, 0.737170, 0.724780, 0.716990, 0.670550, 0.590290", \ + "0.834880, 0.830720, 0.830070, 0.817680, 0.809890, 0.763450, 0.683190", \ + "0.995380, 0.991220, 0.990570, 0.978180, 0.970390, 0.923950, 0.843690" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.021448, 0.021588, 0.021610, 0.021786, 0.021807, 0.021829, 0.021851"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.037609, 0.037647, 0.037685, 0.037722, 0.038222, 0.038260, 0.038298"); + } + } + } + bus(TAA) { + bus_type : rf2_32x128_wm1_TAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001629; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.260640, 0.260380, 0.265750, 0.277130, 0.283840, 0.338210, 0.530040", \ + "0.259150, 0.258890, 0.264260, 0.275640, 0.282350, 0.336720, 0.528550", \ + "0.253170, 0.252910, 0.258280, 0.269660, 0.276370, 0.330740, 0.522570", \ + "0.243740, 0.243480, 0.248850, 0.260230, 0.266940, 0.321310, 0.513140", \ + "0.235670, 0.235410, 0.240780, 0.252160, 0.258870, 0.313240, 0.505070", \ + "0.187820, 0.187560, 0.192930, 0.204310, 0.211020, 0.265390, 0.457220", \ + "0.225840, 0.225580, 0.230950, 0.242330, 0.249040, 0.303410, 0.495240" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.260640, 0.260380, 0.265750, 0.277130, 0.283840, 0.338210, 0.530040", \ + "0.259150, 0.258890, 0.264260, 0.275640, 0.282350, 0.336720, 0.528550", \ + "0.253170, 0.252910, 0.258280, 0.269660, 0.276370, 0.330740, 0.522570", \ + "0.243740, 0.243480, 0.248850, 0.260230, 0.266940, 0.321310, 0.513140", \ + "0.235670, 0.235410, 0.240780, 0.252160, 0.258870, 0.313240, 0.505070", \ + "0.187820, 0.187560, 0.192930, 0.204310, 0.211020, 0.265390, 0.457220", \ + "0.225840, 0.225580, 0.230950, 0.242330, 0.249040, 0.303410, 0.495240" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129510, 0.127700, 0.123420, 0.115180, 0.113270, 0.080092, 0.155367", \ + "0.130930, 0.129120, 0.124840, 0.116600, 0.114690, 0.081512, 0.156787", \ + "0.135030, 0.133220, 0.128940, 0.120700, 0.118790, 0.085612, 0.160887", \ + "0.144630, 0.142820, 0.138540, 0.130300, 0.128390, 0.095212, 0.170487", \ + "0.155420, 0.153610, 0.149330, 0.141090, 0.139180, 0.106002, 0.181277", \ + "0.202430, 0.200620, 0.196340, 0.188100, 0.186190, 0.153012, 0.228287", \ + "0.373820, 0.372010, 0.367730, 0.359490, 0.357580, 0.324402, 0.399677" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129500, 0.127800, 0.123410, 0.114320, 0.105541, 0.078367, 0.126361", \ + "0.130910, 0.129210, 0.124820, 0.115730, 0.106951, 0.079777, 0.127771", \ + "0.135010, 0.133310, 0.128920, 0.119830, 0.111051, 0.083877, 0.131871", \ + "0.144610, 0.142910, 0.138520, 0.129430, 0.120651, 0.093477, 0.141471", \ + "0.155400, 0.153700, 0.149310, 0.140220, 0.131441, 0.104267, 0.152261", \ + "0.202420, 0.200720, 0.196330, 0.187240, 0.178461, 0.151287, 0.199281", \ + "0.373800, 0.372100, 0.367710, 0.358620, 0.349841, 0.322667, 0.370661" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.260640, 0.260380, 0.265750, 0.277130, 0.283840, 0.338210, 0.530040", \ + "0.259150, 0.258890, 0.264260, 0.275640, 0.282350, 0.336720, 0.528550", \ + "0.253170, 0.252910, 0.258280, 0.269660, 0.276370, 0.330740, 0.522570", \ + "0.243740, 0.243480, 0.248850, 0.260230, 0.266940, 0.321310, 0.513140", \ + "0.235670, 0.235410, 0.240780, 0.252160, 0.258870, 0.313240, 0.505070", \ + "0.187820, 0.187560, 0.192930, 0.204310, 0.211020, 0.265390, 0.457220", \ + "0.225840, 0.225580, 0.230950, 0.242330, 0.249040, 0.303410, 0.495240" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.260640, 0.260380, 0.265750, 0.277130, 0.283840, 0.338210, 0.530040", \ + "0.259150, 0.258890, 0.264260, 0.275640, 0.282350, 0.336720, 0.528550", \ + "0.253170, 0.252910, 0.258280, 0.269660, 0.276370, 0.330740, 0.522570", \ + "0.243740, 0.243480, 0.248850, 0.260230, 0.266940, 0.321310, 0.513140", \ + "0.235670, 0.235410, 0.240780, 0.252160, 0.258870, 0.313240, 0.505070", \ + "0.187820, 0.187560, 0.192930, 0.204310, 0.211020, 0.265390, 0.457220", \ + "0.225840, 0.225580, 0.230950, 0.242330, 0.249040, 0.303410, 0.495240" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129510, 0.127700, 0.123420, 0.115180, 0.113270, 0.080092, 0.155367", \ + "0.130930, 0.129120, 0.124840, 0.116600, 0.114690, 0.081512, 0.156787", \ + "0.135030, 0.133220, 0.128940, 0.120700, 0.118790, 0.085612, 0.160887", \ + "0.144630, 0.142820, 0.138540, 0.130300, 0.128390, 0.095212, 0.170487", \ + "0.155420, 0.153610, 0.149330, 0.141090, 0.139180, 0.106002, 0.181277", \ + "0.202430, 0.200620, 0.196340, 0.188100, 0.186190, 0.153012, 0.228287", \ + "0.373820, 0.372010, 0.367730, 0.359490, 0.357580, 0.324402, 0.399677" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129500, 0.127800, 0.123410, 0.114320, 0.105541, 0.078367, 0.126361", \ + "0.130910, 0.129210, 0.124820, 0.115730, 0.106951, 0.079777, 0.127771", \ + "0.135010, 0.133310, 0.128920, 0.119830, 0.111051, 0.083877, 0.131871", \ + "0.144610, 0.142910, 0.138520, 0.129430, 0.120651, 0.093477, 0.141471", \ + "0.155400, 0.153700, 0.149310, 0.140220, 0.131441, 0.104267, 0.152261", \ + "0.202420, 0.200720, 0.196330, 0.187240, 0.178461, 0.151287, 0.199281", \ + "0.373800, 0.372100, 0.367710, 0.358620, 0.349841, 0.322667, 0.370661" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011463, 0.011464, 0.011476, 0.011487, 0.011499, 0.011510, 0.011522"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.010113, 0.010133, 0.010143, 0.010153, 0.010163, 0.010174, 0.010184"); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011463, 0.011464, 0.011476, 0.011487, 0.011499, 0.011510, 0.011522"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.010113, 0.010133, 0.010143, 0.010153, 0.010163, 0.010174, 0.010184"); + } + } + } + pin(TENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.000862; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.742728, 0.747363, 0.757345, 0.776001, 0.800060, 0.906354, 1.181810", \ + "0.741026, 0.745660, 0.755642, 0.774298, 0.798358, 0.904652, 1.180107", \ + "0.737211, 0.741846, 0.751828, 0.770483, 0.794543, 0.900837, 1.176293", \ + "0.727108, 0.731742, 0.741725, 0.760380, 0.784439, 0.890734, 1.166189", \ + "0.715944, 0.720579, 0.730561, 0.749216, 0.773276, 0.879570, 1.155026", \ + "0.668783, 0.673418, 0.683401, 0.702056, 0.726116, 0.832410, 1.107865", \ + "0.756817, 0.760512, 0.770004, 0.789810, 0.812229, 0.916283, 1.172419" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.742728, 0.747363, 0.757345, 0.776001, 0.800060, 0.906354, 1.181810", \ + "0.741026, 0.745660, 0.755642, 0.774298, 0.798358, 0.904652, 1.180107", \ + "0.737211, 0.741846, 0.751828, 0.770483, 0.794543, 0.900837, 1.176293", \ + "0.727108, 0.731742, 0.741725, 0.760380, 0.784439, 0.890734, 1.166189", \ + "0.715944, 0.720579, 0.730561, 0.749216, 0.773276, 0.879570, 1.155026", \ + "0.668783, 0.673418, 0.683401, 0.702056, 0.726116, 0.832410, 1.107865", \ + "0.756817, 0.760512, 0.770004, 0.789810, 0.812229, 0.916283, 1.172419" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.338294, 0.336468, 0.331705, 0.322124, 0.312785, 0.277464, 0.356671", \ + "0.339328, 0.337502, 0.332739, 0.323158, 0.313819, 0.278498, 0.357705", \ + "0.345708, 0.343882, 0.339119, 0.329538, 0.320199, 0.284878, 0.364085", \ + "0.356642, 0.354816, 0.350053, 0.340472, 0.331133, 0.295812, 0.375019", \ + "0.367994, 0.366168, 0.361405, 0.351824, 0.342485, 0.307164, 0.386371", \ + "0.418880, 0.417054, 0.412291, 0.402710, 0.393371, 0.358050, 0.437257", \ + "0.594613, 0.592787, 0.588024, 0.578443, 0.569104, 0.533783, 0.612990" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.338294, 0.336468, 0.331705, 0.322124, 0.312785, 0.277464, 0.356671", \ + "0.339328, 0.337502, 0.332739, 0.323158, 0.313819, 0.278498, 0.357705", \ + "0.345708, 0.343882, 0.339119, 0.329538, 0.320199, 0.284878, 0.364085", \ + "0.356642, 0.354816, 0.350053, 0.340472, 0.331133, 0.295812, 0.375019", \ + "0.367994, 0.366168, 0.361405, 0.351824, 0.342485, 0.307164, 0.386371", \ + "0.418880, 0.417054, 0.412291, 0.402710, 0.393371, 0.358050, 0.437257", \ + "0.594613, 0.592787, 0.588024, 0.578443, 0.569104, 0.533783, 0.612990" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.301351, 0.302128, 0.303839, 0.304144, 0.304447, 0.304578, 0.304882"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.321406, 0.324073, 0.324397, 0.324721, 0.325046, 0.325371, 0.325696"); + } + } + } + pin(TCENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001233; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.193660, 0.194950, 0.199140, 0.208960, 0.217740, 0.265220, 0.431580", \ + "0.192320, 0.193610, 0.197800, 0.207620, 0.216400, 0.263880, 0.430240", \ + "0.188750, 0.190040, 0.194230, 0.204050, 0.212830, 0.260310, 0.426670", \ + "0.183610, 0.184900, 0.189090, 0.198910, 0.207690, 0.255170, 0.421530", \ + "0.181900, 0.183190, 0.187380, 0.197200, 0.205980, 0.253460, 0.419820", \ + "0.165970, 0.167260, 0.171450, 0.181270, 0.190050, 0.237530, 0.403890", \ + "0.279550, 0.280840, 0.285030, 0.294850, 0.303630, 0.351110, 0.517470" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.214700, 0.217590, 0.221100, 0.230240, 0.241610, 0.295440, 0.475370", \ + "0.212300, 0.215190, 0.218700, 0.227840, 0.239210, 0.293040, 0.472970", \ + "0.207890, 0.210780, 0.214290, 0.223430, 0.234800, 0.288630, 0.468560", \ + "0.197860, 0.200750, 0.204260, 0.213400, 0.224770, 0.278600, 0.458530", \ + "0.187740, 0.190630, 0.194140, 0.203280, 0.214650, 0.268480, 0.448410", \ + "0.147370, 0.148980, 0.155100, 0.164440, 0.176560, 0.226630, 0.413120", \ + "0.260940, 0.262550, 0.268670, 0.278010, 0.290130, 0.340200, 0.526690" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.085676, 0.083702, 0.079130, 0.069554, 0.059997, 0.016280, 0.121030", \ + "0.087621, 0.085647, 0.081075, 0.071499, 0.061942, 0.017535, 0.121030", \ + "0.092417, 0.090443, 0.085871, 0.076295, 0.066738, 0.022331, 0.121030", \ + "0.102374, 0.100400, 0.095828, 0.086252, 0.076695, 0.032288, 0.121030", \ + "0.112648, 0.110674, 0.106102, 0.096526, 0.086969, 0.042562, 0.121030", \ + "0.159908, 0.157934, 0.153362, 0.143786, 0.134229, 0.089822, 0.139668", \ + "0.326478, 0.324504, 0.319932, 0.310356, 0.300799, 0.256392, 0.306238" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.051627, 0.050114, 0.044512, 0.035138, 0.023112, 0.016280, 0.121030", \ + "0.053741, 0.052228, 0.046626, 0.037252, 0.025226, 0.016280, 0.121030", \ + "0.058157, 0.056644, 0.051042, 0.041668, 0.029642, 0.016280, 0.121030", \ + "0.068381, 0.066868, 0.061266, 0.051892, 0.039866, 0.016280, 0.121030", \ + "0.078516, 0.077003, 0.071401, 0.062027, 0.050001, 0.016280, 0.121030", \ + "0.126241, 0.124728, 0.119126, 0.109752, 0.097726, 0.046464, 0.121030", \ + "0.292911, 0.291398, 0.285796, 0.276422, 0.264396, 0.213134, 0.238835" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.021448, 0.021588, 0.021610, 0.021786, 0.021807, 0.021829, 0.021851"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.037609, 0.037647, 0.037685, 0.037722, 0.038222, 0.038260, 0.038298"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.793760", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.795150", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.799280", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.809170", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.819420", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.867440", \ + "1.996961, 1.994701, 1.991681, 1.983781, 1.979127, 1.958384, 1.931660" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.691980, 0.687820, 0.687170, 0.674780, 0.666990, 0.620550, 0.540290", \ + "0.700380, 0.696220, 0.695570, 0.683180, 0.675390, 0.628950, 0.548690", \ + "0.701680, 0.697520, 0.696870, 0.684480, 0.676690, 0.630250, 0.549990", \ + "0.726380, 0.722220, 0.721570, 0.709180, 0.701390, 0.654950, 0.574690", \ + "0.741980, 0.737820, 0.737170, 0.724780, 0.716990, 0.670550, 0.590290", \ + "0.834880, 0.830720, 0.830070, 0.817680, 0.809890, 0.763450, 0.683190", \ + "0.995380, 0.991220, 0.990570, 0.978180, 0.970390, 0.923950, 0.843690" \ + ); + } + } + } + bus(TWENB) { + bus_type : rf2_32x128_wm1_TWENB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001436; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.089891, 0.090851, 0.094171, 0.102921, 0.113771, 0.162981, 0.343851", \ + "0.087691, 0.088651, 0.091971, 0.100721, 0.111571, 0.160781, 0.341651", \ + "0.082151, 0.083111, 0.086431, 0.095181, 0.106031, 0.155241, 0.336111", \ + "0.072251, 0.073211, 0.076531, 0.085281, 0.096131, 0.145341, 0.326211", \ + "0.062351, 0.063311, 0.066631, 0.075381, 0.086231, 0.135441, 0.316311", \ + "0.015921, 0.016881, 0.020201, 0.028951, 0.039801, 0.089011, 0.269881", \ + "0.120250, 0.120250, 0.120250, 0.120250, 0.120250, 0.128631, 0.309501" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.085536, 0.086246, 0.090886, 0.101176, 0.112086, 0.165086, 0.361226", \ + "0.083356, 0.084066, 0.088706, 0.098996, 0.109906, 0.162906, 0.359046", \ + "0.077816, 0.078526, 0.083166, 0.093456, 0.104366, 0.157366, 0.353506", \ + "0.067886, 0.068596, 0.073236, 0.083526, 0.094436, 0.147436, 0.343576", \ + "0.058006, 0.058716, 0.063356, 0.073646, 0.084556, 0.137556, 0.333696", \ + "0.015500, 0.015500, 0.016942, 0.027232, 0.038142, 0.091142, 0.287282", \ + "0.120250, 0.120250, 0.120250, 0.120250, 0.120250, 0.130736, 0.326876" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.307540, 0.305880, 0.301550, 0.292840, 0.284350, 0.252240, 0.333769", \ + "0.308480, 0.306820, 0.302490, 0.293780, 0.285290, 0.253180, 0.334709", \ + "0.314280, 0.312620, 0.308290, 0.299580, 0.291090, 0.258980, 0.340509", \ + "0.324220, 0.322560, 0.318230, 0.309520, 0.301030, 0.268920, 0.350449", \ + "0.334540, 0.332880, 0.328550, 0.319840, 0.311350, 0.279240, 0.360769", \ + "0.380800, 0.379140, 0.374810, 0.366100, 0.357610, 0.325500, 0.407029", \ + "0.550080, 0.548420, 0.544090, 0.535380, 0.526890, 0.494780, 0.576309" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304130, 0.302270, 0.298000, 0.288290, 0.279550, 0.240240, 0.278803", \ + "0.305180, 0.303320, 0.299050, 0.289340, 0.280600, 0.241290, 0.279853", \ + "0.310980, 0.309120, 0.304850, 0.295140, 0.286400, 0.247090, 0.285653", \ + "0.320920, 0.319060, 0.314790, 0.305080, 0.296340, 0.257030, 0.295593", \ + "0.331230, 0.329370, 0.325100, 0.315390, 0.306650, 0.267340, 0.305903", \ + "0.377500, 0.375640, 0.371370, 0.361660, 0.352920, 0.313610, 0.352173", \ + "0.546780, 0.544920, 0.540650, 0.530940, 0.522200, 0.482890, 0.521453" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.002806, 0.002809, 0.002811, 0.002814, 0.002817, 0.002820, 0.002823"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003429, 0.003442, 0.003446, 0.003449, 0.003453, 0.003456, 0.003459"); + } + } + } + bus(TAB) { + bus_type : rf2_32x128_wm1_TAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001442; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.263760, 0.265990, 0.270670, 0.279340, 0.289760, 0.339480, 0.534380", \ + "0.262110, 0.264340, 0.269020, 0.277690, 0.288110, 0.337830, 0.532730", \ + "0.258180, 0.260410, 0.265090, 0.273760, 0.284180, 0.333900, 0.528800", \ + "0.248150, 0.250380, 0.255060, 0.263730, 0.274150, 0.323870, 0.518770", \ + "0.237270, 0.239500, 0.244180, 0.252850, 0.263270, 0.312990, 0.507890", \ + "0.189910, 0.192140, 0.196820, 0.205490, 0.215910, 0.265630, 0.460530", \ + "0.229440, 0.231670, 0.236350, 0.245020, 0.255440, 0.305160, 0.500060" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.263760, 0.265990, 0.270670, 0.279340, 0.289760, 0.339480, 0.534380", \ + "0.262110, 0.264340, 0.269020, 0.277690, 0.288110, 0.337830, 0.532730", \ + "0.258180, 0.260410, 0.265090, 0.273760, 0.284180, 0.333900, 0.528800", \ + "0.248150, 0.250380, 0.255060, 0.263730, 0.274150, 0.323870, 0.518770", \ + "0.237270, 0.239500, 0.244180, 0.252850, 0.263270, 0.312990, 0.507890", \ + "0.189910, 0.192140, 0.196820, 0.205490, 0.215910, 0.265630, 0.460530", \ + "0.229440, 0.231670, 0.236350, 0.245020, 0.255440, 0.305160, 0.500060" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120561, 0.118751, 0.114461, 0.106210, 0.098763, 0.071555, 0.140846", \ + "0.123311, 0.121501, 0.117211, 0.108960, 0.101513, 0.074305, 0.143596", \ + "0.127091, 0.125281, 0.120991, 0.112740, 0.105293, 0.078085, 0.147376", \ + "0.137291, 0.135481, 0.131191, 0.122940, 0.115493, 0.088285, 0.157576", \ + "0.148071, 0.146261, 0.141971, 0.133720, 0.126273, 0.099065, 0.168356", \ + "0.195351, 0.193541, 0.189251, 0.181000, 0.173553, 0.146345, 0.215636", \ + "0.366001, 0.364191, 0.359901, 0.351650, 0.344203, 0.316995, 0.386286" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120360, 0.118670, 0.114300, 0.105270, 0.095091, 0.061692, 0.119750", \ + "0.123100, 0.121410, 0.117040, 0.108010, 0.097831, 0.064432, 0.119750", \ + "0.126880, 0.125190, 0.120820, 0.111790, 0.101611, 0.068212, 0.123368", \ + "0.137100, 0.135410, 0.131040, 0.122010, 0.111831, 0.078432, 0.133588", \ + "0.147880, 0.146190, 0.141820, 0.132790, 0.122611, 0.089212, 0.144368", \ + "0.195140, 0.193450, 0.189080, 0.180050, 0.169871, 0.136472, 0.191628", \ + "0.365810, 0.364120, 0.359750, 0.350720, 0.340541, 0.307142, 0.362298" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.263760, 0.265990, 0.270670, 0.279340, 0.289760, 0.339480, 0.534380", \ + "0.262110, 0.264340, 0.269020, 0.277690, 0.288110, 0.337830, 0.532730", \ + "0.258180, 0.260410, 0.265090, 0.273760, 0.284180, 0.333900, 0.528800", \ + "0.248150, 0.250380, 0.255060, 0.263730, 0.274150, 0.323870, 0.518770", \ + "0.237270, 0.239500, 0.244180, 0.252850, 0.263270, 0.312990, 0.507890", \ + "0.189910, 0.192140, 0.196820, 0.205490, 0.215910, 0.265630, 0.460530", \ + "0.229440, 0.231670, 0.236350, 0.245020, 0.255440, 0.305160, 0.500060" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.263760, 0.265990, 0.270670, 0.279340, 0.289760, 0.339480, 0.534380", \ + "0.262110, 0.264340, 0.269020, 0.277690, 0.288110, 0.337830, 0.532730", \ + "0.258180, 0.260410, 0.265090, 0.273760, 0.284180, 0.333900, 0.528800", \ + "0.248150, 0.250380, 0.255060, 0.263730, 0.274150, 0.323870, 0.518770", \ + "0.237270, 0.239500, 0.244180, 0.252850, 0.263270, 0.312990, 0.507890", \ + "0.189910, 0.192140, 0.196820, 0.205490, 0.215910, 0.265630, 0.460530", \ + "0.229440, 0.231670, 0.236350, 0.245020, 0.255440, 0.305160, 0.500060" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120561, 0.118751, 0.114461, 0.106210, 0.098763, 0.071555, 0.140846", \ + "0.123311, 0.121501, 0.117211, 0.108960, 0.101513, 0.074305, 0.143596", \ + "0.127091, 0.125281, 0.120991, 0.112740, 0.105293, 0.078085, 0.147376", \ + "0.137291, 0.135481, 0.131191, 0.122940, 0.115493, 0.088285, 0.157576", \ + "0.148071, 0.146261, 0.141971, 0.133720, 0.126273, 0.099065, 0.168356", \ + "0.195351, 0.193541, 0.189251, 0.181000, 0.173553, 0.146345, 0.215636", \ + "0.366001, 0.364191, 0.359901, 0.351650, 0.344203, 0.316995, 0.386286" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120360, 0.118670, 0.114300, 0.105270, 0.095091, 0.061692, 0.119750", \ + "0.123100, 0.121410, 0.117040, 0.108010, 0.097831, 0.064432, 0.119750", \ + "0.126880, 0.125190, 0.120820, 0.111790, 0.101611, 0.068212, 0.123368", \ + "0.137100, 0.135410, 0.131040, 0.122010, 0.111831, 0.078432, 0.133588", \ + "0.147880, 0.146190, 0.141820, 0.132790, 0.122611, 0.089212, 0.144368", \ + "0.195140, 0.193450, 0.189080, 0.180050, 0.169871, 0.136472, 0.191628", \ + "0.365810, 0.364120, 0.359750, 0.350720, 0.340541, 0.307142, 0.362298" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.013219, 0.013232, 0.013246, 0.013259, 0.013272, 0.013285, 0.013299"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011930, 0.011931, 0.011943, 0.011955, 0.011967, 0.011979, 0.011991"); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.013219, 0.013232, 0.013246, 0.013259, 0.013272, 0.013285, 0.013299"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011930, 0.011931, 0.011943, 0.011955, 0.011967, 0.011979, 0.011991"); + } + } + } + bus(TDB) { + bus_type : rf2_32x128_wm1_TDB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : TAB; + clocked_on : CLKB; + } + capacitance : 0.001472; + max_transition : 0.419000; + pin(TDB[127]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[127])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[126]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[126])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[125]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[125])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[124]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[124])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[123]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[123])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[122]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[122])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[121]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[121])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[120]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[120])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[119]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[119])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[118]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[118])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[117]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[117])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[116]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[116])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[115]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[115])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[114]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[114])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[113]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[113])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[112]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[112])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[111]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[111])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[110]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[110])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[109]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[109])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[108]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[108])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[107]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[107])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[106]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[106])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[105]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[105])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[104]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[104])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[103]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[103])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[102]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[102])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[101]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[101])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[100]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[100])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[99]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[99])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[98]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[98])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[97]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[97])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[96]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[96])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[95]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[95])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[94]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[94])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[93]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[93])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[92]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[92])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[91]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[91])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[90]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[90])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[89]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[89])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[88]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[88])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[87]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[87])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[86]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[86])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[85]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[85])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[84]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[84])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[83]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[83])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[82]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[82])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[81]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[81])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[80]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[80])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[79]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[79])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[78]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[78])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[77]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[77])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[76]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[76])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[75]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[75])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[74]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[74])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[73]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[73])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[72]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[72])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[71]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[71])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[70]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[70])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[69]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[69])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[68]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[68])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[67]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[67])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[66]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[66])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[65]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[65])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[64]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[64])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[63]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[63])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[62]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[62])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[61]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[61])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[60]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[60])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[59]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[59])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[58]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[58])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[57]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[57])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[56]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[56])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[55]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[55])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[54]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[54])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[53]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[53])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[52]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[52])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[51]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[51])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[50]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[50])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[49]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[49])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[48]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[48])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[47]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[47])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[46]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[46])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[45]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[45])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[44]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[44])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[43]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[43])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[42]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[42])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[41]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[41])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[40]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[40])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[39]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[39])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[38]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[38])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[37]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[37])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[36]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[36])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[35]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[35])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[34]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[34])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[33]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[33])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[32]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[32])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[31]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[31])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[30]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[30])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[29]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[29])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[28]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[28])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[27]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[27])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[26]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[26])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[25]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[25])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[24]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[24])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[23]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[23])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[22]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[22])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[21]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[21])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[20]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[20])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[19]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[19])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[18]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[18])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[17]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[17])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[16]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[16])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[15]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[15])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[14]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[14])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[13]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[13])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[12]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[12])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[11]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[11])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[10]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[10])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[9]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[9])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[8]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[8])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[7]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[7])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[6]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[6])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[5]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[5])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[4]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[4])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[3]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[3])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[2]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[2])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[1]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[1])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(TDB[0]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.151030, 0.150450, 0.155590, 0.163860, 0.178100, 0.229220, 0.416640", \ + "0.147940, 0.147360, 0.152500, 0.160770, 0.175010, 0.226130, 0.413550", \ + "0.142350, 0.141770, 0.146910, 0.155180, 0.169420, 0.220540, 0.407960", \ + "0.132460, 0.131880, 0.137020, 0.145290, 0.159530, 0.210650, 0.398070", \ + "0.122570, 0.121990, 0.127130, 0.135400, 0.149640, 0.200760, 0.388180", \ + "0.076170, 0.075590, 0.080730, 0.089000, 0.103240, 0.154360, 0.341780", \ + "0.115759, 0.115430, 0.120319, 0.128589, 0.142829, 0.193949, 0.381369" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.169210, 0.171660, 0.177180, 0.191300, 0.201350, 0.261470, 0.462230", \ + "0.166950, 0.169400, 0.174920, 0.189040, 0.199090, 0.259210, 0.459970", \ + "0.161410, 0.163860, 0.169380, 0.183500, 0.193550, 0.253670, 0.454430", \ + "0.151680, 0.154130, 0.159650, 0.173770, 0.183820, 0.243940, 0.444700", \ + "0.141680, 0.144130, 0.149650, 0.163770, 0.173820, 0.233940, 0.434700", \ + "0.095280, 0.097730, 0.103250, 0.117370, 0.127420, 0.187540, 0.388300", \ + "0.134745, 0.137195, 0.142715, 0.156835, 0.166885, 0.227005, 0.427765" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[0])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + } + pin(RET1N) { + direction : input; + always_on : true; + related_power_pin : "VDDCE"; + related_ground_pin : "VSSE"; + capacitance : 0.003223; + max_transition : 0.419000; + internal_power() { + when : "((!DFTRAMBYP&CENA&TENA)|(!DFTRAMBYP&TCENA&!TENA))&((!DFTRAMBYP&CENB&TENB)|(!DFTRAMBYP&TCENB&!TENB))"; + related_pg_pin : "VDDCE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("2.946151, 2.948573, 2.951524, 2.954475, 2.957429, 2.960384, 2.963348"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.398248, 0.398646, 0.399045, 0.399444, 0.399843, 0.400243, 0.400644"); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.053675, 0.054398, 0.055275, 0.057560, 0.060403, 0.073860, 0.092655", \ + "0.053075, 0.053798, 0.054675, 0.056960, 0.059803, 0.073260, 0.092055", \ + "0.051973, 0.052695, 0.053573, 0.055858, 0.058700, 0.072157, 0.090953", \ + "0.049465, 0.050188, 0.051065, 0.053350, 0.056193, 0.069650, 0.088445", \ + "0.046935, 0.047658, 0.048535, 0.050820, 0.053663, 0.067120, 0.085915", \ + "0.041493, 0.041815, 0.042863, 0.045318, 0.047513, 0.059383, 0.077093", \ + "0.043700, 0.044023, 0.045070, 0.047525, 0.049720, 0.061590, 0.079298" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.793760", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.795150", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.799280", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.809170", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.819420", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.867440", \ + "1.996961, 1.994701, 1.991681, 1.983781, 1.979127, 1.958384, 1.931660" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.053675, 0.054398, 0.055275, 0.057560, 0.060403, 0.073860, 0.092655", \ + "0.053075, 0.053798, 0.054675, 0.056960, 0.059803, 0.073260, 0.092055", \ + "0.051973, 0.052695, 0.053573, 0.055858, 0.058700, 0.072157, 0.090953", \ + "0.049465, 0.050188, 0.051065, 0.053350, 0.056193, 0.069650, 0.088445", \ + "0.046935, 0.047658, 0.048535, 0.050820, 0.053663, 0.067120, 0.085915", \ + "0.041493, 0.041815, 0.042863, 0.045318, 0.047513, 0.059383, 0.077093", \ + "0.043700, 0.044023, 0.045070, 0.047525, 0.049720, 0.061590, 0.079298" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.052705, 0.053073, 0.053978, 0.056163, 0.059928, 0.072488, 0.091200", \ + "0.052378, 0.052745, 0.053650, 0.055835, 0.059600, 0.072160, 0.090872", \ + "0.051350, 0.051718, 0.052623, 0.054808, 0.058573, 0.071133, 0.089845", \ + "0.048928, 0.049295, 0.050200, 0.052385, 0.056150, 0.068710, 0.087423", \ + "0.046215, 0.046583, 0.047488, 0.049673, 0.053438, 0.065998, 0.084710", \ + "0.039640, 0.039885, 0.041043, 0.042980, 0.045445, 0.057205, 0.075273", \ + "0.041645, 0.041890, 0.043048, 0.044985, 0.047450, 0.059210, 0.077277" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.052705, 0.053073, 0.053978, 0.056163, 0.059928, 0.072488, 0.091200", \ + "0.052378, 0.052745, 0.053650, 0.055835, 0.059600, 0.072160, 0.090872", \ + "0.051350, 0.051718, 0.052623, 0.054808, 0.058573, 0.071133, 0.089845", \ + "0.048928, 0.049295, 0.050200, 0.052385, 0.056150, 0.068710, 0.087423", \ + "0.046215, 0.046583, 0.047488, 0.049673, 0.053438, 0.065998, 0.084710", \ + "0.039640, 0.039885, 0.041043, 0.042980, 0.045445, 0.057205, 0.075273", \ + "0.041645, 0.041890, 0.043048, 0.044985, 0.047450, 0.059210, 0.077277" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.053675, 0.054398, 0.055275, 0.057560, 0.060403, 0.073860, 0.092655", \ + "0.053075, 0.053798, 0.054675, 0.056960, 0.059803, 0.073260, 0.092055", \ + "0.051973, 0.052695, 0.053573, 0.055858, 0.058700, 0.072157, 0.090953", \ + "0.049465, 0.050188, 0.051065, 0.053350, 0.056193, 0.069650, 0.088445", \ + "0.046935, 0.047658, 0.048535, 0.050820, 0.053663, 0.067120, 0.085915", \ + "0.041493, 0.041815, 0.042863, 0.045318, 0.047513, 0.059383, 0.077093", \ + "0.043700, 0.044023, 0.045070, 0.047525, 0.049720, 0.061590, 0.079298" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.793760", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.795150", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.799280", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.809170", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.819420", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.867440", \ + "1.996961, 1.994701, 1.991681, 1.983781, 1.979127, 1.958384, 1.931660" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.655939, 1.653679, 1.650659, 1.642759, 1.638105, 1.617362, 1.590638", \ + "1.657329, 1.655069, 1.652049, 1.644149, 1.639495, 1.618752, 1.592028", \ + "1.661459, 1.659199, 1.656179, 1.648279, 1.643625, 1.622882, 1.596158", \ + "1.671349, 1.669089, 1.666069, 1.658169, 1.653515, 1.632772, 1.606048", \ + "1.681599, 1.679339, 1.676319, 1.668419, 1.663765, 1.643022, 1.616298", \ + "1.729619, 1.727359, 1.724339, 1.716439, 1.711785, 1.691042, 1.664318", \ + "1.793839, 1.791579, 1.788559, 1.780659, 1.776005, 1.755262, 1.728538" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.793760", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.795150", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.799280", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.809170", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.819420", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.867440", \ + "1.996961, 1.994701, 1.991681, 1.983781, 1.979127, 1.958384, 1.931660" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.655939, 1.653679, 1.650659, 1.642759, 1.638105, 1.617362, 1.590638", \ + "1.657329, 1.655069, 1.652049, 1.644149, 1.639495, 1.618752, 1.592028", \ + "1.661459, 1.659199, 1.656179, 1.648279, 1.643625, 1.622882, 1.596158", \ + "1.671349, 1.669089, 1.666069, 1.658169, 1.653515, 1.632772, 1.606048", \ + "1.681599, 1.679339, 1.676319, 1.668419, 1.663765, 1.643022, 1.616298", \ + "1.729619, 1.727359, 1.724339, 1.716439, 1.711785, 1.691042, 1.664318", \ + "1.793839, 1.791579, 1.788559, 1.780659, 1.776005, 1.755262, 1.728538" \ + ); + } + } + } + bus(SIA) { + bus_type : rf2_32x128_wm1_SIA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001140; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.449767, 0.451583, 0.463069, 0.490555, 0.512501, 0.642809, 0.955844", \ + "0.447597, 0.449413, 0.460898, 0.488385, 0.510331, 0.640639, 0.953674", \ + "0.441019, 0.442835, 0.454320, 0.481807, 0.503753, 0.634061, 0.947096", \ + "0.431154, 0.432970, 0.444456, 0.471942, 0.493888, 0.624196, 0.937231", \ + "0.422057, 0.423873, 0.435359, 0.462846, 0.484791, 0.615100, 0.928135", \ + "0.369780, 0.371596, 0.383082, 0.410569, 0.432515, 0.562823, 0.875858", \ + "0.450785, 0.453965, 0.464637, 0.488131, 0.513541, 0.635787, 0.932531" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.449767, 0.451583, 0.463069, 0.490555, 0.512501, 0.642809, 0.955844", \ + "0.447597, 0.449413, 0.460898, 0.488385, 0.510331, 0.640639, 0.953674", \ + "0.441019, 0.442835, 0.454320, 0.481807, 0.503753, 0.634061, 0.947096", \ + "0.431154, 0.432970, 0.444456, 0.471942, 0.493888, 0.624196, 0.937231", \ + "0.422057, 0.423873, 0.435359, 0.462846, 0.484791, 0.615100, 0.928135", \ + "0.369780, 0.371596, 0.383082, 0.410569, 0.432515, 0.562823, 0.875858", \ + "0.450785, 0.453965, 0.464637, 0.488131, 0.513541, 0.635787, 0.932531" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.128680, 0.127118, 0.121981, 0.108603, 0.095945, 0.056605, 0.110250", \ + "0.130781, 0.129219, 0.124082, 0.110704, 0.098046, 0.058706, 0.110513", \ + "0.134785, 0.133223, 0.128086, 0.114708, 0.102050, 0.062710, 0.114517", \ + "0.145631, 0.144069, 0.138932, 0.125554, 0.112896, 0.073556, 0.125363", \ + "0.157379, 0.155817, 0.150680, 0.137302, 0.124644, 0.085304, 0.137111", \ + "0.208331, 0.206769, 0.201632, 0.188254, 0.175596, 0.136256, 0.188063", \ + "0.386440, 0.384878, 0.379741, 0.366363, 0.353705, 0.314365, 0.366171" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.126454, 0.124991, 0.119722, 0.106909, 0.091491, 0.045266, 0.110250", \ + "0.128665, 0.127202, 0.121933, 0.109120, 0.093702, 0.047477, 0.110250", \ + "0.132603, 0.131140, 0.125871, 0.113058, 0.097640, 0.051415, 0.110250", \ + "0.143482, 0.142019, 0.136750, 0.123937, 0.108519, 0.062294, 0.110250", \ + "0.155120, 0.153657, 0.148388, 0.135575, 0.120157, 0.073932, 0.110250", \ + "0.206226, 0.204763, 0.199494, 0.186681, 0.171263, 0.125038, 0.158742", \ + "0.384280, 0.382817, 0.377548, 0.364735, 0.349317, 0.303092, 0.336796" \ + ); + } + } + internal_power() { + when : "SEA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005319, 0.005325, 0.005330, 0.005335, 0.005341, 0.005346, 0.005351"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008905, 0.008987, 0.008996, 0.009005, 0.009014, 0.009023, 0.009032"); + } + } + } + pin(SEA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001560; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.449767, 0.451583, 0.463069, 0.490555, 0.512501, 0.642809, 0.955844", \ + "0.447597, 0.449413, 0.460898, 0.488385, 0.510331, 0.640639, 0.953674", \ + "0.441019, 0.442835, 0.454320, 0.481807, 0.503753, 0.634061, 0.947096", \ + "0.431154, 0.432970, 0.444456, 0.471942, 0.493888, 0.624196, 0.937231", \ + "0.422057, 0.423873, 0.435359, 0.462846, 0.484791, 0.615100, 0.928135", \ + "0.369780, 0.371596, 0.383082, 0.410569, 0.432515, 0.562823, 0.875858", \ + "0.450785, 0.453965, 0.464637, 0.488131, 0.513541, 0.635787, 0.932531" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.449767, 0.451583, 0.463069, 0.490555, 0.512501, 0.642809, 0.955844", \ + "0.447597, 0.449413, 0.460898, 0.488385, 0.510331, 0.640639, 0.953674", \ + "0.441019, 0.442835, 0.454320, 0.481807, 0.503753, 0.634061, 0.947096", \ + "0.431154, 0.432970, 0.444456, 0.471942, 0.493888, 0.624196, 0.937231", \ + "0.422057, 0.423873, 0.435359, 0.462846, 0.484791, 0.615100, 0.928135", \ + "0.369780, 0.371596, 0.383082, 0.410569, 0.432515, 0.562823, 0.875858", \ + "0.450785, 0.453965, 0.464637, 0.488131, 0.513541, 0.635787, 0.932531" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005319, 0.005325, 0.005330, 0.005335, 0.005341, 0.005346, 0.005351"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008905, 0.008987, 0.008996, 0.009005, 0.009014, 0.009023, 0.009032"); + } + } + } + pin(DFTRAMBYP) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001615; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.495890, 0.497400, 0.502330, 0.513020, 0.525670, 0.578390, 0.756280", \ + "0.495310, 0.496820, 0.501750, 0.512440, 0.525090, 0.577810, 0.755700", \ + "0.490420, 0.491930, 0.496860, 0.507550, 0.520200, 0.572920, 0.750810", \ + "0.480800, 0.482310, 0.487240, 0.497930, 0.510580, 0.563300, 0.741190", \ + "0.470870, 0.472380, 0.477310, 0.488000, 0.500650, 0.553370, 0.731260", \ + "0.425190, 0.426700, 0.431630, 0.442320, 0.454970, 0.507690, 0.685580", \ + "0.461230, 0.462740, 0.467670, 0.478360, 0.491010, 0.543730, 0.721620" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.668630, 0.669940, 0.675480, 0.688580, 0.701790, 0.754720, 0.946530", \ + "0.668040, 0.669350, 0.674890, 0.687990, 0.701200, 0.754130, 0.945940", \ + "0.663080, 0.664390, 0.669930, 0.683030, 0.696240, 0.749170, 0.940980", \ + "0.653540, 0.654850, 0.660390, 0.673490, 0.686700, 0.739630, 0.931440", \ + "0.643620, 0.644930, 0.650470, 0.663570, 0.676780, 0.729710, 0.921520", \ + "0.597930, 0.599240, 0.604780, 0.617880, 0.631090, 0.684020, 0.875830", \ + "0.634780, 0.636090, 0.641630, 0.654730, 0.667940, 0.720870, 0.912680" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.495890, 0.497400, 0.502330, 0.513020, 0.525670, 0.578390, 0.756280", \ + "0.495310, 0.496820, 0.501750, 0.512440, 0.525090, 0.577810, 0.755700", \ + "0.490420, 0.491930, 0.496860, 0.507550, 0.520200, 0.572920, 0.750810", \ + "0.480800, 0.482310, 0.487240, 0.497930, 0.510580, 0.563300, 0.741190", \ + "0.470870, 0.472380, 0.477310, 0.488000, 0.500650, 0.553370, 0.731260", \ + "0.425190, 0.426700, 0.431630, 0.442320, 0.454970, 0.507690, 0.685580", \ + "0.461230, 0.462740, 0.467670, 0.478360, 0.491010, 0.543730, 0.721620" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.668630, 0.669940, 0.675480, 0.688580, 0.701790, 0.754720, 0.946530", \ + "0.668040, 0.669350, 0.674890, 0.687990, 0.701200, 0.754130, 0.945940", \ + "0.663080, 0.664390, 0.669930, 0.683030, 0.696240, 0.749170, 0.940980", \ + "0.653540, 0.654850, 0.660390, 0.673490, 0.686700, 0.739630, 0.931440", \ + "0.643620, 0.644930, 0.650470, 0.663570, 0.676780, 0.729710, 0.921520", \ + "0.597930, 0.599240, 0.604780, 0.617880, 0.631090, 0.684020, 0.875830", \ + "0.634780, 0.636090, 0.641630, 0.654730, 0.667940, 0.720870, 0.912680" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.898510", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.899900", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.904030", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.913920", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.924170", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.972190", \ + "2.101711, 2.099451, 2.096431, 2.088531, 2.083877, 2.063134, 2.141160" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.898510", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.899900", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.904030", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.913920", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.924170", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.972190", \ + "2.101711, 2.099451, 2.096431, 2.088531, 2.083877, 2.063134, 2.141160" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.536208, 0.536838, 0.537375, 0.537980, 0.538525, 0.539064, 0.539594"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.599936, 0.600675, 0.601276, 0.601877, 0.602479, 0.603081, 0.603684"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.859061, 1.856801, 1.853781, 1.845881, 1.841227, 1.820484, 1.793760", \ + "1.860451, 1.858191, 1.855171, 1.847271, 1.842617, 1.821874, 1.795150", \ + "1.864581, 1.862321, 1.859301, 1.851401, 1.846747, 1.826004, 1.799280", \ + "1.874471, 1.872211, 1.869191, 1.861291, 1.856637, 1.835894, 1.809170", \ + "1.884721, 1.882461, 1.879441, 1.871541, 1.866887, 1.846144, 1.819420", \ + "1.932741, 1.930481, 1.927461, 1.919561, 1.914907, 1.894164, 1.867440", \ + "1.996961, 1.994701, 1.991681, 1.983781, 1.979127, 1.958384, 1.931660" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.691980, 0.687820, 0.687170, 0.674780, 0.666990, 0.620550, 0.540290", \ + "0.700380, 0.696220, 0.695570, 0.683180, 0.675390, 0.628950, 0.548690", \ + "0.701680, 0.697520, 0.696870, 0.684480, 0.676690, 0.630250, 0.549990", \ + "0.726380, 0.722220, 0.721570, 0.709180, 0.701390, 0.654950, 0.574690", \ + "0.741980, 0.737820, 0.737170, 0.724780, 0.716990, 0.670550, 0.590290", \ + "0.834880, 0.830720, 0.830070, 0.817680, 0.809890, 0.763450, 0.683190", \ + "0.995380, 0.991220, 0.990570, 0.978180, 0.970390, 0.923950, 0.843690" \ + ); + } + } + } + bus(SIB) { + bus_type : rf2_32x128_wm1_SIB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005450; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.145350, 0.144770, 0.149910, 0.158180, 0.172420, 0.223540, 0.410960", \ + "0.142260, 0.141680, 0.146820, 0.155090, 0.169330, 0.220450, 0.407870", \ + "0.136670, 0.136090, 0.141230, 0.149500, 0.163740, 0.214860, 0.402280", \ + "0.126780, 0.126200, 0.131340, 0.139610, 0.153850, 0.204970, 0.392390", \ + "0.116890, 0.116310, 0.121450, 0.129720, 0.143960, 0.195080, 0.382500", \ + "0.070490, 0.069910, 0.075050, 0.083320, 0.097560, 0.148680, 0.336100", \ + "0.110079, 0.109750, 0.114639, 0.122909, 0.137149, 0.188269, 0.375689" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.163530, 0.165980, 0.171500, 0.185620, 0.195670, 0.255790, 0.456550", \ + "0.161270, 0.163720, 0.169240, 0.183360, 0.193410, 0.253530, 0.454290", \ + "0.155730, 0.158180, 0.163700, 0.177820, 0.187870, 0.247990, 0.448750", \ + "0.146000, 0.148450, 0.153970, 0.168090, 0.178140, 0.238260, 0.439020", \ + "0.136000, 0.138450, 0.143970, 0.158090, 0.168140, 0.228260, 0.429020", \ + "0.089600, 0.092050, 0.097570, 0.111690, 0.121740, 0.181860, 0.382620", \ + "0.129065, 0.131515, 0.137035, 0.151155, 0.161205, 0.221325, 0.422085" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.304710, 0.302260, 0.296350, 0.286190, 0.274180, 0.228940, 0.272626", \ + "0.305770, 0.303320, 0.297410, 0.287250, 0.275240, 0.230000, 0.273686", \ + "0.311570, 0.309120, 0.303210, 0.293050, 0.281040, 0.235800, 0.279486", \ + "0.321540, 0.319090, 0.313180, 0.303020, 0.291010, 0.245770, 0.289456", \ + "0.331840, 0.329390, 0.323480, 0.313320, 0.301310, 0.256070, 0.299756", \ + "0.378110, 0.375660, 0.369750, 0.359590, 0.347580, 0.302340, 0.346026", \ + "0.547390, 0.544940, 0.539030, 0.528870, 0.516860, 0.471620, 0.515306" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.305180, 0.302710, 0.296420, 0.285210, 0.271940, 0.218298, 0.248847", \ + "0.306220, 0.303750, 0.297460, 0.286250, 0.272980, 0.219338, 0.249887", \ + "0.312020, 0.309550, 0.303260, 0.292050, 0.278780, 0.225138, 0.255687", \ + "0.321960, 0.319490, 0.313200, 0.301990, 0.288720, 0.235078, 0.265627", \ + "0.332270, 0.329800, 0.323510, 0.312300, 0.299030, 0.245388, 0.275937", \ + "0.378560, 0.376090, 0.369800, 0.358590, 0.345320, 0.291678, 0.322227", \ + "0.547850, 0.545380, 0.539090, 0.527880, 0.514610, 0.460968, 0.491517" \ + ); + } + } + internal_power() { + when : "SEB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(SEB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001746; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.742728, 0.747363, 0.757345, 0.776001, 0.800060, 0.906354, 1.181810", \ + "0.741026, 0.745660, 0.755642, 0.774298, 0.798358, 0.904652, 1.180107", \ + "0.737211, 0.741846, 0.751828, 0.770483, 0.794543, 0.900837, 1.176293", \ + "0.727108, 0.731742, 0.741725, 0.760380, 0.784439, 0.890734, 1.166189", \ + "0.715944, 0.720579, 0.730561, 0.749216, 0.773276, 0.879570, 1.155026", \ + "0.668783, 0.673418, 0.683401, 0.702056, 0.726116, 0.832410, 1.107865", \ + "0.756817, 0.760512, 0.770004, 0.789810, 0.812229, 0.916283, 1.172419" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.742728, 0.747363, 0.757345, 0.776001, 0.800060, 0.906354, 1.181810", \ + "0.741026, 0.745660, 0.755642, 0.774298, 0.798358, 0.904652, 1.180107", \ + "0.737211, 0.741846, 0.751828, 0.770483, 0.794543, 0.900837, 1.176293", \ + "0.727108, 0.731742, 0.741725, 0.760380, 0.784439, 0.890734, 1.166189", \ + "0.715944, 0.720579, 0.730561, 0.749216, 0.773276, 0.879570, 1.155026", \ + "0.668783, 0.673418, 0.683401, 0.702056, 0.726116, 0.832410, 1.107865", \ + "0.756817, 0.760512, 0.770004, 0.789810, 0.812229, 0.916283, 1.172419" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.338294, 0.336468, 0.331705, 0.322124, 0.312785, 0.277464, 0.356671", \ + "0.339328, 0.337502, 0.332739, 0.323158, 0.313819, 0.278498, 0.357705", \ + "0.345708, 0.343882, 0.339119, 0.329538, 0.320199, 0.284878, 0.364085", \ + "0.356642, 0.354816, 0.350053, 0.340472, 0.331133, 0.295812, 0.375019", \ + "0.367994, 0.366168, 0.361405, 0.351824, 0.342485, 0.307164, 0.386371", \ + "0.418880, 0.417054, 0.412291, 0.402710, 0.393371, 0.358050, 0.437257", \ + "0.594613, 0.592787, 0.588024, 0.578443, 0.569104, 0.533783, 0.612990" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.338294, 0.336468, 0.331705, 0.322124, 0.312785, 0.277464, 0.356671", \ + "0.339328, 0.337502, 0.332739, 0.323158, 0.313819, 0.278498, 0.357705", \ + "0.345708, 0.343882, 0.339119, 0.329538, 0.320199, 0.284878, 0.364085", \ + "0.356642, 0.354816, 0.350053, 0.340472, 0.331133, 0.295812, 0.375019", \ + "0.367994, 0.366168, 0.361405, 0.351824, 0.342485, 0.307164, 0.386371", \ + "0.418880, 0.417054, 0.412291, 0.402710, 0.393371, 0.358050, 0.437257", \ + "0.594613, 0.592787, 0.588024, 0.578443, 0.569104, 0.533783, 0.612990" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.301351, 0.302128, 0.303839, 0.304144, 0.304447, 0.304578, 0.304882"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.321406, 0.324073, 0.324397, 0.324721, 0.325046, 0.325371, 0.325696"); + } + } + } + pin(COLLDISN) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002074; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682554, 1.683874, 1.688344, 1.700024, 1.709344, 1.757094, 1.929424", \ + "1.681024, 1.682344, 1.686814, 1.698494, 1.707814, 1.755564, 1.927894", \ + "1.676204, 1.677524, 1.681994, 1.693674, 1.702994, 1.750744, 1.923074", \ + "1.666804, 1.668124, 1.672594, 1.684274, 1.693594, 1.741344, 1.913674", \ + "1.656174, 1.657494, 1.661964, 1.673644, 1.682964, 1.730714, 1.903044", \ + "1.608030, 1.609350, 1.613820, 1.625500, 1.634820, 1.682570, 1.854900", \ + "1.649238, 1.650558, 1.655028, 1.666708, 1.676028, 1.723778, 1.896108" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682554, 1.683874, 1.688344, 1.700024, 1.709344, 1.757094, 1.929424", \ + "1.681024, 1.682344, 1.686814, 1.698494, 1.707814, 1.755564, 1.927894", \ + "1.676204, 1.677524, 1.681994, 1.693674, 1.702994, 1.750744, 1.923074", \ + "1.666804, 1.668124, 1.672594, 1.684274, 1.693594, 1.741344, 1.913674", \ + "1.656174, 1.657494, 1.661964, 1.673644, 1.682964, 1.730714, 1.903044", \ + "1.608030, 1.609350, 1.613820, 1.625500, 1.634820, 1.682570, 1.854900", \ + "1.649238, 1.650558, 1.655028, 1.666708, 1.676028, 1.723778, 1.896108" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.335177, 2.332917, 2.329897, 2.321997, 2.317343, 2.296600, 2.374626", \ + "2.336567, 2.334307, 2.331287, 2.323387, 2.318733, 2.297990, 2.376016", \ + "2.340697, 2.338437, 2.335417, 2.327517, 2.322863, 2.302120, 2.380146", \ + "2.350587, 2.348327, 2.345307, 2.337407, 2.332753, 2.312010, 2.390036", \ + "2.360837, 2.358577, 2.355557, 2.347657, 2.343003, 2.322260, 2.400286", \ + "2.408857, 2.406597, 2.403577, 2.395677, 2.391023, 2.370280, 2.448306", \ + "2.577827, 2.575567, 2.572547, 2.564647, 2.559993, 2.539250, 2.617276" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.885676, 1.886996, 1.891466, 1.903146, 1.912466, 1.960216, 2.132546", \ + "1.884146, 1.885466, 1.889936, 1.901616, 1.910936, 1.958686, 2.131016", \ + "1.879326, 1.880646, 1.885116, 1.896796, 1.906116, 1.953866, 2.126196", \ + "1.869926, 1.871246, 1.875716, 1.887396, 1.896716, 1.944466, 2.116796", \ + "1.859296, 1.860616, 1.865086, 1.876766, 1.886086, 1.933836, 2.106166", \ + "1.811152, 1.812472, 1.816942, 1.828622, 1.837942, 1.885692, 2.058022", \ + "1.852360, 1.853680, 1.858150, 1.869830, 1.879150, 1.926900, 2.099230" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.885676, 1.886996, 1.891466, 1.903146, 1.912466, 1.960216, 2.132546", \ + "1.884146, 1.885466, 1.889936, 1.901616, 1.910936, 1.958686, 2.131016", \ + "1.879326, 1.880646, 1.885116, 1.896796, 1.906116, 1.953866, 2.126196", \ + "1.869926, 1.871246, 1.875716, 1.887396, 1.896716, 1.944466, 2.116796", \ + "1.859296, 1.860616, 1.865086, 1.876766, 1.886086, 1.933836, 2.106166", \ + "1.811152, 1.812472, 1.816942, 1.828622, 1.837942, 1.885692, 2.058022", \ + "1.852360, 1.853680, 1.858150, 1.869830, 1.879150, 1.926900, 2.099230" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.380670, 2.378410, 2.375390, 2.367490, 2.362836, 2.342093, 2.420119", \ + "2.382060, 2.379800, 2.376780, 2.368880, 2.364226, 2.343483, 2.421509", \ + "2.386190, 2.383930, 2.380910, 2.373010, 2.368356, 2.347613, 2.425639", \ + "2.396080, 2.393820, 2.390800, 2.382900, 2.378246, 2.357503, 2.435529", \ + "2.406330, 2.404070, 2.401050, 2.393150, 2.388496, 2.367753, 2.445779", \ + "2.454350, 2.452090, 2.449070, 2.441170, 2.436516, 2.415773, 2.493799", \ + "2.623320, 2.621060, 2.618040, 2.610140, 2.605486, 2.584743, 2.662769" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "2.380670, 2.378410, 2.375390, 2.367490, 2.362836, 2.342093, 2.420119", \ + "2.382060, 2.379800, 2.376780, 2.368880, 2.364226, 2.343483, 2.421509", \ + "2.386190, 2.383930, 2.380910, 2.373010, 2.368356, 2.347613, 2.425639", \ + "2.396080, 2.393820, 2.390800, 2.382900, 2.378246, 2.357503, 2.435529", \ + "2.406330, 2.404070, 2.401050, 2.393150, 2.388496, 2.367753, 2.445779", \ + "2.454350, 2.452090, 2.449070, 2.441170, 2.436516, 2.415773, 2.493799", \ + "2.623320, 2.621060, 2.618040, 2.610140, 2.605486, 2.584743, 2.662769" \ + ); + } + } + } + leakage_power() { + related_pg_pin : "VDDCE"; + value : 1.512e-04; + } + leakage_power() { + related_pg_pin : "VDDPE"; + value : 2.530e-04; + } + leakage_power() { + related_pg_pin : "VDDCE"; + when :"!RET1N"; + value : 1.505e-04; + } + leakage_power() { + related_pg_pin : "VDDPE"; + when :"!RET1N"; + value : 1.887e-04; + } + } +} diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.ps b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.ps new file mode 100644 index 00000000..6173c88d --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_ss_0p81v_0p81v_m40c.ps @@ -0,0 +1,5472 @@ +%!PS-Adobe-3.0 +% common_memcomp Version: c0.1.0-EAC +% lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +% CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +% +% Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +% +% Use of this Software is subject to the terms and conditions of the +% applicable license agreement with ARM Physical IP, Inc. +% In addition, this Software is protected by patents, copyright law +% and international treaties. +% +% The copyright notice(s) in this Software does not indicate actual or +% intended publication of this Software. +% +% Compiler Name: High Density Two Port Register File SVT MVT Compiler +% +% Creation Date: Thu Oct 17 15:31:58 2019 +% +% Instance Options: +% Instance Name: rf2_32x128_wm1 +% Number of Words: 32 +% Number of Bits: 128 +% Multiplexer Width: 2 +% Multi-Vt selection: BASE +% Frequency : 1 +% Activity Factor <%>: 50 +% Pipeline: off +% Word-Write Mask: on +% Word Partition Size: 1 +% Write through: off +% Top Metal Layer: m5-m10 +% Power Type: otc +% Redundancy: off +% Redundant Columns: 2 +% Redundant Rows: 0 +% BIST MUXes: on +% Soft Error Repair (SER): none +% Power Gating: off +% Back Biasing: off +% Retention: on +% Extra Margin Adjustment: on +% Advanced Test Features: off +% Customer Comment: This is a memory instance +% Bus-notation: on +% Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +% Name Case: upper +% Check Instance Name: off +% Diodes: on +% Drive Strength: 6 +% Site Definitions: off +% Library Name: USERLIB +% Liberty setting: nldm +% +% Compiler Versions: +% Memory Version: r4p0 +% Lang compiler Version: 4.1.6-EAC2 +% View Name: Postscript +% AMCI Version: 1.4.3-EAC +% RTE Version: 2.1.0-EAC +% datasheet_memcomp Version: 1.3.1-amci +% +% Modeling Assumptions: N/A +% +% Modeling Limitations: N/A +% +% Known Bugs: N/A +% +% Known Work Arounds: N/A +% +%%BoundingBox: 0 0 612 792 +%%Creator: post +%%DocumentData: Clean8Bit +%%DocumentPaperSizes: Letter +%%Orientation: Portrait +%%Pages: (atend) +%%PageOrder: Ascend +%%For: ARM +%%EndComments + +%%BeginProlog + +% TableRow sets the table row height +% Expects dy on the stack +/TableRow { + /tablerow exch def +} def + + +% ArrowRight prints an arrow pointing to the right +% Expects text x y on the stack +/ArrowRight { + newpath + moveto + -2.5 1 rmoveto + 2.5 -1 rlineto + -2.5 -1 rlineto + stroke +} def + + +% ArrowLeft prints an arrow pointing to the left +% Expects text x y on the stack +/ArrowLeft { + newpath + moveto + 2.5 1 rmoveto + -2.5 -1 rlineto + 2.5 -1 rlineto + stroke +} def + + +% ArrowUp prints an arrow pointing up +% Expects text x y on the stack +/ArrowUp { + newpath + moveto + 1 -2.5 rmoveto + -1 2.5 rlineto + -1 -2.5 rlineto + stroke +} def + + +% ArrowDown prints an arrow pointing down +% Expects text x y on the stack +/ArrowDown { + newpath + moveto + 1 2.5 rmoveto + -1 -2.5 rlineto + -1 2.5 rlineto + stroke +} def + + +% CenterLabel prints text centered at the x,y +% centers on x only +% Expects text subscript x y on the stack +/CenterLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 2 div 0 exch sub % 0-dx/2 on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% LeftLabel prints text to the left of the x,y +% centers on x only +% Expects text subscript x y on the stack +/LeftLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 0 exch sub % 0-dx on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% RightLabel prints text to the right of the x,y +% Expects text subscript x y on the stack +/RightLabel { + moveto + exch + show + 0 -2 rmoveto + show +} def + + +% CenterText prints text centered at the x,y +% centers on x only +% Expects text x y on the stack +/CenterText { + moveto + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% Table2start begins a 2 column table. +% Expects 5 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table2Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table2End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table2End { + 1 setlinewidth + tablex tabley + table1width table2width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table2DoubleLine doubles up the line at the bottom of a box +% Expects nothing on the stack +/Table2DoubleLine { + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 1.5 setlinewidth + stroke +} def + + +% Table2Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table2Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + + +% Table2CC prints centered strings at the top of a 2 column table. +% Expects string string on the stack +/Table2CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + + +% Table2LC prints one left aligned string and one centered string +% Expects 2 strings on the stack +/Table2LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LCMicron prints one left aligned string and one centered string +% The centered string has a micron symbol at the end of it. +% Expects 2 strings on the stack +/Table2LCMicron { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % col 2 width + TextFont setfont + dup stringwidth pop % dx of string on stack + /Symbol findfont 12 scalefont setfont + (\155) stringwidth pop % dx of symbol u on stack + add % dx of number with mu + TextFont setfont + (m) stringwidth pop % dx of m on stack + add % dx of entire box contents on stack + 2 div % dx/2 on stack + + % col 2 + tablex table1width add table2width 2 div add % xcenter of square on stack + exch sub + tabley 3 add % string x y+3 on stack + moveto + TextFont setfont + show + /Symbol findfont 12 scalefont setfont + (\155) show + TextFont setfont + (m) show + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LL prints two left aligned strings +% at the top of a 2 column table. +% Expects 2 string (text) on the stack +/Table2LL { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + + % col 1 + tablex + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + +} def + + +% Table2Header prints the header to the table +% Expects string string on the stack +/Table2Header { + tablex tabley moveto + table1width table2width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + Table2CC + 0 setgray +} def + + +/Table4Header { + tablex tabley moveto + table1width table2width add table3width add table4width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add table3width add table4width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + /TextSuperScriptFont /Helvetica findfont 8 scalefont def + Table4CC + 0 setgray +} def + + +/CenterTextSuperScript{ + moveto + /sqSuper exch def + /mUnit exch def + dup stringwidth pop % string x on stack + 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show + + mUnit () ne{ + 2 0 rmoveto + (\()show + /Symbol findfont 8 scalefont setfont + (\155) show + TextSuperScriptFont setfont + mUnit show + TextFont setfont + sqSuper () eq { + (\))show + }if + }if + + sqSuper () ne { + 0 4 rmoveto + TextSuperScriptFont setfont + sqSuper show + 0 -4 rmoveto + TextFont setfont + (\)) show + } if +} def + + +/Table4CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + % col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + +% Table4Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table4Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table2width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table3width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table4width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + +% Table4LC prints one left aligned string and one centered string +% Expects 4 strings on the stack +/Table4LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + %col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + %col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + +% Table4End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table4End { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + +% Table4Start begins a 4 column table. +% Expects 7 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table4Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4width exch def + /table3width exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerStart begins a 2 column table of 1 process corners. +% Expects 5 values on the stack: w1 ... wn xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table5width 0 def + /table4width 0 def + /table3width 0 def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table1CornerEnd { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add table5width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % between col 1 and 2 + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + table5width 0 rlineto + stroke + + 1 setlinewidth +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerTRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost thrice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner4Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost four times as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner5Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost five times as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% Table1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% Table1CornerCornerCol prints the header on the first column +% Expects string string string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerCornerCol { + /xc exch def + /temp exch def + /volt exch def + + % first line + TextFont setfont + xc tabley 3 add tablerow 2 div add % string xc y on stack + CenterText + + % next line width + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xc exch sub + tabley 5 add moveto + + % next line display + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + +} def + + +% Table1CornerHeader prints the header to the table +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/Table1CornerHeader { + (Pin) % column headings + (ss Process) (0.81) (-40) + + /tablerow tablerow tablerow add def % Double the y size + + % make a box around the header area + tablex tabley moveto + table1width table2width add table3width add table4width add table5width add 0 rlineto + 0 0 tablerow sub rlineto + table1width table2width add table3width add table4width add table5width add 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray % gray fill the box + fill + + % White lines and text + 1.0 setgray + + /tabley tabley tablerow sub def + + % do the vertical lines between columns + Table1CornerVerticals + + % Column 1 header + tablex table1width add table2width 2 div add Table1CornerCornerCol + + % Pin column header + tablex table1width 2 div add Table1CornerFirstCol + + % back to black lines and text + 0 setgray + + % Restore the row height + /tablerow tablerow 2 div def +} def + + +% TableD1CornerStart begins a 2 column table of 1 double process corners. +% Expects values on the stack: pin_width corn1_1 corn1_2 +% corn2_1 corn2_2 corn3_1 corn3_2 corn4_1 corn4_2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/TableD1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4_2_width 0 def + /table4_1_width 0 def + /table3_2_width 0 def + /table3_1_width 0 def + /table2_2_width 0 def + /table2_1_width 0 def + /table1_2_width exch def + /table1_1_width exch def + /tablep_width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableD1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableD1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% TableD1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableD1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + % single between pin and first corner + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + + +% TableD1CornerRow prints centered strings +% Expects 3 strings on the stack +/TableD1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % pin name + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + +} def + + +% TableD1CornerDRow prints centered strings +% The pin description is broken into 2 rows for this one. +% Expects 10 strings on the stack +/TableD1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % pin name in two rows + tablex 5 add + tabley 3 add + moveto + TextFont setfont + show + tablex 5 add + tabley 13 add + moveto + show + + % restore the y height of the row + /tablerow olddy def + +} def + + +% TableD1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableD1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableD1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableD1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 4 div def + + % first line (Fast Process) + xct + tabley h add h add h add 3 add % string xc y on stack + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Pulse) xcl tabley h add 3 add CenterText + (Width) xcl tabley 5 add CenterText + + % Voltage display + (Voltage) xcr tabley 3 add h 2 div add CenterText + +} def + + +% Centers converts 3 values to the 3 needed centers +% Expects xleft width1 width2 on stack +% Returns xtc xlc xrc +/Centers { + /w2 exch def + /w1 exch def + /l exch def + + l w1 add % xtc on stack + l w1 2 div add % xtc xlc on stack + l w1 add w2 2 div add % xtc xlc xrc on stack +} def + + +% TableD1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableD1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (ss Process) (0.81) (-40) + /tablerow tablerow 4 mul def % 4* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in almost white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableD1CornerVerticals + /tableheader 0 def + + tablex tablep_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableD1CornerCornerCol + + tablex tablep_width 2 div add TableD1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 4 div def +} def + + +% TableT1CornerStartHydra begins a 2 column table of 1 double process corners. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStartHydra { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 80 def + /tablep_width 115 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableT1CornerStart begins a 2 column table of 1 double process corners. Extend first and second cols. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStart { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 130 def + /tablep_width 165 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% EMAIlegalFootnote +% Expects nothing on the stack +% returns new page y +/EMAIllegalFootnote { + /tabley pagey 10 sub def + tablex tabley moveto + TextFont setfont + (Timing value of ** indicates illegal EMA setting for this corner.) show +} def + + +% TableT1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableT1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width tablet_width add + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + found999 (yes) eq + { EMAIllegalFootnote } if + tabley % return y +} def + + +% TableT1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableT1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + + % double between symbol and first corner + newpath + tablex tabley moveto + tablep_width tablet_width add 1 sub 0 rmoveto + 0 tablerow rlineto + stroke + newpath + tablex tabley moveto + tablep_width tablet_width add 1 add 0 rmoveto + 0 tablerow rlineto + stroke + + % single between pin and symbol + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + +% CenterText999 prints text centered at the x,y +% '999' is changed to ** +% centers on x only +% Expects text x y on the stack +/CenterText999 { + moveto + dup (999.000) eq + { % replace string if == '999.000' + pop + (**) + % found999 (yes) def + } if + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% TableT1CornerRow prints centered strings +% Expects 3 strings on the stack +% pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley 4 add % x y+4 on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner6Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 6 mul def % 6* the y size + /yup 45 def + /yupc tablerow 6 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 75 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerDRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley olddy add + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableT1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableT1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableT1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 3 div def + + % first line (Fast Process) + xct + tabley h add h add 3 add % string xc y on stack + TextFont setfont + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Min) xcl tabley 5 add CenterText + + % Voltage display + (Max) xcr tabley 5 add CenterText + +} def + + +% TableT1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Second string is over the symbol column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableT1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (ss Process) (0.81) (-40) + + % Setup the fonts for the heading + /TextFont /Helvetica-Bold findfont text_size scalefont def + + /tablerow tablerow 3 mul def % 3* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableT1CornerVerticals + /tableheader 0 def + + tablex tablep_width add tablet_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableT1CornerCornerCol + + tablex tablep_width add tablet_width 2 div add TableT1CornerFirstCol + + tablex tablep_width 2 div add TableT1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 3 div def + + % Setup the fonts for the rest of the table + /TextFont /Helvetica findfont text_size scalefont def + /TextSuperscriptFont /Helvetica findfont 8 scalefont def +} def + + +% TextEnd ends a paragraph (or series of paragraphs) +% Expects nothing on the stack +% returns the new page y +/TextEnd { + text_y % return this +} def + + +% TextBulletOn sets bullets at start of para +% Expects nothing on the stack +/TextBulletOn { + /text_bullet true def + /Symbol findfont text_size scalefont setfont + (\267 ) stringwidth pop + /text_bullet_width exch def + TextFont setfont + /text_bullet true def +} def + + +% TextBulletOff sets bullets off at start of para +% Expects nothing on the stack +/TextBulletOff { + /text_bullet false def +} def + + +% TextStart initializes the paragraph stuff +% Expects left right margins y deltay on the stack +/TextStart { + /text_dy exch def + /text_y exch def + /text_right exch def + /text_left exch def + /text_starty text_y def + /text_bullet false def + /text_size 10 def + /text_indent_width 0 def +} def + + +% TextParaStart initializes one paragraph +% Expects nothing on the stack +/TextParaStart { + + % carrige return linefeed + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + + % if bullet show and step over in x + text_bullet { + /Symbol findfont text_size scalefont setfont + (\267 ) show + TextFont setfont + /text_x text_x text_bullet_width add def + } if + + % text_indent does not apply to the first line +} def + + +% TextParaEnd ends one paragraph. +% Expects nothing on the stack +/TextParaEnd { +} def + + +% TextIndent sets the indent string used at start of para +% all following lines space over the indent width +% Expects string on the stack +/TextIndent { + stringwidth pop + /text_indent_width exch def +} def + + +% TextNewline does a carrige return line feed +% Expects nothing on the stack +/TextNewline { + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + text_bullet { + text_bullet_width 0 rmoveto + /text_x text_x text_bullet_width add def + } if + text_indent_width 0 gt { + text_indent_width 0 rmoveto + /text_x text_x text_indent_width add def + } if +} def + + +% TextWord puts one word in the current paragraph +% Expects string on the stack +/TextWord { + dup stringwidth pop % dx on the stack + /text_dx exch def + text_dx text_x add % x pos at end of word on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true + dup ( ) eq + text_x text_left eq + and % if word is space and at left margin then pop + { + pop + } { + show + /text_x text_x text_dx add def + } ifelse % else show +} def + + +% TextSuperscript puts a superscript word in the current paragraph +% The routine does not test for too wide, the superscript MUST +% go with the previous word. +% Expects string on the stack +/TextSuperscript { + TextSuperscriptFont setfont + dup stringwidth pop % dx on the stack + /text_x exch text_x add def + 0 4 rmoveto + show + 0 0 text_size 2 div sub rmoveto + TextFont setfont +} def + + +% TextReserveSpace makes sure there is enough space on +% the current line for the given text to be printed. +% If there isnt enough, a newline is generated. +/TextReserveSpace { + stringwidth pop % dx on the stack + text_x add % x at end of work on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true +} def + + +% TextPiece puts words in the current paragraph +% Expects string on the stack +/TextPiece { + TextFont setfont + { + % expect string to search on stack + ( ) search % post match pre true or string false on stack + { TextWord TextWord } % true display pre, display space + { TextWord exit } % false display string break + ifelse + % go around loop again with string to search on stack + } loop +} def + + +% Expects string on the stack +% Uses c and s vars +/TextFourAdd { + s 1 eq { + % first one + TextPiece + } { + s c eq { + % last one + ( and ) TextPiece + TextPiece + } { + % a middle one + (, ) TextPiece + TextPiece + } ifelse + } ifelse +} def + + +% TextFourList prints from 1 to 4 things to the paragraph +% Expects 4 strings on the stack. (3 could be empty). +/TextFourList { + /s1 exch def + /s2 exch def + /s3 exch def + /s4 exch def + /c 0 def + + % count the number of items + s1 () ne { + /c c 1 add def + } if + s2 () ne { + /c c 1 add def + } if + s3 () ne { + /c c 1 add def + } if + s4 () ne { + /c c 1 add def + } if + + % display the items + /s 0 def + s1 () ne { + /s 1 s add def + s1 TextFourAdd + } if + s2 () ne { + /s 1 s add def + s2 TextFourAdd + } if + s3 () ne { + /s 1 s add def + s3 TextFourAdd + } if + s4 () ne { + /s 1 s add def + s4 TextFourAdd + } if + +} def + + +% TextLine puts a complete paragraph on the page +% Expects string on the stack +/TextLine { + dup () eq { + % Empty, go down 1/2 line. + pop + /text_y text_y text_dy 2 div sub def + } { + % Normal string, show it + TextParaStart + TextPiece + TextParaEnd + } ifelse +} def + + +% TextDegree prints a degree symbol +% Expects nothing on the stack +/TextDegree { + /TextFont /Symbol findfont text_size scalefont def + (\260) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextRegistered prints a copyright symbol +% Expects nothing on the stack +/TextRegistered { + /TextFont /Symbol findfont text_size scalefont def + (\342) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextTrademark prints a degree symbol +% Expects nothing on the stack +/TextTrademark { + /TextFont /Symbol findfont text_size scalefont def + (\344) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextCopyright prints a copyright symbol +% Expects nothing on the stack +/TextCopyright { + /TextFont /Symbol findfont text_size scalefont def + (\343) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% LeftShow prints text to the left of the point +% Expects string x y on the stack +/LeftShow { + moveto + dup stringwidth pop % string dx on stack + 0 exch sub % 0-x on stack + 0 rmoveto + show +} def + + +% LeftShowMicron prints text to the left of the point +% Expects two string x y on the stack +/LeftShowMicron { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /procString exch def + dup stringwidth pop + /techStringWidth exch def + /techString exch def + suffStringWidth techStringWidth add 20 add 0 exch sub 0 rmoveto + techString show + /Symbol findfont title_size scalefont setfont + (\155) show + /Helvetica-Bold findfont title_size scalefont setfont + (m) show + procString show +}def + +% LeftShowRedundancy prints text to the left of the point +% Expects two string x y on the stack +/LeftShowRedundancy { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /textRed exch def + suffStringWidth 20 add 0 exch sub 0 rmoveto + textRed show + title_size 2 div 0 exch rmoveto + /Helvetica-Bold findfont text_size scalefont setfont + (TM) show + /Helvetica-Bold findfont title_size scalefont setfont +} def + + + +% SectionLine does the line part of the section header +% Expects y on the stack +/SectionLine { + /y exch def + /y y line_above sub def + newpath + line_left y moveto + line_right y lineto + 1 setlinewidth + stroke +} def + + +% SectionStart prints a horizontal bar and a section header on the page +% Expects string string y on the stack +% returns the new page y +/SectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /text2 exch def % get the subtext + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + text2 () ne { + /Helvetica findfont text_size scalefont setfont + ( \() show % space over + text2 show % print the explanation + (\)) show + } if + y 10 add % return new y +} def + +% MicronSectionStart prints a horizontal bar and a section header on the page +% Expects string y on the stack +% returns the new page y +/MicronSectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + + y 10 add % return new y +} def + +/line_left 55 def +/line_right 550 def +/line_above 10 def +/line_below 10 def + +% EndingCopyright prints the copyright info at the end +% of the last page. The y location is set but the x size +% depends on the section line size. +% Expects xc y on the stack +/EndingCopyright { + SectionLine + /y y line_below sub def + /xc exch def + line_left line_right y 9 TextStart + /text_size 7 def + /TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(Words and logos marked with ) TextPiece +TextRegistered +( or ) TextPiece +TextTrademark +( are registered trademarks or trademarks of ARM) TextPiece +TextRegistered +( in the EU and other countries, except as otherwise stated below in this\ + proprietary notice. Other brands and names mentioned herein may be the trademarks\ + of their respective owners.) TextPiece +TextParaEnd +/text_y text_y 4 sub def +(Neither the whole nor any part of the information contained in, or the\ + product described in, this document may be adapted or reproduced in any\ + material form except with the prior written permission of the copyright holder.) TextLine +/text_y text_y 4 sub def +(The product described in this document is subject to continuous developments\ + and improvements. All particulars of the product and its use contained in this\ + document are given by ARM in good faith. However, all warranties implied or \ + expressed, including but not limited to implied warranties of merchantability, or\ + fitness for purpose, are excluded.) TextLine +/text_y text_y 4 sub def +(This document is intended only to assist the reader in the use of the product. \ + ARM shall not be liable for any loss or damage arising from the use of any \ + information in this document, or any error or omission in such information, or \ + any incorrect use of the product.) TextLine +/text_y text_y 4 sub def +(Where the term ARM is used it means "ARM or any of its subsidiaries as appropriate".) TextLine +/text_y text_y 4 sub def +(ARM reserves the right to make changes to any products and services\ + described herein, at any time without notice in order to make improvements\ + in design, performance, or presentation and to provide the best possible\ + products and services. Customers should obtain the latest specifications\ + before referencing any information, product, or service described herein,\ + except as expressly agreed in writing by and officer of ARM.) TextLine +/text_y text_y 4 sub def +(ARM does not assume any responsibility or liability arising out of the\ + application or use of any products or services described herein, except\ + as expressly agreed to in writing by and officer of ARM; nor does the\ + purchase, lease, or use of a product or service from ARM convey license\ + under any patent rights, copyrights, trademark rights, or any other of\ + the intellectual property rights of ARM or of third parties.) TextLine +} def + +% CenterTextMu prints two text strings centered at the x,y +% with a mu symbol between the text strings +% centers on x only +% Expects text text x y on the stack +/CenterTextMu { + moveto + /text2 exch def % save second string + /text1 exch def % save first string + /Helvetica findfont 7 scalefont setfont + text1 stringwidth pop % width of first string + text2 stringwidth pop % width of second string + (\155) stringwidth pop % width of mu + add add % width of 2 strings plus mu on stack + 2 div 0 exch sub % 0-x/2 on stack + 0 rmoveto + /Helvetica findfont 7 scalefont setfont + text1 show + /Symbol findfont 7 scalefont setfont + (\155) show + /Helvetica findfont 7 scalefont setfont + text2 show +} def + +% Expects x y scale on the stack +/ARMlogo { + gsave + translate + dup scale + 0.08 0.43 0.53 setrgbcolor + + newpath + 10 10 moveto + 50 10 lineto + 60 38 lineto + 70 62 lineto + 93 117 lineto + 117 62 lineto + 70 62 lineto + 60 38 lineto + 127 38 lineto + 140 10 lineto + 180 10 lineto + 113 150 lineto + 70 150 lineto + closepath + fill + + newpath + 188 10 moveto + 226 10 lineto + 226 125 lineto + 250 125 lineto + 250 109 16 90 270 arcn + 250 93 lineto + 226 93 lineto + 226 67 lineto + 245 67 254 56 12 arcto + 278 10 lineto + 318 10 lineto + 278 80 lineto + 260 109 41 270 90 arc + 188 150 lineto + closepath + fill + + newpath + 330 10 moveto + 367 10 lineto + 367 96 lineto + 407.5 53 lineto + 413.5 53 lineto + 454 96 lineto + 454 10 lineto + 490 10 lineto + 490 150 lineto + 454 150 lineto + 410.5 100 lineto + 367 150 lineto + 330 150 lineto + closepath + fill + + newpath + 1.5 setlinewidth + 507.5 142.5 7.5 0 360 arc + stroke + 503 138 moveto + /Helvetca-Bold findfont 12 scalefont setfont + (R) show + + grestore +} def + +% ShortCopyright will center a copyright message +% at the bottom of the page. +% Expects date page-string xcenter y on the stack +/ShortCopyright { + /y exch def + /xc exch def + /page exch def + /d exch def + /Helvetica findfont 7 scalefont setfont + ( CLN28HPM 28nm Process, RF-2P Datasheet, Version r4p0) xc y CenterText + /y y 10 sub def + (Copyright 1993-2019 ARM. All Rights Reserved.) xc y CenterText + /y y 10 sub def + page xc y CenterText + + % Instance name on left + line_left y 10 add moveto + (rf2_32x128_wm1 ) show + d show + + % Logo on right +} def + + +% SymbolStart begins the part symbol +% Expects xUpperLeft yUpperLeft inPins outPins on stack +/SymbolStart { + /symbolOutPins exch def + /symbolInPins exch def + /symbolY exch def + /symbolX exch def + /symbolCapHeight 20 def + /symbolWidth 90 def + /symbolPinLength 10 def + /symbolPinSpacing 12 def + /symbolInY symbolY symbolCapHeight sub def + /symbolOutY + symbolInPins symbolOutPins sub 2 div + symbolPinSpacing mul + symbolY exch sub symbolCapHeight sub + def + + % box of symbol + newpath + symbolX symbolY moveto + symbolWidth 0 rlineto + symbolCapHeight 2 mul + symbolInPins 1 sub symbolPinSpacing mul add + 0 exch sub + 0 exch rlineto + 0 symbolWidth sub 0 rlineto + closepath + 2 setlinewidth + stroke + + /symbolY symbolY symbolCapHeight 2 mul sub + symbolInPins 1 sub symbolPinSpacing mul sub + def + +} def + +% SymbolEnd completes the part symbol +% Expects nothing on the stack +% Returns bottom of the symbol on the stack +/SymbolEnd { + symbolY 12 sub symbolPinLength sub +} def + +% SymbolInput puts an input pin on the part +% Expects pinName on the stack +/SymbolInput { + dup () ne { + % print nonblank pin + newpath + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rmoveto + -2 -3 rmoveto + dup stringwidth pop 0 exch sub + 0 rmoveto + show + } { + % ignore blank pin + pop + } ifelse + /symbolInPins symbolInPins 1 sub def + /symbolInY symbolInY symbolPinSpacing sub def +} def + +% SymbolOutput puts an output pin on the part +% Expects pinName on the stack +/SymbolOutput { + dup () ne { + newpath + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rmoveto + 2 -3 rmoveto + show + } { + pop + } ifelse + /symbolOutPins symbolOutPins 1 sub def + /symbolOutY symbolOutY symbolPinSpacing sub def +} def + +% Put triangle inside, line down and string +% Expects string x y (left/right) on stack +/SymbolTriangle { + /l exch def + /y exch def + /x exch def + newpath + x y moveto + -3 0 rmoveto + 3 6 rlineto + 3 -6 rlineto + 0.5 setlinewidth + stroke + newpath + x y moveto + 0 0 symbolPinLength sub rlineto + stroke + x y moveto + 0 0 symbolPinLength sub rmoveto + 0 -12 rmoveto + l (left) eq { + dup stringwidth pop 0 exch sub 0 rmoveto + } if + l (center) eq { + dup stringwidth pop 2 div 0 exch sub 0 rmoveto + } if + show +} def + +% SymbolClocks puts two clock pins on the bottom of the part +% Expects pinName pinName on the stack +/SymbolClocks { + symbolX symbolWidth 2 mul 3 div add + symbolY (right) SymbolTriangle % string x y dir on stack + symbolX symbolWidth 3 div add + symbolY (left) SymbolTriangle % string x y dir on stack +} def + +% SymbolClock puts one clock pin on the bottom of the part +% Expects pinName on the stack +/SymbolClock { + symbolX symbolWidth 2 div add + symbolY (center) SymbolTriangle % string x y dir on stack +} def + +% Waves for frame number 1 +% 94 paths, 26 strings +% Expects x y on stack +% bounds: 0.0->347.714 0.0->207.416 +/Frame1 { + gsave + translate + newpath + 109.056 195.874 moveto + 109.056 173.503 lineto + 0.5 setlinewidth + stroke + newpath + 54.056 205.874 moveto + 54.056 138.242 lineto + stroke + newpath + 16.556 173.503 moveto + 49.056 173.503 lineto + 59.056 188.503 lineto + 104.056 188.503 lineto + 114.056 173.503 lineto + 159.056 173.503 lineto + 169.056 188.503 lineto + 214.056 188.503 lineto + 224.056 173.503 lineto + 269.056 173.503 lineto + 279.056 188.503 lineto + 324.056 188.503 lineto + 334.056 173.374 lineto + 346.556 173.374 lineto + stroke + newpath + 54.056 193.374 moveto + 109.056 193.374 lineto + stroke + 54.056 193.374 ArrowLeft + 109.056 193.374 ArrowRight + newpath + 109.056 193.374 moveto + 164.056 193.374 lineto + stroke + 109.056 193.374 ArrowLeft + 164.056 193.374 ArrowRight + newpath + 274.056 205.874 moveto + 274.056 160.116 lineto + stroke + newpath + 219.056 198.374 moveto + 219.056 173.503 lineto + stroke + newpath + 164.056 205.874 moveto + 164.056 167.238 lineto + stroke + newpath + 164.056 193.374 moveto + 219.056 193.374 lineto + stroke + 164.056 193.374 ArrowLeft + 219.056 193.374 ArrowRight + newpath + 219.056 193.374 moveto + 274.056 193.374 lineto + stroke + 219.056 193.374 ArrowLeft + 274.056 193.374 ArrowRight + newpath + 296.556 63.7808 moveto + 296.556 41.4104 lineto + stroke + newpath + 76.556 63.7808 moveto + 76.556 41.4104 lineto + stroke + newpath + 71.556 56.2808 moveto + 16.556 56.2808 lineto + stroke + newpath + 16.556 56.2808 moveto + 71.556 56.2808 lineto + 81.556 41.2808 lineto + 161.556 41.2808 lineto + stroke + newpath + 16.556 41.2808 moveto + 71.556 41.2808 lineto + 81.556 56.2808 lineto + 161.556 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270.246 51.168 lineto + 336.56 51.168 lineto + 0.5 setlinewidth + stroke + /Times-Roman findfont 10 scalefont setfont + (CLKB) () 0 78.8168 LeftLabel + (CLKA) () 0 38.8168 LeftLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cwbcra_wr3) 68.1024 64.4672 CenterLabel + grestore +} def + +%%EndProlog +%%Page: 1 1 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 570 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/pagey pagey 18 sub def +/Helvetica-Bold findfont title_size scalefont setfont +(High Density Two Port Register File SVT MVT Compiler) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(CLN28HPM 28nm Process) rightmargin pagey LeftShow +/pagey pagey 18 sub def +( 256 Rows Per Bit line, 0.389um^2 Bit Cell) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(32 Words X 128 Bits, Mux 2 Instance) rightmargin pagey LeftShow +/pagey pagey 18 sub def + +0.35 50 650 ARMlogo +/pagey pagey 20 sub def +/text_size 10 def +(Overview) () pagey SectionStart +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(The High Density Two Port Register File SVT MVT Compiler is optimized for speed and density.\ + The memory is designed to take full advantage of the ) TextPiece + +(TSMC) TextPiece +( 28nmnm) TextReserveSpace +( 28nm) TextPiece +( CLN28HPM CMOS process.) TextPiece +TextParaEnd +() TextLine +TextParaStart +(The storage array is composed of eight-transistor\ + bit cells with fully static circuitry. The\ + register file\ + operates at a voltage of 0.81V) TextPiece +( and a junction temperature of ) TextPiece +(-40.01C) TextReserveSpace +(-40.0) TextPiece +TextDegree +(C.) TextPiece +TextParaEnd +TextEnd % returns new page y +/pagey exch def +% spaceLeft before Instance Settings 492 +/text_size 10 def +(Instance Settings) () pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +200 +(CLN28HPM) stringwidth pop 15 add 100 1 index 1 index + lt { exch pop } { pop } ifelse +leftmargin pagey 14 Table2Start +(Parameter) (Setting) Table2Header +Table2DoubleLine +/TextFont /Helvetica findfont text_size scalefont def +(Instance Name) (rf2_32x128_wm1) Table2LC +(Process) (CLN28HPM) Table2LC +(Number of Words ) (32) Table2LC +(Bits) (128) Table2LC +(Multiplexer Width ) (2) Table2LC +(Multi-Vt selection ) (BASE) Table2LC +(Frequency ) (1) Table2LC +(Activity Factor <%> ) (50) Table2LC +(Pipeline ) (off) Table2LC +(Word-Write Mask ) (on) Table2LC +(Word Partition Size ) (1) Table2LC +(Write through ) (off) Table2LC +(Top Metal Layer ) (m5-m10) Table2LC +(Power Type ) (otc) Table2LC +(Redundancy ) (off) Table2LC +(Redundant Columns ) (2) Table2LC +(Redundant Rows ) (0) Table2LC +(BIST MUXes ) (on) Table2LC +(Soft Error Repair (SER) ) (none) Table2LC +(Power Gating ) (off) Table2LC +(Back Biasing ) (off) Table2LC +(Retention ) (on) Table2LC +(Extra Margin Adjustment ) (on) Table2LC +(Advanced Test Features ) (off) Table2LC +(Name Case ) (upper) Table2LC +(Diodes ) (on) Table2LC +Table2End % returns the new y +/pagey exch def +% spaceLeft before description 94 +(Description) () pagey SectionStart +/pagey exch def +% spaceLeft before description text begins 74 + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +(Register file access is synchronous and is triggered by the rising-edge of the c\ +locks, CLKA and CLKB. The write port (port B) input address, input data, write \ +enable and chip enable are latched by the rising-edge of CLKB, respecting indivi\ +dual setup and hold times.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 26 +() (1) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 2 2 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Description) (cont) pagey SectionStart +/pagey exch def +/pagey pagey 6 sub def +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read port (port A) input address and chip enable are latched by the rising-e\ +dge of CLKA, respecting individual setup and hold times. The two ports can oper\ +ate completely asynchronous to each other.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 602 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A write cycle is initiated if the write port chip enable, CENB, is asserted at t\ +he rising-edge of CLKB. Input data, DB, is written at the address, AB. If the \ +word-write feature is implemented, via the compiler, data on the data input bus \ +is partitioned to the write enable bus, WENB[x:0]. Each WENB pin has a distinct \ +latched value, making each partition individually selectable. When the latched v\ +alue of a write enable pin, WENB[i], is low the corresponding data partition is \ +selected, and its data is written to the memory location specified on the addres\ +s bus.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 500 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A read cycle is initiated if the read port chip enable CENA is asserted at the r\ +ising-edge of CLKA. The contents of the location specified by the address, AA, a\ +re driven on the data output bus, QA. The register file is allowed to access non\ +-existing physical addresses, but the outputs will be unknown.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 446 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(In the event of a write/read collision, if COLLDISN is disabled then the write i\ +s guaranteed and the read data is undefined.However, if COLLDISN is enabled then\ + the write is not guaranteed if the read row address and write row address match\ +.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 392 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read address for any given memory cycle can be identical to the write addres\ +s of the previous memory cycle with the read data being identical to the data th\ +at was written from the previous memory write cycle.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 350 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( Partial read during a read/write collision through the use of WENB is not suppo\ +rted. For example, during a read/write collision, if WENB[] is set to disable th\ +e write operation to certain bits, these bits cannot be simultaneously read on p\ +ort A. This is independent of the setting of COLLDISN.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 296 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( A standby mode is provided for periods of non-operation (CENA=1 or CENB=1). The\ + ports A and B can enter standby mode independently. While in standby mode, add\ +ress and data inputs are disabled; data stored in the memory is retained, but th\ +e memory cannot be accessed for reads or writes.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 242 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(One of the inputs of the input BIST MUX is connected to system signals while the\ + other is connected to the test signals. The memory datapath will now include in\ +tegrated scan chains, with testability controlled by pins DFTRAMBYP, TENA, SEA, \ +TENB, and SEB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 188 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Memory normal mode is enabled (RET1N=1). In this mode the core and periphery pow\ +er are both connected to the chip level power grid through Artigrid There is a p\ +ower sequence when the memory is put from active to selective precharge and back\ + to active. Selective precharge is available for all compilers except for the RO\ +M. Before entering selective precharge, the memory must be put in standby mode b\ +y setting CENA=1, TCENA=1, CENB=1 and TCENB=1.In addition, DFTRAMBYP must be set\ + to 0.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 98 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Extra Margin Adjustment pins provide the option of adding delays into internal t\ +iming pulses. There are 3 different EMA pins: EMAA, EMAWA, EMASA to control Read\ +/Write internal timing pulses.) TextLine +TextEnd +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +% spaceLeft beginning paragraph 50 +(Refer to the user guide for a more detailed description\ + of memory operation.) TextLine +TextEnd +/pagey exch def +() (2) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 3 3 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Physical Dimensions) pagey MicronSectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 75 75 75 leftmargin pagey 14 Table4Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Area Type) (Width)(m)() (Height)(m)() (Area)(m)(2) Table4Header +/TextFont /Helvetica findfont text_size scalefont def +( Core) (21.165) (414.86) (8780.51) Table4LC +Table4End +/pagey exch def + +leftmargin rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +(All width, height, and area dimensions are in drawn dimensions.\ + For shrink processes, this will be larger than the final silicon\ + post-shrink dimensions.) TextLine +TextEnd +/pagey exch def +/pagey pagey 20 sub def +(Symbol) () pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +/Helvetica findfont text_size scalefont setfont +255 pagey 24 9 SymbolStart +(CENA) SymbolInput +(AA[4:0]) SymbolInput +(CENB) SymbolInput +(WENB[127:0]) SymbolInput +(AB[4:0]) SymbolInput +(DB[127:0]) SymbolInput +(EMAA[2:0]) SymbolInput +(EMASA) SymbolInput +(EMAB[2:0]) SymbolInput +(TENA) SymbolInput +(TCENA) SymbolInput +(TAA[4:0]) SymbolInput +(TENB) SymbolInput +(TCENB) SymbolInput +(TWENB[127:0]) SymbolInput +(TAB[4:0]) SymbolInput +(TDB[127:0]) SymbolInput +(RET1N) SymbolInput +(SIA[1:0]) SymbolInput +(SEA) SymbolInput +(DFTRAMBYP) SymbolInput +(SIB[1:0]) SymbolInput +(SEB) SymbolInput +(COLLDISN) SymbolInput +(CENYA) SymbolOutput +(AYA[4:0]) SymbolOutput +(WENYB[127:0]) SymbolOutput +(QA[127:0]) SymbolOutput +(SOA[1:0]) SymbolOutput +() SymbolOutput +(CENYB) SymbolOutput +(AYB[4:0]) SymbolOutput +(SOB[1:0]) SymbolOutput +(CLKA) (CLKB) SymbolClocks +SymbolEnd +/pagey exch def +() (3) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 4 4 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Pin Description) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def + +180 350 line_left pagey 14 Table2Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Pin) (Description) Table2Header +/TextFont /Helvetica findfont text_size scalefont def +(AA[4:0], AB[4:0]) (Read & Write Addresses \(AA[0],AB[0] = LSB\)) Table2LL +(DB[127:0]) (Data Inputs \(DB[0] = LSB\)) Table2LL +(CLKA, CLKB) (Read & Write Clocks) Table2LL +(CENA, CENB) (Read & Write Enables \(active low\)) Table2LL +(WENB[127:0]) (Write Enable \(active low, WENB[0] = LSB\)) Table2LL +(EMAA[2:0], EMAB[2:0]) (Read and Write Extra Margin Adjustment \(EMAA[0],EMAB[0] = LSB\)) Table2LL +(EMASA) (Read Extra Margin Adjustment) Table2LL +(TENA, TENB) (Port A & B Test Mode Enables \(active low\)) Table2LL +(TDB[127:0]) (Data Test Input \(TDB[0] = LSB\)) Table2LL +(TCENA, TCENB) (Read & Write Chip Enable Test Inputs \(active low\)) Table2LL +(TWENB[127:0]) (Write Enable Test Input \(active low, TWENB[0] = LSB\)) Table2LL +(TAA[4:0], TAB[4:0]) (Read & Write Address Test Inputs \(TAA[0],TAB[0] = LSB\)) Table2LL +(COLLDISN) (Allow the user to disable the internal collision detection circuitry\(active low\)) Table2LL +(RET1N) (Retention Input \(active low\)) Table2LL +(DFTRAMBYP) (Test Control Input \(active high\)) Table2LL +(SEA,SEB) (Scan Enable Input \(active high\)) Table2LL +(QA[127:0]) (Data Outputs \(QA[0] = LSB\)) Table2LL +(CENYA, CENYB) (Read & Write Chip Enable Mux Outputs) Table2LL +(WENYB[127:0]) (Write Enable Mux Output \(WENYB[0] = LSB\)) Table2LL +(AYA[4:0], AYB[4:0]) (Read & Write Address Mux Outputs \(AYA[0],AYB[0] = LSB\)) Table2LL +(SOA[1:0],SOB[1:0]) (Scan Output \(SOA[0],SOB[0] = LSB\)) Table2LL +(SIA[1:0],SIB[1:0]) (Scan Input \(SIA[0],SIB[0] = LSB\)) Table2LL +Table2End +/pagey exch def +() (4) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 5 5 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Read Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +(The retain timing arc is not shown in this diagram. \ +Please refer to the User Guide for this compiler for a detailed timing \ +diagram with the retain arc.) TextLine +TextEnd +/pagey pagey 10 sub def +leftmargin pagey 250 sub Frame1 +/pagey pagey 250 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Write Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 10 sub def +leftmargin pagey 290 sub Frame2 +/pagey pagey 280 sub def +() (5) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 6 6 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Write to Read Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 91 sub Frame1027 +/pagey pagey 96 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Read to Write Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 55 sub Frame1030 +/pagey pagey 85 sub def +% headerEstimate=182 +% estimate=238 +% tailEstimate=44 +% spaceLeft=384 +(Default Timing for Cycle and Access) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +(The timing tables shows delay values measured from\ + 50% of supply to\ + 50% of supply voltage.\ + The output pins are loaded with the standard load of 0.035pF.\ + Input pins are driven with a standard slew of 0.080ns from\ + 10% to\ + 90% of supply voltage.) TextLine +() TextLine +(The timing and power values are measured at input slew of 0.08ns on clock pin,\ + 0.08ns on signal pins and output load 0.035pF.) TextLine + +TextEnd +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader + +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.8539) (1.0673) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.9872) (1.1709) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (1.5996) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (1.8027) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.8717) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (1.2523) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.4523) (0.5242) TableT1CornerRow +(Min. High pulse width CLKA) () (t) (ckah) (0.1790) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (6) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 7 7 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Timing continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=568 after continuation +(Min. Low pulse width CLKA) () (t) (ckal) (0.1936) () TableT1CornerRow +(Min. High pulse width CLKB) () (t) (ckbh) (0.1812) () TableT1CornerRow +(Min. Low pulse width CLKB) () (t) (ckbl) (0.1760) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript + +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart + +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def + +% after table spaceLeft=482 +% headerEstimate=110 +% estimate=112 +% tailEstimate=64 +% spaceLeft=482 +(Load Timing) (units = ns/pF) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(CENYA load factor) () (K) (load_cenya) () (3.3060) TableT1CornerRow +(AYA load factor) () (K) (load_aya) () (2.7500) TableT1CornerRow +(CENYB load factor) () (K) (load_cenyb) () (3.3440) TableT1CornerRow +(WENYB load factor) () (K) (load_wenyb) () (3.0700) TableT1CornerRow +(AYB load factor) () (K) (load_ayb) () (2.7720) TableT1CornerRow +(QA load factor) () (K) (load_qa) () (1.1471) TableT1CornerRow +(SOA load factor) () (K) (load_soa) () (2.8640) TableT1CornerRow +(SOB load factor) () (K) (load_sob) () (3.1660) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The output load factor units are ns/pF.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% headerEstimate=110 +% estimate=1092 +% tailEstimate=14 +% spaceLeft=196 +(Setup and Hold Timing) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(Setup Btw. CLKA and AA) (COLLDISN=1) () (t) (aas) (0.2502) () TableT1CornerDRow +(Hold Btw. CLKA and AA) (COLLDISN=1) () (t) (aah) (0.1392) () TableT1CornerDRow +(Setup Btw. CLKB and AB) (COLLDISN=1) () (t) (abs) (0.2561) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (7) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 8 8 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. CLKB and AB) (COLLDISN=1) () (t) (abh) (0.1263) () TableT1CornerDRow +(Setup Btw. CLKA and TAA) (COLLDISN=1) () (t) (taas) (0.2589) () TableT1CornerDRow +(Hold Btw. CLKA and TAA) (COLLDISN=1) () (t) (taah) (0.1392) () TableT1CornerDRow +(Setup Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabs) (0.2633) () TableT1CornerDRow +(Hold Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabh) (0.1263) () TableT1CornerDRow +(Setup Btw. CLKA and CENA) () (t) (cenas) (0.2125) () TableT1CornerRow +(Hold Btw. CLKA and CENA) () (t) (cenah) (0.0854) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nfh) (1.8669) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nrh) (0.7170) () TableT1CornerRow +(Setup Btw. CLKB and CENB) () (t) (cenbs) (0.2141) () TableT1CornerRow +(Hold Btw. CLKB and CENB) () (t) (cenbh) (0.0857) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nfh) (1.8669) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nrh) (0.7170) () TableT1CornerRow +(Setup Btw. CLKB and WENB) () (t) (wenbs) (0.0857) () TableT1CornerRow +(Hold Btw. CLKB and WENB) () (t) (wenbh) (0.3114) () TableT1CornerRow +(Setup Btw. CLKB and DB) () (t) (dbs) (0.1681) () TableT1CornerRow +(Hold Btw. CLKB and DB) () (t) (dbh) (0.3013) () TableT1CornerRow +(Setup Btw. CLKA and EMAA) () (t) (emaas) (1.6830) () TableT1CornerRow +(Hold Btw. CLKA and EMAA) () (t) (emaah) (2.3430) () TableT1CornerRow +(Setup Btw. CLKA and EMASA) () (t) (emasas) (1.6830) () TableT1CornerRow +(Hold Btw. CLKA and EMASA) () (t) (emasah) (2.3430) () TableT1CornerRow +(Setup Btw. CLKB and EMAB) () (t) (emabs) (1.8861) () TableT1CornerRow +(Hold Btw. CLKB and EMAB) () (t) (emabh) (2.3885) () TableT1CornerRow +(Setup Btw. CLKA and TENA) () (t) (tenas) (0.4407) () TableT1CornerRow +(Hold Btw. CLKA and TENA) () (t) (tenah) (0.1531) () TableT1CornerRow +(Setup Btw. CLKA and TCENA) () (t) (tcenas) (0.2138) () TableT1CornerRow +(Hold Btw. CLKA and TCENA) () (t) (tcenah) (0.0871) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nfh) (1.8669) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nrh) (0.7170) () TableT1CornerRow +(Setup Btw. CLKB and TENB) () (t) (tenbs) (0.7733) () TableT1CornerRow +(Hold Btw. CLKB and TENB) () (t) (tenbh) (0.3425) () TableT1CornerRow +(Setup Btw. CLKB and TCENB) () (t) (tcenbs) (0.2147) () TableT1CornerRow +(Hold Btw. CLKB and TCENB) () (t) (tcenbh) (0.0870) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nfh) (1.8669) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (8) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 9 9 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nrh) (0.7170) () TableT1CornerRow +(Setup Btw. CLKB and TWENB) () (t) (twenbs) (0.0862) () TableT1CornerRow +(Hold Btw. CLKB and TWENB) () (t) (twenbh) (0.3114) () TableT1CornerRow +(Setup Btw. CLKB and TDB) () (t) (tdbs) (0.1738) () TableT1CornerRow +(Hold Btw. CLKB and TDB) () (t) (tdbh) (0.3013) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nf_dftrambypfh) (0.0537) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nr_dftrambypfh) (1.8669) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nf_cenbrh) (0.0537) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nf_cenarh) (0.0534) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nf_tcenarh) (0.0534) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nf_tcenbrh) (0.0537) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nr_tcenbrh) (1.8669) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nr_tcenarh) (1.6638) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nr_cenbrh) (1.8669) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nr_cenarh) (1.6638) () TableT1CornerRow +(Setup Btw. CLKA and SIA) () (t) (sias) (0.4848) () TableT1CornerRow +(Hold Btw. CLKA and SIA) () (t) (siah) (0.1246) () TableT1CornerRow +(Setup Btw. CLKA and SEA) () (t) (seas) (0.4848) () TableT1CornerRow +(Hold Btw. CLKA and SEA) () (t) (seah) (2.3430) () TableT1CornerRow +(Setup Btw. CLKA and DFTRAMBYP) () (t) (dftrambypas) (0.6768) () TableT1CornerRow +(Hold Btw. CLKA and DFTRAMBYP) () (t) (dftrambypah) (2.3430) () TableT1CornerRow +(Setup Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbs) (0.6768) () TableT1CornerRow +(Hold Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbh) (1.8669) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nfh) (1.8669) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nrh) (0.7170) () TableT1CornerRow +(Setup Btw. CLKB and SIB) () (t) (sibs) (0.1681) () TableT1CornerRow +(Hold Btw. CLKB and SIB) () (t) (sibh) (0.3013) () TableT1CornerRow +(Setup Btw. CLKB and SEB) () (t) (sebs) (0.7733) () TableT1CornerRow +(Hold Btw. CLKB and SEB) () (t) (sebh) (0.3425) () TableT1CornerRow +(Setup Btw. CLKA and COLLDISN) () (t) (colldisnas) (1.6830) () TableT1CornerRow +(Hold Btw. CLKA and COLLDISN) () (t) (colldisnah) (2.3430) () TableT1CornerRow +(Setup Btw. CLKB and COLLDISN) () (t) (colldisnbs) (1.8861) () TableT1CornerRow +(Hold Btw. CLKB and COLLDISN) () (t) (colldisnbh) (2.3885) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextEnd +/pagey exch def +% after table spaceLeft=78 +% headerEstimate=82 +% estimate=1862 +% tailEstimate=84 +% spaceLeft=78 +() (9) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 10 10 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment) +(units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (accqa_rd0) (0.8287) (1.0376) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (accqa_rd1) (0.8371) (1.0475) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (accqa_rd2) (0.8426) (1.0539) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.8539) (1.0673) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (accqa_rd4) (0.9491) (1.1793) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (accqa_rd5) (1.0518) (1.3001) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (accqa_rd6) (1.1598) (1.4271) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (accqa_rd7) (1.2602) (1.5453) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (accqa_scan0) (0.8287) (1.0376) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (accqa_scan1) (0.8371) (1.0475) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (accqa_scan2) (0.8426) (1.0539) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (accqa_scan3) (0.8539) (1.0673) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (accqa_scan4) (0.9491) (1.1793) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (accqa_scan5) (1.0518) (1.3001) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (accqa_scan6) (1.1598) (1.4271) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (accqa_scan7) (1.2602) (1.5453) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd0) (0.9619) (1.1411) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd1) (0.9703) (1.1511) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd2) (0.9758) (1.1575) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.9872) (1.1709) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (10) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 11 11 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd4) (1.0825) (1.2829) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd5) (1.1851) (1.4036) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd6) (1.2930) (1.5307) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd7) (1.3935) (1.6489) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan0) (0.9619) (1.1411) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan1) (0.9703) (1.1511) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan2) (0.9758) (1.1575) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan3) (0.9872) (1.1709) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan4) (1.0825) (1.2829) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan5) (1.1851) (1.4036) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan6) (1.2930) (1.5307) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan7) (1.3935) (1.6489) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=0 EMASA=0) () (t) (cyca_ema0) (1.5694) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=1 EMASA=0) () (t) (cyca_ema1) (1.5795) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=2 EMASA=0) () (t) (cyca_ema2) (1.5860) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (1.5996) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=4 EMASA=0) () (t) (cyca_ema4) (1.7133) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=5 EMASA=0) () (t) (cyca_ema5) (1.8358) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=6 EMASA=0) () (t) (cyca_ema6) (1.9648) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=7 EMASA=0) () (t) (cyca_ema7) (2.0848) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (11) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 12 12 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Min. Cycle CLKB) (EMAB=0) () (t) (cycb_ema0) (1.7290) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=1) () (t) (cycb_ema1) (1.7502) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=2) () (t) (cycb_ema2) (1.7705) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (1.8027) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=4) () (t) (cycb_ema4) (1.9388) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=5) () (t) (cycb_ema5) (2.0557) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=6) () (t) (cycb_ema6) (2.2098) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=7) () (t) (cycb_ema7) (2.3243) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=0) () (t) (cracwb_rd0) (0.8419) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=1) () (t) (cracwb_rd1) (0.8519) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=2) () (t) (cracwb_rd2) (0.8583) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.8717) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=4) () (t) (cracwb_rd4) (0.9837) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=5) () (t) (cracwb_rd5) (1.1044) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=6) () (t) (cracwb_rd6) (1.2315) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=7) () (t) (cracwb_rd7) (1.3497) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=0) () (t) (cwbcra_wr0) (1.1797) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=1) () (t) (cwbcra_wr1) (1.2006) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=2) () (t) (cwbcra_wr2) (1.2206) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (1.2523) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (12) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 13 13 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Clock Collision CLKB) (EMAB=4) () (t) (cwbcra_wr4) (1.3865) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=5) () (t) (cwbcra_wr5) (1.5016) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=6) () (t) (cwbcra_wr6) (1.6535) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=7) () (t) (cwbcra_wr7) (1.7662) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.4523) (0.5242) TableT1CornerRow +(High pulse width CLKA) () (t) (ckah) (0.1790) () TableT1CornerRow +(Low pulse width CLKA) () (t) (ckal) (0.1936) () TableT1CornerRow +(High pulse width CLKB) () (t) (ckbh) (0.1812) () TableT1CornerRow +(Low pulse width CLKB) () (t) (ckbl) (0.1760) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=308 +% headerEstimate=82 +% estimate=350 +% tailEstimate=84 +% spaceLeft=308 +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CENA to CENYA) (1,2) (t) (cenacenya) (0.1995) (0.2145) TableT1CornerRow +(Delay TCENA to CENYA) (1,2) (t) (tcenacenya) (0.1959) (0.2108) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyapu) (0.2786) (0.3026) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyanu) (0.3245) (0.3541) TableT1CornerRow +(Delay DFTRAMBYP to CENYA) (1,2) (t) (dftrambypcenya) (0.3531) (0.3853) TableT1CornerRow +(Delay AA to AYA) (1,2) (t) (aaaya) (0.1950) (0.2110) TableT1CornerRow +(Delay TAA to AYA) (1,2) (t) (taaaya) (0.2013) (0.2184) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayapu) (0.3531) (0.3904) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayanu) (0.3391) (0.3751) TableT1CornerRow +(Delay DFTRAMBYP to AYA) (1,2) (t) (dftrambypaya) (0.3394) (0.3736) TableT1CornerRow +(Delay CENB to CENYB) (1,2) (t) (cenbcenyb) (0.1960) (0.2113) TableT1CornerRow +(Delay TCENB to CENYB) (1,2) (t) (tcenbcenyb) (0.1954) (0.2108) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybpu) (0.2801) (0.3045) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybnu) (0.4962) (0.5445) TableT1CornerRow +(Delay DFTRAMBYP to CENYB) (1,2) (t) (dftrambypcenyb) (0.3424) (0.3738) TableT1CornerRow +(Delay WENB to WENYB) (1,2) (t) (wenbwenyb) (0.2707) (0.2952) TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (13) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 14 14 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=588 after continuation +(Delay TWENB to WENYB) (1,2) (t) (twenbwenyb) (0.2711) (0.2956) TableT1CornerRow +(Delay TENB to WENYB) (1,2) (t) (tenbwenybpu) (0.5808) (0.6920) TableT1CornerRow +(Delay TENB to WENYB) (1,2) (t) (tenbwenybnu) (0.5794) (0.7096) TableT1CornerRow +(Delay DFTRAMBYP to WENYB) (1,2) (t) (dftrambypwenyb) (0.3266) (0.4014) TableT1CornerRow +(Delay AB to AYB) (1,2) (t) (abayb) (0.1944) (0.2105) TableT1CornerRow +(Delay TAB to AYB) (1,2) (t) (tabayb) (0.1994) (0.2161) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybpu) (0.5306) (0.5881) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybnu) (0.4866) (0.5463) TableT1CornerRow +(Delay DFTRAMBYP to AYB) (1,2) (t) (dftrambypayb) (0.3322) (0.3669) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=378 +% headerEstimate=77 +% estimate=364 +% tailEstimate=0 +% spaceLeft=378 +/pagey pagey 5 sub def +(Pin Capacitance) (units = fF) pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +(CLKA) () (8.6890) Table1CornerRow +(CENA) () (1.4140) Table1CornerRow +(AA) () (1.7180) Table1CornerRow +(CLKB) () (8.7630) Table1CornerRow +(CENB) () (1.1430) Table1CornerRow +(WENB) () (1.6270) Table1CornerRow +(AB) () (1.4730) Table1CornerRow +(DB) () (1.8240) Table1CornerRow +(EMAA) () (5.5650) Table1CornerRow +(EMASA) () (2.0600) Table1CornerRow +(EMAB) () (5.3860) Table1CornerRow +(TENA) () (0.8311) Table1CornerRow +(TCENA) () (1.2310) Table1CornerRow +(TAA) () (1.6290) Table1CornerRow +(TENB) () (0.8624) Table1CornerRow +(TCENB) () (1.2330) Table1CornerRow +(TWENB) () (1.4360) Table1CornerRow +(TAB) () (1.4420) Table1CornerRow +(TDB) () (1.4720) Table1CornerRow +(SIA) () (1.1400) Table1CornerRow +(SEA) () (1.5600) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (14) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 15 15 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Pin Capacitance continued) (units = fF) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +/TextFont /Helvetica-Bold findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +% spaceLeft=511 after continuation +(DFTRAMBYP) () (1.6150) Table1CornerRow +(SIB) () (5.4500) Table1CornerRow +(SEB) () (1.7460) Table1CornerRow +(COLLDISN) () (2.0740) Table1CornerRow +(RET1N) () (3.2230) Table1CornerRow +Table1CornerEnd +/pagey exch def +% after table spaceLeft=441 +% headerEstimate=77 +% estimate=644 +% tailEstimate=94 +% spaceLeft=441 +/Helvetica-Bold findfont text_size scalefont setfont +(Current) (units = mA) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(Core Standby std Curr.) (3) (1.866e-04) Table1CornerRow +(Peri Standby std Curr.) (3) (3.124e-04) Table1CornerRow +(Core Standby Retention-1 Curr.) (3) (1.865e-04) Table1CornerRow +(Peri Standby Retention-1 Curr.) (3) (2.048e-06) Table1CornerRow +(Core Standby Selective Precharge Curr.) (3) (1.858e-04) Table1CornerRow +(Peri Standby Selective Precharge Curr.) (3) (2.330e-04) Table1CornerRow +(Core Read AC (EMAA=0) Curr.) (1,4) (7.514e-05) Table1CornerRow +(Core Read AC (EMAA=1) Curr.) (1,4) (7.518e-05) Table1CornerRow +(Core Read AC (EMAA=2) Curr.) (1,4) (7.535e-05) Table1CornerRow +(Core Read AC (EMAA=3) Curr.) (1,4) (7.535e-05) Table1CornerRow +(Core Read AC (EMAA=4) Curr.) (1,4) (7.666e-05) Table1CornerRow +(Core Read AC (EMAA=5) Curr.) (1,4) (7.775e-05) Table1CornerRow +(Core Read AC (EMAA=6) Curr.) (1,4) (7.805e-05) Table1CornerRow +(Core Read AC (EMAA=7) Curr.) (1,4) (7.823e-05) Table1CornerRow +(Peri Read AC (EMAA=0) Curr.) (1,4) (2.723e-03) Table1CornerRow +(Peri Read AC (EMAA=1) Curr.) (1,4) (2.723e-03) Table1CornerRow +(Peri Read AC (EMAA=2) Curr.) (1,4) (2.723e-03) Table1CornerRow +(Peri Read AC (EMAA=3) Curr.) (1,4) (2.723e-03) Table1CornerRow +(Peri Read AC (EMAA=4) Curr.) (1,4) (2.727e-03) Table1CornerRow +(Peri Read AC (EMAA=5) Curr.) (1,4) (2.731e-03) Table1CornerRow +(Peri Read AC (EMAA=6) Curr.) (1,4) (2.731e-03) Table1CornerRow +(Peri Read AC (EMAA=7) Curr.) (1,4) (2.734e-03) Table1CornerRow +(Core Write AC (EMAB=0) Curr.) (1,4) (1.437e-04) Table1CornerRow +(Core Write AC (EMAB=1) Curr.) (1,4) (1.438e-04) Table1CornerRow +(Core Write AC (EMAB=2) Curr.) (1,4) (1.439e-04) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (15) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 16 16 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Current continued) (units = mA) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +% spaceLeft=593 after continuation +(Core Write AC (EMAB=3) Curr.) (1,4) (1.439e-04) Table1CornerRow +(Core Write AC (EMAB=4) Curr.) (1,4) (1.452e-04) Table1CornerRow +(Core Write AC (EMAB=5) Curr.) (1,4) (1.463e-04) Table1CornerRow +(Core Write AC (EMAB=6) Curr.) (1,4) (1.466e-04) Table1CornerRow +(Core Write AC (EMAB=7) Curr.) (1,4) (1.468e-04) Table1CornerRow +(Peri Write AC (EMAB=0) Curr.) (1,4) (3.356e-03) Table1CornerRow +(Peri Write AC (EMAB=1) Curr.) (1,4) (3.356e-03) Table1CornerRow +(Peri Write AC (EMAB=2) Curr.) (1,4) (3.356e-03) Table1CornerRow +(Peri Write AC (EMAB=3) Curr.) (1,4) (3.356e-03) Table1CornerRow +(Peri Write AC (EMAB=4) Curr.) (1,4) (3.360e-03) Table1CornerRow +(Peri Write AC (EMAB=5) Curr.) (1,4) (3.364e-03) Table1CornerRow +(Peri Write AC (EMAB=6) Curr.) (1,4) (3.364e-03) Table1CornerRow +(Peri Write AC (EMAB=7) Curr.) (1,4) (3.367e-03) Table1CornerRow +(Core Deselect(A) (icc_c_desela) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(A) (icc_p_desela) Curr.) (2,4) (4.150e-05) Table1CornerRow +(Core Deselect(B) (icc_c_deselb) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(B) (icc_p_deselb) Curr.) (2,4) (8.715e-04) Table1CornerRow +(Core Peak (icc_c_peak) Curr.) () (1.668155) Table1CornerRow +(Peri Peak (icc_p_peak) Curr.) () (23.325655) Table1CornerRow +(Core Inrush (icc_c_inrush) Curr.) () (0.896531) Table1CornerRow +(Peri Inrush (icc_p_inrush) Curr.) () (21.74526) Table1CornerRow +Table1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 4 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The AC current value assumes 50% read and write\ + operations, where 50% addresses and 50% of input\ + and output pins switch at the user defined frequency of 1MHz\ + and user defined clock activity_factor of 50%.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The deselected current assumes the memory is deselected,\ + 50% addresses switch, and 50% of input pins switch\ + at the user defined frequency of 1MHz.\ + The logic switching component of deselected power becomes\ + negligbly small if the input pins are held stable by\ + externally controlling these signals with chip select.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(3) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The standby current value is independent of frequency\ + and assumes all inputs and outputs are stable.) TextPiece +TextParaEnd +TextParaStart +(4) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The leakage current component is not included in this value.) TextPiece +TextParaEnd +TextParaStart +(5) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Clock activity factor will affect total current.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=205 +() (16) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 17 17 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Clock Noise Limit) (Time-units = ns, Voltage-units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 45 45 leftmargin 55 sub pagey 14 TableD1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +TableD1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(CLKA) (0.0895) (0.1620) TableD1CornerRow +(CLKB) (0.0906) (0.1620) TableD1CornerRow +TableD1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The clock noise limit is the maximum voltage allowed \(for the\ + indicated pulse width\) that does not cause an unintentional\ + memory cycle or other memory failure.) TextLine +TextEnd +/pagey exch def +(Supply Noise Limit) (units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 90 leftmargin 55 sub pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(Power) () (0.0810) Table1CornerRow +(Ground) () (0.0810) Table1CornerRow +Table1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The power and ground noise limit is the maximum supply\ + voltage transition that is allowed without causing\ + a memory failure.) TextLine +TextEnd +/pagey exch def +centerx 300 EndingCopyright +() (17) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Trailer +%%Pages: 17 +%%EOF diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.avm b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.avm new file mode 100644 index 00000000..4d2565bc --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.avm @@ -0,0 +1,162 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Thu Oct 17 15:29:25 2019 +# +# Instance Options: +# Instance Name: rf2_32x128_wm1 +# Number of Words: 32 +# Number of Bits: 128 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: on +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: avm +# AMCI Version: 1.4.3-EAC +# avm_memcomp Version: 2.1.1-EAC +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +rf2_32x128_wm1 { + MEMORY_TYPE RegFile + EQUIV_GATE_COUNT 4506 + VDD_PIN VDDCE VDDPE + GND_PIN VSSE + #This file is for PROCESS TT, CORNER TT_0P90V_0P90V_25C + #However, RedHawk needs the process to be specified as 'PROCESS XX' + PROCESS XX + Cload 3.5e-05nF + VDD 0.9 0.9 + + state_boolean avm_into_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!RET1N&!DFTRAMBYP)" "!RET1N" "NA" + state_boolean avm_outof_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&RET1N&!DFTRAMBYP)" "RET1N" "NA" + state_boolean avm_read_write "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_read_desel "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&CENB)|(CLKB&!TENB&TCENB))" "CLKA CLKB" "NA" + state_boolean avm_desel_write "RET1N&!DFTRAMBYP&((CLKA&TENA&CENA)|(CLKA&!TENA&TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_scan_capture "((CLKA&!SEA&RET1N&DFTRAMBYP)&(CLKB&!SEB&RET1N&DFTRAMBYP))" "DFTRAMBYP" "NA" + state_boolean avm_scan_shift "(CLKA&SEA&RET1N&DFTRAMBYP)&(CLKB&SEB&RET1N&DFTRAMBYP)" "DFTRAMBYP" "NA" + state_boolean standby_trig "RET1N&((CLKA&CENA&TENA)|(CLKA&TCENA&!TENA))&((CLKB&CENB&TENB)|(CLKB&TCENB&!TENB))&!DFTRAMBYP" "CLKA CLKB" "NA" + state_boolean standby_ntrig "RET1N&((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!DFTRAMBYP" "!CLKA !CLKB" "NA" + + Cpd avm_into_lowpwr { + VDDCE VSSE 5.28788e-05nF + VDDPE VSSE 5.60810e-04nF + } + PEAK_I avm_into_lowpwr { + VDDCE VSSE 1.42941mA + VDDPE VSSE 4.86744mA + } + Cpd avm_outof_lowpwr { + VDDCE VSSE 5.81667e-05nF + VDDPE VSSE 4.59591e-03nF + } + PEAK_I avm_outof_lowpwr { + VDDCE VSSE 1.57236mA + VDDPE VSSE 38.10373mA + } + Cpd avm_read_write { + VDDCE VSSE 3.14454e-04nF + VDDPE VSSE 7.77751e-03nF + } + PEAK_I avm_read_write { + VDDCE VSSE 2.96007mA + VDDPE VSSE 41.60165mA + } + Cpd avm_read_desel { + VDDCE VSSE 9.28639e-05nF + VDDPE VSSE 3.51267e-03nF + } + PEAK_I avm_read_desel { + VDDCE VSSE 1.27545mA + VDDPE VSSE 25.44116mA + } + Cpd avm_desel_write { + VDDCE VSSE 2.21591e-04nF + VDDPE VSSE 4.26484e-03nF + } + PEAK_I avm_desel_write { + VDDCE VSSE 2.47272mA + VDDPE VSSE 39.62062mA + } + Cpd avm_scan_capture { + VDDCE VSSE 8.56193e-06nF + VDDPE VSSE 1.02363e-02nF + } + PEAK_I avm_scan_capture { + VDDCE VSSE 0.27530mA + VDDPE VSSE 24.42748mA + } + Cpd avm_scan_shift { + VDDCE VSSE 8.56193e-06nF + VDDPE VSSE 1.02363e-02nF + } + PEAK_I avm_scan_shift { + VDDCE VSSE 0.27530mA + VDDPE VSSE 24.42748mA + } + Cpd standby_trig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.77000e-05nF + } + Cpd standby_ntrig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.96666e-05nF + } + LEAKAGE_I { + VDDCE VSSE 1.67000e-03mA + VDDPE VSSE 7.54700e-03mA + } + tsu 0.126538ns + ck2q_delay 0.64031ns + tr_q 0.018851ns + tf_q 0.022205ns + CHARACTERIZATION_MODE accurate +} diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.dat b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.dat new file mode 100644 index 00000000..509d07ff --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.dat @@ -0,0 +1,334 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Thu Oct 17 15:29:45 2019 +# +# Instance Options: +# Instance Name: rf2_32x128_wm1 +# Number of Words: 32 +# Number of Bits: 128 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: on +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: datatable +# AMCI Version: 1.4.3-EAC +# datatable_memcomp Version: 1.3.0-amci +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +# Units used in Datatable : +# geomx: micron +# geomy: micron +# Voltage: volts +# Temprature: Degree Celsius +# Current: mA +# Time: ns +# +name tt_0p90v_0p90v_25c +S N +geomx 21.1650 +geomy 414.8600 +volt 0.9000 +temp 25.0000 +# High Density Two Port Register File SVT MVT Compiler : Propagation Delay specific information. +tcenacenya 0.1187 +ttcenacenya 0.1176 +ttenacenyapu 0.1613 +ttenacenyanu 0.1885 +tdftrambypcenya 0.1900 +taaaya 0.1038 +ttaaaya 0.1082 +ttenaayapu 0.1877 +ttenaayanu 0.1835 +tdftrambypaya 0.1776 +tcenbcenyb 0.1195 +ttcenbcenyb 0.1185 +ttenbcenybpu 0.1658 +ttenbcenybnu 0.2823 +tdftrambypcenyb 0.1824 +twenbwenyb 0.1351 +ttwenbwenyb 0.1341 +ttenbwenybpu 0.3463 +ttenbwenybnu 0.3615 +tdftrambypwenyb 0.2183 +tabayb 0.1040 +ttabayb 0.1062 +ttenbaybpu 0.2796 +ttenbaybnu 0.2792 +tdftrambypayb 0.1779 +taccqa_rd0 0.6329 +taccqa_rd1 0.6338 +taccqa_rd2 0.6380 +taccqa_rd3 0.6403 +taccqa_rd4 0.7004 +taccqa_rd5 0.7503 +taccqa_rd6 0.8086 +taccqa_rd7 0.8592 +taccqa_scan0 0.6329 +taccqa_scan1 0.6338 +taccqa_scan2 0.6380 +taccqa_scan3 0.6403 +taccqa_scan4 0.7004 +taccqa_scan5 0.7503 +taccqa_scan6 0.8086 +taccqa_scan7 0.8592 +tclkasoa_rd0 0.6665 +tclkasoa_rd1 0.6674 +tclkasoa_rd2 0.6716 +tclkasoa_rd3 0.6739 +tclkasoa_rd4 0.7340 +tclkasoa_rd5 0.7839 +tclkasoa_rd6 0.8422 +tclkasoa_rd7 0.8928 +tclkasoa_scan0 0.6665 +tclkasoa_scan1 0.6674 +tclkasoa_scan2 0.6716 +tclkasoa_scan3 0.6739 +tclkasoa_scan4 0.7340 +tclkasoa_scan5 0.7839 +tclkasoa_scan6 0.8422 +tclkasoa_scan7 0.8928 +tclkbsob 0.2946 +# High Density Two Port Register File SVT MVT Compiler : Kload specific information. +kload_cenya 2.0800 +kload_aya 1.6620 +kload_cenyb 1.9640 +kload_wenyb 1.7940 +kload_ayb 1.6740 +kload_qa 0.6365 +kload_soa 1.7020 +kload_sob 1.8420 +# High Density Two Port Register File SVT MVT Compiler : Cycle time specific information. +tcyca_ema0 0.9287 +tcyca_ema1 0.9295 +tcyca_ema2 0.9338 +tcyca_ema3 0.9362 +tcyca_ema4 0.9972 +tcyca_ema5 1.0478 +tcyca_ema6 1.1069 +tcyca_ema7 1.1583 +tcycb_ema0 0.9633 +tcycb_ema1 0.9742 +tcycb_ema2 0.9854 +tcycb_ema3 1.0011 +tcycb_ema4 1.0743 +tcycb_ema5 1.1236 +tcycb_ema6 1.1945 +tcycb_ema7 1.2454 +# High Density Two Port Register File SVT MVT Compiler : Clock collision specific information. +tcracwb_rd0 0.5926 +tcracwb_rd1 0.5935 +tcracwb_rd2 0.5977 +tcracwb_rd3 0.6000 +tcracwb_rd4 0.6601 +tcracwb_rd5 0.7100 +tcracwb_rd6 0.7683 +tcracwb_rd7 0.8189 +tcwbcra_wr0 0.7392 +tcwbcra_wr1 0.7499 +tcwbcra_wr2 0.7610 +tcwbcra_wr3 0.7764 +tcwbcra_wr4 0.8486 +tcwbcra_wr5 0.8972 +tcwbcra_wr6 0.9670 +tcwbcra_wr7 1.0172 +# High Density Two Port Register File SVT MVT Compiler : Pulse width specific information. +tckah 0.1133 +tckal 0.1135 +tckbh 0.1158 +tckbl 0.1131 +# High Density Two Port Register File SVT MVT Compiler : Setup time specific information. +tcenas 0.1176 +taas 0.1265 +tcenbs 0.1240 +twenbs 0.0225 +tabs 0.1337 +tdbs 0.0487 +temaas 0.9759 +temasas 0.9759 +temabs 1.0408 +ttenas 0.2339 +ttcenas 0.1176 +ttaas 0.1310 +ttenbs 0.4547 +ttcenbs 0.1252 +ttwenbs 0.0225 +ttabs 0.1373 +ttdbs 0.0509 +tsias 0.2573 +tseas 0.2573 +tdftrambypas 0.3272 +tdftrambypbs 0.3272 +tsibs 0.0487 +tsebs 0.4547 +tcolldisnas 0.9759 +tcolldisnbs 1.0408 +# High Density Two Port Register File SVT MVT Compiler : Hold time specific information. +tcenah 0.0489 +tcenaf_ret1nfh 1.0442 +tcenaf_ret1nrh 0.3960 +taah 0.0821 +tcenbh 0.0492 +tcenbf_ret1nfh 1.0442 +tcenbf_ret1nrh 0.3960 +twenbh 0.2057 +tabh 0.0765 +tdbh 0.1941 +temaah 1.2848 +temasah 1.2848 +temabh 1.2886 +ttenah 0.0903 +ttcenah 0.0517 +ttcenaf_ret1nfh 1.0442 +ttcenaf_ret1nrh 0.3960 +ttaah 0.0821 +ttenbh 0.2271 +ttcenbh 0.0507 +ttcenbf_ret1nfh 1.0442 +ttcenbf_ret1nrh 0.3960 +ttwenbh 0.2065 +ttabh 0.0765 +ttdbh 0.1941 +tret1nf_dftrambypfh 0.0313 +tret1nr_dftrambypfh 1.0442 +tret1nf_cenbrh 0.0313 +tret1nf_cenarh 0.0294 +tret1nf_tcenarh 0.0294 +tret1nf_tcenbrh 0.0313 +tret1nr_tcenbrh 1.0442 +tret1nr_tcenarh 0.9793 +tret1nr_cenbrh 1.0442 +tret1nr_cenarh 0.9793 +tsiah 0.0817 +tseah 1.2848 +tdftrambypah 1.2848 +tdftrambypbh 1.0442 +tdftrambypr_ret1nfh 1.0442 +tdftrambypr_ret1nrh 0.3960 +tsibh 0.1941 +tsebh 0.2271 +tcolldisnah 1.2848 +tcolldisnbh 1.2886 +# High Density Two Port Register File SVT MVT Compiler : Input Capacitance specific information. +icap_clka 0.0091 +icap_cena 0.0013 +icap_aa 0.0016 +icap_clkb 0.0097 +icap_cenb 0.0013 +icap_wenb 0.0014 +icap_ab 0.0016 +icap_db 0.0019 +icap_emaa 0.0058 +icap_emasa 0.0025 +icap_emab 0.0056 +icap_tena 0.0009 +icap_tcena 0.0014 +icap_taa 0.0015 +icap_tenb 0.0010 +icap_tcenb 0.0014 +icap_twenb 0.0012 +icap_tab 0.0016 +icap_tdb 0.0016 +icap_sia 0.0012 +icap_sea 0.0016 +icap_dftrambyp 0.0021 +icap_sib 0.0058 +icap_seb 0.0019 +icap_colldisn 0.0021 +icap_ret1n 0.0034 +# High Density Two Port Register File SVT MVT Compiler : current specific information. +icc_standby_c_chipdisable 1.670e-03 +icc_standby_p_chipdisable 7.547e-03 +icc_standby_c_ret1 1.745e-03 +icc_standby_p_ret1 4.462e-04 +icc_standby_c_selective_precharge 1.641e-03 +icc_standby_p_selective_precharge 7.003e-03 +icc_c_rd0_a 8.332e-05 +icc_c_rd1_a 8.351e-05 +icc_c_rd2_a 8.351e-05 +icc_c_rd3_a 8.358e-05 +icc_c_rd4_a 8.580e-05 +icc_c_rd5_a 8.714e-05 +icc_c_rd6_a 8.820e-05 +icc_c_rd7_a 8.931e-05 +icc_p_rd0_a 3.154e-03 +icc_p_rd1_a 3.154e-03 +icc_p_rd2_a 3.161e-03 +icc_p_rd3_a 3.161e-03 +icc_p_rd4_a 3.183e-03 +icc_p_rd5_a 3.183e-03 +icc_p_rd6_a 3.183e-03 +icc_p_rd7_a 3.187e-03 +icc_c_wr0_b 1.992e-04 +icc_c_wr1_b 1.994e-04 +icc_c_wr2_b 1.994e-04 +icc_c_wr3_b 1.994e-04 +icc_c_wr4_b 2.016e-04 +icc_c_wr5_b 2.030e-04 +icc_c_wr6_b 2.041e-04 +icc_c_wr7_b 2.052e-04 +icc_p_wr0_b 3.831e-03 +icc_p_wr1_b 3.831e-03 +icc_p_wr2_b 3.838e-03 +icc_p_wr3_b 3.838e-03 +icc_p_wr4_b 3.859e-03 +icc_p_wr5_b 3.859e-03 +icc_p_wr6_b 3.859e-03 +icc_p_wr7_b 3.864e-03 +icc_c_desela 0.000e+00 +icc_p_desela 4.837e-05 +icc_c_deselb 0.000e+00 +icc_p_deselb 9.985e-04 +icc_c_peak 2.960067 +icc_p_peak 41.601651 +icc_c_inrush 1.662968 +icc_p_inrush 38.103734 diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.lib b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.lib new file mode 100644 index 00000000..f763ec2f --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.lib @@ -0,0 +1,71102 @@ +/* + * CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. + * + * Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. + * + * Use of this Software is subject to the terms and conditions of the + * applicable license agreement with ARM Physical IP, Inc. + * In addition, this Software is protected by patents, copyright law + * and international treaties. + * + * The copyright notice(s) in this Software does not indicate actual or + * intended publication of this Software. + * + * Compiler Name: High Density Two Port Register File SVT MVT Compiler + * + * Creation Date: Thu Oct 17 15:31:18 2019 + * + * Instance Options: + * Instance Name: rf2_32x128_wm1 + * Number of Words: 32 + * Number of Bits: 128 + * Multiplexer Width: 2 + * Multi-Vt selection: BASE + * Frequency : 1 + * Activity Factor <%>: 50 + * Pipeline: off + * Word-Write Mask: on + * Word Partition Size: 1 + * Write through: off + * Top Metal Layer: m5-m10 + * Power Type: otc + * Redundancy: off + * Redundant Columns: 2 + * Redundant Rows: 0 + * BIST MUXes: on + * Soft Error Repair (SER): none + * Power Gating: off + * Back Biasing: off + * Retention: on + * Extra Margin Adjustment: on + * Advanced Test Features: off + * Customer Comment: This is a memory instance + * Bus-notation: on + * Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE + * Name Case: upper + * Check Instance Name: off + * Diodes: on + * Drive Strength: 6 + * Site Definitions: off + * Library Name: USERLIB + * Liberty setting: nldm + * + * Compiler Versions: + * Memory Version: r4p0 + * Lang compiler Version: 4.1.6-EAC2 + * View Name: Liberty + * AMCI Version: 1.4.3-EAC + * RTE Version: 2.1.0-EAC + * liberty_memcomp Version: 2.2.1-EAC + * + * Verified With: + * Synopsys Primetime, Cadence Encounter Timing System, Synopsys Design Compiler, + * Cadence RTL Compiler. + * + * Modeling Assumptions: + * This library contains a black box description for a memory element. At + * the library level, a default_max_transition constraint is set to the + * maximum characterized input slew. Each output has a max_capacitance + * constraint set to the highest characterized output load. These two + * constraints force Design Compiler to synthesize circuits that operate + * within the characterization space. The user can tighten these constraints, + * if desired. When writing SDF from Synopsys Design Compiler or Synopsys + * Primetime, use the version 3.0 or 2.1 option. This ensures the SDF will + * annotate to simulation models provided with this generator. + * + * Modeling Limitations: + * Due to limitations of the .lib format, some data reduction was necessary. + * When reducing data, minimum values were chosen for the fast case corner + * and maximum values were used for the typical and best case corners. It + * is recommended that critical timing and setup and hold times be checked + * at all corners. + * + * Known Bugs: N/A + * + * Known Work Arounds: N/A + * +*/ + +library(USERLIB_tt_0p90v_0p90v_25c) { + delay_model : table_lookup; + library_features(report_delay_calculation,report_power_calculation); + revision : 1.1; + date : "Thu Oct 17 15:31:18 2019"; + comment : "Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved."; + + /* unit attributes */ + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1mA"; + leakage_power_unit : "1mW"; + nom_process : 1; + nom_temperature : 25; + nom_voltage : 0.9; + capacitive_load_unit(1,pf); + pulling_resistance_unit : "1kohm"; + + /* default attributes */ + default_fanout_load : 1.000; + default_cell_leakage_power : 0.000; + default_inout_pin_cap : 0.005; + default_input_pin_cap : 0.005; + default_output_pin_cap : 0.000; + + /* threshold definitions */ + default_leakage_power_density : 0.000; + slew_derate_from_library : 0.500; + slew_lower_threshold_pct_fall : 30.000; + slew_upper_threshold_pct_fall : 70.000; + slew_lower_threshold_pct_rise : 30.000; + slew_upper_threshold_pct_rise : 70.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + /* k-factors */ + k_process_cell_fall : 0.000; + k_process_cell_leakage_power : 0.000; + k_process_cell_rise : 0.000; + k_process_fall_transition : 0.000; + k_process_hold_fall : 0.000; + k_process_hold_rise : 0.000; + k_process_internal_power : 0.000; + k_process_min_pulse_width_high : 0.000; + k_process_min_pulse_width_low : 0.000; + k_process_pin_cap : 0.000; + k_process_recovery_fall : 0.000; + k_process_recovery_rise : 0.000; + k_process_rise_transition : 0.000; + k_process_setup_fall : 0.000; + k_process_setup_rise : 0.000; + k_process_wire_cap : 0.000; + k_process_wire_res : 0.000; + k_temp_cell_fall : 0.000; + k_temp_cell_rise : 0.000; + k_temp_hold_fall : 0.000; + k_temp_hold_rise : 0.000; + k_temp_min_pulse_width_high : 0.000; + k_temp_min_pulse_width_low : 0.000; + k_temp_min_period : 0.000; + k_temp_rise_propagation : 0.000; + k_temp_fall_propagation : 0.000; + k_temp_rise_transition : 0.000; + k_temp_fall_transition : 0.000; + k_temp_recovery_fall : 0.000; + k_temp_recovery_rise : 0.000; + k_temp_setup_fall : 0.000; + k_temp_setup_rise : 0.000; + k_volt_cell_fall : 0.000; + k_volt_cell_rise : 0.000; + k_volt_hold_fall : 0.000; + k_volt_hold_rise : 0.000; + k_volt_min_pulse_width_high : 0.000; + k_volt_min_pulse_width_low : 0.000; + k_volt_min_period : 0.000; + k_volt_rise_propagation : 0.000; + k_volt_fall_propagation : 0.000; + k_volt_rise_transition : 0.000; + k_volt_fall_transition : 0.000; + k_volt_recovery_fall : 0.000; + k_volt_recovery_rise : 0.000; + k_volt_setup_fall : 0.000; + k_volt_setup_rise : 0.000; + + /* Additional instance information */ + define ("peak_current", "cell", "float"); + define ("retention_current", "cell", "float"); + define ("inrush_current", "cell", "float"); + + /* templates */ + lu_table_template(rf2_32x128_wm1_inputslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_inputslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x128_wm1_cts1x7_inputslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_outputload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_bistload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_clockslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x128_wm1_inputslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + + type (rf2_32x128_wm1_AYA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_WENYB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AYB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_QA) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SOA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SOB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_WENB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_AB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_DB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_EMAA) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_EMAB) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TAA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TWENB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TAB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_TDB) { + base_type : array ; + data_type : bit ; + bit_width : 128; + bit_from : 127; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SIA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x128_wm1_SIB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + + /* voltage-maps */ + voltage_map (VDDCE, 0.9); + voltage_map (VDDPE, 0.9); + voltage_map (VSSE, 0.0); + + /* operating-conditions */ + operating_conditions(tt_0p90v_0p90v_25c) { + process : 1; + temperature : 25; + voltage : 0.9; + tree_type : balanced_tree; + } + default_operating_conditions : tt_0p90v_0p90v_25c; + + /* wire-loads */ + wire_load("sample") { + resistance : 1.6e-05; + capacitance : 0.0002; + area : 1.7; + slope : 500; + fanout_length(1,500); + } + + cell(rf2_32x128_wm1) { + area : 8780.511900; + dont_use : true; + dont_touch : true; + interface_timing : true; + is_memory_cell : true; + /* Peak current of all modes. */ + peak_current : 44.561718; + /* Peak current when entering or exiting the power modes. */ + inrush_current : 39.766702; + /* leakage current in retention mode (RET1N=0) */ + retention_current : 0.002191; + memory() { + type : ram; + address_width : 5; + word_width : 128; + } + pg_pin(VDDCE) { + voltage_name : VDDCE; + pg_type : backup_power; + direction : inout; + } + pg_pin(VDDPE) { + voltage_name : VDDPE; + pg_type : primary_power; + direction : inout; + } + pg_pin(VSSE) { + voltage_name : VSSE; + pg_type : primary_ground; + direction : inout; + } + pin(CENYA) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : CENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.076450, 0.080193, 0.083528, 0.090830, 0.110170, 0.141570, 0.203580", \ + "0.077118, 0.081332, 0.084870, 0.092484, 0.111290, 0.142070, 0.201190", \ + "0.080461, 0.084349, 0.087037, 0.094191, 0.113600, 0.143090, 0.201820", \ + "0.086294, 0.090051, 0.093403, 0.101140, 0.120420, 0.149690, 0.208480", \ + "0.099676, 0.103100, 0.106260, 0.113530, 0.132450, 0.162790, 0.222980", \ + "0.117120, 0.120950, 0.124450, 0.131940, 0.150570, 0.180450, 0.240920", \ + "0.138020, 0.142000, 0.145010, 0.152300, 0.171030, 0.201170, 0.260770" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.068805, 0.072548, 0.075883, 0.083185, 0.102525, 0.133925, 0.195935", \ + "0.069473, 0.073687, 0.077225, 0.084839, 0.103645, 0.134425, 0.193545", \ + "0.072816, 0.076704, 0.079392, 0.086546, 0.105955, 0.135445, 0.194175", \ + "0.078649, 0.082406, 0.085758, 0.093495, 0.112775, 0.142045, 0.200835", \ + "0.092031, 0.095455, 0.098615, 0.105885, 0.124805, 0.155145, 0.215335", \ + "0.109475, 0.113305, 0.116805, 0.124295, 0.142925, 0.172805, 0.233275", \ + "0.130375, 0.134355, 0.137365, 0.144655, 0.163385, 0.193525, 0.253125" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.077003, 0.081780, 0.086063, 0.095776, 0.124710, 0.172220, 0.265080", \ + "0.077995, 0.082763, 0.086981, 0.096849, 0.125440, 0.174360, 0.270650", \ + "0.081114, 0.085575, 0.089842, 0.099835, 0.127610, 0.176870, 0.271060", \ + "0.088047, 0.092815, 0.097368, 0.107800, 0.135820, 0.181770, 0.276310", \ + "0.099902, 0.104580, 0.108890, 0.118730, 0.147380, 0.194790, 0.285930", \ + "0.121490, 0.125690, 0.130010, 0.139780, 0.168110, 0.216430, 0.309190", \ + "0.154260, 0.159250, 0.163610, 0.173170, 0.200560, 0.247210, 0.339670" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069303, 0.074080, 0.078363, 0.088076, 0.117010, 0.164520, 0.257380", \ + "0.070295, 0.075063, 0.079281, 0.089149, 0.117740, 0.166660, 0.262950", \ + "0.073414, 0.077875, 0.082142, 0.092135, 0.119910, 0.169170, 0.263360", \ + "0.080347, 0.085115, 0.089668, 0.100100, 0.128120, 0.174070, 0.268610", \ + "0.092202, 0.096880, 0.101190, 0.111030, 0.139680, 0.187090, 0.278230", \ + "0.113790, 0.117990, 0.122310, 0.132080, 0.160410, 0.208730, 0.301490", \ + "0.146560, 0.151550, 0.155910, 0.165470, 0.192860, 0.239510, 0.331970" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.077040, 0.080414, 0.083644, 0.090898, 0.109860, 0.140530, 0.201790", \ + "0.078287, 0.082417, 0.085836, 0.092530, 0.111280, 0.140960, 0.202770", \ + "0.080219, 0.083964, 0.087273, 0.094509, 0.113450, 0.143180, 0.203420", \ + "0.086348, 0.090129, 0.093425, 0.100660, 0.119720, 0.149410, 0.209440", \ + "0.099047, 0.103220, 0.106890, 0.113400, 0.132510, 0.162380, 0.221680", \ + "0.115990, 0.119830, 0.123210, 0.130440, 0.149440, 0.180110, 0.238430", \ + "0.138850, 0.142520, 0.145750, 0.153010, 0.171810, 0.202000, 0.262960" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069336, 0.072710, 0.075940, 0.083194, 0.102156, 0.132826, 0.194086", \ + "0.070583, 0.074713, 0.078132, 0.084826, 0.103576, 0.133256, 0.195066", \ + "0.072515, 0.076260, 0.079569, 0.086805, 0.105746, 0.135476, 0.195716", \ + "0.078644, 0.082425, 0.085721, 0.092956, 0.112016, 0.141706, 0.201736", \ + "0.091343, 0.095516, 0.099186, 0.105696, 0.124806, 0.154676, 0.213976", \ + "0.108286, 0.112126, 0.115506, 0.122736, 0.141736, 0.172406, 0.230726", \ + "0.131146, 0.134816, 0.138046, 0.145306, 0.164106, 0.194296, 0.255256" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.075143, 0.079884, 0.084173, 0.094093, 0.122090, 0.170260, 0.263380", \ + "0.076596, 0.081314, 0.085591, 0.095725, 0.125320, 0.173920, 0.266920", \ + "0.079411, 0.084220, 0.088546, 0.098336, 0.126870, 0.175860, 0.268850", \ + "0.086033, 0.090703, 0.095020, 0.104980, 0.132810, 0.181520, 0.275560", \ + "0.098343, 0.102990, 0.107200, 0.117600, 0.146960, 0.195280, 0.292020", \ + "0.119500, 0.124590, 0.128970, 0.138300, 0.166420, 0.214120, 0.306590", \ + "0.152620, 0.157380, 0.161740, 0.171640, 0.199670, 0.247280, 0.340490" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.067629, 0.072370, 0.076659, 0.086579, 0.114576, 0.162746, 0.255866", \ + "0.069082, 0.073800, 0.078077, 0.088211, 0.117806, 0.166406, 0.259406", \ + "0.071897, 0.076706, 0.081032, 0.090822, 0.119356, 0.168346, 0.261336", \ + "0.078519, 0.083189, 0.087506, 0.097466, 0.125296, 0.174006, 0.268046", \ + "0.090829, 0.095476, 0.099686, 0.110086, 0.139446, 0.187766, 0.284506", \ + "0.111986, 0.117076, 0.121456, 0.130786, 0.158906, 0.206606, 0.299076", \ + "0.145106, 0.149866, 0.154226, 0.164126, 0.192156, 0.239766, 0.332976" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENA&CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107600, 0.111470, 0.114720, 0.121740, 0.140180, 0.169510, 0.227920", \ + "0.108390, 0.112260, 0.115510, 0.122530, 0.140970, 0.170300, 0.228710", \ + "0.111170, 0.115040, 0.118290, 0.125310, 0.143750, 0.173080, 0.231490", \ + "0.115800, 0.119670, 0.122920, 0.129940, 0.148380, 0.177710, 0.236120", \ + "0.124720, 0.128590, 0.131840, 0.138860, 0.157300, 0.186630, 0.245040", \ + "0.131800, 0.135670, 0.138920, 0.145940, 0.164380, 0.193710, 0.252120", \ + "0.139740, 0.143610, 0.146860, 0.153880, 0.172320, 0.201650, 0.260060" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096840, 0.100710, 0.103960, 0.110980, 0.129420, 0.158750, 0.217160", \ + "0.097630, 0.101500, 0.104750, 0.111770, 0.130210, 0.159540, 0.217950", \ + "0.100410, 0.104280, 0.107530, 0.114550, 0.132990, 0.162320, 0.220730", \ + "0.105040, 0.108910, 0.112160, 0.119180, 0.137620, 0.166950, 0.225360", \ + "0.113960, 0.117830, 0.121080, 0.128100, 0.146540, 0.175870, 0.234280", \ + "0.121040, 0.124910, 0.128160, 0.135180, 0.153620, 0.182950, 0.241360", \ + "0.128980, 0.132850, 0.136100, 0.143120, 0.161560, 0.190890, 0.249300" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119090, 0.123820, 0.128020, 0.137710, 0.165650, 0.211970, 0.304490", \ + "0.119950, 0.124680, 0.128880, 0.138570, 0.166510, 0.212830, 0.305350", \ + "0.123620, 0.128350, 0.132550, 0.142240, 0.170180, 0.216500, 0.309020", \ + "0.129460, 0.134190, 0.138390, 0.148080, 0.176020, 0.222340, 0.314860", \ + "0.142710, 0.147440, 0.151640, 0.161330, 0.189270, 0.235590, 0.328110", \ + "0.159990, 0.164720, 0.168920, 0.178610, 0.206550, 0.252870, 0.345390", \ + "0.190270, 0.195000, 0.199200, 0.208890, 0.236830, 0.283150, 0.375670" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107181, 0.111911, 0.116111, 0.125801, 0.153741, 0.200061, 0.292581", \ + "0.108041, 0.112771, 0.116971, 0.126661, 0.154601, 0.200921, 0.293441", \ + "0.111711, 0.116441, 0.120641, 0.130331, 0.158271, 0.204591, 0.297111", \ + "0.117551, 0.122281, 0.126481, 0.136171, 0.164111, 0.210431, 0.302951", \ + "0.130801, 0.135531, 0.139731, 0.149421, 0.177361, 0.223681, 0.316201", \ + "0.148081, 0.152811, 0.157011, 0.166701, 0.194641, 0.240961, 0.333481", \ + "0.178361, 0.183091, 0.187291, 0.196981, 0.224921, 0.271241, 0.363761" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENA&!CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153330, 0.158010, 0.162170, 0.171840, 0.199850, 0.246180, 0.338840", \ + "0.154460, 0.159140, 0.163300, 0.172970, 0.200980, 0.247310, 0.339970", \ + "0.156990, 0.161670, 0.165830, 0.175500, 0.203510, 0.249840, 0.342500", \ + "0.162050, 0.166730, 0.170890, 0.180560, 0.208570, 0.254900, 0.347560", \ + "0.170020, 0.174700, 0.178860, 0.188530, 0.216540, 0.262870, 0.355530", \ + "0.177910, 0.182590, 0.186750, 0.196420, 0.224430, 0.270760, 0.363420", \ + "0.188320, 0.193000, 0.197160, 0.206830, 0.234840, 0.281170, 0.373830" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.137997, 0.142677, 0.146837, 0.156507, 0.184517, 0.230847, 0.323507", \ + "0.139127, 0.143807, 0.147967, 0.157637, 0.185647, 0.231977, 0.324637", \ + "0.141657, 0.146337, 0.150497, 0.160167, 0.188177, 0.234507, 0.327167", \ + "0.146717, 0.151397, 0.155557, 0.165227, 0.193237, 0.239567, 0.332227", \ + "0.154687, 0.159367, 0.163527, 0.173197, 0.201207, 0.247537, 0.340197", \ + "0.162577, 0.167257, 0.171417, 0.181087, 0.209097, 0.255427, 0.348087", \ + "0.172987, 0.177667, 0.181827, 0.191497, 0.219507, 0.265837, 0.358497" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.143810, 0.147600, 0.150810, 0.157830, 0.176310, 0.205680, 0.264090", \ + "0.145270, 0.149060, 0.152270, 0.159290, 0.177770, 0.207140, 0.265550", \ + "0.148640, 0.152430, 0.155640, 0.162660, 0.181140, 0.210510, 0.268920", \ + "0.154150, 0.157940, 0.161150, 0.168170, 0.186650, 0.216020, 0.274430", \ + "0.168250, 0.172040, 0.175250, 0.182270, 0.200750, 0.230120, 0.288530", \ + "0.184040, 0.187830, 0.191040, 0.198060, 0.216540, 0.245910, 0.304320", \ + "0.215490, 0.219280, 0.222490, 0.229510, 0.247990, 0.277360, 0.335770" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.129429, 0.133219, 0.136429, 0.143449, 0.161929, 0.191299, 0.249709", \ + "0.130889, 0.134679, 0.137889, 0.144909, 0.163389, 0.192759, 0.251169", \ + "0.134259, 0.138049, 0.141259, 0.148279, 0.166759, 0.196129, 0.254539", \ + "0.139769, 0.143559, 0.146769, 0.153789, 0.172269, 0.201639, 0.260049", \ + "0.153869, 0.157659, 0.160869, 0.167889, 0.186369, 0.215739, 0.274149", \ + "0.169659, 0.173449, 0.176659, 0.183679, 0.202159, 0.231529, 0.289939", \ + "0.201109, 0.204899, 0.208109, 0.215129, 0.233609, 0.262979, 0.321389" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116098, 0.119591, 0.122908, 0.129778, 0.148308, 0.177713, 0.236333", \ + "0.117063, 0.120556, 0.123873, 0.130743, 0.149273, 0.178678, 0.237298", \ + "0.119896, 0.123389, 0.126706, 0.133576, 0.152106, 0.181511, 0.240131", \ + "0.125780, 0.129273, 0.132590, 0.139460, 0.157990, 0.187395, 0.246015", \ + "0.136289, 0.139782, 0.143099, 0.149969, 0.168499, 0.197904, 0.256524", \ + "0.149459, 0.152952, 0.156269, 0.163139, 0.181669, 0.211074, 0.269694", \ + "0.170133, 0.173626, 0.176943, 0.183813, 0.202343, 0.231748, 0.290368" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.104488, 0.107981, 0.111298, 0.118168, 0.136698, 0.166103, 0.224723", \ + "0.105453, 0.108946, 0.112263, 0.119133, 0.137663, 0.167068, 0.225688", \ + "0.108286, 0.111779, 0.115096, 0.121966, 0.140496, 0.169901, 0.228521", \ + "0.114170, 0.117663, 0.120980, 0.127850, 0.146380, 0.175785, 0.234405", \ + "0.124679, 0.128172, 0.131489, 0.138359, 0.156889, 0.186294, 0.244914", \ + "0.137849, 0.141342, 0.144659, 0.151529, 0.170059, 0.199464, 0.258084", \ + "0.158523, 0.162016, 0.165333, 0.172203, 0.190733, 0.220138, 0.278758" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.148685, 0.153258, 0.157629, 0.167331, 0.195207, 0.241697, 0.333747", \ + "0.149463, 0.154036, 0.158407, 0.168109, 0.195985, 0.242475, 0.334525", \ + "0.152955, 0.157528, 0.161899, 0.171601, 0.199477, 0.245967, 0.338017", \ + "0.159554, 0.164127, 0.168498, 0.178200, 0.206076, 0.252566, 0.344616", \ + "0.171374, 0.175947, 0.180318, 0.190020, 0.217896, 0.264386, 0.356436", \ + "0.186627, 0.191200, 0.195571, 0.205273, 0.233149, 0.279639, 0.371689", \ + "0.211047, 0.215620, 0.219991, 0.229693, 0.257569, 0.304059, 0.396109" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.133817, 0.138389, 0.142761, 0.152463, 0.180339, 0.226828, 0.318879", \ + "0.134595, 0.139167, 0.143539, 0.153241, 0.181117, 0.227606, 0.319657", \ + "0.138087, 0.142659, 0.147031, 0.156732, 0.184609, 0.231098, 0.323149", \ + "0.144685, 0.149259, 0.153630, 0.163331, 0.191208, 0.237698, 0.329747", \ + "0.156505, 0.161079, 0.165449, 0.175152, 0.203027, 0.249518, 0.341567", \ + "0.171758, 0.176332, 0.180702, 0.190404, 0.218280, 0.264770, 0.356820", \ + "0.196179, 0.200751, 0.205122, 0.214825, 0.242700, 0.289190, 0.381240" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + } + internal_power() { + related_pin : CENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TCENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENA&CENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENA&!CENA"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004770, 0.004775, 0.004780, 0.004785, 0.004789, 0.004794, 0.004799", \ + "0.004775, 0.004780, 0.004785, 0.004789, 0.004794, 0.004799, 0.004804", \ + "0.004780, 0.004785, 0.004789, 0.004794, 0.004799, 0.004804, 0.004809", \ + "0.005010, 0.005015, 0.005020, 0.005025, 0.005030, 0.005035, 0.005040", \ + "0.005477, 0.005483, 0.005488, 0.005494, 0.005499, 0.005505, 0.005510", \ + "0.005483, 0.005488, 0.005494, 0.005499, 0.005505, 0.005510, 0.005516", \ + "0.005488, 0.005494, 0.005499, 0.005505, 0.005510, 0.005516, 0.005521" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005763, 0.005768, 0.005774, 0.005780, 0.005786, 0.005792, 0.005797", \ + "0.007000, 0.007007, 0.007014, 0.007021, 0.007028, 0.007035, 0.007042", \ + "0.007007, 0.007014, 0.007021, 0.007028, 0.007035, 0.007042, 0.007049", \ + "0.007389, 0.007396, 0.007404, 0.007411, 0.007419, 0.007426, 0.007433", \ + "0.007396, 0.007404, 0.007411, 0.007419, 0.007426, 0.007433, 0.007441", \ + "0.007404, 0.007411, 0.007419, 0.007426, 0.007433, 0.007441, 0.007448", \ + "0.007411, 0.007419, 0.007426, 0.007433, 0.007441, 0.007448, 0.007456" \ + ); + } + } + } + bus(AYA) { + bus_type : rf2_32x128_wm1_AYA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : AA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069431, 0.072806, 0.075626, 0.082081, 0.098378, 0.123790, 0.177190", \ + "0.070772, 0.074063, 0.076725, 0.083076, 0.099376, 0.124460, 0.175930", \ + "0.073296, 0.076872, 0.079843, 0.086072, 0.102950, 0.130390, 0.182290", \ + "0.079184, 0.082738, 0.085732, 0.091970, 0.108960, 0.134680, 0.190250", \ + "0.091419, 0.094912, 0.097672, 0.103760, 0.120080, 0.145620, 0.200320", \ + "0.108460, 0.111910, 0.114750, 0.121000, 0.136830, 0.162500, 0.213500", \ + "0.140110, 0.143540, 0.146380, 0.152080, 0.167910, 0.193870, 0.247740" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062488, 0.065863, 0.068683, 0.075138, 0.091435, 0.116847, 0.170247", \ + "0.063829, 0.067120, 0.069782, 0.076133, 0.092433, 0.117517, 0.168987", \ + "0.066353, 0.069929, 0.072900, 0.079129, 0.096007, 0.123447, 0.175347", \ + "0.072241, 0.075795, 0.078789, 0.085027, 0.102017, 0.127737, 0.183307", \ + "0.084476, 0.087969, 0.090729, 0.096817, 0.113137, 0.138677, 0.193377", \ + "0.101517, 0.104967, 0.107807, 0.114057, 0.129887, 0.155557, 0.206557", \ + "0.133167, 0.136597, 0.139437, 0.145137, 0.160967, 0.186927, 0.240797" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061135, 0.065085, 0.068524, 0.076773, 0.099774, 0.140530, 0.222170", \ + "0.061593, 0.065831, 0.069445, 0.077299, 0.100640, 0.140590, 0.217290", \ + "0.064746, 0.068773, 0.072269, 0.080453, 0.103240, 0.143670, 0.219510", \ + "0.070800, 0.074898, 0.078369, 0.086625, 0.109730, 0.149260, 0.227520", \ + "0.083837, 0.087850, 0.091217, 0.099449, 0.122910, 0.162820, 0.238330", \ + "0.101600, 0.105580, 0.109030, 0.117060, 0.140350, 0.179080, 0.256230", \ + "0.139440, 0.143400, 0.146920, 0.154870, 0.178240, 0.217490, 0.293840" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.055022, 0.058972, 0.062411, 0.070659, 0.093661, 0.134416, 0.216057", \ + "0.055480, 0.059717, 0.063332, 0.071186, 0.094526, 0.134476, 0.211177", \ + "0.058632, 0.062660, 0.066156, 0.074340, 0.097127, 0.137556, 0.213397", \ + "0.064687, 0.068784, 0.072256, 0.080511, 0.103617, 0.143147, 0.221407", \ + "0.077724, 0.081736, 0.085103, 0.093335, 0.116796, 0.156706, 0.232216", \ + "0.095487, 0.099466, 0.102916, 0.110947, 0.134237, 0.172966, 0.250117", \ + "0.133327, 0.137287, 0.140807, 0.148757, 0.172127, 0.211376, 0.287726" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + } + timing() { + related_pin : TAA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.074165, 0.077564, 0.080626, 0.086863, 0.103580, 0.128590, 0.182420", \ + "0.075528, 0.078832, 0.081495, 0.087803, 0.103700, 0.130150, 0.184870", \ + "0.078327, 0.081613, 0.084296, 0.090658, 0.106780, 0.132050, 0.186190", \ + "0.083784, 0.087167, 0.090027, 0.096405, 0.112200, 0.137850, 0.188890", \ + "0.095953, 0.099347, 0.102160, 0.108210, 0.123680, 0.149960, 0.204560", \ + "0.113920, 0.117280, 0.120290, 0.126360, 0.142420, 0.168390, 0.221990", \ + "0.144880, 0.148130, 0.150970, 0.156390, 0.173700, 0.199790, 0.252820" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.066748, 0.070148, 0.073210, 0.079447, 0.096164, 0.121174, 0.175004", \ + "0.068111, 0.071415, 0.074078, 0.080386, 0.096283, 0.122733, 0.177454", \ + "0.070910, 0.074196, 0.076879, 0.083241, 0.099363, 0.124634, 0.178774", \ + "0.076368, 0.079751, 0.082611, 0.088988, 0.104784, 0.130434, 0.181474", \ + "0.088536, 0.091930, 0.094744, 0.100794, 0.116263, 0.142544, 0.197143", \ + "0.106504, 0.109864, 0.112873, 0.118944, 0.135003, 0.160974, 0.214574", \ + "0.137464, 0.140714, 0.143554, 0.148974, 0.166284, 0.192374, 0.245403" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.063216, 0.067149, 0.070662, 0.078772, 0.101930, 0.140250, 0.220140", \ + "0.064791, 0.068790, 0.072334, 0.080468, 0.103800, 0.142930, 0.220650", \ + "0.067207, 0.071071, 0.074657, 0.082544, 0.105690, 0.145960, 0.223450", \ + "0.073795, 0.077993, 0.081537, 0.089505, 0.113050, 0.152480, 0.229550", \ + "0.086428, 0.090344, 0.094004, 0.102000, 0.125130, 0.164810, 0.243420", \ + "0.103900, 0.107930, 0.111460, 0.119500, 0.142700, 0.181130, 0.260650", \ + "0.141630, 0.145770, 0.149120, 0.157110, 0.180220, 0.217390, 0.297270" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056894, 0.060827, 0.064340, 0.072450, 0.095608, 0.133928, 0.213818", \ + "0.058469, 0.062468, 0.066012, 0.074146, 0.097478, 0.136608, 0.214328", \ + "0.060885, 0.064749, 0.068335, 0.076222, 0.099368, 0.139638, 0.217128", \ + "0.067473, 0.071671, 0.075215, 0.083183, 0.106728, 0.146158, 0.223228", \ + "0.080106, 0.084022, 0.087682, 0.095678, 0.118808, 0.158488, 0.237098", \ + "0.097578, 0.101608, 0.105138, 0.113178, 0.136378, 0.174808, 0.254328", \ + "0.135308, 0.139448, 0.142798, 0.150788, 0.173898, 0.211068, 0.290948" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.106669, 0.109869, 0.112906, 0.119153, 0.135699, 0.161951, 0.214421", \ + "0.107651, 0.110851, 0.113888, 0.120135, 0.136681, 0.162933, 0.215403", \ + "0.110482, 0.113682, 0.116719, 0.122966, 0.139512, 0.165764, 0.218234", \ + "0.116196, 0.119396, 0.122433, 0.128680, 0.145226, 0.171478, 0.223948", \ + "0.126659, 0.129859, 0.132896, 0.139143, 0.155689, 0.181941, 0.234411", \ + "0.139676, 0.142876, 0.145913, 0.152160, 0.168706, 0.194958, 0.247428", \ + "0.160361, 0.163561, 0.166598, 0.172845, 0.189391, 0.215643, 0.268113" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096225, 0.099360, 0.102311, 0.108328, 0.124195, 0.149417, 0.199667", \ + "0.097216, 0.100351, 0.103302, 0.109319, 0.125186, 0.150408, 0.200658", \ + "0.100015, 0.103150, 0.106101, 0.112118, 0.127985, 0.153207, 0.203457", \ + "0.105765, 0.108900, 0.111851, 0.117868, 0.133735, 0.158957, 0.209207", \ + "0.116230, 0.119365, 0.122316, 0.128333, 0.144200, 0.169422, 0.219672", \ + "0.129254, 0.132389, 0.135340, 0.141357, 0.157224, 0.182446, 0.232696", \ + "0.149957, 0.153092, 0.156043, 0.162060, 0.177927, 0.203149, 0.253399" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138559, 0.142855, 0.146626, 0.154857, 0.178490, 0.217954, 0.296184", \ + "0.139425, 0.143721, 0.147492, 0.155723, 0.179356, 0.218820, 0.297050", \ + "0.142882, 0.147178, 0.150949, 0.159180, 0.182813, 0.222277, 0.300507", \ + "0.149502, 0.153798, 0.157569, 0.165800, 0.189433, 0.228897, 0.307127", \ + "0.161275, 0.165571, 0.169342, 0.177573, 0.201206, 0.240670, 0.318900", \ + "0.176428, 0.180724, 0.184495, 0.192726, 0.216359, 0.255823, 0.334053", \ + "0.200484, 0.204780, 0.208551, 0.216782, 0.240415, 0.279879, 0.358109" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123624, 0.127791, 0.131543, 0.139623, 0.162681, 0.201189, 0.277559", \ + "0.124437, 0.128604, 0.132356, 0.140436, 0.163494, 0.202002, 0.278372", \ + "0.127944, 0.132111, 0.135863, 0.143943, 0.167001, 0.205509, 0.281879", \ + "0.134535, 0.138702, 0.142454, 0.150534, 0.173592, 0.212100, 0.288470", \ + "0.146285, 0.150452, 0.154204, 0.162284, 0.185342, 0.223850, 0.300220", \ + "0.161487, 0.165654, 0.169406, 0.177486, 0.200544, 0.239052, 0.315422", \ + "0.185549, 0.189716, 0.193468, 0.201548, 0.224606, 0.263114, 0.339484" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + } + internal_power() { + related_pin : AA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TAA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004770, 0.004775, 0.004780, 0.004785, 0.004789, 0.004794, 0.004799", \ + "0.004775, 0.004780, 0.004785, 0.004789, 0.004794, 0.004799, 0.004804", \ + "0.004780, 0.004785, 0.004789, 0.004794, 0.004799, 0.004804, 0.004809", \ + "0.005010, 0.005015, 0.005020, 0.005025, 0.005030, 0.005035, 0.005040", \ + "0.005477, 0.005483, 0.005488, 0.005494, 0.005499, 0.005505, 0.005510", \ + "0.005483, 0.005488, 0.005494, 0.005499, 0.005505, 0.005510, 0.005516", \ + "0.005488, 0.005494, 0.005499, 0.005505, 0.005510, 0.005516, 0.005521" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005763, 0.005768, 0.005774, 0.005780, 0.005786, 0.005792, 0.005797", \ + "0.007000, 0.007007, 0.007014, 0.007021, 0.007028, 0.007035, 0.007042", \ + "0.007007, 0.007014, 0.007021, 0.007028, 0.007035, 0.007042, 0.007049", \ + "0.007389, 0.007396, 0.007404, 0.007411, 0.007419, 0.007426, 0.007433", \ + "0.007396, 0.007404, 0.007411, 0.007419, 0.007426, 0.007433, 0.007441", \ + "0.007404, 0.007411, 0.007419, 0.007426, 0.007433, 0.007441, 0.007448", \ + "0.007411, 0.007419, 0.007426, 0.007433, 0.007441, 0.007448, 0.007456" \ + ); + } + } + pin(AYA[4]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157770, 0.161250, 0.163980, 0.170480, 0.186810, 0.213060, 0.265340", \ + "0.158670, 0.162150, 0.164880, 0.171380, 0.187710, 0.213960, 0.266240", \ + "0.161900, 0.165380, 0.168110, 0.174610, 0.190940, 0.217190, 0.269470", \ + "0.165870, 0.169350, 0.172080, 0.178580, 0.194910, 0.221160, 0.273440", \ + "0.174900, 0.178380, 0.181110, 0.187610, 0.203940, 0.230190, 0.282470", \ + "0.181990, 0.185470, 0.188200, 0.194700, 0.211030, 0.237280, 0.289560", \ + "0.191260, 0.194740, 0.197470, 0.203970, 0.220300, 0.246550, 0.298830" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140058, 0.143508, 0.146198, 0.152438, 0.168168, 0.193358, 0.243458", \ + "0.141038, 0.144488, 0.147178, 0.153418, 0.169148, 0.194338, 0.244438", \ + "0.144188, 0.147638, 0.150328, 0.156568, 0.172298, 0.197488, 0.247588", \ + "0.148308, 0.151758, 0.154448, 0.160688, 0.176418, 0.201608, 0.251708", \ + "0.157238, 0.160688, 0.163378, 0.169618, 0.185348, 0.210538, 0.260638", \ + "0.164328, 0.167778, 0.170468, 0.176708, 0.192438, 0.217628, 0.267728", \ + "0.173638, 0.177088, 0.179778, 0.186018, 0.201748, 0.226938, 0.277038" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147980, 0.152230, 0.155850, 0.164030, 0.187730, 0.227050, 0.305720", \ + "0.148820, 0.153070, 0.156690, 0.164870, 0.188570, 0.227890, 0.306560", \ + "0.152550, 0.156800, 0.160420, 0.168600, 0.192300, 0.231620, 0.310290", \ + "0.158650, 0.162900, 0.166520, 0.174700, 0.198400, 0.237720, 0.316390", \ + "0.171640, 0.175890, 0.179510, 0.187690, 0.211390, 0.250710, 0.329380", \ + "0.189150, 0.193400, 0.197020, 0.205200, 0.228900, 0.268220, 0.346890", \ + "0.218680, 0.222930, 0.226550, 0.234730, 0.258430, 0.297750, 0.376420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130761, 0.134881, 0.138451, 0.146441, 0.169571, 0.208021, 0.284841", \ + "0.131481, 0.135601, 0.139171, 0.147161, 0.170291, 0.208741, 0.285561", \ + "0.135191, 0.139311, 0.142881, 0.150871, 0.174001, 0.212451, 0.289271", \ + "0.141351, 0.145471, 0.149041, 0.157031, 0.180161, 0.218611, 0.295431", \ + "0.154271, 0.158391, 0.161961, 0.169951, 0.193081, 0.231531, 0.308351", \ + "0.171901, 0.176021, 0.179591, 0.187581, 0.210711, 0.249161, 0.325981", \ + "0.201441, 0.205561, 0.209131, 0.217121, 0.240251, 0.278701, 0.355521" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141070, 0.145250, 0.148900, 0.157210, 0.180960, 0.220300, 0.298970", \ + "0.142110, 0.146290, 0.149940, 0.158250, 0.182000, 0.221340, 0.300010", \ + "0.144580, 0.148760, 0.152410, 0.160720, 0.184470, 0.223810, 0.302480", \ + "0.149680, 0.153860, 0.157510, 0.165820, 0.189570, 0.228910, 0.307580", \ + "0.158030, 0.162210, 0.165860, 0.174170, 0.197920, 0.237260, 0.315930", \ + "0.165790, 0.169970, 0.173620, 0.181930, 0.205680, 0.245020, 0.323690", \ + "0.176310, 0.180490, 0.184140, 0.192450, 0.216200, 0.255540, 0.334210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124146, 0.128226, 0.131736, 0.139756, 0.162896, 0.201326, 0.278126", \ + "0.125396, 0.129476, 0.132986, 0.141006, 0.164146, 0.202576, 0.279376", \ + "0.127676, 0.131756, 0.135266, 0.143286, 0.166426, 0.204856, 0.281656", \ + "0.132806, 0.136886, 0.140396, 0.148416, 0.171556, 0.209986, 0.286786", \ + "0.141216, 0.145296, 0.148806, 0.156826, 0.179966, 0.218396, 0.295196", \ + "0.148946, 0.153026, 0.156536, 0.164556, 0.187696, 0.226126, 0.302926", \ + "0.159246, 0.163326, 0.166836, 0.174856, 0.197996, 0.236426, 0.313226" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146400, 0.149890, 0.152810, 0.159130, 0.175670, 0.201960, 0.254240", \ + "0.148070, 0.151560, 0.154480, 0.160800, 0.177340, 0.203630, 0.255910", \ + "0.151050, 0.154540, 0.157460, 0.163780, 0.180320, 0.206610, 0.258890", \ + "0.156930, 0.160420, 0.163340, 0.169660, 0.186200, 0.212490, 0.264770", \ + "0.170720, 0.174210, 0.177130, 0.183450, 0.199990, 0.226280, 0.278560", \ + "0.186800, 0.190290, 0.193210, 0.199530, 0.216070, 0.242360, 0.294640", \ + "0.217780, 0.221270, 0.224190, 0.230510, 0.247050, 0.273340, 0.325620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130230, 0.133640, 0.136470, 0.142580, 0.158430, 0.183630, 0.233670", \ + "0.132050, 0.135460, 0.138290, 0.144400, 0.160250, 0.185450, 0.235490", \ + "0.134990, 0.138400, 0.141230, 0.147340, 0.163190, 0.188390, 0.238430", \ + "0.140670, 0.144080, 0.146910, 0.153020, 0.168870, 0.194070, 0.244110", \ + "0.154630, 0.158040, 0.160870, 0.166980, 0.182830, 0.208030, 0.258070", \ + "0.170720, 0.174130, 0.176960, 0.183070, 0.198920, 0.224120, 0.274160", \ + "0.201740, 0.205150, 0.207980, 0.214090, 0.229940, 0.255140, 0.305180" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + pin(AYA[3]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157770, 0.161250, 0.163980, 0.170480, 0.186810, 0.213060, 0.265340", \ + "0.158670, 0.162150, 0.164880, 0.171380, 0.187710, 0.213960, 0.266240", \ + "0.161900, 0.165380, 0.168110, 0.174610, 0.190940, 0.217190, 0.269470", \ + "0.165870, 0.169350, 0.172080, 0.178580, 0.194910, 0.221160, 0.273440", \ + "0.174900, 0.178380, 0.181110, 0.187610, 0.203940, 0.230190, 0.282470", \ + "0.181990, 0.185470, 0.188200, 0.194700, 0.211030, 0.237280, 0.289560", \ + "0.191260, 0.194740, 0.197470, 0.203970, 0.220300, 0.246550, 0.298830" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140058, 0.143508, 0.146198, 0.152438, 0.168168, 0.193358, 0.243458", \ + "0.141038, 0.144488, 0.147178, 0.153418, 0.169148, 0.194338, 0.244438", \ + "0.144188, 0.147638, 0.150328, 0.156568, 0.172298, 0.197488, 0.247588", \ + "0.148308, 0.151758, 0.154448, 0.160688, 0.176418, 0.201608, 0.251708", \ + "0.157238, 0.160688, 0.163378, 0.169618, 0.185348, 0.210538, 0.260638", \ + "0.164328, 0.167778, 0.170468, 0.176708, 0.192438, 0.217628, 0.267728", \ + "0.173638, 0.177088, 0.179778, 0.186018, 0.201748, 0.226938, 0.277038" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147980, 0.152230, 0.155850, 0.164030, 0.187730, 0.227050, 0.305720", \ + "0.148820, 0.153070, 0.156690, 0.164870, 0.188570, 0.227890, 0.306560", \ + "0.152550, 0.156800, 0.160420, 0.168600, 0.192300, 0.231620, 0.310290", \ + "0.158650, 0.162900, 0.166520, 0.174700, 0.198400, 0.237720, 0.316390", \ + "0.171640, 0.175890, 0.179510, 0.187690, 0.211390, 0.250710, 0.329380", \ + "0.189150, 0.193400, 0.197020, 0.205200, 0.228900, 0.268220, 0.346890", \ + "0.218680, 0.222930, 0.226550, 0.234730, 0.258430, 0.297750, 0.376420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130761, 0.134881, 0.138451, 0.146441, 0.169571, 0.208021, 0.284841", \ + "0.131481, 0.135601, 0.139171, 0.147161, 0.170291, 0.208741, 0.285561", \ + "0.135191, 0.139311, 0.142881, 0.150871, 0.174001, 0.212451, 0.289271", \ + "0.141351, 0.145471, 0.149041, 0.157031, 0.180161, 0.218611, 0.295431", \ + "0.154271, 0.158391, 0.161961, 0.169951, 0.193081, 0.231531, 0.308351", \ + "0.171901, 0.176021, 0.179591, 0.187581, 0.210711, 0.249161, 0.325981", \ + "0.201441, 0.205561, 0.209131, 0.217121, 0.240251, 0.278701, 0.355521" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141070, 0.145250, 0.148900, 0.157210, 0.180960, 0.220300, 0.298970", \ + "0.142110, 0.146290, 0.149940, 0.158250, 0.182000, 0.221340, 0.300010", \ + "0.144580, 0.148760, 0.152410, 0.160720, 0.184470, 0.223810, 0.302480", \ + "0.149680, 0.153860, 0.157510, 0.165820, 0.189570, 0.228910, 0.307580", \ + "0.158030, 0.162210, 0.165860, 0.174170, 0.197920, 0.237260, 0.315930", \ + "0.165790, 0.169970, 0.173620, 0.181930, 0.205680, 0.245020, 0.323690", \ + "0.176310, 0.180490, 0.184140, 0.192450, 0.216200, 0.255540, 0.334210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124146, 0.128226, 0.131736, 0.139756, 0.162896, 0.201326, 0.278126", \ + "0.125396, 0.129476, 0.132986, 0.141006, 0.164146, 0.202576, 0.279376", \ + "0.127676, 0.131756, 0.135266, 0.143286, 0.166426, 0.204856, 0.281656", \ + "0.132806, 0.136886, 0.140396, 0.148416, 0.171556, 0.209986, 0.286786", \ + "0.141216, 0.145296, 0.148806, 0.156826, 0.179966, 0.218396, 0.295196", \ + "0.148946, 0.153026, 0.156536, 0.164556, 0.187696, 0.226126, 0.302926", \ + "0.159246, 0.163326, 0.166836, 0.174856, 0.197996, 0.236426, 0.313226" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146400, 0.149890, 0.152810, 0.159130, 0.175670, 0.201960, 0.254240", \ + "0.148070, 0.151560, 0.154480, 0.160800, 0.177340, 0.203630, 0.255910", \ + "0.151050, 0.154540, 0.157460, 0.163780, 0.180320, 0.206610, 0.258890", \ + "0.156930, 0.160420, 0.163340, 0.169660, 0.186200, 0.212490, 0.264770", \ + "0.170720, 0.174210, 0.177130, 0.183450, 0.199990, 0.226280, 0.278560", \ + "0.186800, 0.190290, 0.193210, 0.199530, 0.216070, 0.242360, 0.294640", \ + "0.217780, 0.221270, 0.224190, 0.230510, 0.247050, 0.273340, 0.325620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130230, 0.133640, 0.136470, 0.142580, 0.158430, 0.183630, 0.233670", \ + "0.132050, 0.135460, 0.138290, 0.144400, 0.160250, 0.185450, 0.235490", \ + "0.134990, 0.138400, 0.141230, 0.147340, 0.163190, 0.188390, 0.238430", \ + "0.140670, 0.144080, 0.146910, 0.153020, 0.168870, 0.194070, 0.244110", \ + "0.154630, 0.158040, 0.160870, 0.166980, 0.182830, 0.208030, 0.258070", \ + "0.170720, 0.174130, 0.176960, 0.183070, 0.198920, 0.224120, 0.274160", \ + "0.201740, 0.205150, 0.207980, 0.214090, 0.229940, 0.255140, 0.305180" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + pin(AYA[2]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157770, 0.161250, 0.163980, 0.170480, 0.186810, 0.213060, 0.265340", \ + "0.158670, 0.162150, 0.164880, 0.171380, 0.187710, 0.213960, 0.266240", \ + "0.161900, 0.165380, 0.168110, 0.174610, 0.190940, 0.217190, 0.269470", \ + "0.165870, 0.169350, 0.172080, 0.178580, 0.194910, 0.221160, 0.273440", \ + "0.174900, 0.178380, 0.181110, 0.187610, 0.203940, 0.230190, 0.282470", \ + "0.181990, 0.185470, 0.188200, 0.194700, 0.211030, 0.237280, 0.289560", \ + "0.191260, 0.194740, 0.197470, 0.203970, 0.220300, 0.246550, 0.298830" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140058, 0.143508, 0.146198, 0.152438, 0.168168, 0.193358, 0.243458", \ + "0.141038, 0.144488, 0.147178, 0.153418, 0.169148, 0.194338, 0.244438", \ + "0.144188, 0.147638, 0.150328, 0.156568, 0.172298, 0.197488, 0.247588", \ + "0.148308, 0.151758, 0.154448, 0.160688, 0.176418, 0.201608, 0.251708", \ + "0.157238, 0.160688, 0.163378, 0.169618, 0.185348, 0.210538, 0.260638", \ + "0.164328, 0.167778, 0.170468, 0.176708, 0.192438, 0.217628, 0.267728", \ + "0.173638, 0.177088, 0.179778, 0.186018, 0.201748, 0.226938, 0.277038" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147980, 0.152230, 0.155850, 0.164030, 0.187730, 0.227050, 0.305720", \ + "0.148820, 0.153070, 0.156690, 0.164870, 0.188570, 0.227890, 0.306560", \ + "0.152550, 0.156800, 0.160420, 0.168600, 0.192300, 0.231620, 0.310290", \ + "0.158650, 0.162900, 0.166520, 0.174700, 0.198400, 0.237720, 0.316390", \ + "0.171640, 0.175890, 0.179510, 0.187690, 0.211390, 0.250710, 0.329380", \ + "0.189150, 0.193400, 0.197020, 0.205200, 0.228900, 0.268220, 0.346890", \ + "0.218680, 0.222930, 0.226550, 0.234730, 0.258430, 0.297750, 0.376420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130761, 0.134881, 0.138451, 0.146441, 0.169571, 0.208021, 0.284841", \ + "0.131481, 0.135601, 0.139171, 0.147161, 0.170291, 0.208741, 0.285561", \ + "0.135191, 0.139311, 0.142881, 0.150871, 0.174001, 0.212451, 0.289271", \ + "0.141351, 0.145471, 0.149041, 0.157031, 0.180161, 0.218611, 0.295431", \ + "0.154271, 0.158391, 0.161961, 0.169951, 0.193081, 0.231531, 0.308351", \ + "0.171901, 0.176021, 0.179591, 0.187581, 0.210711, 0.249161, 0.325981", \ + "0.201441, 0.205561, 0.209131, 0.217121, 0.240251, 0.278701, 0.355521" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141070, 0.145250, 0.148900, 0.157210, 0.180960, 0.220300, 0.298970", \ + "0.142110, 0.146290, 0.149940, 0.158250, 0.182000, 0.221340, 0.300010", \ + "0.144580, 0.148760, 0.152410, 0.160720, 0.184470, 0.223810, 0.302480", \ + "0.149680, 0.153860, 0.157510, 0.165820, 0.189570, 0.228910, 0.307580", \ + "0.158030, 0.162210, 0.165860, 0.174170, 0.197920, 0.237260, 0.315930", \ + "0.165790, 0.169970, 0.173620, 0.181930, 0.205680, 0.245020, 0.323690", \ + "0.176310, 0.180490, 0.184140, 0.192450, 0.216200, 0.255540, 0.334210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124146, 0.128226, 0.131736, 0.139756, 0.162896, 0.201326, 0.278126", \ + "0.125396, 0.129476, 0.132986, 0.141006, 0.164146, 0.202576, 0.279376", \ + "0.127676, 0.131756, 0.135266, 0.143286, 0.166426, 0.204856, 0.281656", \ + "0.132806, 0.136886, 0.140396, 0.148416, 0.171556, 0.209986, 0.286786", \ + "0.141216, 0.145296, 0.148806, 0.156826, 0.179966, 0.218396, 0.295196", \ + "0.148946, 0.153026, 0.156536, 0.164556, 0.187696, 0.226126, 0.302926", \ + "0.159246, 0.163326, 0.166836, 0.174856, 0.197996, 0.236426, 0.313226" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146400, 0.149890, 0.152810, 0.159130, 0.175670, 0.201960, 0.254240", \ + "0.148070, 0.151560, 0.154480, 0.160800, 0.177340, 0.203630, 0.255910", \ + "0.151050, 0.154540, 0.157460, 0.163780, 0.180320, 0.206610, 0.258890", \ + "0.156930, 0.160420, 0.163340, 0.169660, 0.186200, 0.212490, 0.264770", \ + "0.170720, 0.174210, 0.177130, 0.183450, 0.199990, 0.226280, 0.278560", \ + "0.186800, 0.190290, 0.193210, 0.199530, 0.216070, 0.242360, 0.294640", \ + "0.217780, 0.221270, 0.224190, 0.230510, 0.247050, 0.273340, 0.325620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130230, 0.133640, 0.136470, 0.142580, 0.158430, 0.183630, 0.233670", \ + "0.132050, 0.135460, 0.138290, 0.144400, 0.160250, 0.185450, 0.235490", \ + "0.134990, 0.138400, 0.141230, 0.147340, 0.163190, 0.188390, 0.238430", \ + "0.140670, 0.144080, 0.146910, 0.153020, 0.168870, 0.194070, 0.244110", \ + "0.154630, 0.158040, 0.160870, 0.166980, 0.182830, 0.208030, 0.258070", \ + "0.170720, 0.174130, 0.176960, 0.183070, 0.198920, 0.224120, 0.274160", \ + "0.201740, 0.205150, 0.207980, 0.214090, 0.229940, 0.255140, 0.305180" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + pin(AYA[1]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157770, 0.161250, 0.163980, 0.170480, 0.186810, 0.213060, 0.265340", \ + "0.158670, 0.162150, 0.164880, 0.171380, 0.187710, 0.213960, 0.266240", \ + "0.161900, 0.165380, 0.168110, 0.174610, 0.190940, 0.217190, 0.269470", \ + "0.165870, 0.169350, 0.172080, 0.178580, 0.194910, 0.221160, 0.273440", \ + "0.174900, 0.178380, 0.181110, 0.187610, 0.203940, 0.230190, 0.282470", \ + "0.181990, 0.185470, 0.188200, 0.194700, 0.211030, 0.237280, 0.289560", \ + "0.191260, 0.194740, 0.197470, 0.203970, 0.220300, 0.246550, 0.298830" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140058, 0.143508, 0.146198, 0.152438, 0.168168, 0.193358, 0.243458", \ + "0.141038, 0.144488, 0.147178, 0.153418, 0.169148, 0.194338, 0.244438", \ + "0.144188, 0.147638, 0.150328, 0.156568, 0.172298, 0.197488, 0.247588", \ + "0.148308, 0.151758, 0.154448, 0.160688, 0.176418, 0.201608, 0.251708", \ + "0.157238, 0.160688, 0.163378, 0.169618, 0.185348, 0.210538, 0.260638", \ + "0.164328, 0.167778, 0.170468, 0.176708, 0.192438, 0.217628, 0.267728", \ + "0.173638, 0.177088, 0.179778, 0.186018, 0.201748, 0.226938, 0.277038" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147980, 0.152230, 0.155850, 0.164030, 0.187730, 0.227050, 0.305720", \ + "0.148820, 0.153070, 0.156690, 0.164870, 0.188570, 0.227890, 0.306560", \ + "0.152550, 0.156800, 0.160420, 0.168600, 0.192300, 0.231620, 0.310290", \ + "0.158650, 0.162900, 0.166520, 0.174700, 0.198400, 0.237720, 0.316390", \ + "0.171640, 0.175890, 0.179510, 0.187690, 0.211390, 0.250710, 0.329380", \ + "0.189150, 0.193400, 0.197020, 0.205200, 0.228900, 0.268220, 0.346890", \ + "0.218680, 0.222930, 0.226550, 0.234730, 0.258430, 0.297750, 0.376420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130761, 0.134881, 0.138451, 0.146441, 0.169571, 0.208021, 0.284841", \ + "0.131481, 0.135601, 0.139171, 0.147161, 0.170291, 0.208741, 0.285561", \ + "0.135191, 0.139311, 0.142881, 0.150871, 0.174001, 0.212451, 0.289271", \ + "0.141351, 0.145471, 0.149041, 0.157031, 0.180161, 0.218611, 0.295431", \ + "0.154271, 0.158391, 0.161961, 0.169951, 0.193081, 0.231531, 0.308351", \ + "0.171901, 0.176021, 0.179591, 0.187581, 0.210711, 0.249161, 0.325981", \ + "0.201441, 0.205561, 0.209131, 0.217121, 0.240251, 0.278701, 0.355521" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141070, 0.145250, 0.148900, 0.157210, 0.180960, 0.220300, 0.298970", \ + "0.142110, 0.146290, 0.149940, 0.158250, 0.182000, 0.221340, 0.300010", \ + "0.144580, 0.148760, 0.152410, 0.160720, 0.184470, 0.223810, 0.302480", \ + "0.149680, 0.153860, 0.157510, 0.165820, 0.189570, 0.228910, 0.307580", \ + "0.158030, 0.162210, 0.165860, 0.174170, 0.197920, 0.237260, 0.315930", \ + "0.165790, 0.169970, 0.173620, 0.181930, 0.205680, 0.245020, 0.323690", \ + "0.176310, 0.180490, 0.184140, 0.192450, 0.216200, 0.255540, 0.334210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124146, 0.128226, 0.131736, 0.139756, 0.162896, 0.201326, 0.278126", \ + "0.125396, 0.129476, 0.132986, 0.141006, 0.164146, 0.202576, 0.279376", \ + "0.127676, 0.131756, 0.135266, 0.143286, 0.166426, 0.204856, 0.281656", \ + "0.132806, 0.136886, 0.140396, 0.148416, 0.171556, 0.209986, 0.286786", \ + "0.141216, 0.145296, 0.148806, 0.156826, 0.179966, 0.218396, 0.295196", \ + "0.148946, 0.153026, 0.156536, 0.164556, 0.187696, 0.226126, 0.302926", \ + "0.159246, 0.163326, 0.166836, 0.174856, 0.197996, 0.236426, 0.313226" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146400, 0.149890, 0.152810, 0.159130, 0.175670, 0.201960, 0.254240", \ + "0.148070, 0.151560, 0.154480, 0.160800, 0.177340, 0.203630, 0.255910", \ + "0.151050, 0.154540, 0.157460, 0.163780, 0.180320, 0.206610, 0.258890", \ + "0.156930, 0.160420, 0.163340, 0.169660, 0.186200, 0.212490, 0.264770", \ + "0.170720, 0.174210, 0.177130, 0.183450, 0.199990, 0.226280, 0.278560", \ + "0.186800, 0.190290, 0.193210, 0.199530, 0.216070, 0.242360, 0.294640", \ + "0.217780, 0.221270, 0.224190, 0.230510, 0.247050, 0.273340, 0.325620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130230, 0.133640, 0.136470, 0.142580, 0.158430, 0.183630, 0.233670", \ + "0.132050, 0.135460, 0.138290, 0.144400, 0.160250, 0.185450, 0.235490", \ + "0.134990, 0.138400, 0.141230, 0.147340, 0.163190, 0.188390, 0.238430", \ + "0.140670, 0.144080, 0.146910, 0.153020, 0.168870, 0.194070, 0.244110", \ + "0.154630, 0.158040, 0.160870, 0.166980, 0.182830, 0.208030, 0.258070", \ + "0.170720, 0.174130, 0.176960, 0.183070, 0.198920, 0.224120, 0.274160", \ + "0.201740, 0.205150, 0.207980, 0.214090, 0.229940, 0.255140, 0.305180" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + pin(AYA[0]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157770, 0.161250, 0.163980, 0.170480, 0.186810, 0.213060, 0.265340", \ + "0.158670, 0.162150, 0.164880, 0.171380, 0.187710, 0.213960, 0.266240", \ + "0.161900, 0.165380, 0.168110, 0.174610, 0.190940, 0.217190, 0.269470", \ + "0.165870, 0.169350, 0.172080, 0.178580, 0.194910, 0.221160, 0.273440", \ + "0.174900, 0.178380, 0.181110, 0.187610, 0.203940, 0.230190, 0.282470", \ + "0.181990, 0.185470, 0.188200, 0.194700, 0.211030, 0.237280, 0.289560", \ + "0.191260, 0.194740, 0.197470, 0.203970, 0.220300, 0.246550, 0.298830" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140058, 0.143508, 0.146198, 0.152438, 0.168168, 0.193358, 0.243458", \ + "0.141038, 0.144488, 0.147178, 0.153418, 0.169148, 0.194338, 0.244438", \ + "0.144188, 0.147638, 0.150328, 0.156568, 0.172298, 0.197488, 0.247588", \ + "0.148308, 0.151758, 0.154448, 0.160688, 0.176418, 0.201608, 0.251708", \ + "0.157238, 0.160688, 0.163378, 0.169618, 0.185348, 0.210538, 0.260638", \ + "0.164328, 0.167778, 0.170468, 0.176708, 0.192438, 0.217628, 0.267728", \ + "0.173638, 0.177088, 0.179778, 0.186018, 0.201748, 0.226938, 0.277038" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147980, 0.152230, 0.155850, 0.164030, 0.187730, 0.227050, 0.305720", \ + "0.148820, 0.153070, 0.156690, 0.164870, 0.188570, 0.227890, 0.306560", \ + "0.152550, 0.156800, 0.160420, 0.168600, 0.192300, 0.231620, 0.310290", \ + "0.158650, 0.162900, 0.166520, 0.174700, 0.198400, 0.237720, 0.316390", \ + "0.171640, 0.175890, 0.179510, 0.187690, 0.211390, 0.250710, 0.329380", \ + "0.189150, 0.193400, 0.197020, 0.205200, 0.228900, 0.268220, 0.346890", \ + "0.218680, 0.222930, 0.226550, 0.234730, 0.258430, 0.297750, 0.376420" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130761, 0.134881, 0.138451, 0.146441, 0.169571, 0.208021, 0.284841", \ + "0.131481, 0.135601, 0.139171, 0.147161, 0.170291, 0.208741, 0.285561", \ + "0.135191, 0.139311, 0.142881, 0.150871, 0.174001, 0.212451, 0.289271", \ + "0.141351, 0.145471, 0.149041, 0.157031, 0.180161, 0.218611, 0.295431", \ + "0.154271, 0.158391, 0.161961, 0.169951, 0.193081, 0.231531, 0.308351", \ + "0.171901, 0.176021, 0.179591, 0.187581, 0.210711, 0.249161, 0.325981", \ + "0.201441, 0.205561, 0.209131, 0.217121, 0.240251, 0.278701, 0.355521" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141070, 0.145250, 0.148900, 0.157210, 0.180960, 0.220300, 0.298970", \ + "0.142110, 0.146290, 0.149940, 0.158250, 0.182000, 0.221340, 0.300010", \ + "0.144580, 0.148760, 0.152410, 0.160720, 0.184470, 0.223810, 0.302480", \ + "0.149680, 0.153860, 0.157510, 0.165820, 0.189570, 0.228910, 0.307580", \ + "0.158030, 0.162210, 0.165860, 0.174170, 0.197920, 0.237260, 0.315930", \ + "0.165790, 0.169970, 0.173620, 0.181930, 0.205680, 0.245020, 0.323690", \ + "0.176310, 0.180490, 0.184140, 0.192450, 0.216200, 0.255540, 0.334210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124146, 0.128226, 0.131736, 0.139756, 0.162896, 0.201326, 0.278126", \ + "0.125396, 0.129476, 0.132986, 0.141006, 0.164146, 0.202576, 0.279376", \ + "0.127676, 0.131756, 0.135266, 0.143286, 0.166426, 0.204856, 0.281656", \ + "0.132806, 0.136886, 0.140396, 0.148416, 0.171556, 0.209986, 0.286786", \ + "0.141216, 0.145296, 0.148806, 0.156826, 0.179966, 0.218396, 0.295196", \ + "0.148946, 0.153026, 0.156536, 0.164556, 0.187696, 0.226126, 0.302926", \ + "0.159246, 0.163326, 0.166836, 0.174856, 0.197996, 0.236426, 0.313226" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146400, 0.149890, 0.152810, 0.159130, 0.175670, 0.201960, 0.254240", \ + "0.148070, 0.151560, 0.154480, 0.160800, 0.177340, 0.203630, 0.255910", \ + "0.151050, 0.154540, 0.157460, 0.163780, 0.180320, 0.206610, 0.258890", \ + "0.156930, 0.160420, 0.163340, 0.169660, 0.186200, 0.212490, 0.264770", \ + "0.170720, 0.174210, 0.177130, 0.183450, 0.199990, 0.226280, 0.278560", \ + "0.186800, 0.190290, 0.193210, 0.199530, 0.216070, 0.242360, 0.294640", \ + "0.217780, 0.221270, 0.224190, 0.230510, 0.247050, 0.273340, 0.325620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130230, 0.133640, 0.136470, 0.142580, 0.158430, 0.183630, 0.233670", \ + "0.132050, 0.135460, 0.138290, 0.144400, 0.160250, 0.185450, 0.235490", \ + "0.134990, 0.138400, 0.141230, 0.147340, 0.163190, 0.188390, 0.238430", \ + "0.140670, 0.144080, 0.146910, 0.153020, 0.168870, 0.194070, 0.244110", \ + "0.154630, 0.158040, 0.160870, 0.166980, 0.182830, 0.208030, 0.258070", \ + "0.170720, 0.174130, 0.176960, 0.183070, 0.198920, 0.224120, 0.274160", \ + "0.201740, 0.205150, 0.207980, 0.214090, 0.229940, 0.255140, 0.305180" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + } + pin(CENYB) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : CENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.074354, 0.078586, 0.082186, 0.089757, 0.108730, 0.139860, 0.204460", \ + "0.074750, 0.078774, 0.082114, 0.089481, 0.109650, 0.141540, 0.202700", \ + "0.078933, 0.082371, 0.085596, 0.093093, 0.112390, 0.144040, 0.209730", \ + "0.084346, 0.087763, 0.090939, 0.098445, 0.117810, 0.149330, 0.211760", \ + "0.097264, 0.100990, 0.104410, 0.112000, 0.131230, 0.162950, 0.225190", \ + "0.113090, 0.116980, 0.120480, 0.127780, 0.147700, 0.180880, 0.239500", \ + "0.135460, 0.139220, 0.142470, 0.150060, 0.169230, 0.200360, 0.262760" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.066919, 0.071151, 0.074751, 0.082322, 0.101295, 0.132425, 0.197025", \ + "0.067315, 0.071339, 0.074679, 0.082046, 0.102215, 0.134105, 0.195265", \ + "0.071498, 0.074936, 0.078161, 0.085658, 0.104955, 0.136605, 0.202295", \ + "0.076911, 0.080328, 0.083504, 0.091010, 0.110375, 0.141895, 0.204325", \ + "0.089829, 0.093555, 0.096975, 0.104565, 0.123795, 0.155515, 0.217755", \ + "0.105655, 0.109545, 0.113045, 0.120345, 0.140265, 0.173445, 0.232065", \ + "0.128025, 0.131785, 0.135035, 0.142625, 0.161795, 0.192925, 0.255325" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.077755, 0.082467, 0.086772, 0.096041, 0.124450, 0.170550, 0.266080", \ + "0.079502, 0.083764, 0.087923, 0.097638, 0.125570, 0.174270, 0.266550", \ + "0.082250, 0.087017, 0.091081, 0.100770, 0.129720, 0.175630, 0.265560", \ + "0.089540, 0.093457, 0.097542, 0.107220, 0.134650, 0.182380, 0.275380", \ + "0.101150, 0.105840, 0.109740, 0.119490, 0.147090, 0.194030, 0.284420", \ + "0.122420, 0.127040, 0.130940, 0.140460, 0.167980, 0.215680, 0.308220", \ + "0.154650, 0.159420, 0.163390, 0.172890, 0.200540, 0.246820, 0.342410" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069980, 0.074691, 0.078996, 0.088265, 0.116675, 0.162775, 0.258304", \ + "0.071726, 0.075989, 0.080147, 0.089862, 0.117794, 0.166495, 0.258775", \ + "0.074474, 0.079241, 0.083305, 0.092994, 0.121944, 0.167855, 0.257785", \ + "0.081764, 0.085681, 0.089766, 0.099444, 0.126875, 0.174604, 0.267605", \ + "0.093374, 0.098064, 0.101964, 0.111714, 0.139315, 0.186255, 0.276645", \ + "0.114644, 0.119264, 0.123164, 0.132685, 0.160204, 0.207905, 0.300445", \ + "0.146875, 0.151645, 0.155615, 0.165114, 0.192765, 0.239045, 0.334635" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.075234, 0.079321, 0.082633, 0.089974, 0.109340, 0.141740, 0.206660", \ + "0.075616, 0.079652, 0.083012, 0.090375, 0.109640, 0.142200, 0.204380", \ + "0.078831, 0.082825, 0.086198, 0.094040, 0.113030, 0.144080, 0.208900", \ + "0.085057, 0.088980, 0.092364, 0.099659, 0.118710, 0.149790, 0.214040", \ + "0.096931, 0.100760, 0.104230, 0.111650, 0.130950, 0.162390, 0.225570", \ + "0.113930, 0.117690, 0.120950, 0.128270, 0.147580, 0.178350, 0.243250", \ + "0.136560, 0.140450, 0.143710, 0.151250, 0.170330, 0.201940, 0.264250" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.067711, 0.071798, 0.075110, 0.082451, 0.101817, 0.134217, 0.199137", \ + "0.068093, 0.072129, 0.075489, 0.082852, 0.102117, 0.134677, 0.196857", \ + "0.071308, 0.075302, 0.078675, 0.086517, 0.105507, 0.136557, 0.201377", \ + "0.077534, 0.081457, 0.084841, 0.092136, 0.111187, 0.142267, 0.206517", \ + "0.089408, 0.093237, 0.096707, 0.104127, 0.123427, 0.154867, 0.218047", \ + "0.106407, 0.110167, 0.113427, 0.120747, 0.140057, 0.170827, 0.235727", \ + "0.129037, 0.132927, 0.136187, 0.143727, 0.162807, 0.194417, 0.256727" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.077264, 0.081550, 0.085738, 0.095431, 0.123360, 0.172280, 0.263650", \ + "0.077882, 0.082652, 0.087047, 0.096344, 0.124780, 0.172110, 0.262590", \ + "0.081033, 0.085633, 0.089650, 0.099270, 0.126570, 0.174830, 0.266390", \ + "0.087553, 0.092232, 0.096330, 0.105810, 0.133490, 0.181070, 0.275930", \ + "0.100230, 0.104840, 0.108670, 0.118490, 0.145740, 0.193970, 0.289160", \ + "0.121900, 0.126550, 0.130410, 0.140160, 0.167960, 0.216570, 0.310680", \ + "0.155280, 0.160100, 0.164260, 0.173710, 0.200950, 0.247950, 0.341160" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069538, 0.073824, 0.078012, 0.087705, 0.115634, 0.164554, 0.255924", \ + "0.070156, 0.074926, 0.079321, 0.088618, 0.117054, 0.164384, 0.254864", \ + "0.073307, 0.077907, 0.081924, 0.091544, 0.118844, 0.167104, 0.258664", \ + "0.079827, 0.084506, 0.088604, 0.098084, 0.125764, 0.173344, 0.268204", \ + "0.092504, 0.097114, 0.100944, 0.110764, 0.138014, 0.186244, 0.281434", \ + "0.114174, 0.118824, 0.122684, 0.132434, 0.160234, 0.208844, 0.302954", \ + "0.147554, 0.152374, 0.156534, 0.165984, 0.193224, 0.240224, 0.333434" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENB&CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.113580, 0.117140, 0.120490, 0.127800, 0.147050, 0.177900, 0.239380", \ + "0.114610, 0.118170, 0.121520, 0.128830, 0.148080, 0.178930, 0.240410", \ + "0.117330, 0.120890, 0.124240, 0.131550, 0.150800, 0.181650, 0.243130", \ + "0.124190, 0.127750, 0.131100, 0.138410, 0.157660, 0.188510, 0.249990", \ + "0.134370, 0.137930, 0.141280, 0.148590, 0.167840, 0.198690, 0.260170", \ + "0.146960, 0.150520, 0.153870, 0.161180, 0.180430, 0.211280, 0.272760", \ + "0.167020, 0.170580, 0.173930, 0.181240, 0.200490, 0.231340, 0.292820" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.102222, 0.105782, 0.109132, 0.116442, 0.135692, 0.166542, 0.228022", \ + "0.103252, 0.106812, 0.110162, 0.117472, 0.136722, 0.167572, 0.229052", \ + "0.105972, 0.109532, 0.112882, 0.120192, 0.139442, 0.170292, 0.231772", \ + "0.112832, 0.116392, 0.119742, 0.127052, 0.146302, 0.177152, 0.238632", \ + "0.123012, 0.126572, 0.129922, 0.137232, 0.156482, 0.187332, 0.248812", \ + "0.135602, 0.139162, 0.142512, 0.149822, 0.169072, 0.199922, 0.261402", \ + "0.155662, 0.159222, 0.162572, 0.169882, 0.189132, 0.219982, 0.281462" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123610, 0.128720, 0.132830, 0.142550, 0.170460, 0.215470, 0.308740", \ + "0.124710, 0.129820, 0.133930, 0.143650, 0.171560, 0.216570, 0.309840", \ + "0.128530, 0.133640, 0.137750, 0.147470, 0.175380, 0.220390, 0.313660", \ + "0.134750, 0.139860, 0.143970, 0.153690, 0.181600, 0.226610, 0.319880", \ + "0.146900, 0.152010, 0.156120, 0.165840, 0.193750, 0.238760, 0.332030", \ + "0.160460, 0.165570, 0.169680, 0.179400, 0.207310, 0.252320, 0.345590", \ + "0.183760, 0.188870, 0.192980, 0.202700, 0.230610, 0.275620, 0.368890" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111249, 0.116359, 0.120469, 0.130189, 0.158099, 0.203109, 0.296379", \ + "0.112349, 0.117459, 0.121569, 0.131289, 0.159199, 0.204209, 0.297479", \ + "0.116169, 0.121279, 0.125389, 0.135109, 0.163019, 0.208029, 0.301299", \ + "0.122389, 0.127499, 0.131609, 0.141329, 0.169239, 0.214249, 0.307519", \ + "0.134539, 0.139649, 0.143759, 0.153479, 0.181389, 0.226399, 0.319669", \ + "0.148099, 0.153209, 0.157319, 0.167039, 0.194949, 0.239959, 0.333229", \ + "0.171399, 0.176509, 0.180619, 0.190339, 0.218249, 0.263259, 0.356529" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENB&!CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.241160, 0.245990, 0.250340, 0.259970, 0.287520, 0.334340, 0.426350", \ + "0.241950, 0.246780, 0.251130, 0.260760, 0.288310, 0.335130, 0.427140", \ + "0.246070, 0.250900, 0.255250, 0.264880, 0.292430, 0.339250, 0.431260", \ + "0.251590, 0.256420, 0.260770, 0.270400, 0.297950, 0.344770, 0.436780", \ + "0.263510, 0.268340, 0.272690, 0.282320, 0.309870, 0.356690, 0.448700", \ + "0.276450, 0.281280, 0.285630, 0.295260, 0.322810, 0.369630, 0.461640", \ + "0.296380, 0.301210, 0.305560, 0.315190, 0.342740, 0.389560, 0.481570" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217044, 0.221874, 0.226224, 0.235854, 0.263404, 0.310224, 0.402234", \ + "0.217834, 0.222664, 0.227014, 0.236644, 0.264194, 0.311014, 0.403024", \ + "0.221954, 0.226784, 0.231134, 0.240764, 0.268314, 0.315134, 0.407144", \ + "0.227474, 0.232304, 0.236654, 0.246284, 0.273834, 0.320654, 0.412664", \ + "0.239394, 0.244224, 0.248574, 0.258204, 0.285754, 0.332574, 0.424584", \ + "0.252334, 0.257164, 0.261514, 0.271144, 0.298694, 0.345514, 0.437524", \ + "0.272264, 0.277094, 0.281444, 0.291074, 0.318624, 0.365444, 0.457454" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212900, 0.216790, 0.220180, 0.227350, 0.246540, 0.277380, 0.339800", \ + "0.214410, 0.218300, 0.221690, 0.228860, 0.248050, 0.278890, 0.341310", \ + "0.218300, 0.222190, 0.225580, 0.232750, 0.251940, 0.282780, 0.345200", \ + "0.224120, 0.228010, 0.231400, 0.238570, 0.257760, 0.288600, 0.351020", \ + "0.235820, 0.239710, 0.243100, 0.250270, 0.269460, 0.300300, 0.362720", \ + "0.249630, 0.253520, 0.256910, 0.264080, 0.283270, 0.314110, 0.376530", \ + "0.273630, 0.277520, 0.280910, 0.288080, 0.307270, 0.338110, 0.400530" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.191610, 0.195500, 0.198890, 0.206060, 0.225250, 0.256090, 0.318510", \ + "0.193120, 0.197010, 0.200400, 0.207570, 0.226760, 0.257600, 0.320020", \ + "0.197010, 0.200900, 0.204290, 0.211460, 0.230650, 0.261490, 0.323910", \ + "0.202830, 0.206720, 0.210110, 0.217280, 0.236470, 0.267310, 0.329730", \ + "0.214530, 0.218420, 0.221810, 0.228980, 0.248170, 0.279010, 0.341430", \ + "0.228340, 0.232230, 0.235620, 0.242790, 0.261980, 0.292820, 0.355240", \ + "0.252340, 0.256230, 0.259620, 0.266790, 0.285980, 0.316820, 0.379240" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.108300, 0.111580, 0.115390, 0.122527, 0.141707, 0.172958, 0.233958", \ + "0.109051, 0.112331, 0.116141, 0.123278, 0.142458, 0.173709, 0.234709", \ + "0.112362, 0.115642, 0.119452, 0.126589, 0.145769, 0.177020, 0.238020", \ + "0.117533, 0.120813, 0.124623, 0.131760, 0.150940, 0.182191, 0.243191", \ + "0.128383, 0.131663, 0.135473, 0.142610, 0.161790, 0.193041, 0.254041", \ + "0.142064, 0.145344, 0.149154, 0.156291, 0.175471, 0.206722, 0.267722", \ + "0.163488, 0.166768, 0.170578, 0.177715, 0.196895, 0.228146, 0.289146" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.097470, 0.100750, 0.104560, 0.111697, 0.130877, 0.162128, 0.223128", \ + "0.098221, 0.101501, 0.105311, 0.112448, 0.131628, 0.162879, 0.223879", \ + "0.101532, 0.104812, 0.108622, 0.115759, 0.134939, 0.166190, 0.227190", \ + "0.106703, 0.109983, 0.113793, 0.120930, 0.140110, 0.171361, 0.232361", \ + "0.117553, 0.120833, 0.124643, 0.131780, 0.150960, 0.182211, 0.243211", \ + "0.131234, 0.134514, 0.138324, 0.145461, 0.164641, 0.195892, 0.256892", \ + "0.152658, 0.155938, 0.159748, 0.166885, 0.186065, 0.217316, 0.278316" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.142019, 0.147183, 0.151134, 0.160644, 0.188559, 0.234609, 0.325239", \ + "0.143393, 0.148557, 0.152508, 0.162018, 0.189933, 0.235983, 0.326613", \ + "0.146226, 0.151390, 0.155341, 0.164851, 0.192766, 0.238816, 0.329446", \ + "0.153275, 0.158439, 0.162390, 0.171900, 0.199815, 0.245865, 0.336495", \ + "0.163759, 0.168923, 0.172874, 0.182384, 0.210299, 0.256349, 0.346979", \ + "0.180679, 0.185843, 0.189794, 0.199304, 0.227219, 0.273269, 0.363899", \ + "0.205329, 0.210493, 0.214444, 0.223954, 0.251869, 0.297919, 0.388549" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.127817, 0.132981, 0.136932, 0.146442, 0.174357, 0.220407, 0.311037", \ + "0.129191, 0.134355, 0.138306, 0.147816, 0.175731, 0.221781, 0.312411", \ + "0.132024, 0.137188, 0.141139, 0.150649, 0.178564, 0.224614, 0.315244", \ + "0.139073, 0.144237, 0.148188, 0.157698, 0.185613, 0.231663, 0.322293", \ + "0.149557, 0.154721, 0.158672, 0.168182, 0.196097, 0.242147, 0.332777", \ + "0.166477, 0.171641, 0.175592, 0.185102, 0.213017, 0.259067, 0.349697", \ + "0.191127, 0.196291, 0.200242, 0.209752, 0.237667, 0.283717, 0.374347" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + } + internal_power() { + related_pin : CENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TCENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENB&CENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENB&!CENB"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004818, 0.004822, 0.004827, 0.004832", \ + "0.005570, 0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603", \ + "0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620", \ + "0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620, 0.005626", \ + "0.005972, 0.005978, 0.005984, 0.005990, 0.005996, 0.006002, 0.006008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004742, 0.004746, 0.004751, 0.004756, 0.004761, 0.004765, 0.004770", \ + "0.005440, 0.005445, 0.005451, 0.005456, 0.005462, 0.005467, 0.005473", \ + "0.006200, 0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250", \ + "0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256", \ + "0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256, 0.006263" \ + ); + } + } + } + bus(WENYB) { + bus_type : rf2_32x128_wm1_WENYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : WENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.100510, 0.104500, 0.107510, 0.114450, 0.132620, 0.161080, 0.220620", \ + "0.100300, 0.104180, 0.107660, 0.114650, 0.132650, 0.161830, 0.219450", \ + "0.102920, 0.106990, 0.110300, 0.117400, 0.135340, 0.164530, 0.224330", \ + "0.108700, 0.112580, 0.116050, 0.122990, 0.141040, 0.170240, 0.227720", \ + "0.120200, 0.124370, 0.127670, 0.135090, 0.153290, 0.180730, 0.238810", \ + "0.139660, 0.143590, 0.146950, 0.154000, 0.172040, 0.199480, 0.257960", \ + "0.173990, 0.178040, 0.181470, 0.188410, 0.206850, 0.233560, 0.292130" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090459, 0.094449, 0.097459, 0.104399, 0.122569, 0.151029, 0.210569", \ + "0.090249, 0.094129, 0.097609, 0.104599, 0.122599, 0.151779, 0.209399", \ + "0.092869, 0.096939, 0.100249, 0.107349, 0.125289, 0.154479, 0.214279", \ + "0.098649, 0.102529, 0.105999, 0.112939, 0.130989, 0.160189, 0.217669", \ + "0.110149, 0.114319, 0.117619, 0.125039, 0.143239, 0.170679, 0.228759", \ + "0.129609, 0.133539, 0.136899, 0.143949, 0.161989, 0.189429, 0.247909", \ + "0.163939, 0.167989, 0.171419, 0.178359, 0.196799, 0.223509, 0.282079" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.091518, 0.095969, 0.099799, 0.108240, 0.133060, 0.175350, 0.256760", \ + "0.092124, 0.096578, 0.100640, 0.108980, 0.133410, 0.176900, 0.257340", \ + "0.095919, 0.100790, 0.104330, 0.113100, 0.137940, 0.180130, 0.260840", \ + "0.101840, 0.106020, 0.109960, 0.118780, 0.143020, 0.184890, 0.271480", \ + "0.114370, 0.118740, 0.122580, 0.131410, 0.154410, 0.196690, 0.277500", \ + "0.134310, 0.138600, 0.142490, 0.151070, 0.175660, 0.219050, 0.303750", \ + "0.176020, 0.180210, 0.183540, 0.192350, 0.217420, 0.258310, 0.342170" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.082366, 0.086817, 0.090647, 0.099088, 0.123908, 0.166198, 0.247608", \ + "0.082972, 0.087426, 0.091488, 0.099828, 0.124258, 0.167748, 0.248188", \ + "0.086767, 0.091638, 0.095178, 0.103948, 0.128788, 0.170978, 0.251688", \ + "0.092688, 0.096868, 0.100808, 0.109628, 0.133868, 0.175738, 0.262328", \ + "0.105218, 0.109588, 0.113428, 0.122258, 0.145258, 0.187538, 0.268348", \ + "0.125158, 0.129448, 0.133338, 0.141918, 0.166508, 0.209898, 0.294598", \ + "0.166868, 0.171058, 0.174388, 0.183198, 0.208268, 0.249158, 0.333018" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081" \ + ); + } + } + timing() { + related_pin : TWENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.100170, 0.104020, 0.107030, 0.113830, 0.132130, 0.160380, 0.219910", \ + "0.100370, 0.104160, 0.107640, 0.114710, 0.132750, 0.160600, 0.219460", \ + "0.102730, 0.106830, 0.110110, 0.117650, 0.136670, 0.166230, 0.222240", \ + "0.108140, 0.112110, 0.115580, 0.122590, 0.140600, 0.168590, 0.226590", \ + "0.119990, 0.123750, 0.126830, 0.134120, 0.152210, 0.179960, 0.237670", \ + "0.139750, 0.143710, 0.147080, 0.152690, 0.170690, 0.199600, 0.256810", \ + "0.174090, 0.178250, 0.181580, 0.188570, 0.206770, 0.235150, 0.291890" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090153, 0.094003, 0.097013, 0.103813, 0.122113, 0.150363, 0.209893", \ + "0.090353, 0.094143, 0.097623, 0.104693, 0.122733, 0.150583, 0.209443", \ + "0.092713, 0.096813, 0.100093, 0.107633, 0.126653, 0.156213, 0.212223", \ + "0.098123, 0.102093, 0.105563, 0.112573, 0.130583, 0.158573, 0.216573", \ + "0.109973, 0.113733, 0.116813, 0.124103, 0.142193, 0.169943, 0.227653", \ + "0.129733, 0.133693, 0.137063, 0.142673, 0.160673, 0.189583, 0.246793", \ + "0.164073, 0.168233, 0.171563, 0.178553, 0.196753, 0.225133, 0.281873" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090708, 0.095067, 0.098673, 0.107510, 0.132100, 0.174610, 0.258020", \ + "0.091793, 0.096224, 0.099866, 0.108700, 0.132990, 0.175800, 0.258600", \ + "0.094909, 0.099377, 0.103220, 0.111740, 0.136610, 0.178620, 0.259430", \ + "0.100850, 0.105210, 0.109060, 0.118010, 0.142230, 0.184410, 0.271820", \ + "0.113310, 0.117750, 0.121420, 0.130390, 0.154710, 0.197070, 0.284330", \ + "0.133670, 0.138020, 0.141800, 0.150450, 0.174910, 0.217900, 0.302430", \ + "0.176960, 0.181230, 0.185060, 0.193570, 0.215480, 0.256200, 0.337730" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.081637, 0.085996, 0.089602, 0.098439, 0.123029, 0.165539, 0.248949", \ + "0.082722, 0.087153, 0.090795, 0.099629, 0.123919, 0.166729, 0.249529", \ + "0.085838, 0.090306, 0.094149, 0.102669, 0.127539, 0.169549, 0.250359", \ + "0.091779, 0.096139, 0.099989, 0.108939, 0.133159, 0.175339, 0.262749", \ + "0.104239, 0.108679, 0.112349, 0.121319, 0.145639, 0.187999, 0.275259", \ + "0.124599, 0.128949, 0.132729, 0.141379, 0.165839, 0.208829, 0.293359", \ + "0.167889, 0.172159, 0.175989, 0.184499, 0.206409, 0.247129, 0.328659" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.160613, 0.164391, 0.167761, 0.174746, 0.192588, 0.220590, 0.275120", \ + "0.161805, 0.165583, 0.168953, 0.175938, 0.193780, 0.221782, 0.276312", \ + "0.164371, 0.168149, 0.171519, 0.178504, 0.196346, 0.224348, 0.278878", \ + "0.170297, 0.174075, 0.177445, 0.184430, 0.202272, 0.230274, 0.284804", \ + "0.180846, 0.184624, 0.187994, 0.194979, 0.212821, 0.240823, 0.295353", \ + "0.194390, 0.198168, 0.201538, 0.208523, 0.226365, 0.254367, 0.308897", \ + "0.215270, 0.219048, 0.222418, 0.229403, 0.247245, 0.275247, 0.329777" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.108347, 0.112192, 0.115228, 0.122601, 0.140358, 0.168515, 0.222765", \ + "0.109272, 0.113117, 0.116153, 0.123526, 0.141283, 0.169440, 0.223690", \ + "0.111993, 0.115838, 0.118874, 0.126247, 0.144004, 0.172161, 0.226411", \ + "0.117417, 0.121262, 0.124298, 0.131671, 0.149428, 0.177585, 0.231835", \ + "0.128539, 0.132384, 0.135420, 0.142793, 0.160550, 0.188707, 0.242957", \ + "0.142025, 0.145870, 0.148906, 0.156279, 0.174036, 0.202193, 0.256443", \ + "0.162935, 0.166780, 0.169816, 0.177189, 0.194946, 0.223103, 0.277353" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388", \ + "0.015038, 0.019479, 0.023006, 0.032395, 0.059041, 0.106552, 0.205388" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.178832, 0.183251, 0.187366, 0.196087, 0.220769, 0.261789, 0.343089", \ + "0.179757, 0.184176, 0.188291, 0.197012, 0.221694, 0.262714, 0.344014", \ + "0.182832, 0.187251, 0.191366, 0.200087, 0.224769, 0.265789, 0.347089", \ + "0.189755, 0.194174, 0.198289, 0.207010, 0.231692, 0.272712, 0.354012", \ + "0.201055, 0.205474, 0.209589, 0.218310, 0.242992, 0.284012, 0.365312", \ + "0.216811, 0.221230, 0.225345, 0.234066, 0.258748, 0.299768, 0.381068", \ + "0.241459, 0.245878, 0.249993, 0.258714, 0.283396, 0.324416, 0.405716" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123821, 0.128886, 0.132630, 0.141224, 0.166110, 0.207200, 0.288490", \ + "0.125375, 0.130440, 0.134184, 0.142778, 0.167664, 0.208754, 0.290044", \ + "0.128116, 0.133181, 0.136925, 0.145519, 0.170405, 0.211495, 0.292785", \ + "0.135299, 0.140364, 0.144108, 0.152702, 0.177588, 0.218678, 0.299968", \ + "0.145582, 0.150647, 0.154391, 0.162985, 0.187871, 0.228961, 0.310251", \ + "0.162354, 0.167419, 0.171163, 0.179757, 0.204643, 0.245733, 0.327023", \ + "0.186380, 0.191445, 0.195189, 0.203783, 0.228669, 0.269759, 0.351049" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081", \ + "0.012244, 0.016925, 0.021964, 0.034701, 0.078519, 0.152434, 0.299081" \ + ); + } + } + internal_power() { + related_pin : WENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TWENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004238, 0.004238, 0.004238, 0.004238, 0.004238, 0.004238, 0.004238", \ + "0.004250, 0.004250, 0.004250, 0.004250, 0.004250, 0.004250, 0.004250", \ + "0.004254, 0.004254, 0.004254, 0.004254, 0.004254, 0.004254, 0.004254", \ + "0.004259, 0.004259, 0.004259, 0.004259, 0.004259, 0.004259, 0.004259", \ + "0.004263, 0.004263, 0.004263, 0.004263, 0.004263, 0.004263, 0.004263", \ + "0.004267, 0.004267, 0.004267, 0.004267, 0.004267, 0.004267, 0.004267", \ + "0.004271, 0.004271, 0.004271, 0.004271, 0.004271, 0.004271, 0.004271" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005260, 0.005260, 0.005260, 0.005260, 0.005260, 0.005260, 0.005260", \ + "0.005266, 0.005266, 0.005266, 0.005266, 0.005266, 0.005266, 0.005266", \ + "0.005271, 0.005271, 0.005271, 0.005271, 0.005271, 0.005271, 0.005271", \ + "0.005276, 0.005276, 0.005276, 0.005276, 0.005276, 0.005276, 0.005276", \ + "0.005282, 0.005282, 0.005282, 0.005282, 0.005282, 0.005282, 0.005282", \ + "0.005287, 0.005287, 0.005287, 0.005287, 0.005287, 0.005287, 0.005287", \ + "0.005292, 0.005292, 0.005292, 0.005292, 0.005292, 0.005292, 0.005292" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004818, 0.004822, 0.004827, 0.004832", \ + "0.005570, 0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603", \ + "0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620", \ + "0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620, 0.005626", \ + "0.005972, 0.005978, 0.005984, 0.005990, 0.005996, 0.006002, 0.006008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004742, 0.004746, 0.004751, 0.004756, 0.004761, 0.004765, 0.004770", \ + "0.005440, 0.005445, 0.005451, 0.005456, 0.005462, 0.005467, 0.005473", \ + "0.006200, 0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250", \ + "0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256", \ + "0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256, 0.006263" \ + ); + } + } + pin(WENYB[127]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[127]&WENB[127]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[127] == 1'b0 && WENB[127] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[127]&!WENB[127]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[127] == 1'b1 && WENB[127] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[127]&WENB[127]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[127]&!WENB[127]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[126]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[126]&WENB[126]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[126] == 1'b0 && WENB[126] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[126]&!WENB[126]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[126] == 1'b1 && WENB[126] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[126]&WENB[126]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[126]&!WENB[126]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[125]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[125]&WENB[125]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[125] == 1'b0 && WENB[125] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[125]&!WENB[125]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[125] == 1'b1 && WENB[125] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[125]&WENB[125]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[125]&!WENB[125]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[124]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[124]&WENB[124]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[124] == 1'b0 && WENB[124] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[124]&!WENB[124]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[124] == 1'b1 && WENB[124] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[124]&WENB[124]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[124]&!WENB[124]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[123]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[123]&WENB[123]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[123] == 1'b0 && WENB[123] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[123]&!WENB[123]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[123] == 1'b1 && WENB[123] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[123]&WENB[123]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[123]&!WENB[123]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[122]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[122]&WENB[122]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[122] == 1'b0 && WENB[122] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[122]&!WENB[122]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[122] == 1'b1 && WENB[122] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[122]&WENB[122]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[122]&!WENB[122]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[121]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[121]&WENB[121]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[121] == 1'b0 && WENB[121] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[121]&!WENB[121]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[121] == 1'b1 && WENB[121] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[121]&WENB[121]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[121]&!WENB[121]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[120]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[120]&WENB[120]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[120] == 1'b0 && WENB[120] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[120]&!WENB[120]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[120] == 1'b1 && WENB[120] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[120]&WENB[120]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[120]&!WENB[120]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[119]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[119]&WENB[119]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[119] == 1'b0 && WENB[119] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[119]&!WENB[119]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[119] == 1'b1 && WENB[119] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[119]&WENB[119]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[119]&!WENB[119]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[118]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[118]&WENB[118]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[118] == 1'b0 && WENB[118] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[118]&!WENB[118]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[118] == 1'b1 && WENB[118] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[118]&WENB[118]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[118]&!WENB[118]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[117]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[117]&WENB[117]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[117] == 1'b0 && WENB[117] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[117]&!WENB[117]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[117] == 1'b1 && WENB[117] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[117]&WENB[117]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[117]&!WENB[117]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[116]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[116]&WENB[116]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[116] == 1'b0 && WENB[116] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[116]&!WENB[116]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[116] == 1'b1 && WENB[116] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[116]&WENB[116]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[116]&!WENB[116]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[115]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[115]&WENB[115]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[115] == 1'b0 && WENB[115] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[115]&!WENB[115]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[115] == 1'b1 && WENB[115] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[115]&WENB[115]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[115]&!WENB[115]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[114]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[114]&WENB[114]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[114] == 1'b0 && WENB[114] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[114]&!WENB[114]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[114] == 1'b1 && WENB[114] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[114]&WENB[114]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[114]&!WENB[114]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[113]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[113]&WENB[113]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[113] == 1'b0 && WENB[113] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[113]&!WENB[113]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[113] == 1'b1 && WENB[113] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[113]&WENB[113]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[113]&!WENB[113]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[112]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[112]&WENB[112]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[112] == 1'b0 && WENB[112] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[112]&!WENB[112]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[112] == 1'b1 && WENB[112] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[112]&WENB[112]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[112]&!WENB[112]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[111]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[111]&WENB[111]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[111] == 1'b0 && WENB[111] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[111]&!WENB[111]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[111] == 1'b1 && WENB[111] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[111]&WENB[111]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[111]&!WENB[111]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[110]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[110]&WENB[110]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[110] == 1'b0 && WENB[110] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[110]&!WENB[110]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[110] == 1'b1 && WENB[110] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[110]&WENB[110]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[110]&!WENB[110]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[109]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[109]&WENB[109]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[109] == 1'b0 && WENB[109] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[109]&!WENB[109]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[109] == 1'b1 && WENB[109] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[109]&WENB[109]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[109]&!WENB[109]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[108]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[108]&WENB[108]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[108] == 1'b0 && WENB[108] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[108]&!WENB[108]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[108] == 1'b1 && WENB[108] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[108]&WENB[108]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[108]&!WENB[108]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[107]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[107]&WENB[107]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[107] == 1'b0 && WENB[107] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[107]&!WENB[107]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[107] == 1'b1 && WENB[107] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[107]&WENB[107]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[107]&!WENB[107]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[106]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[106]&WENB[106]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[106] == 1'b0 && WENB[106] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[106]&!WENB[106]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[106] == 1'b1 && WENB[106] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[106]&WENB[106]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[106]&!WENB[106]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[105]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[105]&WENB[105]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[105] == 1'b0 && WENB[105] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[105]&!WENB[105]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[105] == 1'b1 && WENB[105] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[105]&WENB[105]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[105]&!WENB[105]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[104]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[104]&WENB[104]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[104] == 1'b0 && WENB[104] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[104]&!WENB[104]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[104] == 1'b1 && WENB[104] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[104]&WENB[104]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[104]&!WENB[104]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[103]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[103]&WENB[103]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[103] == 1'b0 && WENB[103] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[103]&!WENB[103]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[103] == 1'b1 && WENB[103] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[103]&WENB[103]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[103]&!WENB[103]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[102]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[102]&WENB[102]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[102] == 1'b0 && WENB[102] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[102]&!WENB[102]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[102] == 1'b1 && WENB[102] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[102]&WENB[102]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[102]&!WENB[102]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[101]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[101]&WENB[101]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[101] == 1'b0 && WENB[101] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[101]&!WENB[101]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[101] == 1'b1 && WENB[101] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[101]&WENB[101]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[101]&!WENB[101]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[100]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[100]&WENB[100]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[100] == 1'b0 && WENB[100] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[100]&!WENB[100]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[100] == 1'b1 && WENB[100] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[100]&WENB[100]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[100]&!WENB[100]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[99]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[99]&WENB[99]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[99] == 1'b0 && WENB[99] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[99]&!WENB[99]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[99] == 1'b1 && WENB[99] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[99]&WENB[99]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[99]&!WENB[99]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[98]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[98]&WENB[98]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[98] == 1'b0 && WENB[98] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[98]&!WENB[98]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[98] == 1'b1 && WENB[98] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[98]&WENB[98]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[98]&!WENB[98]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[97]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[97]&WENB[97]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[97] == 1'b0 && WENB[97] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[97]&!WENB[97]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[97] == 1'b1 && WENB[97] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[97]&WENB[97]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[97]&!WENB[97]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[96]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[96]&WENB[96]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[96] == 1'b0 && WENB[96] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[96]&!WENB[96]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[96] == 1'b1 && WENB[96] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[96]&WENB[96]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[96]&!WENB[96]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[95]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[95]&WENB[95]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[95] == 1'b0 && WENB[95] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[95]&!WENB[95]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[95] == 1'b1 && WENB[95] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[95]&WENB[95]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[95]&!WENB[95]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[94]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[94]&WENB[94]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[94] == 1'b0 && WENB[94] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[94]&!WENB[94]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[94] == 1'b1 && WENB[94] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[94]&WENB[94]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[94]&!WENB[94]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[93]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[93]&WENB[93]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[93] == 1'b0 && WENB[93] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[93]&!WENB[93]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[93] == 1'b1 && WENB[93] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[93]&WENB[93]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[93]&!WENB[93]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[92]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[92]&WENB[92]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[92] == 1'b0 && WENB[92] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[92]&!WENB[92]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[92] == 1'b1 && WENB[92] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[92]&WENB[92]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[92]&!WENB[92]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[91]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[91]&WENB[91]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[91] == 1'b0 && WENB[91] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[91]&!WENB[91]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[91] == 1'b1 && WENB[91] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[91]&WENB[91]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[91]&!WENB[91]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[90]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[90]&WENB[90]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[90] == 1'b0 && WENB[90] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[90]&!WENB[90]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[90] == 1'b1 && WENB[90] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[90]&WENB[90]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[90]&!WENB[90]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[89]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[89]&WENB[89]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[89] == 1'b0 && WENB[89] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[89]&!WENB[89]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[89] == 1'b1 && WENB[89] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[89]&WENB[89]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[89]&!WENB[89]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[88]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[88]&WENB[88]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[88] == 1'b0 && WENB[88] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[88]&!WENB[88]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[88] == 1'b1 && WENB[88] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[88]&WENB[88]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[88]&!WENB[88]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[87]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[87]&WENB[87]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[87] == 1'b0 && WENB[87] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[87]&!WENB[87]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[87] == 1'b1 && WENB[87] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[87]&WENB[87]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[87]&!WENB[87]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[86]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[86]&WENB[86]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[86] == 1'b0 && WENB[86] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[86]&!WENB[86]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[86] == 1'b1 && WENB[86] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[86]&WENB[86]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[86]&!WENB[86]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[85]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[85]&WENB[85]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[85] == 1'b0 && WENB[85] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[85]&!WENB[85]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[85] == 1'b1 && WENB[85] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[85]&WENB[85]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[85]&!WENB[85]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[84]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[84]&WENB[84]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[84] == 1'b0 && WENB[84] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[84]&!WENB[84]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[84] == 1'b1 && WENB[84] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[84]&WENB[84]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[84]&!WENB[84]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[83]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[83]&WENB[83]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[83] == 1'b0 && WENB[83] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[83]&!WENB[83]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[83] == 1'b1 && WENB[83] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[83]&WENB[83]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[83]&!WENB[83]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[82]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[82]&WENB[82]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[82] == 1'b0 && WENB[82] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[82]&!WENB[82]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[82] == 1'b1 && WENB[82] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[82]&WENB[82]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[82]&!WENB[82]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[81]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[81]&WENB[81]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[81] == 1'b0 && WENB[81] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[81]&!WENB[81]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[81] == 1'b1 && WENB[81] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[81]&WENB[81]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[81]&!WENB[81]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[80]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[80]&WENB[80]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[80] == 1'b0 && WENB[80] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[80]&!WENB[80]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[80] == 1'b1 && WENB[80] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[80]&WENB[80]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[80]&!WENB[80]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[79]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[79]&WENB[79]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[79] == 1'b0 && WENB[79] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[79]&!WENB[79]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[79] == 1'b1 && WENB[79] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[79]&WENB[79]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[79]&!WENB[79]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[78]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[78]&WENB[78]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[78] == 1'b0 && WENB[78] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[78]&!WENB[78]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[78] == 1'b1 && WENB[78] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[78]&WENB[78]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[78]&!WENB[78]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[77]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[77]&WENB[77]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[77] == 1'b0 && WENB[77] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[77]&!WENB[77]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[77] == 1'b1 && WENB[77] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[77]&WENB[77]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[77]&!WENB[77]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[76]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[76]&WENB[76]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[76] == 1'b0 && WENB[76] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[76]&!WENB[76]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[76] == 1'b1 && WENB[76] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[76]&WENB[76]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[76]&!WENB[76]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[75]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[75]&WENB[75]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[75] == 1'b0 && WENB[75] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[75]&!WENB[75]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[75] == 1'b1 && WENB[75] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[75]&WENB[75]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[75]&!WENB[75]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[74]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[74]&WENB[74]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[74] == 1'b0 && WENB[74] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[74]&!WENB[74]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[74] == 1'b1 && WENB[74] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[74]&WENB[74]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[74]&!WENB[74]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[73]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[73]&WENB[73]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[73] == 1'b0 && WENB[73] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[73]&!WENB[73]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[73] == 1'b1 && WENB[73] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[73]&WENB[73]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[73]&!WENB[73]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[72]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[72]&WENB[72]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[72] == 1'b0 && WENB[72] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[72]&!WENB[72]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[72] == 1'b1 && WENB[72] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[72]&WENB[72]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[72]&!WENB[72]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[71]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[71]&WENB[71]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[71] == 1'b0 && WENB[71] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[71]&!WENB[71]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[71] == 1'b1 && WENB[71] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[71]&WENB[71]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[71]&!WENB[71]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[70]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[70]&WENB[70]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[70] == 1'b0 && WENB[70] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[70]&!WENB[70]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[70] == 1'b1 && WENB[70] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[70]&WENB[70]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[70]&!WENB[70]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[69]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[69]&WENB[69]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[69] == 1'b0 && WENB[69] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[69]&!WENB[69]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[69] == 1'b1 && WENB[69] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[69]&WENB[69]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[69]&!WENB[69]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[68]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[68]&WENB[68]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[68] == 1'b0 && WENB[68] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[68]&!WENB[68]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[68] == 1'b1 && WENB[68] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[68]&WENB[68]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[68]&!WENB[68]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[67]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[67]&WENB[67]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[67] == 1'b0 && WENB[67] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[67]&!WENB[67]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[67] == 1'b1 && WENB[67] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[67]&WENB[67]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[67]&!WENB[67]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[66]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[66]&WENB[66]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[66] == 1'b0 && WENB[66] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[66]&!WENB[66]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[66] == 1'b1 && WENB[66] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[66]&WENB[66]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[66]&!WENB[66]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[65]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[65]&WENB[65]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[65] == 1'b0 && WENB[65] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[65]&!WENB[65]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[65] == 1'b1 && WENB[65] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[65]&WENB[65]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[65]&!WENB[65]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[64]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[64]&WENB[64]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[64] == 1'b0 && WENB[64] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[64]&!WENB[64]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[64] == 1'b1 && WENB[64] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[64]&WENB[64]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[64]&!WENB[64]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[63]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[63]&WENB[63]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[63] == 1'b0 && WENB[63] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[63]&!WENB[63]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[63] == 1'b1 && WENB[63] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[63]&WENB[63]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[63]&!WENB[63]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[62]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[62]&WENB[62]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[62] == 1'b0 && WENB[62] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[62]&!WENB[62]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[62] == 1'b1 && WENB[62] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[62]&WENB[62]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[62]&!WENB[62]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[61]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[61]&WENB[61]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[61] == 1'b0 && WENB[61] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[61]&!WENB[61]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[61] == 1'b1 && WENB[61] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[61]&WENB[61]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[61]&!WENB[61]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[60]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[60]&WENB[60]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[60] == 1'b0 && WENB[60] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[60]&!WENB[60]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[60] == 1'b1 && WENB[60] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[60]&WENB[60]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[60]&!WENB[60]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[59]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[59]&WENB[59]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[59] == 1'b0 && WENB[59] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[59]&!WENB[59]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[59] == 1'b1 && WENB[59] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[59]&WENB[59]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[59]&!WENB[59]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[58]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[58]&WENB[58]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[58] == 1'b0 && WENB[58] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[58]&!WENB[58]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[58] == 1'b1 && WENB[58] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[58]&WENB[58]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[58]&!WENB[58]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[57]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[57]&WENB[57]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[57] == 1'b0 && WENB[57] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[57]&!WENB[57]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[57] == 1'b1 && WENB[57] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[57]&WENB[57]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[57]&!WENB[57]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[56]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[56]&WENB[56]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[56] == 1'b0 && WENB[56] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[56]&!WENB[56]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[56] == 1'b1 && WENB[56] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[56]&WENB[56]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[56]&!WENB[56]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[55]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[55]&WENB[55]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[55] == 1'b0 && WENB[55] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[55]&!WENB[55]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[55] == 1'b1 && WENB[55] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[55]&WENB[55]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[55]&!WENB[55]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[54]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[54]&WENB[54]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[54] == 1'b0 && WENB[54] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[54]&!WENB[54]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[54] == 1'b1 && WENB[54] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[54]&WENB[54]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[54]&!WENB[54]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[53]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[53]&WENB[53]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[53] == 1'b0 && WENB[53] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[53]&!WENB[53]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[53] == 1'b1 && WENB[53] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[53]&WENB[53]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[53]&!WENB[53]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[52]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[52]&WENB[52]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[52] == 1'b0 && WENB[52] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[52]&!WENB[52]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[52] == 1'b1 && WENB[52] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[52]&WENB[52]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[52]&!WENB[52]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[51]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[51]&WENB[51]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[51] == 1'b0 && WENB[51] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[51]&!WENB[51]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[51] == 1'b1 && WENB[51] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[51]&WENB[51]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[51]&!WENB[51]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[50]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[50]&WENB[50]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[50] == 1'b0 && WENB[50] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[50]&!WENB[50]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[50] == 1'b1 && WENB[50] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[50]&WENB[50]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[50]&!WENB[50]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[49]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[49]&WENB[49]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[49] == 1'b0 && WENB[49] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[49]&!WENB[49]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[49] == 1'b1 && WENB[49] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[49]&WENB[49]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[49]&!WENB[49]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[48]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[48]&WENB[48]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[48] == 1'b0 && WENB[48] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[48]&!WENB[48]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[48] == 1'b1 && WENB[48] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[48]&WENB[48]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[48]&!WENB[48]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[47]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[47]&WENB[47]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[47] == 1'b0 && WENB[47] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[47]&!WENB[47]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[47] == 1'b1 && WENB[47] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[47]&WENB[47]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[47]&!WENB[47]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[46]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[46]&WENB[46]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[46] == 1'b0 && WENB[46] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[46]&!WENB[46]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[46] == 1'b1 && WENB[46] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[46]&WENB[46]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[46]&!WENB[46]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[45]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[45]&WENB[45]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[45] == 1'b0 && WENB[45] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[45]&!WENB[45]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[45] == 1'b1 && WENB[45] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[45]&WENB[45]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[45]&!WENB[45]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[44]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[44]&WENB[44]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[44] == 1'b0 && WENB[44] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[44]&!WENB[44]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[44] == 1'b1 && WENB[44] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[44]&WENB[44]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[44]&!WENB[44]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[43]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[43]&WENB[43]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[43] == 1'b0 && WENB[43] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[43]&!WENB[43]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[43] == 1'b1 && WENB[43] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[43]&WENB[43]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[43]&!WENB[43]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[42]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[42]&WENB[42]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[42] == 1'b0 && WENB[42] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[42]&!WENB[42]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[42] == 1'b1 && WENB[42] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[42]&WENB[42]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[42]&!WENB[42]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[41]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[41]&WENB[41]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[41] == 1'b0 && WENB[41] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[41]&!WENB[41]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[41] == 1'b1 && WENB[41] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[41]&WENB[41]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[41]&!WENB[41]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[40]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[40]&WENB[40]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[40] == 1'b0 && WENB[40] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[40]&!WENB[40]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[40] == 1'b1 && WENB[40] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[40]&WENB[40]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[40]&!WENB[40]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[39]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[39]&WENB[39]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[39] == 1'b0 && WENB[39] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[39]&!WENB[39]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[39] == 1'b1 && WENB[39] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[39]&WENB[39]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[39]&!WENB[39]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[38]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[38]&WENB[38]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[38] == 1'b0 && WENB[38] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[38]&!WENB[38]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[38] == 1'b1 && WENB[38] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[38]&WENB[38]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[38]&!WENB[38]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[37]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[37]&WENB[37]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[37] == 1'b0 && WENB[37] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[37]&!WENB[37]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[37] == 1'b1 && WENB[37] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[37]&WENB[37]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[37]&!WENB[37]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[36]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[36]&WENB[36]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[36] == 1'b0 && WENB[36] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[36]&!WENB[36]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[36] == 1'b1 && WENB[36] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[36]&WENB[36]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[36]&!WENB[36]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[35]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[35]&WENB[35]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[35] == 1'b0 && WENB[35] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[35]&!WENB[35]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[35] == 1'b1 && WENB[35] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[35]&WENB[35]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[35]&!WENB[35]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[34]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[34]&WENB[34]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[34] == 1'b0 && WENB[34] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[34]&!WENB[34]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[34] == 1'b1 && WENB[34] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[34]&WENB[34]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[34]&!WENB[34]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[33]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[33]&WENB[33]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[33] == 1'b0 && WENB[33] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[33]&!WENB[33]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[33] == 1'b1 && WENB[33] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[33]&WENB[33]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[33]&!WENB[33]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[32]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[32]&WENB[32]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[32] == 1'b0 && WENB[32] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[32]&!WENB[32]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[32] == 1'b1 && WENB[32] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[32]&WENB[32]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[32]&!WENB[32]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[31]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[31]&WENB[31]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[31] == 1'b0 && WENB[31] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[31]&!WENB[31]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[31] == 1'b1 && WENB[31] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[31]&WENB[31]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[31]&!WENB[31]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[30]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[30]&WENB[30]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[30] == 1'b0 && WENB[30] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[30]&!WENB[30]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[30] == 1'b1 && WENB[30] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[30]&WENB[30]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[30]&!WENB[30]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[29]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[29]&WENB[29]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[29] == 1'b0 && WENB[29] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[29]&!WENB[29]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[29] == 1'b1 && WENB[29] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[29]&WENB[29]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[29]&!WENB[29]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[28]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[28]&WENB[28]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[28] == 1'b0 && WENB[28] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[28]&!WENB[28]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[28] == 1'b1 && WENB[28] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[28]&WENB[28]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[28]&!WENB[28]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[27]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[27]&WENB[27]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[27] == 1'b0 && WENB[27] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[27]&!WENB[27]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[27] == 1'b1 && WENB[27] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[27]&WENB[27]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[27]&!WENB[27]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[26]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[26]&WENB[26]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[26] == 1'b0 && WENB[26] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[26]&!WENB[26]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[26] == 1'b1 && WENB[26] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[26]&WENB[26]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[26]&!WENB[26]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[25]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[25]&WENB[25]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[25] == 1'b0 && WENB[25] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[25]&!WENB[25]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[25] == 1'b1 && WENB[25] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[25]&WENB[25]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[25]&!WENB[25]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[24]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[24]&WENB[24]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[24] == 1'b0 && WENB[24] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[24]&!WENB[24]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[24] == 1'b1 && WENB[24] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[24]&WENB[24]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[24]&!WENB[24]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[23]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[23]&WENB[23]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[23] == 1'b0 && WENB[23] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[23]&!WENB[23]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[23] == 1'b1 && WENB[23] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[23]&WENB[23]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[23]&!WENB[23]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[22]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[22]&WENB[22]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[22] == 1'b0 && WENB[22] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[22]&!WENB[22]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[22] == 1'b1 && WENB[22] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[22]&WENB[22]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[22]&!WENB[22]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[21]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[21]&WENB[21]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[21] == 1'b0 && WENB[21] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[21]&!WENB[21]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[21] == 1'b1 && WENB[21] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[21]&WENB[21]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[21]&!WENB[21]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[20]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[20]&WENB[20]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[20] == 1'b0 && WENB[20] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[20]&!WENB[20]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[20] == 1'b1 && WENB[20] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[20]&WENB[20]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[20]&!WENB[20]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[19]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[19]&WENB[19]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[19] == 1'b0 && WENB[19] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[19]&!WENB[19]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[19] == 1'b1 && WENB[19] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[19]&WENB[19]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[19]&!WENB[19]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[18]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[18]&WENB[18]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[18] == 1'b0 && WENB[18] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[18]&!WENB[18]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[18] == 1'b1 && WENB[18] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[18]&WENB[18]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[18]&!WENB[18]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[17]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[17]&WENB[17]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[17] == 1'b0 && WENB[17] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[17]&!WENB[17]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[17] == 1'b1 && WENB[17] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[17]&WENB[17]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[17]&!WENB[17]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[16]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[16]&WENB[16]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[16] == 1'b0 && WENB[16] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[16]&!WENB[16]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[16] == 1'b1 && WENB[16] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[16]&WENB[16]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[16]&!WENB[16]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[15]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[15]&WENB[15]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[15] == 1'b0 && WENB[15] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[15]&!WENB[15]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[15] == 1'b1 && WENB[15] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[15]&WENB[15]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[15]&!WENB[15]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[14]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[14]&WENB[14]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[14] == 1'b0 && WENB[14] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[14]&!WENB[14]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[14] == 1'b1 && WENB[14] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[14]&WENB[14]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[14]&!WENB[14]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[13]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[13]&WENB[13]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[13] == 1'b0 && WENB[13] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[13]&!WENB[13]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[13] == 1'b1 && WENB[13] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[13]&WENB[13]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[13]&!WENB[13]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[12]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[12]&WENB[12]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[12] == 1'b0 && WENB[12] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[12]&!WENB[12]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[12] == 1'b1 && WENB[12] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[12]&WENB[12]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[12]&!WENB[12]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[11]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[11]&WENB[11]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[11] == 1'b0 && WENB[11] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[11]&!WENB[11]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[11] == 1'b1 && WENB[11] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[11]&WENB[11]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[11]&!WENB[11]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[10]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[10]&WENB[10]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[10] == 1'b0 && WENB[10] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[10]&!WENB[10]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[10] == 1'b1 && WENB[10] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[10]&WENB[10]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[10]&!WENB[10]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[9]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[9]&WENB[9]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[9] == 1'b0 && WENB[9] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[9]&!WENB[9]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[9] == 1'b1 && WENB[9] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[9]&WENB[9]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[9]&!WENB[9]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[8]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[8]&WENB[8]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[8] == 1'b0 && WENB[8] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[8]&!WENB[8]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[8] == 1'b1 && WENB[8] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[8]&WENB[8]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[8]&!WENB[8]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[7]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[7]&WENB[7]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[7] == 1'b0 && WENB[7] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[7]&!WENB[7]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[7] == 1'b1 && WENB[7] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[7]&WENB[7]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[7]&!WENB[7]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[6]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[6]&WENB[6]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[6] == 1'b0 && WENB[6] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[6]&!WENB[6]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[6] == 1'b1 && WENB[6] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[6]&WENB[6]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[6]&!WENB[6]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[5]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[5]&WENB[5]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[5] == 1'b0 && WENB[5] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[5]&!WENB[5]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[5] == 1'b1 && WENB[5] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[5]&WENB[5]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[5]&!WENB[5]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[4]&WENB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[4] == 1'b0 && WENB[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[4]&!WENB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[4] == 1'b1 && WENB[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[4]&WENB[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[4]&!WENB[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[3]&WENB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[3] == 1'b0 && WENB[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[3]&!WENB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[3] == 1'b1 && WENB[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[3]&WENB[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[3]&!WENB[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[2]&WENB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[2] == 1'b0 && WENB[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[2]&!WENB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[2] == 1'b1 && WENB[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[2]&WENB[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[2]&!WENB[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[1]&WENB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[1] == 1'b0 && WENB[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[1]&!WENB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[1] == 1'b1 && WENB[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[1]&WENB[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[1]&!WENB[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + pin(WENYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TWENB[0]&WENB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[0] == 1'b0 && WENB[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.309710, 0.313790, 0.317550, 0.324300, 0.342450, 0.369950, 0.424720", \ + "0.311020, 0.315100, 0.318860, 0.325610, 0.343760, 0.371260, 0.426030", \ + "0.313920, 0.318000, 0.321760, 0.328510, 0.346660, 0.374160, 0.428930", \ + "0.319970, 0.324050, 0.327810, 0.334560, 0.352710, 0.380210, 0.434980", \ + "0.331710, 0.335790, 0.339550, 0.346300, 0.364450, 0.391950, 0.446720", \ + "0.343750, 0.347830, 0.351590, 0.358340, 0.376490, 0.403990, 0.458760", \ + "0.363410, 0.367490, 0.371250, 0.378000, 0.396150, 0.423650, 0.478420" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.233388, 0.237598, 0.240778, 0.247898, 0.265738, 0.293488, 0.348078", \ + "0.234498, 0.238708, 0.241888, 0.249008, 0.266848, 0.294598, 0.349188", \ + "0.237628, 0.241838, 0.245018, 0.252138, 0.269978, 0.297728, 0.352318", \ + "0.243398, 0.247608, 0.250788, 0.257908, 0.275748, 0.303498, 0.358088", \ + "0.255418, 0.259628, 0.262808, 0.269928, 0.287768, 0.315518, 0.370108", \ + "0.267528, 0.271738, 0.274918, 0.282038, 0.299878, 0.327628, 0.382218", \ + "0.286318, 0.290528, 0.293708, 0.300828, 0.318668, 0.346418, 0.401008" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323", \ + "0.015777, 0.019491, 0.022344, 0.031554, 0.057917, 0.106073, 0.206323" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284920, 0.289390, 0.293150, 0.301850, 0.326610, 0.367730, 0.450590", \ + "0.286270, 0.290740, 0.294500, 0.303200, 0.327960, 0.369080, 0.451940", \ + "0.290010, 0.294480, 0.298240, 0.306940, 0.331700, 0.372820, 0.455680", \ + "0.295480, 0.299950, 0.303710, 0.312410, 0.337170, 0.378290, 0.461150", \ + "0.307090, 0.311560, 0.315320, 0.324020, 0.348780, 0.389900, 0.472760", \ + "0.320240, 0.324710, 0.328470, 0.337170, 0.361930, 0.403050, 0.485910", \ + "0.343460, 0.347930, 0.351690, 0.360390, 0.385150, 0.426270, 0.509130" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212121, 0.216541, 0.220271, 0.228921, 0.253871, 0.295001, 0.377781", \ + "0.213121, 0.217541, 0.221271, 0.229921, 0.254871, 0.296001, 0.378781", \ + "0.216771, 0.221191, 0.224921, 0.233571, 0.258521, 0.299651, 0.382431", \ + "0.222481, 0.226901, 0.230631, 0.239281, 0.264231, 0.305361, 0.388141", \ + "0.234331, 0.238751, 0.242481, 0.251131, 0.276081, 0.317211, 0.399991", \ + "0.247351, 0.251771, 0.255501, 0.264151, 0.289101, 0.330231, 0.413011", \ + "0.270231, 0.274651, 0.278381, 0.287031, 0.311981, 0.353111, 0.435891" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847", \ + "0.013359, 0.018040, 0.023106, 0.036140, 0.079308, 0.152799, 0.300847" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TWENB[0]&!WENB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TWENB[0] == 1'b1 && WENB[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.323490, 0.327920, 0.331740, 0.340350, 0.365210, 0.406520, 0.488300", \ + "0.324580, 0.329010, 0.332830, 0.341440, 0.366300, 0.407610, 0.489390", \ + "0.327530, 0.331960, 0.335780, 0.344390, 0.369250, 0.410560, 0.492340", \ + "0.333030, 0.337460, 0.341280, 0.349890, 0.374750, 0.416060, 0.497840", \ + "0.344630, 0.349060, 0.352880, 0.361490, 0.386350, 0.427660, 0.509440", \ + "0.357660, 0.362090, 0.365910, 0.374520, 0.399380, 0.440690, 0.522470", \ + "0.377780, 0.382210, 0.386030, 0.394640, 0.419500, 0.460810, 0.542590" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.234063, 0.238533, 0.242343, 0.250963, 0.275893, 0.316973, 0.399043", \ + "0.234723, 0.239193, 0.243003, 0.251623, 0.276553, 0.317633, 0.399703", \ + "0.238373, 0.242843, 0.246653, 0.255273, 0.280203, 0.321283, 0.403353", \ + "0.244123, 0.248593, 0.252403, 0.261023, 0.285953, 0.327033, 0.409103", \ + "0.255813, 0.260283, 0.264093, 0.272713, 0.297643, 0.338723, 0.420793", \ + "0.268743, 0.273213, 0.277023, 0.285643, 0.310573, 0.351653, 0.433723", \ + "0.288453, 0.292923, 0.296733, 0.305353, 0.330283, 0.371363, 0.453433" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986", \ + "0.012769, 0.017723, 0.022625, 0.035948, 0.079809, 0.152156, 0.300986" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.301340, 0.305450, 0.308770, 0.315840, 0.333860, 0.361860, 0.416140", \ + "0.302930, 0.307040, 0.310360, 0.317430, 0.335450, 0.363450, 0.417730", \ + "0.306080, 0.310190, 0.313510, 0.320580, 0.338600, 0.366600, 0.420880", \ + "0.311900, 0.316010, 0.319330, 0.326400, 0.344420, 0.372420, 0.426700", \ + "0.324360, 0.328470, 0.331790, 0.338860, 0.356880, 0.384880, 0.439160", \ + "0.336910, 0.341020, 0.344340, 0.351410, 0.369430, 0.397430, 0.451710", \ + "0.360820, 0.364930, 0.368250, 0.375320, 0.393340, 0.421340, 0.475620" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.217809, 0.221889, 0.225319, 0.232259, 0.250229, 0.277829, 0.332499", \ + "0.219289, 0.223369, 0.226799, 0.233739, 0.251709, 0.279309, 0.333979", \ + "0.222659, 0.226739, 0.230169, 0.237109, 0.255079, 0.282679, 0.337349", \ + "0.228419, 0.232499, 0.235929, 0.242869, 0.260839, 0.288439, 0.343109", \ + "0.240919, 0.244999, 0.248429, 0.255369, 0.273339, 0.300939, 0.355609", \ + "0.253289, 0.257369, 0.260799, 0.267739, 0.285709, 0.313309, 0.367979", \ + "0.276979, 0.281059, 0.284489, 0.291429, 0.309399, 0.336999, 0.391669" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485", \ + "0.014972, 0.018723, 0.022262, 0.030950, 0.058871, 0.105902, 0.204485" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TWENB[0]&WENB[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TWENB[0]&!WENB[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270, 0.005270", \ + "0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275, 0.005275", \ + "0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280, 0.005280", \ + "0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286, 0.005286", \ + "0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291, 0.005291", \ + "0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296, 0.005296", \ + "0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301, 0.005301" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200, 0.004200", \ + "0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204, 0.004204", \ + "0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208, 0.004208", \ + "0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229, 0.004229", \ + "0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233, 0.004233", \ + "0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237, 0.004237", \ + "0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242, 0.004242" \ + ); + } + } + } + } + bus(AYB) { + bus_type : rf2_32x128_wm1_AYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : AB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069396, 0.072858, 0.075926, 0.082251, 0.097876, 0.123210, 0.177680", \ + "0.070873, 0.074163, 0.076859, 0.083184, 0.099238, 0.124460, 0.178190", \ + "0.073350, 0.077094, 0.080105, 0.085995, 0.103140, 0.129110, 0.179990", \ + "0.078912, 0.082403, 0.085405, 0.091377, 0.107510, 0.132990, 0.187760", \ + "0.091596, 0.095079, 0.097848, 0.103960, 0.120100, 0.145670, 0.199940", \ + "0.108600, 0.112060, 0.114910, 0.121100, 0.136900, 0.162440, 0.213150", \ + "0.139910, 0.143260, 0.146080, 0.152050, 0.168170, 0.193730, 0.246410" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062456, 0.065918, 0.068986, 0.075311, 0.090936, 0.116270, 0.170740", \ + "0.063933, 0.067223, 0.069919, 0.076244, 0.092298, 0.117520, 0.171250", \ + "0.066410, 0.070154, 0.073165, 0.079055, 0.096200, 0.122170, 0.173050", \ + "0.071972, 0.075463, 0.078465, 0.084437, 0.100570, 0.126050, 0.180820", \ + "0.084656, 0.088139, 0.090908, 0.097020, 0.113160, 0.138730, 0.193000", \ + "0.101660, 0.105120, 0.107970, 0.114160, 0.129960, 0.155500, 0.206210", \ + "0.132970, 0.136320, 0.139140, 0.145110, 0.161230, 0.186790, 0.239470" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.060772, 0.064806, 0.068368, 0.076624, 0.099632, 0.140660, 0.219350", \ + "0.061390, 0.065566, 0.069030, 0.077121, 0.100390, 0.140730, 0.219410", \ + "0.064872, 0.068940, 0.072501, 0.080763, 0.103770, 0.144380, 0.224830", \ + "0.071097, 0.075168, 0.078596, 0.086912, 0.109890, 0.150970, 0.229420", \ + "0.083785, 0.087855, 0.091391, 0.099693, 0.122710, 0.163680, 0.242400", \ + "0.101220, 0.105280, 0.108750, 0.116790, 0.140330, 0.178920, 0.258850", \ + "0.139050, 0.143040, 0.146600, 0.154600, 0.177970, 0.216680, 0.293170" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.054695, 0.058729, 0.062291, 0.070547, 0.093555, 0.134583, 0.213273", \ + "0.055313, 0.059489, 0.062953, 0.071044, 0.094313, 0.134653, 0.213333", \ + "0.058795, 0.062863, 0.066424, 0.074686, 0.097693, 0.138303, 0.218753", \ + "0.065020, 0.069091, 0.072519, 0.080835, 0.103813, 0.144893, 0.223343", \ + "0.077708, 0.081778, 0.085314, 0.093616, 0.116633, 0.157603, 0.236323", \ + "0.095143, 0.099203, 0.102673, 0.110713, 0.134253, 0.172843, 0.252773", \ + "0.132973, 0.136963, 0.140523, 0.148523, 0.171893, 0.210603, 0.287093" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + } + timing() { + related_pin : TAB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.072819, 0.075962, 0.078907, 0.085262, 0.101430, 0.126580, 0.180040", \ + "0.073438, 0.076822, 0.079710, 0.086153, 0.101880, 0.128730, 0.180680", \ + "0.076259, 0.079948, 0.082707, 0.088645, 0.105030, 0.131110, 0.183410", \ + "0.082542, 0.085802, 0.088523, 0.094912, 0.110960, 0.137150, 0.188920", \ + "0.093829, 0.097329, 0.100310, 0.106240, 0.122450, 0.147950, 0.202290", \ + "0.112320, 0.115800, 0.118690, 0.124690, 0.141000, 0.166340, 0.220740", \ + "0.142960, 0.146370, 0.149010, 0.154520, 0.170610, 0.196520, 0.249040" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.065537, 0.068680, 0.071625, 0.077980, 0.094148, 0.119298, 0.172758", \ + "0.066156, 0.069540, 0.072428, 0.078871, 0.094598, 0.121448, 0.173398", \ + "0.068977, 0.072666, 0.075425, 0.081363, 0.097748, 0.123828, 0.176128", \ + "0.075260, 0.078520, 0.081241, 0.087630, 0.103678, 0.129868, 0.181638", \ + "0.086547, 0.090047, 0.093028, 0.098958, 0.115168, 0.140668, 0.195008", \ + "0.105038, 0.108518, 0.111408, 0.117408, 0.133718, 0.159058, 0.213458", \ + "0.135678, 0.139088, 0.141728, 0.147238, 0.163328, 0.189238, 0.241758" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062520, 0.066785, 0.070303, 0.078412, 0.101590, 0.142410, 0.221390", \ + "0.064132, 0.068059, 0.071688, 0.079685, 0.102760, 0.141270, 0.223660", \ + "0.066331, 0.070585, 0.074068, 0.082115, 0.105780, 0.146500, 0.224920", \ + "0.072453, 0.076384, 0.080042, 0.088035, 0.111080, 0.149600, 0.231990", \ + "0.085276, 0.089153, 0.092701, 0.101010, 0.124040, 0.165110, 0.246740", \ + "0.102830, 0.106860, 0.110400, 0.118440, 0.141750, 0.180160, 0.259810", \ + "0.140650, 0.144630, 0.148220, 0.156250, 0.179570, 0.216010, 0.294270" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056268, 0.060533, 0.064051, 0.072160, 0.095338, 0.136158, 0.215138", \ + "0.057880, 0.061807, 0.065436, 0.073433, 0.096508, 0.135018, 0.217408", \ + "0.060079, 0.064333, 0.067816, 0.075863, 0.099528, 0.140248, 0.218668", \ + "0.066201, 0.070132, 0.073790, 0.081783, 0.104828, 0.143348, 0.225738", \ + "0.079024, 0.082901, 0.086449, 0.094758, 0.117788, 0.158858, 0.240488", \ + "0.096578, 0.100608, 0.104148, 0.112188, 0.135498, 0.173908, 0.253558", \ + "0.134398, 0.138378, 0.141968, 0.149998, 0.173318, 0.209758, 0.288018" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.106338, 0.109469, 0.112547, 0.118788, 0.135340, 0.161595, 0.214065", \ + "0.107311, 0.110442, 0.113520, 0.119761, 0.136313, 0.162568, 0.215038", \ + "0.110123, 0.113254, 0.116332, 0.122573, 0.139125, 0.165380, 0.217850", \ + "0.115860, 0.118991, 0.122069, 0.128310, 0.144862, 0.171117, 0.223587", \ + "0.126321, 0.129452, 0.132530, 0.138771, 0.155323, 0.181578, 0.234048", \ + "0.139350, 0.142481, 0.145559, 0.151800, 0.168352, 0.194607, 0.247077", \ + "0.160045, 0.163176, 0.166254, 0.172495, 0.189047, 0.215302, 0.267772" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090977, 0.094233, 0.097274, 0.103489, 0.119368, 0.144437, 0.194527", \ + "0.091977, 0.095233, 0.098274, 0.104489, 0.120368, 0.145437, 0.195527", \ + "0.094781, 0.098037, 0.101078, 0.107293, 0.123172, 0.148241, 0.198331", \ + "0.100519, 0.103775, 0.106816, 0.113031, 0.128910, 0.153979, 0.204069", \ + "0.110991, 0.114247, 0.117288, 0.123503, 0.139382, 0.164451, 0.214541", \ + "0.124004, 0.127260, 0.130301, 0.136516, 0.152395, 0.177464, 0.227554", \ + "0.144687, 0.147943, 0.150984, 0.157199, 0.173078, 0.198147, 0.248237" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138750, 0.143122, 0.146967, 0.155253, 0.178921, 0.218360, 0.296600", \ + "0.139605, 0.143977, 0.147822, 0.156108, 0.179776, 0.219215, 0.297455", \ + "0.143076, 0.147448, 0.151293, 0.159579, 0.183247, 0.222686, 0.300926", \ + "0.149667, 0.154039, 0.157884, 0.166170, 0.189838, 0.229277, 0.307517", \ + "0.161431, 0.165803, 0.169648, 0.177934, 0.201602, 0.241041, 0.319281", \ + "0.176638, 0.181010, 0.184855, 0.193141, 0.216809, 0.256248, 0.334488", \ + "0.200670, 0.205042, 0.208887, 0.217173, 0.240841, 0.280280, 0.358520" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.117622, 0.121819, 0.125582, 0.133674, 0.156799, 0.195353, 0.271853", \ + "0.118442, 0.122639, 0.126402, 0.134494, 0.157619, 0.196173, 0.272673", \ + "0.121950, 0.126147, 0.129910, 0.138002, 0.161127, 0.199681, 0.276181", \ + "0.128529, 0.132726, 0.136489, 0.144581, 0.167706, 0.206260, 0.282760", \ + "0.140286, 0.144483, 0.148246, 0.156338, 0.179463, 0.218017, 0.294517", \ + "0.155489, 0.159686, 0.163449, 0.171541, 0.194666, 0.233220, 0.309720", \ + "0.179533, 0.183730, 0.187493, 0.195585, 0.218710, 0.257264, 0.333764" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + } + internal_power() { + related_pin : AB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TAB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004818, 0.004822, 0.004827, 0.004832", \ + "0.005570, 0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603", \ + "0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620", \ + "0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620, 0.005626", \ + "0.005972, 0.005978, 0.005984, 0.005990, 0.005996, 0.006002, 0.006008" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004742, 0.004746, 0.004751, 0.004756, 0.004761, 0.004765, 0.004770", \ + "0.005440, 0.005445, 0.005451, 0.005456, 0.005462, 0.005467, 0.005473", \ + "0.006200, 0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250", \ + "0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256", \ + "0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256, 0.006263" \ + ); + } + } + pin(AYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.244870, 0.248490, 0.251220, 0.257880, 0.274330, 0.300670, 0.353000", \ + "0.245880, 0.249500, 0.252230, 0.258890, 0.275340, 0.301680, 0.354010", \ + "0.249680, 0.253300, 0.256030, 0.262690, 0.279140, 0.305480, 0.357810", \ + "0.254350, 0.257970, 0.260700, 0.267360, 0.283810, 0.310150, 0.362480", \ + "0.266540, 0.270160, 0.272890, 0.279550, 0.296000, 0.322340, 0.374670", \ + "0.278680, 0.282300, 0.285030, 0.291690, 0.308140, 0.334480, 0.386810", \ + "0.298710, 0.302330, 0.305060, 0.311720, 0.328170, 0.354510, 0.406840" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218313, 0.221773, 0.224393, 0.230683, 0.246333, 0.271403, 0.321223", \ + "0.219263, 0.222723, 0.225343, 0.231633, 0.247283, 0.272353, 0.322173", \ + "0.223153, 0.226613, 0.229233, 0.235523, 0.251173, 0.276243, 0.326063", \ + "0.227793, 0.231253, 0.233873, 0.240163, 0.255813, 0.280883, 0.330703", \ + "0.240013, 0.243473, 0.246093, 0.252383, 0.268033, 0.293103, 0.342923", \ + "0.252123, 0.255583, 0.258203, 0.264493, 0.280143, 0.305213, 0.355033", \ + "0.272133, 0.275593, 0.278213, 0.284503, 0.300153, 0.325223, 0.375043" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.211550, 0.215960, 0.219690, 0.228010, 0.251780, 0.291110, 0.369810", \ + "0.212610, 0.217020, 0.220750, 0.229070, 0.252840, 0.292170, 0.370870", \ + "0.216380, 0.220790, 0.224520, 0.232840, 0.256610, 0.295940, 0.374640", \ + "0.222050, 0.226460, 0.230190, 0.238510, 0.262280, 0.301610, 0.380310", \ + "0.233540, 0.237950, 0.241680, 0.250000, 0.273770, 0.313100, 0.391800", \ + "0.246860, 0.251270, 0.255000, 0.263320, 0.287090, 0.326420, 0.405120", \ + "0.269480, 0.273890, 0.277620, 0.285940, 0.309710, 0.349040, 0.427740" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.187029, 0.191159, 0.194689, 0.202709, 0.225879, 0.264399, 0.341319", \ + "0.188109, 0.192239, 0.195769, 0.203789, 0.226959, 0.265479, 0.342399", \ + "0.191679, 0.195809, 0.199339, 0.207359, 0.230529, 0.269049, 0.345969", \ + "0.197439, 0.201569, 0.205099, 0.213119, 0.236289, 0.274809, 0.351729", \ + "0.208899, 0.213029, 0.216559, 0.224579, 0.247749, 0.286269, 0.363189", \ + "0.222319, 0.226449, 0.229979, 0.237999, 0.261169, 0.299689, 0.376609", \ + "0.244929, 0.249059, 0.252589, 0.260609, 0.283779, 0.322299, 0.399219" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.241550, 0.245890, 0.249600, 0.257970, 0.281810, 0.321140, 0.399790", \ + "0.242970, 0.247310, 0.251020, 0.259390, 0.283230, 0.322560, 0.401210", \ + "0.245780, 0.250120, 0.253830, 0.262200, 0.286040, 0.325370, 0.404020", \ + "0.251220, 0.255560, 0.259270, 0.267640, 0.291480, 0.330810, 0.409460", \ + "0.262740, 0.267080, 0.270790, 0.279160, 0.303000, 0.342330, 0.420980", \ + "0.275850, 0.280190, 0.283900, 0.292270, 0.316110, 0.355440, 0.434090", \ + "0.295970, 0.300310, 0.304020, 0.312390, 0.336230, 0.375560, 0.454210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212643, 0.216803, 0.220323, 0.228273, 0.251463, 0.289963, 0.366933", \ + "0.214093, 0.218253, 0.221773, 0.229723, 0.252913, 0.291413, 0.368383", \ + "0.216883, 0.221043, 0.224563, 0.232513, 0.255703, 0.294203, 0.371173", \ + "0.222243, 0.226403, 0.229923, 0.237873, 0.261063, 0.299563, 0.376533", \ + "0.233913, 0.238073, 0.241593, 0.249543, 0.272733, 0.311233, 0.388203", \ + "0.246813, 0.250973, 0.254493, 0.262443, 0.285633, 0.324133, 0.401103", \ + "0.267003, 0.271163, 0.274683, 0.282633, 0.305823, 0.344323, 0.421293" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.226120, 0.229700, 0.232680, 0.239120, 0.255800, 0.282150, 0.334430", \ + "0.227780, 0.231360, 0.234340, 0.240780, 0.257460, 0.283810, 0.336090", \ + "0.231160, 0.234740, 0.237720, 0.244160, 0.260840, 0.287190, 0.339470", \ + "0.236490, 0.240070, 0.243050, 0.249490, 0.266170, 0.292520, 0.344800", \ + "0.249070, 0.252650, 0.255630, 0.262070, 0.278750, 0.305100, 0.357380", \ + "0.261620, 0.265200, 0.268180, 0.274620, 0.291300, 0.317650, 0.369930", \ + "0.284540, 0.288120, 0.291100, 0.297540, 0.314220, 0.340570, 0.392850" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.201078, 0.204518, 0.207368, 0.213468, 0.229328, 0.254418, 0.304268", \ + "0.202828, 0.206268, 0.209118, 0.215218, 0.231078, 0.256168, 0.306018", \ + "0.206228, 0.209668, 0.212518, 0.218618, 0.234478, 0.259568, 0.309418", \ + "0.211508, 0.214948, 0.217798, 0.223898, 0.239758, 0.264848, 0.314698", \ + "0.224108, 0.227548, 0.230398, 0.236498, 0.252358, 0.277448, 0.327298", \ + "0.236598, 0.240038, 0.242888, 0.248988, 0.264848, 0.289938, 0.339788", \ + "0.259518, 0.262958, 0.265808, 0.271908, 0.287768, 0.312858, 0.362708" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + pin(AYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.244870, 0.248490, 0.251220, 0.257880, 0.274330, 0.300670, 0.353000", \ + "0.245880, 0.249500, 0.252230, 0.258890, 0.275340, 0.301680, 0.354010", \ + "0.249680, 0.253300, 0.256030, 0.262690, 0.279140, 0.305480, 0.357810", \ + "0.254350, 0.257970, 0.260700, 0.267360, 0.283810, 0.310150, 0.362480", \ + "0.266540, 0.270160, 0.272890, 0.279550, 0.296000, 0.322340, 0.374670", \ + "0.278680, 0.282300, 0.285030, 0.291690, 0.308140, 0.334480, 0.386810", \ + "0.298710, 0.302330, 0.305060, 0.311720, 0.328170, 0.354510, 0.406840" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218313, 0.221773, 0.224393, 0.230683, 0.246333, 0.271403, 0.321223", \ + "0.219263, 0.222723, 0.225343, 0.231633, 0.247283, 0.272353, 0.322173", \ + "0.223153, 0.226613, 0.229233, 0.235523, 0.251173, 0.276243, 0.326063", \ + "0.227793, 0.231253, 0.233873, 0.240163, 0.255813, 0.280883, 0.330703", \ + "0.240013, 0.243473, 0.246093, 0.252383, 0.268033, 0.293103, 0.342923", \ + "0.252123, 0.255583, 0.258203, 0.264493, 0.280143, 0.305213, 0.355033", \ + "0.272133, 0.275593, 0.278213, 0.284503, 0.300153, 0.325223, 0.375043" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.211550, 0.215960, 0.219690, 0.228010, 0.251780, 0.291110, 0.369810", \ + "0.212610, 0.217020, 0.220750, 0.229070, 0.252840, 0.292170, 0.370870", \ + "0.216380, 0.220790, 0.224520, 0.232840, 0.256610, 0.295940, 0.374640", \ + "0.222050, 0.226460, 0.230190, 0.238510, 0.262280, 0.301610, 0.380310", \ + "0.233540, 0.237950, 0.241680, 0.250000, 0.273770, 0.313100, 0.391800", \ + "0.246860, 0.251270, 0.255000, 0.263320, 0.287090, 0.326420, 0.405120", \ + "0.269480, 0.273890, 0.277620, 0.285940, 0.309710, 0.349040, 0.427740" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.187029, 0.191159, 0.194689, 0.202709, 0.225879, 0.264399, 0.341319", \ + "0.188109, 0.192239, 0.195769, 0.203789, 0.226959, 0.265479, 0.342399", \ + "0.191679, 0.195809, 0.199339, 0.207359, 0.230529, 0.269049, 0.345969", \ + "0.197439, 0.201569, 0.205099, 0.213119, 0.236289, 0.274809, 0.351729", \ + "0.208899, 0.213029, 0.216559, 0.224579, 0.247749, 0.286269, 0.363189", \ + "0.222319, 0.226449, 0.229979, 0.237999, 0.261169, 0.299689, 0.376609", \ + "0.244929, 0.249059, 0.252589, 0.260609, 0.283779, 0.322299, 0.399219" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.241550, 0.245890, 0.249600, 0.257970, 0.281810, 0.321140, 0.399790", \ + "0.242970, 0.247310, 0.251020, 0.259390, 0.283230, 0.322560, 0.401210", \ + "0.245780, 0.250120, 0.253830, 0.262200, 0.286040, 0.325370, 0.404020", \ + "0.251220, 0.255560, 0.259270, 0.267640, 0.291480, 0.330810, 0.409460", \ + "0.262740, 0.267080, 0.270790, 0.279160, 0.303000, 0.342330, 0.420980", \ + "0.275850, 0.280190, 0.283900, 0.292270, 0.316110, 0.355440, 0.434090", \ + "0.295970, 0.300310, 0.304020, 0.312390, 0.336230, 0.375560, 0.454210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212643, 0.216803, 0.220323, 0.228273, 0.251463, 0.289963, 0.366933", \ + "0.214093, 0.218253, 0.221773, 0.229723, 0.252913, 0.291413, 0.368383", \ + "0.216883, 0.221043, 0.224563, 0.232513, 0.255703, 0.294203, 0.371173", \ + "0.222243, 0.226403, 0.229923, 0.237873, 0.261063, 0.299563, 0.376533", \ + "0.233913, 0.238073, 0.241593, 0.249543, 0.272733, 0.311233, 0.388203", \ + "0.246813, 0.250973, 0.254493, 0.262443, 0.285633, 0.324133, 0.401103", \ + "0.267003, 0.271163, 0.274683, 0.282633, 0.305823, 0.344323, 0.421293" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.226120, 0.229700, 0.232680, 0.239120, 0.255800, 0.282150, 0.334430", \ + "0.227780, 0.231360, 0.234340, 0.240780, 0.257460, 0.283810, 0.336090", \ + "0.231160, 0.234740, 0.237720, 0.244160, 0.260840, 0.287190, 0.339470", \ + "0.236490, 0.240070, 0.243050, 0.249490, 0.266170, 0.292520, 0.344800", \ + "0.249070, 0.252650, 0.255630, 0.262070, 0.278750, 0.305100, 0.357380", \ + "0.261620, 0.265200, 0.268180, 0.274620, 0.291300, 0.317650, 0.369930", \ + "0.284540, 0.288120, 0.291100, 0.297540, 0.314220, 0.340570, 0.392850" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.201078, 0.204518, 0.207368, 0.213468, 0.229328, 0.254418, 0.304268", \ + "0.202828, 0.206268, 0.209118, 0.215218, 0.231078, 0.256168, 0.306018", \ + "0.206228, 0.209668, 0.212518, 0.218618, 0.234478, 0.259568, 0.309418", \ + "0.211508, 0.214948, 0.217798, 0.223898, 0.239758, 0.264848, 0.314698", \ + "0.224108, 0.227548, 0.230398, 0.236498, 0.252358, 0.277448, 0.327298", \ + "0.236598, 0.240038, 0.242888, 0.248988, 0.264848, 0.289938, 0.339788", \ + "0.259518, 0.262958, 0.265808, 0.271908, 0.287768, 0.312858, 0.362708" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + pin(AYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.244870, 0.248490, 0.251220, 0.257880, 0.274330, 0.300670, 0.353000", \ + "0.245880, 0.249500, 0.252230, 0.258890, 0.275340, 0.301680, 0.354010", \ + "0.249680, 0.253300, 0.256030, 0.262690, 0.279140, 0.305480, 0.357810", \ + "0.254350, 0.257970, 0.260700, 0.267360, 0.283810, 0.310150, 0.362480", \ + "0.266540, 0.270160, 0.272890, 0.279550, 0.296000, 0.322340, 0.374670", \ + "0.278680, 0.282300, 0.285030, 0.291690, 0.308140, 0.334480, 0.386810", \ + "0.298710, 0.302330, 0.305060, 0.311720, 0.328170, 0.354510, 0.406840" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218313, 0.221773, 0.224393, 0.230683, 0.246333, 0.271403, 0.321223", \ + "0.219263, 0.222723, 0.225343, 0.231633, 0.247283, 0.272353, 0.322173", \ + "0.223153, 0.226613, 0.229233, 0.235523, 0.251173, 0.276243, 0.326063", \ + "0.227793, 0.231253, 0.233873, 0.240163, 0.255813, 0.280883, 0.330703", \ + "0.240013, 0.243473, 0.246093, 0.252383, 0.268033, 0.293103, 0.342923", \ + "0.252123, 0.255583, 0.258203, 0.264493, 0.280143, 0.305213, 0.355033", \ + "0.272133, 0.275593, 0.278213, 0.284503, 0.300153, 0.325223, 0.375043" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.211550, 0.215960, 0.219690, 0.228010, 0.251780, 0.291110, 0.369810", \ + "0.212610, 0.217020, 0.220750, 0.229070, 0.252840, 0.292170, 0.370870", \ + "0.216380, 0.220790, 0.224520, 0.232840, 0.256610, 0.295940, 0.374640", \ + "0.222050, 0.226460, 0.230190, 0.238510, 0.262280, 0.301610, 0.380310", \ + "0.233540, 0.237950, 0.241680, 0.250000, 0.273770, 0.313100, 0.391800", \ + "0.246860, 0.251270, 0.255000, 0.263320, 0.287090, 0.326420, 0.405120", \ + "0.269480, 0.273890, 0.277620, 0.285940, 0.309710, 0.349040, 0.427740" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.187029, 0.191159, 0.194689, 0.202709, 0.225879, 0.264399, 0.341319", \ + "0.188109, 0.192239, 0.195769, 0.203789, 0.226959, 0.265479, 0.342399", \ + "0.191679, 0.195809, 0.199339, 0.207359, 0.230529, 0.269049, 0.345969", \ + "0.197439, 0.201569, 0.205099, 0.213119, 0.236289, 0.274809, 0.351729", \ + "0.208899, 0.213029, 0.216559, 0.224579, 0.247749, 0.286269, 0.363189", \ + "0.222319, 0.226449, 0.229979, 0.237999, 0.261169, 0.299689, 0.376609", \ + "0.244929, 0.249059, 0.252589, 0.260609, 0.283779, 0.322299, 0.399219" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.241550, 0.245890, 0.249600, 0.257970, 0.281810, 0.321140, 0.399790", \ + "0.242970, 0.247310, 0.251020, 0.259390, 0.283230, 0.322560, 0.401210", \ + "0.245780, 0.250120, 0.253830, 0.262200, 0.286040, 0.325370, 0.404020", \ + "0.251220, 0.255560, 0.259270, 0.267640, 0.291480, 0.330810, 0.409460", \ + "0.262740, 0.267080, 0.270790, 0.279160, 0.303000, 0.342330, 0.420980", \ + "0.275850, 0.280190, 0.283900, 0.292270, 0.316110, 0.355440, 0.434090", \ + "0.295970, 0.300310, 0.304020, 0.312390, 0.336230, 0.375560, 0.454210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212643, 0.216803, 0.220323, 0.228273, 0.251463, 0.289963, 0.366933", \ + "0.214093, 0.218253, 0.221773, 0.229723, 0.252913, 0.291413, 0.368383", \ + "0.216883, 0.221043, 0.224563, 0.232513, 0.255703, 0.294203, 0.371173", \ + "0.222243, 0.226403, 0.229923, 0.237873, 0.261063, 0.299563, 0.376533", \ + "0.233913, 0.238073, 0.241593, 0.249543, 0.272733, 0.311233, 0.388203", \ + "0.246813, 0.250973, 0.254493, 0.262443, 0.285633, 0.324133, 0.401103", \ + "0.267003, 0.271163, 0.274683, 0.282633, 0.305823, 0.344323, 0.421293" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.226120, 0.229700, 0.232680, 0.239120, 0.255800, 0.282150, 0.334430", \ + "0.227780, 0.231360, 0.234340, 0.240780, 0.257460, 0.283810, 0.336090", \ + "0.231160, 0.234740, 0.237720, 0.244160, 0.260840, 0.287190, 0.339470", \ + "0.236490, 0.240070, 0.243050, 0.249490, 0.266170, 0.292520, 0.344800", \ + "0.249070, 0.252650, 0.255630, 0.262070, 0.278750, 0.305100, 0.357380", \ + "0.261620, 0.265200, 0.268180, 0.274620, 0.291300, 0.317650, 0.369930", \ + "0.284540, 0.288120, 0.291100, 0.297540, 0.314220, 0.340570, 0.392850" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.201078, 0.204518, 0.207368, 0.213468, 0.229328, 0.254418, 0.304268", \ + "0.202828, 0.206268, 0.209118, 0.215218, 0.231078, 0.256168, 0.306018", \ + "0.206228, 0.209668, 0.212518, 0.218618, 0.234478, 0.259568, 0.309418", \ + "0.211508, 0.214948, 0.217798, 0.223898, 0.239758, 0.264848, 0.314698", \ + "0.224108, 0.227548, 0.230398, 0.236498, 0.252358, 0.277448, 0.327298", \ + "0.236598, 0.240038, 0.242888, 0.248988, 0.264848, 0.289938, 0.339788", \ + "0.259518, 0.262958, 0.265808, 0.271908, 0.287768, 0.312858, 0.362708" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + pin(AYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.244870, 0.248490, 0.251220, 0.257880, 0.274330, 0.300670, 0.353000", \ + "0.245880, 0.249500, 0.252230, 0.258890, 0.275340, 0.301680, 0.354010", \ + "0.249680, 0.253300, 0.256030, 0.262690, 0.279140, 0.305480, 0.357810", \ + "0.254350, 0.257970, 0.260700, 0.267360, 0.283810, 0.310150, 0.362480", \ + "0.266540, 0.270160, 0.272890, 0.279550, 0.296000, 0.322340, 0.374670", \ + "0.278680, 0.282300, 0.285030, 0.291690, 0.308140, 0.334480, 0.386810", \ + "0.298710, 0.302330, 0.305060, 0.311720, 0.328170, 0.354510, 0.406840" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218313, 0.221773, 0.224393, 0.230683, 0.246333, 0.271403, 0.321223", \ + "0.219263, 0.222723, 0.225343, 0.231633, 0.247283, 0.272353, 0.322173", \ + "0.223153, 0.226613, 0.229233, 0.235523, 0.251173, 0.276243, 0.326063", \ + "0.227793, 0.231253, 0.233873, 0.240163, 0.255813, 0.280883, 0.330703", \ + "0.240013, 0.243473, 0.246093, 0.252383, 0.268033, 0.293103, 0.342923", \ + "0.252123, 0.255583, 0.258203, 0.264493, 0.280143, 0.305213, 0.355033", \ + "0.272133, 0.275593, 0.278213, 0.284503, 0.300153, 0.325223, 0.375043" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.211550, 0.215960, 0.219690, 0.228010, 0.251780, 0.291110, 0.369810", \ + "0.212610, 0.217020, 0.220750, 0.229070, 0.252840, 0.292170, 0.370870", \ + "0.216380, 0.220790, 0.224520, 0.232840, 0.256610, 0.295940, 0.374640", \ + "0.222050, 0.226460, 0.230190, 0.238510, 0.262280, 0.301610, 0.380310", \ + "0.233540, 0.237950, 0.241680, 0.250000, 0.273770, 0.313100, 0.391800", \ + "0.246860, 0.251270, 0.255000, 0.263320, 0.287090, 0.326420, 0.405120", \ + "0.269480, 0.273890, 0.277620, 0.285940, 0.309710, 0.349040, 0.427740" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.187029, 0.191159, 0.194689, 0.202709, 0.225879, 0.264399, 0.341319", \ + "0.188109, 0.192239, 0.195769, 0.203789, 0.226959, 0.265479, 0.342399", \ + "0.191679, 0.195809, 0.199339, 0.207359, 0.230529, 0.269049, 0.345969", \ + "0.197439, 0.201569, 0.205099, 0.213119, 0.236289, 0.274809, 0.351729", \ + "0.208899, 0.213029, 0.216559, 0.224579, 0.247749, 0.286269, 0.363189", \ + "0.222319, 0.226449, 0.229979, 0.237999, 0.261169, 0.299689, 0.376609", \ + "0.244929, 0.249059, 0.252589, 0.260609, 0.283779, 0.322299, 0.399219" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.241550, 0.245890, 0.249600, 0.257970, 0.281810, 0.321140, 0.399790", \ + "0.242970, 0.247310, 0.251020, 0.259390, 0.283230, 0.322560, 0.401210", \ + "0.245780, 0.250120, 0.253830, 0.262200, 0.286040, 0.325370, 0.404020", \ + "0.251220, 0.255560, 0.259270, 0.267640, 0.291480, 0.330810, 0.409460", \ + "0.262740, 0.267080, 0.270790, 0.279160, 0.303000, 0.342330, 0.420980", \ + "0.275850, 0.280190, 0.283900, 0.292270, 0.316110, 0.355440, 0.434090", \ + "0.295970, 0.300310, 0.304020, 0.312390, 0.336230, 0.375560, 0.454210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212643, 0.216803, 0.220323, 0.228273, 0.251463, 0.289963, 0.366933", \ + "0.214093, 0.218253, 0.221773, 0.229723, 0.252913, 0.291413, 0.368383", \ + "0.216883, 0.221043, 0.224563, 0.232513, 0.255703, 0.294203, 0.371173", \ + "0.222243, 0.226403, 0.229923, 0.237873, 0.261063, 0.299563, 0.376533", \ + "0.233913, 0.238073, 0.241593, 0.249543, 0.272733, 0.311233, 0.388203", \ + "0.246813, 0.250973, 0.254493, 0.262443, 0.285633, 0.324133, 0.401103", \ + "0.267003, 0.271163, 0.274683, 0.282633, 0.305823, 0.344323, 0.421293" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.226120, 0.229700, 0.232680, 0.239120, 0.255800, 0.282150, 0.334430", \ + "0.227780, 0.231360, 0.234340, 0.240780, 0.257460, 0.283810, 0.336090", \ + "0.231160, 0.234740, 0.237720, 0.244160, 0.260840, 0.287190, 0.339470", \ + "0.236490, 0.240070, 0.243050, 0.249490, 0.266170, 0.292520, 0.344800", \ + "0.249070, 0.252650, 0.255630, 0.262070, 0.278750, 0.305100, 0.357380", \ + "0.261620, 0.265200, 0.268180, 0.274620, 0.291300, 0.317650, 0.369930", \ + "0.284540, 0.288120, 0.291100, 0.297540, 0.314220, 0.340570, 0.392850" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.201078, 0.204518, 0.207368, 0.213468, 0.229328, 0.254418, 0.304268", \ + "0.202828, 0.206268, 0.209118, 0.215218, 0.231078, 0.256168, 0.306018", \ + "0.206228, 0.209668, 0.212518, 0.218618, 0.234478, 0.259568, 0.309418", \ + "0.211508, 0.214948, 0.217798, 0.223898, 0.239758, 0.264848, 0.314698", \ + "0.224108, 0.227548, 0.230398, 0.236498, 0.252358, 0.277448, 0.327298", \ + "0.236598, 0.240038, 0.242888, 0.248988, 0.264848, 0.289938, 0.339788", \ + "0.259518, 0.262958, 0.265808, 0.271908, 0.287768, 0.312858, 0.362708" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + pin(AYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.244870, 0.248490, 0.251220, 0.257880, 0.274330, 0.300670, 0.353000", \ + "0.245880, 0.249500, 0.252230, 0.258890, 0.275340, 0.301680, 0.354010", \ + "0.249680, 0.253300, 0.256030, 0.262690, 0.279140, 0.305480, 0.357810", \ + "0.254350, 0.257970, 0.260700, 0.267360, 0.283810, 0.310150, 0.362480", \ + "0.266540, 0.270160, 0.272890, 0.279550, 0.296000, 0.322340, 0.374670", \ + "0.278680, 0.282300, 0.285030, 0.291690, 0.308140, 0.334480, 0.386810", \ + "0.298710, 0.302330, 0.305060, 0.311720, 0.328170, 0.354510, 0.406840" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218313, 0.221773, 0.224393, 0.230683, 0.246333, 0.271403, 0.321223", \ + "0.219263, 0.222723, 0.225343, 0.231633, 0.247283, 0.272353, 0.322173", \ + "0.223153, 0.226613, 0.229233, 0.235523, 0.251173, 0.276243, 0.326063", \ + "0.227793, 0.231253, 0.233873, 0.240163, 0.255813, 0.280883, 0.330703", \ + "0.240013, 0.243473, 0.246093, 0.252383, 0.268033, 0.293103, 0.342923", \ + "0.252123, 0.255583, 0.258203, 0.264493, 0.280143, 0.305213, 0.355033", \ + "0.272133, 0.275593, 0.278213, 0.284503, 0.300153, 0.325223, 0.375043" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.211550, 0.215960, 0.219690, 0.228010, 0.251780, 0.291110, 0.369810", \ + "0.212610, 0.217020, 0.220750, 0.229070, 0.252840, 0.292170, 0.370870", \ + "0.216380, 0.220790, 0.224520, 0.232840, 0.256610, 0.295940, 0.374640", \ + "0.222050, 0.226460, 0.230190, 0.238510, 0.262280, 0.301610, 0.380310", \ + "0.233540, 0.237950, 0.241680, 0.250000, 0.273770, 0.313100, 0.391800", \ + "0.246860, 0.251270, 0.255000, 0.263320, 0.287090, 0.326420, 0.405120", \ + "0.269480, 0.273890, 0.277620, 0.285940, 0.309710, 0.349040, 0.427740" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.187029, 0.191159, 0.194689, 0.202709, 0.225879, 0.264399, 0.341319", \ + "0.188109, 0.192239, 0.195769, 0.203789, 0.226959, 0.265479, 0.342399", \ + "0.191679, 0.195809, 0.199339, 0.207359, 0.230529, 0.269049, 0.345969", \ + "0.197439, 0.201569, 0.205099, 0.213119, 0.236289, 0.274809, 0.351729", \ + "0.208899, 0.213029, 0.216559, 0.224579, 0.247749, 0.286269, 0.363189", \ + "0.222319, 0.226449, 0.229979, 0.237999, 0.261169, 0.299689, 0.376609", \ + "0.244929, 0.249059, 0.252589, 0.260609, 0.283779, 0.322299, 0.399219" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0"; + cell_fall(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.241550, 0.245890, 0.249600, 0.257970, 0.281810, 0.321140, 0.399790", \ + "0.242970, 0.247310, 0.251020, 0.259390, 0.283230, 0.322560, 0.401210", \ + "0.245780, 0.250120, 0.253830, 0.262200, 0.286040, 0.325370, 0.404020", \ + "0.251220, 0.255560, 0.259270, 0.267640, 0.291480, 0.330810, 0.409460", \ + "0.262740, 0.267080, 0.270790, 0.279160, 0.303000, 0.342330, 0.420980", \ + "0.275850, 0.280190, 0.283900, 0.292270, 0.316110, 0.355440, 0.434090", \ + "0.295970, 0.300310, 0.304020, 0.312390, 0.336230, 0.375560, 0.454210" \ + ); + } + retaining_fall(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.212643, 0.216803, 0.220323, 0.228273, 0.251463, 0.289963, 0.366933", \ + "0.214093, 0.218253, 0.221773, 0.229723, 0.252913, 0.291413, 0.368383", \ + "0.216883, 0.221043, 0.224563, 0.232513, 0.255703, 0.294203, 0.371173", \ + "0.222243, 0.226403, 0.229923, 0.237873, 0.261063, 0.299563, 0.376533", \ + "0.233913, 0.238073, 0.241593, 0.249543, 0.272733, 0.311233, 0.388203", \ + "0.246813, 0.250973, 0.254493, 0.262443, 0.285633, 0.324133, 0.401103", \ + "0.267003, 0.271163, 0.274683, 0.282633, 0.305823, 0.344323, 0.421293" \ + ); + } + fall_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x128_wm1_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.226120, 0.229700, 0.232680, 0.239120, 0.255800, 0.282150, 0.334430", \ + "0.227780, 0.231360, 0.234340, 0.240780, 0.257460, 0.283810, 0.336090", \ + "0.231160, 0.234740, 0.237720, 0.244160, 0.260840, 0.287190, 0.339470", \ + "0.236490, 0.240070, 0.243050, 0.249490, 0.266170, 0.292520, 0.344800", \ + "0.249070, 0.252650, 0.255630, 0.262070, 0.278750, 0.305100, 0.357380", \ + "0.261620, 0.265200, 0.268180, 0.274620, 0.291300, 0.317650, 0.369930", \ + "0.284540, 0.288120, 0.291100, 0.297540, 0.314220, 0.340570, 0.392850" \ + ); + } + retaining_rise(rf2_32x128_wm1_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.201078, 0.204518, 0.207368, 0.213468, 0.229328, 0.254418, 0.304268", \ + "0.202828, 0.206268, 0.209118, 0.215218, 0.231078, 0.256168, 0.306018", \ + "0.206228, 0.209668, 0.212518, 0.218618, 0.234478, 0.259568, 0.309418", \ + "0.211508, 0.214948, 0.217798, 0.223898, 0.239758, 0.264848, 0.314698", \ + "0.224108, 0.227548, 0.230398, 0.236498, 0.252358, 0.277448, 0.327298", \ + "0.236598, 0.240038, 0.242888, 0.248988, 0.264848, 0.289938, 0.339788", \ + "0.259518, 0.262958, 0.265808, 0.271908, 0.287768, 0.312858, 0.362708" \ + ); + } + rise_transition(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + fall_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x128_wm1_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + } + bus(QA) { + bus_type : rf2_32x128_wm1_QA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + memory_read() { + address : AA; + } + max_capacitance : 0.300000; + max_transition : 0.361200; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.597620, 0.601760, 0.607650, 0.616760, 0.634760, 0.665820, 0.726830", \ + "0.597850, 0.601990, 0.607880, 0.616990, 0.634990, 0.666050, 0.727060", \ + "0.600030, 0.604170, 0.610060, 0.619170, 0.637170, 0.668230, 0.729240", \ + "0.604780, 0.608920, 0.614810, 0.623920, 0.641920, 0.672980, 0.733990", \ + "0.613800, 0.617940, 0.623830, 0.632940, 0.650940, 0.682000, 0.743010", \ + "0.626340, 0.630480, 0.636370, 0.645480, 0.663480, 0.694540, 0.755550", \ + "0.645580, 0.649720, 0.655610, 0.664720, 0.682720, 0.713780, 0.774790" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.455617, 0.459727, 0.465577, 0.474837, 0.492817, 0.524007, 0.584897", \ + "0.455827, 0.459937, 0.465787, 0.475047, 0.493027, 0.524217, 0.585107", \ + "0.457757, 0.461867, 0.467717, 0.476977, 0.494957, 0.526147, 0.587037", \ + "0.462827, 0.466937, 0.472787, 0.482047, 0.500027, 0.531217, 0.592107", \ + "0.471757, 0.475867, 0.481717, 0.490977, 0.508957, 0.540147, 0.601037", \ + "0.484207, 0.488317, 0.494167, 0.503427, 0.521407, 0.552597, 0.613487", \ + "0.501637, 0.505747, 0.511597, 0.520857, 0.538837, 0.570027, 0.630917" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.578670, 0.583890, 0.590960, 0.601780, 0.623880, 0.663170, 0.740620", \ + "0.578890, 0.584110, 0.591180, 0.602000, 0.624100, 0.663390, 0.740840", \ + "0.581480, 0.586700, 0.593770, 0.604590, 0.626690, 0.665980, 0.743430", \ + "0.586030, 0.591250, 0.598320, 0.609140, 0.631240, 0.670530, 0.747980", \ + "0.594670, 0.599890, 0.606960, 0.617780, 0.639880, 0.679170, 0.756620", \ + "0.606630, 0.611850, 0.618920, 0.629740, 0.651840, 0.691130, 0.768580", \ + "0.626180, 0.631400, 0.638470, 0.649290, 0.671390, 0.710680, 0.788130" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.436662, 0.442002, 0.449062, 0.459912, 0.482272, 0.521532, 0.599372", \ + "0.437322, 0.442662, 0.449722, 0.460572, 0.482932, 0.522192, 0.600032", \ + "0.439322, 0.444662, 0.451722, 0.462572, 0.484932, 0.524192, 0.602032", \ + "0.443902, 0.449242, 0.456302, 0.467152, 0.489512, 0.528772, 0.606612", \ + "0.452972, 0.458312, 0.465372, 0.476222, 0.498582, 0.537842, 0.615682", \ + "0.464782, 0.470122, 0.477182, 0.488032, 0.510392, 0.549652, 0.627492", \ + "0.483642, 0.488982, 0.496042, 0.506892, 0.529252, 0.568512, 0.646352" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.598480, 0.602620, 0.608510, 0.617620, 0.635620, 0.666680, 0.727690", \ + "0.598710, 0.602850, 0.608740, 0.617850, 0.635850, 0.666910, 0.727920", \ + "0.600890, 0.605030, 0.610920, 0.620030, 0.638030, 0.669090, 0.730100", \ + "0.605640, 0.609780, 0.615670, 0.624780, 0.642780, 0.673840, 0.734850", \ + "0.614660, 0.618800, 0.624690, 0.633800, 0.651800, 0.682860, 0.743870", \ + "0.627200, 0.631340, 0.637230, 0.646340, 0.664340, 0.695400, 0.756410", \ + "0.646440, 0.650580, 0.656470, 0.665580, 0.683580, 0.714640, 0.775650" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.456348, 0.460458, 0.466308, 0.475568, 0.493548, 0.524738, 0.585628", \ + "0.456558, 0.460668, 0.466518, 0.475778, 0.493758, 0.524948, 0.585838", \ + "0.458488, 0.462598, 0.468448, 0.477708, 0.495688, 0.526878, 0.587768", \ + "0.463558, 0.467668, 0.473518, 0.482778, 0.500758, 0.531948, 0.592838", \ + "0.472488, 0.476598, 0.482448, 0.491708, 0.509688, 0.540878, 0.601768", \ + "0.484938, 0.489048, 0.494898, 0.504158, 0.522138, 0.553328, 0.614218", \ + "0.502368, 0.506478, 0.512328, 0.521588, 0.539568, 0.570758, 0.631648" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.579530, 0.584750, 0.591820, 0.602640, 0.624740, 0.664030, 0.741480", \ + "0.579750, 0.584970, 0.592040, 0.602860, 0.624960, 0.664250, 0.741700", \ + "0.582340, 0.587560, 0.594630, 0.605450, 0.627550, 0.666840, 0.744290", \ + "0.586890, 0.592110, 0.599180, 0.610000, 0.632100, 0.671390, 0.748840", \ + "0.595530, 0.600750, 0.607820, 0.618640, 0.640740, 0.680030, 0.757480", \ + "0.607490, 0.612710, 0.619780, 0.630600, 0.652700, 0.691990, 0.769440", \ + "0.627040, 0.632260, 0.639330, 0.650150, 0.672250, 0.711540, 0.788990" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.437384, 0.442724, 0.449784, 0.460634, 0.482994, 0.522254, 0.600094", \ + "0.438044, 0.443384, 0.450445, 0.461295, 0.483654, 0.522914, 0.600754", \ + "0.440044, 0.445384, 0.452445, 0.463295, 0.485654, 0.524914, 0.602754", \ + "0.444624, 0.449964, 0.457025, 0.467874, 0.490235, 0.529494, 0.607334", \ + "0.453695, 0.459034, 0.466094, 0.476944, 0.499304, 0.538565, 0.616404", \ + "0.465504, 0.470844, 0.477904, 0.488754, 0.511115, 0.550374, 0.628215", \ + "0.484364, 0.489704, 0.496764, 0.507614, 0.529974, 0.569234, 0.647074" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.602650, 0.606790, 0.612680, 0.621790, 0.639790, 0.670850, 0.731860", \ + "0.602880, 0.607020, 0.612910, 0.622020, 0.640020, 0.671080, 0.732090", \ + "0.605060, 0.609200, 0.615090, 0.624200, 0.642200, 0.673260, 0.734270", \ + "0.609810, 0.613950, 0.619840, 0.628950, 0.646950, 0.678010, 0.739020", \ + "0.618830, 0.622970, 0.628860, 0.637970, 0.655970, 0.687030, 0.748040", \ + "0.631370, 0.635510, 0.641400, 0.650510, 0.668510, 0.699570, 0.760580", \ + "0.650610, 0.654750, 0.660640, 0.669750, 0.687750, 0.718810, 0.779820" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.459893, 0.464002, 0.469853, 0.479113, 0.497092, 0.528282, 0.589172", \ + "0.460102, 0.464212, 0.470063, 0.479322, 0.497302, 0.528493, 0.589382", \ + "0.462032, 0.466142, 0.471993, 0.481252, 0.499232, 0.530423, 0.591312", \ + "0.467102, 0.471213, 0.477062, 0.486322, 0.504302, 0.535492, 0.596383", \ + "0.476032, 0.480142, 0.485993, 0.495252, 0.513232, 0.544423, 0.605312", \ + "0.488482, 0.492592, 0.498442, 0.507702, 0.525683, 0.556872, 0.617762", \ + "0.505912, 0.510023, 0.515872, 0.525133, 0.543112, 0.574302, 0.635193" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.583700, 0.588920, 0.595990, 0.606810, 0.628910, 0.668200, 0.745650", \ + "0.583920, 0.589140, 0.596210, 0.607030, 0.629130, 0.668420, 0.745870", \ + "0.586510, 0.591730, 0.598800, 0.609620, 0.631720, 0.671010, 0.748460", \ + "0.591060, 0.596280, 0.603350, 0.614170, 0.636270, 0.675560, 0.753010", \ + "0.599700, 0.604920, 0.611990, 0.622810, 0.644910, 0.684200, 0.761650", \ + "0.611660, 0.616880, 0.623950, 0.634770, 0.656870, 0.696160, 0.773610", \ + "0.631210, 0.636430, 0.643500, 0.654320, 0.676420, 0.715710, 0.793160" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.440929, 0.446269, 0.453329, 0.464179, 0.486539, 0.525799, 0.603639", \ + "0.441589, 0.446929, 0.453989, 0.464839, 0.487199, 0.526459, 0.604299", \ + "0.443589, 0.448929, 0.455989, 0.466839, 0.489199, 0.528459, 0.606299", \ + "0.448169, 0.453509, 0.460569, 0.471419, 0.493779, 0.533039, 0.610879", \ + "0.457239, 0.462579, 0.469639, 0.480489, 0.502849, 0.542109, 0.619949", \ + "0.469049, 0.474389, 0.481449, 0.492299, 0.514659, 0.553919, 0.631759", \ + "0.487909, 0.493249, 0.500309, 0.511159, 0.533519, 0.572779, 0.650619" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.604990, 0.609130, 0.615020, 0.624130, 0.642130, 0.673190, 0.734200", \ + "0.605220, 0.609360, 0.615250, 0.624360, 0.642360, 0.673420, 0.734430", \ + "0.607400, 0.611540, 0.617430, 0.626540, 0.644540, 0.675600, 0.736610", \ + "0.612150, 0.616290, 0.622180, 0.631290, 0.649290, 0.680350, 0.741360", \ + "0.621170, 0.625310, 0.631200, 0.640310, 0.658310, 0.689370, 0.750380", \ + "0.633710, 0.637850, 0.643740, 0.652850, 0.670850, 0.701910, 0.762920", \ + "0.652950, 0.657090, 0.662980, 0.672090, 0.690090, 0.721150, 0.782160" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.461882, 0.465992, 0.471842, 0.481102, 0.499081, 0.530272, 0.591162", \ + "0.462091, 0.466201, 0.472052, 0.481312, 0.499291, 0.530482, 0.591371", \ + "0.464021, 0.468131, 0.473982, 0.483241, 0.501221, 0.532412, 0.593301", \ + "0.469091, 0.473202, 0.479051, 0.488312, 0.506292, 0.537481, 0.598372", \ + "0.478021, 0.482131, 0.487982, 0.497242, 0.515221, 0.546412, 0.607301", \ + "0.490471, 0.494582, 0.500431, 0.509691, 0.527672, 0.558862, 0.619752", \ + "0.507902, 0.512012, 0.517861, 0.527122, 0.545102, 0.576291, 0.637182" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.586040, 0.591260, 0.598330, 0.609150, 0.631250, 0.670540, 0.747990", \ + "0.586260, 0.591480, 0.598550, 0.609370, 0.631470, 0.670760, 0.748210", \ + "0.588850, 0.594070, 0.601140, 0.611960, 0.634060, 0.673350, 0.750800", \ + "0.593400, 0.598620, 0.605690, 0.616510, 0.638610, 0.677900, 0.755350", \ + "0.602040, 0.607260, 0.614330, 0.625150, 0.647250, 0.686540, 0.763990", \ + "0.614000, 0.619220, 0.626290, 0.637110, 0.659210, 0.698500, 0.775950", \ + "0.633550, 0.638770, 0.645840, 0.656660, 0.678760, 0.718050, 0.795500" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.442926, 0.448266, 0.455327, 0.466176, 0.488536, 0.527797, 0.605637", \ + "0.443586, 0.448926, 0.455986, 0.466836, 0.489196, 0.528456, 0.606297", \ + "0.445586, 0.450926, 0.457986, 0.468836, 0.491196, 0.530456, 0.608297", \ + "0.450166, 0.455506, 0.462566, 0.473416, 0.495776, 0.535037, 0.612877", \ + "0.459236, 0.464577, 0.471636, 0.482486, 0.504847, 0.544106, 0.621947", \ + "0.471046, 0.476386, 0.483446, 0.494296, 0.516656, 0.555917, 0.633756", \ + "0.489906, 0.495246, 0.502307, 0.513157, 0.535517, 0.574777, 0.652617" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.665110, 0.669250, 0.675140, 0.684250, 0.702250, 0.733310, 0.794320", \ + "0.665340, 0.669480, 0.675370, 0.684480, 0.702480, 0.733540, 0.794550", \ + "0.667520, 0.671660, 0.677550, 0.686660, 0.704660, 0.735720, 0.796730", \ + "0.672270, 0.676410, 0.682300, 0.691410, 0.709410, 0.740470, 0.801480", \ + "0.681290, 0.685430, 0.691320, 0.700430, 0.718430, 0.749490, 0.810500", \ + "0.693830, 0.697970, 0.703860, 0.712970, 0.730970, 0.762030, 0.823040", \ + "0.713070, 0.717210, 0.723100, 0.732210, 0.750210, 0.781270, 0.842280" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.512984, 0.517094, 0.522944, 0.532204, 0.550184, 0.581374, 0.642264", \ + "0.513194, 0.517304, 0.523154, 0.532414, 0.550394, 0.581584, 0.642474", \ + "0.515124, 0.519234, 0.525084, 0.534344, 0.552324, 0.583514, 0.644404", \ + "0.520194, 0.524304, 0.530154, 0.539414, 0.557394, 0.588584, 0.649474", \ + "0.529124, 0.533234, 0.539084, 0.548344, 0.566324, 0.597514, 0.658404", \ + "0.541574, 0.545684, 0.551534, 0.560794, 0.578774, 0.609964, 0.670854", \ + "0.559004, 0.563114, 0.568964, 0.578224, 0.596204, 0.627394, 0.688284" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.646160, 0.651380, 0.658450, 0.669270, 0.691370, 0.730660, 0.808110", \ + "0.646380, 0.651600, 0.658670, 0.669490, 0.691590, 0.730880, 0.808330", \ + "0.648970, 0.654190, 0.661260, 0.672080, 0.694180, 0.733470, 0.810920", \ + "0.653520, 0.658740, 0.665810, 0.676630, 0.698730, 0.738020, 0.815470", \ + "0.662160, 0.667380, 0.674450, 0.685270, 0.707370, 0.746660, 0.824110", \ + "0.674120, 0.679340, 0.686410, 0.697230, 0.719330, 0.758620, 0.836070", \ + "0.693670, 0.698890, 0.705960, 0.716780, 0.738880, 0.778170, 0.855620" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.494028, 0.499368, 0.506428, 0.517278, 0.539639, 0.578898, 0.656739", \ + "0.494688, 0.500028, 0.507089, 0.517939, 0.540299, 0.579558, 0.657398", \ + "0.496688, 0.502028, 0.509089, 0.519939, 0.542299, 0.581558, 0.659398", \ + "0.501269, 0.506609, 0.513669, 0.524518, 0.546879, 0.586139, 0.663979", \ + "0.510339, 0.515678, 0.522738, 0.533589, 0.555948, 0.595209, 0.673048", \ + "0.522149, 0.527489, 0.534548, 0.545399, 0.567759, 0.607019, 0.684859", \ + "0.541009, 0.546349, 0.553408, 0.564258, 0.586618, 0.625879, 0.703719" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.714980, 0.719120, 0.725010, 0.734120, 0.752120, 0.783180, 0.844190", \ + "0.715210, 0.719350, 0.725240, 0.734350, 0.752350, 0.783410, 0.844420", \ + "0.717390, 0.721530, 0.727420, 0.736530, 0.754530, 0.785590, 0.846600", \ + "0.722140, 0.726280, 0.732170, 0.741280, 0.759280, 0.790340, 0.851350", \ + "0.731160, 0.735300, 0.741190, 0.750300, 0.768300, 0.799360, 0.860370", \ + "0.743700, 0.747840, 0.753730, 0.762840, 0.780840, 0.811900, 0.872910", \ + "0.762940, 0.767080, 0.772970, 0.782080, 0.800080, 0.831140, 0.892150" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.555373, 0.559483, 0.565333, 0.574593, 0.592573, 0.623763, 0.684653", \ + "0.555583, 0.559693, 0.565543, 0.574803, 0.592783, 0.623973, 0.684863", \ + "0.557513, 0.561623, 0.567473, 0.576733, 0.594713, 0.625903, 0.686793", \ + "0.562583, 0.566693, 0.572543, 0.581803, 0.599783, 0.630973, 0.691863", \ + "0.571513, 0.575623, 0.581473, 0.590733, 0.608713, 0.639903, 0.700793", \ + "0.583963, 0.588073, 0.593923, 0.603183, 0.621163, 0.652353, 0.713243", \ + "0.601393, 0.605503, 0.611353, 0.620613, 0.638593, 0.669783, 0.730673" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.696030, 0.701250, 0.708320, 0.719140, 0.741240, 0.780530, 0.857980", \ + "0.696250, 0.701470, 0.708540, 0.719360, 0.741460, 0.780750, 0.858200", \ + "0.698840, 0.704060, 0.711130, 0.721950, 0.744050, 0.783340, 0.860790", \ + "0.703390, 0.708610, 0.715680, 0.726500, 0.748600, 0.787890, 0.865340", \ + "0.712030, 0.717250, 0.724320, 0.735140, 0.757240, 0.796530, 0.873980", \ + "0.723990, 0.729210, 0.736280, 0.747100, 0.769200, 0.808490, 0.885940", \ + "0.743540, 0.748760, 0.755830, 0.766650, 0.788750, 0.828040, 0.905490" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.536409, 0.541749, 0.548809, 0.559659, 0.582020, 0.621279, 0.699120", \ + "0.537069, 0.542409, 0.549470, 0.560320, 0.582680, 0.621939, 0.699779", \ + "0.539069, 0.544409, 0.551470, 0.562320, 0.584680, 0.623939, 0.701780", \ + "0.543650, 0.548990, 0.556050, 0.566900, 0.589260, 0.628520, 0.706360", \ + "0.552720, 0.558059, 0.565119, 0.575970, 0.598329, 0.637590, 0.715429", \ + "0.564530, 0.569870, 0.576929, 0.587780, 0.610140, 0.649400, 0.727240", \ + "0.583390, 0.588730, 0.595789, 0.606639, 0.628999, 0.668260, 0.746100" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.773240, 0.777380, 0.783270, 0.792380, 0.810380, 0.841440, 0.902450", \ + "0.773470, 0.777610, 0.783500, 0.792610, 0.810610, 0.841670, 0.902680", \ + "0.775650, 0.779790, 0.785680, 0.794790, 0.812790, 0.843850, 0.904860", \ + "0.780400, 0.784540, 0.790430, 0.799540, 0.817540, 0.848600, 0.909610", \ + "0.789420, 0.793560, 0.799450, 0.808560, 0.826560, 0.857620, 0.918630", \ + "0.801960, 0.806100, 0.811990, 0.821100, 0.839100, 0.870160, 0.931170", \ + "0.821200, 0.825340, 0.831230, 0.840340, 0.858340, 0.889400, 0.950410" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.604894, 0.609004, 0.614854, 0.624114, 0.642094, 0.673284, 0.734174", \ + "0.605104, 0.609214, 0.615064, 0.624324, 0.642304, 0.673494, 0.734384", \ + "0.607034, 0.611144, 0.616994, 0.626254, 0.644234, 0.675424, 0.736314", \ + "0.612104, 0.616214, 0.622064, 0.631324, 0.649304, 0.680494, 0.741384", \ + "0.621034, 0.625144, 0.630994, 0.640254, 0.658234, 0.689424, 0.750314", \ + "0.633484, 0.637594, 0.643444, 0.652704, 0.670684, 0.701874, 0.762764", \ + "0.650914, 0.655024, 0.660874, 0.670134, 0.688114, 0.719304, 0.780194" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.754290, 0.759510, 0.766580, 0.777400, 0.799500, 0.838790, 0.916240", \ + "0.754510, 0.759730, 0.766800, 0.777620, 0.799720, 0.839010, 0.916460", \ + "0.757100, 0.762320, 0.769390, 0.780210, 0.802310, 0.841600, 0.919050", \ + "0.761650, 0.766870, 0.773940, 0.784760, 0.806860, 0.846150, 0.923600", \ + "0.770290, 0.775510, 0.782580, 0.793400, 0.815500, 0.854790, 0.932240", \ + "0.782250, 0.787470, 0.794540, 0.805360, 0.827460, 0.866750, 0.944200", \ + "0.801800, 0.807020, 0.814090, 0.824910, 0.847010, 0.886300, 0.963750" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.585939, 0.591279, 0.598339, 0.609189, 0.631549, 0.670809, 0.748649", \ + "0.586599, 0.591939, 0.598999, 0.609849, 0.632209, 0.671469, 0.749309", \ + "0.588599, 0.593939, 0.600999, 0.611849, 0.634209, 0.673469, 0.751309", \ + "0.593179, 0.598519, 0.605579, 0.616429, 0.638789, 0.678049, 0.755889", \ + "0.602249, 0.607589, 0.614649, 0.625499, 0.647859, 0.687119, 0.764959", \ + "0.614059, 0.619399, 0.626459, 0.637309, 0.659669, 0.698929, 0.776769", \ + "0.632919, 0.638259, 0.645319, 0.656169, 0.678529, 0.717789, 0.795629" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.823890, 0.828030, 0.833920, 0.843030, 0.861030, 0.892090, 0.953100", \ + "0.824120, 0.828260, 0.834150, 0.843260, 0.861260, 0.892320, 0.953330", \ + "0.826300, 0.830440, 0.836330, 0.845440, 0.863440, 0.894500, 0.955510", \ + "0.831050, 0.835190, 0.841080, 0.850190, 0.868190, 0.899250, 0.960260", \ + "0.840070, 0.844210, 0.850100, 0.859210, 0.877210, 0.908270, 0.969280", \ + "0.852610, 0.856750, 0.862640, 0.871750, 0.889750, 0.920810, 0.981820", \ + "0.871850, 0.875990, 0.881880, 0.890990, 0.908990, 0.940050, 1.001060" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.647946, 0.652057, 0.657906, 0.667166, 0.685147, 0.716336, 0.777227", \ + "0.648157, 0.652267, 0.658116, 0.667377, 0.685356, 0.716546, 0.777437", \ + "0.650087, 0.654197, 0.660046, 0.669307, 0.687286, 0.718476, 0.779367", \ + "0.655156, 0.659266, 0.665117, 0.674376, 0.692357, 0.723547, 0.784436", \ + "0.664087, 0.668197, 0.674046, 0.683307, 0.701286, 0.732476, 0.793367", \ + "0.676537, 0.680646, 0.686497, 0.695757, 0.713736, 0.744927, 0.805816", \ + "0.693966, 0.698076, 0.703926, 0.713186, 0.731167, 0.762357, 0.823246" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.804940, 0.810160, 0.817230, 0.828050, 0.850150, 0.889440, 0.966890", \ + "0.805160, 0.810380, 0.817450, 0.828270, 0.850370, 0.889660, 0.967110", \ + "0.807750, 0.812970, 0.820040, 0.830860, 0.852960, 0.892250, 0.969700", \ + "0.812300, 0.817520, 0.824590, 0.835410, 0.857510, 0.896800, 0.974250", \ + "0.820940, 0.826160, 0.833230, 0.844050, 0.866150, 0.905440, 0.982890", \ + "0.832900, 0.838120, 0.845190, 0.856010, 0.878110, 0.917400, 0.994850", \ + "0.852450, 0.857670, 0.864740, 0.875560, 0.897660, 0.936950, 1.014400" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.628992, 0.634332, 0.641392, 0.652242, 0.674602, 0.713862, 0.791702", \ + "0.629652, 0.634992, 0.642051, 0.652902, 0.675262, 0.714522, 0.792362", \ + "0.631652, 0.636992, 0.644051, 0.654902, 0.677262, 0.716522, 0.794362", \ + "0.636232, 0.641572, 0.648632, 0.659482, 0.681841, 0.721102, 0.798942", \ + "0.645302, 0.650642, 0.657702, 0.668552, 0.690912, 0.730171, 0.808012", \ + "0.657112, 0.662452, 0.669512, 0.680362, 0.702721, 0.741982, 0.819821", \ + "0.675972, 0.681312, 0.688372, 0.699222, 0.721582, 0.760842, 0.838682" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.597620, 0.601760, 0.607650, 0.616760, 0.634760, 0.665820, 0.726830", \ + "0.597850, 0.601990, 0.607880, 0.616990, 0.634990, 0.666050, 0.727060", \ + "0.600030, 0.604170, 0.610060, 0.619170, 0.637170, 0.668230, 0.729240", \ + "0.604780, 0.608920, 0.614810, 0.623920, 0.641920, 0.672980, 0.733990", \ + "0.613800, 0.617940, 0.623830, 0.632940, 0.650940, 0.682000, 0.743010", \ + "0.626340, 0.630480, 0.636370, 0.645480, 0.663480, 0.694540, 0.755550", \ + "0.645580, 0.649720, 0.655610, 0.664720, 0.682720, 0.713780, 0.774790" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.455617, 0.459727, 0.465577, 0.474837, 0.492817, 0.524007, 0.584897", \ + "0.455827, 0.459937, 0.465787, 0.475047, 0.493027, 0.524217, 0.585107", \ + "0.457757, 0.461867, 0.467717, 0.476977, 0.494957, 0.526147, 0.587037", \ + "0.462827, 0.466937, 0.472787, 0.482047, 0.500027, 0.531217, 0.592107", \ + "0.471757, 0.475867, 0.481717, 0.490977, 0.508957, 0.540147, 0.601037", \ + "0.484207, 0.488317, 0.494167, 0.503427, 0.521407, 0.552597, 0.613487", \ + "0.501637, 0.505747, 0.511597, 0.520857, 0.538837, 0.570027, 0.630917" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.578670, 0.583890, 0.590960, 0.601780, 0.623880, 0.663170, 0.740620", \ + "0.578890, 0.584110, 0.591180, 0.602000, 0.624100, 0.663390, 0.740840", \ + "0.581480, 0.586700, 0.593770, 0.604590, 0.626690, 0.665980, 0.743430", \ + "0.586030, 0.591250, 0.598320, 0.609140, 0.631240, 0.670530, 0.747980", \ + "0.594670, 0.599890, 0.606960, 0.617780, 0.639880, 0.679170, 0.756620", \ + "0.606630, 0.611850, 0.618920, 0.629740, 0.651840, 0.691130, 0.768580", \ + "0.626180, 0.631400, 0.638470, 0.649290, 0.671390, 0.710680, 0.788130" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.436662, 0.442002, 0.449062, 0.459912, 0.482272, 0.521532, 0.599372", \ + "0.437322, 0.442662, 0.449722, 0.460572, 0.482932, 0.522192, 0.600032", \ + "0.439322, 0.444662, 0.451722, 0.462572, 0.484932, 0.524192, 0.602032", \ + "0.443902, 0.449242, 0.456302, 0.467152, 0.489512, 0.528772, 0.606612", \ + "0.452972, 0.458312, 0.465372, 0.476222, 0.498582, 0.537842, 0.615682", \ + "0.464782, 0.470122, 0.477182, 0.488032, 0.510392, 0.549652, 0.627492", \ + "0.483642, 0.488982, 0.496042, 0.506892, 0.529252, 0.568512, 0.646352" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.598480, 0.602620, 0.608510, 0.617620, 0.635620, 0.666680, 0.727690", \ + "0.598710, 0.602850, 0.608740, 0.617850, 0.635850, 0.666910, 0.727920", \ + "0.600890, 0.605030, 0.610920, 0.620030, 0.638030, 0.669090, 0.730100", \ + "0.605640, 0.609780, 0.615670, 0.624780, 0.642780, 0.673840, 0.734850", \ + "0.614660, 0.618800, 0.624690, 0.633800, 0.651800, 0.682860, 0.743870", \ + "0.627200, 0.631340, 0.637230, 0.646340, 0.664340, 0.695400, 0.756410", \ + "0.646440, 0.650580, 0.656470, 0.665580, 0.683580, 0.714640, 0.775650" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.456348, 0.460458, 0.466308, 0.475568, 0.493548, 0.524738, 0.585628", \ + "0.456558, 0.460668, 0.466518, 0.475778, 0.493758, 0.524948, 0.585838", \ + "0.458488, 0.462598, 0.468448, 0.477708, 0.495688, 0.526878, 0.587768", \ + "0.463558, 0.467668, 0.473518, 0.482778, 0.500758, 0.531948, 0.592838", \ + "0.472488, 0.476598, 0.482448, 0.491708, 0.509688, 0.540878, 0.601768", \ + "0.484938, 0.489048, 0.494898, 0.504158, 0.522138, 0.553328, 0.614218", \ + "0.502368, 0.506478, 0.512328, 0.521588, 0.539568, 0.570758, 0.631648" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.579530, 0.584750, 0.591820, 0.602640, 0.624740, 0.664030, 0.741480", \ + "0.579750, 0.584970, 0.592040, 0.602860, 0.624960, 0.664250, 0.741700", \ + "0.582340, 0.587560, 0.594630, 0.605450, 0.627550, 0.666840, 0.744290", \ + "0.586890, 0.592110, 0.599180, 0.610000, 0.632100, 0.671390, 0.748840", \ + "0.595530, 0.600750, 0.607820, 0.618640, 0.640740, 0.680030, 0.757480", \ + "0.607490, 0.612710, 0.619780, 0.630600, 0.652700, 0.691990, 0.769440", \ + "0.627040, 0.632260, 0.639330, 0.650150, 0.672250, 0.711540, 0.788990" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.437384, 0.442724, 0.449784, 0.460634, 0.482994, 0.522254, 0.600094", \ + "0.438044, 0.443384, 0.450445, 0.461295, 0.483654, 0.522914, 0.600754", \ + "0.440044, 0.445384, 0.452445, 0.463295, 0.485654, 0.524914, 0.602754", \ + "0.444624, 0.449964, 0.457025, 0.467874, 0.490235, 0.529494, 0.607334", \ + "0.453695, 0.459034, 0.466094, 0.476944, 0.499304, 0.538565, 0.616404", \ + "0.465504, 0.470844, 0.477904, 0.488754, 0.511115, 0.550374, 0.628215", \ + "0.484364, 0.489704, 0.496764, 0.507614, 0.529974, 0.569234, 0.647074" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.602650, 0.606790, 0.612680, 0.621790, 0.639790, 0.670850, 0.731860", \ + "0.602880, 0.607020, 0.612910, 0.622020, 0.640020, 0.671080, 0.732090", \ + "0.605060, 0.609200, 0.615090, 0.624200, 0.642200, 0.673260, 0.734270", \ + "0.609810, 0.613950, 0.619840, 0.628950, 0.646950, 0.678010, 0.739020", \ + "0.618830, 0.622970, 0.628860, 0.637970, 0.655970, 0.687030, 0.748040", \ + "0.631370, 0.635510, 0.641400, 0.650510, 0.668510, 0.699570, 0.760580", \ + "0.650610, 0.654750, 0.660640, 0.669750, 0.687750, 0.718810, 0.779820" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.459893, 0.464002, 0.469853, 0.479113, 0.497092, 0.528282, 0.589172", \ + "0.460102, 0.464212, 0.470063, 0.479322, 0.497302, 0.528493, 0.589382", \ + "0.462032, 0.466142, 0.471993, 0.481252, 0.499232, 0.530423, 0.591312", \ + "0.467102, 0.471213, 0.477062, 0.486322, 0.504302, 0.535492, 0.596383", \ + "0.476032, 0.480142, 0.485993, 0.495252, 0.513232, 0.544423, 0.605312", \ + "0.488482, 0.492592, 0.498442, 0.507702, 0.525683, 0.556872, 0.617762", \ + "0.505912, 0.510023, 0.515872, 0.525133, 0.543112, 0.574302, 0.635193" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.583700, 0.588920, 0.595990, 0.606810, 0.628910, 0.668200, 0.745650", \ + "0.583920, 0.589140, 0.596210, 0.607030, 0.629130, 0.668420, 0.745870", \ + "0.586510, 0.591730, 0.598800, 0.609620, 0.631720, 0.671010, 0.748460", \ + "0.591060, 0.596280, 0.603350, 0.614170, 0.636270, 0.675560, 0.753010", \ + "0.599700, 0.604920, 0.611990, 0.622810, 0.644910, 0.684200, 0.761650", \ + "0.611660, 0.616880, 0.623950, 0.634770, 0.656870, 0.696160, 0.773610", \ + "0.631210, 0.636430, 0.643500, 0.654320, 0.676420, 0.715710, 0.793160" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.440929, 0.446269, 0.453329, 0.464179, 0.486539, 0.525799, 0.603639", \ + "0.441589, 0.446929, 0.453989, 0.464839, 0.487199, 0.526459, 0.604299", \ + "0.443589, 0.448929, 0.455989, 0.466839, 0.489199, 0.528459, 0.606299", \ + "0.448169, 0.453509, 0.460569, 0.471419, 0.493779, 0.533039, 0.610879", \ + "0.457239, 0.462579, 0.469639, 0.480489, 0.502849, 0.542109, 0.619949", \ + "0.469049, 0.474389, 0.481449, 0.492299, 0.514659, 0.553919, 0.631759", \ + "0.487909, 0.493249, 0.500309, 0.511159, 0.533519, 0.572779, 0.650619" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.604990, 0.609130, 0.615020, 0.624130, 0.642130, 0.673190, 0.734200", \ + "0.605220, 0.609360, 0.615250, 0.624360, 0.642360, 0.673420, 0.734430", \ + "0.607400, 0.611540, 0.617430, 0.626540, 0.644540, 0.675600, 0.736610", \ + "0.612150, 0.616290, 0.622180, 0.631290, 0.649290, 0.680350, 0.741360", \ + "0.621170, 0.625310, 0.631200, 0.640310, 0.658310, 0.689370, 0.750380", \ + "0.633710, 0.637850, 0.643740, 0.652850, 0.670850, 0.701910, 0.762920", \ + "0.652950, 0.657090, 0.662980, 0.672090, 0.690090, 0.721150, 0.782160" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.461882, 0.465992, 0.471842, 0.481102, 0.499081, 0.530272, 0.591162", \ + "0.462091, 0.466201, 0.472052, 0.481312, 0.499291, 0.530482, 0.591371", \ + "0.464021, 0.468131, 0.473982, 0.483241, 0.501221, 0.532412, 0.593301", \ + "0.469091, 0.473202, 0.479051, 0.488312, 0.506292, 0.537481, 0.598372", \ + "0.478021, 0.482131, 0.487982, 0.497242, 0.515221, 0.546412, 0.607301", \ + "0.490471, 0.494582, 0.500431, 0.509691, 0.527672, 0.558862, 0.619752", \ + "0.507902, 0.512012, 0.517861, 0.527122, 0.545102, 0.576291, 0.637182" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.586040, 0.591260, 0.598330, 0.609150, 0.631250, 0.670540, 0.747990", \ + "0.586260, 0.591480, 0.598550, 0.609370, 0.631470, 0.670760, 0.748210", \ + "0.588850, 0.594070, 0.601140, 0.611960, 0.634060, 0.673350, 0.750800", \ + "0.593400, 0.598620, 0.605690, 0.616510, 0.638610, 0.677900, 0.755350", \ + "0.602040, 0.607260, 0.614330, 0.625150, 0.647250, 0.686540, 0.763990", \ + "0.614000, 0.619220, 0.626290, 0.637110, 0.659210, 0.698500, 0.775950", \ + "0.633550, 0.638770, 0.645840, 0.656660, 0.678760, 0.718050, 0.795500" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.442926, 0.448266, 0.455327, 0.466176, 0.488536, 0.527797, 0.605637", \ + "0.443586, 0.448926, 0.455986, 0.466836, 0.489196, 0.528456, 0.606297", \ + "0.445586, 0.450926, 0.457986, 0.468836, 0.491196, 0.530456, 0.608297", \ + "0.450166, 0.455506, 0.462566, 0.473416, 0.495776, 0.535037, 0.612877", \ + "0.459236, 0.464577, 0.471636, 0.482486, 0.504847, 0.544106, 0.621947", \ + "0.471046, 0.476386, 0.483446, 0.494296, 0.516656, 0.555917, 0.633756", \ + "0.489906, 0.495246, 0.502307, 0.513157, 0.535517, 0.574777, 0.652617" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.665110, 0.669250, 0.675140, 0.684250, 0.702250, 0.733310, 0.794320", \ + "0.665340, 0.669480, 0.675370, 0.684480, 0.702480, 0.733540, 0.794550", \ + "0.667520, 0.671660, 0.677550, 0.686660, 0.704660, 0.735720, 0.796730", \ + "0.672270, 0.676410, 0.682300, 0.691410, 0.709410, 0.740470, 0.801480", \ + "0.681290, 0.685430, 0.691320, 0.700430, 0.718430, 0.749490, 0.810500", \ + "0.693830, 0.697970, 0.703860, 0.712970, 0.730970, 0.762030, 0.823040", \ + "0.713070, 0.717210, 0.723100, 0.732210, 0.750210, 0.781270, 0.842280" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.512984, 0.517094, 0.522944, 0.532204, 0.550184, 0.581374, 0.642264", \ + "0.513194, 0.517304, 0.523154, 0.532414, 0.550394, 0.581584, 0.642474", \ + "0.515124, 0.519234, 0.525084, 0.534344, 0.552324, 0.583514, 0.644404", \ + "0.520194, 0.524304, 0.530154, 0.539414, 0.557394, 0.588584, 0.649474", \ + "0.529124, 0.533234, 0.539084, 0.548344, 0.566324, 0.597514, 0.658404", \ + "0.541574, 0.545684, 0.551534, 0.560794, 0.578774, 0.609964, 0.670854", \ + "0.559004, 0.563114, 0.568964, 0.578224, 0.596204, 0.627394, 0.688284" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.646160, 0.651380, 0.658450, 0.669270, 0.691370, 0.730660, 0.808110", \ + "0.646380, 0.651600, 0.658670, 0.669490, 0.691590, 0.730880, 0.808330", \ + "0.648970, 0.654190, 0.661260, 0.672080, 0.694180, 0.733470, 0.810920", \ + "0.653520, 0.658740, 0.665810, 0.676630, 0.698730, 0.738020, 0.815470", \ + "0.662160, 0.667380, 0.674450, 0.685270, 0.707370, 0.746660, 0.824110", \ + "0.674120, 0.679340, 0.686410, 0.697230, 0.719330, 0.758620, 0.836070", \ + "0.693670, 0.698890, 0.705960, 0.716780, 0.738880, 0.778170, 0.855620" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.494028, 0.499368, 0.506428, 0.517278, 0.539639, 0.578898, 0.656739", \ + "0.494688, 0.500028, 0.507089, 0.517939, 0.540299, 0.579558, 0.657398", \ + "0.496688, 0.502028, 0.509089, 0.519939, 0.542299, 0.581558, 0.659398", \ + "0.501269, 0.506609, 0.513669, 0.524518, 0.546879, 0.586139, 0.663979", \ + "0.510339, 0.515678, 0.522738, 0.533589, 0.555948, 0.595209, 0.673048", \ + "0.522149, 0.527489, 0.534548, 0.545399, 0.567759, 0.607019, 0.684859", \ + "0.541009, 0.546349, 0.553408, 0.564258, 0.586618, 0.625879, 0.703719" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.714980, 0.719120, 0.725010, 0.734120, 0.752120, 0.783180, 0.844190", \ + "0.715210, 0.719350, 0.725240, 0.734350, 0.752350, 0.783410, 0.844420", \ + "0.717390, 0.721530, 0.727420, 0.736530, 0.754530, 0.785590, 0.846600", \ + "0.722140, 0.726280, 0.732170, 0.741280, 0.759280, 0.790340, 0.851350", \ + "0.731160, 0.735300, 0.741190, 0.750300, 0.768300, 0.799360, 0.860370", \ + "0.743700, 0.747840, 0.753730, 0.762840, 0.780840, 0.811900, 0.872910", \ + "0.762940, 0.767080, 0.772970, 0.782080, 0.800080, 0.831140, 0.892150" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.555373, 0.559483, 0.565333, 0.574593, 0.592573, 0.623763, 0.684653", \ + "0.555583, 0.559693, 0.565543, 0.574803, 0.592783, 0.623973, 0.684863", \ + "0.557513, 0.561623, 0.567473, 0.576733, 0.594713, 0.625903, 0.686793", \ + "0.562583, 0.566693, 0.572543, 0.581803, 0.599783, 0.630973, 0.691863", \ + "0.571513, 0.575623, 0.581473, 0.590733, 0.608713, 0.639903, 0.700793", \ + "0.583963, 0.588073, 0.593923, 0.603183, 0.621163, 0.652353, 0.713243", \ + "0.601393, 0.605503, 0.611353, 0.620613, 0.638593, 0.669783, 0.730673" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.696030, 0.701250, 0.708320, 0.719140, 0.741240, 0.780530, 0.857980", \ + "0.696250, 0.701470, 0.708540, 0.719360, 0.741460, 0.780750, 0.858200", \ + "0.698840, 0.704060, 0.711130, 0.721950, 0.744050, 0.783340, 0.860790", \ + "0.703390, 0.708610, 0.715680, 0.726500, 0.748600, 0.787890, 0.865340", \ + "0.712030, 0.717250, 0.724320, 0.735140, 0.757240, 0.796530, 0.873980", \ + "0.723990, 0.729210, 0.736280, 0.747100, 0.769200, 0.808490, 0.885940", \ + "0.743540, 0.748760, 0.755830, 0.766650, 0.788750, 0.828040, 0.905490" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.536409, 0.541749, 0.548809, 0.559659, 0.582020, 0.621279, 0.699120", \ + "0.537069, 0.542409, 0.549470, 0.560320, 0.582680, 0.621939, 0.699779", \ + "0.539069, 0.544409, 0.551470, 0.562320, 0.584680, 0.623939, 0.701780", \ + "0.543650, 0.548990, 0.556050, 0.566900, 0.589260, 0.628520, 0.706360", \ + "0.552720, 0.558059, 0.565119, 0.575970, 0.598329, 0.637590, 0.715429", \ + "0.564530, 0.569870, 0.576929, 0.587780, 0.610140, 0.649400, 0.727240", \ + "0.583390, 0.588730, 0.595789, 0.606639, 0.628999, 0.668260, 0.746100" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.773240, 0.777380, 0.783270, 0.792380, 0.810380, 0.841440, 0.902450", \ + "0.773470, 0.777610, 0.783500, 0.792610, 0.810610, 0.841670, 0.902680", \ + "0.775650, 0.779790, 0.785680, 0.794790, 0.812790, 0.843850, 0.904860", \ + "0.780400, 0.784540, 0.790430, 0.799540, 0.817540, 0.848600, 0.909610", \ + "0.789420, 0.793560, 0.799450, 0.808560, 0.826560, 0.857620, 0.918630", \ + "0.801960, 0.806100, 0.811990, 0.821100, 0.839100, 0.870160, 0.931170", \ + "0.821200, 0.825340, 0.831230, 0.840340, 0.858340, 0.889400, 0.950410" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.604894, 0.609004, 0.614854, 0.624114, 0.642094, 0.673284, 0.734174", \ + "0.605104, 0.609214, 0.615064, 0.624324, 0.642304, 0.673494, 0.734384", \ + "0.607034, 0.611144, 0.616994, 0.626254, 0.644234, 0.675424, 0.736314", \ + "0.612104, 0.616214, 0.622064, 0.631324, 0.649304, 0.680494, 0.741384", \ + "0.621034, 0.625144, 0.630994, 0.640254, 0.658234, 0.689424, 0.750314", \ + "0.633484, 0.637594, 0.643444, 0.652704, 0.670684, 0.701874, 0.762764", \ + "0.650914, 0.655024, 0.660874, 0.670134, 0.688114, 0.719304, 0.780194" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.754290, 0.759510, 0.766580, 0.777400, 0.799500, 0.838790, 0.916240", \ + "0.754510, 0.759730, 0.766800, 0.777620, 0.799720, 0.839010, 0.916460", \ + "0.757100, 0.762320, 0.769390, 0.780210, 0.802310, 0.841600, 0.919050", \ + "0.761650, 0.766870, 0.773940, 0.784760, 0.806860, 0.846150, 0.923600", \ + "0.770290, 0.775510, 0.782580, 0.793400, 0.815500, 0.854790, 0.932240", \ + "0.782250, 0.787470, 0.794540, 0.805360, 0.827460, 0.866750, 0.944200", \ + "0.801800, 0.807020, 0.814090, 0.824910, 0.847010, 0.886300, 0.963750" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.585939, 0.591279, 0.598339, 0.609189, 0.631549, 0.670809, 0.748649", \ + "0.586599, 0.591939, 0.598999, 0.609849, 0.632209, 0.671469, 0.749309", \ + "0.588599, 0.593939, 0.600999, 0.611849, 0.634209, 0.673469, 0.751309", \ + "0.593179, 0.598519, 0.605579, 0.616429, 0.638789, 0.678049, 0.755889", \ + "0.602249, 0.607589, 0.614649, 0.625499, 0.647859, 0.687119, 0.764959", \ + "0.614059, 0.619399, 0.626459, 0.637309, 0.659669, 0.698929, 0.776769", \ + "0.632919, 0.638259, 0.645319, 0.656169, 0.678529, 0.717789, 0.795629" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.823890, 0.828030, 0.833920, 0.843030, 0.861030, 0.892090, 0.953100", \ + "0.824120, 0.828260, 0.834150, 0.843260, 0.861260, 0.892320, 0.953330", \ + "0.826300, 0.830440, 0.836330, 0.845440, 0.863440, 0.894500, 0.955510", \ + "0.831050, 0.835190, 0.841080, 0.850190, 0.868190, 0.899250, 0.960260", \ + "0.840070, 0.844210, 0.850100, 0.859210, 0.877210, 0.908270, 0.969280", \ + "0.852610, 0.856750, 0.862640, 0.871750, 0.889750, 0.920810, 0.981820", \ + "0.871850, 0.875990, 0.881880, 0.890990, 0.908990, 0.940050, 1.001060" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.647946, 0.652057, 0.657906, 0.667166, 0.685147, 0.716336, 0.777227", \ + "0.648157, 0.652267, 0.658116, 0.667377, 0.685356, 0.716546, 0.777437", \ + "0.650087, 0.654197, 0.660046, 0.669307, 0.687286, 0.718476, 0.779367", \ + "0.655156, 0.659266, 0.665117, 0.674376, 0.692357, 0.723547, 0.784436", \ + "0.664087, 0.668197, 0.674046, 0.683307, 0.701286, 0.732476, 0.793367", \ + "0.676537, 0.680646, 0.686497, 0.695757, 0.713736, 0.744927, 0.805816", \ + "0.693966, 0.698076, 0.703926, 0.713186, 0.731167, 0.762357, 0.823246" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.804940, 0.810160, 0.817230, 0.828050, 0.850150, 0.889440, 0.966890", \ + "0.805160, 0.810380, 0.817450, 0.828270, 0.850370, 0.889660, 0.967110", \ + "0.807750, 0.812970, 0.820040, 0.830860, 0.852960, 0.892250, 0.969700", \ + "0.812300, 0.817520, 0.824590, 0.835410, 0.857510, 0.896800, 0.974250", \ + "0.820940, 0.826160, 0.833230, 0.844050, 0.866150, 0.905440, 0.982890", \ + "0.832900, 0.838120, 0.845190, 0.856010, 0.878110, 0.917400, 0.994850", \ + "0.852450, 0.857670, 0.864740, 0.875560, 0.897660, 0.936950, 1.014400" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.628992, 0.634332, 0.641392, 0.652242, 0.674602, 0.713862, 0.791702", \ + "0.629652, 0.634992, 0.642051, 0.652902, 0.675262, 0.714522, 0.792362", \ + "0.631652, 0.636992, 0.644051, 0.654902, 0.677262, 0.716522, 0.794362", \ + "0.636232, 0.641572, 0.648632, 0.659482, 0.681841, 0.721102, 0.798942", \ + "0.645302, 0.650642, 0.657702, 0.668552, 0.690912, 0.730171, 0.808012", \ + "0.657112, 0.662452, 0.669512, 0.680362, 0.702721, 0.741982, 0.819821", \ + "0.675972, 0.681312, 0.688372, 0.699222, 0.721582, 0.760842, 0.838682" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.008669, 0.008678, 0.008791, 0.008800, 0.008808, 0.008817, 0.008966", \ + "0.009460, 0.009470, 0.009582, 0.009592, 0.009601, 0.009611, 0.009757", \ + "0.009470, 0.009479, 0.009592, 0.009601, 0.009611, 0.009620, 0.009766", \ + "0.009479, 0.009489, 0.009601, 0.009611, 0.009620, 0.009630, 0.009776", \ + "0.009967, 0.009977, 0.010089, 0.010099, 0.010109, 0.010120, 0.010264", \ + "0.009977, 0.009987, 0.010099, 0.010109, 0.010120, 0.010130, 0.010274", \ + "0.009987, 0.009997, 0.010109, 0.010120, 0.010130, 0.010140, 0.010284" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.007172, 0.007686, 0.007694, 0.007701, 0.007709, 0.008097, 0.008105", \ + "0.008066, 0.008580, 0.008588, 0.008597, 0.008606, 0.008990, 0.008999", \ + "0.008074, 0.008588, 0.008597, 0.008606, 0.008614, 0.008999, 0.009008", \ + "0.008082, 0.008597, 0.008606, 0.008614, 0.008623, 0.009008, 0.009017", \ + "0.008090, 0.008606, 0.008614, 0.008623, 0.008631, 0.009017, 0.009027", \ + "0.008098, 0.008614, 0.008623, 0.008631, 0.008640, 0.009027, 0.009036", \ + "0.008106, 0.008623, 0.008631, 0.008640, 0.008649, 0.009036, 0.009045" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.008669, 0.008678, 0.008791, 0.008800, 0.008808, 0.008817, 0.008966", \ + "0.009460, 0.009470, 0.009582, 0.009592, 0.009601, 0.009611, 0.009757", \ + "0.009470, 0.009479, 0.009592, 0.009601, 0.009611, 0.009620, 0.009766", \ + "0.009479, 0.009489, 0.009601, 0.009611, 0.009620, 0.009630, 0.009776", \ + "0.009967, 0.009977, 0.010089, 0.010099, 0.010109, 0.010120, 0.010264", \ + "0.009977, 0.009987, 0.010099, 0.010109, 0.010120, 0.010130, 0.010274", \ + "0.009987, 0.009997, 0.010109, 0.010120, 0.010130, 0.010140, 0.010284" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_outputload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.007172, 0.007686, 0.007694, 0.007701, 0.007709, 0.008097, 0.008105", \ + "0.008066, 0.008580, 0.008588, 0.008597, 0.008606, 0.008990, 0.008999", \ + "0.008074, 0.008588, 0.008597, 0.008606, 0.008614, 0.008999, 0.009008", \ + "0.008082, 0.008597, 0.008606, 0.008614, 0.008623, 0.009008, 0.009017", \ + "0.008090, 0.008606, 0.008614, 0.008623, 0.008631, 0.009017, 0.009027", \ + "0.008098, 0.008614, 0.008623, 0.008631, 0.008640, 0.009027, 0.009036", \ + "0.008106, 0.008623, 0.008631, 0.008640, 0.008649, 0.009036, 0.009045" \ + ); + } + } + } + bus(SOA) { + bus_type : rf2_32x128_wm1_SOA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.640380, 0.642410, 0.644750, 0.650660, 0.668540, 0.699370, 0.760820", \ + "0.640570, 0.642600, 0.644940, 0.650850, 0.668730, 0.699560, 0.761010", \ + "0.642170, 0.644200, 0.646540, 0.652450, 0.670330, 0.701160, 0.762610", \ + "0.647640, 0.649670, 0.652010, 0.657920, 0.675800, 0.706630, 0.768080", \ + "0.656260, 0.658290, 0.660630, 0.666540, 0.684420, 0.715250, 0.776700", \ + "0.668910, 0.670940, 0.673280, 0.679190, 0.697070, 0.727900, 0.789350", \ + "0.688130, 0.690160, 0.692500, 0.698410, 0.716290, 0.747120, 0.808570" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.532789, 0.534939, 0.537209, 0.542919, 0.561089, 0.591449, 0.652729", \ + "0.532749, 0.534899, 0.537169, 0.542879, 0.561049, 0.591409, 0.652689", \ + "0.534349, 0.536498, 0.538769, 0.544479, 0.562649, 0.593009, 0.654289", \ + "0.539989, 0.542139, 0.544409, 0.550119, 0.568289, 0.598649, 0.659929", \ + "0.548909, 0.551059, 0.553329, 0.559038, 0.577209, 0.607569, 0.668849", \ + "0.561038, 0.563189, 0.565459, 0.571169, 0.589338, 0.619699, 0.680979", \ + "0.580219, 0.582369, 0.584639, 0.590349, 0.608519, 0.638879, 0.700159" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.616330, 0.619750, 0.622580, 0.631090, 0.657220, 0.701020, 0.789060", \ + "0.616830, 0.620250, 0.623080, 0.631590, 0.657720, 0.701520, 0.789560", \ + "0.618860, 0.622280, 0.625110, 0.633620, 0.659750, 0.703550, 0.791590", \ + "0.623490, 0.626910, 0.629740, 0.638250, 0.664380, 0.708180, 0.796220", \ + "0.632360, 0.635780, 0.638610, 0.647120, 0.673250, 0.717050, 0.805090", \ + "0.645170, 0.648590, 0.651420, 0.659930, 0.686060, 0.729860, 0.817900", \ + "0.664890, 0.668310, 0.671140, 0.679650, 0.705780, 0.749580, 0.837620" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.508699, 0.512069, 0.514979, 0.523230, 0.549119, 0.593369, 0.681399", \ + "0.508989, 0.512359, 0.515270, 0.523519, 0.549409, 0.593660, 0.681690", \ + "0.510949, 0.514320, 0.517230, 0.525479, 0.551370, 0.595619, 0.683650", \ + "0.515759, 0.519130, 0.522039, 0.530289, 0.556180, 0.600429, 0.688460", \ + "0.524879, 0.528250, 0.531160, 0.539409, 0.565300, 0.609549, 0.697580", \ + "0.536299, 0.539670, 0.542579, 0.550829, 0.576720, 0.620969, 0.709000", \ + "0.555600, 0.558970, 0.561879, 0.570129, 0.596019, 0.640270, 0.728299" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.641240, 0.643270, 0.645610, 0.651520, 0.669400, 0.700230, 0.761680", \ + "0.641430, 0.643460, 0.645800, 0.651710, 0.669590, 0.700420, 0.761870", \ + "0.643030, 0.645060, 0.647400, 0.653310, 0.671190, 0.702020, 0.763470", \ + "0.648500, 0.650530, 0.652870, 0.658780, 0.676660, 0.707490, 0.768940", \ + "0.657120, 0.659150, 0.661490, 0.667400, 0.685280, 0.716110, 0.777560", \ + "0.669770, 0.671800, 0.674140, 0.680050, 0.697930, 0.728760, 0.790210", \ + "0.688990, 0.691020, 0.693360, 0.699270, 0.717150, 0.747980, 0.809430" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.533519, 0.535670, 0.537940, 0.543650, 0.561819, 0.592179, 0.653459", \ + "0.533479, 0.535629, 0.537899, 0.543610, 0.561779, 0.592140, 0.653420", \ + "0.535079, 0.537230, 0.539500, 0.545210, 0.563379, 0.593739, 0.655019", \ + "0.540720, 0.542870, 0.545139, 0.550849, 0.569020, 0.599379, 0.660659", \ + "0.549640, 0.551789, 0.554059, 0.559770, 0.577940, 0.608299, 0.669579", \ + "0.561770, 0.563920, 0.566190, 0.571900, 0.590070, 0.620429, 0.681709", \ + "0.580950, 0.583099, 0.585369, 0.591079, 0.609249, 0.639609, 0.700889" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.617180, 0.620600, 0.623430, 0.631940, 0.658070, 0.701870, 0.789910", \ + "0.617680, 0.621100, 0.623930, 0.632440, 0.658570, 0.702370, 0.790410", \ + "0.619710, 0.623130, 0.625960, 0.634470, 0.660600, 0.704400, 0.792440", \ + "0.624340, 0.627760, 0.630590, 0.639100, 0.665230, 0.709030, 0.797070", \ + "0.633210, 0.636630, 0.639460, 0.647970, 0.674100, 0.717900, 0.805940", \ + "0.646020, 0.649440, 0.652270, 0.660780, 0.686910, 0.730710, 0.818750", \ + "0.665740, 0.669160, 0.671990, 0.680500, 0.706630, 0.750430, 0.838470" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.509422, 0.512792, 0.515702, 0.523952, 0.549842, 0.594092, 0.682122", \ + "0.509712, 0.513082, 0.515992, 0.524242, 0.550132, 0.594382, 0.682412", \ + "0.511672, 0.515042, 0.517952, 0.526202, 0.552092, 0.596342, 0.684372", \ + "0.516482, 0.519852, 0.522762, 0.531012, 0.556902, 0.601152, 0.689182", \ + "0.525602, 0.528972, 0.531882, 0.540132, 0.566022, 0.610272, 0.698302", \ + "0.537022, 0.540392, 0.543302, 0.551552, 0.577442, 0.621692, 0.709722", \ + "0.556322, 0.559692, 0.562602, 0.570852, 0.596742, 0.640992, 0.729022" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.645410, 0.647440, 0.649780, 0.655690, 0.673570, 0.704400, 0.765850", \ + "0.645600, 0.647630, 0.649970, 0.655880, 0.673760, 0.704590, 0.766040", \ + "0.647200, 0.649230, 0.651570, 0.657480, 0.675360, 0.706190, 0.767640", \ + "0.652670, 0.654700, 0.657040, 0.662950, 0.680830, 0.711660, 0.773110", \ + "0.661290, 0.663320, 0.665660, 0.671570, 0.689450, 0.720280, 0.781730", \ + "0.673940, 0.675970, 0.678310, 0.684220, 0.702100, 0.732930, 0.794380", \ + "0.693160, 0.695190, 0.697530, 0.703440, 0.721320, 0.752150, 0.813600" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.537064, 0.539214, 0.541484, 0.547194, 0.565364, 0.595724, 0.657004", \ + "0.537024, 0.539174, 0.541444, 0.547154, 0.565324, 0.595684, 0.656964", \ + "0.538624, 0.540774, 0.543044, 0.548754, 0.566924, 0.597284, 0.658564", \ + "0.544264, 0.546414, 0.548684, 0.554394, 0.572564, 0.602924, 0.664204", \ + "0.553184, 0.555334, 0.557604, 0.563314, 0.581484, 0.611844, 0.673124", \ + "0.565314, 0.567464, 0.569734, 0.575444, 0.593614, 0.623974, 0.685254", \ + "0.584494, 0.586644, 0.588914, 0.594624, 0.612794, 0.643154, 0.704434" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.621350, 0.624770, 0.627600, 0.636110, 0.662240, 0.706040, 0.794080", \ + "0.621850, 0.625270, 0.628100, 0.636610, 0.662740, 0.706540, 0.794580", \ + "0.623880, 0.627300, 0.630130, 0.638640, 0.664770, 0.708570, 0.796610", \ + "0.628510, 0.631930, 0.634760, 0.643270, 0.669400, 0.713200, 0.801240", \ + "0.637380, 0.640800, 0.643630, 0.652140, 0.678270, 0.722070, 0.810110", \ + "0.650190, 0.653610, 0.656440, 0.664950, 0.691080, 0.734880, 0.822920", \ + "0.669910, 0.673330, 0.676160, 0.684670, 0.710800, 0.754600, 0.842640" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.512966, 0.516336, 0.519246, 0.527497, 0.553387, 0.597637, 0.685666", \ + "0.513257, 0.516626, 0.519537, 0.527786, 0.553677, 0.597927, 0.685957", \ + "0.515216, 0.518587, 0.521497, 0.529747, 0.555637, 0.599886, 0.687917", \ + "0.520026, 0.523397, 0.526307, 0.534556, 0.560447, 0.604696, 0.692727", \ + "0.529146, 0.532517, 0.535427, 0.543677, 0.569567, 0.613816, 0.701847", \ + "0.540566, 0.543937, 0.546847, 0.555096, 0.580987, 0.625236, 0.713267", \ + "0.559867, 0.563237, 0.566146, 0.574396, 0.600286, 0.644537, 0.732566" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.647760, 0.649790, 0.652130, 0.658040, 0.675920, 0.706750, 0.768200", \ + "0.647950, 0.649980, 0.652320, 0.658230, 0.676110, 0.706940, 0.768390", \ + "0.649550, 0.651580, 0.653920, 0.659830, 0.677710, 0.708540, 0.769990", \ + "0.655020, 0.657050, 0.659390, 0.665300, 0.683180, 0.714010, 0.775460", \ + "0.663640, 0.665670, 0.668010, 0.673920, 0.691800, 0.722630, 0.784080", \ + "0.676290, 0.678320, 0.680660, 0.686570, 0.704450, 0.735280, 0.796730", \ + "0.695510, 0.697540, 0.699880, 0.705790, 0.723670, 0.754500, 0.815950" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.539062, 0.541211, 0.543481, 0.549192, 0.567362, 0.597722, 0.659002", \ + "0.539022, 0.541171, 0.543441, 0.549152, 0.567322, 0.597681, 0.658961", \ + "0.540622, 0.542771, 0.545041, 0.550752, 0.568922, 0.599282, 0.660562", \ + "0.546261, 0.548412, 0.550682, 0.556391, 0.574561, 0.604922, 0.666202", \ + "0.555181, 0.557332, 0.559602, 0.565311, 0.583481, 0.613841, 0.675121", \ + "0.567311, 0.569462, 0.571732, 0.577441, 0.595611, 0.625972, 0.687251", \ + "0.586491, 0.588642, 0.590912, 0.596621, 0.614791, 0.645152, 0.706432" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.623700, 0.627120, 0.629950, 0.638460, 0.664590, 0.708390, 0.796430", \ + "0.624200, 0.627620, 0.630450, 0.638960, 0.665090, 0.708890, 0.796930", \ + "0.626230, 0.629650, 0.632480, 0.640990, 0.667120, 0.710920, 0.798960", \ + "0.630860, 0.634280, 0.637110, 0.645620, 0.671750, 0.715550, 0.803590", \ + "0.639730, 0.643150, 0.645980, 0.654490, 0.680620, 0.724420, 0.812460", \ + "0.652540, 0.655960, 0.658790, 0.667300, 0.693430, 0.737230, 0.825270", \ + "0.672260, 0.675680, 0.678510, 0.687020, 0.713150, 0.756950, 0.844990" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.514964, 0.518334, 0.521244, 0.529494, 0.555384, 0.599634, 0.687664", \ + "0.515254, 0.518624, 0.521534, 0.529784, 0.555674, 0.599924, 0.687954", \ + "0.517214, 0.520584, 0.523494, 0.531744, 0.557634, 0.601884, 0.689914", \ + "0.522024, 0.525394, 0.528304, 0.536554, 0.562444, 0.606694, 0.694724", \ + "0.531144, 0.534514, 0.537424, 0.545674, 0.571564, 0.615814, 0.703844", \ + "0.542564, 0.545934, 0.548844, 0.557094, 0.582984, 0.627234, 0.715264", \ + "0.561864, 0.565234, 0.568144, 0.576394, 0.602284, 0.646534, 0.734564" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.707870, 0.709900, 0.712240, 0.718150, 0.736030, 0.766860, 0.828310", \ + "0.708060, 0.710090, 0.712430, 0.718340, 0.736220, 0.767050, 0.828500", \ + "0.709660, 0.711690, 0.714030, 0.719940, 0.737820, 0.768650, 0.830100", \ + "0.715130, 0.717160, 0.719500, 0.725410, 0.743290, 0.774120, 0.835570", \ + "0.723750, 0.725780, 0.728120, 0.734030, 0.751910, 0.782740, 0.844190", \ + "0.736400, 0.738430, 0.740770, 0.746680, 0.764560, 0.795390, 0.856840", \ + "0.755620, 0.757650, 0.759990, 0.765900, 0.783780, 0.814610, 0.876060" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.590155, 0.592305, 0.594575, 0.600285, 0.618455, 0.648815, 0.710095", \ + "0.590115, 0.592265, 0.594535, 0.600245, 0.618415, 0.648775, 0.710055", \ + "0.591715, 0.593865, 0.596135, 0.601845, 0.620015, 0.650375, 0.711655", \ + "0.597355, 0.599505, 0.601775, 0.607485, 0.625655, 0.656015, 0.717295", \ + "0.606275, 0.608425, 0.610695, 0.616405, 0.634575, 0.664935, 0.726215", \ + "0.618405, 0.620555, 0.622825, 0.628535, 0.646705, 0.677065, 0.738345", \ + "0.637585, 0.639735, 0.642005, 0.647715, 0.665885, 0.696245, 0.757525" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.683820, 0.687240, 0.690070, 0.698580, 0.724710, 0.768510, 0.856550", \ + "0.684320, 0.687740, 0.690570, 0.699080, 0.725210, 0.769010, 0.857050", \ + "0.686350, 0.689770, 0.692600, 0.701110, 0.727240, 0.771040, 0.859080", \ + "0.690980, 0.694400, 0.697230, 0.705740, 0.731870, 0.775670, 0.863710", \ + "0.699850, 0.703270, 0.706100, 0.714610, 0.740740, 0.784540, 0.872580", \ + "0.712660, 0.716080, 0.718910, 0.727420, 0.753550, 0.797350, 0.885390", \ + "0.732380, 0.735800, 0.738630, 0.747140, 0.773270, 0.817070, 0.905110" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.566066, 0.569436, 0.572346, 0.580596, 0.606486, 0.650736, 0.738766", \ + "0.566356, 0.569726, 0.572636, 0.580886, 0.606776, 0.651026, 0.739056", \ + "0.568316, 0.571686, 0.574596, 0.582846, 0.608736, 0.652986, 0.741016", \ + "0.573126, 0.576496, 0.579406, 0.587656, 0.613546, 0.657796, 0.745826", \ + "0.582246, 0.585616, 0.588526, 0.596776, 0.622666, 0.666916, 0.754946", \ + "0.593666, 0.597036, 0.599946, 0.608196, 0.634086, 0.678336, 0.766366", \ + "0.612966, 0.616336, 0.619246, 0.627496, 0.653386, 0.697636, 0.785666" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.757740, 0.759770, 0.762110, 0.768020, 0.785900, 0.816730, 0.878180", \ + "0.757930, 0.759960, 0.762300, 0.768210, 0.786090, 0.816920, 0.878370", \ + "0.759530, 0.761560, 0.763900, 0.769810, 0.787690, 0.818520, 0.879970", \ + "0.765000, 0.767030, 0.769370, 0.775280, 0.793160, 0.823990, 0.885440", \ + "0.773620, 0.775650, 0.777990, 0.783900, 0.801780, 0.832610, 0.894060", \ + "0.786270, 0.788300, 0.790640, 0.796550, 0.814430, 0.845260, 0.906710", \ + "0.805490, 0.807520, 0.809860, 0.815770, 0.833650, 0.864480, 0.925930" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.632544, 0.634694, 0.636964, 0.642674, 0.660844, 0.691204, 0.752484", \ + "0.632504, 0.634654, 0.636924, 0.642634, 0.660804, 0.691164, 0.752444", \ + "0.634104, 0.636254, 0.638524, 0.644234, 0.662404, 0.692764, 0.754044", \ + "0.639744, 0.641894, 0.644164, 0.649874, 0.668044, 0.698404, 0.759684", \ + "0.648664, 0.650814, 0.653084, 0.658794, 0.676964, 0.707324, 0.768604", \ + "0.660794, 0.662944, 0.665214, 0.670924, 0.689094, 0.719454, 0.780734", \ + "0.679974, 0.682124, 0.684394, 0.690104, 0.708274, 0.738634, 0.799914" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.733680, 0.737100, 0.739930, 0.748440, 0.774570, 0.818370, 0.906410", \ + "0.734180, 0.737600, 0.740430, 0.748940, 0.775070, 0.818870, 0.906910", \ + "0.736210, 0.739630, 0.742460, 0.750970, 0.777100, 0.820900, 0.908940", \ + "0.740840, 0.744260, 0.747090, 0.755600, 0.781730, 0.825530, 0.913570", \ + "0.749710, 0.753130, 0.755960, 0.764470, 0.790600, 0.834400, 0.922440", \ + "0.762520, 0.765940, 0.768770, 0.777280, 0.803410, 0.847210, 0.935250", \ + "0.782240, 0.785660, 0.788490, 0.797000, 0.823130, 0.866930, 0.954970" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.608447, 0.611817, 0.614727, 0.622977, 0.648867, 0.693117, 0.781147", \ + "0.608737, 0.612107, 0.615017, 0.623267, 0.649157, 0.693407, 0.781437", \ + "0.610697, 0.614067, 0.616977, 0.625227, 0.651117, 0.695367, 0.783397", \ + "0.615507, 0.618877, 0.621787, 0.630037, 0.655927, 0.700177, 0.788207", \ + "0.624627, 0.627997, 0.630907, 0.639157, 0.665047, 0.709297, 0.797327", \ + "0.636047, 0.639417, 0.642327, 0.650577, 0.676467, 0.720717, 0.808747", \ + "0.655347, 0.658717, 0.661627, 0.669877, 0.695767, 0.740017, 0.828047" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.816000, 0.818030, 0.820370, 0.826280, 0.844160, 0.874990, 0.936440", \ + "0.816190, 0.818220, 0.820560, 0.826470, 0.844350, 0.875180, 0.936630", \ + "0.817790, 0.819820, 0.822160, 0.828070, 0.845950, 0.876780, 0.938230", \ + "0.823260, 0.825290, 0.827630, 0.833540, 0.851420, 0.882250, 0.943700", \ + "0.831880, 0.833910, 0.836250, 0.842160, 0.860040, 0.890870, 0.952320", \ + "0.844530, 0.846560, 0.848900, 0.854810, 0.872690, 0.903520, 0.964970", \ + "0.863750, 0.865780, 0.868120, 0.874030, 0.891910, 0.922740, 0.984190" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.682065, 0.684216, 0.686486, 0.692196, 0.710365, 0.740726, 0.802006", \ + "0.682026, 0.684176, 0.686446, 0.692156, 0.710326, 0.740686, 0.801966", \ + "0.683625, 0.685776, 0.688046, 0.693756, 0.711925, 0.742286, 0.803566", \ + "0.689266, 0.691416, 0.693686, 0.699396, 0.717566, 0.747926, 0.809206", \ + "0.698186, 0.700335, 0.702605, 0.708316, 0.726486, 0.756846, 0.818126", \ + "0.710316, 0.712466, 0.714736, 0.720446, 0.738616, 0.768976, 0.830256", \ + "0.729496, 0.731646, 0.733916, 0.739626, 0.757796, 0.788156, 0.849436" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.791950, 0.795370, 0.798200, 0.806710, 0.832840, 0.876640, 0.964680", \ + "0.792450, 0.795870, 0.798700, 0.807210, 0.833340, 0.877140, 0.965180", \ + "0.794480, 0.797900, 0.800730, 0.809240, 0.835370, 0.879170, 0.967210", \ + "0.799110, 0.802530, 0.805360, 0.813870, 0.840000, 0.883800, 0.971840", \ + "0.807980, 0.811400, 0.814230, 0.822740, 0.848870, 0.892670, 0.980710", \ + "0.820790, 0.824210, 0.827040, 0.835550, 0.861680, 0.905480, 0.993520", \ + "0.840510, 0.843930, 0.846760, 0.855270, 0.881400, 0.925200, 1.013240" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.657977, 0.661347, 0.664257, 0.672507, 0.698397, 0.742647, 0.830677", \ + "0.658267, 0.661637, 0.664547, 0.672797, 0.698687, 0.742937, 0.830967", \ + "0.660227, 0.663597, 0.666507, 0.674757, 0.700647, 0.744897, 0.832927", \ + "0.665037, 0.668407, 0.671317, 0.679567, 0.705457, 0.749707, 0.837737", \ + "0.674157, 0.677527, 0.680437, 0.688687, 0.714577, 0.758827, 0.846857", \ + "0.685577, 0.688947, 0.691857, 0.700107, 0.725997, 0.770247, 0.858277", \ + "0.704877, 0.708247, 0.711157, 0.719407, 0.745297, 0.789547, 0.877576" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.866650, 0.868680, 0.871020, 0.876930, 0.894810, 0.925640, 0.987090", \ + "0.866840, 0.868870, 0.871210, 0.877120, 0.895000, 0.925830, 0.987280", \ + "0.868440, 0.870470, 0.872810, 0.878720, 0.896600, 0.927430, 0.988880", \ + "0.873910, 0.875940, 0.878280, 0.884190, 0.902070, 0.932900, 0.994350", \ + "0.882530, 0.884560, 0.886900, 0.892810, 0.910690, 0.941520, 1.002970", \ + "0.895180, 0.897210, 0.899550, 0.905460, 0.923340, 0.954170, 1.015620", \ + "0.914400, 0.916430, 0.918770, 0.924680, 0.942560, 0.973390, 1.034840" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.725127, 0.727276, 0.729546, 0.735257, 0.753426, 0.783787, 0.845067", \ + "0.725087, 0.727236, 0.729506, 0.735217, 0.753387, 0.783747, 0.845027", \ + "0.726687, 0.728836, 0.731106, 0.736817, 0.754987, 0.785347, 0.846627", \ + "0.732326, 0.734477, 0.736747, 0.742456, 0.760626, 0.790987, 0.852267", \ + "0.741247, 0.743397, 0.745667, 0.751377, 0.769547, 0.799906, 0.861186", \ + "0.753377, 0.755527, 0.757797, 0.763506, 0.781676, 0.812037, 0.873316", \ + "0.772556, 0.774707, 0.776977, 0.782686, 0.800856, 0.831217, 0.892496" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.842600, 0.846020, 0.848850, 0.857360, 0.883490, 0.927290, 1.015330", \ + "0.843100, 0.846520, 0.849350, 0.857860, 0.883990, 0.927790, 1.015830", \ + "0.845130, 0.848550, 0.851380, 0.859890, 0.886020, 0.929820, 1.017860", \ + "0.849760, 0.853180, 0.856010, 0.864520, 0.890650, 0.934450, 1.022490", \ + "0.858630, 0.862050, 0.864880, 0.873390, 0.899520, 0.943320, 1.031360", \ + "0.871440, 0.874860, 0.877690, 0.886200, 0.912330, 0.956130, 1.044170", \ + "0.891160, 0.894580, 0.897410, 0.905920, 0.932050, 0.975850, 1.063890" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.701029, 0.704399, 0.707309, 0.715559, 0.741449, 0.785699, 0.873729", \ + "0.701319, 0.704689, 0.707599, 0.715849, 0.741739, 0.785989, 0.874019", \ + "0.703279, 0.706649, 0.709559, 0.717809, 0.743699, 0.787949, 0.875979", \ + "0.708089, 0.711459, 0.714369, 0.722619, 0.748509, 0.792759, 0.880789", \ + "0.717209, 0.720579, 0.723489, 0.731739, 0.757629, 0.801879, 0.889909", \ + "0.728629, 0.731999, 0.734909, 0.743159, 0.769049, 0.813299, 0.901329", \ + "0.747929, 0.751299, 0.754209, 0.762459, 0.788349, 0.832599, 0.920629" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.640380, 0.642410, 0.644750, 0.650660, 0.668540, 0.699370, 0.760820", \ + "0.640570, 0.642600, 0.644940, 0.650850, 0.668730, 0.699560, 0.761010", \ + "0.642170, 0.644200, 0.646540, 0.652450, 0.670330, 0.701160, 0.762610", \ + "0.647640, 0.649670, 0.652010, 0.657920, 0.675800, 0.706630, 0.768080", \ + "0.656260, 0.658290, 0.660630, 0.666540, 0.684420, 0.715250, 0.776700", \ + "0.668910, 0.670940, 0.673280, 0.679190, 0.697070, 0.727900, 0.789350", \ + "0.688130, 0.690160, 0.692500, 0.698410, 0.716290, 0.747120, 0.808570" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.532789, 0.534939, 0.537209, 0.542919, 0.561089, 0.591449, 0.652729", \ + "0.532749, 0.534899, 0.537169, 0.542879, 0.561049, 0.591409, 0.652689", \ + "0.534349, 0.536498, 0.538769, 0.544479, 0.562649, 0.593009, 0.654289", \ + "0.539989, 0.542139, 0.544409, 0.550119, 0.568289, 0.598649, 0.659929", \ + "0.548909, 0.551059, 0.553329, 0.559038, 0.577209, 0.607569, 0.668849", \ + "0.561038, 0.563189, 0.565459, 0.571169, 0.589338, 0.619699, 0.680979", \ + "0.580219, 0.582369, 0.584639, 0.590349, 0.608519, 0.638879, 0.700159" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.616330, 0.619750, 0.622580, 0.631090, 0.657220, 0.701020, 0.789060", \ + "0.616830, 0.620250, 0.623080, 0.631590, 0.657720, 0.701520, 0.789560", \ + "0.618860, 0.622280, 0.625110, 0.633620, 0.659750, 0.703550, 0.791590", \ + "0.623490, 0.626910, 0.629740, 0.638250, 0.664380, 0.708180, 0.796220", \ + "0.632360, 0.635780, 0.638610, 0.647120, 0.673250, 0.717050, 0.805090", \ + "0.645170, 0.648590, 0.651420, 0.659930, 0.686060, 0.729860, 0.817900", \ + "0.664890, 0.668310, 0.671140, 0.679650, 0.705780, 0.749580, 0.837620" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.508699, 0.512069, 0.514979, 0.523230, 0.549119, 0.593369, 0.681399", \ + "0.508989, 0.512359, 0.515270, 0.523519, 0.549409, 0.593660, 0.681690", \ + "0.510949, 0.514320, 0.517230, 0.525479, 0.551370, 0.595619, 0.683650", \ + "0.515759, 0.519130, 0.522039, 0.530289, 0.556180, 0.600429, 0.688460", \ + "0.524879, 0.528250, 0.531160, 0.539409, 0.565300, 0.609549, 0.697580", \ + "0.536299, 0.539670, 0.542579, 0.550829, 0.576720, 0.620969, 0.709000", \ + "0.555600, 0.558970, 0.561879, 0.570129, 0.596019, 0.640270, 0.728299" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.641240, 0.643270, 0.645610, 0.651520, 0.669400, 0.700230, 0.761680", \ + "0.641430, 0.643460, 0.645800, 0.651710, 0.669590, 0.700420, 0.761870", \ + "0.643030, 0.645060, 0.647400, 0.653310, 0.671190, 0.702020, 0.763470", \ + "0.648500, 0.650530, 0.652870, 0.658780, 0.676660, 0.707490, 0.768940", \ + "0.657120, 0.659150, 0.661490, 0.667400, 0.685280, 0.716110, 0.777560", \ + "0.669770, 0.671800, 0.674140, 0.680050, 0.697930, 0.728760, 0.790210", \ + "0.688990, 0.691020, 0.693360, 0.699270, 0.717150, 0.747980, 0.809430" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.533519, 0.535670, 0.537940, 0.543650, 0.561819, 0.592179, 0.653459", \ + "0.533479, 0.535629, 0.537899, 0.543610, 0.561779, 0.592140, 0.653420", \ + "0.535079, 0.537230, 0.539500, 0.545210, 0.563379, 0.593739, 0.655019", \ + "0.540720, 0.542870, 0.545139, 0.550849, 0.569020, 0.599379, 0.660659", \ + "0.549640, 0.551789, 0.554059, 0.559770, 0.577940, 0.608299, 0.669579", \ + "0.561770, 0.563920, 0.566190, 0.571900, 0.590070, 0.620429, 0.681709", \ + "0.580950, 0.583099, 0.585369, 0.591079, 0.609249, 0.639609, 0.700889" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.617180, 0.620600, 0.623430, 0.631940, 0.658070, 0.701870, 0.789910", \ + "0.617680, 0.621100, 0.623930, 0.632440, 0.658570, 0.702370, 0.790410", \ + "0.619710, 0.623130, 0.625960, 0.634470, 0.660600, 0.704400, 0.792440", \ + "0.624340, 0.627760, 0.630590, 0.639100, 0.665230, 0.709030, 0.797070", \ + "0.633210, 0.636630, 0.639460, 0.647970, 0.674100, 0.717900, 0.805940", \ + "0.646020, 0.649440, 0.652270, 0.660780, 0.686910, 0.730710, 0.818750", \ + "0.665740, 0.669160, 0.671990, 0.680500, 0.706630, 0.750430, 0.838470" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.509422, 0.512792, 0.515702, 0.523952, 0.549842, 0.594092, 0.682122", \ + "0.509712, 0.513082, 0.515992, 0.524242, 0.550132, 0.594382, 0.682412", \ + "0.511672, 0.515042, 0.517952, 0.526202, 0.552092, 0.596342, 0.684372", \ + "0.516482, 0.519852, 0.522762, 0.531012, 0.556902, 0.601152, 0.689182", \ + "0.525602, 0.528972, 0.531882, 0.540132, 0.566022, 0.610272, 0.698302", \ + "0.537022, 0.540392, 0.543302, 0.551552, 0.577442, 0.621692, 0.709722", \ + "0.556322, 0.559692, 0.562602, 0.570852, 0.596742, 0.640992, 0.729022" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.645410, 0.647440, 0.649780, 0.655690, 0.673570, 0.704400, 0.765850", \ + "0.645600, 0.647630, 0.649970, 0.655880, 0.673760, 0.704590, 0.766040", \ + "0.647200, 0.649230, 0.651570, 0.657480, 0.675360, 0.706190, 0.767640", \ + "0.652670, 0.654700, 0.657040, 0.662950, 0.680830, 0.711660, 0.773110", \ + "0.661290, 0.663320, 0.665660, 0.671570, 0.689450, 0.720280, 0.781730", \ + "0.673940, 0.675970, 0.678310, 0.684220, 0.702100, 0.732930, 0.794380", \ + "0.693160, 0.695190, 0.697530, 0.703440, 0.721320, 0.752150, 0.813600" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.537064, 0.539214, 0.541484, 0.547194, 0.565364, 0.595724, 0.657004", \ + "0.537024, 0.539174, 0.541444, 0.547154, 0.565324, 0.595684, 0.656964", \ + "0.538624, 0.540774, 0.543044, 0.548754, 0.566924, 0.597284, 0.658564", \ + "0.544264, 0.546414, 0.548684, 0.554394, 0.572564, 0.602924, 0.664204", \ + "0.553184, 0.555334, 0.557604, 0.563314, 0.581484, 0.611844, 0.673124", \ + "0.565314, 0.567464, 0.569734, 0.575444, 0.593614, 0.623974, 0.685254", \ + "0.584494, 0.586644, 0.588914, 0.594624, 0.612794, 0.643154, 0.704434" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.621350, 0.624770, 0.627600, 0.636110, 0.662240, 0.706040, 0.794080", \ + "0.621850, 0.625270, 0.628100, 0.636610, 0.662740, 0.706540, 0.794580", \ + "0.623880, 0.627300, 0.630130, 0.638640, 0.664770, 0.708570, 0.796610", \ + "0.628510, 0.631930, 0.634760, 0.643270, 0.669400, 0.713200, 0.801240", \ + "0.637380, 0.640800, 0.643630, 0.652140, 0.678270, 0.722070, 0.810110", \ + "0.650190, 0.653610, 0.656440, 0.664950, 0.691080, 0.734880, 0.822920", \ + "0.669910, 0.673330, 0.676160, 0.684670, 0.710800, 0.754600, 0.842640" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.512966, 0.516336, 0.519246, 0.527497, 0.553387, 0.597637, 0.685666", \ + "0.513257, 0.516626, 0.519537, 0.527786, 0.553677, 0.597927, 0.685957", \ + "0.515216, 0.518587, 0.521497, 0.529747, 0.555637, 0.599886, 0.687917", \ + "0.520026, 0.523397, 0.526307, 0.534556, 0.560447, 0.604696, 0.692727", \ + "0.529146, 0.532517, 0.535427, 0.543677, 0.569567, 0.613816, 0.701847", \ + "0.540566, 0.543937, 0.546847, 0.555096, 0.580987, 0.625236, 0.713267", \ + "0.559867, 0.563237, 0.566146, 0.574396, 0.600286, 0.644537, 0.732566" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.647760, 0.649790, 0.652130, 0.658040, 0.675920, 0.706750, 0.768200", \ + "0.647950, 0.649980, 0.652320, 0.658230, 0.676110, 0.706940, 0.768390", \ + "0.649550, 0.651580, 0.653920, 0.659830, 0.677710, 0.708540, 0.769990", \ + "0.655020, 0.657050, 0.659390, 0.665300, 0.683180, 0.714010, 0.775460", \ + "0.663640, 0.665670, 0.668010, 0.673920, 0.691800, 0.722630, 0.784080", \ + "0.676290, 0.678320, 0.680660, 0.686570, 0.704450, 0.735280, 0.796730", \ + "0.695510, 0.697540, 0.699880, 0.705790, 0.723670, 0.754500, 0.815950" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.539062, 0.541211, 0.543481, 0.549192, 0.567362, 0.597722, 0.659002", \ + "0.539022, 0.541171, 0.543441, 0.549152, 0.567322, 0.597681, 0.658961", \ + "0.540622, 0.542771, 0.545041, 0.550752, 0.568922, 0.599282, 0.660562", \ + "0.546261, 0.548412, 0.550682, 0.556391, 0.574561, 0.604922, 0.666202", \ + "0.555181, 0.557332, 0.559602, 0.565311, 0.583481, 0.613841, 0.675121", \ + "0.567311, 0.569462, 0.571732, 0.577441, 0.595611, 0.625972, 0.687251", \ + "0.586491, 0.588642, 0.590912, 0.596621, 0.614791, 0.645152, 0.706432" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.623700, 0.627120, 0.629950, 0.638460, 0.664590, 0.708390, 0.796430", \ + "0.624200, 0.627620, 0.630450, 0.638960, 0.665090, 0.708890, 0.796930", \ + "0.626230, 0.629650, 0.632480, 0.640990, 0.667120, 0.710920, 0.798960", \ + "0.630860, 0.634280, 0.637110, 0.645620, 0.671750, 0.715550, 0.803590", \ + "0.639730, 0.643150, 0.645980, 0.654490, 0.680620, 0.724420, 0.812460", \ + "0.652540, 0.655960, 0.658790, 0.667300, 0.693430, 0.737230, 0.825270", \ + "0.672260, 0.675680, 0.678510, 0.687020, 0.713150, 0.756950, 0.844990" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.514964, 0.518334, 0.521244, 0.529494, 0.555384, 0.599634, 0.687664", \ + "0.515254, 0.518624, 0.521534, 0.529784, 0.555674, 0.599924, 0.687954", \ + "0.517214, 0.520584, 0.523494, 0.531744, 0.557634, 0.601884, 0.689914", \ + "0.522024, 0.525394, 0.528304, 0.536554, 0.562444, 0.606694, 0.694724", \ + "0.531144, 0.534514, 0.537424, 0.545674, 0.571564, 0.615814, 0.703844", \ + "0.542564, 0.545934, 0.548844, 0.557094, 0.582984, 0.627234, 0.715264", \ + "0.561864, 0.565234, 0.568144, 0.576394, 0.602284, 0.646534, 0.734564" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.707870, 0.709900, 0.712240, 0.718150, 0.736030, 0.766860, 0.828310", \ + "0.708060, 0.710090, 0.712430, 0.718340, 0.736220, 0.767050, 0.828500", \ + "0.709660, 0.711690, 0.714030, 0.719940, 0.737820, 0.768650, 0.830100", \ + "0.715130, 0.717160, 0.719500, 0.725410, 0.743290, 0.774120, 0.835570", \ + "0.723750, 0.725780, 0.728120, 0.734030, 0.751910, 0.782740, 0.844190", \ + "0.736400, 0.738430, 0.740770, 0.746680, 0.764560, 0.795390, 0.856840", \ + "0.755620, 0.757650, 0.759990, 0.765900, 0.783780, 0.814610, 0.876060" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.590155, 0.592305, 0.594575, 0.600285, 0.618455, 0.648815, 0.710095", \ + "0.590115, 0.592265, 0.594535, 0.600245, 0.618415, 0.648775, 0.710055", \ + "0.591715, 0.593865, 0.596135, 0.601845, 0.620015, 0.650375, 0.711655", \ + "0.597355, 0.599505, 0.601775, 0.607485, 0.625655, 0.656015, 0.717295", \ + "0.606275, 0.608425, 0.610695, 0.616405, 0.634575, 0.664935, 0.726215", \ + "0.618405, 0.620555, 0.622825, 0.628535, 0.646705, 0.677065, 0.738345", \ + "0.637585, 0.639735, 0.642005, 0.647715, 0.665885, 0.696245, 0.757525" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.683820, 0.687240, 0.690070, 0.698580, 0.724710, 0.768510, 0.856550", \ + "0.684320, 0.687740, 0.690570, 0.699080, 0.725210, 0.769010, 0.857050", \ + "0.686350, 0.689770, 0.692600, 0.701110, 0.727240, 0.771040, 0.859080", \ + "0.690980, 0.694400, 0.697230, 0.705740, 0.731870, 0.775670, 0.863710", \ + "0.699850, 0.703270, 0.706100, 0.714610, 0.740740, 0.784540, 0.872580", \ + "0.712660, 0.716080, 0.718910, 0.727420, 0.753550, 0.797350, 0.885390", \ + "0.732380, 0.735800, 0.738630, 0.747140, 0.773270, 0.817070, 0.905110" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.566066, 0.569436, 0.572346, 0.580596, 0.606486, 0.650736, 0.738766", \ + "0.566356, 0.569726, 0.572636, 0.580886, 0.606776, 0.651026, 0.739056", \ + "0.568316, 0.571686, 0.574596, 0.582846, 0.608736, 0.652986, 0.741016", \ + "0.573126, 0.576496, 0.579406, 0.587656, 0.613546, 0.657796, 0.745826", \ + "0.582246, 0.585616, 0.588526, 0.596776, 0.622666, 0.666916, 0.754946", \ + "0.593666, 0.597036, 0.599946, 0.608196, 0.634086, 0.678336, 0.766366", \ + "0.612966, 0.616336, 0.619246, 0.627496, 0.653386, 0.697636, 0.785666" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.757740, 0.759770, 0.762110, 0.768020, 0.785900, 0.816730, 0.878180", \ + "0.757930, 0.759960, 0.762300, 0.768210, 0.786090, 0.816920, 0.878370", \ + "0.759530, 0.761560, 0.763900, 0.769810, 0.787690, 0.818520, 0.879970", \ + "0.765000, 0.767030, 0.769370, 0.775280, 0.793160, 0.823990, 0.885440", \ + "0.773620, 0.775650, 0.777990, 0.783900, 0.801780, 0.832610, 0.894060", \ + "0.786270, 0.788300, 0.790640, 0.796550, 0.814430, 0.845260, 0.906710", \ + "0.805490, 0.807520, 0.809860, 0.815770, 0.833650, 0.864480, 0.925930" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.632544, 0.634694, 0.636964, 0.642674, 0.660844, 0.691204, 0.752484", \ + "0.632504, 0.634654, 0.636924, 0.642634, 0.660804, 0.691164, 0.752444", \ + "0.634104, 0.636254, 0.638524, 0.644234, 0.662404, 0.692764, 0.754044", \ + "0.639744, 0.641894, 0.644164, 0.649874, 0.668044, 0.698404, 0.759684", \ + "0.648664, 0.650814, 0.653084, 0.658794, 0.676964, 0.707324, 0.768604", \ + "0.660794, 0.662944, 0.665214, 0.670924, 0.689094, 0.719454, 0.780734", \ + "0.679974, 0.682124, 0.684394, 0.690104, 0.708274, 0.738634, 0.799914" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.733680, 0.737100, 0.739930, 0.748440, 0.774570, 0.818370, 0.906410", \ + "0.734180, 0.737600, 0.740430, 0.748940, 0.775070, 0.818870, 0.906910", \ + "0.736210, 0.739630, 0.742460, 0.750970, 0.777100, 0.820900, 0.908940", \ + "0.740840, 0.744260, 0.747090, 0.755600, 0.781730, 0.825530, 0.913570", \ + "0.749710, 0.753130, 0.755960, 0.764470, 0.790600, 0.834400, 0.922440", \ + "0.762520, 0.765940, 0.768770, 0.777280, 0.803410, 0.847210, 0.935250", \ + "0.782240, 0.785660, 0.788490, 0.797000, 0.823130, 0.866930, 0.954970" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.608447, 0.611817, 0.614727, 0.622977, 0.648867, 0.693117, 0.781147", \ + "0.608737, 0.612107, 0.615017, 0.623267, 0.649157, 0.693407, 0.781437", \ + "0.610697, 0.614067, 0.616977, 0.625227, 0.651117, 0.695367, 0.783397", \ + "0.615507, 0.618877, 0.621787, 0.630037, 0.655927, 0.700177, 0.788207", \ + "0.624627, 0.627997, 0.630907, 0.639157, 0.665047, 0.709297, 0.797327", \ + "0.636047, 0.639417, 0.642327, 0.650577, 0.676467, 0.720717, 0.808747", \ + "0.655347, 0.658717, 0.661627, 0.669877, 0.695767, 0.740017, 0.828047" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.816000, 0.818030, 0.820370, 0.826280, 0.844160, 0.874990, 0.936440", \ + "0.816190, 0.818220, 0.820560, 0.826470, 0.844350, 0.875180, 0.936630", \ + "0.817790, 0.819820, 0.822160, 0.828070, 0.845950, 0.876780, 0.938230", \ + "0.823260, 0.825290, 0.827630, 0.833540, 0.851420, 0.882250, 0.943700", \ + "0.831880, 0.833910, 0.836250, 0.842160, 0.860040, 0.890870, 0.952320", \ + "0.844530, 0.846560, 0.848900, 0.854810, 0.872690, 0.903520, 0.964970", \ + "0.863750, 0.865780, 0.868120, 0.874030, 0.891910, 0.922740, 0.984190" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.682065, 0.684216, 0.686486, 0.692196, 0.710365, 0.740726, 0.802006", \ + "0.682026, 0.684176, 0.686446, 0.692156, 0.710326, 0.740686, 0.801966", \ + "0.683625, 0.685776, 0.688046, 0.693756, 0.711925, 0.742286, 0.803566", \ + "0.689266, 0.691416, 0.693686, 0.699396, 0.717566, 0.747926, 0.809206", \ + "0.698186, 0.700335, 0.702605, 0.708316, 0.726486, 0.756846, 0.818126", \ + "0.710316, 0.712466, 0.714736, 0.720446, 0.738616, 0.768976, 0.830256", \ + "0.729496, 0.731646, 0.733916, 0.739626, 0.757796, 0.788156, 0.849436" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.791950, 0.795370, 0.798200, 0.806710, 0.832840, 0.876640, 0.964680", \ + "0.792450, 0.795870, 0.798700, 0.807210, 0.833340, 0.877140, 0.965180", \ + "0.794480, 0.797900, 0.800730, 0.809240, 0.835370, 0.879170, 0.967210", \ + "0.799110, 0.802530, 0.805360, 0.813870, 0.840000, 0.883800, 0.971840", \ + "0.807980, 0.811400, 0.814230, 0.822740, 0.848870, 0.892670, 0.980710", \ + "0.820790, 0.824210, 0.827040, 0.835550, 0.861680, 0.905480, 0.993520", \ + "0.840510, 0.843930, 0.846760, 0.855270, 0.881400, 0.925200, 1.013240" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.657977, 0.661347, 0.664257, 0.672507, 0.698397, 0.742647, 0.830677", \ + "0.658267, 0.661637, 0.664547, 0.672797, 0.698687, 0.742937, 0.830967", \ + "0.660227, 0.663597, 0.666507, 0.674757, 0.700647, 0.744897, 0.832927", \ + "0.665037, 0.668407, 0.671317, 0.679567, 0.705457, 0.749707, 0.837737", \ + "0.674157, 0.677527, 0.680437, 0.688687, 0.714577, 0.758827, 0.846857", \ + "0.685577, 0.688947, 0.691857, 0.700107, 0.725997, 0.770247, 0.858277", \ + "0.704877, 0.708247, 0.711157, 0.719407, 0.745297, 0.789547, 0.877576" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.866650, 0.868680, 0.871020, 0.876930, 0.894810, 0.925640, 0.987090", \ + "0.866840, 0.868870, 0.871210, 0.877120, 0.895000, 0.925830, 0.987280", \ + "0.868440, 0.870470, 0.872810, 0.878720, 0.896600, 0.927430, 0.988880", \ + "0.873910, 0.875940, 0.878280, 0.884190, 0.902070, 0.932900, 0.994350", \ + "0.882530, 0.884560, 0.886900, 0.892810, 0.910690, 0.941520, 1.002970", \ + "0.895180, 0.897210, 0.899550, 0.905460, 0.923340, 0.954170, 1.015620", \ + "0.914400, 0.916430, 0.918770, 0.924680, 0.942560, 0.973390, 1.034840" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.725127, 0.727276, 0.729546, 0.735257, 0.753426, 0.783787, 0.845067", \ + "0.725087, 0.727236, 0.729506, 0.735217, 0.753387, 0.783747, 0.845027", \ + "0.726687, 0.728836, 0.731106, 0.736817, 0.754987, 0.785347, 0.846627", \ + "0.732326, 0.734477, 0.736747, 0.742456, 0.760626, 0.790987, 0.852267", \ + "0.741247, 0.743397, 0.745667, 0.751377, 0.769547, 0.799906, 0.861186", \ + "0.753377, 0.755527, 0.757797, 0.763506, 0.781676, 0.812037, 0.873316", \ + "0.772556, 0.774707, 0.776977, 0.782686, 0.800856, 0.831217, 0.892496" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.842600, 0.846020, 0.848850, 0.857360, 0.883490, 0.927290, 1.015330", \ + "0.843100, 0.846520, 0.849350, 0.857860, 0.883990, 0.927790, 1.015830", \ + "0.845130, 0.848550, 0.851380, 0.859890, 0.886020, 0.929820, 1.017860", \ + "0.849760, 0.853180, 0.856010, 0.864520, 0.890650, 0.934450, 1.022490", \ + "0.858630, 0.862050, 0.864880, 0.873390, 0.899520, 0.943320, 1.031360", \ + "0.871440, 0.874860, 0.877690, 0.886200, 0.912330, 0.956130, 1.044170", \ + "0.891160, 0.894580, 0.897410, 0.905920, 0.932050, 0.975850, 1.063890" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.701029, 0.704399, 0.707309, 0.715559, 0.741449, 0.785699, 0.873729", \ + "0.701319, 0.704689, 0.707599, 0.715849, 0.741739, 0.785989, 0.874019", \ + "0.703279, 0.706649, 0.709559, 0.717809, 0.743699, 0.787949, 0.875979", \ + "0.708089, 0.711459, 0.714369, 0.722619, 0.748509, 0.792759, 0.880789", \ + "0.717209, 0.720579, 0.723489, 0.731739, 0.757629, 0.801879, 0.889909", \ + "0.728629, 0.731999, 0.734909, 0.743159, 0.769049, 0.813299, 0.901329", \ + "0.747929, 0.751299, 0.754209, 0.762459, 0.788349, 0.832599, 0.920629" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244" \ + ); + } + } + } + bus(SOB) { + bus_type : rf2_32x128_wm1_SOB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : CLKB; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.265850, 0.268960, 0.271770, 0.278270, 0.296030, 0.325530, 0.384530", \ + "0.266720, 0.269830, 0.272640, 0.279140, 0.296900, 0.326400, 0.385400", \ + "0.269030, 0.272140, 0.274950, 0.281450, 0.299210, 0.328710, 0.387710", \ + "0.273740, 0.276850, 0.279660, 0.286160, 0.303920, 0.333420, 0.392420", \ + "0.282170, 0.285280, 0.288090, 0.294590, 0.312350, 0.341850, 0.400850", \ + "0.294550, 0.297660, 0.300470, 0.306970, 0.324730, 0.354230, 0.413230", \ + "0.310720, 0.313830, 0.316640, 0.323140, 0.340900, 0.370400, 0.429400" \ + ); + } + retaining_rise(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.225063, 0.228173, 0.230973, 0.237463, 0.255243, 0.284743, 0.343733", \ + "0.225583, 0.228693, 0.231493, 0.237983, 0.255763, 0.285263, 0.344253", \ + "0.228233, 0.231343, 0.234143, 0.240633, 0.258413, 0.287913, 0.346903", \ + "0.232933, 0.236043, 0.238843, 0.245333, 0.263113, 0.292613, 0.351603", \ + "0.241383, 0.244493, 0.247293, 0.253783, 0.271563, 0.301063, 0.360053", \ + "0.253763, 0.256873, 0.259673, 0.266163, 0.283943, 0.313443, 0.372433", \ + "0.269843, 0.272953, 0.275753, 0.282243, 0.300023, 0.329523, 0.388513" \ + ); + } + rise_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806" \ + ); + } + retain_rise_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806" \ + ); + } + cell_fall(rf2_32x128_wm1_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.254600, 0.258870, 0.262810, 0.272020, 0.298950, 0.343920, 0.433720", \ + "0.255720, 0.259990, 0.263930, 0.273140, 0.300070, 0.345040, 0.434840", \ + "0.257720, 0.261990, 0.265930, 0.275140, 0.302070, 0.347040, 0.436840", \ + "0.262300, 0.266570, 0.270510, 0.279720, 0.306650, 0.351620, 0.441420", \ + "0.271420, 0.275690, 0.279630, 0.288840, 0.315770, 0.360740, 0.450540", \ + "0.283570, 0.287840, 0.291780, 0.300990, 0.327920, 0.372890, 0.462690", \ + "0.300160, 0.304430, 0.308370, 0.317580, 0.344510, 0.389480, 0.479280" \ + ); + } + retaining_fall(rf2_32x128_wm1_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.215815, 0.220085, 0.223965, 0.233175, 0.260095, 0.305115, 0.394865", \ + "0.216945, 0.221215, 0.225095, 0.234305, 0.261225, 0.306245, 0.395995", \ + "0.218925, 0.223195, 0.227075, 0.236285, 0.263205, 0.308225, 0.397975", \ + "0.223505, 0.227775, 0.231655, 0.240865, 0.267785, 0.312805, 0.402555", \ + "0.232645, 0.236915, 0.240795, 0.250005, 0.276925, 0.321945, 0.411695", \ + "0.244775, 0.249045, 0.252925, 0.262135, 0.289055, 0.334075, 0.423825", \ + "0.261385, 0.265655, 0.269535, 0.278745, 0.305665, 0.350685, 0.440435" \ + ); + } + fall_transition(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867" \ + ); + } + retain_fall_slew(rf2_32x128_wm1_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867" \ + ); + } + } + internal_power() { + related_pin : CLKB; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615" \ + ); + } + fall_power(rf2_32x128_wm1_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244" \ + ); + } + } + } + pin(CLKA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.009116; + clock : true; + max_transition : 0.301000; + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.124392, 5.129518, 5.134645, 5.139780, 5.144917, 5.150061, 5.155215"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.124736, 5.129862, 5.134990, 5.140125, 5.145261, 5.150407, 5.155562"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.137966, 5.143101, 5.148247, 5.153391, 5.158545, 5.163709, 5.168873"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.138080, 5.143216, 5.148361, 5.153506, 5.158661, 5.163824, 5.168988"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.179894, 5.185070, 5.190255, 5.195449, 5.200644, 5.205847, 5.211050"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.182302, 5.187480, 5.192668, 5.197865, 5.203061, 5.208267, 5.213473"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.184207, 5.189387, 5.194577, 5.199775, 5.204974, 5.210182, 5.215389"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.194660, 5.199852, 5.205052, 5.210262, 5.215471, 5.220681, 5.225909"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENA&TENA)|(TCENA&!TENA))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.007269, 0.007276, 0.007283, 0.007290, 0.007298, 0.007305, 0.007840"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.008076, 0.008084, 0.008092, 0.008100, 0.008109, 0.008117, 0.008711"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.007269, 0.007276, 0.007283, 0.007290, 0.007298, 0.007305, 0.007840"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.008076, 0.008084, 0.008092, 0.008100, 0.008109, 0.008117, 0.008711"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("4.722126, 4.722635, 4.723071, 4.727791, 4.732520, 4.737267, 4.742007"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011657, 0.011669, 0.011681, 0.011692, 0.011704, 0.011746, 0.012249"); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.593038, 0.593228, 0.595891, 0.600128, 0.609098, 0.621928, 0.714308", \ + "0.592890, 0.593080, 0.595743, 0.599980, 0.608950, 0.621780, 0.714160", \ + "0.589682, 0.589872, 0.592535, 0.596772, 0.605742, 0.618572, 0.710952", \ + "0.586200, 0.586390, 0.589053, 0.593290, 0.602260, 0.615090, 0.707470", \ + "0.576581, 0.576771, 0.579434, 0.583671, 0.592641, 0.605471, 0.697851", \ + "0.563971, 0.564161, 0.566824, 0.571061, 0.580031, 0.592861, 0.685241", \ + "0.624461, 0.624651, 0.627314, 0.631551, 0.640521, 0.653351, 0.745731" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.593888, 0.594078, 0.596741, 0.600978, 0.609948, 0.622778, 0.715158", \ + "0.593740, 0.593930, 0.596593, 0.600830, 0.609800, 0.622630, 0.715010", \ + "0.590532, 0.590722, 0.593385, 0.597622, 0.606592, 0.619422, 0.711802", \ + "0.587050, 0.587240, 0.589903, 0.594140, 0.603110, 0.615940, 0.708320", \ + "0.577431, 0.577621, 0.580284, 0.584521, 0.593491, 0.606321, 0.698701", \ + "0.564821, 0.565011, 0.567674, 0.571911, 0.580881, 0.593711, 0.686091", \ + "0.625311, 0.625501, 0.628164, 0.632401, 0.641371, 0.654201, 0.746581" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.598058, 0.598248, 0.600911, 0.605148, 0.614118, 0.626948, 0.719328", \ + "0.597910, 0.598100, 0.600763, 0.605000, 0.613970, 0.626800, 0.719180", \ + "0.594702, 0.594892, 0.597555, 0.601792, 0.610762, 0.623592, 0.715972", \ + "0.591220, 0.591410, 0.594073, 0.598310, 0.607280, 0.620110, 0.712490", \ + "0.581601, 0.581791, 0.584454, 0.588691, 0.597661, 0.610491, 0.702871", \ + "0.568991, 0.569181, 0.571844, 0.576081, 0.585051, 0.597881, 0.690261", \ + "0.629481, 0.629671, 0.632334, 0.636571, 0.645541, 0.658371, 0.750751" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.600408, 0.600598, 0.603261, 0.607498, 0.616468, 0.629298, 0.721678", \ + "0.600260, 0.600450, 0.603113, 0.607350, 0.616320, 0.629150, 0.721530", \ + "0.597052, 0.597242, 0.599905, 0.604142, 0.613112, 0.625942, 0.718322", \ + "0.593570, 0.593760, 0.596423, 0.600660, 0.609630, 0.622460, 0.714840", \ + "0.583951, 0.584141, 0.586804, 0.591041, 0.600011, 0.612841, 0.705221", \ + "0.571341, 0.571531, 0.574194, 0.578431, 0.587401, 0.600231, 0.692611", \ + "0.631831, 0.632021, 0.634684, 0.638921, 0.647891, 0.660721, 0.753101" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.660528, 0.660718, 0.663381, 0.667618, 0.676588, 0.689418, 0.781798", \ + "0.660380, 0.660570, 0.663233, 0.667470, 0.676440, 0.689270, 0.781650", \ + "0.657172, 0.657362, 0.660025, 0.664262, 0.673232, 0.686062, 0.778442", \ + "0.653690, 0.653880, 0.656543, 0.660780, 0.669750, 0.682580, 0.774960", \ + "0.644071, 0.644261, 0.646924, 0.651161, 0.660131, 0.672961, 0.765341", \ + "0.631461, 0.631651, 0.634314, 0.638551, 0.647521, 0.660351, 0.752731", \ + "0.691951, 0.692141, 0.694804, 0.699041, 0.708011, 0.720841, 0.813221" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.710388, 0.710578, 0.713241, 0.717478, 0.726448, 0.739278, 0.831658", \ + "0.710240, 0.710430, 0.713093, 0.717330, 0.726300, 0.739130, 0.831510", \ + "0.707032, 0.707222, 0.709885, 0.714122, 0.723092, 0.735922, 0.828302", \ + "0.703550, 0.703740, 0.706403, 0.710640, 0.719610, 0.732440, 0.824820", \ + "0.693931, 0.694121, 0.696784, 0.701021, 0.709991, 0.722821, 0.815201", \ + "0.681321, 0.681511, 0.684174, 0.688411, 0.697381, 0.710211, 0.802591", \ + "0.741811, 0.742001, 0.744664, 0.748901, 0.757871, 0.770701, 0.863081" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.768658, 0.768848, 0.771511, 0.775748, 0.784718, 0.797548, 0.889928", \ + "0.768510, 0.768700, 0.771363, 0.775600, 0.784570, 0.797400, 0.889780", \ + "0.765302, 0.765492, 0.768155, 0.772392, 0.781362, 0.794192, 0.886572", \ + "0.761820, 0.762010, 0.764673, 0.768910, 0.777880, 0.790710, 0.883090", \ + "0.752201, 0.752391, 0.755054, 0.759291, 0.768261, 0.781091, 0.873471", \ + "0.739591, 0.739781, 0.742444, 0.746681, 0.755651, 0.768481, 0.860861", \ + "0.800081, 0.800271, 0.802934, 0.807171, 0.816141, 0.828971, 0.921351" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.819308, 0.819498, 0.822161, 0.826398, 0.835368, 0.848198, 0.940578", \ + "0.819160, 0.819350, 0.822013, 0.826250, 0.835220, 0.848050, 0.940430", \ + "0.815952, 0.816142, 0.818805, 0.823042, 0.832012, 0.844842, 0.937222", \ + "0.812470, 0.812660, 0.815323, 0.819560, 0.828530, 0.841360, 0.933740", \ + "0.802851, 0.803041, 0.805704, 0.809941, 0.818911, 0.831741, 0.924121", \ + "0.790241, 0.790431, 0.793094, 0.797331, 0.806301, 0.819131, 0.911511", \ + "0.850731, 0.850921, 0.853584, 0.857821, 0.866791, 0.879621, 0.972001" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.928664; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.929537; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.933770; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.936155; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.997166; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 1.047815; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.106888; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 1.158348; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.011884; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.012757; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 1.016989; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.019375; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 1.080396; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.131045; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 1.190118; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.241578; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + } + min_pulse_width_high : 0.113338; + min_pulse_width_low : 0.113502; + } + pin(CENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001339; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.098133, 0.099266, 0.101513, 0.106297, 0.117582, 0.128962, 0.220732", \ + "0.097696, 0.098829, 0.101076, 0.105860, 0.117145, 0.128525, 0.220295", \ + "0.097455, 0.098588, 0.100835, 0.105619, 0.116904, 0.128284, 0.220054", \ + "0.097773, 0.098906, 0.101153, 0.105937, 0.117222, 0.128602, 0.220372", \ + "0.098147, 0.099280, 0.101527, 0.106311, 0.117596, 0.128976, 0.220746", \ + "0.103866, 0.104999, 0.107246, 0.112030, 0.123315, 0.134695, 0.226465", \ + "0.189192, 0.190325, 0.192572, 0.197356, 0.208641, 0.220021, 0.311791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.105697, 0.106690, 0.109925, 0.115198, 0.126548, 0.141168, 0.241618", \ + "0.104617, 0.105610, 0.108845, 0.114118, 0.125468, 0.140088, 0.240538", \ + "0.102978, 0.103971, 0.107206, 0.112479, 0.123829, 0.138449, 0.238899", \ + "0.098432, 0.099425, 0.102660, 0.107933, 0.119283, 0.133903, 0.234353", \ + "0.089362, 0.090355, 0.093590, 0.098863, 0.110213, 0.124833, 0.225283", \ + "0.092401, 0.093569, 0.096509, 0.101718, 0.113030, 0.125616, 0.226506", \ + "0.177725, 0.178893, 0.181833, 0.187042, 0.198354, 0.210940, 0.311830" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.050687, 0.049634, 0.047246, 0.042878, 0.033548, 0.023802, 0.090250", \ + "0.051595, 0.050542, 0.048154, 0.043786, 0.034456, 0.024710, 0.090250", \ + "0.053311, 0.052258, 0.049870, 0.045502, 0.036172, 0.026426, 0.090250", \ + "0.057492, 0.056439, 0.054051, 0.049683, 0.040353, 0.030607, 0.092934", \ + "0.066059, 0.065006, 0.062618, 0.058250, 0.048920, 0.039174, 0.101501", \ + "0.076883, 0.075830, 0.073442, 0.069074, 0.059744, 0.049998, 0.112325", \ + "0.169165, 0.168159, 0.165822, 0.161193, 0.151003, 0.139702, 0.201684" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.044670, 0.044820, 0.040710, 0.034987, 0.024130, 0.015000, 0.090250", \ + "0.045470, 0.045620, 0.041510, 0.035787, 0.024930, 0.015000, 0.090250", \ + "0.047214, 0.047364, 0.043254, 0.037531, 0.026674, 0.015383, 0.090250", \ + "0.051741, 0.051891, 0.047781, 0.042058, 0.031201, 0.019910, 0.090250", \ + "0.061285, 0.061435, 0.057325, 0.051602, 0.040745, 0.029454, 0.090250", \ + "0.073625, 0.073775, 0.069665, 0.063942, 0.053085, 0.041794, 0.092966", \ + "0.166666, 0.166816, 0.162706, 0.156983, 0.146126, 0.134835, 0.186007" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.035502", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.036193", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.038322", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.042733", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.051385", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.063741", \ + "1.076670, 1.075578, 1.073822, 1.072066, 1.073122, 1.074282, 1.080260" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.376812, 0.374822, 0.372842, 0.368402, 0.357652, 0.341082, 0.319872", \ + "0.380792, 0.378802, 0.376822, 0.372382, 0.361632, 0.345062, 0.323852", \ + "0.384762, 0.382772, 0.380792, 0.376352, 0.365602, 0.349032, 0.327822", \ + "0.393652, 0.391662, 0.389682, 0.385242, 0.374492, 0.357922, 0.336712", \ + "0.415132, 0.413142, 0.411162, 0.406722, 0.395972, 0.379402, 0.358192", \ + "0.448272, 0.446282, 0.444302, 0.439862, 0.429112, 0.412542, 0.391332", \ + "0.490692, 0.488702, 0.486722, 0.482282, 0.471532, 0.454962, 0.433752" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.029087, 0.029172, 0.029201, 0.029230, 0.029259, 0.029289, 0.029318"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.051401, 0.051453, 0.051504, 0.051556, 0.051607, 0.051659, 0.051710"); + } + } + } + bus(AA) { + bus_type : rf2_32x128_wm1_AA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001582; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.121780, 0.123100, 0.125860, 0.132070, 0.143500, 0.162570, 0.269280", \ + "0.120410, 0.121730, 0.124490, 0.130700, 0.142130, 0.161200, 0.267910", \ + "0.119100, 0.120420, 0.123180, 0.129390, 0.140820, 0.159890, 0.266600", \ + "0.114510, 0.115830, 0.118590, 0.124800, 0.136230, 0.155300, 0.262010", \ + "0.104818, 0.106138, 0.108898, 0.115108, 0.126538, 0.145608, 0.252318", \ + "0.092302, 0.093622, 0.096382, 0.102592, 0.114022, 0.133092, 0.239802", \ + "0.151377, 0.152697, 0.155457, 0.161667, 0.173097, 0.192167, 0.298877" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.121780, 0.123100, 0.125860, 0.132070, 0.143500, 0.162570, 0.269280", \ + "0.120410, 0.121730, 0.124490, 0.130700, 0.142130, 0.161200, 0.267910", \ + "0.119100, 0.120420, 0.123180, 0.129390, 0.140820, 0.159890, 0.266600", \ + "0.114510, 0.115830, 0.118590, 0.124800, 0.136230, 0.155300, 0.262010", \ + "0.104818, 0.106138, 0.108898, 0.115108, 0.126538, 0.145608, 0.252318", \ + "0.092302, 0.093622, 0.096382, 0.102592, 0.114022, 0.133092, 0.239802", \ + "0.151377, 0.152697, 0.155457, 0.161667, 0.173097, 0.192167, 0.298877" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.077957, 0.077232, 0.074531, 0.071873, 0.065950, 0.064610, 0.144263", \ + "0.078756, 0.078031, 0.075330, 0.072672, 0.066749, 0.065409, 0.145062", \ + "0.080499, 0.079774, 0.077073, 0.074415, 0.068492, 0.067152, 0.146805", \ + "0.085030, 0.084305, 0.081604, 0.078946, 0.073023, 0.071683, 0.151336", \ + "0.094140, 0.093415, 0.090714, 0.088056, 0.082133, 0.080793, 0.160446", \ + "0.105471, 0.104746, 0.102045, 0.099387, 0.093464, 0.092124, 0.171777", \ + "0.199767, 0.199042, 0.196341, 0.193683, 0.187760, 0.186420, 0.266073" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.079145, 0.078323, 0.075755, 0.072711, 0.065607, 0.062879, 0.132456", \ + "0.079944, 0.079122, 0.076554, 0.073510, 0.066406, 0.063678, 0.133255", \ + "0.081687, 0.080865, 0.078297, 0.075253, 0.068149, 0.065421, 0.134998", \ + "0.086219, 0.085397, 0.082829, 0.079785, 0.072681, 0.069953, 0.139530", \ + "0.095329, 0.094507, 0.091939, 0.088895, 0.081791, 0.079063, 0.148640", \ + "0.106660, 0.105838, 0.103270, 0.100226, 0.093122, 0.090394, 0.159971", \ + "0.200955, 0.200133, 0.197565, 0.194521, 0.187417, 0.184689, 0.254266" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.121780, 0.123100, 0.125860, 0.132070, 0.143500, 0.162570, 0.269280", \ + "0.120410, 0.121730, 0.124490, 0.130700, 0.142130, 0.161200, 0.267910", \ + "0.119100, 0.120420, 0.123180, 0.129390, 0.140820, 0.159890, 0.266600", \ + "0.114510, 0.115830, 0.118590, 0.124800, 0.136230, 0.155300, 0.262010", \ + "0.104818, 0.106138, 0.108898, 0.115108, 0.126538, 0.145608, 0.252318", \ + "0.092302, 0.093622, 0.096382, 0.102592, 0.114022, 0.133092, 0.239802", \ + "0.151377, 0.152697, 0.155457, 0.161667, 0.173097, 0.192167, 0.298877" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.121780, 0.123100, 0.125860, 0.132070, 0.143500, 0.162570, 0.269280", \ + "0.120410, 0.121730, 0.124490, 0.130700, 0.142130, 0.161200, 0.267910", \ + "0.119100, 0.120420, 0.123180, 0.129390, 0.140820, 0.159890, 0.266600", \ + "0.114510, 0.115830, 0.118590, 0.124800, 0.136230, 0.155300, 0.262010", \ + "0.104818, 0.106138, 0.108898, 0.115108, 0.126538, 0.145608, 0.252318", \ + "0.092302, 0.093622, 0.096382, 0.102592, 0.114022, 0.133092, 0.239802", \ + "0.151377, 0.152697, 0.155457, 0.161667, 0.173097, 0.192167, 0.298877" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.077957, 0.077232, 0.074531, 0.071873, 0.065950, 0.064610, 0.144263", \ + "0.078756, 0.078031, 0.075330, 0.072672, 0.066749, 0.065409, 0.145062", \ + "0.080499, 0.079774, 0.077073, 0.074415, 0.068492, 0.067152, 0.146805", \ + "0.085030, 0.084305, 0.081604, 0.078946, 0.073023, 0.071683, 0.151336", \ + "0.094140, 0.093415, 0.090714, 0.088056, 0.082133, 0.080793, 0.160446", \ + "0.105471, 0.104746, 0.102045, 0.099387, 0.093464, 0.092124, 0.171777", \ + "0.199767, 0.199042, 0.196341, 0.193683, 0.187760, 0.186420, 0.266073" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.079145, 0.078323, 0.075755, 0.072711, 0.065607, 0.062879, 0.132456", \ + "0.079944, 0.079122, 0.076554, 0.073510, 0.066406, 0.063678, 0.133255", \ + "0.081687, 0.080865, 0.078297, 0.075253, 0.068149, 0.065421, 0.134998", \ + "0.086219, 0.085397, 0.082829, 0.079785, 0.072681, 0.069953, 0.139530", \ + "0.095329, 0.094507, 0.091939, 0.088895, 0.081791, 0.079063, 0.148640", \ + "0.106660, 0.105838, 0.103270, 0.100226, 0.093122, 0.090394, 0.159971", \ + "0.200955, 0.200133, 0.197565, 0.194521, 0.187417, 0.184689, 0.254266" \ + ); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014848, 0.014886, 0.014900, 0.014915, 0.014930, 0.014945, 0.014960"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.013141, 0.013154, 0.013167, 0.013180, 0.013194, 0.013207, 0.013220"); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014848, 0.014886, 0.014900, 0.014915, 0.014930, 0.014945, 0.014960"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.013141, 0.013154, 0.013167, 0.013180, 0.013194, 0.013207, 0.013220"); + } + } + } + pin(CLKB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.009673; + clock : true; + max_transition : 0.301000; + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.438720, 5.444162, 5.449604, 5.455056, 5.460508, 5.465970, 5.471431"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.439064, 5.444506, 5.449949, 5.455401, 5.460854, 5.466316, 5.471778"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.452384, 5.457835, 5.463296, 5.468757, 5.474228, 5.479699, 5.485179"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.452498, 5.457950, 5.463410, 5.468872, 5.474343, 5.479814, 5.485294"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.494222, 5.499723, 5.505215, 5.510724, 5.516235, 5.521747, 5.527275"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.496630, 5.502133, 5.507627, 5.513140, 5.518653, 5.524167, 5.529698"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.498535, 5.504040, 5.509536, 5.515051, 5.520566, 5.526081, 5.531614"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((!CENB&TENB)|(!TCENB&!TENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("5.508988, 5.514495, 5.520011, 5.525528, 5.531054, 5.536589, 5.542125"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENB&TENB)|(TCENB&!TENB))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.006825, 0.006956, 0.006963, 0.007047, 0.007054, 0.007065, 0.007587"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.007584, 0.007729, 0.007737, 0.007830, 0.007837, 0.007850, 0.008430"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.006825, 0.006956, 0.006963, 0.007047, 0.007054, 0.007065, 0.007587"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.007584, 0.007729, 0.007737, 0.007830, 0.007837, 0.007850, 0.008430"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("3.536758, 3.540400, 3.543940, 3.547480, 3.551029, 3.554578, 3.558137"); + } + fall_power(rf2_32x128_wm1_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011036, 0.011058, 0.011117, 0.011346, 0.011357, 0.011369, 0.011903"); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.738608, 0.739638, 0.742208, 0.746588, 0.755378, 0.766878, 0.861788", \ + "0.738045, 0.739075, 0.741645, 0.746025, 0.754815, 0.766315, 0.861225", \ + "0.735754, 0.736784, 0.739354, 0.743734, 0.752524, 0.764024, 0.858934", \ + "0.731470, 0.732500, 0.735070, 0.739450, 0.748240, 0.759740, 0.854650", \ + "0.722479, 0.723509, 0.726079, 0.730459, 0.739249, 0.750749, 0.845659", \ + "0.710949, 0.711979, 0.714549, 0.718929, 0.727719, 0.739219, 0.834129", \ + "0.767479, 0.768509, 0.771079, 0.775459, 0.784249, 0.795749, 0.890659" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.749288, 0.750318, 0.752888, 0.757268, 0.766058, 0.777558, 0.872468", \ + "0.748725, 0.749755, 0.752325, 0.756705, 0.765495, 0.776995, 0.871905", \ + "0.746434, 0.747464, 0.750034, 0.754414, 0.763204, 0.774704, 0.869614", \ + "0.742150, 0.743180, 0.745750, 0.750130, 0.758920, 0.770420, 0.865330", \ + "0.733159, 0.734189, 0.736759, 0.741139, 0.749929, 0.761429, 0.856339", \ + "0.721629, 0.722659, 0.725229, 0.729609, 0.738399, 0.749899, 0.844809", \ + "0.778159, 0.779189, 0.781759, 0.786139, 0.794929, 0.806429, 0.901339" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.760358, 0.761388, 0.763958, 0.768338, 0.777128, 0.788628, 0.883538", \ + "0.759795, 0.760825, 0.763395, 0.767775, 0.776565, 0.788065, 0.882975", \ + "0.757504, 0.758534, 0.761104, 0.765484, 0.774274, 0.785774, 0.880684", \ + "0.753220, 0.754250, 0.756820, 0.761200, 0.769990, 0.781490, 0.876400", \ + "0.744229, 0.745259, 0.747829, 0.752209, 0.760999, 0.772499, 0.867409", \ + "0.732699, 0.733729, 0.736299, 0.740679, 0.749469, 0.760969, 0.855879", \ + "0.789229, 0.790259, 0.792829, 0.797209, 0.805999, 0.817499, 0.912409" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.775778, 0.776808, 0.779378, 0.783758, 0.792548, 0.804048, 0.898958", \ + "0.775215, 0.776245, 0.778815, 0.783195, 0.791985, 0.803485, 0.898395", \ + "0.772924, 0.773954, 0.776524, 0.780904, 0.789694, 0.801194, 0.896104", \ + "0.768640, 0.769670, 0.772240, 0.776620, 0.785410, 0.796910, 0.891820", \ + "0.759649, 0.760679, 0.763249, 0.767629, 0.776419, 0.787919, 0.882829", \ + "0.748119, 0.749149, 0.751719, 0.756099, 0.764889, 0.776389, 0.871299", \ + "0.804649, 0.805679, 0.808249, 0.812629, 0.821419, 0.832919, 0.927829" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.847958, 0.848988, 0.851558, 0.855938, 0.864728, 0.876228, 0.971138", \ + "0.847395, 0.848425, 0.850995, 0.855375, 0.864165, 0.875665, 0.970575", \ + "0.845104, 0.846134, 0.848704, 0.853084, 0.861874, 0.873374, 0.968284", \ + "0.840820, 0.841850, 0.844420, 0.848800, 0.857590, 0.869090, 0.964000", \ + "0.831829, 0.832859, 0.835429, 0.839809, 0.848599, 0.860099, 0.955009", \ + "0.820299, 0.821329, 0.823899, 0.828279, 0.837069, 0.848569, 0.943479", \ + "0.876829, 0.877859, 0.880429, 0.884809, 0.893599, 0.905099, 1.000009" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.896588, 0.897618, 0.900188, 0.904568, 0.913358, 0.924858, 1.019768", \ + "0.896025, 0.897055, 0.899625, 0.904005, 0.912795, 0.924295, 1.019205", \ + "0.893734, 0.894764, 0.897334, 0.901714, 0.910504, 0.922004, 1.016914", \ + "0.889450, 0.890480, 0.893050, 0.897430, 0.906220, 0.917720, 1.012630", \ + "0.880459, 0.881489, 0.884059, 0.888439, 0.897229, 0.908729, 1.003639", \ + "0.868929, 0.869959, 0.872529, 0.876909, 0.885699, 0.897199, 0.992109", \ + "0.925459, 0.926489, 0.929059, 0.933439, 0.942229, 0.953729, 1.048639" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.966338, 0.967368, 0.969938, 0.974318, 0.983108, 0.994608, 1.089518", \ + "0.965775, 0.966805, 0.969375, 0.973755, 0.982545, 0.994045, 1.088955", \ + "0.963484, 0.964514, 0.967084, 0.971464, 0.980254, 0.991754, 1.086664", \ + "0.959200, 0.960230, 0.962800, 0.967180, 0.975970, 0.987470, 1.082380", \ + "0.950209, 0.951239, 0.953809, 0.958189, 0.966979, 0.978479, 1.073389", \ + "0.938679, 0.939709, 0.942279, 0.946659, 0.955449, 0.966949, 1.061859", \ + "0.995209, 0.996239, 0.998809, 1.003189, 1.011979, 1.023479, 1.118389" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.016538, 1.017568, 1.020138, 1.024518, 1.033308, 1.044808, 1.139718", \ + "1.015975, 1.017005, 1.019575, 1.023955, 1.032745, 1.044245, 1.139155", \ + "1.013684, 1.014714, 1.017284, 1.021664, 1.030454, 1.041954, 1.136864", \ + "1.009400, 1.010430, 1.013000, 1.017380, 1.026170, 1.037670, 1.132580", \ + "1.000409, 1.001439, 1.004009, 1.008389, 1.017179, 1.028679, 1.123589", \ + "0.988879, 0.989909, 0.992479, 0.996859, 1.005649, 1.017149, 1.112059", \ + "1.045409, 1.046439, 1.049009, 1.053389, 1.062179, 1.073679, 1.168589" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x128_wm1_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.963336; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 0.974177; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 0.985413; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 1.001064; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + } + minimum_period() { + constraint : 1.074317; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 1.123646; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 1.194493; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 1.245446; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.070921, 0.072009, 0.074179, 0.078523, 0.087649, 0.098952, 0.117107"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.070921, 0.072009, 0.074179, 0.078523, 0.087649, 0.098952, 0.117107"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.070921, 0.072009, 0.074179, 0.078523, 0.087649, 0.098952, 0.117107"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.070921, 0.072009, 0.074179, 0.078523, 0.087649, 0.098952, 0.117107"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.198840, 0.200180, 0.202120, 0.207000, 0.215900, 0.227830, 0.242750"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.198840, 0.200180, 0.202120, 0.207000, 0.215900, 0.227830, 0.242750"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.198840, 0.200180, 0.202120, 0.207000, 0.215900, 0.227830, 0.242750"); + } + fall_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + cell_rise(rf2_32x128_wm1_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.198840, 0.200180, 0.202120, 0.207000, 0.215900, 0.227830, 0.242750"); + } + rise_transition(rf2_32x128_wm1_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + } + min_pulse_width_high : 0.115849; + min_pulse_width_low : 0.113144; + } + pin(CENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001261; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.103776, 0.104776, 0.107433, 0.112564, 0.123374, 0.136684, 0.227804", \ + "0.103334, 0.104334, 0.106991, 0.112122, 0.122932, 0.136242, 0.227362", \ + "0.103091, 0.104091, 0.106748, 0.111879, 0.122689, 0.135999, 0.227119", \ + "0.103192, 0.104192, 0.106849, 0.111980, 0.122790, 0.136100, 0.227220", \ + "0.104364, 0.105364, 0.108021, 0.113152, 0.123962, 0.137272, 0.228392", \ + "0.110151, 0.111151, 0.113808, 0.118939, 0.129749, 0.143059, 0.234179", \ + "0.195714, 0.196714, 0.199371, 0.204502, 0.215312, 0.228622, 0.319742" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.108809, 0.109720, 0.112476, 0.117986, 0.129646, 0.145166, 0.245716", \ + "0.107838, 0.108749, 0.111505, 0.117015, 0.128675, 0.144195, 0.244745", \ + "0.105673, 0.106584, 0.109340, 0.114850, 0.126510, 0.142030, 0.242580", \ + "0.101233, 0.102144, 0.104900, 0.110410, 0.122070, 0.137590, 0.238140", \ + "0.092120, 0.093031, 0.095787, 0.101297, 0.112957, 0.128477, 0.229027", \ + "0.097087, 0.097530, 0.100932, 0.106899, 0.118194, 0.133284, 0.233304", \ + "0.182708, 0.183151, 0.186553, 0.192520, 0.203815, 0.218905, 0.318925" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.051609, 0.050017, 0.047643, 0.043030, 0.033443, 0.030439, 0.090250", \ + "0.052833, 0.051241, 0.048867, 0.044254, 0.034667, 0.031663, 0.090250", \ + "0.054885, 0.053293, 0.050919, 0.046306, 0.036719, 0.033715, 0.090674", \ + "0.059286, 0.057694, 0.055320, 0.050707, 0.041120, 0.038116, 0.095075", \ + "0.067408, 0.065816, 0.063442, 0.058829, 0.049242, 0.046238, 0.103197", \ + "0.077629, 0.076037, 0.073663, 0.069050, 0.059463, 0.056459, 0.113418", \ + "0.165895, 0.164303, 0.161929, 0.157316, 0.147729, 0.144725, 0.201684" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038557, 0.039108, 0.034679, 0.028500, 0.017481, 0.015000, 0.090250", \ + "0.039639, 0.040190, 0.035761, 0.029582, 0.018563, 0.015000, 0.090250", \ + "0.041812, 0.042363, 0.037934, 0.031755, 0.020736, 0.015000, 0.090250", \ + "0.046144, 0.046695, 0.042266, 0.036087, 0.025068, 0.015000, 0.090250", \ + "0.055531, 0.056082, 0.051653, 0.045474, 0.034455, 0.019481, 0.090250", \ + "0.067796, 0.068347, 0.063918, 0.057739, 0.046720, 0.031746, 0.090250", \ + "0.159971, 0.160522, 0.156093, 0.149914, 0.138895, 0.123921, 0.179012" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.035502", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.036193", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.038322", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.042733", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.051385", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.063741", \ + "1.076670, 1.075578, 1.073822, 1.072066, 1.073122, 1.074282, 1.080260" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.376812, 0.374822, 0.372842, 0.368402, 0.357652, 0.341082, 0.319872", \ + "0.380792, 0.378802, 0.376822, 0.372382, 0.361632, 0.345062, 0.323852", \ + "0.384762, 0.382772, 0.380792, 0.376352, 0.365602, 0.349032, 0.327822", \ + "0.393652, 0.391662, 0.389682, 0.385242, 0.374492, 0.357922, 0.336712", \ + "0.415132, 0.413142, 0.411162, 0.406722, 0.395972, 0.379402, 0.358192", \ + "0.448272, 0.446282, 0.444302, 0.439862, 0.429112, 0.412542, 0.391332", \ + "0.490692, 0.488702, 0.486722, 0.482282, 0.471532, 0.454962, 0.433752" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.029087, 0.029172, 0.029201, 0.029230, 0.029259, 0.029289, 0.029318"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.051401, 0.051453, 0.051504, 0.051556, 0.051607, 0.051659, 0.051710"); + } + } + } + bus(WENB) { + bus_type : rf2_32x128_wm1_WENB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001416; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.019780, 0.019685, 0.023066, 0.028126, 0.039532, 0.056144, 0.158542", \ + "0.018573, 0.018478, 0.021859, 0.026919, 0.038325, 0.054937, 0.157335", \ + "0.016446, 0.016351, 0.019732, 0.024792, 0.036198, 0.052810, 0.155208", \ + "0.015000, 0.015000, 0.015000, 0.019942, 0.031348, 0.047960, 0.150358", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.022478, 0.039090, 0.141488", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.027470, 0.129868", \ + "0.090250, 0.090250, 0.090250, 0.090250, 0.090250, 0.090250, 0.189859" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.015000, 0.015354, 0.018234, 0.023249, 0.036468, 0.055585, 0.165596", \ + "0.015000, 0.015000, 0.017023, 0.022037, 0.035257, 0.054374, 0.164384", \ + "0.015000, 0.015000, 0.015000, 0.019917, 0.033135, 0.052253, 0.162264", \ + "0.015000, 0.015000, 0.015000, 0.015060, 0.028278, 0.047396, 0.157407", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.019412, 0.038529, 0.148540", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.026901, 0.136912", \ + "0.090250, 0.090250, 0.090250, 0.090250, 0.090250, 0.090250, 0.196915" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.196831, 0.196942, 0.193505, 0.190559, 0.188638, 0.183984, 0.266332", \ + "0.198181, 0.198292, 0.194855, 0.191909, 0.189988, 0.185334, 0.267682", \ + "0.200116, 0.200227, 0.196790, 0.193844, 0.191923, 0.187269, 0.269617", \ + "0.204992, 0.205103, 0.201666, 0.198720, 0.196799, 0.192145, 0.274493", \ + "0.213892, 0.214003, 0.210566, 0.207620, 0.205699, 0.201045, 0.283393", \ + "0.225832, 0.225943, 0.222506, 0.219560, 0.217639, 0.212985, 0.295333", \ + "0.316002, 0.316113, 0.312676, 0.309730, 0.307809, 0.303155, 0.385503" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195612, 0.194753, 0.192044, 0.188192, 0.180002, 0.172889, 0.241536", \ + "0.196953, 0.196094, 0.193385, 0.189533, 0.181343, 0.174230, 0.242877", \ + "0.198889, 0.198030, 0.195321, 0.191469, 0.183279, 0.176166, 0.244813", \ + "0.203770, 0.202911, 0.200202, 0.196350, 0.188160, 0.181047, 0.249694", \ + "0.212670, 0.211811, 0.209102, 0.205250, 0.197060, 0.189947, 0.258594", \ + "0.224610, 0.223751, 0.221042, 0.217190, 0.209000, 0.201887, 0.270534", \ + "0.314770, 0.313911, 0.311202, 0.307350, 0.299160, 0.292047, 0.360694" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.003500, 0.003503, 0.003507, 0.003524, 0.003528, 0.003531, 0.003535"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004391, 0.004396, 0.004400, 0.004405, 0.004409, 0.004413, 0.004418"); + } + } + } + bus(AB) { + bus_type : rf2_32x128_wm1_AB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001576; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.127640, 0.128540, 0.131160, 0.137150, 0.150180, 0.168330, 0.278040", \ + "0.126680, 0.127580, 0.130200, 0.136190, 0.149220, 0.167370, 0.277080", \ + "0.124540, 0.125440, 0.128060, 0.134050, 0.147080, 0.165230, 0.274940", \ + "0.120080, 0.120980, 0.123600, 0.129590, 0.142620, 0.160770, 0.270480", \ + "0.111190, 0.112090, 0.114710, 0.120700, 0.133730, 0.151880, 0.261590", \ + "0.099772, 0.100672, 0.103292, 0.109282, 0.122312, 0.140462, 0.250172", \ + "0.157362, 0.158262, 0.160882, 0.166872, 0.179902, 0.198052, 0.307762" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.127640, 0.128540, 0.131160, 0.137150, 0.150180, 0.168330, 0.278040", \ + "0.126680, 0.127580, 0.130200, 0.136190, 0.149220, 0.167370, 0.277080", \ + "0.124540, 0.125440, 0.128060, 0.134050, 0.147080, 0.165230, 0.274940", \ + "0.120080, 0.120980, 0.123600, 0.129590, 0.142620, 0.160770, 0.270480", \ + "0.111190, 0.112090, 0.114710, 0.120700, 0.133730, 0.151880, 0.261590", \ + "0.099772, 0.100672, 0.103292, 0.109282, 0.122312, 0.140462, 0.250172", \ + "0.157362, 0.158262, 0.160882, 0.166872, 0.179902, 0.198052, 0.307762" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.071671, 0.070983, 0.068286, 0.065709, 0.059767, 0.059189, 0.142015", \ + "0.072759, 0.072071, 0.069374, 0.066797, 0.060855, 0.060277, 0.143103", \ + "0.074929, 0.074241, 0.071544, 0.068967, 0.063025, 0.062447, 0.145273", \ + "0.079273, 0.078585, 0.075888, 0.073311, 0.067369, 0.066791, 0.149617", \ + "0.088399, 0.087711, 0.085014, 0.082437, 0.076495, 0.075917, 0.158743", \ + "0.099703, 0.099015, 0.096318, 0.093741, 0.087799, 0.087221, 0.170047", \ + "0.193107, 0.192419, 0.189722, 0.187145, 0.181203, 0.180625, 0.263451" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.072990, 0.072175, 0.069605, 0.066548, 0.059432, 0.056645, 0.131141", \ + "0.074077, 0.073262, 0.070692, 0.067635, 0.060519, 0.057732, 0.132228", \ + "0.076246, 0.075431, 0.072861, 0.069804, 0.062688, 0.059901, 0.134397", \ + "0.080591, 0.079776, 0.077206, 0.074149, 0.067033, 0.064246, 0.138742", \ + "0.089717, 0.088902, 0.086332, 0.083275, 0.076159, 0.073372, 0.147868", \ + "0.101021, 0.100206, 0.097636, 0.094579, 0.087463, 0.084676, 0.159172", \ + "0.194428, 0.193613, 0.191043, 0.187986, 0.180870, 0.178083, 0.252579" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.127640, 0.128540, 0.131160, 0.137150, 0.150180, 0.168330, 0.278040", \ + "0.126680, 0.127580, 0.130200, 0.136190, 0.149220, 0.167370, 0.277080", \ + "0.124540, 0.125440, 0.128060, 0.134050, 0.147080, 0.165230, 0.274940", \ + "0.120080, 0.120980, 0.123600, 0.129590, 0.142620, 0.160770, 0.270480", \ + "0.111190, 0.112090, 0.114710, 0.120700, 0.133730, 0.151880, 0.261590", \ + "0.099772, 0.100672, 0.103292, 0.109282, 0.122312, 0.140462, 0.250172", \ + "0.157362, 0.158262, 0.160882, 0.166872, 0.179902, 0.198052, 0.307762" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.127640, 0.128540, 0.131160, 0.137150, 0.150180, 0.168330, 0.278040", \ + "0.126680, 0.127580, 0.130200, 0.136190, 0.149220, 0.167370, 0.277080", \ + "0.124540, 0.125440, 0.128060, 0.134050, 0.147080, 0.165230, 0.274940", \ + "0.120080, 0.120980, 0.123600, 0.129590, 0.142620, 0.160770, 0.270480", \ + "0.111190, 0.112090, 0.114710, 0.120700, 0.133730, 0.151880, 0.261590", \ + "0.099772, 0.100672, 0.103292, 0.109282, 0.122312, 0.140462, 0.250172", \ + "0.157362, 0.158262, 0.160882, 0.166872, 0.179902, 0.198052, 0.307762" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.071671, 0.070983, 0.068286, 0.065709, 0.059767, 0.059189, 0.142015", \ + "0.072759, 0.072071, 0.069374, 0.066797, 0.060855, 0.060277, 0.143103", \ + "0.074929, 0.074241, 0.071544, 0.068967, 0.063025, 0.062447, 0.145273", \ + "0.079273, 0.078585, 0.075888, 0.073311, 0.067369, 0.066791, 0.149617", \ + "0.088399, 0.087711, 0.085014, 0.082437, 0.076495, 0.075917, 0.158743", \ + "0.099703, 0.099015, 0.096318, 0.093741, 0.087799, 0.087221, 0.170047", \ + "0.193107, 0.192419, 0.189722, 0.187145, 0.181203, 0.180625, 0.263451" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.072990, 0.072175, 0.069605, 0.066548, 0.059432, 0.056645, 0.131141", \ + "0.074077, 0.073262, 0.070692, 0.067635, 0.060519, 0.057732, 0.132228", \ + "0.076246, 0.075431, 0.072861, 0.069804, 0.062688, 0.059901, 0.134397", \ + "0.080591, 0.079776, 0.077206, 0.074149, 0.067033, 0.064246, 0.138742", \ + "0.089717, 0.088902, 0.086332, 0.083275, 0.076159, 0.073372, 0.147868", \ + "0.101021, 0.100206, 0.097636, 0.094579, 0.087463, 0.084676, 0.159172", \ + "0.194428, 0.193613, 0.191043, 0.187986, 0.180870, 0.178083, 0.252579" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.017232, 0.017249, 0.017266, 0.017283, 0.017301, 0.017318, 0.017335"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015493, 0.015509, 0.015524, 0.015540, 0.015555, 0.015571, 0.015586"); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.017232, 0.017249, 0.017266, 0.017283, 0.017301, 0.017318, 0.017335"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015493, 0.015509, 0.015524, 0.015540, 0.015555, 0.015571, 0.015586"); + } + } + } + bus(DB) { + bus_type : rf2_32x128_wm1_DB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : AB; + clocked_on : CLKB; + } + capacitance : 0.001884; + max_transition : 0.301000; + pin(DB[127]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[127])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[126]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[126])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[125]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[125])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[124]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[124])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[123]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[123])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[122]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[122])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[121]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[121])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[120]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[120])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[119]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[119])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[118]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[118])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[117]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[117])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[116]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[116])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[115]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[115])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[114]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[114])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[113]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[113])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[112]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[112])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[111]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[111])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[110]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[110])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[109]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[109])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[108]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[108])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[107]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[107])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[106]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[106])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[105]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[105])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[104]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[104])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[103]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[103])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[102]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[102])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[101]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[101])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[100]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[100])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[99]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[99])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[98]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[98])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[97]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[97])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[96]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[96])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[95]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[95])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[94]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[94])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[93]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[93])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[92]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[92])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[91]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[91])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[90]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[90])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[89]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[89])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[88]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[88])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[87]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[87])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[86]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[86])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[85]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[85])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[84]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[84])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[83]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[83])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[82]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[82])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[81]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[81])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[80]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[80])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[79]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[79])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[78]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[78])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[77]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[77])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[76]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[76])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[75]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[75])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[74]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[74])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[73]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[73])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[72]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[72])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[71]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[71])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[70]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[70])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[69]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[69])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[68]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[68])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[67]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[67])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[66]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[66])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[65]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[65])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[64]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[64])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[63]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[63])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[62]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[62])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[61]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[61])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[60]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[60])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[59]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[59])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[58]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[58])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[57]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[57])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[56]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[56])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[55]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[55])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[54]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[54])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[53]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[53])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[52]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[52])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[51]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[51])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[50]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[50])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[49]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[49])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[48]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[48])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[47]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[47])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[46]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[46])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[45]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[45])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[44]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[44])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[43]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[43])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[42]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[42])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[41]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[41])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[40]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[40])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[39]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[39])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[38]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[38])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[37]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[37])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[36]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[36])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[35]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[35])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[34]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[34])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[33]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[33])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[32]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[32])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[31]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[31])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[30]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[30])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[29]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[29])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[28]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[28])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[27]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[27])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[26]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[26])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[25]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[25])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[24]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[24])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[23]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[23])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[22]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[22])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[21]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[21])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[20]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[20])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[19]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[19])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[18]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[18])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[17]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[17])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[16]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[16])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[15]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[15])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[14]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[14])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[13]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[13])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[12]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[12])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[11]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[11])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[10]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[10])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[9]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[9])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[8]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[8])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[7]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[7])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[6]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[6])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[5]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[5])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[4]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[4])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[3]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[3])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[2]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[2])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[1]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[1])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(DB[0]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB&!WENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0aWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "TENB&(DFTRAMBYP|!WENB[0])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + } + bus(EMAA) { + bus_type : rf2_32x128_wm1_EMAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005769; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.973256, 0.975098, 0.977089, 0.981782, 0.991394, 1.001477, 1.093117", \ + "0.972217, 0.974059, 0.976050, 0.980743, 0.990355, 1.000438, 1.092078", \ + "0.970224, 0.972066, 0.974057, 0.978750, 0.988362, 0.998445, 1.090085", \ + "0.965992, 0.967834, 0.969825, 0.974518, 0.984130, 0.994213, 1.085853", \ + "0.957769, 0.959611, 0.961602, 0.966295, 0.975907, 0.985990, 1.077630", \ + "0.944640, 0.946482, 0.948473, 0.953166, 0.962778, 0.972861, 1.064501", \ + "1.005298, 1.007140, 1.009131, 1.013824, 1.023436, 1.033519, 1.125159" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.973256, 0.975098, 0.977089, 0.981782, 0.991394, 1.001477, 1.093117", \ + "0.972217, 0.974059, 0.976050, 0.980743, 0.990355, 1.000438, 1.092078", \ + "0.970224, 0.972066, 0.974057, 0.978750, 0.988362, 0.998445, 1.090085", \ + "0.965992, 0.967834, 0.969825, 0.974518, 0.984130, 0.994213, 1.085853", \ + "0.957769, 0.959611, 0.961602, 0.966295, 0.975907, 0.985990, 1.077630", \ + "0.944640, 0.946482, 0.948473, 0.953166, 0.962778, 0.972861, 1.064501", \ + "1.005298, 1.007140, 1.009131, 1.013824, 1.023436, 1.033519, 1.125159" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + } + } + pin(EMASA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002465; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.973256, 0.975098, 0.977089, 0.981782, 0.991394, 1.001477, 1.093117", \ + "0.972217, 0.974059, 0.976050, 0.980743, 0.990355, 1.000438, 1.092078", \ + "0.970224, 0.972066, 0.974057, 0.978750, 0.988362, 0.998445, 1.090085", \ + "0.965992, 0.967834, 0.969825, 0.974518, 0.984130, 0.994213, 1.085853", \ + "0.957769, 0.959611, 0.961602, 0.966295, 0.975907, 0.985990, 1.077630", \ + "0.944640, 0.946482, 0.948473, 0.953166, 0.962778, 0.972861, 1.064501", \ + "1.005298, 1.007140, 1.009131, 1.013824, 1.023436, 1.033519, 1.125159" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.973256, 0.975098, 0.977089, 0.981782, 0.991394, 1.001477, 1.093117", \ + "0.972217, 0.974059, 0.976050, 0.980743, 0.990355, 1.000438, 1.092078", \ + "0.970224, 0.972066, 0.974057, 0.978750, 0.988362, 0.998445, 1.090085", \ + "0.965992, 0.967834, 0.969825, 0.974518, 0.984130, 0.994213, 1.085853", \ + "0.957769, 0.959611, 0.961602, 0.966295, 0.975907, 0.985990, 1.077630", \ + "0.944640, 0.946482, 0.948473, 0.953166, 0.962778, 0.972861, 1.064501", \ + "1.005298, 1.007140, 1.009131, 1.013824, 1.023436, 1.033519, 1.125159" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + } + } + bus(EMAB) { + bus_type : rf2_32x128_wm1_EMAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005588; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.038166, 1.040008, 1.041999, 1.046692, 1.056304, 1.066387, 1.158027", \ + "1.037127, 1.038969, 1.040960, 1.045653, 1.055265, 1.065348, 1.156988", \ + "1.035134, 1.036976, 1.038967, 1.043660, 1.053272, 1.063355, 1.154995", \ + "1.030902, 1.032744, 1.034735, 1.039428, 1.049040, 1.059123, 1.150763", \ + "1.022679, 1.024521, 1.026512, 1.031205, 1.040817, 1.050900, 1.142540", \ + "1.009550, 1.011392, 1.013383, 1.018076, 1.027688, 1.037771, 1.129411", \ + "1.070208, 1.072050, 1.074041, 1.078734, 1.088346, 1.098429, 1.190069" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.038166, 1.040008, 1.041999, 1.046692, 1.056304, 1.066387, 1.158027", \ + "1.037127, 1.038969, 1.040960, 1.045653, 1.055265, 1.065348, 1.156988", \ + "1.035134, 1.036976, 1.038967, 1.043660, 1.053272, 1.063355, 1.154995", \ + "1.030902, 1.032744, 1.034735, 1.039428, 1.049040, 1.059123, 1.150763", \ + "1.022679, 1.024521, 1.026512, 1.031205, 1.040817, 1.050900, 1.142540", \ + "1.009550, 1.011392, 1.013383, 1.018076, 1.027688, 1.037771, 1.129411", \ + "1.070208, 1.072050, 1.074041, 1.078734, 1.088346, 1.098429, 1.190069" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.276293, 1.275201, 1.273445, 1.271689, 1.272745, 1.273905, 1.355133", \ + "1.276984, 1.275892, 1.274136, 1.272380, 1.273436, 1.274596, 1.355824", \ + "1.279113, 1.278021, 1.276265, 1.274509, 1.275565, 1.276725, 1.357953", \ + "1.283524, 1.282432, 1.280676, 1.278920, 1.279976, 1.281136, 1.362364", \ + "1.292176, 1.291084, 1.289328, 1.287572, 1.288628, 1.289788, 1.371016", \ + "1.304532, 1.303440, 1.301684, 1.299928, 1.300984, 1.302144, 1.383372", \ + "1.396301, 1.395209, 1.393453, 1.391697, 1.392753, 1.393913, 1.475141" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.276293, 1.275201, 1.273445, 1.271689, 1.272745, 1.273905, 1.355133", \ + "1.276984, 1.275892, 1.274136, 1.272380, 1.273436, 1.274596, 1.355824", \ + "1.279113, 1.278021, 1.276265, 1.274509, 1.275565, 1.276725, 1.357953", \ + "1.283524, 1.282432, 1.280676, 1.278920, 1.279976, 1.281136, 1.362364", \ + "1.292176, 1.291084, 1.289328, 1.287572, 1.288628, 1.289788, 1.371016", \ + "1.304532, 1.303440, 1.301684, 1.299928, 1.300984, 1.302144, 1.383372", \ + "1.396301, 1.395209, 1.393453, 1.391697, 1.392753, 1.393913, 1.475141" \ + ); + } + } + } + pin(TENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.000857; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.205010, 0.207241, 0.213469, 0.225549, 0.251229, 0.288886, 0.427474", \ + "0.203833, 0.205959, 0.212440, 0.224520, 0.250200, 0.287857, 0.426445", \ + "0.202209, 0.204440, 0.210737, 0.222818, 0.248497, 0.286154, 0.424742", \ + "0.197833, 0.200063, 0.206222, 0.218302, 0.243982, 0.281639, 0.420227", \ + "0.187995, 0.190225, 0.196134, 0.208214, 0.233894, 0.271551, 0.410139", \ + "0.182581, 0.184625, 0.190404, 0.201058, 0.226593, 0.259392, 0.397980", \ + "0.267986, 0.270029, 0.275821, 0.286476, 0.312010, 0.341977, 0.465664" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.205010, 0.207241, 0.213469, 0.225549, 0.251229, 0.288886, 0.427474", \ + "0.203833, 0.205959, 0.212440, 0.224520, 0.250200, 0.287857, 0.426445", \ + "0.202209, 0.204440, 0.210737, 0.222818, 0.248497, 0.286154, 0.424742", \ + "0.197833, 0.200063, 0.206222, 0.218302, 0.243982, 0.281639, 0.420227", \ + "0.187995, 0.190225, 0.196134, 0.208214, 0.233894, 0.271551, 0.410139", \ + "0.182581, 0.184625, 0.190404, 0.201058, 0.226593, 0.259392, 0.397980", \ + "0.267986, 0.270029, 0.275821, 0.286476, 0.312010, 0.341977, 0.465664" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.087059, 0.086155, 0.083330, 0.079982, 0.072545, 0.071071, 0.151164", \ + "0.087938, 0.087034, 0.084209, 0.080861, 0.073424, 0.071950, 0.152043", \ + "0.089856, 0.088952, 0.086127, 0.082778, 0.075341, 0.073867, 0.153961", \ + "0.094841, 0.093937, 0.091112, 0.087764, 0.080325, 0.078851, 0.158945", \ + "0.104862, 0.103958, 0.101133, 0.097785, 0.090346, 0.088872, 0.168966", \ + "0.117326, 0.116422, 0.113597, 0.110249, 0.102810, 0.101336, 0.181430", \ + "0.213526, 0.212621, 0.209796, 0.206448, 0.199011, 0.197537, 0.277630" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.087059, 0.086155, 0.083330, 0.079982, 0.072545, 0.071071, 0.151164", \ + "0.087938, 0.087034, 0.084209, 0.080861, 0.073424, 0.071950, 0.152043", \ + "0.089856, 0.088952, 0.086127, 0.082778, 0.075341, 0.073867, 0.153961", \ + "0.094841, 0.093937, 0.091112, 0.087764, 0.080325, 0.078851, 0.158945", \ + "0.104862, 0.103958, 0.101133, 0.097785, 0.090346, 0.088872, 0.168966", \ + "0.117326, 0.116422, 0.113597, 0.110249, 0.102810, 0.101336, 0.181430", \ + "0.213526, 0.212621, 0.209796, 0.206448, 0.199011, 0.197537, 0.277630" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014403, 0.014517, 0.014573, 0.014588, 0.014602, 0.014615, 0.014629"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015117, 0.015132, 0.015147, 0.015162, 0.015177, 0.015192, 0.015207"); + } + } + } + pin(TCENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001350; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.098133, 0.099266, 0.101513, 0.106297, 0.117582, 0.128962, 0.220732", \ + "0.097696, 0.098829, 0.101076, 0.105860, 0.117145, 0.128525, 0.220295", \ + "0.097455, 0.098588, 0.100835, 0.105619, 0.116904, 0.128284, 0.220054", \ + "0.097773, 0.098906, 0.101153, 0.105937, 0.117222, 0.128602, 0.220372", \ + "0.098147, 0.099280, 0.101527, 0.106311, 0.117596, 0.128976, 0.220746", \ + "0.103866, 0.104999, 0.107246, 0.112030, 0.123315, 0.134695, 0.226465", \ + "0.189192, 0.190325, 0.192572, 0.197356, 0.208641, 0.220021, 0.311791" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.105697, 0.106690, 0.109925, 0.115198, 0.126548, 0.141168, 0.241618", \ + "0.104617, 0.105610, 0.108845, 0.114118, 0.125468, 0.140088, 0.240538", \ + "0.102978, 0.103971, 0.107206, 0.112479, 0.123829, 0.138449, 0.238899", \ + "0.098432, 0.099425, 0.102660, 0.107933, 0.119283, 0.133903, 0.234353", \ + "0.089362, 0.090355, 0.093590, 0.098863, 0.110213, 0.124833, 0.225283", \ + "0.092401, 0.093569, 0.096509, 0.101718, 0.113030, 0.125616, 0.226506", \ + "0.177725, 0.178893, 0.181833, 0.187042, 0.198354, 0.210940, 0.311830" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.053507, 0.052454, 0.050066, 0.045698, 0.036368, 0.026622, 0.093070", \ + "0.054415, 0.053362, 0.050974, 0.046606, 0.037276, 0.027530, 0.093070", \ + "0.056131, 0.055078, 0.052690, 0.048322, 0.038992, 0.029246, 0.093070", \ + "0.060312, 0.059259, 0.056871, 0.052503, 0.043173, 0.033427, 0.095754", \ + "0.068879, 0.067826, 0.065438, 0.061070, 0.051740, 0.041994, 0.104321", \ + "0.079703, 0.078650, 0.076262, 0.071894, 0.062564, 0.052818, 0.115145", \ + "0.171985, 0.170979, 0.168642, 0.164013, 0.153823, 0.142522, 0.204504" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.047490, 0.047640, 0.043530, 0.037807, 0.026950, 0.017820, 0.093070", \ + "0.048290, 0.048440, 0.044330, 0.038607, 0.027750, 0.017820, 0.093070", \ + "0.050034, 0.050184, 0.046074, 0.040351, 0.029494, 0.018203, 0.093070", \ + "0.054561, 0.054711, 0.050601, 0.044878, 0.034021, 0.022730, 0.093070", \ + "0.064105, 0.064255, 0.060145, 0.054422, 0.043565, 0.032274, 0.093070", \ + "0.076445, 0.076595, 0.072485, 0.066762, 0.055905, 0.044614, 0.095786", \ + "0.169486, 0.169636, 0.165526, 0.159803, 0.148946, 0.137655, 0.188827" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.035502", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.036193", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.038322", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.042733", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.051385", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.063741", \ + "1.076670, 1.075578, 1.073822, 1.072066, 1.073122, 1.074282, 1.080260" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.376812, 0.374822, 0.372842, 0.368402, 0.357652, 0.341082, 0.319872", \ + "0.380792, 0.378802, 0.376822, 0.372382, 0.361632, 0.345062, 0.323852", \ + "0.384762, 0.382772, 0.380792, 0.376352, 0.365602, 0.349032, 0.327822", \ + "0.393652, 0.391662, 0.389682, 0.385242, 0.374492, 0.357922, 0.336712", \ + "0.415132, 0.413142, 0.411162, 0.406722, 0.395972, 0.379402, 0.358192", \ + "0.448272, 0.446282, 0.444302, 0.439862, 0.429112, 0.412542, 0.391332", \ + "0.490692, 0.488702, 0.486722, 0.482282, 0.471532, 0.454962, 0.433752" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.029087, 0.029172, 0.029201, 0.029230, 0.029259, 0.029289, 0.029318"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.051401, 0.051453, 0.051504, 0.051556, 0.051607, 0.051659, 0.051710"); + } + } + } + bus(TAA) { + bus_type : rf2_32x128_wm1_TAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001544; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126215, 0.127535, 0.130295, 0.136505, 0.147935, 0.167005, 0.273715", \ + "0.124845, 0.126165, 0.128925, 0.135135, 0.146565, 0.165635, 0.272345", \ + "0.123535, 0.124855, 0.127615, 0.133825, 0.145255, 0.164325, 0.271035", \ + "0.118945, 0.120265, 0.123025, 0.129235, 0.140665, 0.159735, 0.266445", \ + "0.109253, 0.110573, 0.113333, 0.119543, 0.130973, 0.150043, 0.256753", \ + "0.096737, 0.098057, 0.100817, 0.107027, 0.118457, 0.137527, 0.244237", \ + "0.155812, 0.157132, 0.159892, 0.166102, 0.177532, 0.196602, 0.303312" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126215, 0.127535, 0.130295, 0.136505, 0.147935, 0.167005, 0.273715", \ + "0.124845, 0.126165, 0.128925, 0.135135, 0.146565, 0.165635, 0.272345", \ + "0.123535, 0.124855, 0.127615, 0.133825, 0.145255, 0.164325, 0.271035", \ + "0.118945, 0.120265, 0.123025, 0.129235, 0.140665, 0.159735, 0.266445", \ + "0.109253, 0.110573, 0.113333, 0.119543, 0.130973, 0.150043, 0.256753", \ + "0.096737, 0.098057, 0.100817, 0.107027, 0.118457, 0.137527, 0.244237", \ + "0.155812, 0.157132, 0.159892, 0.166102, 0.177532, 0.196602, 0.303312" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.077957, 0.077232, 0.074531, 0.071873, 0.065950, 0.064610, 0.144263", \ + "0.078756, 0.078031, 0.075330, 0.072672, 0.066749, 0.065409, 0.145062", \ + "0.080499, 0.079774, 0.077073, 0.074415, 0.068492, 0.067152, 0.146805", \ + "0.085030, 0.084305, 0.081604, 0.078946, 0.073023, 0.071683, 0.151336", \ + "0.094140, 0.093415, 0.090714, 0.088056, 0.082133, 0.080793, 0.160446", \ + "0.105471, 0.104746, 0.102045, 0.099387, 0.093464, 0.092124, 0.171777", \ + "0.199767, 0.199042, 0.196341, 0.193683, 0.187760, 0.186420, 0.266073" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.079145, 0.078323, 0.075755, 0.072711, 0.065607, 0.062879, 0.132456", \ + "0.079944, 0.079122, 0.076554, 0.073510, 0.066406, 0.063678, 0.133255", \ + "0.081687, 0.080865, 0.078297, 0.075253, 0.068149, 0.065421, 0.134998", \ + "0.086219, 0.085397, 0.082829, 0.079785, 0.072681, 0.069953, 0.139530", \ + "0.095329, 0.094507, 0.091939, 0.088895, 0.081791, 0.079063, 0.148640", \ + "0.106660, 0.105838, 0.103270, 0.100226, 0.093122, 0.090394, 0.159971", \ + "0.200955, 0.200133, 0.197565, 0.194521, 0.187417, 0.184689, 0.254266" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126215, 0.127535, 0.130295, 0.136505, 0.147935, 0.167005, 0.273715", \ + "0.124845, 0.126165, 0.128925, 0.135135, 0.146565, 0.165635, 0.272345", \ + "0.123535, 0.124855, 0.127615, 0.133825, 0.145255, 0.164325, 0.271035", \ + "0.118945, 0.120265, 0.123025, 0.129235, 0.140665, 0.159735, 0.266445", \ + "0.109253, 0.110573, 0.113333, 0.119543, 0.130973, 0.150043, 0.256753", \ + "0.096737, 0.098057, 0.100817, 0.107027, 0.118457, 0.137527, 0.244237", \ + "0.155812, 0.157132, 0.159892, 0.166102, 0.177532, 0.196602, 0.303312" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126215, 0.127535, 0.130295, 0.136505, 0.147935, 0.167005, 0.273715", \ + "0.124845, 0.126165, 0.128925, 0.135135, 0.146565, 0.165635, 0.272345", \ + "0.123535, 0.124855, 0.127615, 0.133825, 0.145255, 0.164325, 0.271035", \ + "0.118945, 0.120265, 0.123025, 0.129235, 0.140665, 0.159735, 0.266445", \ + "0.109253, 0.110573, 0.113333, 0.119543, 0.130973, 0.150043, 0.256753", \ + "0.096737, 0.098057, 0.100817, 0.107027, 0.118457, 0.137527, 0.244237", \ + "0.155812, 0.157132, 0.159892, 0.166102, 0.177532, 0.196602, 0.303312" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.077957, 0.077232, 0.074531, 0.071873, 0.065950, 0.064610, 0.144263", \ + "0.078756, 0.078031, 0.075330, 0.072672, 0.066749, 0.065409, 0.145062", \ + "0.080499, 0.079774, 0.077073, 0.074415, 0.068492, 0.067152, 0.146805", \ + "0.085030, 0.084305, 0.081604, 0.078946, 0.073023, 0.071683, 0.151336", \ + "0.094140, 0.093415, 0.090714, 0.088056, 0.082133, 0.080793, 0.160446", \ + "0.105471, 0.104746, 0.102045, 0.099387, 0.093464, 0.092124, 0.171777", \ + "0.199767, 0.199042, 0.196341, 0.193683, 0.187760, 0.186420, 0.266073" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.079145, 0.078323, 0.075755, 0.072711, 0.065607, 0.062879, 0.132456", \ + "0.079944, 0.079122, 0.076554, 0.073510, 0.066406, 0.063678, 0.133255", \ + "0.081687, 0.080865, 0.078297, 0.075253, 0.068149, 0.065421, 0.134998", \ + "0.086219, 0.085397, 0.082829, 0.079785, 0.072681, 0.069953, 0.139530", \ + "0.095329, 0.094507, 0.091939, 0.088895, 0.081791, 0.079063, 0.148640", \ + "0.106660, 0.105838, 0.103270, 0.100226, 0.093122, 0.090394, 0.159971", \ + "0.200955, 0.200133, 0.197565, 0.194521, 0.187417, 0.184689, 0.254266" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014848, 0.014886, 0.014900, 0.014915, 0.014930, 0.014945, 0.014960"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.013141, 0.013154, 0.013167, 0.013180, 0.013194, 0.013207, 0.013220"); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014848, 0.014886, 0.014900, 0.014915, 0.014930, 0.014945, 0.014960"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.013141, 0.013154, 0.013167, 0.013180, 0.013194, 0.013207, 0.013220"); + } + } + } + pin(TENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001015; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.427348, 0.429488, 0.434848, 0.446928, 0.471392, 0.502930, 0.628128", \ + "0.426452, 0.428590, 0.433951, 0.446031, 0.470496, 0.502033, 0.627231", \ + "0.423860, 0.425999, 0.431360, 0.443440, 0.467904, 0.499441, 0.624639", \ + "0.419557, 0.421697, 0.427057, 0.439137, 0.463601, 0.495139, 0.620337", \ + "0.410699, 0.412838, 0.418198, 0.430279, 0.454743, 0.486281, 0.611478", \ + "0.407392, 0.409630, 0.415028, 0.426249, 0.448494, 0.475191, 0.600113", \ + "0.493175, 0.495414, 0.500811, 0.512033, 0.534277, 0.560975, 0.667582" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.427348, 0.429488, 0.434848, 0.446928, 0.471392, 0.502930, 0.628128", \ + "0.426452, 0.428590, 0.433951, 0.446031, 0.470496, 0.502033, 0.627231", \ + "0.423860, 0.425999, 0.431360, 0.443440, 0.467904, 0.499441, 0.624639", \ + "0.419557, 0.421697, 0.427057, 0.439137, 0.463601, 0.495139, 0.620337", \ + "0.410699, 0.412838, 0.418198, 0.430279, 0.454743, 0.486281, 0.611478", \ + "0.407392, 0.409630, 0.415028, 0.426249, 0.448494, 0.475191, 0.600113", \ + "0.493175, 0.495414, 0.500811, 0.512033, 0.534277, 0.560975, 0.667582" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.217361, 0.217483, 0.213703, 0.210462, 0.208349, 0.203229, 0.286287", \ + "0.218846, 0.218968, 0.215188, 0.211947, 0.209834, 0.204714, 0.287772", \ + "0.220975, 0.221097, 0.217316, 0.214075, 0.211962, 0.206843, 0.289901", \ + "0.226338, 0.226460, 0.222680, 0.219439, 0.217326, 0.212207, 0.295264", \ + "0.236128, 0.236250, 0.232470, 0.229229, 0.227116, 0.221997, 0.305054", \ + "0.249262, 0.249384, 0.245604, 0.242363, 0.240250, 0.235131, 0.318188", \ + "0.340924, 0.341046, 0.337266, 0.334025, 0.331912, 0.326792, 0.409850" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.217361, 0.217483, 0.213703, 0.210462, 0.208349, 0.203229, 0.286287", \ + "0.218846, 0.218968, 0.215188, 0.211947, 0.209834, 0.204714, 0.287772", \ + "0.220975, 0.221097, 0.217316, 0.214075, 0.211962, 0.206843, 0.289901", \ + "0.226338, 0.226460, 0.222680, 0.219439, 0.217326, 0.212207, 0.295264", \ + "0.236128, 0.236250, 0.232470, 0.229229, 0.227116, 0.221997, 0.305054", \ + "0.249262, 0.249384, 0.245604, 0.242363, 0.240250, 0.235131, 0.318188", \ + "0.340924, 0.341046, 0.337266, 0.334025, 0.331912, 0.326792, 0.409850" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.384993, 0.385160, 0.386483, 0.387356, 0.387744, 0.390091, 0.390481"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.403250, 0.409909, 0.410319, 0.410729, 0.411141, 0.411552, 0.411963"); + } + } + } + pin(TCENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001357; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.104990, 0.105990, 0.108647, 0.113778, 0.124588, 0.137898, 0.229018", \ + "0.104548, 0.105548, 0.108205, 0.113336, 0.124146, 0.137456, 0.228576", \ + "0.104305, 0.105305, 0.107962, 0.113093, 0.123903, 0.137213, 0.228333", \ + "0.104406, 0.105406, 0.108063, 0.113194, 0.124004, 0.137314, 0.228434", \ + "0.105578, 0.106578, 0.109235, 0.114366, 0.125176, 0.138486, 0.229606", \ + "0.111365, 0.112365, 0.115022, 0.120153, 0.130963, 0.144273, 0.235393", \ + "0.196928, 0.197928, 0.200585, 0.205716, 0.216526, 0.229836, 0.320956" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.110023, 0.110934, 0.113690, 0.119200, 0.130860, 0.146380, 0.246930", \ + "0.109052, 0.109963, 0.112719, 0.118229, 0.129889, 0.145409, 0.245959", \ + "0.106887, 0.107798, 0.110554, 0.116064, 0.127724, 0.143244, 0.243794", \ + "0.102447, 0.103358, 0.106114, 0.111624, 0.123284, 0.138804, 0.239354", \ + "0.093334, 0.094245, 0.097001, 0.102511, 0.114171, 0.129691, 0.230241", \ + "0.098301, 0.098744, 0.102146, 0.108113, 0.119408, 0.134498, 0.234518", \ + "0.183922, 0.184365, 0.187767, 0.193734, 0.205029, 0.220119, 0.320139" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.053019, 0.051427, 0.049053, 0.044440, 0.034853, 0.031849, 0.091660", \ + "0.054243, 0.052651, 0.050277, 0.045664, 0.036077, 0.033073, 0.091660", \ + "0.056295, 0.054703, 0.052329, 0.047716, 0.038129, 0.035125, 0.092084", \ + "0.060696, 0.059104, 0.056730, 0.052117, 0.042530, 0.039526, 0.096485", \ + "0.068818, 0.067226, 0.064852, 0.060239, 0.050652, 0.047648, 0.104607", \ + "0.079039, 0.077447, 0.075073, 0.070460, 0.060873, 0.057869, 0.114828", \ + "0.167305, 0.165713, 0.163339, 0.158726, 0.149139, 0.146135, 0.203094" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.039967, 0.040518, 0.036089, 0.029910, 0.018891, 0.016410, 0.091660", \ + "0.041049, 0.041600, 0.037171, 0.030992, 0.019973, 0.016410, 0.091660", \ + "0.043222, 0.043773, 0.039344, 0.033165, 0.022146, 0.016410, 0.091660", \ + "0.047554, 0.048105, 0.043676, 0.037497, 0.026478, 0.016410, 0.091660", \ + "0.056941, 0.057492, 0.053063, 0.046884, 0.035865, 0.020891, 0.091660", \ + "0.069206, 0.069757, 0.065328, 0.059149, 0.048130, 0.033156, 0.091660", \ + "0.161381, 0.161932, 0.157503, 0.151324, 0.140305, 0.125331, 0.180422" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.029087, 0.029172, 0.029201, 0.029230, 0.029259, 0.029289, 0.029318"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.051401, 0.051453, 0.051504, 0.051556, 0.051607, 0.051659, 0.051710"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.035502", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.036193", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.038322", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.042733", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.051385", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.063741", \ + "1.076670, 1.075578, 1.073822, 1.072066, 1.073122, 1.074282, 1.080260" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.376812, 0.374822, 0.372842, 0.368402, 0.357652, 0.341082, 0.319872", \ + "0.380792, 0.378802, 0.376822, 0.372382, 0.361632, 0.345062, 0.323852", \ + "0.384762, 0.382772, 0.380792, 0.376352, 0.365602, 0.349032, 0.327822", \ + "0.393652, 0.391662, 0.389682, 0.385242, 0.374492, 0.357922, 0.336712", \ + "0.415132, 0.413142, 0.411162, 0.406722, 0.395972, 0.379402, 0.358192", \ + "0.448272, 0.446282, 0.444302, 0.439862, 0.429112, 0.412542, 0.391332", \ + "0.490692, 0.488702, 0.486722, 0.482282, 0.471532, 0.454962, 0.433752" \ + ); + } + } + } + bus(TWENB) { + bus_type : rf2_32x128_wm1_TWENB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001242; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.019780, 0.019685, 0.023066, 0.028126, 0.039532, 0.056144, 0.158542", \ + "0.018573, 0.018478, 0.021859, 0.026919, 0.038325, 0.054937, 0.157335", \ + "0.016446, 0.016351, 0.019732, 0.024792, 0.036198, 0.052810, 0.155208", \ + "0.015000, 0.015000, 0.015000, 0.019942, 0.031348, 0.047960, 0.150358", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.022478, 0.039090, 0.141488", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.027470, 0.129868", \ + "0.090250, 0.090250, 0.090250, 0.090250, 0.090250, 0.090250, 0.189859" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.015000, 0.015354, 0.018234, 0.023249, 0.036468, 0.055585, 0.165596", \ + "0.015000, 0.015000, 0.017023, 0.022037, 0.035257, 0.054374, 0.164384", \ + "0.015000, 0.015000, 0.015000, 0.019917, 0.033135, 0.052253, 0.162264", \ + "0.015000, 0.015000, 0.015000, 0.015060, 0.028278, 0.047396, 0.157407", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.019412, 0.038529, 0.148540", \ + "0.015000, 0.015000, 0.015000, 0.015000, 0.015000, 0.026901, 0.136912", \ + "0.090250, 0.090250, 0.090250, 0.090250, 0.090250, 0.090250, 0.196915" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.197601, 0.197712, 0.194275, 0.191329, 0.189408, 0.184754, 0.267102", \ + "0.198951, 0.199062, 0.195625, 0.192679, 0.190758, 0.186104, 0.268452", \ + "0.200886, 0.200997, 0.197560, 0.194614, 0.192693, 0.188039, 0.270387", \ + "0.205762, 0.205873, 0.202436, 0.199490, 0.197569, 0.192915, 0.275263", \ + "0.214662, 0.214773, 0.211336, 0.208390, 0.206469, 0.201815, 0.284163", \ + "0.226602, 0.226713, 0.223276, 0.220330, 0.218409, 0.213755, 0.296103", \ + "0.316772, 0.316883, 0.313446, 0.310500, 0.308579, 0.303925, 0.386273" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.196382, 0.195523, 0.192814, 0.188962, 0.180772, 0.173659, 0.242306", \ + "0.197723, 0.196864, 0.194155, 0.190303, 0.182113, 0.175000, 0.243647", \ + "0.199659, 0.198800, 0.196091, 0.192239, 0.184049, 0.176936, 0.245583", \ + "0.204540, 0.203681, 0.200972, 0.197120, 0.188930, 0.181817, 0.250464", \ + "0.213440, 0.212581, 0.209872, 0.206020, 0.197830, 0.190717, 0.259364", \ + "0.225380, 0.224521, 0.221812, 0.217960, 0.209770, 0.202657, 0.271304", \ + "0.315540, 0.314681, 0.311972, 0.308120, 0.299930, 0.292817, 0.361464" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.003531, 0.003542, 0.003545, 0.003549, 0.003552, 0.003556, 0.003559"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004384, 0.004388, 0.004392, 0.004397, 0.004401, 0.004406, 0.004410"); + } + } + } + bus(TAB) { + bus_type : rf2_32x128_wm1_TAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001586; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.131175, 0.132075, 0.134695, 0.140685, 0.153715, 0.171865, 0.281575", \ + "0.130215, 0.131115, 0.133735, 0.139725, 0.152755, 0.170905, 0.280615", \ + "0.128075, 0.128975, 0.131595, 0.137585, 0.150615, 0.168765, 0.278475", \ + "0.123615, 0.124515, 0.127135, 0.133125, 0.146155, 0.164305, 0.274015", \ + "0.114725, 0.115625, 0.118245, 0.124235, 0.137265, 0.155415, 0.265125", \ + "0.103307, 0.104207, 0.106827, 0.112817, 0.125847, 0.143997, 0.253707", \ + "0.160897, 0.161797, 0.164417, 0.170407, 0.183437, 0.201587, 0.311297" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.131175, 0.132075, 0.134695, 0.140685, 0.153715, 0.171865, 0.281575", \ + "0.130215, 0.131115, 0.133735, 0.139725, 0.152755, 0.170905, 0.280615", \ + "0.128075, 0.128975, 0.131595, 0.137585, 0.150615, 0.168765, 0.278475", \ + "0.123615, 0.124515, 0.127135, 0.133125, 0.146155, 0.164305, 0.274015", \ + "0.114725, 0.115625, 0.118245, 0.124235, 0.137265, 0.155415, 0.265125", \ + "0.103307, 0.104207, 0.106827, 0.112817, 0.125847, 0.143997, 0.253707", \ + "0.160897, 0.161797, 0.164417, 0.170407, 0.183437, 0.201587, 0.311297" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.071671, 0.070983, 0.068286, 0.065709, 0.059767, 0.059189, 0.142015", \ + "0.072759, 0.072071, 0.069374, 0.066797, 0.060855, 0.060277, 0.143103", \ + "0.074929, 0.074241, 0.071544, 0.068967, 0.063025, 0.062447, 0.145273", \ + "0.079273, 0.078585, 0.075888, 0.073311, 0.067369, 0.066791, 0.149617", \ + "0.088399, 0.087711, 0.085014, 0.082437, 0.076495, 0.075917, 0.158743", \ + "0.099703, 0.099015, 0.096318, 0.093741, 0.087799, 0.087221, 0.170047", \ + "0.193107, 0.192419, 0.189722, 0.187145, 0.181203, 0.180625, 0.263451" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.072990, 0.072175, 0.069605, 0.066548, 0.059432, 0.056645, 0.131141", \ + "0.074077, 0.073262, 0.070692, 0.067635, 0.060519, 0.057732, 0.132228", \ + "0.076246, 0.075431, 0.072861, 0.069804, 0.062688, 0.059901, 0.134397", \ + "0.080591, 0.079776, 0.077206, 0.074149, 0.067033, 0.064246, 0.138742", \ + "0.089717, 0.088902, 0.086332, 0.083275, 0.076159, 0.073372, 0.147868", \ + "0.101021, 0.100206, 0.097636, 0.094579, 0.087463, 0.084676, 0.159172", \ + "0.194428, 0.193613, 0.191043, 0.187986, 0.180870, 0.178083, 0.252579" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.131175, 0.132075, 0.134695, 0.140685, 0.153715, 0.171865, 0.281575", \ + "0.130215, 0.131115, 0.133735, 0.139725, 0.152755, 0.170905, 0.280615", \ + "0.128075, 0.128975, 0.131595, 0.137585, 0.150615, 0.168765, 0.278475", \ + "0.123615, 0.124515, 0.127135, 0.133125, 0.146155, 0.164305, 0.274015", \ + "0.114725, 0.115625, 0.118245, 0.124235, 0.137265, 0.155415, 0.265125", \ + "0.103307, 0.104207, 0.106827, 0.112817, 0.125847, 0.143997, 0.253707", \ + "0.160897, 0.161797, 0.164417, 0.170407, 0.183437, 0.201587, 0.311297" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.131175, 0.132075, 0.134695, 0.140685, 0.153715, 0.171865, 0.281575", \ + "0.130215, 0.131115, 0.133735, 0.139725, 0.152755, 0.170905, 0.280615", \ + "0.128075, 0.128975, 0.131595, 0.137585, 0.150615, 0.168765, 0.278475", \ + "0.123615, 0.124515, 0.127135, 0.133125, 0.146155, 0.164305, 0.274015", \ + "0.114725, 0.115625, 0.118245, 0.124235, 0.137265, 0.155415, 0.265125", \ + "0.103307, 0.104207, 0.106827, 0.112817, 0.125847, 0.143997, 0.253707", \ + "0.160897, 0.161797, 0.164417, 0.170407, 0.183437, 0.201587, 0.311297" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.071671, 0.070983, 0.068286, 0.065709, 0.059767, 0.059189, 0.142015", \ + "0.072759, 0.072071, 0.069374, 0.066797, 0.060855, 0.060277, 0.143103", \ + "0.074929, 0.074241, 0.071544, 0.068967, 0.063025, 0.062447, 0.145273", \ + "0.079273, 0.078585, 0.075888, 0.073311, 0.067369, 0.066791, 0.149617", \ + "0.088399, 0.087711, 0.085014, 0.082437, 0.076495, 0.075917, 0.158743", \ + "0.099703, 0.099015, 0.096318, 0.093741, 0.087799, 0.087221, 0.170047", \ + "0.193107, 0.192419, 0.189722, 0.187145, 0.181203, 0.180625, 0.263451" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.072990, 0.072175, 0.069605, 0.066548, 0.059432, 0.056645, 0.131141", \ + "0.074077, 0.073262, 0.070692, 0.067635, 0.060519, 0.057732, 0.132228", \ + "0.076246, 0.075431, 0.072861, 0.069804, 0.062688, 0.059901, 0.134397", \ + "0.080591, 0.079776, 0.077206, 0.074149, 0.067033, 0.064246, 0.138742", \ + "0.089717, 0.088902, 0.086332, 0.083275, 0.076159, 0.073372, 0.147868", \ + "0.101021, 0.100206, 0.097636, 0.094579, 0.087463, 0.084676, 0.159172", \ + "0.194428, 0.193613, 0.191043, 0.187986, 0.180870, 0.178083, 0.252579" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.017232, 0.017249, 0.017266, 0.017283, 0.017301, 0.017318, 0.017335"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015493, 0.015509, 0.015524, 0.015540, 0.015555, 0.015571, 0.015586"); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.017232, 0.017249, 0.017266, 0.017283, 0.017301, 0.017318, 0.017335"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015493, 0.015509, 0.015524, 0.015540, 0.015555, 0.015571, 0.015586"); + } + } + } + bus(TDB) { + bus_type : rf2_32x128_wm1_TDB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : TAB; + clocked_on : CLKB; + } + capacitance : 0.001610; + max_transition : 0.301000; + pin(TDB[127]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[127]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB127eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[127])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[126]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[126]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB126eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[126])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[125]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[125]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB125eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[125])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[124]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[124]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB124eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[124])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[123]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[123]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB123eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[123])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[122]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[122]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB122eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[122])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[121]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[121]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB121eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[121])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[120]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[120]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB120eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[120])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[119]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[119]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB119eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[119])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[118]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[118]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB118eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[118])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[117]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[117]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB117eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[117])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[116]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[116]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB116eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[116])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[115]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[115]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB115eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[115])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[114]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[114]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB114eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[114])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[113]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[113]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB113eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[113])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[112]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[112]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB112eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[112])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[111]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[111]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB111eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[111])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[110]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[110]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB110eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[110])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[109]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[109]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB109eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[109])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[108]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[108]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB108eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[108])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[107]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[107]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB107eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[107])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[106]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[106]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB106eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[106])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[105]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[105]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB105eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[105])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[104]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[104]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB104eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[104])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[103]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[103]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB103eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[103])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[102]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[102]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB102eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[102])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[101]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[101]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB101eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[101])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[100]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[100]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB100eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[100])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[99]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[99]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB99eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[99])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[98]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[98]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB98eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[98])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[97]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[97]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB97eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[97])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[96]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[96]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB96eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[96])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[95]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[95]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB95eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[95])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[94]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[94]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB94eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[94])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[93]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[93]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB93eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[93])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[92]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[92]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB92eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[92])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[91]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[91]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB91eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[91])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[90]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[90]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB90eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[90])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[89]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[89]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB89eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[89])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[88]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[88]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB88eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[88])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[87]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[87]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB87eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[87])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[86]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[86]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB86eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[86])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[85]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[85]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB85eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[85])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[84]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[84]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB84eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[84])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[83]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[83]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB83eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[83])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[82]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[82]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB82eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[82])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[81]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[81]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB81eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[81])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[80]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[80]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB80eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[80])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[79]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[79]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB79eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[79])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[78]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[78]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB78eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[78])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[77]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[77]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB77eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[77])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[76]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[76]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB76eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[76])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[75]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[75]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB75eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[75])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[74]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[74]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB74eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[74])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[73]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[73]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB73eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[73])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[72]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[72]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB72eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[72])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[71]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[71]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB71eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[71])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[70]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[70]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB70eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[70])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[69]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[69]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB69eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[69])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[68]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[68]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB68eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[68])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[67]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[67]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB67eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[67])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[66]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[66]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB66eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[66])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[65]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[65]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB65eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[65])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[64]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[64]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB64eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[64])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[63]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[63]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB63eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[63])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[62]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[62]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB62eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[62])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[61]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[61]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB61eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[61])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[60]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[60]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB60eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[60])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[59]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[59]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB59eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[59])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[58]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[58]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB58eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[58])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[57]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[57]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB57eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[57])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[56]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[56]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB56eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[56])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[55]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[55]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB55eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[55])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[54]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[54]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB54eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[54])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[53]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[53]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB53eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[53])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[52]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[52]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB52eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[52])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[51]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[51]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB51eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[51])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[50]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[50]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB50eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[50])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[49]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[49]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB49eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[49])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[48]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[48]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB48eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[48])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[47]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[47]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB47eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[47])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[46]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[46]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB46eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[46])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[45]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[45]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB45eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[45])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[44]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[44]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB44eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[44])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[43]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[43]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB43eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[43])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[42]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[42]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB42eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[42])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[41]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[41]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB41eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[41])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[40]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[40]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB40eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[40])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[39]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[39]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB39eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[39])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[38]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[38]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB38eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[38])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[37]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[37]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB37eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[37])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[36]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[36]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB36eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[36])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[35]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[35]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB35eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[35])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[34]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[34]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB34eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[34])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[33]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[33]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB33eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[33])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[32]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[32]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB32eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[32])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[31]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[31]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB31eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[31])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[30]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[30]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB30eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[30])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[29]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[29]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB29eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[29])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[28]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[28]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB28eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[28])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[27]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[27]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB27eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[27])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[26]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[26]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB26eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[26])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[25]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[25]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB25eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[25])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[24]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[24]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB24eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[24])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[23]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[23]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB23eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[23])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[22]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[22]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB22eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[22])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[21]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[21]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB21eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[21])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[20]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[20]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB20eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[20])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[19]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[19]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB19eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[19])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[18]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[18]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB18eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[18])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[17]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[17]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB17eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[17])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[16]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[16]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB16eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[16])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[15]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[15]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB15eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[15])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[14]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[14]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB14eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[14])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[13]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[13]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB13eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[13])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[12]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[12]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB12eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[12])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[11]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[11]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB11eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[11])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[10]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[10]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB10eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[10])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[9]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[9]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB9eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[9])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[8]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[8]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB8eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[8])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[7]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[7]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB7eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[7])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[6]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[6]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB6eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[6])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[5]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[5]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB5eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[5])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[4]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[4]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB4eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[4])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[3]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[3]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB3eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[3])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[2]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[2]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB2eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[2])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[1]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[1]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB1eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[1])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(TDB[0]) { + direction : input; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038479, 0.039714, 0.041338, 0.047127, 0.058683, 0.074947, 0.178927", \ + "0.037269, 0.038504, 0.040128, 0.045917, 0.057473, 0.073737, 0.177717", \ + "0.035161, 0.036396, 0.038020, 0.043809, 0.055365, 0.071629, 0.175609", \ + "0.030303, 0.031538, 0.033162, 0.038951, 0.050507, 0.066771, 0.170751", \ + "0.021436, 0.022671, 0.024295, 0.030084, 0.041640, 0.057904, 0.161884", \ + "0.009783, 0.011018, 0.012642, 0.018431, 0.029987, 0.046251, 0.150231", \ + "0.082482, 0.082482, 0.082482, 0.082482, 0.089990, 0.106254, 0.210234" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.045360, 0.046799, 0.049978, 0.055541, 0.068005, 0.089059, 0.197199", \ + "0.043915, 0.045354, 0.048533, 0.054096, 0.066560, 0.087614, 0.195754", \ + "0.042018, 0.043457, 0.046636, 0.052199, 0.064663, 0.085717, 0.193857", \ + "0.037161, 0.038600, 0.041779, 0.047342, 0.059806, 0.080860, 0.189000", \ + "0.028248, 0.029687, 0.032866, 0.038429, 0.050893, 0.071947, 0.180087", \ + "0.016667, 0.018106, 0.021285, 0.026848, 0.039312, 0.060366, 0.168506", \ + "0.082482, 0.082482, 0.082482, 0.086847, 0.099311, 0.120365, 0.228505" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP&!TWENB[0]))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0aTWENB0eq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "!TENB&(DFTRAMBYP|!TWENB[0])"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + } + pin(RET1N) { + direction : input; + always_on : true; + related_power_pin : "VDDCE"; + related_ground_pin : "VSSE"; + capacitance : 0.003399; + max_transition : 0.301000; + internal_power() { + when : "((!DFTRAMBYP&CENA&TENA)|(!DFTRAMBYP&TCENA&!TENA))&((!DFTRAMBYP&CENB&TENB)|(!DFTRAMBYP&TCENB&!TENB))"; + related_pg_pin : "VDDCE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("3.758507, 3.762273, 3.766037, 3.769805, 3.773574, 3.777348, 3.781126"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.495590, 0.496096, 0.496592, 0.497088, 0.497585, 0.498083, 0.498581"); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.027506, 0.027733, 0.028422, 0.029800, 0.032715, 0.036595, 0.042920", \ + "0.027263, 0.027491, 0.028180, 0.029557, 0.032472, 0.036352, 0.042677", \ + "0.026722, 0.026949, 0.027638, 0.029016, 0.031931, 0.035811, 0.042136", \ + "0.026101, 0.026351, 0.027016, 0.028298, 0.031001, 0.034701, 0.041026", \ + "0.026394, 0.026644, 0.027309, 0.028591, 0.031294, 0.034621, 0.038748", \ + "0.027841, 0.028091, 0.028755, 0.030038, 0.032741, 0.036068, 0.040036", \ + "0.030419, 0.030669, 0.031334, 0.032616, 0.035319, 0.038647, 0.042614" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.035502", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.036193", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.038322", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.042733", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.051385", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.063741", \ + "1.076670, 1.075578, 1.073822, 1.072066, 1.073122, 1.074282, 1.080260" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.027506, 0.027733, 0.028422, 0.029800, 0.032715, 0.036595, 0.042920", \ + "0.027263, 0.027491, 0.028180, 0.029557, 0.032472, 0.036352, 0.042677", \ + "0.026722, 0.026949, 0.027638, 0.029016, 0.031931, 0.035811, 0.042136", \ + "0.026101, 0.026351, 0.027016, 0.028298, 0.031001, 0.034701, 0.041026", \ + "0.026394, 0.026644, 0.027309, 0.028591, 0.031294, 0.034621, 0.038748", \ + "0.027841, 0.028091, 0.028755, 0.030038, 0.032741, 0.036068, 0.040036", \ + "0.030419, 0.030669, 0.031334, 0.032616, 0.035319, 0.038647, 0.042614" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.026424, 0.026672, 0.027481, 0.028799, 0.031637, 0.035292, 0.041592", \ + "0.026154, 0.026402, 0.027211, 0.028529, 0.031367, 0.035022, 0.041322", \ + "0.025745, 0.025993, 0.026801, 0.028120, 0.030957, 0.034612, 0.040912", \ + "0.024608, 0.024856, 0.025665, 0.026983, 0.029821, 0.033476, 0.039776", \ + "0.024537, 0.024820, 0.025382, 0.026578, 0.029399, 0.032244, 0.037508", \ + "0.025966, 0.026250, 0.026811, 0.028007, 0.030829, 0.033674, 0.037814", \ + "0.028486, 0.028769, 0.029330, 0.030526, 0.033348, 0.036193, 0.040333" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.026424, 0.026672, 0.027481, 0.028799, 0.031637, 0.035292, 0.041592", \ + "0.026154, 0.026402, 0.027211, 0.028529, 0.031367, 0.035022, 0.041322", \ + "0.025745, 0.025993, 0.026801, 0.028120, 0.030957, 0.034612, 0.040912", \ + "0.024608, 0.024856, 0.025665, 0.026983, 0.029821, 0.033476, 0.039776", \ + "0.024537, 0.024820, 0.025382, 0.026578, 0.029399, 0.032244, 0.037508", \ + "0.025966, 0.026250, 0.026811, 0.028007, 0.030829, 0.033674, 0.037814", \ + "0.028486, 0.028769, 0.029330, 0.030526, 0.033348, 0.036193, 0.040333" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.027506, 0.027733, 0.028422, 0.029800, 0.032715, 0.036595, 0.042920", \ + "0.027263, 0.027491, 0.028180, 0.029557, 0.032472, 0.036352, 0.042677", \ + "0.026722, 0.026949, 0.027638, 0.029016, 0.031931, 0.035811, 0.042136", \ + "0.026101, 0.026351, 0.027016, 0.028298, 0.031001, 0.034701, 0.041026", \ + "0.026394, 0.026644, 0.027309, 0.028591, 0.031294, 0.034621, 0.038748", \ + "0.027841, 0.028091, 0.028755, 0.030038, 0.032741, 0.036068, 0.040036", \ + "0.030419, 0.030669, 0.031334, 0.032616, 0.035319, 0.038647, 0.042614" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.035502", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.036193", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.038322", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.042733", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.051385", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.063741", \ + "1.076670, 1.075578, 1.073822, 1.072066, 1.073122, 1.074282, 1.080260" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.967002, 0.965910, 0.964154, 0.962398, 0.963454, 0.964614, 0.970592", \ + "0.967693, 0.966601, 0.964845, 0.963089, 0.964145, 0.965305, 0.971283", \ + "0.969822, 0.968730, 0.966974, 0.965218, 0.966274, 0.967434, 0.973412", \ + "0.974233, 0.973141, 0.971385, 0.969629, 0.970685, 0.971845, 0.977823", \ + "0.982885, 0.981793, 0.980037, 0.978281, 0.979337, 0.980497, 0.986475", \ + "0.995241, 0.994149, 0.992393, 0.990637, 0.991693, 0.992853, 0.998831", \ + "1.011760, 1.010668, 1.008912, 1.007156, 1.008212, 1.009372, 1.015350" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.035502", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.036193", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.038322", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.042733", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.051385", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.063741", \ + "1.076670, 1.075578, 1.073822, 1.072066, 1.073122, 1.074282, 1.080260" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.967002, 0.965910, 0.964154, 0.962398, 0.963454, 0.964614, 0.970592", \ + "0.967693, 0.966601, 0.964845, 0.963089, 0.964145, 0.965305, 0.971283", \ + "0.969822, 0.968730, 0.966974, 0.965218, 0.966274, 0.967434, 0.973412", \ + "0.974233, 0.973141, 0.971385, 0.969629, 0.970685, 0.971845, 0.977823", \ + "0.982885, 0.981793, 0.980037, 0.978281, 0.979337, 0.980497, 0.986475", \ + "0.995241, 0.994149, 0.992393, 0.990637, 0.991693, 0.992853, 0.998831", \ + "1.011760, 1.010668, 1.008912, 1.007156, 1.008212, 1.009372, 1.015350" \ + ); + } + } + } + bus(SIA) { + bus_type : rf2_32x128_wm1_SIA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001217; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.225511, 0.227965, 0.234816, 0.248104, 0.276352, 0.317774, 0.462696", \ + "0.224217, 0.226555, 0.233684, 0.246972, 0.275220, 0.316643, 0.461565", \ + "0.222430, 0.224884, 0.231811, 0.245100, 0.273347, 0.314770, 0.459692", \ + "0.217616, 0.220069, 0.226844, 0.240133, 0.268380, 0.309803, 0.454725", \ + "0.206794, 0.209247, 0.215747, 0.229036, 0.257283, 0.298706, 0.443628", \ + "0.200839, 0.203087, 0.209444, 0.221164, 0.249252, 0.285331, 0.430253", \ + "0.287260, 0.289507, 0.295878, 0.307598, 0.335686, 0.368650, 0.497181" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.225511, 0.227965, 0.234816, 0.248104, 0.276352, 0.317774, 0.462696", \ + "0.224217, 0.226555, 0.233684, 0.246972, 0.275220, 0.316643, 0.461565", \ + "0.222430, 0.224884, 0.231811, 0.245100, 0.273347, 0.314770, 0.459692", \ + "0.217616, 0.220069, 0.226844, 0.240133, 0.268380, 0.309803, 0.454725", \ + "0.206794, 0.209247, 0.215747, 0.229036, 0.257283, 0.298706, 0.443628", \ + "0.200839, 0.203087, 0.209444, 0.221164, 0.249252, 0.285331, 0.430253", \ + "0.287260, 0.289507, 0.295878, 0.307598, 0.335686, 0.368650, 0.497181" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.074396, 0.073909, 0.070311, 0.067485, 0.063353, 0.065118, 0.144359", \ + "0.075071, 0.074583, 0.070985, 0.068159, 0.064028, 0.065792, 0.145033", \ + "0.077247, 0.076760, 0.073162, 0.070336, 0.066205, 0.067969, 0.147210", \ + "0.083358, 0.082871, 0.079273, 0.076447, 0.072315, 0.074080, 0.153320", \ + "0.092727, 0.092239, 0.088641, 0.085815, 0.081684, 0.083448, 0.162689", \ + "0.107117, 0.106630, 0.103032, 0.100206, 0.096074, 0.097838, 0.177079", \ + "0.200340, 0.199852, 0.196254, 0.193429, 0.189297, 0.191061, 0.270302" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.074382, 0.073610, 0.069949, 0.066040, 0.059104, 0.052131, 0.119758", \ + "0.075067, 0.074295, 0.070634, 0.066725, 0.059789, 0.052817, 0.120444", \ + "0.077003, 0.076231, 0.072570, 0.068661, 0.061725, 0.054753, 0.122380", \ + "0.082921, 0.082149, 0.078488, 0.074579, 0.067643, 0.060671, 0.128298", \ + "0.092415, 0.091643, 0.087982, 0.084073, 0.077138, 0.070165, 0.137792", \ + "0.106552, 0.105779, 0.102119, 0.098209, 0.091274, 0.084301, 0.151928", \ + "0.200318, 0.199546, 0.195885, 0.191975, 0.185040, 0.178067, 0.245694" \ + ); + } + } + internal_power() { + when : "SEA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.006616, 0.006622, 0.006629, 0.006644, 0.006650, 0.006657, 0.006664"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011343, 0.011355, 0.011366, 0.011377, 0.011389, 0.011400, 0.011412"); + } + } + } + pin(SEA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001602; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.225511, 0.227965, 0.234816, 0.248104, 0.276352, 0.317774, 0.462696", \ + "0.224217, 0.226555, 0.233684, 0.246972, 0.275220, 0.316643, 0.461565", \ + "0.222430, 0.224884, 0.231811, 0.245100, 0.273347, 0.314770, 0.459692", \ + "0.217616, 0.220069, 0.226844, 0.240133, 0.268380, 0.309803, 0.454725", \ + "0.206794, 0.209247, 0.215747, 0.229036, 0.257283, 0.298706, 0.443628", \ + "0.200839, 0.203087, 0.209444, 0.221164, 0.249252, 0.285331, 0.430253", \ + "0.287260, 0.289507, 0.295878, 0.307598, 0.335686, 0.368650, 0.497181" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.225511, 0.227965, 0.234816, 0.248104, 0.276352, 0.317774, 0.462696", \ + "0.224217, 0.226555, 0.233684, 0.246972, 0.275220, 0.316643, 0.461565", \ + "0.222430, 0.224884, 0.231811, 0.245100, 0.273347, 0.314770, 0.459692", \ + "0.217616, 0.220069, 0.226844, 0.240133, 0.268380, 0.309803, 0.454725", \ + "0.206794, 0.209247, 0.215747, 0.229036, 0.257283, 0.298706, 0.443628", \ + "0.200839, 0.203087, 0.209444, 0.221164, 0.249252, 0.285331, 0.430253", \ + "0.287260, 0.289507, 0.295878, 0.307598, 0.335686, 0.368650, 0.497181" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.006616, 0.006622, 0.006629, 0.006644, 0.006650, 0.006657, 0.006664"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011343, 0.011355, 0.011366, 0.011377, 0.011389, 0.011400, 0.011412"); + } + } + } + pin(DFTRAMBYP) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002056; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.250260, 0.250340, 0.253870, 0.259100, 0.271060, 0.283790, 0.380520", \ + "0.249730, 0.249810, 0.253340, 0.258570, 0.270530, 0.283260, 0.379990", \ + "0.247660, 0.247740, 0.251270, 0.256500, 0.268460, 0.281190, 0.377920", \ + "0.242970, 0.243050, 0.246580, 0.251810, 0.263770, 0.276500, 0.373230", \ + "0.233860, 0.233940, 0.237470, 0.242700, 0.254660, 0.267390, 0.364120", \ + "0.221520, 0.221600, 0.225130, 0.230360, 0.242320, 0.255050, 0.351780", \ + "0.279080, 0.279160, 0.282690, 0.287920, 0.299880, 0.312610, 0.409340" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.319470, 0.321070, 0.322790, 0.329980, 0.342540, 0.357500, 0.458580", \ + "0.318850, 0.320450, 0.322170, 0.329360, 0.341920, 0.356880, 0.457960", \ + "0.316870, 0.318470, 0.320190, 0.327380, 0.339940, 0.354900, 0.455980", \ + "0.312180, 0.313780, 0.315500, 0.322690, 0.335250, 0.350210, 0.451290", \ + "0.304130, 0.305730, 0.307450, 0.314640, 0.327200, 0.342160, 0.443240", \ + "0.290720, 0.292320, 0.294040, 0.301230, 0.313790, 0.328750, 0.429830", \ + "0.348290, 0.349890, 0.351610, 0.358800, 0.371360, 0.386320, 0.487400" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.250260, 0.250340, 0.253870, 0.259100, 0.271060, 0.283790, 0.380520", \ + "0.249730, 0.249810, 0.253340, 0.258570, 0.270530, 0.283260, 0.379990", \ + "0.247660, 0.247740, 0.251270, 0.256500, 0.268460, 0.281190, 0.377920", \ + "0.242970, 0.243050, 0.246580, 0.251810, 0.263770, 0.276500, 0.373230", \ + "0.233860, 0.233940, 0.237470, 0.242700, 0.254660, 0.267390, 0.364120", \ + "0.221520, 0.221600, 0.225130, 0.230360, 0.242320, 0.255050, 0.351780", \ + "0.279080, 0.279160, 0.282690, 0.287920, 0.299880, 0.312610, 0.409340" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.319470, 0.321070, 0.322790, 0.329980, 0.342540, 0.357500, 0.458580", \ + "0.318850, 0.320450, 0.322170, 0.329360, 0.341920, 0.356880, 0.457960", \ + "0.316870, 0.318470, 0.320190, 0.327380, 0.339940, 0.354900, 0.455980", \ + "0.312180, 0.313780, 0.315500, 0.322690, 0.335250, 0.350210, 0.451290", \ + "0.304130, 0.305730, 0.307450, 0.314640, 0.327200, 0.342160, 0.443240", \ + "0.290720, 0.292320, 0.294040, 0.301230, 0.313790, 0.328750, 0.429830", \ + "0.348290, 0.349890, 0.351610, 0.358800, 0.371360, 0.386320, 0.487400" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.110752", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.111443", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.113572", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.117983", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.126635", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.138991", \ + "1.151920, 1.150828, 1.149072, 1.147316, 1.148372, 1.149532, 1.230760" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.110752", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.111443", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.113572", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.117983", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.126635", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.138991", \ + "1.151920, 1.150828, 1.149072, 1.147316, 1.148372, 1.149532, 1.230760" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.675431, 0.676191, 0.676867, 0.677544, 0.678221, 0.678900, 0.679668"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.787472, 0.787717, 0.788478, 0.789266, 0.790055, 0.790843, 0.791639"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.031912, 1.030820, 1.029064, 1.027308, 1.028364, 1.029524, 1.035502", \ + "1.032603, 1.031511, 1.029755, 1.027999, 1.029055, 1.030215, 1.036193", \ + "1.034732, 1.033640, 1.031884, 1.030128, 1.031184, 1.032344, 1.038322", \ + "1.039143, 1.038051, 1.036295, 1.034539, 1.035595, 1.036755, 1.042733", \ + "1.047795, 1.046703, 1.044947, 1.043191, 1.044247, 1.045407, 1.051385", \ + "1.060151, 1.059059, 1.057303, 1.055547, 1.056603, 1.057763, 1.063741", \ + "1.076670, 1.075578, 1.073822, 1.072066, 1.073122, 1.074282, 1.080260" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x128_wm1_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.376812, 0.374822, 0.372842, 0.368402, 0.357652, 0.341082, 0.319872", \ + "0.380792, 0.378802, 0.376822, 0.372382, 0.361632, 0.345062, 0.323852", \ + "0.384762, 0.382772, 0.380792, 0.376352, 0.365602, 0.349032, 0.327822", \ + "0.393652, 0.391662, 0.389682, 0.385242, 0.374492, 0.357922, 0.336712", \ + "0.415132, 0.413142, 0.411162, 0.406722, 0.395972, 0.379402, 0.358192", \ + "0.448272, 0.446282, 0.444302, 0.439862, 0.429112, 0.412542, 0.391332", \ + "0.490692, 0.488702, 0.486722, 0.482282, 0.471532, 0.454962, 0.433752" \ + ); + } + } + } + bus(SIB) { + bus_type : rf2_32x128_wm1_SIB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005751; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.036247, 0.037482, 0.039106, 0.044895, 0.056451, 0.072715, 0.176695", \ + "0.035037, 0.036272, 0.037896, 0.043685, 0.055241, 0.071505, 0.175485", \ + "0.032929, 0.034164, 0.035788, 0.041577, 0.053133, 0.069397, 0.173377", \ + "0.028071, 0.029306, 0.030930, 0.036719, 0.048275, 0.064539, 0.168519", \ + "0.019204, 0.020439, 0.022063, 0.027852, 0.039408, 0.055672, 0.159652", \ + "0.007551, 0.008786, 0.010410, 0.016199, 0.027755, 0.044019, 0.147999", \ + "0.080250, 0.080250, 0.080250, 0.080250, 0.087758, 0.104022, 0.208002" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.043128, 0.044567, 0.047746, 0.053309, 0.065773, 0.086827, 0.194967", \ + "0.041683, 0.043122, 0.046301, 0.051864, 0.064328, 0.085382, 0.193522", \ + "0.039786, 0.041225, 0.044404, 0.049967, 0.062431, 0.083485, 0.191625", \ + "0.034929, 0.036368, 0.039547, 0.045110, 0.057574, 0.078628, 0.186768", \ + "0.026016, 0.027455, 0.030634, 0.036197, 0.048661, 0.069715, 0.177855", \ + "0.014435, 0.015874, 0.019053, 0.024616, 0.037080, 0.058134, 0.166274", \ + "0.080250, 0.080250, 0.080250, 0.084615, 0.097079, 0.118133, 0.226273" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.193360, 0.192415, 0.189796, 0.187543, 0.177049, 0.167159, 0.234243", \ + "0.194697, 0.193752, 0.191133, 0.188880, 0.178386, 0.168496, 0.235580", \ + "0.196638, 0.195693, 0.193074, 0.190821, 0.180327, 0.170437, 0.237521", \ + "0.201517, 0.200572, 0.197953, 0.195700, 0.185206, 0.175316, 0.242400", \ + "0.210417, 0.209472, 0.206853, 0.204600, 0.194106, 0.184216, 0.251300", \ + "0.222367, 0.221422, 0.218803, 0.216550, 0.206056, 0.196166, 0.263250", \ + "0.312527, 0.311582, 0.308963, 0.306710, 0.296216, 0.286326, 0.353410" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.195901, 0.194493, 0.191601, 0.186242, 0.175509, 0.162788, 0.221982", \ + "0.197242, 0.195834, 0.192942, 0.187583, 0.176850, 0.164129, 0.223323", \ + "0.199179, 0.197771, 0.194879, 0.189520, 0.178787, 0.166066, 0.225260", \ + "0.204059, 0.202651, 0.199759, 0.194400, 0.183667, 0.170946, 0.230140", \ + "0.212969, 0.211561, 0.208669, 0.203310, 0.192577, 0.179856, 0.239050", \ + "0.224899, 0.223491, 0.220599, 0.215240, 0.204507, 0.191786, 0.250980", \ + "0.315059, 0.313651, 0.310759, 0.305400, 0.294667, 0.281946, 0.341140" \ + ); + } + } + internal_power() { + when : "SEB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(SEB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001894; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.427348, 0.429488, 0.434848, 0.446928, 0.471392, 0.502930, 0.628128", \ + "0.426452, 0.428590, 0.433951, 0.446031, 0.470496, 0.502033, 0.627231", \ + "0.423860, 0.425999, 0.431360, 0.443440, 0.467904, 0.499441, 0.624639", \ + "0.419557, 0.421697, 0.427057, 0.439137, 0.463601, 0.495139, 0.620337", \ + "0.410699, 0.412838, 0.418198, 0.430279, 0.454743, 0.486281, 0.611478", \ + "0.407392, 0.409630, 0.415028, 0.426249, 0.448494, 0.475191, 0.600113", \ + "0.493175, 0.495414, 0.500811, 0.512033, 0.534277, 0.560975, 0.667582" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.427348, 0.429488, 0.434848, 0.446928, 0.471392, 0.502930, 0.628128", \ + "0.426452, 0.428590, 0.433951, 0.446031, 0.470496, 0.502033, 0.627231", \ + "0.423860, 0.425999, 0.431360, 0.443440, 0.467904, 0.499441, 0.624639", \ + "0.419557, 0.421697, 0.427057, 0.439137, 0.463601, 0.495139, 0.620337", \ + "0.410699, 0.412838, 0.418198, 0.430279, 0.454743, 0.486281, 0.611478", \ + "0.407392, 0.409630, 0.415028, 0.426249, 0.448494, 0.475191, 0.600113", \ + "0.493175, 0.495414, 0.500811, 0.512033, 0.534277, 0.560975, 0.667582" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.217361, 0.217483, 0.213703, 0.210462, 0.208349, 0.203229, 0.286287", \ + "0.218846, 0.218968, 0.215188, 0.211947, 0.209834, 0.204714, 0.287772", \ + "0.220975, 0.221097, 0.217316, 0.214075, 0.211962, 0.206843, 0.289901", \ + "0.226338, 0.226460, 0.222680, 0.219439, 0.217326, 0.212207, 0.295264", \ + "0.236128, 0.236250, 0.232470, 0.229229, 0.227116, 0.221997, 0.305054", \ + "0.249262, 0.249384, 0.245604, 0.242363, 0.240250, 0.235131, 0.318188", \ + "0.340924, 0.341046, 0.337266, 0.334025, 0.331912, 0.326792, 0.409850" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.217361, 0.217483, 0.213703, 0.210462, 0.208349, 0.203229, 0.286287", \ + "0.218846, 0.218968, 0.215188, 0.211947, 0.209834, 0.204714, 0.287772", \ + "0.220975, 0.221097, 0.217316, 0.214075, 0.211962, 0.206843, 0.289901", \ + "0.226338, 0.226460, 0.222680, 0.219439, 0.217326, 0.212207, 0.295264", \ + "0.236128, 0.236250, 0.232470, 0.229229, 0.227116, 0.221997, 0.305054", \ + "0.249262, 0.249384, 0.245604, 0.242363, 0.240250, 0.235131, 0.318188", \ + "0.340924, 0.341046, 0.337266, 0.334025, 0.331912, 0.326792, 0.409850" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.384993, 0.385160, 0.386483, 0.387356, 0.387744, 0.390091, 0.390481"); + } + fall_power(rf2_32x128_wm1_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.403250, 0.409909, 0.410319, 0.410729, 0.411141, 0.411552, 0.411963"); + } + } + } + pin(COLLDISN) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002131; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.973256, 0.975098, 0.977089, 0.981782, 0.991394, 1.001477, 1.093117", \ + "0.972217, 0.974059, 0.976050, 0.980743, 0.990355, 1.000438, 1.092078", \ + "0.970224, 0.972066, 0.974057, 0.978750, 0.988362, 0.998445, 1.090085", \ + "0.965992, 0.967834, 0.969825, 0.974518, 0.984130, 0.994213, 1.085853", \ + "0.957769, 0.959611, 0.961602, 0.966295, 0.975907, 0.985990, 1.077630", \ + "0.944640, 0.946482, 0.948473, 0.953166, 0.962778, 0.972861, 1.064501", \ + "1.005298, 1.007140, 1.009131, 1.013824, 1.023436, 1.033519, 1.125159" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.973256, 0.975098, 0.977089, 0.981782, 0.991394, 1.001477, 1.093117", \ + "0.972217, 0.974059, 0.976050, 0.980743, 0.990355, 1.000438, 1.092078", \ + "0.970224, 0.972066, 0.974057, 0.978750, 0.988362, 0.998445, 1.090085", \ + "0.965992, 0.967834, 0.969825, 0.974518, 0.984130, 0.994213, 1.085853", \ + "0.957769, 0.959611, 0.961602, 0.966295, 0.975907, 0.985990, 1.077630", \ + "0.944640, 0.946482, 0.948473, 0.953166, 0.962778, 0.972861, 1.064501", \ + "1.005298, 1.007140, 1.009131, 1.013824, 1.023436, 1.033519, 1.125159" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.272426, 1.271334, 1.269578, 1.267822, 1.268878, 1.270038, 1.351266", \ + "1.273117, 1.272025, 1.270269, 1.268513, 1.269569, 1.270729, 1.351957", \ + "1.275246, 1.274154, 1.272398, 1.270642, 1.271698, 1.272858, 1.354086", \ + "1.279657, 1.278565, 1.276809, 1.275053, 1.276109, 1.277269, 1.358497", \ + "1.288309, 1.287217, 1.285461, 1.283705, 1.284761, 1.285921, 1.367149", \ + "1.300665, 1.299573, 1.297817, 1.296061, 1.297117, 1.298277, 1.379505", \ + "1.392434, 1.391342, 1.389586, 1.387830, 1.388886, 1.390046, 1.471274" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.038166, 1.040008, 1.041999, 1.046692, 1.056304, 1.066387, 1.158027", \ + "1.037127, 1.038969, 1.040960, 1.045653, 1.055265, 1.065348, 1.156988", \ + "1.035134, 1.036976, 1.038967, 1.043660, 1.053272, 1.063355, 1.154995", \ + "1.030902, 1.032744, 1.034735, 1.039428, 1.049040, 1.059123, 1.150763", \ + "1.022679, 1.024521, 1.026512, 1.031205, 1.040817, 1.050900, 1.142540", \ + "1.009550, 1.011392, 1.013383, 1.018076, 1.027688, 1.037771, 1.129411", \ + "1.070208, 1.072050, 1.074041, 1.078734, 1.088346, 1.098429, 1.190069" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.038166, 1.040008, 1.041999, 1.046692, 1.056304, 1.066387, 1.158027", \ + "1.037127, 1.038969, 1.040960, 1.045653, 1.055265, 1.065348, 1.156988", \ + "1.035134, 1.036976, 1.038967, 1.043660, 1.053272, 1.063355, 1.154995", \ + "1.030902, 1.032744, 1.034735, 1.039428, 1.049040, 1.059123, 1.150763", \ + "1.022679, 1.024521, 1.026512, 1.031205, 1.040817, 1.050900, 1.142540", \ + "1.009550, 1.011392, 1.013383, 1.018076, 1.027688, 1.037771, 1.129411", \ + "1.070208, 1.072050, 1.074041, 1.078734, 1.088346, 1.098429, 1.190069" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.276293, 1.275201, 1.273445, 1.271689, 1.272745, 1.273905, 1.355133", \ + "1.276984, 1.275892, 1.274136, 1.272380, 1.273436, 1.274596, 1.355824", \ + "1.279113, 1.278021, 1.276265, 1.274509, 1.275565, 1.276725, 1.357953", \ + "1.283524, 1.282432, 1.280676, 1.278920, 1.279976, 1.281136, 1.362364", \ + "1.292176, 1.291084, 1.289328, 1.287572, 1.288628, 1.289788, 1.371016", \ + "1.304532, 1.303440, 1.301684, 1.299928, 1.300984, 1.302144, 1.383372", \ + "1.396301, 1.395209, 1.393453, 1.391697, 1.392753, 1.393913, 1.475141" \ + ); + } + fall_constraint(rf2_32x128_wm1_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "1.276293, 1.275201, 1.273445, 1.271689, 1.272745, 1.273905, 1.355133", \ + "1.276984, 1.275892, 1.274136, 1.272380, 1.273436, 1.274596, 1.355824", \ + "1.279113, 1.278021, 1.276265, 1.274509, 1.275565, 1.276725, 1.357953", \ + "1.283524, 1.282432, 1.280676, 1.278920, 1.279976, 1.281136, 1.362364", \ + "1.292176, 1.291084, 1.289328, 1.287572, 1.288628, 1.289788, 1.371016", \ + "1.304532, 1.303440, 1.301684, 1.299928, 1.300984, 1.302144, 1.383372", \ + "1.396301, 1.395209, 1.393453, 1.391697, 1.392753, 1.393913, 1.475141" \ + ); + } + } + } + leakage_power() { + related_pg_pin : "VDDCE"; + value : 1.503e-03; + } + leakage_power() { + related_pg_pin : "VDDPE"; + value : 6.792e-03; + } + leakage_power() { + related_pg_pin : "VDDCE"; + when :"!RET1N"; + value : 1.477e-03; + } + leakage_power() { + related_pg_pin : "VDDPE"; + when :"!RET1N"; + value : 6.302e-03; + } + } +} diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.ps b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.ps new file mode 100644 index 00000000..156bb6f8 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1_tt_0p90v_0p90v_25c.ps @@ -0,0 +1,5472 @@ +%!PS-Adobe-3.0 +% common_memcomp Version: c0.1.0-EAC +% lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +% CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +% +% Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +% +% Use of this Software is subject to the terms and conditions of the +% applicable license agreement with ARM Physical IP, Inc. +% In addition, this Software is protected by patents, copyright law +% and international treaties. +% +% The copyright notice(s) in this Software does not indicate actual or +% intended publication of this Software. +% +% Compiler Name: High Density Two Port Register File SVT MVT Compiler +% +% Creation Date: Thu Oct 17 15:32:03 2019 +% +% Instance Options: +% Instance Name: rf2_32x128_wm1 +% Number of Words: 32 +% Number of Bits: 128 +% Multiplexer Width: 2 +% Multi-Vt selection: BASE +% Frequency : 1 +% Activity Factor <%>: 50 +% Pipeline: off +% Word-Write Mask: on +% Word Partition Size: 1 +% Write through: off +% Top Metal Layer: m5-m10 +% Power Type: otc +% Redundancy: off +% Redundant Columns: 2 +% Redundant Rows: 0 +% BIST MUXes: on +% Soft Error Repair (SER): none +% Power Gating: off +% Back Biasing: off +% Retention: on +% Extra Margin Adjustment: on +% Advanced Test Features: off +% Customer Comment: This is a memory instance +% Bus-notation: on +% Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +% Name Case: upper +% Check Instance Name: off +% Diodes: on +% Drive Strength: 6 +% Site Definitions: off +% Library Name: USERLIB +% Liberty setting: nldm +% +% Compiler Versions: +% Memory Version: r4p0 +% Lang compiler Version: 4.1.6-EAC2 +% View Name: Postscript +% AMCI Version: 1.4.3-EAC +% RTE Version: 2.1.0-EAC +% datasheet_memcomp Version: 1.3.1-amci +% +% Modeling Assumptions: N/A +% +% Modeling Limitations: N/A +% +% Known Bugs: N/A +% +% Known Work Arounds: N/A +% +%%BoundingBox: 0 0 612 792 +%%Creator: post +%%DocumentData: Clean8Bit +%%DocumentPaperSizes: Letter +%%Orientation: Portrait +%%Pages: (atend) +%%PageOrder: Ascend +%%For: ARM +%%EndComments + +%%BeginProlog + +% TableRow sets the table row height +% Expects dy on the stack +/TableRow { + /tablerow exch def +} def + + +% ArrowRight prints an arrow pointing to the right +% Expects text x y on the stack +/ArrowRight { + newpath + moveto + -2.5 1 rmoveto + 2.5 -1 rlineto + -2.5 -1 rlineto + stroke +} def + + +% ArrowLeft prints an arrow pointing to the left +% Expects text x y on the stack +/ArrowLeft { + newpath + moveto + 2.5 1 rmoveto + -2.5 -1 rlineto + 2.5 -1 rlineto + stroke +} def + + +% ArrowUp prints an arrow pointing up +% Expects text x y on the stack +/ArrowUp { + newpath + moveto + 1 -2.5 rmoveto + -1 2.5 rlineto + -1 -2.5 rlineto + stroke +} def + + +% ArrowDown prints an arrow pointing down +% Expects text x y on the stack +/ArrowDown { + newpath + moveto + 1 2.5 rmoveto + -1 -2.5 rlineto + -1 2.5 rlineto + stroke +} def + + +% CenterLabel prints text centered at the x,y +% centers on x only +% Expects text subscript x y on the stack +/CenterLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 2 div 0 exch sub % 0-dx/2 on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% LeftLabel prints text to the left of the x,y +% centers on x only +% Expects text subscript x y on the stack +/LeftLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 0 exch sub % 0-dx on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% RightLabel prints text to the right of the x,y +% Expects text subscript x y on the stack +/RightLabel { + moveto + exch + show + 0 -2 rmoveto + show +} def + + +% CenterText prints text centered at the x,y +% centers on x only +% Expects text x y on the stack +/CenterText { + moveto + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% Table2start begins a 2 column table. +% Expects 5 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table2Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table2End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table2End { + 1 setlinewidth + tablex tabley + table1width table2width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table2DoubleLine doubles up the line at the bottom of a box +% Expects nothing on the stack +/Table2DoubleLine { + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 1.5 setlinewidth + stroke +} def + + +% Table2Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table2Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + + +% Table2CC prints centered strings at the top of a 2 column table. +% Expects string string on the stack +/Table2CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + + +% Table2LC prints one left aligned string and one centered string +% Expects 2 strings on the stack +/Table2LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LCMicron prints one left aligned string and one centered string +% The centered string has a micron symbol at the end of it. +% Expects 2 strings on the stack +/Table2LCMicron { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % col 2 width + TextFont setfont + dup stringwidth pop % dx of string on stack + /Symbol findfont 12 scalefont setfont + (\155) stringwidth pop % dx of symbol u on stack + add % dx of number with mu + TextFont setfont + (m) stringwidth pop % dx of m on stack + add % dx of entire box contents on stack + 2 div % dx/2 on stack + + % col 2 + tablex table1width add table2width 2 div add % xcenter of square on stack + exch sub + tabley 3 add % string x y+3 on stack + moveto + TextFont setfont + show + /Symbol findfont 12 scalefont setfont + (\155) show + TextFont setfont + (m) show + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LL prints two left aligned strings +% at the top of a 2 column table. +% Expects 2 string (text) on the stack +/Table2LL { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + + % col 1 + tablex + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + +} def + + +% Table2Header prints the header to the table +% Expects string string on the stack +/Table2Header { + tablex tabley moveto + table1width table2width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + Table2CC + 0 setgray +} def + + +/Table4Header { + tablex tabley moveto + table1width table2width add table3width add table4width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add table3width add table4width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + /TextSuperScriptFont /Helvetica findfont 8 scalefont def + Table4CC + 0 setgray +} def + + +/CenterTextSuperScript{ + moveto + /sqSuper exch def + /mUnit exch def + dup stringwidth pop % string x on stack + 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show + + mUnit () ne{ + 2 0 rmoveto + (\()show + /Symbol findfont 8 scalefont setfont + (\155) show + TextSuperScriptFont setfont + mUnit show + TextFont setfont + sqSuper () eq { + (\))show + }if + }if + + sqSuper () ne { + 0 4 rmoveto + TextSuperScriptFont setfont + sqSuper show + 0 -4 rmoveto + TextFont setfont + (\)) show + } if +} def + + +/Table4CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + % col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + +% Table4Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table4Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table2width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table3width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table4width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + +% Table4LC prints one left aligned string and one centered string +% Expects 4 strings on the stack +/Table4LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + %col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + %col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + +% Table4End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table4End { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + +% Table4Start begins a 4 column table. +% Expects 7 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table4Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4width exch def + /table3width exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerStart begins a 2 column table of 1 process corners. +% Expects 5 values on the stack: w1 ... wn xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table5width 0 def + /table4width 0 def + /table3width 0 def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table1CornerEnd { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add table5width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % between col 1 and 2 + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + table5width 0 rlineto + stroke + + 1 setlinewidth +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerTRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost thrice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner4Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost four times as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner5Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost five times as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% Table1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% Table1CornerCornerCol prints the header on the first column +% Expects string string string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerCornerCol { + /xc exch def + /temp exch def + /volt exch def + + % first line + TextFont setfont + xc tabley 3 add tablerow 2 div add % string xc y on stack + CenterText + + % next line width + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xc exch sub + tabley 5 add moveto + + % next line display + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + +} def + + +% Table1CornerHeader prints the header to the table +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/Table1CornerHeader { + (Pin) % column headings + (tt Process) (0.9) (25) + + /tablerow tablerow tablerow add def % Double the y size + + % make a box around the header area + tablex tabley moveto + table1width table2width add table3width add table4width add table5width add 0 rlineto + 0 0 tablerow sub rlineto + table1width table2width add table3width add table4width add table5width add 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray % gray fill the box + fill + + % White lines and text + 1.0 setgray + + /tabley tabley tablerow sub def + + % do the vertical lines between columns + Table1CornerVerticals + + % Column 1 header + tablex table1width add table2width 2 div add Table1CornerCornerCol + + % Pin column header + tablex table1width 2 div add Table1CornerFirstCol + + % back to black lines and text + 0 setgray + + % Restore the row height + /tablerow tablerow 2 div def +} def + + +% TableD1CornerStart begins a 2 column table of 1 double process corners. +% Expects values on the stack: pin_width corn1_1 corn1_2 +% corn2_1 corn2_2 corn3_1 corn3_2 corn4_1 corn4_2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/TableD1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4_2_width 0 def + /table4_1_width 0 def + /table3_2_width 0 def + /table3_1_width 0 def + /table2_2_width 0 def + /table2_1_width 0 def + /table1_2_width exch def + /table1_1_width exch def + /tablep_width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableD1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableD1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% TableD1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableD1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + % single between pin and first corner + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + + +% TableD1CornerRow prints centered strings +% Expects 3 strings on the stack +/TableD1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % pin name + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + +} def + + +% TableD1CornerDRow prints centered strings +% The pin description is broken into 2 rows for this one. +% Expects 10 strings on the stack +/TableD1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % pin name in two rows + tablex 5 add + tabley 3 add + moveto + TextFont setfont + show + tablex 5 add + tabley 13 add + moveto + show + + % restore the y height of the row + /tablerow olddy def + +} def + + +% TableD1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableD1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableD1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableD1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 4 div def + + % first line (Fast Process) + xct + tabley h add h add h add 3 add % string xc y on stack + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Pulse) xcl tabley h add 3 add CenterText + (Width) xcl tabley 5 add CenterText + + % Voltage display + (Voltage) xcr tabley 3 add h 2 div add CenterText + +} def + + +% Centers converts 3 values to the 3 needed centers +% Expects xleft width1 width2 on stack +% Returns xtc xlc xrc +/Centers { + /w2 exch def + /w1 exch def + /l exch def + + l w1 add % xtc on stack + l w1 2 div add % xtc xlc on stack + l w1 add w2 2 div add % xtc xlc xrc on stack +} def + + +% TableD1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableD1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (tt Process) (0.9) (25) + /tablerow tablerow 4 mul def % 4* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in almost white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableD1CornerVerticals + /tableheader 0 def + + tablex tablep_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableD1CornerCornerCol + + tablex tablep_width 2 div add TableD1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 4 div def +} def + + +% TableT1CornerStartHydra begins a 2 column table of 1 double process corners. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStartHydra { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 80 def + /tablep_width 115 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableT1CornerStart begins a 2 column table of 1 double process corners. Extend first and second cols. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStart { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 130 def + /tablep_width 165 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% EMAIlegalFootnote +% Expects nothing on the stack +% returns new page y +/EMAIllegalFootnote { + /tabley pagey 10 sub def + tablex tabley moveto + TextFont setfont + (Timing value of ** indicates illegal EMA setting for this corner.) show +} def + + +% TableT1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableT1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width tablet_width add + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + found999 (yes) eq + { EMAIllegalFootnote } if + tabley % return y +} def + + +% TableT1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableT1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + + % double between symbol and first corner + newpath + tablex tabley moveto + tablep_width tablet_width add 1 sub 0 rmoveto + 0 tablerow rlineto + stroke + newpath + tablex tabley moveto + tablep_width tablet_width add 1 add 0 rmoveto + 0 tablerow rlineto + stroke + + % single between pin and symbol + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + +% CenterText999 prints text centered at the x,y +% '999' is changed to ** +% centers on x only +% Expects text x y on the stack +/CenterText999 { + moveto + dup (999.000) eq + { % replace string if == '999.000' + pop + (**) + % found999 (yes) def + } if + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% TableT1CornerRow prints centered strings +% Expects 3 strings on the stack +% pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley 4 add % x y+4 on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner6Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 6 mul def % 6* the y size + /yup 45 def + /yupc tablerow 6 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 75 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerDRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley olddy add + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableT1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableT1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableT1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 3 div def + + % first line (Fast Process) + xct + tabley h add h add 3 add % string xc y on stack + TextFont setfont + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Min) xcl tabley 5 add CenterText + + % Voltage display + (Max) xcr tabley 5 add CenterText + +} def + + +% TableT1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Second string is over the symbol column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableT1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (tt Process) (0.9) (25) + + % Setup the fonts for the heading + /TextFont /Helvetica-Bold findfont text_size scalefont def + + /tablerow tablerow 3 mul def % 3* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableT1CornerVerticals + /tableheader 0 def + + tablex tablep_width add tablet_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableT1CornerCornerCol + + tablex tablep_width add tablet_width 2 div add TableT1CornerFirstCol + + tablex tablep_width 2 div add TableT1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 3 div def + + % Setup the fonts for the rest of the table + /TextFont /Helvetica findfont text_size scalefont def + /TextSuperscriptFont /Helvetica findfont 8 scalefont def +} def + + +% TextEnd ends a paragraph (or series of paragraphs) +% Expects nothing on the stack +% returns the new page y +/TextEnd { + text_y % return this +} def + + +% TextBulletOn sets bullets at start of para +% Expects nothing on the stack +/TextBulletOn { + /text_bullet true def + /Symbol findfont text_size scalefont setfont + (\267 ) stringwidth pop + /text_bullet_width exch def + TextFont setfont + /text_bullet true def +} def + + +% TextBulletOff sets bullets off at start of para +% Expects nothing on the stack +/TextBulletOff { + /text_bullet false def +} def + + +% TextStart initializes the paragraph stuff +% Expects left right margins y deltay on the stack +/TextStart { + /text_dy exch def + /text_y exch def + /text_right exch def + /text_left exch def + /text_starty text_y def + /text_bullet false def + /text_size 10 def + /text_indent_width 0 def +} def + + +% TextParaStart initializes one paragraph +% Expects nothing on the stack +/TextParaStart { + + % carrige return linefeed + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + + % if bullet show and step over in x + text_bullet { + /Symbol findfont text_size scalefont setfont + (\267 ) show + TextFont setfont + /text_x text_x text_bullet_width add def + } if + + % text_indent does not apply to the first line +} def + + +% TextParaEnd ends one paragraph. +% Expects nothing on the stack +/TextParaEnd { +} def + + +% TextIndent sets the indent string used at start of para +% all following lines space over the indent width +% Expects string on the stack +/TextIndent { + stringwidth pop + /text_indent_width exch def +} def + + +% TextNewline does a carrige return line feed +% Expects nothing on the stack +/TextNewline { + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + text_bullet { + text_bullet_width 0 rmoveto + /text_x text_x text_bullet_width add def + } if + text_indent_width 0 gt { + text_indent_width 0 rmoveto + /text_x text_x text_indent_width add def + } if +} def + + +% TextWord puts one word in the current paragraph +% Expects string on the stack +/TextWord { + dup stringwidth pop % dx on the stack + /text_dx exch def + text_dx text_x add % x pos at end of word on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true + dup ( ) eq + text_x text_left eq + and % if word is space and at left margin then pop + { + pop + } { + show + /text_x text_x text_dx add def + } ifelse % else show +} def + + +% TextSuperscript puts a superscript word in the current paragraph +% The routine does not test for too wide, the superscript MUST +% go with the previous word. +% Expects string on the stack +/TextSuperscript { + TextSuperscriptFont setfont + dup stringwidth pop % dx on the stack + /text_x exch text_x add def + 0 4 rmoveto + show + 0 0 text_size 2 div sub rmoveto + TextFont setfont +} def + + +% TextReserveSpace makes sure there is enough space on +% the current line for the given text to be printed. +% If there isnt enough, a newline is generated. +/TextReserveSpace { + stringwidth pop % dx on the stack + text_x add % x at end of work on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true +} def + + +% TextPiece puts words in the current paragraph +% Expects string on the stack +/TextPiece { + TextFont setfont + { + % expect string to search on stack + ( ) search % post match pre true or string false on stack + { TextWord TextWord } % true display pre, display space + { TextWord exit } % false display string break + ifelse + % go around loop again with string to search on stack + } loop +} def + + +% Expects string on the stack +% Uses c and s vars +/TextFourAdd { + s 1 eq { + % first one + TextPiece + } { + s c eq { + % last one + ( and ) TextPiece + TextPiece + } { + % a middle one + (, ) TextPiece + TextPiece + } ifelse + } ifelse +} def + + +% TextFourList prints from 1 to 4 things to the paragraph +% Expects 4 strings on the stack. (3 could be empty). +/TextFourList { + /s1 exch def + /s2 exch def + /s3 exch def + /s4 exch def + /c 0 def + + % count the number of items + s1 () ne { + /c c 1 add def + } if + s2 () ne { + /c c 1 add def + } if + s3 () ne { + /c c 1 add def + } if + s4 () ne { + /c c 1 add def + } if + + % display the items + /s 0 def + s1 () ne { + /s 1 s add def + s1 TextFourAdd + } if + s2 () ne { + /s 1 s add def + s2 TextFourAdd + } if + s3 () ne { + /s 1 s add def + s3 TextFourAdd + } if + s4 () ne { + /s 1 s add def + s4 TextFourAdd + } if + +} def + + +% TextLine puts a complete paragraph on the page +% Expects string on the stack +/TextLine { + dup () eq { + % Empty, go down 1/2 line. + pop + /text_y text_y text_dy 2 div sub def + } { + % Normal string, show it + TextParaStart + TextPiece + TextParaEnd + } ifelse +} def + + +% TextDegree prints a degree symbol +% Expects nothing on the stack +/TextDegree { + /TextFont /Symbol findfont text_size scalefont def + (\260) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextRegistered prints a copyright symbol +% Expects nothing on the stack +/TextRegistered { + /TextFont /Symbol findfont text_size scalefont def + (\342) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextTrademark prints a degree symbol +% Expects nothing on the stack +/TextTrademark { + /TextFont /Symbol findfont text_size scalefont def + (\344) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextCopyright prints a copyright symbol +% Expects nothing on the stack +/TextCopyright { + /TextFont /Symbol findfont text_size scalefont def + (\343) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% LeftShow prints text to the left of the point +% Expects string x y on the stack +/LeftShow { + moveto + dup stringwidth pop % string dx on stack + 0 exch sub % 0-x on stack + 0 rmoveto + show +} def + + +% LeftShowMicron prints text to the left of the point +% Expects two string x y on the stack +/LeftShowMicron { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /procString exch def + dup stringwidth pop + /techStringWidth exch def + /techString exch def + suffStringWidth techStringWidth add 20 add 0 exch sub 0 rmoveto + techString show + /Symbol findfont title_size scalefont setfont + (\155) show + /Helvetica-Bold findfont title_size scalefont setfont + (m) show + procString show +}def + +% LeftShowRedundancy prints text to the left of the point +% Expects two string x y on the stack +/LeftShowRedundancy { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /textRed exch def + suffStringWidth 20 add 0 exch sub 0 rmoveto + textRed show + title_size 2 div 0 exch rmoveto + /Helvetica-Bold findfont text_size scalefont setfont + (TM) show + /Helvetica-Bold findfont title_size scalefont setfont +} def + + + +% SectionLine does the line part of the section header +% Expects y on the stack +/SectionLine { + /y exch def + /y y line_above sub def + newpath + line_left y moveto + line_right y lineto + 1 setlinewidth + stroke +} def + + +% SectionStart prints a horizontal bar and a section header on the page +% Expects string string y on the stack +% returns the new page y +/SectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /text2 exch def % get the subtext + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + text2 () ne { + /Helvetica findfont text_size scalefont setfont + ( \() show % space over + text2 show % print the explanation + (\)) show + } if + y 10 add % return new y +} def + +% MicronSectionStart prints a horizontal bar and a section header on the page +% Expects string y on the stack +% returns the new page y +/MicronSectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + + y 10 add % return new y +} def + +/line_left 55 def +/line_right 550 def +/line_above 10 def +/line_below 10 def + +% EndingCopyright prints the copyright info at the end +% of the last page. The y location is set but the x size +% depends on the section line size. +% Expects xc y on the stack +/EndingCopyright { + SectionLine + /y y line_below sub def + /xc exch def + line_left line_right y 9 TextStart + /text_size 7 def + /TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(Words and logos marked with ) TextPiece +TextRegistered +( or ) TextPiece +TextTrademark +( are registered trademarks or trademarks of ARM) TextPiece +TextRegistered +( in the EU and other countries, except as otherwise stated below in this\ + proprietary notice. Other brands and names mentioned herein may be the trademarks\ + of their respective owners.) TextPiece +TextParaEnd +/text_y text_y 4 sub def +(Neither the whole nor any part of the information contained in, or the\ + product described in, this document may be adapted or reproduced in any\ + material form except with the prior written permission of the copyright holder.) TextLine +/text_y text_y 4 sub def +(The product described in this document is subject to continuous developments\ + and improvements. All particulars of the product and its use contained in this\ + document are given by ARM in good faith. However, all warranties implied or \ + expressed, including but not limited to implied warranties of merchantability, or\ + fitness for purpose, are excluded.) TextLine +/text_y text_y 4 sub def +(This document is intended only to assist the reader in the use of the product. \ + ARM shall not be liable for any loss or damage arising from the use of any \ + information in this document, or any error or omission in such information, or \ + any incorrect use of the product.) TextLine +/text_y text_y 4 sub def +(Where the term ARM is used it means "ARM or any of its subsidiaries as appropriate".) TextLine +/text_y text_y 4 sub def +(ARM reserves the right to make changes to any products and services\ + described herein, at any time without notice in order to make improvements\ + in design, performance, or presentation and to provide the best possible\ + products and services. Customers should obtain the latest specifications\ + before referencing any information, product, or service described herein,\ + except as expressly agreed in writing by and officer of ARM.) TextLine +/text_y text_y 4 sub def +(ARM does not assume any responsibility or liability arising out of the\ + application or use of any products or services described herein, except\ + as expressly agreed to in writing by and officer of ARM; nor does the\ + purchase, lease, or use of a product or service from ARM convey license\ + under any patent rights, copyrights, trademark rights, or any other of\ + the intellectual property rights of ARM or of third parties.) TextLine +} def + +% CenterTextMu prints two text strings centered at the x,y +% with a mu symbol between the text strings +% centers on x only +% Expects text text x y on the stack +/CenterTextMu { + moveto + /text2 exch def % save second string + /text1 exch def % save first string + /Helvetica findfont 7 scalefont setfont + text1 stringwidth pop % width of first string + text2 stringwidth pop % width of second string + (\155) stringwidth pop % width of mu + add add % width of 2 strings plus mu on stack + 2 div 0 exch sub % 0-x/2 on stack + 0 rmoveto + /Helvetica findfont 7 scalefont setfont + text1 show + /Symbol findfont 7 scalefont setfont + (\155) show + /Helvetica findfont 7 scalefont setfont + text2 show +} def + +% Expects x y scale on the stack +/ARMlogo { + gsave + translate + dup scale + 0.08 0.43 0.53 setrgbcolor + + newpath + 10 10 moveto + 50 10 lineto + 60 38 lineto + 70 62 lineto + 93 117 lineto + 117 62 lineto + 70 62 lineto + 60 38 lineto + 127 38 lineto + 140 10 lineto + 180 10 lineto + 113 150 lineto + 70 150 lineto + closepath + fill + + newpath + 188 10 moveto + 226 10 lineto + 226 125 lineto + 250 125 lineto + 250 109 16 90 270 arcn + 250 93 lineto + 226 93 lineto + 226 67 lineto + 245 67 254 56 12 arcto + 278 10 lineto + 318 10 lineto + 278 80 lineto + 260 109 41 270 90 arc + 188 150 lineto + closepath + fill + + newpath + 330 10 moveto + 367 10 lineto + 367 96 lineto + 407.5 53 lineto + 413.5 53 lineto + 454 96 lineto + 454 10 lineto + 490 10 lineto + 490 150 lineto + 454 150 lineto + 410.5 100 lineto + 367 150 lineto + 330 150 lineto + closepath + fill + + newpath + 1.5 setlinewidth + 507.5 142.5 7.5 0 360 arc + stroke + 503 138 moveto + /Helvetca-Bold findfont 12 scalefont setfont + (R) show + + grestore +} def + +% ShortCopyright will center a copyright message +% at the bottom of the page. +% Expects date page-string xcenter y on the stack +/ShortCopyright { + /y exch def + /xc exch def + /page exch def + /d exch def + /Helvetica findfont 7 scalefont setfont + ( CLN28HPM 28nm Process, RF-2P Datasheet, Version r4p0) xc y CenterText + /y y 10 sub def + (Copyright 1993-2019 ARM. All Rights Reserved.) xc y CenterText + /y y 10 sub def + page xc y CenterText + + % Instance name on left + line_left y 10 add moveto + (rf2_32x128_wm1 ) show + d show + + % Logo on right +} def + + +% SymbolStart begins the part symbol +% Expects xUpperLeft yUpperLeft inPins outPins on stack +/SymbolStart { + /symbolOutPins exch def + /symbolInPins exch def + /symbolY exch def + /symbolX exch def + /symbolCapHeight 20 def + /symbolWidth 90 def + /symbolPinLength 10 def + /symbolPinSpacing 12 def + /symbolInY symbolY symbolCapHeight sub def + /symbolOutY + symbolInPins symbolOutPins sub 2 div + symbolPinSpacing mul + symbolY exch sub symbolCapHeight sub + def + + % box of symbol + newpath + symbolX symbolY moveto + symbolWidth 0 rlineto + symbolCapHeight 2 mul + symbolInPins 1 sub symbolPinSpacing mul add + 0 exch sub + 0 exch rlineto + 0 symbolWidth sub 0 rlineto + closepath + 2 setlinewidth + stroke + + /symbolY symbolY symbolCapHeight 2 mul sub + symbolInPins 1 sub symbolPinSpacing mul sub + def + +} def + +% SymbolEnd completes the part symbol +% Expects nothing on the stack +% Returns bottom of the symbol on the stack +/SymbolEnd { + symbolY 12 sub symbolPinLength sub +} def + +% SymbolInput puts an input pin on the part +% Expects pinName on the stack +/SymbolInput { + dup () ne { + % print nonblank pin + newpath + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rmoveto + -2 -3 rmoveto + dup stringwidth pop 0 exch sub + 0 rmoveto + show + } { + % ignore blank pin + pop + } ifelse + /symbolInPins symbolInPins 1 sub def + /symbolInY symbolInY symbolPinSpacing sub def +} def + +% SymbolOutput puts an output pin on the part +% Expects pinName on the stack +/SymbolOutput { + dup () ne { + newpath + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rmoveto + 2 -3 rmoveto + show + } { + pop + } ifelse + /symbolOutPins symbolOutPins 1 sub def + /symbolOutY symbolOutY symbolPinSpacing sub def +} def + +% Put triangle inside, line down and string +% Expects string x y (left/right) on stack +/SymbolTriangle { + /l exch def + /y exch def + /x exch def + newpath + x y moveto + -3 0 rmoveto + 3 6 rlineto + 3 -6 rlineto + 0.5 setlinewidth + stroke + newpath + x y moveto + 0 0 symbolPinLength sub rlineto + stroke + x y moveto + 0 0 symbolPinLength sub rmoveto + 0 -12 rmoveto + l (left) eq { + dup stringwidth pop 0 exch sub 0 rmoveto + } if + l (center) eq { + dup stringwidth pop 2 div 0 exch sub 0 rmoveto + } if + show +} def + +% SymbolClocks puts two clock pins on the bottom of the part +% Expects pinName pinName on the stack +/SymbolClocks { + symbolX symbolWidth 2 mul 3 div add + symbolY (right) SymbolTriangle % string x y dir on stack + symbolX symbolWidth 3 div add + symbolY (left) SymbolTriangle % string x y dir on stack +} def + +% SymbolClock puts one clock pin on the bottom of the part +% Expects pinName on the stack +/SymbolClock { + symbolX symbolWidth 2 div add + symbolY (center) SymbolTriangle % string x y dir on stack +} def + +% Waves for frame number 1 +% 94 paths, 26 strings +% Expects x y on stack +% bounds: 0.0->347.714 0.0->207.416 +/Frame1 { + gsave + translate + newpath + 109.056 195.874 moveto + 109.056 173.503 lineto + 0.5 setlinewidth + stroke + newpath + 54.056 205.874 moveto + 54.056 138.242 lineto + stroke + newpath + 16.556 173.503 moveto + 49.056 173.503 lineto + 59.056 188.503 lineto + 104.056 188.503 lineto + 114.056 173.503 lineto + 159.056 173.503 lineto + 169.056 188.503 lineto + 214.056 188.503 lineto + 224.056 173.503 lineto + 269.056 173.503 lineto + 279.056 188.503 lineto + 324.056 188.503 lineto + 334.056 173.374 lineto + 346.556 173.374 lineto + stroke + newpath + 54.056 193.374 moveto + 109.056 193.374 lineto + stroke + 54.056 193.374 ArrowLeft + 109.056 193.374 ArrowRight + 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270.246 51.168 lineto + 336.56 51.168 lineto + 0.5 setlinewidth + stroke + /Times-Roman findfont 10 scalefont setfont + (CLKB) () 0 78.8168 LeftLabel + (CLKA) () 0 38.8168 LeftLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cwbcra_wr3) 68.1024 64.4672 CenterLabel + grestore +} def + +%%EndProlog +%%Page: 1 1 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 570 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/pagey pagey 18 sub def +/Helvetica-Bold findfont title_size scalefont setfont +(High Density Two Port Register File SVT MVT Compiler) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(CLN28HPM 28nm Process) rightmargin pagey LeftShow +/pagey pagey 18 sub def +( 256 Rows Per Bit line, 0.389um^2 Bit Cell) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(32 Words X 128 Bits, Mux 2 Instance) rightmargin pagey LeftShow +/pagey pagey 18 sub def + +0.35 50 650 ARMlogo +/pagey pagey 20 sub def +/text_size 10 def +(Overview) () pagey SectionStart +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(The High Density Two Port Register File SVT MVT Compiler is optimized for speed and density.\ + The memory is designed to take full advantage of the ) TextPiece + +(TSMC) TextPiece +( 28nmnm) TextReserveSpace +( 28nm) TextPiece +( CLN28HPM CMOS process.) TextPiece +TextParaEnd +() TextLine +TextParaStart +(The storage array is composed of eight-transistor\ + bit cells with fully static circuitry. The\ + register file\ + operates at a voltage of 0.9V) TextPiece +( and a junction temperature of ) TextPiece +(25.01C) TextReserveSpace +(25.0) TextPiece +TextDegree +(C.) TextPiece +TextParaEnd +TextEnd % returns new page y +/pagey exch def +% spaceLeft before Instance Settings 492 +/text_size 10 def +(Instance Settings) () pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +200 +(CLN28HPM) stringwidth pop 15 add 100 1 index 1 index + lt { exch pop } { pop } ifelse +leftmargin pagey 14 Table2Start +(Parameter) (Setting) Table2Header +Table2DoubleLine +/TextFont /Helvetica findfont text_size scalefont def +(Instance Name) (rf2_32x128_wm1) Table2LC +(Process) (CLN28HPM) Table2LC +(Number of Words ) (32) Table2LC +(Bits) (128) Table2LC +(Multiplexer Width ) (2) Table2LC +(Multi-Vt selection ) (BASE) Table2LC +(Frequency ) (1) Table2LC +(Activity Factor <%> ) (50) Table2LC +(Pipeline ) (off) Table2LC +(Word-Write Mask ) (on) Table2LC +(Word Partition Size ) (1) Table2LC +(Write through ) (off) Table2LC +(Top Metal Layer ) (m5-m10) Table2LC +(Power Type ) (otc) Table2LC +(Redundancy ) (off) Table2LC +(Redundant Columns ) (2) Table2LC +(Redundant Rows ) (0) Table2LC +(BIST MUXes ) (on) Table2LC +(Soft Error Repair (SER) ) (none) Table2LC +(Power Gating ) (off) Table2LC +(Back Biasing ) (off) Table2LC +(Retention ) (on) Table2LC +(Extra Margin Adjustment ) (on) Table2LC +(Advanced Test Features ) (off) Table2LC +(Name Case ) (upper) Table2LC +(Diodes ) (on) Table2LC +Table2End % returns the new y +/pagey exch def +% spaceLeft before description 94 +(Description) () pagey SectionStart +/pagey exch def +% spaceLeft before description text begins 74 + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +(Register file access is synchronous and is triggered by the rising-edge of the c\ +locks, CLKA and CLKB. The write port (port B) input address, input data, write \ +enable and chip enable are latched by the rising-edge of CLKB, respecting indivi\ +dual setup and hold times.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 26 +() (1) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 2 2 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Description) (cont) pagey SectionStart +/pagey exch def +/pagey pagey 6 sub def +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read port (port A) input address and chip enable are latched by the rising-e\ +dge of CLKA, respecting individual setup and hold times. The two ports can oper\ +ate completely asynchronous to each other.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 602 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A write cycle is initiated if the write port chip enable, CENB, is asserted at t\ +he rising-edge of CLKB. Input data, DB, is written at the address, AB. If the \ +word-write feature is implemented, via the compiler, data on the data input bus \ +is partitioned to the write enable bus, WENB[x:0]. Each WENB pin has a distinct \ +latched value, making each partition individually selectable. When the latched v\ +alue of a write enable pin, WENB[i], is low the corresponding data partition is \ +selected, and its data is written to the memory location specified on the addres\ +s bus.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 500 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A read cycle is initiated if the read port chip enable CENA is asserted at the r\ +ising-edge of CLKA. The contents of the location specified by the address, AA, a\ +re driven on the data output bus, QA. The register file is allowed to access non\ +-existing physical addresses, but the outputs will be unknown.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 446 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(In the event of a write/read collision, if COLLDISN is disabled then the write i\ +s guaranteed and the read data is undefined.However, if COLLDISN is enabled then\ + the write is not guaranteed if the read row address and write row address match\ +.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 392 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read address for any given memory cycle can be identical to the write addres\ +s of the previous memory cycle with the read data being identical to the data th\ +at was written from the previous memory write cycle.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 350 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( Partial read during a read/write collision through the use of WENB is not suppo\ +rted. For example, during a read/write collision, if WENB[] is set to disable th\ +e write operation to certain bits, these bits cannot be simultaneously read on p\ +ort A. This is independent of the setting of COLLDISN.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 296 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( A standby mode is provided for periods of non-operation (CENA=1 or CENB=1). The\ + ports A and B can enter standby mode independently. While in standby mode, add\ +ress and data inputs are disabled; data stored in the memory is retained, but th\ +e memory cannot be accessed for reads or writes.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 242 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(One of the inputs of the input BIST MUX is connected to system signals while the\ + other is connected to the test signals. The memory datapath will now include in\ +tegrated scan chains, with testability controlled by pins DFTRAMBYP, TENA, SEA, \ +TENB, and SEB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 188 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Memory normal mode is enabled (RET1N=1). In this mode the core and periphery pow\ +er are both connected to the chip level power grid through Artigrid There is a p\ +ower sequence when the memory is put from active to selective precharge and back\ + to active. Selective precharge is available for all compilers except for the RO\ +M. Before entering selective precharge, the memory must be put in standby mode b\ +y setting CENA=1, TCENA=1, CENB=1 and TCENB=1.In addition, DFTRAMBYP must be set\ + to 0.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 98 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Extra Margin Adjustment pins provide the option of adding delays into internal t\ +iming pulses. There are 3 different EMA pins: EMAA, EMAWA, EMASA to control Read\ +/Write internal timing pulses.) TextLine +TextEnd +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +% spaceLeft beginning paragraph 50 +(Refer to the user guide for a more detailed description\ + of memory operation.) TextLine +TextEnd +/pagey exch def +() (2) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 3 3 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Physical Dimensions) pagey MicronSectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 75 75 75 leftmargin pagey 14 Table4Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Area Type) (Width)(m)() (Height)(m)() (Area)(m)(2) Table4Header +/TextFont /Helvetica findfont text_size scalefont def +( Core) (21.165) (414.86) (8780.51) Table4LC +Table4End +/pagey exch def + +leftmargin rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +(All width, height, and area dimensions are in drawn dimensions.\ + For shrink processes, this will be larger than the final silicon\ + post-shrink dimensions.) TextLine +TextEnd +/pagey exch def +/pagey pagey 20 sub def +(Symbol) () pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +/Helvetica findfont text_size scalefont setfont +255 pagey 24 9 SymbolStart +(CENA) SymbolInput +(AA[4:0]) SymbolInput +(CENB) SymbolInput +(WENB[127:0]) SymbolInput +(AB[4:0]) SymbolInput +(DB[127:0]) SymbolInput +(EMAA[2:0]) SymbolInput +(EMASA) SymbolInput +(EMAB[2:0]) SymbolInput +(TENA) SymbolInput +(TCENA) SymbolInput +(TAA[4:0]) SymbolInput +(TENB) SymbolInput +(TCENB) SymbolInput +(TWENB[127:0]) SymbolInput +(TAB[4:0]) SymbolInput +(TDB[127:0]) SymbolInput +(RET1N) SymbolInput +(SIA[1:0]) SymbolInput +(SEA) SymbolInput +(DFTRAMBYP) SymbolInput +(SIB[1:0]) SymbolInput +(SEB) SymbolInput +(COLLDISN) SymbolInput +(CENYA) SymbolOutput +(AYA[4:0]) SymbolOutput +(WENYB[127:0]) SymbolOutput +(QA[127:0]) SymbolOutput +(SOA[1:0]) SymbolOutput +() SymbolOutput +(CENYB) SymbolOutput +(AYB[4:0]) SymbolOutput +(SOB[1:0]) SymbolOutput +(CLKA) (CLKB) SymbolClocks +SymbolEnd +/pagey exch def +() (3) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 4 4 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Pin Description) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def + +180 350 line_left pagey 14 Table2Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Pin) (Description) Table2Header +/TextFont /Helvetica findfont text_size scalefont def +(AA[4:0], AB[4:0]) (Read & Write Addresses \(AA[0],AB[0] = LSB\)) Table2LL +(DB[127:0]) (Data Inputs \(DB[0] = LSB\)) Table2LL +(CLKA, CLKB) (Read & Write Clocks) Table2LL +(CENA, CENB) (Read & Write Enables \(active low\)) Table2LL +(WENB[127:0]) (Write Enable \(active low, WENB[0] = LSB\)) Table2LL +(EMAA[2:0], EMAB[2:0]) (Read and Write Extra Margin Adjustment \(EMAA[0],EMAB[0] = LSB\)) Table2LL +(EMASA) (Read Extra Margin Adjustment) Table2LL +(TENA, TENB) (Port A & B Test Mode Enables \(active low\)) Table2LL +(TDB[127:0]) (Data Test Input \(TDB[0] = LSB\)) Table2LL +(TCENA, TCENB) (Read & Write Chip Enable Test Inputs \(active low\)) Table2LL +(TWENB[127:0]) (Write Enable Test Input \(active low, TWENB[0] = LSB\)) Table2LL +(TAA[4:0], TAB[4:0]) (Read & Write Address Test Inputs \(TAA[0],TAB[0] = LSB\)) Table2LL +(COLLDISN) (Allow the user to disable the internal collision detection circuitry\(active low\)) Table2LL +(RET1N) (Retention Input \(active low\)) Table2LL +(DFTRAMBYP) (Test Control Input \(active high\)) Table2LL +(SEA,SEB) (Scan Enable Input \(active high\)) Table2LL +(QA[127:0]) (Data Outputs \(QA[0] = LSB\)) Table2LL +(CENYA, CENYB) (Read & Write Chip Enable Mux Outputs) Table2LL +(WENYB[127:0]) (Write Enable Mux Output \(WENYB[0] = LSB\)) Table2LL +(AYA[4:0], AYB[4:0]) (Read & Write Address Mux Outputs \(AYA[0],AYB[0] = LSB\)) Table2LL +(SOA[1:0],SOB[1:0]) (Scan Output \(SOA[0],SOB[0] = LSB\)) Table2LL +(SIA[1:0],SIB[1:0]) (Scan Input \(SIA[0],SIB[0] = LSB\)) Table2LL +Table2End +/pagey exch def +() (4) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 5 5 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Read Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +(The retain timing arc is not shown in this diagram. \ +Please refer to the User Guide for this compiler for a detailed timing \ +diagram with the retain arc.) TextLine +TextEnd +/pagey pagey 10 sub def +leftmargin pagey 250 sub Frame1 +/pagey pagey 250 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Write Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 10 sub def +leftmargin pagey 290 sub Frame2 +/pagey pagey 280 sub def +() (5) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 6 6 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Write to Read Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 91 sub Frame1027 +/pagey pagey 96 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Read to Write Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 55 sub Frame1030 +/pagey pagey 85 sub def +% headerEstimate=182 +% estimate=238 +% tailEstimate=44 +% spaceLeft=384 +(Default Timing for Cycle and Access) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +(The timing tables shows delay values measured from\ + 50% of supply to\ + 50% of supply voltage.\ + The output pins are loaded with the standard load of 0.035pF.\ + Input pins are driven with a standard slew of 0.080ns from\ + 10% to\ + 90% of supply voltage.) TextLine +() TextLine +(The timing and power values are measured at input slew of 0.08ns on clock pin,\ + 0.08ns on signal pins and output load 0.035pF.) TextLine + +TextEnd +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader + +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.4972) (0.6403) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.5653) (0.6739) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.9362) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (1.0011) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.6000) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.7764) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.2538) (0.2946) TableT1CornerRow +(Min. High pulse width CLKA) () (t) (ckah) (0.1133) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (6) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 7 7 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Timing continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=568 after continuation +(Min. Low pulse width CLKA) () (t) (ckal) (0.1135) () TableT1CornerRow +(Min. High pulse width CLKB) () (t) (ckbh) (0.1158) () TableT1CornerRow +(Min. Low pulse width CLKB) () (t) (ckbl) (0.1131) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript + +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart + +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def + +% after table spaceLeft=482 +% headerEstimate=110 +% estimate=112 +% tailEstimate=64 +% spaceLeft=482 +(Load Timing) (units = ns/pF) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(CENYA load factor) () (K) (load_cenya) () (2.0800) TableT1CornerRow +(AYA load factor) () (K) (load_aya) () (1.6620) TableT1CornerRow +(CENYB load factor) () (K) (load_cenyb) () (1.9640) TableT1CornerRow +(WENYB load factor) () (K) (load_wenyb) () (1.7940) TableT1CornerRow +(AYB load factor) () (K) (load_ayb) () (1.6740) TableT1CornerRow +(QA load factor) () (K) (load_qa) () (0.6383) TableT1CornerRow +(SOA load factor) () (K) (load_soa) () (1.7020) TableT1CornerRow +(SOB load factor) () (K) (load_sob) () (1.8420) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The output load factor units are ns/pF.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% headerEstimate=110 +% estimate=1092 +% tailEstimate=14 +% spaceLeft=196 +(Setup and Hold Timing) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(Setup Btw. CLKA and AA) (COLLDISN=1) () (t) (aas) (0.1265) () TableT1CornerDRow +(Hold Btw. CLKA and AA) (COLLDISN=1) () (t) (aah) (0.0821) () TableT1CornerDRow +(Setup Btw. CLKB and AB) (COLLDISN=1) () (t) (abs) (0.1337) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (7) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 8 8 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. CLKB and AB) (COLLDISN=1) () (t) (abh) (0.0765) () TableT1CornerDRow +(Setup Btw. CLKA and TAA) (COLLDISN=1) () (t) (taas) (0.1310) () TableT1CornerDRow +(Hold Btw. CLKA and TAA) (COLLDISN=1) () (t) (taah) (0.0821) () TableT1CornerDRow +(Setup Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabs) (0.1373) () TableT1CornerDRow +(Hold Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabh) (0.0765) () TableT1CornerDRow +(Setup Btw. CLKA and CENA) () (t) (cenas) (0.1176) () TableT1CornerRow +(Hold Btw. CLKA and CENA) () (t) (cenah) (0.0489) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nfh) (1.0442) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nrh) (0.3960) () TableT1CornerRow +(Setup Btw. CLKB and CENB) () (t) (cenbs) (0.1240) () TableT1CornerRow +(Hold Btw. CLKB and CENB) () (t) (cenbh) (0.0492) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nfh) (1.0442) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nrh) (0.3960) () TableT1CornerRow +(Setup Btw. CLKB and WENB) () (t) (wenbs) (0.0225) () TableT1CornerRow +(Hold Btw. CLKB and WENB) () (t) (wenbh) (0.2057) () TableT1CornerRow +(Setup Btw. CLKB and DB) () (t) (dbs) (0.0487) () TableT1CornerRow +(Hold Btw. CLKB and DB) () (t) (dbh) (0.1941) () TableT1CornerRow +(Setup Btw. CLKA and EMAA) () (t) (emaas) (0.9759) () TableT1CornerRow +(Hold Btw. CLKA and EMAA) () (t) (emaah) (1.2848) () TableT1CornerRow +(Setup Btw. CLKA and EMASA) () (t) (emasas) (0.9759) () TableT1CornerRow +(Hold Btw. CLKA and EMASA) () (t) (emasah) (1.2848) () TableT1CornerRow +(Setup Btw. CLKB and EMAB) () (t) (emabs) (1.0408) () TableT1CornerRow +(Hold Btw. CLKB and EMAB) () (t) (emabh) (1.2886) () TableT1CornerRow +(Setup Btw. CLKA and TENA) () (t) (tenas) (0.2339) () TableT1CornerRow +(Hold Btw. CLKA and TENA) () (t) (tenah) (0.0903) () TableT1CornerRow +(Setup Btw. CLKA and TCENA) () (t) (tcenas) (0.1176) () TableT1CornerRow +(Hold Btw. CLKA and TCENA) () (t) (tcenah) (0.0517) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nfh) (1.0442) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nrh) (0.3960) () TableT1CornerRow +(Setup Btw. CLKB and TENB) () (t) (tenbs) (0.4547) () TableT1CornerRow +(Hold Btw. CLKB and TENB) () (t) (tenbh) (0.2271) () TableT1CornerRow +(Setup Btw. CLKB and TCENB) () (t) (tcenbs) (0.1252) () TableT1CornerRow +(Hold Btw. CLKB and TCENB) () (t) (tcenbh) (0.0507) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nfh) (1.0442) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (8) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 9 9 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nrh) (0.3960) () TableT1CornerRow +(Setup Btw. CLKB and TWENB) () (t) (twenbs) (0.0225) () TableT1CornerRow +(Hold Btw. CLKB and TWENB) () (t) (twenbh) (0.2065) () TableT1CornerRow +(Setup Btw. CLKB and TDB) () (t) (tdbs) (0.0509) () TableT1CornerRow +(Hold Btw. CLKB and TDB) () (t) (tdbh) (0.1941) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nf_dftrambypfh) (0.0313) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nr_dftrambypfh) (1.0442) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nf_cenbrh) (0.0313) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nf_cenarh) (0.0294) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nf_tcenarh) (0.0294) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nf_tcenbrh) (0.0313) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nr_tcenbrh) (1.0442) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nr_tcenarh) (0.9793) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nr_cenbrh) (1.0442) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nr_cenarh) (0.9793) () TableT1CornerRow +(Setup Btw. CLKA and SIA) () (t) (sias) (0.2573) () TableT1CornerRow +(Hold Btw. CLKA and SIA) () (t) (siah) (0.0817) () TableT1CornerRow +(Setup Btw. CLKA and SEA) () (t) (seas) (0.2573) () TableT1CornerRow +(Hold Btw. CLKA and SEA) () (t) (seah) (1.2848) () TableT1CornerRow +(Setup Btw. CLKA and DFTRAMBYP) () (t) (dftrambypas) (0.3272) () TableT1CornerRow +(Hold Btw. CLKA and DFTRAMBYP) () (t) (dftrambypah) (1.2848) () TableT1CornerRow +(Setup Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbs) (0.3272) () TableT1CornerRow +(Hold Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbh) (1.0442) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nfh) (1.0442) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nrh) (0.3960) () TableT1CornerRow +(Setup Btw. CLKB and SIB) () (t) (sibs) (0.0487) () TableT1CornerRow +(Hold Btw. CLKB and SIB) () (t) (sibh) (0.1941) () TableT1CornerRow +(Setup Btw. CLKB and SEB) () (t) (sebs) (0.4547) () TableT1CornerRow +(Hold Btw. CLKB and SEB) () (t) (sebh) (0.2271) () TableT1CornerRow +(Setup Btw. CLKA and COLLDISN) () (t) (colldisnas) (0.9759) () TableT1CornerRow +(Hold Btw. CLKA and COLLDISN) () (t) (colldisnah) (1.2848) () TableT1CornerRow +(Setup Btw. CLKB and COLLDISN) () (t) (colldisnbs) (1.0408) () TableT1CornerRow +(Hold Btw. CLKB and COLLDISN) () (t) (colldisnbh) (1.2886) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextEnd +/pagey exch def +% after table spaceLeft=78 +% headerEstimate=82 +% estimate=1862 +% tailEstimate=84 +% spaceLeft=78 +() (9) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 10 10 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment) +(units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (accqa_rd0) (0.4910) (0.6329) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (accqa_rd1) (0.4917) (0.6338) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (accqa_rd2) (0.4953) (0.6380) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.4972) (0.6403) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (accqa_rd4) (0.5483) (0.7004) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (accqa_rd5) (0.5907) (0.7503) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (accqa_rd6) (0.6403) (0.8086) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (accqa_rd7) (0.6833) (0.8592) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (accqa_scan0) (0.4910) (0.6329) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (accqa_scan1) (0.4917) (0.6338) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (accqa_scan2) (0.4953) (0.6380) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (accqa_scan3) (0.4972) (0.6403) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (accqa_scan4) (0.5483) (0.7004) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (accqa_scan5) (0.5907) (0.7503) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (accqa_scan6) (0.6403) (0.8086) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (accqa_scan7) (0.6833) (0.8592) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd0) (0.5590) (0.6665) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd1) (0.5598) (0.6674) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd2) (0.5633) (0.6716) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.5653) (0.6739) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (10) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 11 11 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd4) (0.6164) (0.7340) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd5) (0.6588) (0.7839) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd6) (0.7083) (0.8422) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd7) (0.7514) (0.8928) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan0) (0.5590) (0.6665) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan1) (0.5598) (0.6674) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan2) (0.5633) (0.6716) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan3) (0.5653) (0.6739) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan4) (0.6164) (0.7340) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan5) (0.6588) (0.7839) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan6) (0.7083) (0.8422) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan7) (0.7514) (0.8928) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=0 EMASA=0) () (t) (cyca_ema0) (0.9287) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=1 EMASA=0) () (t) (cyca_ema1) (0.9295) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=2 EMASA=0) () (t) (cyca_ema2) (0.9338) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.9362) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=4 EMASA=0) () (t) (cyca_ema4) (0.9972) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=5 EMASA=0) () (t) (cyca_ema5) (1.0478) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=6 EMASA=0) () (t) (cyca_ema6) (1.1069) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=7 EMASA=0) () (t) (cyca_ema7) (1.1583) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (11) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 12 12 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Min. Cycle CLKB) (EMAB=0) () (t) (cycb_ema0) (0.9633) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=1) () (t) (cycb_ema1) (0.9742) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=2) () (t) (cycb_ema2) (0.9854) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (1.0011) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=4) () (t) (cycb_ema4) (1.0743) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=5) () (t) (cycb_ema5) (1.1236) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=6) () (t) (cycb_ema6) (1.1945) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=7) () (t) (cycb_ema7) (1.2454) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=0) () (t) (cracwb_rd0) (0.5926) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=1) () (t) (cracwb_rd1) (0.5935) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=2) () (t) (cracwb_rd2) (0.5977) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.6000) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=4) () (t) (cracwb_rd4) (0.6601) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=5) () (t) (cracwb_rd5) (0.7100) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=6) () (t) (cracwb_rd6) (0.7683) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=7) () (t) (cracwb_rd7) (0.8189) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=0) () (t) (cwbcra_wr0) (0.7392) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=1) () (t) (cwbcra_wr1) (0.7499) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=2) () (t) (cwbcra_wr2) (0.7610) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.7764) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (12) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 13 13 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Clock Collision CLKB) (EMAB=4) () (t) (cwbcra_wr4) (0.8486) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=5) () (t) (cwbcra_wr5) (0.8972) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=6) () (t) (cwbcra_wr6) (0.9670) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=7) () (t) (cwbcra_wr7) (1.0172) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.2538) (0.2946) TableT1CornerRow +(High pulse width CLKA) () (t) (ckah) (0.1133) () TableT1CornerRow +(Low pulse width CLKA) () (t) (ckal) (0.1135) () TableT1CornerRow +(High pulse width CLKB) () (t) (ckbh) (0.1158) () TableT1CornerRow +(Low pulse width CLKB) () (t) (ckbl) (0.1131) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=308 +% headerEstimate=82 +% estimate=350 +% tailEstimate=84 +% spaceLeft=308 +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CENA to CENYA) (1,2) (t) (cenacenya) (0.1110) (0.1187) TableT1CornerRow +(Delay TCENA to CENYA) (1,2) (t) (tcenacenya) (0.1101) (0.1176) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyapu) (0.1494) (0.1613) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyanu) (0.1732) (0.1885) TableT1CornerRow +(Delay DFTRAMBYP to CENYA) (1,2) (t) (dftrambypcenya) (0.1752) (0.1900) TableT1CornerRow +(Delay AA to AYA) (1,2) (t) (aaaya) (0.0968) (0.1038) TableT1CornerRow +(Delay TAA to AYA) (1,2) (t) (taaaya) (0.1008) (0.1082) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayapu) (0.1700) (0.1877) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayanu) (0.1670) (0.1835) TableT1CornerRow +(Delay DFTRAMBYP to AYA) (1,2) (t) (dftrambypaya) (0.1623) (0.1776) TableT1CornerRow +(Delay CENB to CENYB) (1,2) (t) (cenbcenyb) (0.1117) (0.1195) TableT1CornerRow +(Delay TCENB to CENYB) (1,2) (t) (tcenbcenyb) (0.1108) (0.1185) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybpu) (0.1535) (0.1658) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybnu) (0.2582) (0.2823) TableT1CornerRow +(Delay DFTRAMBYP to CENYB) (1,2) (t) (dftrambypcenyb) (0.1682) (0.1824) TableT1CornerRow +(Delay WENB to WENYB) (1,2) (t) (wenbwenyb) (0.1250) (0.1351) TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (13) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 14 14 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=588 after continuation +(Delay TWENB to WENYB) (1,2) (t) (twenbwenyb) (0.1241) (0.1341) TableT1CornerRow +(Delay TENB to WENYB) (1,2) (t) (tenbwenybpu) (0.2699) (0.3463) TableT1CornerRow +(Delay TENB to WENYB) (1,2) (t) (tenbwenybnu) (0.2727) (0.3615) TableT1CornerRow +(Delay DFTRAMBYP to WENYB) (1,2) (t) (dftrambypwenyb) (0.1630) (0.2183) TableT1CornerRow +(Delay AB to AYB) (1,2) (t) (abayb) (0.0970) (0.1040) TableT1CornerRow +(Delay TAB to AYB) (1,2) (t) (tabayb) (0.0990) (0.1062) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybpu) (0.2524) (0.2796) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybnu) (0.2495) (0.2792) TableT1CornerRow +(Delay DFTRAMBYP to AYB) (1,2) (t) (dftrambypayb) (0.1563) (0.1779) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=378 +% headerEstimate=77 +% estimate=364 +% tailEstimate=0 +% spaceLeft=378 +/pagey pagey 5 sub def +(Pin Capacitance) (units = fF) pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +(CLKA) () (9.1160) Table1CornerRow +(CENA) () (1.3390) Table1CornerRow +(AA) () (1.5820) Table1CornerRow +(CLKB) () (9.6730) Table1CornerRow +(CENB) () (1.2610) Table1CornerRow +(WENB) () (1.4160) Table1CornerRow +(AB) () (1.5760) Table1CornerRow +(DB) () (1.8840) Table1CornerRow +(EMAA) () (5.7690) Table1CornerRow +(EMASA) () (2.4650) Table1CornerRow +(EMAB) () (5.5880) Table1CornerRow +(TENA) () (0.8574) Table1CornerRow +(TCENA) () (1.3500) Table1CornerRow +(TAA) () (1.5440) Table1CornerRow +(TENB) () (1.0150) Table1CornerRow +(TCENB) () (1.3570) Table1CornerRow +(TWENB) () (1.2420) Table1CornerRow +(TAB) () (1.5860) Table1CornerRow +(TDB) () (1.6100) Table1CornerRow +(SIA) () (1.2170) Table1CornerRow +(SEA) () (1.6020) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (14) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 15 15 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Pin Capacitance continued) (units = fF) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +/TextFont /Helvetica-Bold findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +% spaceLeft=511 after continuation +(DFTRAMBYP) () (2.0560) Table1CornerRow +(SIB) () (5.7510) Table1CornerRow +(SEB) () (1.8940) Table1CornerRow +(COLLDISN) () (2.1310) Table1CornerRow +(RET1N) () (3.3990) Table1CornerRow +Table1CornerEnd +/pagey exch def +% after table spaceLeft=441 +% headerEstimate=77 +% estimate=644 +% tailEstimate=94 +% spaceLeft=441 +/Helvetica-Bold findfont text_size scalefont setfont +(Current) (units = mA) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(Core Standby std Curr.) (3) (1.670e-03) Table1CornerRow +(Peri Standby std Curr.) (3) (7.547e-03) Table1CornerRow +(Core Standby Retention-1 Curr.) (3) (1.745e-03) Table1CornerRow +(Peri Standby Retention-1 Curr.) (3) (4.462e-04) Table1CornerRow +(Core Standby Selective Precharge Curr.) (3) (1.641e-03) Table1CornerRow +(Peri Standby Selective Precharge Curr.) (3) (7.003e-03) Table1CornerRow +(Core Read AC (EMAA=0) Curr.) (1,4) (8.332e-05) Table1CornerRow +(Core Read AC (EMAA=1) Curr.) (1,4) (8.351e-05) Table1CornerRow +(Core Read AC (EMAA=2) Curr.) (1,4) (8.351e-05) Table1CornerRow +(Core Read AC (EMAA=3) Curr.) (1,4) (8.358e-05) Table1CornerRow +(Core Read AC (EMAA=4) Curr.) (1,4) (8.580e-05) Table1CornerRow +(Core Read AC (EMAA=5) Curr.) (1,4) (8.714e-05) Table1CornerRow +(Core Read AC (EMAA=6) Curr.) (1,4) (8.820e-05) Table1CornerRow +(Core Read AC (EMAA=7) Curr.) (1,4) (8.931e-05) Table1CornerRow +(Peri Read AC (EMAA=0) Curr.) (1,4) (3.154e-03) Table1CornerRow +(Peri Read AC (EMAA=1) Curr.) (1,4) (3.154e-03) Table1CornerRow +(Peri Read AC (EMAA=2) Curr.) (1,4) (3.161e-03) Table1CornerRow +(Peri Read AC (EMAA=3) Curr.) (1,4) (3.161e-03) Table1CornerRow +(Peri Read AC (EMAA=4) Curr.) (1,4) (3.183e-03) Table1CornerRow +(Peri Read AC (EMAA=5) Curr.) (1,4) (3.183e-03) Table1CornerRow +(Peri Read AC (EMAA=6) Curr.) (1,4) (3.183e-03) Table1CornerRow +(Peri Read AC (EMAA=7) Curr.) (1,4) (3.187e-03) Table1CornerRow +(Core Write AC (EMAB=0) Curr.) (1,4) (1.992e-04) Table1CornerRow +(Core Write AC (EMAB=1) Curr.) (1,4) (1.994e-04) Table1CornerRow +(Core Write AC (EMAB=2) Curr.) (1,4) (1.994e-04) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (15) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 16 16 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Current continued) (units = mA) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +% spaceLeft=593 after continuation +(Core Write AC (EMAB=3) Curr.) (1,4) (1.994e-04) Table1CornerRow +(Core Write AC (EMAB=4) Curr.) (1,4) (2.016e-04) Table1CornerRow +(Core Write AC (EMAB=5) Curr.) (1,4) (2.030e-04) Table1CornerRow +(Core Write AC (EMAB=6) Curr.) (1,4) (2.041e-04) Table1CornerRow +(Core Write AC (EMAB=7) Curr.) (1,4) (2.052e-04) Table1CornerRow +(Peri Write AC (EMAB=0) Curr.) (1,4) (3.831e-03) Table1CornerRow +(Peri Write AC (EMAB=1) Curr.) (1,4) (3.831e-03) Table1CornerRow +(Peri Write AC (EMAB=2) Curr.) (1,4) (3.838e-03) Table1CornerRow +(Peri Write AC (EMAB=3) Curr.) (1,4) (3.838e-03) Table1CornerRow +(Peri Write AC (EMAB=4) Curr.) (1,4) (3.859e-03) Table1CornerRow +(Peri Write AC (EMAB=5) Curr.) (1,4) (3.859e-03) Table1CornerRow +(Peri Write AC (EMAB=6) Curr.) (1,4) (3.859e-03) Table1CornerRow +(Peri Write AC (EMAB=7) Curr.) (1,4) (3.864e-03) Table1CornerRow +(Core Deselect(A) (icc_c_desela) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(A) (icc_p_desela) Curr.) (2,4) (4.837e-05) Table1CornerRow +(Core Deselect(B) (icc_c_deselb) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(B) (icc_p_deselb) Curr.) (2,4) (9.985e-04) Table1CornerRow +(Core Peak (icc_c_peak) Curr.) () (2.960067) Table1CornerRow +(Peri Peak (icc_p_peak) Curr.) () (41.601651) Table1CornerRow +(Core Inrush (icc_c_inrush) Curr.) () (1.662968) Table1CornerRow +(Peri Inrush (icc_p_inrush) Curr.) () (38.103734) Table1CornerRow +Table1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 4 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The AC current value assumes 50% read and write\ + operations, where 50% addresses and 50% of input\ + and output pins switch at the user defined frequency of 1MHz\ + and user defined clock activity_factor of 50%.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The deselected current assumes the memory is deselected,\ + 50% addresses switch, and 50% of input pins switch\ + at the user defined frequency of 1MHz.\ + The logic switching component of deselected power becomes\ + negligbly small if the input pins are held stable by\ + externally controlling these signals with chip select.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(3) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The standby current value is independent of frequency\ + and assumes all inputs and outputs are stable.) TextPiece +TextParaEnd +TextParaStart +(4) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The leakage current component is not included in this value.) TextPiece +TextParaEnd +TextParaStart +(5) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Clock activity factor will affect total current.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=205 +() (16) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 17 17 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Clock Noise Limit) (Time-units = ns, Voltage-units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 45 45 leftmargin 55 sub pagey 14 TableD1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +TableD1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(CLKA) (0.0567) (0.1800) TableD1CornerRow +(CLKB) (0.0579) (0.1800) TableD1CornerRow +TableD1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The clock noise limit is the maximum voltage allowed \(for the\ + indicated pulse width\) that does not cause an unintentional\ + memory cycle or other memory failure.) TextLine +TextEnd +/pagey exch def +(Supply Noise Limit) (units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 90 leftmargin 55 sub pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(Power) () (0.0900) Table1CornerRow +(Ground) () (0.0900) Table1CornerRow +Table1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The power and ground noise limit is the maximum supply\ + voltage transition that is allowed without causing\ + a memory failure.) TextLine +TextEnd +/pagey exch def +centerx 300 EndingCopyright +() (17) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Trailer +%%Pages: 17 +%%EOF